Line data    Source code

       1              : /* Inline functions to test validity of reg classes for addressing modes.
       2              :    Copyright (C) 2006-2026 Free Software Foundation, Inc.
       3              : 
       4              : This file is part of GCC.
       5              : 
       6              : GCC is free software; you can redistribute it and/or modify it under
       7              : the terms of the GNU General Public License as published by the Free
       8              : Software Foundation; either version 3, or (at your option) any later
       9              : version.
      10              : 
      11              : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
      12              : WARRANTY; without even the implied warranty of MERCHANTABILITY or
      13              : FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
      14              : for more details.
      15              : 
      16              : You should have received a copy of the GNU General Public License
      17              : along with GCC; see the file COPYING3.  If not see
      18              : <http://www.gnu.org/licenses/>.  */
      19              : 
      20              : /* Wrapper function around the TARGET_BASE_REG_CLASS hook.  MEM is the
      21              :    MEM rtx being addressed, if known, and INSN is the instruction it
      22              :    belongs to, if known; both may be null.  */
      23              : 
      24              : #ifndef GCC_ADDRESSES_H
      25              : #define GCC_ADDRESSES_H
      26              : 
      27              : inline enum reg_class
      28    218830831 : base_reg_class (machine_mode mode, addr_space_t as,
      29              :                 enum rtx_code outer_code, enum rtx_code index_code,
      30              :                 rtx mem = NULL_RTX, rtx_insn *insn = NULL)
      31              : {
      32    218830831 :   return (enum reg_class) targetm.base_reg_class (mode, as, outer_code,
      33    182485586 :                                                    index_code, mem, insn);
      34              : }
      35              : 
      36              : inline enum reg_class
      37     40356824 : index_reg_class (rtx_insn *insn ATTRIBUTE_UNUSED = NULL)
      38              : {
      39              : #ifdef INSN_INDEX_REG_CLASS
      40     40356824 :   return INSN_INDEX_REG_CLASS (insn);
      41              : #else
      42              :   return INDEX_REG_CLASS;
      43              : #endif
      44              : }
      45              : 
      46              : /* Wrapper function to unify target macros REGNO_MODE_CODE_OK_FOR_BASE_P,
      47              :    REGNO_MODE_OK_FOR_REG_BASE_P, REGNO_MODE_OK_FOR_BASE_P and
      48              :    REGNO_OK_FOR_BASE_P.
      49              :    Arguments as for the REGNO_MODE_CODE_OK_FOR_BASE_P macro.  */
      50              : 
      51              : inline bool
      52      1197236 : ok_for_base_p_1 (unsigned regno ATTRIBUTE_UNUSED,
      53              :                  machine_mode mode ATTRIBUTE_UNUSED,
      54              :                  addr_space_t as ATTRIBUTE_UNUSED,
      55              :                  enum rtx_code outer_code ATTRIBUTE_UNUSED,
      56              :                  enum rtx_code index_code ATTRIBUTE_UNUSED,
      57              :                  rtx_insn* insn ATTRIBUTE_UNUSED = NULL)
      58              : {
      59              : #ifdef REGNO_OK_FOR_INSN_BASE_P
      60      1197236 :   return REGNO_OK_FOR_INSN_BASE_P (regno, insn);
      61              : #else
      62              : #ifdef REGNO_MODE_CODE_OK_FOR_BASE_P
      63              :   return REGNO_MODE_CODE_OK_FOR_BASE_P (regno, MACRO_MODE (mode), as,
      64              :                                         outer_code, index_code);
      65              : #else
      66              : #ifdef REGNO_MODE_OK_FOR_REG_BASE_P
      67              :   if (index_code == REG)
      68              :     return REGNO_MODE_OK_FOR_REG_BASE_P (regno, MACRO_MODE (mode));
      69              : #endif
      70              : #ifdef REGNO_MODE_OK_FOR_BASE_P
      71              :   return REGNO_MODE_OK_FOR_BASE_P (regno, MACRO_MODE (mode));
      72              : #else
      73              :   return REGNO_OK_FOR_BASE_P (regno);
      74              : #endif
      75              : #endif
      76              : #endif
      77              : }
      78              : 
      79              : /* Wrapper around ok_for_base_p_1, for use after register allocation is
      80              :    complete.  Arguments as for the called function.  */
      81              : 
      82              : inline bool
      83      1060615 : regno_ok_for_base_p (unsigned regno, machine_mode mode, addr_space_t as,
      84              :                      enum rtx_code outer_code, enum rtx_code index_code,
      85              :                      rtx_insn *insn = NULL)
      86              : {
      87      1060615 :   if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0)
      88            0 :     regno = reg_renumber[regno];
      89              : 
      90      1060615 :   return ok_for_base_p_1 (regno, mode, as, outer_code, index_code, insn);
      91              : }
      92              : 
      93              : #endif /* GCC_ADDRESSES_H */