Line data Source code
1 : /* Get CPU type and Features for x86 processors.
2 : Copyright (C) 2012-2026 Free Software Foundation, Inc.
3 : Contributed by Sriraman Tallam (tmsriram@google.com)
4 :
5 : This file is part of GCC.
6 :
7 : GCC is free software; you can redistribute it and/or modify it under
8 : the terms of the GNU General Public License as published by the Free
9 : Software Foundation; either version 3, or (at your option) any later
10 : version.
11 :
12 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 : for more details.
16 :
17 : Under Section 7 of GPL version 3, you are granted additional
18 : permissions described in the GCC Runtime Library Exception, version
19 : 3.1, as published by the Free Software Foundation.
20 :
21 : You should have received a copy of the GNU General Public License and
22 : a copy of the GCC Runtime Library Exception along with this program;
23 : see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 : <http://www.gnu.org/licenses/>. */
25 :
26 : struct __processor_model
27 : {
28 : unsigned int __cpu_vendor;
29 : unsigned int __cpu_type;
30 : unsigned int __cpu_subtype;
31 : /* The first 32 features are stored as bitmasks in __cpu_features.
32 : The rest of features are stored as bitmasks in a separate array
33 : of unsigned int. */
34 : unsigned int __cpu_features[1];
35 : };
36 :
37 : struct __processor_model2
38 : {
39 : unsigned int __cpu_family;
40 : unsigned int __cpu_model;
41 : unsigned int __cpu_max_level;
42 : unsigned int __cpu_ext_level;
43 : };
44 :
45 : #ifndef CHECK___builtin_cpu_is
46 : # define CHECK___builtin_cpu_is(cpu)
47 : #endif
48 :
49 : #ifndef CHECK___builtin_cpu_supports
50 : # define CHECK___builtin_cpu_supports(isa)
51 : #endif
52 :
53 : /* Return non-zero if the processor has feature F. */
54 :
55 : static inline int
56 167345 : has_cpu_feature (struct __processor_model *cpu_model,
57 : unsigned int *cpu_features2,
58 : enum processor_features feature)
59 : {
60 167345 : unsigned index, offset;
61 167345 : unsigned f = feature;
62 :
63 140385 : if (f < 32)
64 : {
65 : /* The first 32 features. */
66 37447 : return cpu_model->__cpu_features[0] & (1U << f);
67 : }
68 : else
69 : {
70 : /* The rest of features. cpu_features2[i] contains features from
71 : (32 + i * 32) to (31 + 32 + i * 32), inclusively. */
72 119114 : f -= 32;
73 119114 : index = f / 32;
74 119114 : offset = f % 32;
75 108330 : return cpu_features2[index] & (1U << offset);
76 : }
77 : }
78 :
79 : /* Save FEATURE to either CPU_MODEL or CPU_FEATURES2. */
80 :
81 : static inline void
82 63356 : set_cpu_feature (struct __processor_model *cpu_model,
83 : unsigned int *cpu_features2,
84 : enum processor_features feature)
85 : {
86 63356 : unsigned index, offset;
87 63356 : unsigned f = feature;
88 :
89 63356 : if (f < 32)
90 : {
91 : /* The first 32 features. */
92 24264 : cpu_model->__cpu_features[0] |= (1U << f);
93 : }
94 : else
95 : {
96 : /* The rest of features. cpu_features2[i] contains features from
97 : (32 + i * 32) to (31 + 32 + i * 32), inclusively. */
98 39092 : f -= 32;
99 39092 : index = f / 32;
100 39092 : offset = f % 32;
101 39092 : cpu_features2[index] |= (1U << offset);
102 : }
103 59312 : }
104 :
105 : /* Drop FEATURE from either CPU_MODEL or CPU_FEATURES2. */
106 :
107 : static inline void
108 0 : reset_cpu_feature (struct __processor_model *cpu_model,
109 : unsigned int *cpu_features2,
110 : enum processor_features feature)
111 : {
112 0 : unsigned index, offset;
113 0 : unsigned f = feature;
114 :
115 0 : if (f < 32)
116 : {
117 : /* The first 32 features. */
118 0 : cpu_model->__cpu_features[0] &= ~(1U << f);
119 : }
120 : else
121 : {
122 : /* The rest of features. cpu_features2[i] contains features from
123 : (32 + i * 32) to (31 + 32 + i * 32), inclusively. */
124 0 : f -= 32;
125 0 : index = f / 32;
126 0 : offset = f % 32;
127 0 : cpu_features2[index] &= ~(1U << offset);
128 : }
129 : }
130 :
131 : /* Get the specific type of AMD CPU and return AMD CPU name. Return
132 : NULL for unknown AMD CPU. */
133 :
134 : static inline const char *
135 1348 : get_amd_cpu (struct __processor_model *cpu_model,
136 : struct __processor_model2 *cpu_model2,
137 : unsigned int *cpu_features2)
138 : {
139 1348 : const char *cpu = NULL;
140 1348 : unsigned int family = cpu_model2->__cpu_family;
141 1348 : unsigned int model = cpu_model2->__cpu_model;
142 :
143 1348 : switch (family)
144 : {
145 0 : case 0x10:
146 : /* AMD Family 10h. */
147 0 : cpu = "amdfam10";
148 0 : cpu_model->__cpu_type = AMDFAM10H;
149 0 : switch (model)
150 : {
151 0 : case 0x2:
152 : /* Barcelona. */
153 0 : CHECK___builtin_cpu_is ("amdfam10h");
154 0 : CHECK___builtin_cpu_is ("barcelona");
155 0 : cpu_model->__cpu_subtype = AMDFAM10H_BARCELONA;
156 0 : break;
157 0 : case 0x4:
158 : /* Shanghai. */
159 0 : CHECK___builtin_cpu_is ("amdfam10h");
160 0 : CHECK___builtin_cpu_is ("shanghai");
161 0 : cpu_model->__cpu_subtype = AMDFAM10H_SHANGHAI;
162 0 : break;
163 0 : case 0x8:
164 : /* Istanbul. */
165 0 : CHECK___builtin_cpu_is ("amdfam10h");
166 0 : CHECK___builtin_cpu_is ("istanbul");
167 0 : cpu_model->__cpu_subtype = AMDFAM10H_ISTANBUL;
168 0 : break;
169 : default:
170 : break;
171 : }
172 : break;
173 0 : case 0x14:
174 : /* AMD Family 14h "btver1". */
175 0 : cpu = "btver1";
176 0 : CHECK___builtin_cpu_is ("btver1");
177 0 : cpu_model->__cpu_type = AMD_BTVER1;
178 0 : break;
179 0 : case 0x15:
180 : /* AMD Family 15h "Bulldozer". */
181 0 : cpu_model->__cpu_type = AMDFAM15H;
182 0 : if (model == 0x2)
183 : {
184 : /* Bulldozer version 2 "Piledriver" */
185 0 : cpu = "bdver2";
186 0 : CHECK___builtin_cpu_is ("bdver2");
187 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER2;
188 : }
189 0 : else if (model <= 0xf)
190 : {
191 : /* Bulldozer version 1. */
192 0 : cpu = "bdver1";
193 0 : CHECK___builtin_cpu_is ("bdver1");
194 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER1;
195 : }
196 0 : else if (model <= 0x2f)
197 : {
198 : /* Bulldozer version 2 "Piledriver" */
199 0 : cpu = "bdver2";
200 0 : CHECK___builtin_cpu_is ("bdver2");
201 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER2;
202 : }
203 0 : else if (model <= 0x4f)
204 : {
205 : /* Bulldozer version 3 "Steamroller" */
206 0 : cpu = "bdver3";
207 0 : CHECK___builtin_cpu_is ("bdver3");
208 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER3;
209 : }
210 0 : else if (model <= 0x7f)
211 : {
212 : /* Bulldozer version 4 "Excavator" */
213 0 : cpu = "bdver4";
214 0 : CHECK___builtin_cpu_is ("bdver4");
215 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER4;
216 : }
217 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
218 : FEATURE_AVX2))
219 : {
220 0 : cpu = "bdver4";
221 0 : CHECK___builtin_cpu_is ("bdver4");
222 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER4;
223 : }
224 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
225 : FEATURE_XSAVEOPT))
226 : {
227 0 : cpu = "bdver3";
228 0 : CHECK___builtin_cpu_is ("bdver3");
229 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER3;
230 : }
231 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
232 : FEATURE_BMI))
233 : {
234 0 : cpu = "bdver2";
235 0 : CHECK___builtin_cpu_is ("bdver2");
236 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER2;
237 : }
238 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
239 : FEATURE_XOP))
240 : {
241 0 : cpu = "bdver1";
242 0 : CHECK___builtin_cpu_is ("bdver1");
243 0 : cpu_model->__cpu_subtype = AMDFAM15H_BDVER1;
244 : }
245 : break;
246 0 : case 0x16:
247 : /* AMD Family 16h "btver2" */
248 0 : cpu = "btver2";
249 0 : CHECK___builtin_cpu_is ("btver2");
250 0 : cpu_model->__cpu_type = AMD_BTVER2;
251 0 : break;
252 1348 : case 0x17:
253 1348 : cpu_model->__cpu_type = AMDFAM17H;
254 1348 : if (model <= 0x1f)
255 : {
256 : /* AMD family 17h version 1. */
257 0 : cpu = "znver1";
258 0 : CHECK___builtin_cpu_is ("znver1");
259 0 : cpu_model->__cpu_subtype = AMDFAM17H_ZNVER1;
260 : }
261 1348 : else if (model >= 0x30)
262 : {
263 1348 : cpu = "znver2";
264 1348 : CHECK___builtin_cpu_is ("znver2");
265 1348 : cpu_model->__cpu_subtype = AMDFAM17H_ZNVER2;
266 : }
267 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
268 : FEATURE_CLWB))
269 : {
270 0 : cpu = "znver2";
271 0 : CHECK___builtin_cpu_is ("znver2");
272 0 : cpu_model->__cpu_subtype = AMDFAM17H_ZNVER2;
273 : }
274 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
275 : FEATURE_CLZERO))
276 : {
277 0 : cpu = "znver1";
278 0 : CHECK___builtin_cpu_is ("znver1");
279 0 : cpu_model->__cpu_subtype = AMDFAM17H_ZNVER1;
280 : }
281 : break;
282 0 : case 0x19:
283 0 : cpu_model->__cpu_type = AMDFAM19H;
284 : /* AMD family 19h. */
285 0 : if (model <= 0x0f)
286 : {
287 0 : cpu = "znver3";
288 0 : CHECK___builtin_cpu_is ("znver3");
289 0 : cpu_model->__cpu_subtype = AMDFAM19H_ZNVER3;
290 : }
291 0 : else if ((model >= 0x10 && model <= 0x1f)
292 0 : || (model >= 0x60 && model <= 0xaf))
293 : {
294 0 : cpu = "znver4";
295 0 : CHECK___builtin_cpu_is ("znver4");
296 0 : cpu_model->__cpu_subtype = AMDFAM19H_ZNVER4;
297 : }
298 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
299 : FEATURE_AVX512F))
300 : {
301 0 : cpu = "znver4";
302 0 : CHECK___builtin_cpu_is ("znver4");
303 0 : cpu_model->__cpu_subtype = AMDFAM19H_ZNVER4;
304 : }
305 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
306 : FEATURE_VAES))
307 : {
308 0 : cpu = "znver3";
309 0 : CHECK___builtin_cpu_is ("znver3");
310 0 : cpu_model->__cpu_subtype = AMDFAM19H_ZNVER3;
311 : }
312 : break;
313 0 : case 0x1a:
314 0 : cpu_model->__cpu_type = AMDFAM1AH;
315 0 : if (model <= 0x4f || (model >= 0x60 && model <= 0x77) ||
316 0 : (model >= 0xd0 && model <= 0xd7))
317 : {
318 0 : cpu = "znver5";
319 0 : CHECK___builtin_cpu_is ("znver5");
320 0 : cpu_model->__cpu_subtype = AMDFAM1AH_ZNVER5;
321 : }
322 0 : else if ((model >= 0x50 && model <= 0x5f) ||
323 0 : (model >= 0x80 && model <= 0xcf) ||
324 0 : (model >= 0xd8 && model <= 0xe7))
325 : {
326 0 : cpu = "znver6";
327 0 : CHECK___builtin_cpu_is ("znver6");
328 0 : cpu_model->__cpu_subtype = AMDFAM1AH_ZNVER6;
329 : }
330 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
331 : FEATURE_AVX512VP2INTERSECT))
332 : {
333 0 : cpu = "znver5";
334 0 : CHECK___builtin_cpu_is ("znver5");
335 0 : cpu_model->__cpu_subtype = AMDFAM1AH_ZNVER5;
336 : }
337 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
338 : FEATURE_AVX512BMM))
339 : {
340 0 : cpu = "znver6";
341 0 : CHECK___builtin_cpu_is ("znver6");
342 0 : cpu_model->__cpu_subtype = AMDFAM1AH_ZNVER6;
343 : }
344 : break;
345 : default:
346 : break;
347 : }
348 :
349 1348 : return cpu;
350 : }
351 :
352 : /* Get the specific type of Intel CPU and return Intel CPU name. Return
353 : NULL for unknown Intel CPU. */
354 :
355 : static inline const char *
356 0 : get_intel_cpu (struct __processor_model *cpu_model,
357 : struct __processor_model2 *cpu_model2,
358 : unsigned int *cpu_features2)
359 : {
360 0 : const char *cpu = NULL;
361 :
362 : /* Parse family and model for family 0x6. */
363 0 : if (cpu_model2->__cpu_family == 0x6)
364 0 : switch (cpu_model2->__cpu_model)
365 : {
366 0 : case 0x1c:
367 0 : case 0x26:
368 : /* Bonnell. */
369 0 : cpu = "bonnell";
370 0 : CHECK___builtin_cpu_is ("atom");
371 0 : cpu_model->__cpu_type = INTEL_BONNELL;
372 0 : break;
373 0 : case 0x37:
374 0 : case 0x4a:
375 0 : case 0x4d:
376 0 : case 0x5d:
377 : /* Silvermont. */
378 0 : case 0x4c:
379 0 : case 0x5a:
380 0 : case 0x75:
381 : /* Airmont. */
382 0 : cpu = "silvermont";
383 0 : CHECK___builtin_cpu_is ("silvermont");
384 0 : cpu_model->__cpu_type = INTEL_SILVERMONT;
385 0 : break;
386 0 : case 0x5c:
387 0 : case 0x5f:
388 : /* Goldmont. */
389 0 : cpu = "goldmont";
390 0 : CHECK___builtin_cpu_is ("goldmont");
391 0 : cpu_model->__cpu_type = INTEL_GOLDMONT;
392 0 : break;
393 0 : case 0x7a:
394 : /* Goldmont Plus. */
395 0 : cpu = "goldmont-plus";
396 0 : CHECK___builtin_cpu_is ("goldmont-plus");
397 0 : cpu_model->__cpu_type = INTEL_GOLDMONT_PLUS;
398 0 : break;
399 0 : case 0x86:
400 0 : case 0x96:
401 0 : case 0x9c:
402 : /* Tremont. */
403 0 : cpu = "tremont";
404 0 : CHECK___builtin_cpu_is ("tremont");
405 0 : cpu_model->__cpu_type = INTEL_TREMONT;
406 0 : break;
407 0 : case 0x17:
408 0 : case 0x1d:
409 : /* Penryn. */
410 0 : case 0x0f:
411 : /* Merom. */
412 0 : cpu = "core2";
413 0 : CHECK___builtin_cpu_is ("core2");
414 0 : cpu_model->__cpu_type = INTEL_CORE2;
415 0 : break;
416 0 : case 0x1a:
417 0 : case 0x1e:
418 0 : case 0x1f:
419 0 : case 0x2e:
420 : /* Nehalem. */
421 0 : cpu = "nehalem";
422 0 : CHECK___builtin_cpu_is ("corei7");
423 0 : CHECK___builtin_cpu_is ("nehalem");
424 0 : cpu_model->__cpu_type = INTEL_COREI7;
425 0 : cpu_model->__cpu_subtype = INTEL_COREI7_NEHALEM;
426 0 : break;
427 0 : case 0x25:
428 0 : case 0x2c:
429 0 : case 0x2f:
430 : /* Westmere. */
431 0 : cpu = "westmere";
432 0 : CHECK___builtin_cpu_is ("corei7");
433 0 : CHECK___builtin_cpu_is ("westmere");
434 0 : cpu_model->__cpu_type = INTEL_COREI7;
435 0 : cpu_model->__cpu_subtype = INTEL_COREI7_WESTMERE;
436 0 : break;
437 0 : case 0x2a:
438 0 : case 0x2d:
439 : /* Sandy Bridge. */
440 0 : cpu = "sandybridge";
441 0 : CHECK___builtin_cpu_is ("corei7");
442 0 : CHECK___builtin_cpu_is ("sandybridge");
443 0 : cpu_model->__cpu_type = INTEL_COREI7;
444 0 : cpu_model->__cpu_subtype = INTEL_COREI7_SANDYBRIDGE;
445 0 : break;
446 0 : case 0x3a:
447 0 : case 0x3e:
448 : /* Ivy Bridge. */
449 0 : cpu = "ivybridge";
450 0 : CHECK___builtin_cpu_is ("corei7");
451 0 : CHECK___builtin_cpu_is ("ivybridge");
452 0 : cpu_model->__cpu_type = INTEL_COREI7;
453 0 : cpu_model->__cpu_subtype = INTEL_COREI7_IVYBRIDGE;
454 0 : break;
455 0 : case 0x3c:
456 0 : case 0x3f:
457 0 : case 0x45:
458 0 : case 0x46:
459 : /* Haswell. */
460 0 : cpu = "haswell";
461 0 : CHECK___builtin_cpu_is ("corei7");
462 0 : CHECK___builtin_cpu_is ("haswell");
463 0 : cpu_model->__cpu_type = INTEL_COREI7;
464 0 : cpu_model->__cpu_subtype = INTEL_COREI7_HASWELL;
465 0 : break;
466 0 : case 0x3d:
467 0 : case 0x47:
468 0 : case 0x4f:
469 0 : case 0x56:
470 : /* Broadwell. */
471 0 : cpu = "broadwell";
472 0 : CHECK___builtin_cpu_is ("corei7");
473 0 : CHECK___builtin_cpu_is ("broadwell");
474 0 : cpu_model->__cpu_type = INTEL_COREI7;
475 0 : cpu_model->__cpu_subtype = INTEL_COREI7_BROADWELL;
476 0 : break;
477 0 : case 0x4e:
478 0 : case 0x5e:
479 : /* Skylake. */
480 0 : case 0x8e:
481 0 : case 0x9e:
482 : /* Kaby Lake. */
483 0 : case 0xa5:
484 0 : case 0xa6:
485 : /* Comet Lake. */
486 0 : cpu = "skylake";
487 0 : CHECK___builtin_cpu_is ("corei7");
488 0 : CHECK___builtin_cpu_is ("skylake");
489 0 : cpu_model->__cpu_type = INTEL_COREI7;
490 0 : cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE;
491 0 : break;
492 0 : case 0x55:
493 0 : CHECK___builtin_cpu_is ("corei7");
494 0 : cpu_model->__cpu_type = INTEL_COREI7;
495 0 : if (has_cpu_feature (cpu_model, cpu_features2,
496 : FEATURE_AVX512BF16))
497 : {
498 : /* Cooper Lake. */
499 0 : cpu = "cooperlake";
500 0 : CHECK___builtin_cpu_is ("cooperlake");
501 0 : cpu_model->__cpu_subtype = INTEL_COREI7_COOPERLAKE;
502 : }
503 0 : else if (has_cpu_feature (cpu_model, cpu_features2,
504 : FEATURE_AVX512VNNI))
505 : {
506 : /* Cascade Lake. */
507 0 : cpu = "cascadelake";
508 0 : CHECK___builtin_cpu_is ("cascadelake");
509 0 : cpu_model->__cpu_subtype = INTEL_COREI7_CASCADELAKE;
510 : }
511 : else
512 : {
513 : /* Skylake with AVX-512 support. */
514 0 : cpu = "skylake-avx512";
515 0 : CHECK___builtin_cpu_is ("skylake-avx512");
516 0 : cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE_AVX512;
517 : }
518 : break;
519 0 : case 0x66:
520 : /* Cannon Lake. */
521 0 : cpu = "cannonlake";
522 0 : CHECK___builtin_cpu_is ("corei7");
523 0 : CHECK___builtin_cpu_is ("cannonlake");
524 0 : cpu_model->__cpu_type = INTEL_COREI7;
525 0 : cpu_model->__cpu_subtype = INTEL_COREI7_CANNONLAKE;
526 0 : break;
527 0 : case 0x7e:
528 0 : case 0x7d:
529 0 : case 0x9d:
530 : /* Ice Lake client. */
531 0 : cpu = "icelake-client";
532 0 : CHECK___builtin_cpu_is ("corei7");
533 0 : CHECK___builtin_cpu_is ("icelake-client");
534 0 : cpu_model->__cpu_type = INTEL_COREI7;
535 0 : cpu_model->__cpu_subtype = INTEL_COREI7_ICELAKE_CLIENT;
536 0 : break;
537 0 : case 0x6a:
538 0 : case 0x6c:
539 : /* Ice Lake server. */
540 0 : cpu = "icelake-server";
541 0 : CHECK___builtin_cpu_is ("corei7");
542 0 : CHECK___builtin_cpu_is ("icelake-server");
543 0 : cpu_model->__cpu_type = INTEL_COREI7;
544 0 : cpu_model->__cpu_subtype = INTEL_COREI7_ICELAKE_SERVER;
545 0 : break;
546 0 : case 0xa7:
547 : /* Rocket Lake. */
548 0 : cpu = "rocketlake";
549 0 : CHECK___builtin_cpu_is ("corei7");
550 0 : CHECK___builtin_cpu_is ("rocketlake");
551 0 : cpu_model->__cpu_type = INTEL_COREI7;
552 0 : cpu_model->__cpu_subtype = INTEL_COREI7_ROCKETLAKE;
553 0 : break;
554 0 : case 0x8c:
555 0 : case 0x8d:
556 : /* Tiger Lake. */
557 0 : cpu = "tigerlake";
558 0 : CHECK___builtin_cpu_is ("corei7");
559 0 : CHECK___builtin_cpu_is ("tigerlake");
560 0 : cpu_model->__cpu_type = INTEL_COREI7;
561 0 : cpu_model->__cpu_subtype = INTEL_COREI7_TIGERLAKE;
562 0 : break;
563 0 : case 0xbe:
564 : /* Alder Lake N, E-core only. */
565 0 : case 0x97:
566 0 : case 0x9a:
567 : /* Alder Lake. */
568 0 : case 0xb7:
569 0 : case 0xba:
570 0 : case 0xbf:
571 : /* Raptor Lake. */
572 0 : case 0xaa:
573 0 : case 0xac:
574 : /* Meteor Lake. */
575 0 : cpu = "alderlake";
576 0 : CHECK___builtin_cpu_is ("corei7");
577 0 : CHECK___builtin_cpu_is ("alderlake");
578 0 : cpu_model->__cpu_type = INTEL_COREI7;
579 0 : cpu_model->__cpu_subtype = INTEL_COREI7_ALDERLAKE;
580 0 : break;
581 0 : case 0x8f:
582 : /* Sapphire Rapids. */
583 0 : case 0xcf:
584 : /* Emerald Rapids. */
585 0 : cpu = "sapphirerapids";
586 0 : CHECK___builtin_cpu_is ("corei7");
587 0 : CHECK___builtin_cpu_is ("sapphirerapids");
588 0 : cpu_model->__cpu_type = INTEL_COREI7;
589 0 : cpu_model->__cpu_subtype = INTEL_COREI7_SAPPHIRERAPIDS;
590 0 : break;
591 0 : case 0xaf:
592 : /* Sierra Forest. */
593 0 : cpu = "sierraforest";
594 0 : CHECK___builtin_cpu_is ("sierraforest");
595 0 : cpu_model->__cpu_type = INTEL_SIERRAFOREST;
596 0 : break;
597 0 : case 0xad:
598 : /* Granite Rapids. */
599 0 : cpu = "graniterapids";
600 0 : CHECK___builtin_cpu_is ("corei7");
601 0 : CHECK___builtin_cpu_is ("graniterapids");
602 0 : cpu_model->__cpu_type = INTEL_COREI7;
603 0 : cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS;
604 0 : break;
605 0 : case 0xae:
606 : /* Granite Rapids D. */
607 0 : cpu = "graniterapids-d";
608 0 : CHECK___builtin_cpu_is ("corei7");
609 0 : CHECK___builtin_cpu_is ("graniterapids-d");
610 0 : cpu_model->__cpu_type = INTEL_COREI7;
611 0 : cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS_D;
612 0 : break;
613 0 : case 0xb6:
614 : /* Grand Ridge. */
615 0 : cpu = "grandridge";
616 0 : CHECK___builtin_cpu_is ("grandridge");
617 0 : cpu_model->__cpu_type = INTEL_GRANDRIDGE;
618 0 : break;
619 0 : case 0xb5:
620 0 : case 0xc5:
621 : /* Arrow Lake. */
622 0 : cpu = "arrowlake";
623 0 : CHECK___builtin_cpu_is ("corei7");
624 0 : CHECK___builtin_cpu_is ("arrowlake");
625 0 : cpu_model->__cpu_type = INTEL_COREI7;
626 0 : cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE;
627 0 : break;
628 0 : case 0xc6:
629 : /* Arrow Lake S. */
630 0 : case 0xbd:
631 : /* Lunar Lake. */
632 0 : cpu = "arrowlake-s";
633 0 : CHECK___builtin_cpu_is ("corei7");
634 0 : CHECK___builtin_cpu_is ("arrowlake-s");
635 0 : cpu_model->__cpu_type = INTEL_COREI7;
636 0 : cpu_model->__cpu_subtype = INTEL_COREI7_ARROWLAKE_S;
637 0 : break;
638 0 : case 0xdd:
639 : /* Clearwater Forest. */
640 0 : cpu = "clearwaterforest";
641 0 : CHECK___builtin_cpu_is ("clearwaterforest");
642 0 : cpu_model->__cpu_type = INTEL_CLEARWATERFOREST;
643 0 : break;
644 0 : case 0xcc:
645 : /* Panther Lake. */
646 0 : case 0xd5:
647 : /* Wildcat Lake. */
648 0 : cpu = "pantherlake";
649 0 : CHECK___builtin_cpu_is ("corei7");
650 0 : CHECK___builtin_cpu_is ("pantherlake");
651 0 : cpu_model->__cpu_type = INTEL_COREI7;
652 0 : cpu_model->__cpu_subtype = INTEL_COREI7_PANTHERLAKE;
653 0 : break;
654 : default:
655 : break;
656 : }
657 : /* Parse family and model for family 0x12. */
658 0 : else if (cpu_model2->__cpu_family == 0x12)
659 0 : switch (cpu_model2->__cpu_model)
660 : {
661 0 : case 0x01:
662 0 : case 0x03:
663 : /* Nova Lake. */
664 0 : cpu = "novalake";
665 0 : CHECK___builtin_cpu_is ("corei7");
666 0 : CHECK___builtin_cpu_is ("novalake");
667 0 : cpu_model->__cpu_type = INTEL_COREI7;
668 0 : cpu_model->__cpu_subtype = INTEL_COREI7_NOVALAKE;
669 0 : break;
670 : default:
671 : break;
672 : }
673 : /* Parse family and model for family 0x13. */
674 0 : else if (cpu_model2->__cpu_family == 0x13)
675 0 : switch (cpu_model2->__cpu_model)
676 : {
677 0 : case 0x01:
678 : /* Diamond Rapids. */
679 0 : cpu = "diamondrapids";
680 0 : CHECK___builtin_cpu_is ("corei7");
681 0 : CHECK___builtin_cpu_is ("diamondrapids");
682 0 : cpu_model->__cpu_type = INTEL_COREI7;
683 0 : cpu_model->__cpu_subtype = INTEL_COREI7_DIAMONDRAPIDS;
684 0 : break;
685 : default:
686 : break;
687 : }
688 :
689 0 : return cpu;
690 : }
691 :
692 : /* Get the specific type of ZHAOXIN CPU and return ZHAOXIN CPU name.
693 : Return NULL for unknown ZHAOXIN CPU. */
694 :
695 : static inline const char *
696 0 : get_zhaoxin_cpu (struct __processor_model *cpu_model,
697 : struct __processor_model2 *cpu_model2,
698 : unsigned int *cpu_features2)
699 : {
700 0 : const char *cpu = NULL;
701 0 : unsigned int family = cpu_model2->__cpu_family;
702 0 : unsigned int model = cpu_model2->__cpu_model;
703 :
704 0 : switch (family)
705 : {
706 : /* ZHAOXIN family 7h. */
707 0 : case 0x07:
708 0 : cpu_model->__cpu_type = ZHAOXIN_FAM7H;
709 0 : if (model == 0x3b)
710 : {
711 0 : cpu = "lujiazui";
712 0 : CHECK___builtin_cpu_is ("lujiazui");
713 0 : reset_cpu_feature (cpu_model, cpu_features2, FEATURE_AVX);
714 0 : reset_cpu_feature (cpu_model, cpu_features2, FEATURE_F16C);
715 0 : cpu_model->__cpu_subtype = ZHAOXIN_FAM7H_LUJIAZUI;
716 : }
717 0 : else if (model == 0x5b)
718 : {
719 0 : cpu = "yongfeng";
720 0 : CHECK___builtin_cpu_is ("yongfeng");
721 0 : cpu_model->__cpu_subtype = ZHAOXIN_FAM7H_YONGFENG;
722 : }
723 0 : else if (model >= 0x6b)
724 : {
725 0 : cpu = "shijidadao";
726 0 : CHECK___builtin_cpu_is ("shijidadao");
727 0 : cpu_model->__cpu_subtype = ZHAOXIN_FAM7H_SHIJIDADAO;
728 : }
729 : break;
730 : default:
731 : break;
732 : }
733 :
734 0 : return cpu;
735 : }
736 :
737 : /* ECX and EDX are output of CPUID at level one. */
738 : static inline void
739 1348 : get_available_features (struct __processor_model *cpu_model,
740 : struct __processor_model2 *cpu_model2,
741 : unsigned int *cpu_features2,
742 : unsigned int ecx, unsigned int edx)
743 : {
744 1348 : unsigned int max_cpuid_level = cpu_model2->__cpu_max_level;
745 1348 : unsigned int eax, ebx;
746 1348 : unsigned int ext_level;
747 :
748 : /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */
749 : #define XCR_XFEATURE_ENABLED_MASK 0x0
750 : #define XSTATE_FP 0x1
751 : #define XSTATE_SSE 0x2
752 : #define XSTATE_YMM 0x4
753 : #define XSTATE_OPMASK 0x20
754 : #define XSTATE_ZMM 0x40
755 : #define XSTATE_HI_ZMM 0x80
756 : #define XSTATE_TILECFG 0x20000
757 : #define XSTATE_TILEDATA 0x40000
758 : #define XSTATE_APX_F 0x80000
759 :
760 : #define XCR_AVX_ENABLED_MASK \
761 : (XSTATE_SSE | XSTATE_YMM)
762 : #define XCR_AVX512F_ENABLED_MASK \
763 : (XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | XSTATE_ZMM | XSTATE_HI_ZMM)
764 : #define XCR_AMX_ENABLED_MASK \
765 : (XSTATE_TILECFG | XSTATE_TILEDATA)
766 : #define XCR_APX_F_ENABLED_MASK XSTATE_APX_F
767 :
768 : /* Check if AVX, AVX512 and APX are usable. */
769 1348 : int avx_usable = 0;
770 1348 : int avx512_usable = 0;
771 1348 : int amx_usable = 0;
772 1348 : int apx_usable = 0;
773 : /* Check if KL is usable. */
774 1348 : int has_kl = 0;
775 : /* Record AVX10 version. */
776 1348 : int avx10_set = 0;
777 1348 : int version = 0;
778 1348 : if ((ecx & bit_OSXSAVE))
779 : {
780 : /* Check if XMM, YMM, OPMASK, upper 256 bits of ZMM0-ZMM15 and
781 : ZMM16-ZMM31 states are supported by OSXSAVE. */
782 1348 : unsigned int xcrlow;
783 1348 : unsigned int xcrhigh;
784 1348 : __asm__ (".byte 0x0f, 0x01, 0xd0"
785 : : "=a" (xcrlow), "=d" (xcrhigh)
786 : : "c" (XCR_XFEATURE_ENABLED_MASK));
787 1348 : if ((xcrlow & XCR_AVX_ENABLED_MASK) == XCR_AVX_ENABLED_MASK)
788 : {
789 1348 : avx_usable = 1;
790 1348 : avx512_usable = ((xcrlow & XCR_AVX512F_ENABLED_MASK)
791 1348 : == XCR_AVX512F_ENABLED_MASK);
792 : }
793 1348 : amx_usable = ((xcrlow & XCR_AMX_ENABLED_MASK)
794 1348 : == XCR_AMX_ENABLED_MASK);
795 1348 : apx_usable = ((xcrlow & XCR_APX_F_ENABLED_MASK)
796 1348 : == XCR_APX_F_ENABLED_MASK);
797 : }
798 :
799 : #define set_feature(f) \
800 : set_cpu_feature (cpu_model, cpu_features2, f)
801 :
802 1348 : if (edx & bit_CMOV)
803 1348 : set_feature (FEATURE_CMOV);
804 1348 : if (edx & bit_MMX)
805 1348 : set_feature (FEATURE_MMX);
806 1348 : if (edx & bit_SSE)
807 1348 : set_feature (FEATURE_SSE);
808 1348 : if (edx & bit_SSE2)
809 1348 : set_feature (FEATURE_SSE2);
810 1348 : if (edx & bit_CMPXCHG8B)
811 1348 : set_feature (FEATURE_CMPXCHG8B);
812 1348 : if (edx & bit_FXSAVE)
813 1348 : set_feature (FEATURE_FXSAVE);
814 :
815 1348 : if (ecx & bit_POPCNT)
816 1348 : set_feature (FEATURE_POPCNT);
817 1348 : if (ecx & bit_AES)
818 1348 : set_feature (FEATURE_AES);
819 1348 : if (ecx & bit_PCLMUL)
820 1348 : set_feature (FEATURE_PCLMUL);
821 1348 : if (ecx & bit_SSE3)
822 1348 : set_feature (FEATURE_SSE3);
823 1348 : if (ecx & bit_SSSE3)
824 1348 : set_feature (FEATURE_SSSE3);
825 1348 : if (ecx & bit_SSE4_1)
826 1348 : set_feature (FEATURE_SSE4_1);
827 1348 : if (ecx & bit_SSE4_2)
828 1348 : set_feature (FEATURE_SSE4_2);
829 1348 : if (ecx & bit_OSXSAVE)
830 1348 : set_feature (FEATURE_OSXSAVE);
831 1348 : if (ecx & bit_CMPXCHG16B)
832 1348 : set_feature (FEATURE_CMPXCHG16B);
833 1348 : if (ecx & bit_MOVBE)
834 1348 : set_feature (FEATURE_MOVBE);
835 1348 : if (ecx & bit_AES)
836 1348 : set_feature (FEATURE_AES);
837 1348 : if (ecx & bit_RDRND)
838 1348 : set_feature (FEATURE_RDRND);
839 1348 : if (ecx & bit_XSAVE)
840 1348 : set_feature (FEATURE_XSAVE);
841 1348 : if (avx_usable)
842 : {
843 1348 : if (ecx & bit_AVX)
844 1348 : set_feature (FEATURE_AVX);
845 1348 : if (ecx & bit_FMA)
846 1348 : set_feature (FEATURE_FMA);
847 1348 : if (ecx & bit_F16C)
848 1348 : set_feature (FEATURE_F16C);
849 : }
850 :
851 : /* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */
852 1348 : if (max_cpuid_level >= 7)
853 : {
854 1348 : unsigned int max_subleaf_level;
855 :
856 1348 : __cpuid_count (7, 0, max_subleaf_level, ebx, ecx, edx);
857 1348 : if (ebx & bit_BMI)
858 1348 : set_feature (FEATURE_BMI);
859 1348 : if (ebx & bit_SGX)
860 0 : set_feature (FEATURE_SGX);
861 1348 : if (ebx & bit_HLE)
862 0 : set_feature (FEATURE_HLE);
863 1348 : if (ebx & bit_RTM)
864 0 : set_feature (FEATURE_RTM);
865 1348 : if (avx_usable)
866 : {
867 1348 : if (ebx & bit_AVX2)
868 1348 : set_feature (FEATURE_AVX2);
869 1348 : if (ecx & bit_VPCLMULQDQ)
870 0 : set_feature (FEATURE_VPCLMULQDQ);
871 1348 : if (ecx & bit_VAES)
872 0 : set_feature (FEATURE_VAES);
873 : }
874 1348 : if (ebx & bit_BMI2)
875 1348 : set_feature (FEATURE_BMI2);
876 1348 : if (ebx & bit_FSGSBASE)
877 1348 : set_feature (FEATURE_FSGSBASE);
878 1348 : if (ebx & bit_RDSEED)
879 1348 : set_feature (FEATURE_RDSEED);
880 1348 : if (ebx & bit_ADX)
881 1348 : set_feature (FEATURE_ADX);
882 1348 : if (ebx & bit_SHA)
883 1348 : set_feature (FEATURE_SHA);
884 1348 : if (ebx & bit_CLFLUSHOPT)
885 1348 : set_feature (FEATURE_CLFLUSHOPT);
886 1348 : if (ebx & bit_CLWB)
887 1348 : set_feature (FEATURE_CLWB);
888 : /* NB: bit_OSPKE indicates that OS supports PKU. */
889 1348 : if (ecx & bit_OSPKE)
890 0 : set_feature (FEATURE_PKU);
891 1348 : if (ecx & bit_RDPID)
892 1348 : set_feature (FEATURE_RDPID);
893 1348 : if (ecx & bit_GFNI)
894 0 : set_feature (FEATURE_GFNI);
895 1348 : if (ecx & bit_MOVDIRI)
896 0 : set_feature (FEATURE_MOVDIRI);
897 1348 : if (ecx & bit_MOVDIR64B)
898 0 : set_feature (FEATURE_MOVDIR64B);
899 1348 : if (ecx & bit_ENQCMD)
900 0 : set_feature (FEATURE_ENQCMD);
901 1348 : if (ecx & bit_CLDEMOTE)
902 0 : set_feature (FEATURE_CLDEMOTE);
903 1348 : if (ecx & bit_WAITPKG)
904 0 : set_feature (FEATURE_WAITPKG);
905 1348 : if (ecx & bit_SHSTK)
906 0 : set_feature (FEATURE_SHSTK);
907 1348 : if (ecx & bit_KL)
908 0 : has_kl = 1;
909 1348 : if (edx & bit_SERIALIZE)
910 0 : set_feature (FEATURE_SERIALIZE);
911 1348 : if (edx & bit_TSXLDTRK)
912 0 : set_feature (FEATURE_TSXLDTRK);
913 1348 : if (edx & bit_PCONFIG)
914 0 : set_feature (FEATURE_PCONFIG);
915 1348 : if (edx & bit_IBT)
916 0 : set_feature (FEATURE_IBT);
917 1348 : if (edx & bit_UINTR)
918 0 : set_feature (FEATURE_UINTR);
919 1348 : if (amx_usable)
920 : {
921 0 : if (edx & bit_AMX_TILE)
922 0 : set_feature (FEATURE_AMX_TILE);
923 0 : if (edx & bit_AMX_INT8)
924 0 : set_feature (FEATURE_AMX_INT8);
925 0 : if (edx & bit_AMX_BF16)
926 0 : set_feature (FEATURE_AMX_BF16);
927 : }
928 1348 : if (avx512_usable)
929 : {
930 0 : if (ebx & bit_AVX512F)
931 0 : set_feature (FEATURE_AVX512F);
932 0 : if (ebx & bit_AVX512VL)
933 0 : set_feature (FEATURE_AVX512VL);
934 0 : if (ebx & bit_AVX512BW)
935 0 : set_feature (FEATURE_AVX512BW);
936 0 : if (ebx & bit_AVX512DQ)
937 0 : set_feature (FEATURE_AVX512DQ);
938 0 : if (ebx & bit_AVX512CD)
939 0 : set_feature (FEATURE_AVX512CD);
940 0 : if (ebx & bit_AVX512IFMA)
941 0 : set_feature (FEATURE_AVX512IFMA);
942 0 : if (ecx & bit_AVX512VBMI)
943 0 : set_feature (FEATURE_AVX512VBMI);
944 0 : if (ecx & bit_AVX512VBMI2)
945 0 : set_feature (FEATURE_AVX512VBMI2);
946 0 : if (ecx & bit_AVX512VNNI)
947 0 : set_feature (FEATURE_AVX512VNNI);
948 0 : if (ecx & bit_AVX512BITALG)
949 0 : set_feature (FEATURE_AVX512BITALG);
950 0 : if (ecx & bit_AVX512VPOPCNTDQ)
951 0 : set_feature (FEATURE_AVX512VPOPCNTDQ);
952 0 : if (edx & bit_AVX512VP2INTERSECT)
953 0 : set_feature (FEATURE_AVX512VP2INTERSECT);
954 0 : if (edx & bit_AVX512FP16)
955 0 : set_feature (FEATURE_AVX512FP16);
956 : }
957 :
958 1348 : if (max_subleaf_level >= 1)
959 : {
960 0 : __cpuid_count (7, 1, eax, ebx, ecx, edx);
961 0 : if (eax & bit_HRESET)
962 0 : set_feature (FEATURE_HRESET);
963 0 : if (eax & bit_CMPCCXADD)
964 0 : set_feature(FEATURE_CMPCCXADD);
965 0 : if (edx & bit_PREFETCHI)
966 0 : set_feature (FEATURE_PREFETCHI);
967 0 : if (eax & bit_RAOINT)
968 0 : set_feature (FEATURE_RAOINT);
969 0 : if (edx & bit_USER_MSR)
970 0 : set_feature (FEATURE_USER_MSR);
971 0 : if (eax & bit_MOVRS)
972 0 : set_feature (FEATURE_MOVRS);
973 0 : if (avx_usable)
974 : {
975 0 : if (eax & bit_AVXVNNI)
976 0 : set_feature (FEATURE_AVXVNNI);
977 0 : if (eax & bit_AVXIFMA)
978 0 : set_feature (FEATURE_AVXIFMA);
979 0 : if (edx & bit_AVXVNNIINT8)
980 0 : set_feature (FEATURE_AVXVNNIINT8);
981 0 : if (edx & bit_AVXNECONVERT)
982 0 : set_feature (FEATURE_AVXNECONVERT);
983 0 : if (edx & bit_AVXVNNIINT16)
984 0 : set_feature (FEATURE_AVXVNNIINT16);
985 0 : if (eax & bit_SM3)
986 0 : set_feature (FEATURE_SM3);
987 0 : if (eax & bit_SHA512)
988 0 : set_feature (FEATURE_SHA512);
989 0 : if (eax & bit_SM4)
990 0 : set_feature (FEATURE_SM4);
991 : }
992 0 : if (avx512_usable)
993 : {
994 0 : if (eax & bit_AVX512BF16)
995 0 : set_feature (FEATURE_AVX512BF16);
996 : /* AVX10 has the same XSTATE with AVX512. */
997 0 : if (edx & bit_AVX10)
998 0 : avx10_set = 1;
999 : }
1000 0 : if (amx_usable)
1001 : {
1002 0 : if (eax & bit_AMX_FP16)
1003 0 : set_feature (FEATURE_AMX_FP16);
1004 0 : if (edx & bit_AMX_COMPLEX)
1005 0 : set_feature (FEATURE_AMX_COMPLEX);
1006 : }
1007 0 : if (apx_usable)
1008 : {
1009 0 : if (edx & bit_APX_F)
1010 0 : set_feature (FEATURE_APX_F);
1011 : }
1012 : }
1013 : }
1014 :
1015 : /* Get Advanced Features at level 0xd (eax = 0xd, ecx = 1). */
1016 1348 : if (max_cpuid_level >= 0xd)
1017 : {
1018 1348 : __cpuid_count (0xd, 1, eax, ebx, ecx, edx);
1019 1348 : if (eax & bit_XSAVEOPT)
1020 1348 : set_feature (FEATURE_XSAVEOPT);
1021 1348 : if (eax & bit_XSAVEC)
1022 1348 : set_feature (FEATURE_XSAVEC);
1023 1348 : if (eax & bit_XSAVES)
1024 1348 : set_feature (FEATURE_XSAVES);
1025 : }
1026 :
1027 : /* Get Advanced Features at level 0x14 (eax = 0x14, ecx = 0). */
1028 1348 : if (max_cpuid_level >= 0x14)
1029 : {
1030 0 : __cpuid_count (0x14, 0, eax, ebx, ecx, edx);
1031 0 : if (ebx & bit_PTWRITE)
1032 0 : set_feature (FEATURE_PTWRITE);
1033 : }
1034 :
1035 : /* Get Advanced Features at level 0x19 (eax = 0x19). */
1036 0 : if (max_cpuid_level >= 0x19)
1037 : {
1038 0 : __cpuid (0x19, eax, ebx, ecx, edx);
1039 : /* Check if OS support keylocker. */
1040 0 : if (ebx & bit_AESKLE)
1041 : {
1042 0 : set_feature (FEATURE_AESKLE);
1043 0 : if (ebx & bit_WIDEKL)
1044 0 : set_feature (FEATURE_WIDEKL);
1045 0 : if (has_kl)
1046 0 : set_feature (FEATURE_KL);
1047 : }
1048 : }
1049 :
1050 : /* Get Advanced Features at level 0x1e (eax = 0x1e, ecx = 1). */
1051 0 : if (max_cpuid_level >= 0x1e)
1052 : {
1053 0 : __cpuid_count (0x1e, 1, eax, ebx, ecx, edx);
1054 0 : if (amx_usable)
1055 : {
1056 0 : if (eax & bit_AMX_AVX512)
1057 0 : set_feature (FEATURE_AMX_AVX512);
1058 0 : if (eax & bit_AMX_TF32)
1059 0 : set_feature (FEATURE_AMX_TF32);
1060 0 : if (eax & bit_AMX_FP8)
1061 0 : set_feature (FEATURE_AMX_FP8);
1062 0 : if (eax & bit_AMX_MOVRS)
1063 0 : set_feature (FEATURE_AMX_MOVRS);
1064 : }
1065 : }
1066 :
1067 : /* Get Advanced Features at level 0x21 (eax = 0x21). */
1068 0 : if (max_cpuid_level >= 0x21)
1069 : {
1070 0 : __cpuid (0x21, eax, ebx, ecx, edx);
1071 0 : if (eax & bit_AVX512BMM)
1072 : {
1073 0 : set_feature (FEATURE_AVX512BMM);
1074 : }
1075 : }
1076 :
1077 : /* Get Advanced Features at level 0x24 (eax = 0x24, ecx = 0). */
1078 1348 : if (avx10_set && max_cpuid_level >= 0x24)
1079 : {
1080 0 : __cpuid_count (0x24, 0, eax, ebx, ecx, edx);
1081 0 : version = ebx & 0xff;
1082 0 : switch (version)
1083 : {
1084 0 : case 2:
1085 0 : set_feature (FEATURE_AVX10_2);
1086 : /* Fall through. */
1087 0 : case 1:
1088 0 : set_feature (FEATURE_AVX10_1);
1089 0 : break;
1090 0 : default:
1091 0 : set_feature (FEATURE_AVX10_1);
1092 0 : break;
1093 : }
1094 : }
1095 :
1096 : /* Check cpuid level of extended features. */
1097 1348 : __cpuid (0x80000000, ext_level, ebx, ecx, edx);
1098 :
1099 1348 : cpu_model2->__cpu_ext_level = ext_level;
1100 :
1101 1348 : if (ext_level >= 0x80000001)
1102 : {
1103 1348 : __cpuid (0x80000001, eax, ebx, ecx, edx);
1104 :
1105 1348 : if (ecx & bit_SSE4a)
1106 1348 : set_feature (FEATURE_SSE4_A);
1107 1348 : if (ecx & bit_LAHF_LM)
1108 1348 : set_feature (FEATURE_LAHF_LM);
1109 1348 : if (ecx & bit_ABM)
1110 1348 : set_feature (FEATURE_ABM);
1111 1348 : if (ecx & bit_LWP)
1112 0 : set_feature (FEATURE_LWP);
1113 1348 : if (ecx & bit_TBM)
1114 0 : set_feature (FEATURE_TBM);
1115 1348 : if (ecx & bit_LZCNT)
1116 1348 : set_feature (FEATURE_LZCNT);
1117 1348 : if (ecx & bit_PRFCHW)
1118 1348 : set_feature (FEATURE_PRFCHW);
1119 1348 : if (ecx & bit_MWAITX)
1120 1348 : set_feature (FEATURE_MWAITX);
1121 :
1122 1348 : if (edx & bit_LM)
1123 1348 : set_feature (FEATURE_LM);
1124 1348 : if (edx & bit_3DNOWP)
1125 0 : set_feature (FEATURE_3DNOWP);
1126 1348 : if (edx & bit_3DNOW)
1127 0 : set_feature (FEATURE_3DNOW);
1128 :
1129 1348 : if (avx_usable)
1130 : {
1131 1348 : if (ecx & bit_FMA4)
1132 0 : set_feature (FEATURE_FMA4);
1133 1348 : if (ecx & bit_XOP)
1134 0 : set_feature (FEATURE_XOP);
1135 : }
1136 : }
1137 :
1138 1348 : if (ext_level >= 0x80000008)
1139 : {
1140 1348 : __cpuid (0x80000008, eax, ebx, ecx, edx);
1141 1348 : if (ebx & bit_CLZERO)
1142 1348 : set_feature (FEATURE_CLZERO);
1143 1348 : if (ebx & bit_WBNOINVD)
1144 1348 : set_feature (FEATURE_WBNOINVD);
1145 : }
1146 :
1147 1348 : if (ext_level >= 0x80000021)
1148 : {
1149 0 : __cpuid (0x80000021, eax, ebx, ecx, edx);
1150 0 : if (eax & bit_AMD_PREFETCHI)
1151 : {
1152 0 : set_feature (FEATURE_PREFETCHI);
1153 : }
1154 : }
1155 :
1156 : #undef set_feature
1157 1348 : }
1158 :
1159 : static inline int
1160 1348 : cpu_indicator_init (struct __processor_model *cpu_model,
1161 : struct __processor_model2 *cpu_model2,
1162 : unsigned int *cpu_features2)
1163 : {
1164 1348 : unsigned int eax, ebx, ecx, edx;
1165 :
1166 1348 : int max_level;
1167 1348 : unsigned int vendor;
1168 1348 : unsigned int model, family;
1169 1348 : unsigned int extended_model, extended_family;
1170 :
1171 : /* This function needs to run just once. */
1172 1348 : if (cpu_model->__cpu_vendor)
1173 : return 0;
1174 :
1175 : /* Assume cpuid insn present. Run in level 0 to get vendor id. */
1176 1348 : if (!__get_cpuid (0, &eax, &ebx, &ecx, &edx))
1177 : {
1178 0 : cpu_model->__cpu_vendor = VENDOR_OTHER;
1179 0 : return -1;
1180 : }
1181 :
1182 1348 : vendor = ebx;
1183 1348 : max_level = eax;
1184 :
1185 1348 : if (max_level < 1)
1186 : {
1187 0 : cpu_model->__cpu_vendor = VENDOR_OTHER;
1188 0 : return -1;
1189 : }
1190 :
1191 1348 : if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1192 : {
1193 0 : cpu_model->__cpu_vendor = VENDOR_OTHER;
1194 0 : return -1;
1195 : }
1196 :
1197 1348 : cpu_model2->__cpu_max_level = max_level;
1198 :
1199 1348 : model = (eax >> 4) & 0x0f;
1200 1348 : family = (eax >> 8) & 0x0f;
1201 1348 : extended_model = (eax >> 12) & 0xf0;
1202 1348 : extended_family = (eax >> 20) & 0xff;
1203 :
1204 : /* Find available features. */
1205 1348 : get_available_features (cpu_model, cpu_model2, cpu_features2,
1206 : ecx, edx);
1207 :
1208 1348 : if (vendor == signature_INTEL_ebx)
1209 : {
1210 : /* Adjust model and family for Intel CPUS. */
1211 0 : if (family == 0x0f)
1212 : {
1213 0 : family += extended_family;
1214 0 : model += extended_model;
1215 : }
1216 0 : else if (family == 0x06)
1217 0 : model += extended_model;
1218 :
1219 0 : cpu_model2->__cpu_family = family;
1220 0 : cpu_model2->__cpu_model = model;
1221 :
1222 : /* Get CPU type. */
1223 0 : get_intel_cpu (cpu_model, cpu_model2, cpu_features2);
1224 0 : cpu_model->__cpu_vendor = VENDOR_INTEL;
1225 : }
1226 1348 : else if (vendor == signature_AMD_ebx)
1227 : {
1228 : /* Adjust model and family for AMD CPUS. */
1229 1348 : if (family == 0x0f)
1230 : {
1231 1348 : family += extended_family;
1232 1348 : model += extended_model;
1233 : }
1234 :
1235 1348 : cpu_model2->__cpu_family = family;
1236 1348 : cpu_model2->__cpu_model = model;
1237 :
1238 : /* Get CPU type. */
1239 1348 : get_amd_cpu (cpu_model, cpu_model2, cpu_features2);
1240 1348 : cpu_model->__cpu_vendor = VENDOR_AMD;
1241 : }
1242 0 : else if (vendor == signature_CENTAUR_ebx && family < 0x07)
1243 0 : cpu_model->__cpu_vendor = VENDOR_CENTAUR;
1244 0 : else if (vendor == signature_SHANGHAI_ebx
1245 0 : || vendor == signature_CENTAUR_ebx)
1246 : {
1247 : /* Adjust model and family for ZHAOXIN CPUS. */
1248 0 : if (family == 0x07)
1249 0 : model += extended_model;
1250 :
1251 0 : cpu_model2->__cpu_family = family;
1252 0 : cpu_model2->__cpu_model = model;
1253 :
1254 : /* Get CPU type. */
1255 0 : get_zhaoxin_cpu (cpu_model, cpu_model2, cpu_features2);
1256 0 : cpu_model->__cpu_vendor = VENDOR_ZHAOXIN;
1257 : }
1258 0 : else if (vendor == signature_CYRIX_ebx)
1259 0 : cpu_model->__cpu_vendor = VENDOR_CYRIX;
1260 0 : else if (vendor == signature_NSC_ebx)
1261 0 : cpu_model->__cpu_vendor = VENDOR_NSC;
1262 : else
1263 0 : cpu_model->__cpu_vendor = VENDOR_OTHER;
1264 :
1265 1348 : if (has_cpu_feature (cpu_model, cpu_features2, FEATURE_LM)
1266 1348 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_SSE2))
1267 : {
1268 1348 : CHECK___builtin_cpu_supports ("x86-64");
1269 1348 : set_cpu_feature (cpu_model, cpu_features2,
1270 : FEATURE_X86_64_BASELINE);
1271 1348 : if (has_cpu_feature (cpu_model, cpu_features2, FEATURE_CMPXCHG16B)
1272 1348 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_POPCNT)
1273 1348 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_LAHF_LM)
1274 2696 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_SSE4_2))
1275 : {
1276 1348 : CHECK___builtin_cpu_supports ("x86-64-v2");
1277 1348 : set_cpu_feature (cpu_model, cpu_features2,
1278 : FEATURE_X86_64_V2);
1279 1348 : if (has_cpu_feature (cpu_model, cpu_features2, FEATURE_AVX2)
1280 1348 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_BMI)
1281 1348 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_BMI2)
1282 1348 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_F16C)
1283 1348 : && has_cpu_feature (cpu_model, cpu_features2, FEATURE_FMA)
1284 1348 : && has_cpu_feature (cpu_model, cpu_features2,
1285 : FEATURE_LZCNT)
1286 2696 : && has_cpu_feature (cpu_model, cpu_features2,
1287 : FEATURE_MOVBE))
1288 : {
1289 1348 : CHECK___builtin_cpu_supports ("x86-64-v3");
1290 1348 : set_cpu_feature (cpu_model, cpu_features2,
1291 : FEATURE_X86_64_V3);
1292 1348 : if (has_cpu_feature (cpu_model, cpu_features2,
1293 : FEATURE_AVX512BW)
1294 0 : && has_cpu_feature (cpu_model, cpu_features2,
1295 : FEATURE_AVX512CD)
1296 0 : && has_cpu_feature (cpu_model, cpu_features2,
1297 : FEATURE_AVX512DQ)
1298 1348 : && has_cpu_feature (cpu_model, cpu_features2,
1299 : FEATURE_AVX512VL))
1300 : {
1301 0 : CHECK___builtin_cpu_supports ("x86-64-v4");
1302 0 : set_cpu_feature (cpu_model, cpu_features2,
1303 : FEATURE_X86_64_V4);
1304 : }
1305 : }
1306 : }
1307 : }
1308 :
1309 1348 : gcc_assert (cpu_model->__cpu_vendor < VENDOR_MAX);
1310 1348 : gcc_assert (cpu_model->__cpu_type < CPU_TYPE_MAX);
1311 1348 : gcc_assert (cpu_model->__cpu_subtype < CPU_SUBTYPE_MAX);
1312 :
1313 : return 0;
1314 : }
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