Line data Source code
1 : ;; Copyright (C) 2026 Free Software Foundation, Inc.
2 : ;;
3 : ;; This file is part of GCC.
4 : ;;
5 : ;; GCC is free software; you can redistribute it and/or modify
6 : ;; it under the terms of the GNU General Public License as published by
7 : ;; the Free Software Foundation; either version 3, or (at your option)
8 : ;; any later version.
9 : ;;
10 : ;; GCC is distributed in the hope that it will be useful,
11 : ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
12 : ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 : ;; GNU General Public License for more details.
14 : ;;
15 : ;; You should have received a copy of the GNU General Public License
16 : ;; along with GCC; see the file COPYING3. If not see
17 : ;; <http://www.gnu.org/licenses/>.
18 : ;;
19 :
20 : ;; HYGON c86-4g-m7/m8 Scheduling
21 : ;; Modeling automatons for decoders, integer execution pipes,
22 : ;; AGU pipes, branch, floating point execution, fp store units,
23 : ;; integer and floating point dividers. Split fpu1 and fpu3
24 : ;; into their own automata to keep these units independent
25 : ;; without increasing the main c86_4g_m7_fpu state space.
26 : (define_automaton "c86_4g_m7, c86_4g_m7_ieu, c86_4g_m7_agu, c86_4g_m7_fpu02, c86_4g_m7_fpu13, c86_4g_m7_idiv, c86_4g_m7_fdiv")
27 :
28 : ;; Decoders unit has 4 decoders and all of them can decode fast path
29 : ;; and vector type instructions.
30 : (define_cpu_unit "c86-4g-m7-decode0" "c86_4g_m7")
31 : (define_cpu_unit "c86-4g-m7-decode1" "c86_4g_m7")
32 : (define_cpu_unit "c86-4g-m7-decode2" "c86_4g_m7")
33 : (define_cpu_unit "c86-4g-m7-decode3" "c86_4g_m7")
34 :
35 : ;; Currently blocking all decoders for vector path instructions as
36 : ;; they are dispatched separately as microcode sequence.
37 : (define_reservation "c86-4g-m7-vector" "c86-4g-m7-decode0+c86-4g-m7-decode1+c86-4g-m7-decode2+c86-4g-m7-decode3")
38 :
39 : ;; Direct instructions can be issued to any of the four decoders.
40 : (define_reservation "c86-4g-m7-direct" "c86-4g-m7-decode0|c86-4g-m7-decode1|c86-4g-m7-decode2|c86-4g-m7-decode3")
41 :
42 : ;; Fix me: Need to revisit this later to simulate fast path double behavior.
43 : (define_reservation "c86-4g-m7-double" "c86-4g-m7-direct")
44 :
45 : ;; Integer unit 4 ALU pipes.
46 : (define_cpu_unit "c86-4g-m7-ieu0" "c86_4g_m7_ieu")
47 : (define_cpu_unit "c86-4g-m7-ieu1" "c86_4g_m7_ieu")
48 : (define_cpu_unit "c86-4g-m7-ieu2" "c86_4g_m7_ieu")
49 : (define_cpu_unit "c86-4g-m7-ieu3" "c86_4g_m7_ieu")
50 :
51 : ;; One separated integer divider.
52 : (define_cpu_unit "c86-4g-m7-idiv" "c86_4g_m7_idiv")
53 :
54 : ;; c86-4g-m7 has an additional branch unit.
55 : (define_cpu_unit "c86-4g-m7-bru0" "c86_4g_m7_ieu")
56 : (define_reservation "c86-4g-m7-ieu" "c86-4g-m7-ieu0|c86-4g-m7-ieu1|c86-4g-m7-ieu2|c86-4g-m7-ieu3")
57 :
58 : ;; 3 AGU pipes in c86-4g-m7
59 : (define_cpu_unit "c86-4g-m7-agu0" "c86_4g_m7_agu")
60 : (define_cpu_unit "c86-4g-m7-agu1" "c86_4g_m7_agu")
61 : (define_cpu_unit "c86-4g-m7-agu2" "c86_4g_m7_agu")
62 : (define_reservation "c86-4g-m7-agu-reserve" "c86-4g-m7-agu0|c86-4g-m7-agu1|c86-4g-m7-agu2")
63 :
64 : ;; Load is 4 cycles. We do not model reservation of load unit.
65 : (define_reservation "c86-4g-m7-load" "c86-4g-m7-agu-reserve")
66 : (define_reservation "c86-4g-m7-store" "c86-4g-m7-agu-reserve")
67 :
68 : ;; vectorpath (microcoded) instructions are single issue instructions.
69 : ;; So, they occupy all the integer units.
70 : (define_reservation "c86-4g-m7-ivector" "c86-4g-m7-ieu0+c86-4g-m7-ieu1
71 : +c86-4g-m7-ieu2+c86-4g-m7-ieu3+c86-4g-m7-bru0
72 : +c86-4g-m7-agu0+c86-4g-m7-agu1+c86-4g-m7-agu2")
73 :
74 : ;; Floating point unit 4 FP pipes.
75 : (define_cpu_unit "c86-4g-m7-fpu0" "c86_4g_m7_fpu02")
76 : (define_cpu_unit "c86-4g-m7-fpu1" "c86_4g_m7_fpu13")
77 : (define_cpu_unit "c86-4g-m7-fpu2" "c86_4g_m7_fpu02")
78 : (define_cpu_unit "c86-4g-m7-fpu3" "c86_4g_m7_fpu13")
79 :
80 : (define_reservation "c86-4g-m7-fpu" "c86-4g-m7-fpu0|c86-4g-m7-fpu1|c86-4g-m7-fpu2|c86-4g-m7-fpu3")
81 : (define_reservation "c86-4g-m7-fpu_0_1" "c86-4g-m7-fpu0|c86-4g-m7-fpu1")
82 : (define_reservation "c86-4g-m7-fpu_0_2" "c86-4g-m7-fpu0|c86-4g-m7-fpu2")
83 : (define_reservation "c86-4g-m7-fpu_0_2x2" "c86-4g-m7-fpu0*2|c86-4g-m7-fpu2*2")
84 : (define_reservation "c86-4g-m7-fpu_0_2x4" "c86-4g-m7-fpu0*4|c86-4g-m7-fpu2*4")
85 : (define_reservation "c86-4g-m7-fpu_0_3" "c86-4g-m7-fpu0|c86-4g-m7-fpu3")
86 : (define_reservation "c86-4g-m7-fpu_1_3" "c86-4g-m7-fpu1|c86-4g-m7-fpu3")
87 : (define_reservation "c86-4g-m7-fpu_1_3x2" "c86-4g-m7-fpu1*2|c86-4g-m7-fpu3*2")
88 : (define_reservation "c86-4g-m7-fpu_1_3x3" "c86-4g-m7-fpu1*3|c86-4g-m7-fpu3*3")
89 : (define_reservation "c86-4g-m7-fpu_1_3x6" "c86-4g-m7-fpu1*6|c86-4g-m7-fpu3*6")
90 : (define_reservation "c86-4g-m7-fpux2" "c86-4g-m7-fpu0*2|c86-4g-m7-fpu1*2|c86-4g-m7-fpu2*2|c86-4g-m7-fpu3*2")
91 : (define_reservation "c86-4g-m7-fpux4" "c86-4g-m7-fpu0*4|c86-4g-m7-fpu1*4|c86-4g-m7-fpu2*4|c86-4g-m7-fpu3*4")
92 : (define_reservation "c86-4g-m7-fpux8" "c86-4g-m7-fpu0*8|c86-4g-m7-fpu1*8|c86-4g-m7-fpu2*8|c86-4g-m7-fpu3*8")
93 : (define_reservation "c86-4g-m7-fpux6" "c86-4g-m7-fpu0*6|c86-4g-m7-fpu1*6|c86-4g-m7-fpu2*6|c86-4g-m7-fpu3*6")
94 : (define_reservation "c86-4g-m7-fpux16" "c86-4g-m7-fpu0*16|c86-4g-m7-fpu1*16|c86-4g-m7-fpu2*16|c86-4g-m7-fpu3*16")
95 : (define_reservation "c86-4g-m7-fvector" "c86-4g-m7-fpu0+c86-4g-m7-fpu1
96 : +c86-4g-m7-fpu2+c86-4g-m7-fpu3
97 : +c86-4g-m7-agu0+c86-4g-m7-agu1+c86-4g-m7-agu2")
98 :
99 : ;; Two FP dividers.
100 : (define_cpu_unit "c86-4g-m7-fdiv1" "c86_4g_m7_fdiv")
101 : (define_cpu_unit "c86-4g-m7-fdiv3" "c86_4g_m7_fdiv")
102 :
103 : (define_reservation "c86-4g-m7-fp1fdiv1x4" "(c86-4g-m7-fpu1+c86-4g-m7-fdiv1)*4")
104 : (define_reservation "c86-4g-m7-fp3fdiv3x4" "(c86-4g-m7-fpu3+c86-4g-m7-fdiv3)*4")
105 : (define_reservation "c86-4g-m7-fdiv13" "(c86-4g-m7-fdiv1+c86-4g-m7-fdiv3)")
106 : (define_reservation "c86-4g-m7-fp13div13" "(c86-4g-m7-fpu1+c86-4g-m7-fpu3+c86-4g-m7-fdiv1+c86-4g-m7-fdiv3)")
107 : (define_reservation "c86-4g-m7-fp13div13x4" "c86-4g-m7-fp13div13*4")
108 : (define_reservation "c86-4g-m7-fp1div1_fp3div3_x4x8" "(c86-4g-m7-fp1fdiv1x4,c86-4g-m7-fdiv1*8)|(c86-4g-m7-fp3fdiv3x4,c86-4g-m7-fdiv3*8)")
109 : (define_reservation "c86-4g-m7-fp1div1_fp3div3_x4x9" "(c86-4g-m7-fp1fdiv1x4,c86-4g-m7-fdiv1*9)|(c86-4g-m7-fp3fdiv3x4,c86-4g-m7-fdiv3*9)")
110 : (define_reservation "c86-4g-m7-fp1div1_fp3div3_x4x11" "(c86-4g-m7-fp1fdiv1x4,c86-4g-m7-fdiv1*11)|(c86-4g-m7-fp3fdiv3x4,c86-4g-m7-fdiv3*11)")
111 : (define_reservation "c86-4g-m7-fp1div1_fp3div3_x4x15" "(c86-4g-m7-fp1fdiv1x4,c86-4g-m7-fdiv1*15)|(c86-4g-m7-fp3fdiv3x4,c86-4g-m7-fdiv3*15)")
112 : (define_reservation "c86-4g-m7-fp1div1_fp3div3_x4x18" "(c86-4g-m7-fp1fdiv1x4,c86-4g-m7-fdiv1*18)|(c86-4g-m7-fp3fdiv3x4,c86-4g-m7-fdiv3*18)")
113 :
114 : ;; IMOV/IMOVX
115 :
116 : ;; Some reservations keep the historical "m7" naming, while their CPU
117 : ;; attributes include both m7 and m8.
118 : (define_insn_reservation "c86_4g_m7_imov_xchg" 1
119 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
120 : (and (eq_attr "type" "imov")
121 : (and (eq_attr "c86_decode" "vector")
122 : (eq_attr "memory" "none"))))
123 : "c86-4g-m7-vector")
124 :
125 : (define_insn_reservation "c86_4g_m7_imov_xchg_load" 5
126 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
127 : (and (eq_attr "type" "imov")
128 : (and (eq_attr "c86_decode" "vector")
129 : (eq_attr "memory" "!none"))))
130 : "c86-4g-m7-vector,c86-4g-m7-load")
131 :
132 : (define_insn_reservation "c86_4g_m7_imovx_cwde" 2
133 : (and (eq_attr "cpu" "c86_4g_m7")
134 : (and (eq_attr "type" "imovx")
135 : (and (eq_attr "c86_decode" "double")
136 : (eq_attr "memory" "none"))))
137 : "c86-4g-m7-direct,c86-4g-m7-ieu")
138 :
139 : (define_insn_reservation "c86_4g_m8_imovx_cwde" 1
140 : (and (eq_attr "cpu" "c86_4g_m8")
141 : (and (eq_attr "type" "imovx")
142 : (and (eq_attr "c86_decode" "double")
143 : (eq_attr "memory" "none"))))
144 : "c86-4g-m7-direct,c86-4g-m7-ieu")
145 :
146 : (define_insn_reservation "c86_4g_m7_imov" 1
147 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
148 : (and (eq_attr "type" "imov,imovx")
149 : (and (eq_attr "c86_decode" "direct")
150 : (eq_attr "memory" "none"))))
151 : "c86-4g-m7-direct,c86-4g-m7-ieu")
152 :
153 : (define_insn_reservation "c86_4g_m7_imov_load" 5
154 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
155 : (and (eq_attr "type" "imov,imovx")
156 : (and (eq_attr "c86_decode" "!vector")
157 : (eq_attr "memory" "load"))))
158 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-ieu")
159 :
160 : (define_insn_reservation "c86_4g_m7_imov_store" 1
161 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
162 : (and (eq_attr "type" "imov,imovx")
163 : (and (eq_attr "c86_decode" "!vector")
164 : (eq_attr "memory" "store"))))
165 : "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-ieu")
166 :
167 : ;; PUSH
168 : (define_insn_reservation "c86_4g_m7_push" 1
169 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
170 : (and (eq_attr "type" "push,sse")
171 : (eq_attr "memory" "store")))
172 : "c86-4g-m7-direct,c86-4g-m7-store")
173 :
174 : (define_insn_reservation "c86_4g_m7_push_mem" 5
175 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
176 : (and (eq_attr "type" "push")
177 : (eq_attr "memory" "both")))
178 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-store")
179 :
180 : ;; POP
181 : (define_insn_reservation "c86_4g_m7_pop" 4
182 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
183 : (and (eq_attr "type" "pop")
184 : (eq_attr "memory" "load")))
185 : "c86-4g-m7-direct,c86-4g-m7-load")
186 :
187 : (define_insn_reservation "c86_4g_m7_pop_mem" 5
188 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
189 : (and (eq_attr "type" "pop")
190 : (eq_attr "memory" "both")))
191 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store")
192 :
193 : ;; IMUL/IMULX
194 : (define_insn_reservation "c86_4g_m7_imul" 3
195 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
196 : (and (eq_attr "type" "imul,imulx")
197 : (eq_attr "memory" "none")))
198 : "c86-4g-m7-direct,c86-4g-m7-ieu1")
199 :
200 : (define_insn_reservation "c86_4g_m7_imul_load" 7
201 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
202 : (and (eq_attr "type" "imul")
203 : (eq_attr "memory" "!none")))
204 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-ieu1")
205 :
206 : ;; IDIV
207 : (define_insn_reservation "c86_4g_m7_idiv" 7
208 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
209 : (and (eq_attr "type" "idiv")
210 : (and (eq_attr "mode" "!QI")
211 : (eq_attr "memory" "none"))))
212 : "c86-4g-m7-double,c86-4g-m7-ieu3,c86-4g-m7-idiv*7")
213 :
214 : (define_insn_reservation "c86_4g_m7_idiv_QI" 6
215 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
216 : (and (eq_attr "type" "idiv")
217 : (and (eq_attr "mode" "QI")
218 : (eq_attr "memory" "none"))))
219 : "c86-4g-m7-double,c86-4g-m7-ieu3,c86-4g-m7-idiv*6")
220 :
221 : (define_insn_reservation "c86_4g_m7_idiv_load" 11
222 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
223 : (and (eq_attr "type" "idiv")
224 : (and (eq_attr "mode" "!QI")
225 : (eq_attr "memory" "load"))))
226 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-ieu3,c86-4g-m7-idiv*7")
227 :
228 : (define_insn_reservation "c86_4g_m7_idiv_QI_load" 10
229 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
230 : (and (eq_attr "type" "idiv")
231 : (and (eq_attr "mode" "QI")
232 : (eq_attr "memory" "load"))))
233 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-ieu3,c86-4g-m7-idiv*6")
234 :
235 : ;; Integer/general Instructions
236 : (define_insn_reservation "c86_4g_m7_insn" 1
237 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
238 : (and (eq_attr "type" "alu,negnot,rotate1,ishift1,test,incdec,icmp,
239 : rotate,rotatex,ishift,ishiftx,icmov")
240 : (eq_attr "memory" "none,unknown")))
241 : "c86-4g-m7-direct,c86-4g-m7-ieu")
242 :
243 : (define_insn_reservation "c86_4g_m7_insn_load" 5
244 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
245 : (and (eq_attr "type" "alu,incdec,icmp,test,ishift,
246 : ishiftx,icmov,rotate,rotatex")
247 : (eq_attr "memory" "load")))
248 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-ieu")
249 :
250 : (define_insn_reservation "c86_4g_m7_insn_store" 1
251 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
252 : (and (eq_attr "type" "ishift1,rotate1,rotate,incdec,
253 : alu,icmov,ishift,negnot,alu1")
254 : (eq_attr "memory" "store")))
255 : "c86-4g-m7-direct,c86-4g-m7-ieu,c86-4g-m7-store")
256 :
257 : (define_insn_reservation "c86_4g_m7_insn2_store" 5
258 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
259 : (and (eq_attr "type" "icmp")
260 : (eq_attr "memory" "store")))
261 : "c86-4g-m7-direct,c86-4g-m7-ieu,c86-4g-m7-store")
262 :
263 : (define_insn_reservation "c86_4g_m7_insn_both" 5
264 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
265 : (and (eq_attr "type" "alu,negnot,rotate1,ishift1,incdec,rotate,
266 : rotatex,ishift,ishiftx,icmov")
267 : (eq_attr "memory" "both")))
268 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-ieu,c86-4g-m7-store")
269 :
270 : (define_insn_reservation "c86_4g_m7_setcc" 1
271 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
272 : (and (eq_attr "type" "setcc")
273 : (eq_attr "memory" "none,unknown")))
274 : "c86-4g-m7-direct,c86-4g-m7-ieu0|c86-4g-m7-ieu3")
275 :
276 : (define_insn_reservation "c86_4g_m7_setcc_load" 5
277 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
278 : (and (eq_attr "type" "setcc")
279 : (eq_attr "memory" "load")))
280 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-ieu0|c86-4g-m7-ieu3")
281 :
282 : (define_insn_reservation "c86_4g_m7_setcc_store" 1
283 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
284 : (and (eq_attr "type" "setcc")
285 : (eq_attr "memory" "store")))
286 : "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-ieu0|c86-4g-m7-ieu3")
287 :
288 : ;; ALU1
289 : (define_insn_reservation "c86_4g_m7_alu1_double" 2
290 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
291 : (and (eq_attr "type" "alu1")
292 : (and (eq_attr "c86_decode" "double")
293 : (eq_attr "memory" "none,unknown"))))
294 : "c86-4g-m7-double,c86-4g-m7-ieu")
295 :
296 : (define_insn_reservation "c86_4g_m7_alu1_double_load" 6
297 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
298 : (and (eq_attr "type" "alu1")
299 : (and (eq_attr "c86_decode" "double")
300 : (eq_attr "memory" "both"))))
301 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-ieu")
302 :
303 : (define_insn_reservation "c86_4g_m7_alu1_vector" 3
304 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
305 : (and (eq_attr "type" "alu1")
306 : (and (eq_attr "c86_decode" "vector")
307 : (eq_attr "memory" "none,unknown"))))
308 : "c86-4g-m7-vector,c86-4g-m7-ivector*3")
309 :
310 : (define_insn_reservation "c86_4g_m7_alu1_vector_load" 7
311 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
312 : (and (eq_attr "type" "alu1")
313 : (and (eq_attr "c86_decode" "vector")
314 : (eq_attr "memory" "both"))))
315 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-ivector*3")
316 :
317 : (define_insn_reservation "c86_4g_m7_alu1_direct" 1
318 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
319 : (and (eq_attr "type" "alu1")
320 : (and (eq_attr "c86_decode" "direct")
321 : (eq_attr "memory" "none,unknown"))))
322 : "c86-4g-m7-direct,c86-4g-m7-ieu")
323 :
324 : (define_insn_reservation "c86_4g_m7_alu1_direct_load" 5
325 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
326 : (and (eq_attr "type" "alu1")
327 : (and (eq_attr "c86_decode" "direct")
328 : (eq_attr "memory" "both"))))
329 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-ieu")
330 :
331 : ;; CALL/CALLV
332 : (define_insn_reservation "c86_4g_m7_call" 1
333 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
334 : (eq_attr "type" "call,callv"))
335 : "c86-4g-m7-double,c86-4g-m7-store,c86-4g-m7-bru0")
336 :
337 : ;; IBR
338 : (define_insn_reservation "c86_4g_m7_branch" 1
339 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
340 : (and (eq_attr "type" "ibr")
341 : (eq_attr "memory" "none")))
342 : "c86-4g-m7-direct,c86-4g-m7-bru0")
343 :
344 : (define_insn_reservation "c86_4g_m7_branch_load" 5
345 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
346 : (and (eq_attr "type" "ibr")
347 : (eq_attr "memory" "load")))
348 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-bru0")
349 :
350 : ;; LEA
351 : (define_insn_reservation "c86_4g_m7_lea" 1
352 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
353 : (eq_attr "type" "lea"))
354 : "c86-4g-m7-direct,c86-4g-m7-ieu")
355 :
356 : ;; LEAVE
357 : (define_insn_reservation "c86_4g_m7_leave" 1
358 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
359 : (eq_attr "type" "leave"))
360 : "c86-4g-m7-double,c86-4g-m7-ieu,c86-4g-m7-store")
361 :
362 : ;; STR
363 : (define_insn_reservation "c86_4g_m7_str" 3
364 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
365 : (and (eq_attr "type" "str")
366 : (eq_attr "memory" "none")))
367 : "c86-4g-m7-vector,c86-4g-m7-ivector*3")
368 :
369 : (define_insn_reservation "c86_4g_m7_str_load" 7
370 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
371 : (and (eq_attr "type" "str")
372 : (eq_attr "memory" "load")))
373 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-ivector*3")
374 :
375 :
376 : (define_insn_reservation "c86_4g_m7_ieu_vector" 5
377 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
378 : (and (eq_attr "type" "other,multi")
379 : (and (eq_attr "unit" "!i387")
380 : (eq_attr "memory" "none,unknown"))))
381 : "c86-4g-m7-vector,c86-4g-m7-ivector*5")
382 :
383 : (define_insn_reservation "c86_4g_m7_ieu_vector_load" 9
384 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
385 : (and (eq_attr "type" "other,multi")
386 : (and (eq_attr "unit" "!i387")
387 : (eq_attr "memory" "load"))))
388 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-ivector*5")
389 :
390 : ;; SSEINS
391 : (define_insn_reservation "c86_4g_m7_sse_insertimm" 3
392 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
393 : (and (eq_attr "type" "sseins")
394 : (and (eq_attr "memory" "none")
395 : (eq_attr "length_immediate" "2"))))
396 : "c86-4g-m7-double,c86-4g-m7-fpu_0_3,c86-4g-m7-fpu1")
397 :
398 : (define_insn_reservation "c86_4g_m7_sse_insert" 3
399 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
400 : (and (eq_attr "type" "sseins")
401 : (and (eq_attr "memory" "none")
402 : (eq_attr "length_immediate" "!2"))))
403 : "c86-4g-m7-direct,c86-4g-m7-fpu1*2")
404 :
405 : ;; FCMOV
406 : (define_insn_reservation "c86_4g_m7_fp_cmov" 4
407 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
408 : (eq_attr "type" "fcmov"))
409 : "c86-4g-m7-vector,c86-4g-m7-fvector*3")
410 :
411 : ;; FLD
412 : (define_insn_reservation "c86_4g_m7_fp_mov_direct_load" 8
413 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
414 : (and (eq_attr "c86_decode" "direct")
415 : (and (eq_attr "type" "fmov")
416 : (eq_attr "memory" "load"))))
417 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu1")
418 :
419 : ;; FST
420 : (define_insn_reservation "c86_4g_m7_fp_mov_direct_store" 8
421 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
422 : (and (eq_attr "c86_decode" "direct")
423 : (and (eq_attr "type" "fmov")
424 : (eq_attr "memory" "store"))))
425 : "c86-4g-m7-direct,c86-4g-m7-fpu1,c86-4g-m7-store")
426 :
427 : ;; FILD
428 : (define_insn_reservation "c86_4g_m7_fp_mov_double_load" 11
429 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
430 : (and (eq_attr "c86_decode" "double")
431 : (and (eq_attr "type" "fmov")
432 : (eq_attr "memory" "load"))))
433 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu1")
434 :
435 : ;; FIST
436 : (define_insn_reservation "c86_4g_m7_fp_mov_double_store" 8
437 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
438 : (and (eq_attr "c86_decode" "double")
439 : (and (eq_attr "type" "fmov")
440 : (eq_attr "memory" "store"))))
441 : "c86-4g-m7-double,c86-4g-m7-fpu1,c86-4g-m7-store")
442 :
443 : (define_insn_reservation "c86_4g_m7_fp_mov_direct" 1
444 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
445 : (and (eq_attr "c86_decode" "direct")
446 : (and (eq_attr "type" "fmov")
447 : (eq_attr "memory" "none"))))
448 : "c86-4g-m7-direct,c86-4g-m7-fpu1")
449 :
450 : ;; FSQRT
451 : (define_insn_reservation "c86_4g_m7_fp_sqrt" 22
452 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
453 : (and (eq_attr "type" "fpspc")
454 : (eq_attr "c86_attr" "sqrt")))
455 : "c86-4g-m7-direct,c86-4g-m7-fp1div1_fp3div3_x4x18")
456 :
457 : ;; FPSPC
458 : (define_insn_reservation "c86_4g_m7_fp_spc_direct" 5
459 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
460 : (and (eq_attr "type" "fpspc")
461 : (and (eq_attr "c86_decode" "direct")
462 : (and (eq_attr "c86_attr" "other")
463 : (eq_attr "memory" "store")))))
464 : "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-fpu3")
465 :
466 : (define_insn_reservation "c86_4g_m7_fp_spc" 6
467 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
468 : (and (eq_attr "type" "fpspc")
469 : (and (eq_attr "c86_attr" "other")
470 : (eq_attr "memory" "none"))))
471 : "c86-4g-m7-vector,c86-4g-m7-fvector*6")
472 :
473 : (define_insn_reservation "c86_4g_m7_fp_op_mul" 5
474 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
475 : (and (eq_attr "type" "fop,fmul")
476 : (eq_attr "memory" "none")))
477 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
478 :
479 : (define_insn_reservation "c86_4g_m7_fp_op_mul_load" 12
480 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
481 : (and (eq_attr "type" "fop,fmul")
482 : (and (eq_attr "fp_int_src" "false")
483 : (eq_attr "memory" "load"))))
484 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
485 :
486 : (define_insn_reservation "c86_4g_m7_fp_op_imul_load" 16
487 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
488 : (and (eq_attr "type" "fmul")
489 : (and (eq_attr "fp_int_src" "true")
490 : (eq_attr "memory" "!none"))))
491 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu0,c86-4g-m7-fpu_0_2")
492 :
493 : ;; FDIV
494 : (define_insn_reservation "c86_4g_m7_fp_div" 15
495 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
496 : (and (eq_attr "type" "fdiv")
497 : (eq_attr "memory" "none")))
498 : "c86-4g-m7-direct,c86-4g-m7-fp1div1_fp3div3_x4x11")
499 :
500 : (define_insn_reservation "c86_4g_m7_fp_div_load" 22
501 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
502 : (and (eq_attr "type" "fdiv")
503 : (and (eq_attr "fp_int_src" "false")
504 : (eq_attr "memory" "!none"))))
505 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp1div1_fp3div3_x4x11")
506 :
507 : (define_insn_reservation "c86_4g_m7_fp_idiv_load" 26
508 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
509 : (and (eq_attr "type" "fdiv")
510 : (and (eq_attr "fp_int_src" "true")
511 : (eq_attr "memory" "!none"))))
512 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu1*4,c86-4g-m7-fp1div1_fp3div3_x4x11")
513 :
514 : (define_insn_reservation "c86_4g_m7_fp_fsgn" 1
515 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
516 : (eq_attr "type" "fsgn"))
517 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
518 :
519 : ;; FCMP
520 : (define_insn_reservation "c86_4g_m7_fp_fcmp" 5
521 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
522 : (and (eq_attr "type" "fcmp")
523 : (eq_attr "memory" "none")))
524 : "c86-4g-m7-double,c86-4g-m7-fpu0,c86-4g-m7-fpu1")
525 :
526 : (define_insn_reservation "c86_4g_m7_fp_fcmp_load" 12
527 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
528 : (and (eq_attr "type" "fcmp")
529 : (eq_attr "memory" "load")))
530 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu0,c86-4g-m7-fpu1")
531 :
532 : ;; MMX
533 : (define_insn_reservation "c86_4g_m7_fp_mmx" 1
534 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
535 : (eq_attr "type" "mmx"))
536 : "c86-4g-m7-direct")
537 :
538 : (define_insn_reservation "c86_4g_m7_mmx_add_cmp" 1
539 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
540 : (and (eq_attr "type" "mmxadd,mmxcmp")
541 : (eq_attr "memory" "none")))
542 : "c86-4g-m7-direct,c86-4g-m7-fpu")
543 :
544 : (define_insn_reservation "c86_4g_m7_mmx_add_cmp_load" 8
545 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
546 : (and (eq_attr "type" "mmxadd,mmxcmp")
547 : (eq_attr "memory" "load")))
548 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
549 :
550 : (define_insn_reservation "c86_4g_m7_mmx_cvt" 1
551 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
552 : (and (eq_attr "type" "mmxcvt")
553 : (and (eq_attr "c86_attr" "other")
554 : (eq_attr "memory" "none"))))
555 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_1")
556 :
557 : (define_insn_reservation "c86_4g_m7_mmx_cvt_load" 8
558 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
559 : (and (eq_attr "type" "mmxcvt")
560 : (and (eq_attr "c86_attr" "other")
561 : (eq_attr "memory" "load"))))
562 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1")
563 :
564 : (define_insn_reservation "c86_4g_m7_mmx_shift" 1
565 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
566 : (and (eq_attr "type" "mmxshft")
567 : (and (eq_attr "c86_attr" "other")
568 : (eq_attr "memory" "none"))))
569 : "c86-4g-m7-direct,c86-4g-m7-fpu1")
570 :
571 : (define_insn_reservation "c86_4g_m7_mmx_shift_load" 8
572 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
573 : (and (eq_attr "type" "mmxshft")
574 : (and (eq_attr "c86_attr" "other")
575 : (eq_attr "memory" "load"))))
576 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu1")
577 :
578 : (define_insn_reservation "c86_4g_m7_mmx_shift_avg" 1
579 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
580 : (and (eq_attr "type" "mmxshft")
581 : (and (eq_attr "c86_attr" "avg")
582 : (eq_attr "memory" "none"))))
583 : "c86-4g-m7-direct,c86-4g-m7-fpu")
584 :
585 : (define_insn_reservation "c86_4g_m7_mmx_shift_avg_load" 8
586 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
587 : (and (eq_attr "type" "mmxshft")
588 : (and (eq_attr "c86_attr" "avg")
589 : (eq_attr "memory" "load"))))
590 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
591 :
592 : ;; SADBW
593 : (define_insn_reservation "c86_4g_m7_mmx_shift_sadbw" 3
594 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
595 : (and (eq_attr "type" "mmxshft")
596 : (and (eq_attr "c86_attr" "sadbw")
597 : (eq_attr "memory" "none"))))
598 : "c86-4g-m7-direct,c86-4g-m7-fpu0")
599 :
600 : (define_insn_reservation "c86_4g_m7_mmx_shift_sadbw_load" 10
601 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
602 : (and (eq_attr "type" "mmxshft")
603 : (and (eq_attr "c86_attr" "sadbw")
604 : (eq_attr "memory" "load"))))
605 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0")
606 :
607 : (define_insn_reservation "c86_4g_m7_mmx_mov" 4
608 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
609 : (and (eq_attr "type" "mmxmov")
610 : (eq_attr "memory" "none")))
611 : "c86-4g-m7-direct,c86-4g-m7-fpu1")
612 :
613 : (define_insn_reservation "c86_4g_m7_mmx_mov_store" 4
614 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
615 : (and (eq_attr "type" "mmxmov")
616 : (and (eq_attr "c86_attr" "other")
617 : (eq_attr "memory" "store"))))
618 : "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-fpu1")
619 :
620 : (define_insn_reservation "c86_4g_m7_mmx_mov_load" 11
621 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
622 : (and (eq_attr "type" "mmxmov")
623 : (eq_attr "memory" "load")))
624 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu1")
625 :
626 : (define_insn_reservation "c86_4g_m7_mmx_mul" 3
627 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
628 : (and (eq_attr "type" "mmxmul")
629 : (eq_attr "memory" "none")))
630 : "c86-4g-m7-direct,c86-4g-m7-fpu0")
631 :
632 : (define_insn_reservation "c86_4g_m7_mmx_mul_load" 10
633 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
634 : (and (eq_attr "type" "mmxmul")
635 : (eq_attr "memory" "load")))
636 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0")
637 :
638 : ;; PINSR
639 : (define_insn_reservation "c86_4g_m7_sse_pinsr_reg" 1
640 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
641 : (and (eq_attr "type" "sselog,mmxcvt")
642 : (and (eq_attr "c86_attr" "insr")
643 : (and (eq_attr "prefix" "orig")
644 : (eq_attr "memory" "none")))))
645 : "c86-4g-m7-direct,c86-4g-m7-fpu")
646 :
647 : (define_insn_reservation "c86_4g_m7_sse_pinsr_reg_load" 3
648 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
649 : (and (eq_attr "type" "sselog,mmxcvt")
650 : (and (eq_attr "c86_attr" "insr")
651 : (and (eq_attr "prefix" "orig")
652 : (eq_attr "memory" "load")))))
653 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
654 :
655 : (define_insn_reservation "c86_4g_m7_avx_vpinsr_reg" 2
656 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
657 : (and (eq_attr "type" "sselog")
658 : (and (eq_attr "c86_attr" "insr")
659 : (and (eq_attr "prefix" "!orig")
660 : (eq_attr "memory" "none")))))
661 : "c86-4g-m7-double,c86-4g-m7-fpu_1_3x2")
662 :
663 : (define_insn_reservation "c86_4g_m7_avx_vpinsr_reg_load" 8
664 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
665 : (and (eq_attr "type" "sselog")
666 : (and (eq_attr "c86_attr" "insr")
667 : (and (eq_attr "prefix" "!orig")
668 : (eq_attr "memory" "load")))))
669 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
670 :
671 : ;; PERM
672 : (define_insn_reservation "c86_4g_m7_avx512_perm_xmm" 3
673 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
674 : (and (eq_attr "type" "sselog")
675 : (and (ior (and (eq_attr "c86_attr" "perm2")
676 : (eq_attr "mode" "V4SF,V2DF,TI"))
677 : (and (eq_attr "c86_attr" "perm")
678 : (eq_attr "mode" "V8SF,V4DF,TI,OI")))
679 : (eq_attr "memory" "none"))))
680 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2x2")
681 :
682 : (define_insn_reservation "c86_4g_m7_avx512_perm_xmm_opload" 10
683 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
684 : (and (eq_attr "type" "sselog")
685 : (and (ior (and (eq_attr "c86_attr" "perm2")
686 : (eq_attr "mode" "V4SF,V2DF,TI"))
687 : (and (eq_attr "c86_attr" "perm")
688 : (eq_attr "mode" "V8SF,V4DF,TI,OI")))
689 : (eq_attr "memory" "load"))))
690 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2x2")
691 :
692 : (define_insn_reservation "c86_4g_m7_avx512_permi2_ymm" 4
693 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
694 : (and (eq_attr "type" "sselog")
695 : (and (eq_attr "c86_attr" "perm2")
696 : (and (eq_attr "mode" "V8SF,V4DF,OI")
697 : (eq_attr "memory" "none")))))
698 : "c86-4g-m7-vector,c86-4g-m7-fpux4")
699 :
700 : (define_insn_reservation "c86_4g_m7_avx512_permi2_zmm" 16
701 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
702 : (and (eq_attr "type" "sselog")
703 : (and (eq_attr "c86_attr" "perm2")
704 : (and (eq_attr "mode" "V16SF,V8DF,XI")
705 : (eq_attr "memory" "none")))))
706 : "c86-4g-m7-vector,c86-4g-m7-fpux16")
707 :
708 : (define_insn_reservation "c86_4g_m7_avx512_permi2_ymm_load" 11
709 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
710 : (and (eq_attr "type" "sselog")
711 : (and (eq_attr "c86_attr" "perm2")
712 : (and (eq_attr "mode" "V8SF,V4DF,OI")
713 : (eq_attr "memory" "load")))))
714 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpux4")
715 :
716 : (define_insn_reservation "c86_4g_m7_avx512_permi2_zmm_load" 23
717 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
718 : (and (eq_attr "type" "sselog")
719 : (and (eq_attr "c86_attr" "perm2")
720 : (and (eq_attr "mode" "V16SF,V8DF,XI")
721 : (eq_attr "memory" "load")))))
722 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpux16")
723 :
724 : (define_insn_reservation "c86_4g_m7_avx512_perm_zmm_imm" 4
725 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
726 : (and (eq_attr "type" "sselog")
727 : (and (eq_attr "c86_attr" "perm")
728 : (and (eq_attr "mode" "V16SF,V8DF,XI")
729 : (and (match_operand 2 "immediate_operand")
730 : (eq_attr "memory" "none"))))))
731 : "c86-4g-m7-direct,c86-4g-m7-fpux4")
732 :
733 : (define_insn_reservation "c86_4g_m7_avx512_perm_zmm_imm_load" 11
734 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
735 : (and (eq_attr "type" "sselog")
736 : (and (eq_attr "c86_attr" "perm")
737 : (and (eq_attr "mode" "V16SF,V8DF,XI")
738 : (and (match_operand 2 "immediate_operand")
739 : (eq_attr "memory" "load"))))))
740 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpux4")
741 :
742 : (define_insn_reservation "c86_4g_m7_avx512_perm_zmm_noimm" 8
743 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
744 : (and (eq_attr "type" "sselog")
745 : (and (eq_attr "c86_attr" "perm")
746 : (and (eq_attr "mode" "V16SF,V8DF,XI")
747 : (and (match_operand 2 "nonimmediate_operand")
748 : (eq_attr "memory" "none"))))))
749 : "c86-4g-m7-vector,c86-4g-m7-fpux8")
750 :
751 : (define_insn_reservation "c86_4g_m7_sse_perm_zmm_noimm_load" 15
752 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
753 : (and (eq_attr "type" "sselog")
754 : (and (eq_attr "c86_attr" "perm")
755 : (and (eq_attr "mode" "V16SF,V8DF,XI")
756 : (and (match_operand 2 "nonimmediate_operand")
757 : (eq_attr "memory" "load"))))))
758 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpux8")
759 :
760 : ;; VINSERT
761 : (define_insn_reservation "c86_4g_m7_avx512_insertx_ymm" 3
762 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
763 : (and (eq_attr "type" "sselog,sselog1")
764 : (and (eq_attr "c86_attr" "insertx")
765 : (and (eq_attr "mode" "V8SF,V4DF,OI")
766 : (and (eq_attr "prefix" "evex")
767 : (eq_attr "memory" "none"))))))
768 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_0_2")
769 :
770 : (define_insn_reservation "c86_4g_m7_avx512_insertx_ymem" 10
771 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
772 : (and (eq_attr "type" "sselog,sselog1")
773 : (and (eq_attr "c86_attr" "insertx")
774 : (and (eq_attr "mode" "V8SF,V4DF,OI")
775 : (and (eq_attr "prefix" "evex")
776 : (eq_attr "memory" "load,both"))))))
777 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_0_2")
778 :
779 : (define_insn_reservation "c86_4g_m7_avx512_insertx_zxmm" 5
780 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
781 : (and (eq_attr "type" "sselog")
782 : (and (eq_attr "c86_attr" "insertx")
783 : (and (eq_attr "mode" "V16SF,V8DF,XI")
784 68 : (and (match_test "GET_MODE_SIZE (GET_MODE (operands[2]))==16")
785 : (match_operand 2 "register_operand"))))))
786 : "c86-4g-m7-double,c86-4g-m7-fpu_0_2x2,c86-4g-m7-fpu_0_2x2")
787 :
788 71 : (define_insn_reservation "c86_4g_m7_avx512_insertx_zxmem" 12
789 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
790 : (and (eq_attr "type" "sselog")
791 : (and (eq_attr "c86_attr" "insertx")
792 : (and (eq_attr "mode" "V16SF,V8DF,XI")
793 : (and (match_test "GET_MODE_SIZE (GET_MODE (operands[2]))==16")
794 : (match_operand 2 "memory_operand"))))))
795 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_0_2x2,c86-4g-m7-fpu_0_2x2")
796 :
797 : (define_insn_reservation "c86_4g_m7_avx512_insertx_zymm" 1
798 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
799 : (and (eq_attr "type" "sselog")
800 : (and (eq_attr "c86_attr" "insertx")
801 : (and (eq_attr "mode" "V16SF,V8DF,XI")
802 68 : (and (match_test "GET_MODE_SIZE (GET_MODE (operands[2]))==32")
803 : (match_operand 2 "register_operand"))))))
804 : "c86-4g-m7-double,c86-4g-m7-fpu_1_3,c86-4g-m7-fpu_1_3")
805 :
806 68 : (define_insn_reservation "c86_4g_m7_avx512_insertx_zymem" 8
807 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
808 : (and (eq_attr "type" "sselog")
809 : (and (eq_attr "c86_attr" "insertx")
810 68 : (and (eq_attr "mode" "V16SF,V8DF,XI")
811 : (and (match_test "GET_MODE_SIZE (GET_MODE (operands[2]))==32")
812 : (match_operand 2 "memory_operand"))))))
813 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
814 68 :
815 : (define_insn_reservation "c86_4g_m7_avx_insertx_ymm" 3
816 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
817 : (and (eq_attr "type" "sselog,sselog1")
818 68 : (and (eq_attr "c86_attr" "insertx")
819 : (and (eq_attr "prefix" "!evex")
820 : (eq_attr "memory" "none")))))
821 : "c86-4g-m7-direct,c86-4g-m7-fpu0*2")
822 68 :
823 : (define_insn_reservation "c86_4g_m7_avx_insertx_ymem" 10
824 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
825 : (and (eq_attr "type" "sselog,sselog1")
826 68 : (and (eq_attr "c86_attr" "insertx")
827 : (and (eq_attr "prefix" "!evex")
828 : (eq_attr "memory" "load")))))
829 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0*2")
830 68 :
831 : ;; SHUF/MULTISHIFTQB
832 : (define_insn_reservation "c86_4g_m7_avx512_shuf_xymm" 3
833 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
834 68 : (and (eq_attr "type" "sselog")
835 : (and (eq_attr "c86_attr" "shufx")
836 : (and (not (eq_attr "mode" "V8DF,V16SF,XI"))
837 : (eq_attr "memory" "none")))))
838 68 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2x2")
839 :
840 : (define_insn_reservation "c86_4g_m7_avx512_shuf_zmm" 4
841 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
842 68 : (and (eq_attr "type" "sselog")
843 : (and (eq_attr "c86_attr" "shufx")
844 : (and (eq_attr "mode" "V8DF,V16SF,XI")
845 : (eq_attr "memory" "none")))))
846 68 : "c86-4g-m7-vector,c86-4g-m7-fpu_0_2x4")
847 :
848 : (define_insn_reservation "c86_4g_m7_avx512_shuf_xymem" 10
849 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
850 63 : (and (eq_attr "type" "sselog")
851 : (and (eq_attr "c86_attr" "shufx")
852 : (and (not (eq_attr "mode" "V8DF,V16SF,XI"))
853 : (eq_attr "memory" "load")))))
854 63 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2x2")
855 :
856 : (define_insn_reservation "c86_4g_m7_avx512_shuf_zmem" 11
857 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
858 63 : (and (eq_attr "type" "sselog")
859 : (and (eq_attr "c86_attr" "shufx")
860 : (and (eq_attr "mode" "V8DF,V16SF,XI")
861 : (eq_attr "memory" "load")))))
862 63 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu_0_2x4")
863 :
864 : ;; SSELOGIC
865 : (define_insn_reservation "c86_4g_m7_sselogic_xymm" 1
866 63 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
867 : (and (eq_attr "type" "sselog,sselog1")
868 : (and (eq_attr "c86_attr" "sselogic")
869 : (eq_attr "memory" "none"))))
870 63 : "c86-4g-m7-direct,c86-4g-m7-fpu")
871 :
872 : (define_insn_reservation "c86_4g_m7_sselogic_xymm_load" 8
873 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
874 63 : (and (eq_attr "type" "sselog,sselog1")
875 : (and (eq_attr "c86_attr" "sselogic")
876 : (eq_attr "memory" "load"))))
877 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
878 63 :
879 : ;; CMPESTR
880 : (define_insn_reservation "c86_4g_m7_avx512_cmpestr" 6
881 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
882 63 : (and (eq_attr "type" "sselog")
883 : (and (eq_attr "c86_attr" "cmpestr")
884 : (eq_attr "memory" "none"))))
885 : "c86-4g-m7-vector,c86-4g-m7-fpux6")
886 63 :
887 : (define_insn_reservation "c86_4g_m7_avx512_cmpestr_load" 13
888 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
889 : (and (eq_attr "type" "sselog")
890 63 : (and (eq_attr "c86_attr" "cmpestr")
891 : (eq_attr "memory" "load"))))
892 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpux6")
893 :
894 63 : ;; SSELOG
895 : (define_insn_reservation "c86_4g_m7_avx512_log" 1
896 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
897 : (and (eq_attr "type" "sselog,sselog1,sseshuf,sseshuf1")
898 63 : (and (eq_attr "c86_attr" "other")
899 : (eq_attr "memory" "none"))))
900 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
901 :
902 63 : (define_insn_reservation "c86_4g_m7_avx512_log_load" 8
903 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
904 : (and (eq_attr "type" "sselog,sselog1,sseshuf,sseshuf1")
905 : (and (eq_attr "c86_attr" "other")
906 63 : (eq_attr "memory" "load"))))
907 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
908 :
909 : ;; SSELOG1
910 63 : ;; VDBPSADBW
911 : (define_insn_reservation "c86_4g_m7_avx512_vdbpsadbw_xymm" 4
912 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
913 : (and (eq_attr "type" "sselog1")
914 63 : (and (eq_attr "c86_attr" "sadbw")
915 : (and (eq_attr "mode" "OI,TI")
916 : (eq_attr "memory" "none")))))
917 : "c86-4g-m7-double,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3")
918 63 :
919 : (define_insn_reservation "c86_4g_m7_avx512_vdbpsadbw_xymem" 11
920 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
921 : (and (eq_attr "type" "sselog1")
922 63 : (and (eq_attr "c86_attr" "sadbw")
923 : (and (eq_attr "mode" "OI,TI")
924 : (eq_attr "memory" "load")))))
925 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3")
926 63 :
927 : (define_insn_reservation "c86_4g_m7_avx512_vdbpsadbw_zmm" 4
928 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
929 : (and (eq_attr "type" "sselog1")
930 63 : (and (eq_attr "c86_attr" "sadbw")
931 : (and (eq_attr "mode" "XI")
932 : (eq_attr "memory" "none")))))
933 : "c86-4g-m7-vector,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3x2")
934 63 :
935 : (define_insn_reservation "c86_4g_m7_avx512_vdbpsadbw_zmem" 11
936 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
937 : (and (eq_attr "type" "sselog1")
938 63 : (and (eq_attr "c86_attr" "sadbw")
939 : (and (eq_attr "mode" "XI")
940 : (eq_attr "memory" "load")))))
941 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3x2")
942 63 :
943 : ;; ABS
944 : (define_insn_reservation "c86_4g_m7_avx512_abs" 1
945 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
946 63 : (and (eq_attr "type" "sselog1,sse")
947 : (and (eq_attr "c86_attr" "abs")
948 : (and (eq_attr "prefix" "evex")
949 : (eq_attr "memory" "none")))))
950 63 : "c86-4g-m7-direct,c86-4g-m7-fpu")
951 :
952 : (define_insn_reservation "c86_4g_m7_avx512_abs_load" 8
953 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
954 55 : (and (eq_attr "type" "sselog1,sse")
955 : (and (eq_attr "c86_attr" "abs")
956 : (and (eq_attr "prefix" "evex")
957 : (eq_attr "memory" "load,both")))))
958 27 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu")
959 :
960 : ;; SIGN
961 : (define_insn_reservation "c86_4g_m7_avx_sign" 1
962 3 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
963 : (and (eq_attr "type" "sselog1")
964 : (and (eq_attr "c86_attr" "sign")
965 : (eq_attr "memory" "none"))))
966 3 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_3")
967 :
968 : (define_insn_reservation "c86_4g_m7_avx_sign_load" 8
969 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
970 3 : (and (eq_attr "type" "sselog1")
971 : (and (eq_attr "c86_attr" "sign")
972 : (eq_attr "memory" "!none"))))
973 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_3")
974 3 :
975 : ;; BLEND/ABS/AES
976 : (define_insn_reservation "c86_4g_m7_avx_blend" 1
977 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
978 3 : (and (eq_attr "type" "sselog1")
979 : (and (eq_attr "c86_attr" "abs,blend,aes")
980 : (and (eq_attr "prefix" "!evex")
981 : (eq_attr "memory" "none")))))
982 3 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_1")
983 :
984 : (define_insn_reservation "c86_4g_m7_avx_blend_load" 8
985 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
986 3 : (and (eq_attr "type" "sselog1")
987 : (and (eq_attr "c86_attr" "abs,blend,aes")
988 : (and (eq_attr "prefix" "!evex")
989 : (eq_attr "memory" "load")))))
990 3 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1")
991 :
992 : (define_insn_reservation "c86_4g_m7_avx512_aes" 3
993 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
994 3 : (and (eq_attr "type" "sselog1,ssecvt,sse")
995 : (and (eq_attr "c86_attr" "aes")
996 : (and (eq_attr "prefix" "evex")
997 : (eq_attr "memory" "none")))))
998 3 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
999 :
1000 : (define_insn_reservation "c86_4g_m7_avx512_aes_load" 10
1001 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1002 3 : (and (eq_attr "type" "sselog1,ssecvt,sse")
1003 : (and (eq_attr "c86_attr" "aes")
1004 : (and (eq_attr "prefix" "evex")
1005 : (eq_attr "memory" "load")))))
1006 3 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
1007 :
1008 : (define_insn_reservation "c86_4g_m7_avx_aes" 3
1009 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1010 3 : (and (eq_attr "type" "sselog1")
1011 : (and (eq_attr "c86_attr" "aes")
1012 : (and (eq_attr "prefix" "!evex")
1013 : (eq_attr "memory" "none")))))
1014 3 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_1")
1015 :
1016 : (define_insn_reservation "c86_4g_m7_avx_aes_load" 10
1017 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1018 3 : (and (eq_attr "type" "sselog1")
1019 : (and (eq_attr "c86_attr" "aes")
1020 : (and (eq_attr "prefix" "!evex")
1021 : (eq_attr "memory" "load")))))
1022 3 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1")
1023 :
1024 : ;; EXTR
1025 : (define_insn_reservation "c86_4g_m7_extr" 5
1026 3 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1027 : (and (eq_attr "type" "sselog1,sselog,mmxcvt")
1028 : (and (eq_attr "c86_attr" "extr")
1029 : (eq_attr "memory" "none"))))
1030 3 : "c86-4g-m7-double,c86-4g-m7-fpu1,c86-4g-m7-fpu_0_1")
1031 :
1032 : (define_insn_reservation "c86_4g_m7_extr_store" 12
1033 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1034 3 : (and (eq_attr "type" "sselog1,sselog,mmxcvt")
1035 : (and (eq_attr "c86_attr" "extr")
1036 : (eq_attr "memory" "store"))))
1037 : "c86-4g-m7-double,c86-4g-m7-store,c86-4g-m7-fpu1,c86-4g-m7-fpu_0_1")
1038 3 :
1039 : ;; SSECOMI
1040 : (define_insn_reservation "c86_4g_m7_avx_ssecomi_comi" 1
1041 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1042 3 : (and (eq_attr "type" "ssecomi")
1043 : (and (eq_attr "prefix_extra" "0")
1044 : (eq_attr "memory" "none"))))
1045 : "c86-4g-m7-double,c86-4g-m7-fpu")
1046 3 :
1047 : (define_insn_reservation "c86_4g_m7_avx_ssecomi_comi_load" 8
1048 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1049 : (and (eq_attr "type" "ssecomi")
1050 3 : (and (eq_attr "prefix_extra" "0")
1051 : (eq_attr "memory" "load"))))
1052 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu")
1053 :
1054 3 : (define_insn_reservation "c86_4g_m7_avx_ssecomi_test" 1
1055 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1056 : (and (eq_attr "type" "ssecomi")
1057 : (and (eq_attr "prefix_extra" "1")
1058 3 : (eq_attr "memory" "none"))))
1059 : "c86-4g-m7-direct,c86-4g-m7-fpu1|c86-4g-m7-fpu2")
1060 :
1061 : (define_insn_reservation "c86_4g_m7_avx_ssecomi_test_load" 8
1062 3 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1063 : (and (eq_attr "type" "ssecomi")
1064 : (and (eq_attr "prefix_extra" "1")
1065 : (eq_attr "memory" "load"))))
1066 3 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu1|c86-4g-m7-fpu2")
1067 :
1068 : ;; SSEIMUL
1069 : (define_insn_reservation "c86_4g_m7_avx512_imul" 3
1070 3 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1071 : (and (eq_attr "type" "sseimul")
1072 : (and (eq_attr "prefix" "evex")
1073 : (eq_attr "memory" "none"))))
1074 3 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1075 :
1076 : (define_insn_reservation "c86_4g_m7_avx512_imul_mem" 10
1077 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1078 3 : (and (eq_attr "type" "sseimul")
1079 : (and (eq_attr "prefix" "evex")
1080 : (eq_attr "memory" "load"))))
1081 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1082 3 :
1083 : (define_insn_reservation "c86_4g_m7_avx_imul" 3
1084 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1085 : (and (eq_attr "type" "sseimul")
1086 3 : (and (eq_attr "prefix" "!evex")
1087 : (eq_attr "memory" "none"))))
1088 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_3")
1089 :
1090 0 : (define_insn_reservation "c86_4g_m7_avx_imul_mem" 10
1091 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1092 : (and (eq_attr "type" "sseimul")
1093 : (and (eq_attr "prefix" "!evex")
1094 0 : (eq_attr "memory" "load"))))
1095 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_3")
1096 :
1097 : ;; SSEMOV
1098 0 : (define_insn_reservation "c86_4g_m7_avx512_mov_vmov" 1
1099 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1100 : (and (eq_attr "type" "ssemov,sseiadd")
1101 : (and (eq_attr "c86_attr" "other,blend,maxmin")
1102 0 : (eq_attr "memory" "none"))))
1103 : "c86-4g-m7-direct,c86-4g-m7-fpu")
1104 :
1105 : (define_insn_reservation "c86_4g_m7_avx512_mov_vmov_store" 8
1106 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1107 : (and (eq_attr "type" "ssemov")
1108 : (and (eq_attr "c86_attr" "other")
1109 : (eq_attr "memory" "store"))))
1110 0 : "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-fpu1")
1111 :
1112 : (define_insn_reservation "c86_4g_m7_avx512_mov_vmov_load" 8
1113 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1114 0 : (and (eq_attr "type" "ssemov,sseiadd")
1115 : (and (eq_attr "c86_attr" "other,blend,maxmin")
1116 : (eq_attr "memory" "load"))))
1117 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
1118 0 :
1119 : (define_insn_reservation "c86_4g_m7_avx512_vpmovx_y" 3
1120 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1121 : (and (eq_attr "type" "ssemov")
1122 0 : (and (eq_attr "c86_attr" "vpmovx")
1123 : (and (eq_attr "prefix" "evex")
1124 : (and (eq_attr "mode" "OI,V8SF,V4DF")
1125 : (eq_attr "memory" "none"))))))
1126 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2x2")
1127 :
1128 : (define_insn_reservation "c86_4g_m7_avx512_vpmovx_y_load" 10
1129 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1130 0 : (and (eq_attr "type" "ssemov,sselog1")
1131 : (and (eq_attr "c86_attr" "vpmovx")
1132 : (and (eq_attr "prefix" "evex")
1133 : (and (eq_attr "mode" "OI,V8SF,V4DF")
1134 0 : (eq_attr "memory" "load,both"))))))
1135 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu_0_2x2")
1136 :
1137 : (define_insn_reservation "c86_4g_m7_avx512_vpmovx_z" 5
1138 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1139 : (and (eq_attr "type" "ssemov")
1140 : (and (eq_attr "c86_attr" "vpmovx")
1141 : (and (eq_attr "mode" "XI")
1142 0 : (eq_attr "memory" "none")))))
1143 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2x4")
1144 :
1145 : (define_insn_reservation "c86_4g_m7_avx512_vpmovx_z_load" 12
1146 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1147 : (and (eq_attr "type" "ssemov")
1148 : (and (eq_attr "c86_attr" "vpmovx")
1149 : (and (eq_attr "mode" "XI")
1150 0 : (eq_attr "memory" "load")))))
1151 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2x4")
1152 :
1153 : (define_insn_reservation "c86_4g_m7_avx512_vpmovx_x" 1
1154 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1155 : (and (eq_attr "type" "ssemov")
1156 : (and (eq_attr "c86_attr" "vpmovx")
1157 : (and (eq_attr "prefix" "evex")
1158 0 : (and (eq_attr "mode" "TI,SI")
1159 : (eq_attr "memory" "none"))))))
1160 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
1161 :
1162 0 : (define_insn_reservation "c86_4g_m7_avx512_vpmovx_x_load" 8
1163 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1164 : (and (eq_attr "type" "ssemov")
1165 : (and (eq_attr "c86_attr" "vpmovx")
1166 0 : (and (eq_attr "prefix" "evex")
1167 : (and (eq_attr "mode" "TI,SI")
1168 : (eq_attr "memory" "load"))))))
1169 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
1170 0 :
1171 : (define_insn_reservation "c86_4g_m7_avx_vpmovx_xx" 1
1172 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1173 : (and (eq_attr "type" "ssemov")
1174 0 : (and (eq_attr "c86_attr" "vpmovx")
1175 : (and (eq_attr "prefix" "!evex")
1176 : (eq_attr "memory" "none")))))
1177 : "c86-4g-m7-direct,c86-4g-m7-fpu1|c86-4g-m7-fpu2")
1178 0 :
1179 : (define_insn_reservation "c86_4g_m7_avx_vpmovx_xx_load" 8
1180 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1181 : (and (eq_attr "type" "ssemov")
1182 0 : (and (eq_attr "c86_attr" "vpmovx")
1183 : (and (eq_attr "prefix" "!evex")
1184 : (eq_attr "memory" "load,both")))))
1185 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-store,c86-4g-m7-fpu1|c86-4g-m7-fpu2")
1186 0 :
1187 : ;; EXPAND
1188 : (define_insn_reservation "c86_4g_m7_avx512_expand" 3
1189 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1190 0 : (and (eq_attr "type" "ssemov")
1191 : (and (eq_attr "c86_attr" "expand,compress")
1192 : (and (not (eq_attr "mode" "XI,V16SF,V8DF"))
1193 : (eq_attr "memory" "none")))))
1194 0 : "c86-4g-m7-direct,c86-4g-m7-fpu3,c86-4g-m7-fpu_0_3")
1195 :
1196 : (define_insn_reservation "c86_4g_m7_avx512_expand_load" 10
1197 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1198 0 : (and (eq_attr "type" "ssemov")
1199 : (and (eq_attr "c86_attr" "expand,compress")
1200 : (and (not (eq_attr "mode" "XI,V16SF,V8DF"))
1201 : (eq_attr "memory" "load")))))
1202 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu3,c86-4g-m7-fpu_0_3")
1203 :
1204 : (define_insn_reservation "c86_4g_m7_avx512_expand_z" 10
1205 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1206 0 : (and (eq_attr "type" "ssemov")
1207 : (and (eq_attr "c86_attr" "expand,compress")
1208 : (and (eq_attr "mode" "XI,V16SF,V8DF")
1209 : (eq_attr "memory" "none")))))
1210 0 : "c86-4g-m7-vector,c86-4g-m7-fpu3,c86-4g-m7-fpu_0_3")
1211 :
1212 : (define_insn_reservation "c86_4g_m7_avx512_expand_z_load" 17
1213 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1214 0 : (and (eq_attr "type" "ssemov")
1215 : (and (eq_attr "c86_attr" "expand,compress")
1216 : (and (eq_attr "mode" "XI,V16SF,V8DF")
1217 : (eq_attr "memory" "load")))))
1218 0 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu3,c86-4g-m7-fpu_0_3")
1219 :
1220 : ;; MOVNT
1221 : (define_insn_reservation "c86_4g_m7_avx512_movnt_load" 8
1222 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1223 : (and (eq_attr "type" "ssemov")
1224 : (and (eq_attr "c86_attr" "movnt")
1225 : (and (eq_attr "mode" "XI,V16SF,V8DF")
1226 0 : (eq_attr "memory" "load")))))
1227 : "c86-4g-m7-double,c86-4g-m7-load")
1228 :
1229 : (define_insn_reservation "c86_4g_m7_avx512_movnt_store" 8
1230 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1231 : (and (eq_attr "type" "ssemov")
1232 : (and (eq_attr "c86_attr" "movnt")
1233 : (and (eq_attr "mode" "XI,V16SF,V8DF")
1234 0 : (eq_attr "memory" "store")))))
1235 : "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-fpu1*2")
1236 :
1237 : (define_insn_reservation "c86_4g_m7_sse_movnt_store" 4
1238 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1239 : (and (eq_attr "type" "ssemov,mmxmov")
1240 : (and (eq_attr "c86_attr" "movnt")
1241 : (and (not (eq_attr "mode" "XI,V16SF,V8DF"))
1242 0 : (eq_attr "memory" "!none")))))
1243 : "c86-4g-m7-direct,c86-4g-m7-store,c86-4g-m7-fpu1")
1244 :
1245 : (define_insn_reservation "c86_4g_m7_sse_movnt" 4
1246 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1247 : (and (eq_attr "type" "ssemov")
1248 : (and (eq_attr "c86_attr" "movnt")
1249 : (and (not (eq_attr "mode" "XI,V16SF,V8DF"))
1250 0 : (eq_attr "memory" "none")))))
1251 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
1252 :
1253 : ;; BLENDV
1254 0 : (define_insn_reservation "c86_4g_m7_avx512_blendv" 1
1255 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1256 : (and (eq_attr "type" "ssemov")
1257 : (and (eq_attr "c86_attr" "blendv")
1258 0 : (eq_attr "memory" "none"))))
1259 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_1")
1260 :
1261 : (define_insn_reservation "c86_4g_m7_avx512_blendv_load" 8
1262 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1263 : (and (eq_attr "type" "ssemov")
1264 : (and (eq_attr "c86_attr" "blendv")
1265 : (eq_attr "memory" "load"))))
1266 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1")
1267 :
1268 : ;; SSEMOV2
1269 : (define_insn_reservation "c86_4g_m7_sse_mov2" 1
1270 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1271 : (and (eq_attr "type" "ssemov2")
1272 : (eq_attr "memory" "none")))
1273 : "c86-4g-m7-direct,c86-4g-m7-fpu")
1274 0 :
1275 : (define_insn_reservation "c86_4g_m7_sse_mov2_load" 8
1276 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1277 : (and (eq_attr "type" "ssemov2")
1278 0 : (eq_attr "memory" "!none")))
1279 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
1280 :
1281 : ;; SSEISHFT
1282 0 : (define_insn_reservation "c86_4g_m7_avx512_sseishft_aligr" 1
1283 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1284 : (and (eq_attr "type" "sseishft")
1285 : (and (eq_attr "prefix_extra" "1")
1286 0 : (and (eq_attr "prefix" "evex")
1287 : (eq_attr "memory" "none")))))
1288 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
1289 :
1290 0 : (define_insn_reservation "c86_4g_m7_avx512_sseishft_aligr_load" 8
1291 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1292 : (and (eq_attr "type" "sseishft")
1293 : (and (eq_attr "prefix_extra" "1")
1294 0 : (and (eq_attr "prefix" "evex")
1295 : (eq_attr "memory" "load")))))
1296 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
1297 :
1298 0 : (define_insn_reservation "c86_4g_m7_avx512_sseishft_vshift" 1
1299 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1300 : (and (eq_attr "type" "sseishft")
1301 : (and (eq_attr "prefix_extra" "!1")
1302 0 : (eq_attr "memory" "none"))))
1303 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1304 :
1305 : (define_insn_reservation "c86_4g_m7_avx512_sseishft_vshift_load" 8
1306 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1307 : (and (eq_attr "type" "sseishft")
1308 : (and (eq_attr "prefix_extra" "!1")
1309 : (eq_attr "memory" "!none"))))
1310 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1311 :
1312 :
1313 : ;; SSEADD
1314 0 : (define_insn_reservation "c86_4g_m7_avx512_sseadd_maxmin" 1
1315 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1316 : (and (eq_attr "type" "sseadd,sse")
1317 : (and (eq_attr "c86_attr" "maxmin")
1318 0 : (and (eq_attr "prefix" "evex")
1319 : (eq_attr "memory" "none")))))
1320 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1321 :
1322 0 : (define_insn_reservation "c86_4g_m7_avx512_sseadd_maxmin_load" 8
1323 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1324 : (and (eq_attr "type" "sseadd,sse")
1325 : (and (eq_attr "c86_attr" "maxmin")
1326 0 : (and (eq_attr "prefix" "evex")
1327 : (eq_attr "memory" "load")))))
1328 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1329 :
1330 0 : (define_insn_reservation "c86_4g_m7_avx_sseadd_maxmin" 1
1331 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1332 : (and (eq_attr "type" "sseadd,sse")
1333 : (and (eq_attr "c86_attr" "maxmin")
1334 0 : (and (eq_attr "prefix" "vex")
1335 : (eq_attr "memory" "none")))))
1336 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_1")
1337 :
1338 0 : (define_insn_reservation "c86_4g_m7_avx_sseadd_maxmin_load" 8
1339 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1340 : (and (eq_attr "type" "sseadd,sse")
1341 : (and (eq_attr "c86_attr" "maxmin")
1342 0 : (and (eq_attr "prefix" "vex")
1343 : (eq_attr "memory" "load")))))
1344 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1")
1345 :
1346 0 : (define_insn_reservation "c86_4g_m7_sse_sseadd_maxmin" 1
1347 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1348 : (and (eq_attr "type" "sseadd,sse")
1349 : (and (eq_attr "c86_attr" "maxmin")
1350 0 : (and (eq_attr "prefix" "orig")
1351 : (eq_attr "memory" "none")))))
1352 : "c86-4g-m7-direct,c86-4g-m7-fpu2|c86-4g-m7-fpu3")
1353 :
1354 0 : (define_insn_reservation "c86_4g_m7_sse_sseadd_maxmin_load" 8
1355 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1356 : (and (eq_attr "type" "sseadd,sse")
1357 : (and (eq_attr "c86_attr" "maxmin")
1358 0 : (and (eq_attr "prefix" "orig")
1359 : (eq_attr "memory" "load")))))
1360 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu2|c86-4g-m7-fpu3")
1361 :
1362 0 : ;; SUB/ADD
1363 : (define_insn_reservation "c86_4g_m7_avx512_sseadd" 3
1364 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1365 : (and (eq_attr "type" "sseadd")
1366 0 : (and (eq_attr "c86_attr" "other")
1367 : (eq_attr "memory" "none"))))
1368 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
1369 :
1370 0 : (define_insn_reservation "c86_4g_m7_avx512_sseadd_load" 10
1371 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1372 : (and (eq_attr "type" "sseadd")
1373 : (and (eq_attr "c86_attr" "other")
1374 0 : (eq_attr "memory" "load"))))
1375 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
1376 :
1377 : ;; HADD/HSUB
1378 0 : (define_insn_reservation "c86_4g_m7_avx_sseadd_hplus" 7
1379 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1380 : (and (eq_attr "type" "sseadd,sseadd1")
1381 : (and (eq_attr "c86_attr" "hplus")
1382 0 : (eq_attr "memory" "none"))))
1383 : "c86-4g-m7-vector")
1384 :
1385 : (define_insn_reservation "c86_4g_m7_avx_sseadd_hplus_load" 14
1386 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1387 : (and (eq_attr "type" "sseadd,sseadd1")
1388 : (and (eq_attr "c86_attr" "hplus")
1389 : (eq_attr "memory" "load"))))
1390 0 : "c86-4g-m7-vector,c86-4g-m7-load")
1391 :
1392 : ;; SSEIADD
1393 : (define_insn_reservation "c86_4g_m7_avx512_sseiadd_madd" 3
1394 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1395 : (and (eq_attr "type" "sseiadd")
1396 : (and (eq_attr "c86_attr" "sadbw,madd")
1397 : (and (ior (eq_attr "prefix" "evex")
1398 0 : (eq_attr "mode" "XI"))
1399 : (eq_attr "memory" "none")))))
1400 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1401 :
1402 0 : (define_insn_reservation "c86_4g_m7_avx512_sseiadd_madd_mem" 10
1403 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1404 : (and (eq_attr "type" "sseiadd")
1405 : (and (eq_attr "c86_attr" "sadbw,madd")
1406 0 : (and (ior (eq_attr "prefix" "evex")
1407 : (eq_attr "mode" "XI"))
1408 : (eq_attr "memory" "load")))))
1409 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1410 0 :
1411 : (define_insn_reservation "c86_4g_m7_avx_sseiadd_sadbw" 3
1412 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1413 : (and (eq_attr "type" "sseiadd")
1414 0 : (and (eq_attr "c86_attr" "sadbw")
1415 : (and (eq_attr "prefix" "vex,maybe_evex")
1416 0 : (and (eq_attr "mode" "TI,OI")
1417 : (eq_attr "memory" "none"))))))
1418 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_1")
1419 :
1420 : (define_insn_reservation "c86_4g_m7_avx_sseiadd_sadbw_mem" 10
1421 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1422 0 : (and (eq_attr "type" "sseiadd")
1423 : (and (eq_attr "c86_attr" "sadbw")
1424 : (and (eq_attr "prefix" "vex,maybe_evex")
1425 : (and (eq_attr "mode" "TI,OI")
1426 0 : (eq_attr "memory" "load"))))))
1427 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1")
1428 :
1429 : (define_insn_reservation "c86_4g_m7_sse_sseiadd_sadbw" 3
1430 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1431 : (and (eq_attr "type" "sseiadd")
1432 : (and (eq_attr "c86_attr" "sadbw")
1433 : (and (eq_attr "prefix" "orig")
1434 : (eq_attr "memory" "none")))))
1435 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_3")
1436 0 :
1437 : (define_insn_reservation "c86_4g_m7_sse_sseiadd_sadbw_mem" 10
1438 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1439 : (and (eq_attr "type" "sseiadd")
1440 : (and (eq_attr "c86_attr" "sadbw")
1441 : (and (eq_attr "prefix" "orig")
1442 : (eq_attr "memory" "load")))))
1443 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_3")
1444 :
1445 : (define_insn_reservation "c86_4g_m7_sse_sseiadd_madd" 3
1446 12 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1447 : (and (eq_attr "type" "sseiadd")
1448 12 : (and (eq_attr "c86_attr" "madd")
1449 12 : (and (eq_attr "prefix" "!evex")
1450 12 : (eq_attr "memory" "none")))))
1451 12 : "c86-4g-m7-direct,c86-4g-m7-fpu0")
1452 12 :
1453 12 : (define_insn_reservation "c86_4g_m7_sse_sseiadd_madd_mem" 10
1454 12 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1455 12 : (and (eq_attr "type" "sseiadd")
1456 12 : (and (eq_attr "c86_attr" "madd")
1457 12 : (and (eq_attr "prefix" "!evex")
1458 12 : (eq_attr "memory" "load")))))
1459 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu0")
1460 12 :
1461 : ;; AVG
1462 0 : (define_insn_reservation "c86_4g_m7_avx512_sseiadd_avg" 1
1463 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1464 0 : (and (eq_attr "type" "sseiadd")
1465 0 : (and (eq_attr "c86_attr" "avg")
1466 0 : (eq_attr "memory" "none"))))
1467 0 : "c86-4g-m7-direct,c86-4g-m7-fpu")
1468 :
1469 : (define_insn_reservation "c86_4g_m7_avx512_sseiadd_avg_load" 8
1470 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1471 0 : (and (eq_attr "type" "sseiadd")
1472 : (and (eq_attr "c86_attr" "avg")
1473 : (eq_attr "memory" "load"))))
1474 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
1475 :
1476 : (define_insn_reservation "c86_4g_m7_avx_sseiadd_hplus" 3
1477 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1478 : (and (eq_attr "type" "sseiadd,sseiadd1")
1479 : (and (eq_attr "c86_attr" "hplus")
1480 0 : (and (eq_attr "prefix" "vex")
1481 0 : (eq_attr "memory" "none")))))
1482 0 : "c86-4g-m7-vector")
1483 0 :
1484 0 : (define_insn_reservation "c86_4g_m7_avx_sseiadd_hplus_load" 10
1485 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1486 0 : (and (eq_attr "type" "sseiadd,sseiadd1")
1487 0 : (and (eq_attr "c86_attr" "hplus")
1488 0 : (and (eq_attr "prefix" "vex")
1489 0 : (eq_attr "memory" "load")))))
1490 0 : "c86-4g-m7-vector,c86-4g-m7-load")
1491 0 :
1492 0 : (define_insn_reservation "c86_4g_m7_sse_sseiadd_hplus" 3
1493 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1494 0 : (and (eq_attr "type" "sseiadd,sseiadd1")
1495 : (and (eq_attr "c86_attr" "hplus")
1496 : (and (eq_attr "prefix" "orig")
1497 : (eq_attr "memory" "none")))))
1498 0 : "c86-4g-m7-vector,c86-4g-m7-fpux2")
1499 :
1500 : (define_insn_reservation "c86_4g_m7_sse_sseiadd_hplus_load" 10
1501 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1502 0 : (and (eq_attr "type" "sseiadd,sseiadd1")
1503 0 : (and (eq_attr "c86_attr" "hplus")
1504 0 : (and (eq_attr "prefix" "orig")
1505 0 : (eq_attr "memory" "load")))))
1506 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpux2")
1507 0 :
1508 0 : ;; SSEMUL
1509 0 : (define_insn_reservation "c86_4g_m7_avx512_ssemul" 3
1510 0 : (and (eq_attr "cpu" "c86_4g_m7")
1511 0 : (and (eq_attr "type" "ssemul")
1512 : (eq_attr "memory" "none")))
1513 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1514 :
1515 0 : (define_insn_reservation "c86_4g_m7_avx512_ssemul_load" 10
1516 : (and (eq_attr "cpu" "c86_4g_m7")
1517 : (and (eq_attr "type" "ssemul")
1518 : (eq_attr "memory" "load")))
1519 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1520 :
1521 : (define_insn_reservation "c86_4g_m8_avx512_ssemul" 4
1522 0 : (and (eq_attr "cpu" "c86_4g_m8")
1523 0 : (and (eq_attr "type" "ssemul")
1524 0 : (eq_attr "memory" "none")))
1525 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1526 0 :
1527 0 : (define_insn_reservation "c86_4g_m8_avx512_ssemul_load" 11
1528 0 : (and (eq_attr "cpu" "c86_4g_m8")
1529 0 : (and (eq_attr "type" "ssemul")
1530 0 : (eq_attr "memory" "load")))
1531 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1532 0 :
1533 : ;; SSEDIV
1534 : (define_insn_reservation "c86_4g_m7_avx512_ssediv_x" 13
1535 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1536 0 : (and (eq_attr "type" "ssediv")
1537 0 : (and (eq_attr "mode" "SF,DF,V4SF,V2DF")
1538 0 : (eq_attr "memory" "none"))))
1539 0 : "c86-4g-m7-direct,c86-4g-m7-fp1div1_fp3div3_x4x8")
1540 0 :
1541 0 : (define_insn_reservation "c86_4g_m7_avx512_ssediv_xmem" 20
1542 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1543 0 : (and (eq_attr "type" "ssediv")
1544 0 : (and (eq_attr "mode" "SF,DF,V4SF,V2DF")
1545 0 : (eq_attr "memory" "load"))))
1546 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp1div1_fp3div3_x4x8")
1547 0 :
1548 0 : (define_insn_reservation "c86_4g_m7_avx512_ssediv_y" 13
1549 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1550 0 : (and (eq_attr "type" "ssediv")
1551 0 : (and (eq_attr "mode" "V8SF,V4DF")
1552 0 : (eq_attr "memory" "none"))))
1553 0 : "c86-4g-m7-direct,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*8")
1554 :
1555 : (define_insn_reservation "c86_4g_m7_avx512_ssediv_ymem" 20
1556 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1557 0 : (and (eq_attr "type" "ssediv")
1558 : (and (eq_attr "mode" "V8SF,V4DF")
1559 0 : (eq_attr "memory" "load"))))
1560 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*8")
1561 0 :
1562 0 : (define_insn_reservation "c86_4g_m7_avx512_ssediv_z" 24
1563 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1564 0 : (and (eq_attr "type" "ssediv")
1565 0 : (and (eq_attr "mode" "V16SF,V8DF")
1566 0 : (eq_attr "memory" "none"))))
1567 : "c86-4g-m7-double,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*20")
1568 :
1569 : (define_insn_reservation "c86_4g_m7_avx512_ssediv_zmem" 31
1570 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1571 0 : (and (eq_attr "type" "ssediv")
1572 0 : (and (eq_attr "mode" "V16SF,V8DF")
1573 : (eq_attr "memory" "load"))))
1574 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*20")
1575 0 :
1576 0 : ;; SSECMP
1577 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp" 5
1578 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1579 0 : (and (eq_attr "type" "ssecmp")
1580 0 : (and (eq_attr "prefix" "evex")
1581 0 : (and (eq_attr "mode" "V2DF,V4DF,V8SF,V4SF,SF,DF")
1582 0 : (eq_attr "memory" "none")))))
1583 0 : "c86-4g-m7-double,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3")
1584 0 :
1585 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_load" 12
1586 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1587 : (and (eq_attr "type" "ssecmp")
1588 : (and (eq_attr "prefix" "evex")
1589 : (and (eq_attr "mode" "V2DF,V4DF,V8SF,V4SF,SF,DF")
1590 : (eq_attr "memory" "load")))))
1591 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3")
1592 :
1593 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_z" 5
1594 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1595 0 : (and (eq_attr "type" "ssecmp")
1596 0 : (and (eq_attr "mode" "V16SF,V8DF,XI")
1597 0 : (and (eq_attr "c86_attr" "other")
1598 0 : (eq_attr "memory" "none")))))
1599 0 : "c86-4g-m7-vector,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3")
1600 0 :
1601 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_z_load" 12
1602 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1603 0 : (and (eq_attr "type" "ssecmp")
1604 0 : (and (eq_attr "mode" "V16SF,V8DF,XI")
1605 0 : (and (eq_attr "c86_attr" "other")
1606 0 : (eq_attr "memory" "load")))))
1607 0 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu_0_2,c86-4g-m7-fpu_1_3x2")
1608 0 :
1609 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_vp" 5
1610 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1611 0 : (and (eq_attr "type" "ssecmp")
1612 0 : (and (eq_attr "prefix" "evex")
1613 0 : (and (eq_attr "mode" "TI,OI")
1614 0 : (and (eq_attr "c86_attr" "other")
1615 0 : (eq_attr "memory" "none"))))))
1616 0 : "c86-4g-m7-double,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3")
1617 0 :
1618 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_vp_load" 12
1619 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1620 0 : (and (eq_attr "type" "ssecmp")
1621 : (and (eq_attr "prefix" "evex")
1622 0 : (and (eq_attr "mode" "TI,OI")
1623 : (and (eq_attr "c86_attr" "other")
1624 : (eq_attr "memory" "load"))))))
1625 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3")
1626 :
1627 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_vp_z" 5
1628 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1629 0 : (and (eq_attr "type" "ssecmp")
1630 0 : (and (eq_attr "prefix" "evex")
1631 0 : (and (eq_attr "mode" "XI")
1632 0 : (and (eq_attr "c86_attr" "other,ptest")
1633 0 : (eq_attr "memory" "none"))))))
1634 0 : "c86-4g-m7-vector,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3")
1635 0 :
1636 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_vp_z_load" 12
1637 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1638 0 : (and (eq_attr "type" "ssecmp")
1639 0 : (and (eq_attr "prefix" "evex")
1640 0 : (and (eq_attr "mode" "XI")
1641 0 : (and (eq_attr "c86_attr" "other,ptest")
1642 0 : (eq_attr "memory" "load"))))))
1643 0 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3x2")
1644 0 :
1645 0 : (define_insn_reservation "c86_4g_m7_avx_ssecmp_vp" 1
1646 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1647 0 : (and (eq_attr "type" "ssecmp")
1648 0 : (and (eq_attr "prefix" "!evex")
1649 0 : (eq_attr "memory" "none"))))
1650 0 : "c86-4g-m7-direct,c86-4g-m7-fpu")
1651 0 :
1652 0 : (define_insn_reservation "c86_4g_m7_avx_ssecmp_vp_load" 8
1653 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1654 0 : (and (eq_attr "type" "ssecmp")
1655 0 : (and (eq_attr "prefix" "!evex")
1656 0 : (eq_attr "memory" "load"))))
1657 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu")
1658 0 :
1659 0 : ;; VPTEST
1660 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_test" 6
1661 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1662 0 : (and (eq_attr "type" "ssecmp")
1663 0 : (and (eq_attr "mode" "TI,OI")
1664 0 : (and (eq_attr "c86_attr" "ptest")
1665 0 : (eq_attr "memory" "none")))))
1666 0 : "c86-4g-m7-double,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3")
1667 :
1668 : (define_insn_reservation "c86_4g_m7_avx512_ssecmp_test_load" 13
1669 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1670 0 : (and (eq_attr "type" "ssecmp")
1671 0 : (and (eq_attr "mode" "TI,OI")
1672 0 : (and (eq_attr "c86_attr" "ptest")
1673 0 : (eq_attr "memory" "load")))))
1674 0 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu,c86-4g-m7-fpu_1_3")
1675 0 :
1676 0 : ;; SSECVT
1677 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecvt_xy" 4
1678 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1679 0 : (and (eq_attr "type" "ssecvt")
1680 0 : (and (eq_attr "c86_attr" "other")
1681 0 : (and (eq_attr "prefix" "evex")
1682 0 : (and (eq_attr "mode" "TI,V4SF,V2DF,OI,V8SF,V4DF")
1683 0 : (and (not (ior (match_operand:V8DI 1 "register_operand")
1684 : (match_operand:V8DF 1 "register_operand")))
1685 : (eq_attr "memory" "none")))))))
1686 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
1687 :
1688 : (define_insn_reservation "c86_4g_m7_avx512_ssecvt_xy_load" 11
1689 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1690 0 : (and (eq_attr "type" "ssecvt")
1691 0 : (and (eq_attr "prefix" "evex")
1692 0 : (and (eq_attr "c86_attr" "other")
1693 0 : (and (eq_attr "mode" "TI,V4SF,V2DF,OI,V8SF,V4DF")
1694 0 : (and (not (ior (match_operand:V8DI 1 "register_operand")
1695 0 : (match_operand:V8DF 1 "register_operand")))
1696 0 : (eq_attr "memory" "!none")))))))
1697 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
1698 0 :
1699 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecvt_y_z" 8
1700 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1701 0 : (and (eq_attr "type" "ssecvt")
1702 0 : (and (eq_attr "mode" "OI,V8SF,V4DF")
1703 : (and (eq_attr "c86_attr" "other")
1704 : (and (ior (match_operand:V8DI 1 "register_operand")
1705 : (match_operand:V8DF 1 "register_operand"))
1706 0 : (eq_attr "memory" "none"))))))
1707 0 : "c86-4g-m7-double,c86-4g-m7-fpu_1_3")
1708 :
1709 : (define_insn_reservation "c86_4g_m7_avx512_ssecvt_y_z_load" 15
1710 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1711 0 : (and (eq_attr "type" "ssecvt")
1712 0 : (and (eq_attr "mode" "OI,V8SF,V4DF")
1713 0 : (and (eq_attr "c86_attr" "other")
1714 : (and (ior (match_operand:V8DI 1 "memory_operand")
1715 0 : (match_operand:V8DF 1 "memory_operand"))
1716 0 : (eq_attr "memory" "!none"))))))
1717 0 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
1718 0 :
1719 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecvt_z" 4
1720 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1721 0 : (and (eq_attr "type" "ssecvt")
1722 0 : (and (eq_attr "c86_attr" "other")
1723 0 : (and (eq_attr "mode" "XI,V16SF,V8DF")
1724 0 : (eq_attr "memory" "none")))))
1725 0 : "c86-4g-m7-double,c86-4g-m7-fpu_1_3")
1726 0 :
1727 0 : (define_insn_reservation "c86_4g_m7_avx512_ssecvt_z_load" 11
1728 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1729 : (and (eq_attr "type" "ssecvt")
1730 : (and (eq_attr "c86_attr" "other")
1731 : (and (eq_attr "mode" "XI,V16SF,V8DF")
1732 : (eq_attr "memory" "!none")))))
1733 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_1_3")
1734 0 :
1735 0 : (define_insn_reservation "c86_4g_m7_avx_ssecvt" 4
1736 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1737 0 : (and (eq_attr "type" "ssecvt")
1738 0 : (and (eq_attr "prefix" "!evex")
1739 0 : (and (eq_attr "mmx_isa" "base")
1740 0 : (eq_attr "memory" "none")))))
1741 0 : "c86-4g-m7-direct,c86-4g-m7-fpu2|c86-4g-m7-fpu3")
1742 0 :
1743 0 : (define_insn_reservation "c86_4g_m7_avx_ssecvt_load" 11
1744 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1745 0 : (and (eq_attr "type" "ssecvt")
1746 0 : (and (eq_attr "prefix" "!evex")
1747 0 : (and (eq_attr "mmx_isa" "base")
1748 0 : (eq_attr "memory" "!none")))))
1749 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu2|c86-4g-m7-fpu3")
1750 0 :
1751 0 : ;; CVTPI
1752 0 : (define_insn_reservation "c86_4g_m7_sse_ssecvt_pspi" 4
1753 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1754 : (and (eq_attr "type" "ssecvt")
1755 : (and (eq_attr "mode" "SF,DI")
1756 : (eq_attr "memory" "none"))))
1757 0 : "c86-4g-m7-direct,c86-4g-m7-fpu1")
1758 :
1759 : (define_insn_reservation "c86_4g_m7_sse_ssecvt_pspi_load" 11
1760 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1761 : (and (eq_attr "type" "ssecvt")
1762 : (and (eq_attr "mode" "SF,DI")
1763 : (eq_attr "memory" "load"))))
1764 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu1")
1765 0 :
1766 0 : (define_insn_reservation "c86_4g_m7_sse_ssecvt_pi" 5
1767 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1768 0 : (and (eq_attr "type" "ssecvt")
1769 0 : (and (not (eq_attr "mode" "SF,DI"))
1770 0 : (and (eq_attr "mmx_isa" "native")
1771 0 : (eq_attr "memory" "none")))))
1772 0 : "c86-4g-m7-double,c86-4g-m7-fpu1,c86-4g-m7-fpu_0_1")
1773 0 :
1774 0 : (define_insn_reservation "c86_4g_m7_sse_ssecvt_pi_load" 12
1775 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1776 0 : (and (eq_attr "type" "ssecvt")
1777 0 : (and (not (eq_attr "mode" "SF,DI"))
1778 0 : (and (eq_attr "mmx_isa" "native")
1779 0 : (eq_attr "memory" "load")))))
1780 0 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu1,c86-4g-m7-fpu_0_1")
1781 0 :
1782 0 : ;; SSEMULADD
1783 0 : (define_insn_reservation "c86_4g_m7_avx512_muladd" 4
1784 0 : (and (eq_attr "cpu" "c86_4g_m7")
1785 0 : (and (eq_attr "type" "ssemuladd")
1786 0 : (and (eq_attr "c86_attr" "other")
1787 0 : (eq_attr "memory" "none"))))
1788 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1789 0 :
1790 0 : (define_insn_reservation "c86_4g_m7_avx512_muladd_load" 11
1791 0 : (and (eq_attr "cpu" "c86_4g_m7")
1792 0 : (and (eq_attr "type" "ssemuladd")
1793 0 : (and (eq_attr "c86_attr" "other")
1794 0 : (eq_attr "memory" "load"))))
1795 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1796 0 :
1797 0 : (define_insn_reservation "c86_4g_m8_avx512_muladd" 5
1798 0 : (and (eq_attr "cpu" "c86_4g_m8")
1799 0 : (and (eq_attr "type" "ssemuladd")
1800 0 : (and (eq_attr "c86_attr" "other")
1801 0 : (eq_attr "memory" "none"))))
1802 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1803 0 :
1804 0 : (define_insn_reservation "c86_4g_m8_avx512_muladd_load" 12
1805 0 : (and (eq_attr "cpu" "c86_4g_m8")
1806 0 : (and (eq_attr "type" "ssemuladd")
1807 0 : (and (eq_attr "c86_attr" "other")
1808 0 : (eq_attr "memory" "load"))))
1809 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1810 0 :
1811 0 : (define_insn_reservation "c86_4g_m7_avx512_muladd_madd" 4
1812 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1813 0 : (and (eq_attr "type" "ssemuladd,sse")
1814 0 : (and (eq_attr "c86_attr" "madd,rcp")
1815 0 : (and (eq_attr "prefix" "evex")
1816 0 : (eq_attr "memory" "none")))))
1817 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1818 0 :
1819 0 : (define_insn_reservation "c86_4g_m7_avx512_muladd_madd_load" 11
1820 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1821 0 : (and (eq_attr "type" "ssemuladd,sse")
1822 0 : (and (eq_attr "c86_attr" "madd,rcp")
1823 0 : (and (eq_attr "prefix" "evex")
1824 0 : (eq_attr "memory" "load")))))
1825 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1826 0 :
1827 0 : ;; SSE
1828 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_range" 1
1829 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1830 0 : (and (eq_attr "type" "sse")
1831 0 : (and (eq_attr "c86_attr" "other")
1832 : (and (eq_attr "length_immediate" "!1")
1833 : (and (eq_attr "prefix" "evex")
1834 : (and (eq_attr "c86_decode" "direct")
1835 0 : (eq_attr "memory" "none")))))))
1836 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_2")
1837 :
1838 : (define_insn_reservation "c86_4g_m7_avx512_sse_range_load" 8
1839 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1840 0 : (and (eq_attr "type" "sse")
1841 0 : (and (eq_attr "c86_attr" "other")
1842 0 : (and (eq_attr "length_immediate" "!1")
1843 0 : (and (eq_attr "c86_decode" "direct")
1844 0 : (and (eq_attr "prefix" "evex")
1845 0 : (eq_attr "memory" "load")))))))
1846 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_2")
1847 0 :
1848 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_conflict_x" 2
1849 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1850 0 : (and (eq_attr "type" "sse")
1851 0 : (and (eq_attr "c86_decode" "vector")
1852 0 : (and (eq_attr "mode" "TI")
1853 0 : (eq_attr "memory" "none")))))
1854 0 : "c86-4g-m7-vector,c86-4g-m7-fpu_1_3x2")
1855 0 :
1856 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_conflict_x_load" 9
1857 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1858 0 : (and (eq_attr "type" "sse")
1859 0 : (and (eq_attr "c86_decode" "vector")
1860 0 : (and (eq_attr "mode" "TI")
1861 0 : (eq_attr "memory" "load")))))
1862 0 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu_1_3x2")
1863 0 :
1864 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_conflict_y" 5
1865 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1866 0 : (and (eq_attr "type" "sse")
1867 0 : (and (eq_attr "c86_decode" "vector")
1868 0 : (and (eq_attr "mode" "OI")
1869 0 : (eq_attr "memory" "none")))))
1870 0 : "c86-4g-m7-vector,c86-4g-m7-fpu_1_3x3")
1871 0 :
1872 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_conflict_y_load" 12
1873 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1874 0 : (and (eq_attr "type" "sse")
1875 0 : (and (eq_attr "c86_decode" "vector")
1876 0 : (and (eq_attr "mode" "OI")
1877 0 : (eq_attr "memory" "load")))))
1878 0 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu_1_3x3")
1879 0 :
1880 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_conflict_z" 8
1881 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1882 0 : (and (eq_attr "type" "sse")
1883 0 : (and (eq_attr "c86_decode" "vector")
1884 0 : (and (eq_attr "mode" "XI")
1885 0 : (eq_attr "memory" "none")))))
1886 0 : "c86-4g-m7-vector,c86-4g-m7-fpu_1_3x6")
1887 0 :
1888 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_conflict_z_load" 15
1889 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1890 0 : (and (eq_attr "type" "sse")
1891 0 : (and (eq_attr "c86_decode" "vector")
1892 0 : (and (eq_attr "mode" "XI")
1893 0 : (eq_attr "memory" "load")))))
1894 0 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu_1_3x6")
1895 :
1896 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_class" 4
1897 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1898 0 : (and (eq_attr "type" "sse")
1899 : (and (eq_attr "c86_attr" "other")
1900 : (and (eq_attr "length_immediate" "1")
1901 : (and (not (eq_attr "mode" "V32HF,V16SF,V8DF"))
1902 : (eq_attr "memory" "none"))))))
1903 : "c86-4g-m7-double,c86-4g-m7-fpu_1_3,c86-4g-m7-fpu_1_3")
1904 0 :
1905 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_class_load" 11
1906 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1907 0 : (and (eq_attr "type" "sse")
1908 0 : (and (eq_attr "c86_attr" "other")
1909 0 : (and (eq_attr "length_immediate" "1")
1910 0 : (and (not (eq_attr "mode" "V32HF,V16SF,V8DF"))
1911 0 : (eq_attr "memory" "load"))))))
1912 0 : "c86-4g-m7-double,c86-4g-m7-load,c86-4g-m7-fpu_1_3,c86-4g-m7-fpu_1_3")
1913 0 :
1914 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_class_z" 4
1915 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1916 0 : (and (eq_attr "type" "sse")
1917 0 : (and (eq_attr "c86_attr" "other")
1918 0 : (and (eq_attr "length_immediate" "1")
1919 0 : (and (eq_attr "mode" "V32HF,V16SF,V8DF")
1920 0 : (eq_attr "memory" "none"))))))
1921 0 : "c86-4g-m7-vector,c86-4g-m7-fpu_1_3,c86-4g-m7-fpu_1_3")
1922 0 :
1923 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_class_z_load" 11
1924 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1925 0 : (and (eq_attr "type" "sse")
1926 0 : (and (eq_attr "c86_attr" "other")
1927 0 : (and (eq_attr "length_immediate" "1")
1928 0 : (and (eq_attr "mode" "V32HF,V16SF,V8DF")
1929 0 : (eq_attr "memory" "load"))))))
1930 0 : "c86-4g-m7-vector,c86-4g-m7-load,c86-4g-m7-fpu_1_3,c86-4g-m7-fpu_1_3")
1931 0 :
1932 0 : (define_insn_reservation "c86_4g_m7_avx_sse" 5
1933 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1934 0 : (and (eq_attr "type" "sse")
1935 0 : (and (eq_attr "c86_attr" "rcp,other")
1936 0 : (and (eq_attr "prefix" "!evex")
1937 0 : (eq_attr "memory" "none")))))
1938 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_0_1")
1939 0 :
1940 0 : (define_insn_reservation "c86_4g_m7_avx_sse_load" 12
1941 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1942 0 : (and (eq_attr "type" "sse")
1943 0 : (and (eq_attr "c86_attr" "rcp,other")
1944 0 : (and (eq_attr "prefix" "!evex")
1945 0 : (eq_attr "memory" "load")))))
1946 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fpu_0_1")
1947 0 :
1948 0 : ;; SSE SQRT
1949 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_sf_x" 14
1950 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1951 0 : (and (eq_attr "type" "sse")
1952 0 : (and (eq_attr "mode" "SF,V4SF")
1953 0 : (and (eq_attr "c86_attr" "sqrt")
1954 0 : (eq_attr "memory" "none")))))
1955 0 : "c86-4g-m7-direct,c86-4g-m7-fp1div1_fp3div3_x4x9")
1956 0 :
1957 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_sf_xload" 21
1958 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1959 0 : (and (eq_attr "type" "sse")
1960 : (and (eq_attr "mode" "SF,V4SF")
1961 : (and (eq_attr "c86_attr" "sqrt")
1962 : (eq_attr "memory" "load")))))
1963 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp1div1_fp3div3_x4x9")
1964 :
1965 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_sf_y" 14
1966 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1967 0 : (and (eq_attr "type" "sse")
1968 0 : (and (eq_attr "mode" "V8SF")
1969 0 : (and (eq_attr "c86_attr" "sqrt")
1970 0 : (eq_attr "memory" "none")))))
1971 0 : "c86-4g-m7-direct,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*9")
1972 0 :
1973 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_sf_yload" 21
1974 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1975 0 : (and (eq_attr "type" "sse")
1976 0 : (and (eq_attr "mode" "V8SF")
1977 0 : (and (eq_attr "c86_attr" "sqrt")
1978 0 : (eq_attr "memory" "load")))))
1979 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*9")
1980 0 :
1981 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_sf_z" 26
1982 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1983 0 : (and (eq_attr "type" "sse")
1984 0 : (and (eq_attr "mode" "V16SF")
1985 0 : (and (eq_attr "c86_attr" "sqrt")
1986 0 : (eq_attr "memory" "none")))))
1987 : "c86-4g-m7-direct,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*22")
1988 :
1989 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_sf_zload" 33
1990 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1991 : (and (eq_attr "type" "sse")
1992 : (and (eq_attr "mode" "V16SF")
1993 : (and (eq_attr "c86_attr" "sqrt")
1994 : (eq_attr "memory" "load")))))
1995 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*22")
1996 0 :
1997 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_df_x" 20
1998 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
1999 0 : (and (eq_attr "type" "sse")
2000 0 : (and (eq_attr "mode" "DF,V2DF")
2001 0 : (and (eq_attr "c86_attr" "sqrt")
2002 0 : (eq_attr "memory" "none")))))
2003 0 : "c86-4g-m7-direct,c86-4g-m7-fp1div1_fp3div3_x4x15")
2004 0 :
2005 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_df_xload" 27
2006 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2007 0 : (and (eq_attr "type" "sse")
2008 0 : (and (eq_attr "mode" "DF,V2DF")
2009 0 : (and (eq_attr "c86_attr" "sqrt")
2010 0 : (eq_attr "memory" "load")))))
2011 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp1div1_fp3div3_x4x15")
2012 0 :
2013 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_df_y" 20
2014 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2015 0 : (and (eq_attr "type" "sse")
2016 0 : (and (eq_attr "mode" "V4DF")
2017 0 : (and (eq_attr "c86_attr" "sqrt")
2018 0 : (eq_attr "memory" "none")))))
2019 0 : "c86-4g-m7-direct,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*15")
2020 0 :
2021 0 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_df_yload" 27
2022 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2023 0 : (and (eq_attr "type" "sse")
2024 0 : (and (eq_attr "mode" "V4DF")
2025 0 : (and (eq_attr "c86_attr" "sqrt")
2026 0 : (eq_attr "memory" "load")))))
2027 0 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*15")
2028 0 :
2029 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_df_z" 38
2030 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2031 : (and (eq_attr "type" "sse")
2032 0 : (and (eq_attr "mode" "V8DF")
2033 : (and (eq_attr "c86_attr" "sqrt")
2034 : (eq_attr "memory" "none")))))
2035 : "c86-4g-m7-direct,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*34")
2036 0 :
2037 : (define_insn_reservation "c86_4g_m7_avx512_sse_sqrt_df_zload" 45
2038 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2039 0 : (and (eq_attr "type" "sse")
2040 0 : (and (eq_attr "mode" "V8DF")
2041 : (and (eq_attr "c86_attr" "sqrt")
2042 : (eq_attr "memory" "load")))))
2043 : "c86-4g-m7-direct,c86-4g-m7-load,c86-4g-m7-fp13div13x4,c86-4g-m7-fdiv13*34")
2044 :
2045 0 : ;; MSKLOG/MSKMOV
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2047 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2048 0 : (and (eq_attr "type" "msklog")
2049 0 : (eq_attr "c86_decode" "direct")))
2050 0 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
2051 0 :
2052 0 : (define_insn_reservation "c86_4g_m7_avx512_msklog_vector" 4
2053 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2054 0 : (and (eq_attr "type" "msklog")
2055 0 : (eq_attr "c86_decode" "vector")))
2056 0 : "c86-4g-m7-vector,c86-4g-m7-fpu_1_3")
2057 0 :
2058 : (define_insn_reservation "c86_4g_m7_avx512_mskmov_reg_k" 1
2059 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2060 0 : (and (eq_attr "type" "mskmov")
2061 0 : (and (match_operand 0 "register_operand" "r")
2062 0 : (eq_attr "memory" "none"))))
2063 0 : "c86-4g-m7-double,c86-4g-m7-fpu3,c86-4g-m7-fpu_1_3")
2064 0 :
2065 0 : (define_insn_reservation "c86_4g_m7_avx512_mskmov_xy_k" 2
2066 0 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2067 0 : (and (eq_attr "type" "mskmov")
2068 0 : (ior (match_operand:V2DI 0 "register_operand" "v")
2069 0 : (match_operand:V4DI 0 "register_operand" "v"))))
2070 0 : "c86-4g-m7-double,c86-4g-m7-fpu3,c86-4g-m7-fpu_1_3")
2071 0 :
2072 : (define_insn_reservation "c86_4g_m7_avx512_mskmov_z_k" 3
2073 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2074 0 : (and (eq_attr "type" "mskmov")
2075 0 : (match_operand:V8DI 0 "register_operand" "v")))
2076 0 : "c86-4g-m7-vector,c86-4g-m7-fpu3,c86-4g-m7-fpu_1_3")
2077 0 :
2078 0 : (define_insn_reservation "c86_4g_m7_avx512_mskmov_k_k" 1
2079 : (and (eq_attr "cpu" "c86_4g_m7,c86_4g_m8")
2080 : (and (eq_attr "type" "mskmov")
2081 : (and (match_operand 0 "register_operand" "k")
2082 0 : (match_operand 1 "register_operand" "k"))))
2083 : "c86-4g-m7-direct,c86-4g-m7-fpu_1_3")
2084 0 :
2085 0 : (define_insn_reservation "c86_4g_m7_avx512_mskmov_k_reg" 3
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2089 0 : (match_operand 1 "register_operand" "r"))))
2090 0 : "c86-4g-m7-double,c86-4g-m7-fpu1,c86-4g-m7-fpu_1_3")
2091 0 :
2092 0 : (define_insn_reservation "c86_4g_m7_avx512_mskmov_k_m" 9
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2095 0 : (and (match_operand 0 "register_operand" "k")
2096 0 : (match_operand 1 "memory_operand"))))
2097 0 : "c86-4g-m7-direct,c86-4g-m7-load")
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