Line data Source code
1 : /*
2 : * Copyright (C) 2007-2026 Free Software Foundation, Inc.
3 : *
4 : * This file is free software; you can redistribute it and/or modify it
5 : * under the terms of the GNU General Public License as published by the
6 : * Free Software Foundation; either version 3, or (at your option) any
7 : * later version.
8 : *
9 : * This file is distributed in the hope that it will be useful, but
10 : * WITHOUT ANY WARRANTY; without even the implied warranty of
11 : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 : * General Public License for more details.
13 : *
14 : * Under Section 7 of GPL version 3, you are granted additional
15 : * permissions described in the GCC Runtime Library Exception, version
16 : * 3.1, as published by the Free Software Foundation.
17 : *
18 : * You should have received a copy of the GNU General Public License and
19 : * a copy of the GCC Runtime Library Exception along with this program;
20 : * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
21 : * <http://www.gnu.org/licenses/>.
22 : */
23 :
24 : #ifndef _CPUID_H_INCLUDED
25 : #define _CPUID_H_INCLUDED
26 :
27 : /* %ecx */
28 : #define bit_SSE3 (1 << 0)
29 : #define bit_PCLMUL (1 << 1)
30 : #define bit_LZCNT (1 << 5)
31 : #define bit_SSSE3 (1 << 9)
32 : #define bit_FMA (1 << 12)
33 : #define bit_CMPXCHG16B (1 << 13)
34 : #define bit_SSE4_1 (1 << 19)
35 : #define bit_SSE4_2 (1 << 20)
36 : #define bit_MOVBE (1 << 22)
37 : #define bit_POPCNT (1 << 23)
38 : #define bit_AES (1 << 25)
39 : #define bit_XSAVE (1 << 26)
40 : #define bit_OSXSAVE (1 << 27)
41 : #define bit_AVX (1 << 28)
42 : #define bit_F16C (1 << 29)
43 : #define bit_RDRND (1 << 30)
44 :
45 : /* %edx */
46 : #define bit_CMPXCHG8B (1 << 8)
47 : #define bit_CMOV (1 << 15)
48 : #define bit_MMX (1 << 23)
49 : #define bit_FXSAVE (1 << 24)
50 : #define bit_SSE (1 << 25)
51 : #define bit_SSE2 (1 << 26)
52 :
53 : /* Extended Features (%eax == 0x80000001) */
54 : /* %ecx */
55 : #define bit_LAHF_LM (1 << 0)
56 : #define bit_ABM (1 << 5)
57 : #define bit_SSE4a (1 << 6)
58 : #define bit_PRFCHW (1 << 8)
59 : #define bit_XOP (1 << 11)
60 : #define bit_LWP (1 << 15)
61 : #define bit_FMA4 (1 << 16)
62 : #define bit_TBM (1 << 21)
63 : #define bit_MWAITX (1 << 29)
64 :
65 : /* %edx */
66 : #define bit_MMXEXT (1 << 22)
67 : #define bit_LM (1 << 29)
68 : #define bit_3DNOWP (1 << 30)
69 : #define bit_3DNOW (1u << 31)
70 :
71 : /* %ebx */
72 : #define bit_CLZERO (1 << 0)
73 : #define bit_WBNOINVD (1 << 9)
74 :
75 : /* Extended Features (%eax == 0x80000021) */
76 : /* %eax */
77 : #define bit_AMD_PREFETCHI (1 << 20)
78 :
79 : /* Extended Features Leaf (%eax == 7, %ecx == 0) */
80 : /* %ebx */
81 : #define bit_FSGSBASE (1 << 0)
82 : #define bit_SGX (1 << 2)
83 : #define bit_BMI (1 << 3)
84 : #define bit_HLE (1 << 4)
85 : #define bit_AVX2 (1 << 5)
86 : #define bit_BMI2 (1 << 8)
87 : #define bit_RTM (1 << 11)
88 : #define bit_AVX512F (1 << 16)
89 : #define bit_AVX512DQ (1 << 17)
90 : #define bit_RDSEED (1 << 18)
91 : #define bit_ADX (1 << 19)
92 : #define bit_AVX512IFMA (1 << 21)
93 : #define bit_CLFLUSHOPT (1 << 23)
94 : #define bit_CLWB (1 << 24)
95 : #define bit_AVX512CD (1 << 28)
96 : #define bit_SHA (1 << 29)
97 : #define bit_AVX512BW (1 << 30)
98 : #define bit_AVX512VL (1u << 31)
99 :
100 : /* %ecx */
101 : #define bit_AVX512VBMI (1 << 1)
102 : #define bit_PKU (1 << 3)
103 : #define bit_OSPKE (1 << 4)
104 : #define bit_WAITPKG (1 << 5)
105 : #define bit_AVX512VBMI2 (1 << 6)
106 : #define bit_SHSTK (1 << 7)
107 : #define bit_GFNI (1 << 8)
108 : #define bit_VAES (1 << 9)
109 : #define bit_VPCLMULQDQ (1 << 10)
110 : #define bit_AVX512VNNI (1 << 11)
111 : #define bit_AVX512BITALG (1 << 12)
112 : #define bit_AVX512VPOPCNTDQ (1 << 14)
113 : #define bit_RDPID (1 << 22)
114 : #define bit_KL (1 << 23)
115 : #define bit_CLDEMOTE (1 << 25)
116 : #define bit_MOVDIRI (1 << 27)
117 : #define bit_MOVDIR64B (1 << 28)
118 : #define bit_ENQCMD (1 << 29)
119 :
120 : /* %edx */
121 : #define bit_UINTR (1 << 5)
122 : #define bit_AVX512VP2INTERSECT (1 << 8)
123 : #define bit_SERIALIZE (1 << 14)
124 : #define bit_TSXLDTRK (1 << 16)
125 : #define bit_PCONFIG (1 << 18)
126 : #define bit_IBT (1 << 20)
127 : #define bit_AMX_BF16 (1 << 22)
128 : #define bit_AVX512FP16 (1 << 23)
129 : #define bit_AMX_TILE (1 << 24)
130 : #define bit_AMX_INT8 (1 << 25)
131 :
132 : /* Extended Features Sub-leaf (%eax == 7, %ecx == 1) */
133 : /* %eax */
134 : #define bit_SHA512 (1 << 0)
135 : #define bit_SM3 (1 << 1)
136 : #define bit_SM4 (1 << 2)
137 : #define bit_RAOINT (1 << 3)
138 : #define bit_AVXVNNI (1 << 4)
139 : #define bit_AVX512BF16 (1 << 5)
140 : #define bit_CMPCCXADD (1 << 7)
141 : #define bit_AMX_COMPLEX (1 << 8)
142 : #define bit_AMX_FP16 (1 << 21)
143 : #define bit_HRESET (1 << 22)
144 : #define bit_AVXIFMA (1 << 23)
145 : #define bit_MOVRS (1 << 31)
146 :
147 : /* %edx */
148 : #define bit_AVXVNNIINT8 (1 << 4)
149 : #define bit_AVXNECONVERT (1 << 5)
150 : #define bit_AVXVNNIINT16 (1 << 10)
151 : #define bit_PREFETCHI (1 << 14)
152 : #define bit_USER_MSR (1 << 15)
153 : #define bit_AVX10 (1 << 19)
154 : #define bit_APX_F (1 << 21)
155 :
156 : /* Extended State Enumeration Sub-leaf (%eax == 0xd, %ecx == 1) */
157 : #define bit_XSAVEOPT (1 << 0)
158 : #define bit_XSAVEC (1 << 1)
159 : #define bit_XSAVES (1 << 3)
160 :
161 : /* PT sub leaf (%eax == 0x14, %ecx == 0) */
162 : /* %ebx */
163 : #define bit_PTWRITE (1 << 4)
164 :
165 : /* Keylocker leaf (%eax == 0x19) */
166 : /* %ebx */
167 : #define bit_AESKLE ( 1<<0 )
168 : #define bit_WIDEKL ( 1<<2 )
169 :
170 : /* Sub leaf (%eax == 0x21) */
171 : #define bit_AVX512BMM ( 1<<23 )
172 :
173 : /* AMX sub leaf (%eax == 0x1e, %ecx == 1) */
174 : /* %eax */
175 : #define bit_AMX_FP8 (1 << 4)
176 : #define bit_AMX_TF32 (1 << 6)
177 : #define bit_AMX_AVX512 (1 << 7)
178 : #define bit_AMX_MOVRS (1 << 8)
179 :
180 : /* Signatures for different CPU implementations as returned in uses
181 : of cpuid with level 0. */
182 : #define signature_AMD_ebx 0x68747541
183 : #define signature_AMD_ecx 0x444d4163
184 : #define signature_AMD_edx 0x69746e65
185 :
186 : #define signature_CENTAUR_ebx 0x746e6543
187 : #define signature_CENTAUR_ecx 0x736c7561
188 : #define signature_CENTAUR_edx 0x48727561
189 :
190 : #define signature_CYRIX_ebx 0x69727943
191 : #define signature_CYRIX_ecx 0x64616574
192 : #define signature_CYRIX_edx 0x736e4978
193 :
194 : #define signature_INTEL_ebx 0x756e6547
195 : #define signature_INTEL_ecx 0x6c65746e
196 : #define signature_INTEL_edx 0x49656e69
197 :
198 : #define signature_TM1_ebx 0x6e617254
199 : #define signature_TM1_ecx 0x55504361
200 : #define signature_TM1_edx 0x74656d73
201 :
202 : #define signature_TM2_ebx 0x756e6547
203 : #define signature_TM2_ecx 0x3638784d
204 : #define signature_TM2_edx 0x54656e69
205 :
206 : #define signature_NSC_ebx 0x646f6547
207 : #define signature_NSC_ecx 0x43534e20
208 : #define signature_NSC_edx 0x79622065
209 :
210 : #define signature_NEXGEN_ebx 0x4778654e
211 : #define signature_NEXGEN_ecx 0x6e657669
212 : #define signature_NEXGEN_edx 0x72446e65
213 :
214 : #define signature_RISE_ebx 0x65736952
215 : #define signature_RISE_ecx 0x65736952
216 : #define signature_RISE_edx 0x65736952
217 :
218 : #define signature_SIS_ebx 0x20536953
219 : #define signature_SIS_ecx 0x20536953
220 : #define signature_SIS_edx 0x20536953
221 :
222 : #define signature_UMC_ebx 0x20434d55
223 : #define signature_UMC_ecx 0x20434d55
224 : #define signature_UMC_edx 0x20434d55
225 :
226 : #define signature_VIA_ebx 0x20414956
227 : #define signature_VIA_ecx 0x20414956
228 : #define signature_VIA_edx 0x20414956
229 :
230 : #define signature_VORTEX_ebx 0x74726f56
231 : #define signature_VORTEX_ecx 0x436f5320
232 : #define signature_VORTEX_edx 0x36387865
233 :
234 : #define signature_SHANGHAI_ebx 0x68532020
235 : #define signature_SHANGHAI_ecx 0x20206961
236 : #define signature_SHANGHAI_edx 0x68676e61
237 :
238 : #ifndef __x86_64__
239 : /* At least one cpu (Winchip 2) does not set %ebx and %ecx
240 : for cpuid leaf 1. Forcibly zero the two registers before
241 : calling cpuid as a precaution. */
242 : #define __cpuid(level, a, b, c, d) \
243 : do { \
244 : if (__builtin_constant_p (level) && (level) != 1) \
245 : __asm__ __volatile__ ("cpuid\n\t" \
246 : : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
247 : : "0" (level)); \
248 : else \
249 : __asm__ __volatile__ ("cpuid\n\t" \
250 : : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
251 : : "0" (level), "1" (0), "2" (0)); \
252 : } while (0)
253 : #else
254 : #define __cpuid(level, a, b, c, d) \
255 : __asm__ __volatile__ ("cpuid\n\t" \
256 : : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
257 : : "0" (level))
258 : #endif
259 :
260 : #define __cpuid_count(level, count, a, b, c, d) \
261 : __asm__ __volatile__ ("cpuid\n\t" \
262 : : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
263 : : "0" (level), "2" (count))
264 :
265 :
266 : /* Return highest supported input value for cpuid instruction. ext can
267 : be either 0x0 or 0x80000000 to return highest supported value for
268 : basic or extended cpuid information. Function returns 0 if cpuid
269 : is not supported or whatever cpuid returns in eax register. If sig
270 : pointer is non-null, then first four bytes of the signature
271 : (as found in ebx register) are returned in location pointed by sig. */
272 :
273 : static __inline unsigned int
274 2696 : __get_cpuid_max (unsigned int __ext, unsigned int *__sig)
275 : {
276 2696 : unsigned int __eax, __ebx, __ecx, __edx;
277 :
278 : #ifndef __x86_64__
279 : /* See if we can use cpuid. On AMD64 we always can. */
280 : #if __GNUC__ >= 3
281 : __asm__ ("pushf{l|d}\n\t"
282 : "pushf{l|d}\n\t"
283 : "pop{l}\t%0\n\t"
284 : "mov{l}\t{%0, %1|%1, %0}\n\t"
285 : "xor{l}\t{%2, %0|%0, %2}\n\t"
286 : "push{l}\t%0\n\t"
287 : "popf{l|d}\n\t"
288 : "pushf{l|d}\n\t"
289 : "pop{l}\t%0\n\t"
290 : "popf{l|d}\n\t"
291 : : "=&r" (__eax), "=&r" (__ebx)
292 : : "i" (0x00200000));
293 : #else
294 : /* Host GCCs older than 3.0 weren't supporting Intel asm syntax
295 : nor alternatives in i386 code. */
296 : __asm__ ("pushfl\n\t"
297 : "pushfl\n\t"
298 : "popl\t%0\n\t"
299 : "movl\t%0, %1\n\t"
300 : "xorl\t%2, %0\n\t"
301 : "pushl\t%0\n\t"
302 : "popfl\n\t"
303 : "pushfl\n\t"
304 : "popl\t%0\n\t"
305 : "popfl\n\t"
306 : : "=&r" (__eax), "=&r" (__ebx)
307 : : "i" (0x00200000));
308 : #endif
309 :
310 : if (__builtin_expect (!((__eax ^ __ebx) & 0x00200000), 0))
311 : return 0;
312 : #endif
313 :
314 : /* Host supports cpuid. Return highest supported cpuid input value. */
315 2696 : __cpuid (__ext, __eax, __ebx, __ecx, __edx);
316 :
317 2696 : if (__sig)
318 : *__sig = __ebx;
319 :
320 2696 : return __eax;
321 : }
322 :
323 : /* Return cpuid data for requested cpuid leaf, as found in returned
324 : eax, ebx, ecx and edx registers. The function checks if cpuid is
325 : supported and returns 1 for valid cpuid information or 0 for
326 : unsupported cpuid leaf. All pointers are required to be non-null. */
327 :
328 : static __inline int
329 2696 : __get_cpuid (unsigned int __leaf,
330 : unsigned int *__eax, unsigned int *__ebx,
331 : unsigned int *__ecx, unsigned int *__edx)
332 : {
333 2696 : unsigned int __ext = __leaf & 0x80000000;
334 2696 : unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
335 :
336 2696 : if (__maxlevel == 0 || __maxlevel < __leaf)
337 : return 0;
338 :
339 2696 : __cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx);
340 2696 : return 1;
341 : }
342 :
343 : /* Same as above, but sub-leaf can be specified. */
344 :
345 : static __inline int
346 : __get_cpuid_count (unsigned int __leaf, unsigned int __subleaf,
347 : unsigned int *__eax, unsigned int *__ebx,
348 : unsigned int *__ecx, unsigned int *__edx)
349 : {
350 : unsigned int __ext = __leaf & 0x80000000;
351 : unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
352 :
353 : if (__builtin_expect (__maxlevel == 0, 0) || __maxlevel < __leaf)
354 : return 0;
355 :
356 : __cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
357 : return 1;
358 : }
359 :
360 : static __inline void
361 : __cpuidex (int __cpuid_info[4], int __leaf, int __subleaf)
362 : {
363 : __cpuid_count (__leaf, __subleaf, __cpuid_info[0], __cpuid_info[1],
364 : __cpuid_info[2], __cpuid_info[3]);
365 : }
366 :
367 : #endif /* _CPUID_H_INCLUDED */
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