Line data Source code
1 : /* Subroutines used for macro/preprocessor support on the ia-32.
2 : Copyright (C) 2008-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify
7 : it under the terms of the GNU General Public License as published by
8 : the Free Software Foundation; either version 3, or (at your option)
9 : any later version.
10 :
11 : GCC is distributed in the hope that it will be useful,
12 : but WITHOUT ANY WARRANTY; without even the implied warranty of
13 : MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 : GNU General Public License for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : #define IN_TARGET_CODE 1
21 :
22 : #include "config.h"
23 : #include "system.h"
24 : #include "coretypes.h"
25 : #include "target.h"
26 : #include "c-family/c-common.h"
27 : #include "memmodel.h"
28 : #include "tm_p.h"
29 : #include "c-family/c-pragma.h"
30 :
31 : static bool ix86_pragma_target_parse (tree, tree);
32 : static void ix86_target_macros_internal
33 : (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
34 : void (*def_or_undef) (cpp_reader *, const char *));
35 :
36 : /* Internal function to either define or undef the appropriate system
37 : macros. */
38 : static void
39 2421227 : ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
40 : HOST_WIDE_INT isa_flag2,
41 : enum processor_type arch,
42 : enum processor_type tune,
43 : enum fpmath_unit fpmath,
44 : void (*def_or_undef) (cpp_reader *,
45 : const char *))
46 : {
47 : /* For some of the k6/pentium variants there weren't separate ISA bits to
48 : identify which tune/arch flag was passed, so figure it out here. */
49 2421227 : size_t arch_len = strlen (ix86_arch_string);
50 2421227 : size_t tune_len = strlen (ix86_tune_string);
51 2421227 : int last_arch_char = ix86_arch_string[arch_len - 1];
52 2421227 : int last_tune_char = ix86_tune_string[tune_len - 1];
53 :
54 : /* Built-ins based on -march=. */
55 2421227 : switch (arch)
56 : {
57 : case PROCESSOR_I386:
58 : break;
59 0 : case PROCESSOR_I486:
60 0 : def_or_undef (parse_in, "__i486");
61 0 : def_or_undef (parse_in, "__i486__");
62 0 : break;
63 0 : case PROCESSOR_LAKEMONT:
64 : /* Intel MCU is based on Intel Pentium CPU. */
65 0 : case PROCESSOR_PENTIUM:
66 0 : def_or_undef (parse_in, "__i586");
67 0 : def_or_undef (parse_in, "__i586__");
68 0 : def_or_undef (parse_in, "__pentium");
69 0 : def_or_undef (parse_in, "__pentium__");
70 0 : if (isa_flag & OPTION_MASK_ISA_MMX)
71 0 : def_or_undef (parse_in, "__pentium_mmx__");
72 : break;
73 0 : case PROCESSOR_PENTIUMPRO:
74 0 : def_or_undef (parse_in, "__i686");
75 0 : def_or_undef (parse_in, "__i686__");
76 0 : def_or_undef (parse_in, "__pentiumpro");
77 0 : def_or_undef (parse_in, "__pentiumpro__");
78 0 : break;
79 0 : case PROCESSOR_GEODE:
80 0 : def_or_undef (parse_in, "__geode");
81 0 : def_or_undef (parse_in, "__geode__");
82 0 : break;
83 0 : case PROCESSOR_K6:
84 0 : def_or_undef (parse_in, "__k6");
85 0 : def_or_undef (parse_in, "__k6__");
86 0 : if (last_arch_char == '2')
87 0 : def_or_undef (parse_in, "__k6_2__");
88 0 : else if (last_arch_char == '3')
89 0 : def_or_undef (parse_in, "__k6_3__");
90 0 : else if (isa_flag & OPTION_MASK_ISA_3DNOW)
91 0 : def_or_undef (parse_in, "__k6_3__");
92 : break;
93 0 : case PROCESSOR_ATHLON:
94 0 : def_or_undef (parse_in, "__athlon");
95 0 : def_or_undef (parse_in, "__athlon__");
96 0 : if (isa_flag & OPTION_MASK_ISA_SSE)
97 0 : def_or_undef (parse_in, "__athlon_sse__");
98 : break;
99 210894 : case PROCESSOR_K8:
100 210894 : def_or_undef (parse_in, "__k8");
101 210894 : def_or_undef (parse_in, "__k8__");
102 210894 : break;
103 40 : case PROCESSOR_AMDFAM10:
104 40 : def_or_undef (parse_in, "__amdfam10");
105 40 : def_or_undef (parse_in, "__amdfam10__");
106 40 : break;
107 5 : case PROCESSOR_BDVER1:
108 5 : def_or_undef (parse_in, "__bdver1");
109 5 : def_or_undef (parse_in, "__bdver1__");
110 5 : break;
111 12 : case PROCESSOR_BDVER2:
112 12 : def_or_undef (parse_in, "__bdver2");
113 12 : def_or_undef (parse_in, "__bdver2__");
114 12 : break;
115 0 : case PROCESSOR_BDVER3:
116 0 : def_or_undef (parse_in, "__bdver3");
117 0 : def_or_undef (parse_in, "__bdver3__");
118 0 : break;
119 16 : case PROCESSOR_BDVER4:
120 16 : def_or_undef (parse_in, "__bdver4");
121 16 : def_or_undef (parse_in, "__bdver4__");
122 16 : break;
123 7 : case PROCESSOR_ZNVER1:
124 7 : def_or_undef (parse_in, "__znver1");
125 7 : def_or_undef (parse_in, "__znver1__");
126 7 : break;
127 21 : case PROCESSOR_ZNVER2:
128 21 : def_or_undef (parse_in, "__znver2");
129 21 : def_or_undef (parse_in, "__znver2__");
130 21 : break;
131 6 : case PROCESSOR_ZNVER3:
132 6 : def_or_undef (parse_in, "__znver3");
133 6 : def_or_undef (parse_in, "__znver3__");
134 6 : break;
135 15 : case PROCESSOR_ZNVER4:
136 15 : def_or_undef (parse_in, "__znver4");
137 15 : def_or_undef (parse_in, "__znver4__");
138 15 : break;
139 18 : case PROCESSOR_ZNVER5:
140 18 : def_or_undef (parse_in, "__znver5");
141 18 : def_or_undef (parse_in, "__znver5__");
142 18 : break;
143 0 : case PROCESSOR_ZNVER6:
144 0 : def_or_undef (parse_in, "__znver6");
145 0 : def_or_undef (parse_in, "__znver6__");
146 0 : break;
147 0 : case PROCESSOR_BTVER1:
148 0 : def_or_undef (parse_in, "__btver1");
149 0 : def_or_undef (parse_in, "__btver1__");
150 0 : break;
151 2 : case PROCESSOR_BTVER2:
152 2 : def_or_undef (parse_in, "__btver2");
153 2 : def_or_undef (parse_in, "__btver2__");
154 2 : break;
155 0 : case PROCESSOR_LUJIAZUI:
156 0 : def_or_undef (parse_in, "__lujiazui");
157 0 : def_or_undef (parse_in, "__lujiazui__");
158 0 : break;
159 0 : case PROCESSOR_YONGFENG:
160 0 : def_or_undef (parse_in, "__yongfeng");
161 0 : def_or_undef (parse_in, "__yongfeng__");
162 0 : break;
163 0 : case PROCESSOR_SHIJIDADAO:
164 0 : def_or_undef (parse_in, "__shijidadao");
165 0 : def_or_undef (parse_in, "__shijidadao__");
166 0 : break;
167 0 : case PROCESSOR_PENTIUM4:
168 0 : def_or_undef (parse_in, "__pentium4");
169 0 : def_or_undef (parse_in, "__pentium4__");
170 0 : break;
171 8 : case PROCESSOR_NOCONA:
172 8 : def_or_undef (parse_in, "__nocona");
173 8 : def_or_undef (parse_in, "__nocona__");
174 8 : break;
175 17 : case PROCESSOR_CORE2:
176 17 : def_or_undef (parse_in, "__core2");
177 17 : def_or_undef (parse_in, "__core2__");
178 17 : break;
179 18 : case PROCESSOR_NEHALEM:
180 18 : def_or_undef (parse_in, "__corei7");
181 18 : def_or_undef (parse_in, "__corei7__");
182 18 : def_or_undef (parse_in, "__nehalem");
183 18 : def_or_undef (parse_in, "__nehalem__");
184 18 : break;
185 3 : case PROCESSOR_SANDYBRIDGE:
186 3 : def_or_undef (parse_in, "__corei7_avx");
187 3 : def_or_undef (parse_in, "__corei7_avx__");
188 3 : def_or_undef (parse_in, "__sandybridge");
189 3 : def_or_undef (parse_in, "__sandybridge__");
190 3 : break;
191 79 : case PROCESSOR_HASWELL:
192 79 : def_or_undef (parse_in, "__core_avx2");
193 79 : def_or_undef (parse_in, "__core_avx2__");
194 79 : def_or_undef (parse_in, "__haswell");
195 79 : def_or_undef (parse_in, "__haswell__");
196 79 : break;
197 19 : case PROCESSOR_BONNELL:
198 19 : def_or_undef (parse_in, "__atom");
199 19 : def_or_undef (parse_in, "__atom__");
200 19 : def_or_undef (parse_in, "__bonnell");
201 19 : def_or_undef (parse_in, "__bonnell__");
202 19 : break;
203 8 : case PROCESSOR_SILVERMONT:
204 8 : def_or_undef (parse_in, "__slm");
205 8 : def_or_undef (parse_in, "__slm__");
206 8 : def_or_undef (parse_in, "__silvermont");
207 8 : def_or_undef (parse_in, "__silvermont__");
208 8 : break;
209 3 : case PROCESSOR_GOLDMONT:
210 3 : def_or_undef (parse_in, "__goldmont");
211 3 : def_or_undef (parse_in, "__goldmont__");
212 3 : break;
213 0 : case PROCESSOR_GOLDMONT_PLUS:
214 0 : def_or_undef (parse_in, "__goldmont_plus");
215 0 : def_or_undef (parse_in, "__goldmont_plus__");
216 0 : break;
217 0 : case PROCESSOR_TREMONT:
218 0 : def_or_undef (parse_in, "__tremont");
219 0 : def_or_undef (parse_in, "__tremont__");
220 0 : break;
221 5 : case PROCESSOR_SIERRAFOREST:
222 5 : def_or_undef (parse_in, "__sierraforest");
223 5 : def_or_undef (parse_in, "__sierraforest__");
224 5 : break;
225 0 : case PROCESSOR_GRANDRIDGE:
226 0 : def_or_undef (parse_in, "__grandridge");
227 0 : def_or_undef (parse_in, "__grandridge__");
228 0 : break;
229 0 : case PROCESSOR_CLEARWATERFOREST:
230 0 : def_or_undef (parse_in, "__clearwaterforest");
231 0 : def_or_undef (parse_in, "__clearwaterforest__");
232 0 : break;
233 : break;
234 63 : case PROCESSOR_SKYLAKE:
235 63 : def_or_undef (parse_in, "__skylake");
236 63 : def_or_undef (parse_in, "__skylake__");
237 63 : break;
238 165 : case PROCESSOR_SKYLAKE_AVX512:
239 165 : def_or_undef (parse_in, "__skylake_avx512");
240 165 : def_or_undef (parse_in, "__skylake_avx512__");
241 165 : break;
242 11 : case PROCESSOR_CANNONLAKE:
243 11 : def_or_undef (parse_in, "__cannonlake");
244 11 : def_or_undef (parse_in, "__cannonlake__");
245 11 : break;
246 0 : case PROCESSOR_ICELAKE_CLIENT:
247 0 : def_or_undef (parse_in, "__icelake_client");
248 0 : def_or_undef (parse_in, "__icelake_client__");
249 0 : break;
250 12 : case PROCESSOR_ICELAKE_SERVER:
251 12 : def_or_undef (parse_in, "__icelake_server");
252 12 : def_or_undef (parse_in, "__icelake_server__");
253 12 : break;
254 17 : case PROCESSOR_CASCADELAKE:
255 17 : def_or_undef (parse_in, "__cascadelake");
256 17 : def_or_undef (parse_in, "__cascadelake__");
257 17 : break;
258 8 : case PROCESSOR_TIGERLAKE:
259 8 : def_or_undef (parse_in, "__tigerlake");
260 8 : def_or_undef (parse_in, "__tigerlake__");
261 8 : break;
262 2 : case PROCESSOR_COOPERLAKE:
263 2 : def_or_undef (parse_in, "__cooperlake");
264 2 : def_or_undef (parse_in, "__cooperlake__");
265 2 : break;
266 30 : case PROCESSOR_SAPPHIRERAPIDS:
267 30 : def_or_undef (parse_in, "__sapphirerapids");
268 30 : def_or_undef (parse_in, "__sapphirerapids__");
269 30 : break;
270 0 : case PROCESSOR_GRANITERAPIDS:
271 0 : def_or_undef (parse_in, "__graniterapids");
272 0 : def_or_undef (parse_in, "__graniterapids__");
273 0 : break;
274 0 : case PROCESSOR_GRANITERAPIDS_D:
275 0 : def_or_undef (parse_in, "__graniterapids_d");
276 0 : def_or_undef (parse_in, "__graniterapids_d__");
277 0 : break;
278 7 : case PROCESSOR_ALDERLAKE:
279 7 : def_or_undef (parse_in, "__alderlake");
280 7 : def_or_undef (parse_in, "__alderlake__");
281 7 : break;
282 0 : case PROCESSOR_ROCKETLAKE:
283 0 : def_or_undef (parse_in, "__rocketlake");
284 0 : def_or_undef (parse_in, "__rocketlake__");
285 0 : break;
286 0 : case PROCESSOR_ARROWLAKE:
287 0 : def_or_undef (parse_in, "__arrowlake");
288 0 : def_or_undef (parse_in, "__arrowlake__");
289 0 : break;
290 0 : case PROCESSOR_ARROWLAKE_S:
291 0 : def_or_undef (parse_in, "__arrowlake_s");
292 0 : def_or_undef (parse_in, "__arrowlake_s__");
293 0 : break;
294 0 : case PROCESSOR_PANTHERLAKE:
295 0 : def_or_undef (parse_in, "__pantherlake");
296 0 : def_or_undef (parse_in, "__pantherlake__");
297 0 : break;
298 0 : case PROCESSOR_DIAMONDRAPIDS:
299 0 : def_or_undef (parse_in, "__diamondrapids");
300 0 : def_or_undef (parse_in, "__diamondrapids__");
301 0 : break;
302 0 : case PROCESSOR_NOVALAKE:
303 0 : def_or_undef (parse_in, "__novalake");
304 0 : def_or_undef (parse_in, "__novalake__");
305 0 : break;
306 0 : case PROCESSOR_C86_4G_M4:
307 0 : def_or_undef (parse_in, "__c86_4g_m4");
308 0 : def_or_undef (parse_in, "__c86_4g_m4__");
309 0 : break;
310 0 : case PROCESSOR_C86_4G_M6:
311 0 : def_or_undef (parse_in, "__c86_4g_m6");
312 0 : def_or_undef (parse_in, "__c86_4g_m6__");
313 0 : break;
314 4 : case PROCESSOR_C86_4G_M7:
315 4 : def_or_undef (parse_in, "__c86_4g_m7");
316 4 : def_or_undef (parse_in, "__c86_4g_m7__");
317 4 : break;
318 0 : case PROCESSOR_C86_4G_M8:
319 0 : def_or_undef (parse_in, "__c86_4g_m8");
320 0 : def_or_undef (parse_in, "__c86_4g_m8__");
321 0 : break;
322 : /* use PROCESSOR_max to not set/unset the arch macro. */
323 : case PROCESSOR_max:
324 : break;
325 0 : case PROCESSOR_INTEL:
326 0 : case PROCESSOR_GENERIC:
327 0 : gcc_unreachable ();
328 : }
329 :
330 : /* Built-ins based on -mtune=. */
331 2421227 : switch (tune)
332 : {
333 0 : case PROCESSOR_I386:
334 0 : def_or_undef (parse_in, "__tune_i386__");
335 0 : break;
336 0 : case PROCESSOR_I486:
337 0 : def_or_undef (parse_in, "__tune_i486__");
338 0 : break;
339 0 : case PROCESSOR_PENTIUM:
340 0 : def_or_undef (parse_in, "__tune_i586__");
341 0 : def_or_undef (parse_in, "__tune_pentium__");
342 0 : if (last_tune_char == 'x')
343 0 : def_or_undef (parse_in, "__tune_pentium_mmx__");
344 : break;
345 0 : case PROCESSOR_PENTIUMPRO:
346 0 : def_or_undef (parse_in, "__tune_i686__");
347 0 : def_or_undef (parse_in, "__tune_pentiumpro__");
348 0 : switch (last_tune_char)
349 : {
350 0 : case '3':
351 0 : def_or_undef (parse_in, "__tune_pentium3__");
352 : /* FALLTHRU */
353 0 : case '2':
354 0 : def_or_undef (parse_in, "__tune_pentium2__");
355 0 : break;
356 : }
357 : break;
358 0 : case PROCESSOR_GEODE:
359 0 : def_or_undef (parse_in, "__tune_geode__");
360 0 : break;
361 0 : case PROCESSOR_K6:
362 0 : def_or_undef (parse_in, "__tune_k6__");
363 0 : if (last_tune_char == '2')
364 0 : def_or_undef (parse_in, "__tune_k6_2__");
365 0 : else if (last_tune_char == '3')
366 0 : def_or_undef (parse_in, "__tune_k6_3__");
367 0 : else if (isa_flag & OPTION_MASK_ISA_3DNOW)
368 0 : def_or_undef (parse_in, "__tune_k6_3__");
369 : break;
370 0 : case PROCESSOR_ATHLON:
371 0 : def_or_undef (parse_in, "__tune_athlon__");
372 0 : if (isa_flag & OPTION_MASK_ISA_SSE)
373 0 : def_or_undef (parse_in, "__tune_athlon_sse__");
374 : break;
375 101 : case PROCESSOR_K8:
376 101 : def_or_undef (parse_in, "__tune_k8__");
377 101 : break;
378 52 : case PROCESSOR_AMDFAM10:
379 52 : def_or_undef (parse_in, "__tune_amdfam10__");
380 52 : break;
381 7 : case PROCESSOR_BDVER1:
382 7 : def_or_undef (parse_in, "__tune_bdver1__");
383 7 : break;
384 12 : case PROCESSOR_BDVER2:
385 12 : def_or_undef (parse_in, "__tune_bdver2__");
386 12 : break;
387 0 : case PROCESSOR_BDVER3:
388 0 : def_or_undef (parse_in, "__tune_bdver3__");
389 0 : break;
390 17 : case PROCESSOR_BDVER4:
391 17 : def_or_undef (parse_in, "__tune_bdver4__");
392 17 : break;
393 11 : case PROCESSOR_ZNVER1:
394 11 : def_or_undef (parse_in, "__tune_znver1__");
395 11 : break;
396 21 : case PROCESSOR_ZNVER2:
397 21 : def_or_undef (parse_in, "__tune_znver2__");
398 21 : break;
399 9 : case PROCESSOR_ZNVER3:
400 9 : def_or_undef (parse_in, "__tune_znver3__");
401 9 : break;
402 17 : case PROCESSOR_ZNVER4:
403 17 : def_or_undef (parse_in, "__tune_znver4__");
404 17 : break;
405 21 : case PROCESSOR_ZNVER5:
406 21 : def_or_undef (parse_in, "__tune_znver5__");
407 21 : break;
408 0 : case PROCESSOR_ZNVER6:
409 0 : def_or_undef (parse_in, "__tune_znver6__");
410 0 : break;
411 0 : case PROCESSOR_BTVER1:
412 0 : def_or_undef (parse_in, "__tune_btver1__");
413 0 : break;
414 4 : case PROCESSOR_BTVER2:
415 4 : def_or_undef (parse_in, "__tune_btver2__");
416 4 : break;
417 0 : case PROCESSOR_LUJIAZUI:
418 0 : def_or_undef (parse_in, "__tune_lujiazui__");
419 0 : break;
420 0 : case PROCESSOR_YONGFENG:
421 0 : def_or_undef (parse_in, "__tune_yongfeng__");
422 0 : break;
423 0 : case PROCESSOR_SHIJIDADAO:
424 0 : def_or_undef (parse_in, "__tune_shijidadao__");
425 0 : break;
426 0 : case PROCESSOR_PENTIUM4:
427 0 : def_or_undef (parse_in, "__tune_pentium4__");
428 0 : break;
429 10 : case PROCESSOR_NOCONA:
430 10 : def_or_undef (parse_in, "__tune_nocona__");
431 10 : break;
432 63 : case PROCESSOR_CORE2:
433 63 : def_or_undef (parse_in, "__tune_core2__");
434 63 : break;
435 37 : case PROCESSOR_NEHALEM:
436 37 : def_or_undef (parse_in, "__tune_corei7__");
437 37 : def_or_undef (parse_in, "__tune_nehalem__");
438 37 : break;
439 16 : case PROCESSOR_SANDYBRIDGE:
440 16 : def_or_undef (parse_in, "__tune_corei7_avx__");
441 16 : def_or_undef (parse_in, "__tune_sandybridge__");
442 16 : break;
443 96 : case PROCESSOR_HASWELL:
444 96 : def_or_undef (parse_in, "__tune_core_avx2__");
445 96 : def_or_undef (parse_in, "__tune_haswell__");
446 96 : break;
447 36 : case PROCESSOR_BONNELL:
448 36 : def_or_undef (parse_in, "__tune_atom__");
449 36 : def_or_undef (parse_in, "__tune_bonnell__");
450 36 : break;
451 18 : case PROCESSOR_SILVERMONT:
452 18 : def_or_undef (parse_in, "__tune_slm__");
453 18 : def_or_undef (parse_in, "__tune_silvermont__");
454 18 : break;
455 9 : case PROCESSOR_GOLDMONT:
456 9 : def_or_undef (parse_in, "__tune_goldmont__");
457 9 : break;
458 0 : case PROCESSOR_GOLDMONT_PLUS:
459 0 : def_or_undef (parse_in, "__tune_goldmont_plus__");
460 0 : break;
461 0 : case PROCESSOR_TREMONT:
462 0 : def_or_undef (parse_in, "__tune_tremont__");
463 0 : break;
464 5 : case PROCESSOR_SIERRAFOREST:
465 5 : def_or_undef (parse_in, "__tune_sierraforest__");
466 5 : break;
467 0 : case PROCESSOR_GRANDRIDGE:
468 0 : def_or_undef (parse_in, "__tune_grandridge__");
469 0 : break;
470 0 : case PROCESSOR_CLEARWATERFOREST:
471 0 : def_or_undef (parse_in, "__tune_clearwaterforest__");
472 0 : break;
473 84 : case PROCESSOR_SKYLAKE:
474 84 : def_or_undef (parse_in, "__tune_skylake__");
475 84 : break;
476 190 : case PROCESSOR_SKYLAKE_AVX512:
477 190 : def_or_undef (parse_in, "__tune_skylake_avx512__");
478 190 : break;
479 11 : case PROCESSOR_CANNONLAKE:
480 11 : def_or_undef (parse_in, "__tune_cannonlake__");
481 11 : break;
482 0 : case PROCESSOR_ICELAKE_CLIENT:
483 0 : def_or_undef (parse_in, "__tune_icelake_client__");
484 0 : break;
485 22 : case PROCESSOR_ICELAKE_SERVER:
486 22 : def_or_undef (parse_in, "__tune_icelake_server__");
487 22 : break;
488 0 : case PROCESSOR_LAKEMONT:
489 0 : def_or_undef (parse_in, "__tune_lakemont__");
490 0 : break;
491 17 : case PROCESSOR_CASCADELAKE:
492 17 : def_or_undef (parse_in, "__tune_cascadelake__");
493 17 : break;
494 8 : case PROCESSOR_TIGERLAKE:
495 8 : def_or_undef (parse_in, "__tune_tigerlake__");
496 8 : break;
497 2 : case PROCESSOR_COOPERLAKE:
498 2 : def_or_undef (parse_in, "__tune_cooperlake__");
499 2 : break;
500 33 : case PROCESSOR_SAPPHIRERAPIDS:
501 33 : def_or_undef (parse_in, "__tune_sapphirerapids__");
502 33 : break;
503 7 : case PROCESSOR_ALDERLAKE:
504 7 : def_or_undef (parse_in, "__tune_alderlake__");
505 7 : break;
506 0 : case PROCESSOR_ROCKETLAKE:
507 0 : def_or_undef (parse_in, "__tune_rocketlake__");
508 0 : break;
509 0 : case PROCESSOR_GRANITERAPIDS:
510 0 : def_or_undef (parse_in, "__tune_graniterapids__");
511 0 : break;
512 0 : case PROCESSOR_GRANITERAPIDS_D:
513 0 : def_or_undef (parse_in, "__tune_graniterapids_d__");
514 0 : break;
515 0 : case PROCESSOR_ARROWLAKE:
516 0 : def_or_undef (parse_in, "__tune_arrowlake__");
517 0 : break;
518 0 : case PROCESSOR_ARROWLAKE_S:
519 0 : def_or_undef (parse_in, "__tune_arrowlake_s__");
520 0 : break;
521 0 : case PROCESSOR_PANTHERLAKE:
522 0 : def_or_undef (parse_in, "__tune_pantherlake__");
523 0 : break;
524 0 : case PROCESSOR_DIAMONDRAPIDS:
525 0 : def_or_undef (parse_in, "__tune_diamondrapids__");
526 0 : break;
527 0 : case PROCESSOR_NOVALAKE:
528 0 : def_or_undef (parse_in, "__tune_novalake__");
529 0 : break;
530 0 : case PROCESSOR_C86_4G_M4:
531 0 : def_or_undef (parse_in, "__tune_c86_4g_m4__");
532 0 : break;
533 0 : case PROCESSOR_C86_4G_M6:
534 0 : def_or_undef (parse_in, "__tune_c86_4g_m6__");
535 0 : break;
536 5 : case PROCESSOR_C86_4G_M7:
537 5 : def_or_undef (parse_in, "__tune_c86_4g_m7__");
538 5 : break;
539 0 : case PROCESSOR_C86_4G_M8:
540 0 : def_or_undef (parse_in, "__tune_c86_4g_m8__");
541 0 : break;
542 : case PROCESSOR_INTEL:
543 : case PROCESSOR_GENERIC:
544 : break;
545 : /* use PROCESSOR_max to not set/unset the tune macro. */
546 : case PROCESSOR_max:
547 : break;
548 : }
549 :
550 2421227 : switch (ix86_cmodel)
551 : {
552 2376106 : case CM_SMALL:
553 2376106 : case CM_SMALL_PIC:
554 2376106 : def_or_undef (parse_in, "__code_model_small__");
555 2376106 : break;
556 862 : case CM_MEDIUM:
557 862 : case CM_MEDIUM_PIC:
558 862 : def_or_undef (parse_in, "__code_model_medium__");
559 862 : break;
560 488 : case CM_LARGE:
561 488 : case CM_LARGE_PIC:
562 488 : def_or_undef (parse_in, "__code_model_large__");
563 488 : break;
564 43770 : case CM_32:
565 43770 : def_or_undef (parse_in, "__code_model_32__");
566 43770 : break;
567 1 : case CM_KERNEL:
568 1 : def_or_undef (parse_in, "__code_model_kernel__");
569 1 : break;
570 2421227 : default:
571 2421227 : ;
572 : }
573 :
574 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD)
575 10584 : def_or_undef (parse_in, "__WBNOINVD__");
576 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT)
577 20828 : def_or_undef (parse_in, "__AVX512VP2INTERSECT__");
578 2421227 : if (isa_flag & OPTION_MASK_ISA_MMX)
579 220388 : def_or_undef (parse_in, "__MMX__");
580 2421227 : if (isa_flag & OPTION_MASK_ISA_3DNOW)
581 2847 : def_or_undef (parse_in, "__3dNOW__");
582 2421227 : if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
583 1504 : def_or_undef (parse_in, "__3dNOW_A__");
584 2421227 : if (isa_flag & OPTION_MASK_ISA_SSE)
585 222279 : def_or_undef (parse_in, "__SSE__");
586 2421227 : if (isa_flag & OPTION_MASK_ISA_SSE2)
587 222176 : def_or_undef (parse_in, "__SSE2__");
588 2421227 : if (isa_flag & OPTION_MASK_ISA_SSE3)
589 95966 : def_or_undef (parse_in, "__SSE3__");
590 2421227 : if (isa_flag & OPTION_MASK_ISA_SSSE3)
591 94060 : def_or_undef (parse_in, "__SSSE3__");
592 2421227 : if (isa_flag & OPTION_MASK_ISA_SSE4_1)
593 93047 : def_or_undef (parse_in, "__SSE4_1__");
594 2421227 : if (isa_flag & OPTION_MASK_ISA_SSE4_2)
595 93297 : def_or_undef (parse_in, "__SSE4_2__");
596 2421227 : if (isa_flag & OPTION_MASK_ISA_AES)
597 10792 : def_or_undef (parse_in, "__AES__");
598 2421227 : if (isa_flag & OPTION_MASK_ISA_SHA)
599 10489 : def_or_undef (parse_in, "__SHA__");
600 2421227 : if (isa_flag & OPTION_MASK_ISA_PCLMUL)
601 31381 : def_or_undef (parse_in, "__PCLMUL__");
602 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX)
603 92908 : def_or_undef (parse_in, "__AVX__");
604 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX2)
605 147194 : def_or_undef (parse_in, "__AVX2__");
606 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512F)
607 177592 : def_or_undef (parse_in, "__AVX512F__");
608 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512CD)
609 91173 : def_or_undef (parse_in, "__AVX512CD__");
610 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
611 104831 : def_or_undef (parse_in, "__AVX512DQ__");
612 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512BW)
613 183835 : def_or_undef (parse_in, "__AVX512BW__");
614 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512VL)
615 : {
616 180570 : def_or_undef (parse_in, "__AVX512VL__");
617 180570 : def_or_undef (parse_in, "__EVEX256__");
618 : }
619 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
620 91420 : def_or_undef (parse_in, "__AVX512VBMI__");
621 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
622 91469 : def_or_undef (parse_in, "__AVX512IFMA__");
623 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
624 90836 : def_or_undef (parse_in, "__AVX512VBMI2__");
625 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
626 91469 : def_or_undef (parse_in, "__AVX512VNNI__");
627 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG)
628 10534 : def_or_undef (parse_in, "__PCONFIG__");
629 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_SGX)
630 10773 : def_or_undef (parse_in, "__SGX__");
631 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
632 91383 : def_or_undef (parse_in, "__AVX512BITALG__");
633 2421227 : if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ)
634 91457 : def_or_undef (parse_in, "__AVX512VPOPCNTDQ__");
635 2421227 : if (isa_flag & OPTION_MASK_ISA_FMA)
636 11422 : def_or_undef (parse_in, "__FMA__");
637 2421227 : if (isa_flag & OPTION_MASK_ISA_RTM)
638 20400 : def_or_undef (parse_in, "__RTM__");
639 2421227 : if (isa_flag & OPTION_MASK_ISA_SSE4A)
640 4203 : def_or_undef (parse_in, "__SSE4A__");
641 2421227 : if (isa_flag & OPTION_MASK_ISA_FMA4)
642 2804 : def_or_undef (parse_in, "__FMA4__");
643 2421227 : if (isa_flag & OPTION_MASK_ISA_XOP)
644 1509 : def_or_undef (parse_in, "__XOP__");
645 2421227 : if (isa_flag & OPTION_MASK_ISA_LWP)
646 10541 : def_or_undef (parse_in, "__LWP__");
647 2421227 : if (isa_flag & OPTION_MASK_ISA_ABM)
648 163 : def_or_undef (parse_in, "__ABM__");
649 2421227 : if (isa_flag & OPTION_MASK_ISA_BMI)
650 11119 : def_or_undef (parse_in, "__BMI__");
651 2421227 : if (isa_flag & OPTION_MASK_ISA_BMI2)
652 11101 : def_or_undef (parse_in, "__BMI2__");
653 2421227 : if (isa_flag & OPTION_MASK_ISA_LZCNT)
654 11044 : def_or_undef (parse_in, "__LZCNT__");
655 2421227 : if (isa_flag & OPTION_MASK_ISA_TBM)
656 10530 : def_or_undef (parse_in, "__TBM__");
657 2421227 : if (isa_flag & OPTION_MASK_ISA_CRC32)
658 87615 : def_or_undef (parse_in, "__CRC32__");
659 2421227 : if (isa_flag & OPTION_MASK_ISA_POPCNT)
660 85503 : def_or_undef (parse_in, "__POPCNT__");
661 2421227 : if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
662 10725 : def_or_undef (parse_in, "__FSGSBASE__");
663 2421227 : if (isa_flag & OPTION_MASK_ISA_RDRND)
664 21114 : def_or_undef (parse_in, "__RDRND__");
665 2421227 : if (isa_flag & OPTION_MASK_ISA_F16C)
666 11282 : def_or_undef (parse_in, "__F16C__");
667 2421227 : if (isa_flag & OPTION_MASK_ISA_RDSEED)
668 10840 : def_or_undef (parse_in, "__RDSEED__");
669 2421227 : if (isa_flag & OPTION_MASK_ISA_PRFCHW)
670 493 : def_or_undef (parse_in, "__PRFCHW__");
671 2421227 : if (isa_flag & OPTION_MASK_ISA_ADX)
672 417 : def_or_undef (parse_in, "__ADX__");
673 2421227 : if (isa_flag & OPTION_MASK_ISA_FXSR)
674 211514 : def_or_undef (parse_in, "__FXSR__");
675 2421227 : if (isa_flag & OPTION_MASK_ISA_XSAVE)
676 82777 : def_or_undef (parse_in, "__XSAVE__");
677 2421227 : if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
678 10916 : def_or_undef (parse_in, "__XSAVEOPT__");
679 2421227 : if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
680 216650 : def_or_undef (parse_in, "__SSE_MATH__");
681 1581196 : if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
682 216547 : def_or_undef (parse_in, "__SSE2_MATH__");
683 2421227 : if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
684 10843 : def_or_undef (parse_in, "__CLFLUSHOPT__");
685 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_CLZERO)
686 10573 : def_or_undef (parse_in, "__CLZERO__");
687 2421227 : if (isa_flag & OPTION_MASK_ISA_XSAVEC)
688 10842 : def_or_undef (parse_in, "__XSAVEC__");
689 2421227 : if (isa_flag & OPTION_MASK_ISA_XSAVES)
690 10842 : def_or_undef (parse_in, "__XSAVES__");
691 2421227 : if (isa_flag & OPTION_MASK_ISA_CLWB)
692 10773 : def_or_undef (parse_in, "__CLWB__");
693 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_MWAITX)
694 10589 : def_or_undef (parse_in, "__MWAITX__");
695 2421227 : if (isa_flag & OPTION_MASK_ISA_PKU)
696 10750 : def_or_undef (parse_in, "__PKU__");
697 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_RDPID)
698 10599 : def_or_undef (parse_in, "__RDPID__");
699 2421227 : if (isa_flag & OPTION_MASK_ISA_GFNI)
700 62095 : def_or_undef (parse_in, "__GFNI__");
701 2421227 : if ((isa_flag & OPTION_MASK_ISA_SHSTK))
702 29801 : def_or_undef (parse_in, "__SHSTK__");
703 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_VAES)
704 20911 : def_or_undef (parse_in, "__VAES__");
705 2421227 : if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
706 20902 : def_or_undef (parse_in, "__VPCLMULQDQ__");
707 2421227 : if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
708 10579 : def_or_undef (parse_in, "__MOVDIRI__");
709 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B)
710 10585 : def_or_undef (parse_in, "__MOVDIR64B__");
711 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG)
712 10552 : def_or_undef (parse_in, "__WAITPKG__");
713 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE)
714 10548 : def_or_undef (parse_in, "__CLDEMOTE__");
715 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_SERIALIZE)
716 10523 : def_or_undef (parse_in, "__SERIALIZE__");
717 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE)
718 10555 : def_or_undef (parse_in, "__PTWRITE__");
719 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16)
720 91447 : def_or_undef (parse_in, "__AVX512BF16__");
721 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512FP16)
722 83719 : def_or_undef (parse_in, "__AVX512FP16__");
723 2421227 : if (TARGET_MMX_WITH_SSE)
724 1566618 : def_or_undef (parse_in, "__MMX_WITH_SSE__");
725 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
726 10520 : def_or_undef (parse_in, "__ENQCMD__");
727 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK)
728 10513 : def_or_undef (parse_in, "__TSXLDTRK__");
729 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_TILE)
730 61012 : def_or_undef (parse_in, "__AMX_TILE__");
731 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_INT8)
732 10379 : def_or_undef (parse_in, "__AMX_INT8__");
733 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_BF16)
734 10391 : def_or_undef (parse_in, "__AMX_BF16__");
735 2421227 : if (isa_flag & OPTION_MASK_ISA_SAHF)
736 6293 : def_or_undef (parse_in, "__LAHF_SAHF__");
737 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_MOVBE)
738 824 : def_or_undef (parse_in, "__MOVBE__");
739 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_UINTR)
740 10334 : def_or_undef (parse_in, "__UINTR__");
741 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_HRESET)
742 10539 : def_or_undef (parse_in, "__HRESET__");
743 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_KL)
744 20817 : def_or_undef (parse_in, "__KL__");
745 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_WIDEKL)
746 10454 : def_or_undef (parse_in, "__WIDEKL__");
747 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNI)
748 10516 : def_or_undef (parse_in, "__AVXVNNI__");
749 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVXIFMA)
750 10443 : def_or_undef (parse_in, "__AVXIFMA__");
751 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT8)
752 10451 : def_or_undef (parse_in, "__AVXVNNIINT8__");
753 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVXNECONVERT)
754 10448 : def_or_undef (parse_in, "__AVXNECONVERT__");
755 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_CMPCCXADD)
756 10334 : def_or_undef (parse_in, "__CMPCCXADD__");
757 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP16)
758 22 : def_or_undef (parse_in, "__AMX_FP16__");
759 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_PREFETCHI)
760 10348 : def_or_undef (parse_in, "__PREFETCHI__");
761 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_RAOINT)
762 10501 : def_or_undef (parse_in, "__RAOINT__");
763 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_COMPLEX)
764 10379 : def_or_undef (parse_in, "__AMX_COMPLEX__");
765 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT16)
766 10447 : def_or_undef (parse_in, "__AVXVNNIINT16__");
767 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_SM3)
768 10435 : def_or_undef (parse_in, "__SM3__");
769 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_SHA512)
770 10435 : def_or_undef (parse_in, "__SHA512__");
771 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_SM4)
772 20801 : def_or_undef (parse_in, "__SM4__");
773 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_USER_MSR)
774 10353 : def_or_undef (parse_in, "__USER_MSR__");
775 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVX10_1)
776 71456 : def_or_undef (parse_in, "__AVX10_1__");
777 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_APX_F)
778 69 : def_or_undef (parse_in, "__APX_F__");
779 2421227 : if (ix86_apx_inline_asm_use_gpr32)
780 1 : def_or_undef (parse_in, "__APX_INLINE_ASM_USE_GPR32__");
781 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVX10_2)
782 71479 : def_or_undef (parse_in, "__AVX10_2__");
783 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_AVX512)
784 10440 : def_or_undef (parse_in, "__AMX_AVX512__");
785 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP8)
786 23 : def_or_undef (parse_in, "__AMX_FP8__");
787 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_MOVRS)
788 20580 : def_or_undef (parse_in, "__MOVRS__");
789 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_MOVRS)
790 10207 : def_or_undef (parse_in, "__AMX_MOVRS__");
791 2421227 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512BMM)
792 20830 : def_or_undef (parse_in, "__AVX512BMM__");
793 2421227 : if (TARGET_IAMCU)
794 : {
795 0 : def_or_undef (parse_in, "__iamcu");
796 0 : def_or_undef (parse_in, "__iamcu__");
797 : }
798 2421227 : }
799 :
800 :
801 : /* Hook to validate the current #pragma GCC target and set the state, and
802 : update the macros based on what was changed. If ARGS is NULL, then
803 : POP_TARGET is used to reset the options. */
804 :
805 : static bool
806 1105126 : ix86_pragma_target_parse (tree args, tree pop_target)
807 : {
808 1105126 : tree prev_tree
809 1105126 : = build_target_option_node (&global_options, &global_options_set);
810 1105126 : tree cur_tree;
811 1105126 : struct cl_target_option *prev_opt;
812 1105126 : struct cl_target_option *cur_opt;
813 1105126 : HOST_WIDE_INT prev_isa;
814 1105126 : HOST_WIDE_INT cur_isa;
815 1105126 : HOST_WIDE_INT diff_isa;
816 1105126 : HOST_WIDE_INT prev_isa2;
817 1105126 : HOST_WIDE_INT cur_isa2;
818 1105126 : HOST_WIDE_INT diff_isa2;
819 1105126 : enum processor_type prev_arch;
820 1105126 : enum processor_type prev_tune;
821 1105126 : enum processor_type cur_arch;
822 1105126 : enum processor_type cur_tune;
823 :
824 1105126 : if (! args)
825 : {
826 550092 : cur_tree = (pop_target ? pop_target : target_option_default_node);
827 550092 : cl_target_option_restore (&global_options, &global_options_set,
828 550092 : TREE_TARGET_OPTION (cur_tree));
829 : }
830 : else
831 : {
832 555034 : cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args,
833 : &global_options,
834 : &global_options_set, 0);
835 555034 : if (!cur_tree || cur_tree == error_mark_node)
836 : {
837 269 : cl_target_option_restore (&global_options, &global_options_set,
838 269 : TREE_TARGET_OPTION (prev_tree));
839 269 : return false;
840 : }
841 : }
842 :
843 1104857 : target_option_current_node = cur_tree;
844 1104857 : ix86_reset_previous_fndecl ();
845 :
846 : /* Figure out the previous/current isa, arch, tune and the differences. */
847 1104857 : prev_opt = TREE_TARGET_OPTION (prev_tree);
848 1104857 : cur_opt = TREE_TARGET_OPTION (cur_tree);
849 1104857 : prev_isa = prev_opt->x_ix86_isa_flags;
850 1104857 : cur_isa = cur_opt->x_ix86_isa_flags;
851 1104857 : diff_isa = (prev_isa ^ cur_isa);
852 1104857 : prev_isa2 = prev_opt->x_ix86_isa_flags2;
853 1104857 : cur_isa2 = cur_opt->x_ix86_isa_flags2;
854 1104857 : diff_isa2 = (prev_isa2 ^ cur_isa2);
855 1104857 : prev_arch = (enum processor_type) prev_opt->arch;
856 1104857 : prev_tune = (enum processor_type) prev_opt->tune;
857 1104857 : cur_arch = (enum processor_type) cur_opt->arch;
858 1104857 : cur_tune = (enum processor_type) cur_opt->tune;
859 :
860 : /* If the same processor is used for both previous and current options, don't
861 : change the macros. */
862 1104857 : if (cur_arch == prev_arch)
863 1104856 : cur_arch = prev_arch = PROCESSOR_max;
864 :
865 1104857 : if (cur_tune == prev_tune)
866 1104856 : cur_tune = prev_tune = PROCESSOR_max;
867 :
868 : /* Undef all of the macros for that are no longer current. */
869 1104857 : cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
870 1104857 : ix86_target_macros_internal (prev_isa & diff_isa,
871 : prev_isa2 & diff_isa2,
872 : prev_arch,
873 : prev_tune,
874 1104857 : (enum fpmath_unit) prev_opt->x_ix86_fpmath,
875 : cpp_undef);
876 1104857 : cpp_stop_forcing_token_locations (parse_in);
877 :
878 : /* For the definitions, ensure all newly defined macros are considered
879 : as used for -Wunused-macros. There is no point warning about the
880 : compiler predefined macros. */
881 1104857 : cpp_options *cpp_opts = cpp_get_options (parse_in);
882 1104857 : unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
883 1104857 : cpp_opts->warn_unused_macros = 0;
884 :
885 : /* Define all of the macros for new options that were just turned on. */
886 1104857 : cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
887 1104857 : ix86_target_macros_internal (cur_isa & diff_isa,
888 : cur_isa2 & diff_isa2,
889 : cur_arch,
890 : cur_tune,
891 1104857 : (enum fpmath_unit) cur_opt->x_ix86_fpmath,
892 : cpp_define);
893 1104857 : cpp_stop_forcing_token_locations (parse_in);
894 :
895 1104857 : cpp_opts->warn_unused_macros = saved_warn_unused_macros;
896 :
897 1104857 : return true;
898 : }
899 :
900 : /* Function to tell the preprocessor about the defines for the current target. */
901 :
902 : void
903 211513 : ix86_target_macros (void)
904 : {
905 : /* 32/64-bit won't change with target specific options, so do the assert and
906 : builtin_define_std calls here. */
907 211513 : if (TARGET_64BIT)
908 : {
909 206139 : cpp_assert (parse_in, "cpu=x86_64");
910 206139 : cpp_assert (parse_in, "machine=x86_64");
911 206139 : cpp_define (parse_in, "__amd64");
912 206139 : cpp_define (parse_in, "__amd64__");
913 206139 : cpp_define (parse_in, "__x86_64");
914 206139 : cpp_define (parse_in, "__x86_64__");
915 206139 : if (TARGET_X32)
916 : {
917 96 : cpp_define (parse_in, "_ILP32");
918 96 : cpp_define (parse_in, "__ILP32__");
919 : }
920 : }
921 : else
922 : {
923 5374 : cpp_assert (parse_in, "cpu=i386");
924 5374 : cpp_assert (parse_in, "machine=i386");
925 5374 : builtin_define_std ("i386");
926 5374 : cpp_define (parse_in, "_ILP32");
927 5374 : cpp_define (parse_in, "__ILP32__");
928 : }
929 :
930 211513 : if (!TARGET_80387)
931 226 : cpp_define (parse_in, "_SOFT_FLOAT");
932 :
933 : /* HFmode/BFmode is supported without depending any isa
934 : in scalar_mode_supported_p and libgcc_floating_mode_supported_p,
935 : but according to psABI, they're really supported w/ SSE2 and above.
936 : Since libstdc++ uses __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__
937 : for backend support of the types, undef the macros to avoid
938 : build failure, see PR109504. */
939 211513 : if (!TARGET_SSE2)
940 : {
941 404 : if (c_dialect_cxx () && cxx_dialect > cxx20)
942 : {
943 5 : cpp_undef (parse_in, "__STDCPP_FLOAT16_T__");
944 5 : cpp_undef (parse_in, "__STDCPP_BFLOAT16_T__");
945 : }
946 : }
947 :
948 211513 : if (TARGET_LONG_DOUBLE_64)
949 16 : cpp_define (parse_in, "__LONG_DOUBLE_64__");
950 :
951 211513 : if (TARGET_LONG_DOUBLE_128)
952 6 : cpp_define (parse_in, "__LONG_DOUBLE_128__");
953 :
954 211513 : cpp_define_formatted (parse_in, "__SIZEOF_FLOAT80__=%d",
955 211513 : GET_MODE_SIZE (XFmode));
956 :
957 211513 : cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
958 :
959 211513 : cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
960 211513 : cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
961 :
962 211513 : cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
963 :
964 211513 : ix86_target_macros_internal (ix86_isa_flags,
965 : ix86_isa_flags2,
966 : ix86_arch,
967 : ix86_tune,
968 : ix86_fpmath,
969 : cpp_define);
970 :
971 211513 : cpp_define (parse_in, "__SEG_FS");
972 211513 : cpp_define (parse_in, "__SEG_GS");
973 :
974 211513 : if (flag_cf_protection != CF_NONE)
975 19972 : cpp_define_formatted (parse_in, "__CET__=%d", flag_cf_protection & ~CF_SET);
976 211513 : }
977 :
978 :
979 : /* Register target pragmas. We need to add the hook for parsing #pragma GCC
980 : option here rather than in i386.cc since it will pull in various preprocessor
981 : functions, and those are not present in languages like fortran without a
982 : preprocessor. */
983 :
984 : void
985 212051 : ix86_register_pragmas (void)
986 : {
987 : /* Update pragma hook to allow parsing #pragma GCC target. */
988 212051 : targetm.target_option.pragma_parse = ix86_pragma_target_parse;
989 :
990 212051 : c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
991 212051 : c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
992 :
993 : #ifdef REGISTER_SUBTARGET_PRAGMAS
994 : REGISTER_SUBTARGET_PRAGMAS ();
995 : #endif
996 212051 : }
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