Line data Source code
1 : /* Subroutines used for macro/preprocessor support on the ia-32.
2 : Copyright (C) 2008-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify
7 : it under the terms of the GNU General Public License as published by
8 : the Free Software Foundation; either version 3, or (at your option)
9 : any later version.
10 :
11 : GCC is distributed in the hope that it will be useful,
12 : but WITHOUT ANY WARRANTY; without even the implied warranty of
13 : MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 : GNU General Public License for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : #define IN_TARGET_CODE 1
21 :
22 : #include "config.h"
23 : #include "system.h"
24 : #include "coretypes.h"
25 : #include "target.h"
26 : #include "c-family/c-common.h"
27 : #include "memmodel.h"
28 : #include "tm_p.h"
29 : #include "c-family/c-pragma.h"
30 :
31 : static bool ix86_pragma_target_parse (tree, tree);
32 : static void ix86_target_macros_internal
33 : (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
34 : void (*def_or_undef) (cpp_reader *, const char *));
35 :
36 : /* Internal function to either define or undef the appropriate system
37 : macros. */
38 : static void
39 2433293 : ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
40 : HOST_WIDE_INT isa_flag2,
41 : enum processor_type arch,
42 : enum processor_type tune,
43 : enum fpmath_unit fpmath,
44 : void (*def_or_undef) (cpp_reader *,
45 : const char *))
46 : {
47 : /* For some of the k6/pentium varients there weren't separate ISA bits to
48 : identify which tune/arch flag was passed, so figure it out here. */
49 2433293 : size_t arch_len = strlen (ix86_arch_string);
50 2433293 : size_t tune_len = strlen (ix86_tune_string);
51 2433293 : int last_arch_char = ix86_arch_string[arch_len - 1];
52 2433293 : int last_tune_char = ix86_tune_string[tune_len - 1];
53 :
54 : /* Built-ins based on -march=. */
55 2433293 : switch (arch)
56 : {
57 : case PROCESSOR_I386:
58 : break;
59 0 : case PROCESSOR_I486:
60 0 : def_or_undef (parse_in, "__i486");
61 0 : def_or_undef (parse_in, "__i486__");
62 0 : break;
63 0 : case PROCESSOR_LAKEMONT:
64 : /* Intel MCU is based on Intel Pentium CPU. */
65 0 : case PROCESSOR_PENTIUM:
66 0 : def_or_undef (parse_in, "__i586");
67 0 : def_or_undef (parse_in, "__i586__");
68 0 : def_or_undef (parse_in, "__pentium");
69 0 : def_or_undef (parse_in, "__pentium__");
70 0 : if (isa_flag & OPTION_MASK_ISA_MMX)
71 0 : def_or_undef (parse_in, "__pentium_mmx__");
72 : break;
73 0 : case PROCESSOR_PENTIUMPRO:
74 0 : def_or_undef (parse_in, "__i686");
75 0 : def_or_undef (parse_in, "__i686__");
76 0 : def_or_undef (parse_in, "__pentiumpro");
77 0 : def_or_undef (parse_in, "__pentiumpro__");
78 0 : break;
79 0 : case PROCESSOR_GEODE:
80 0 : def_or_undef (parse_in, "__geode");
81 0 : def_or_undef (parse_in, "__geode__");
82 0 : break;
83 0 : case PROCESSOR_K6:
84 0 : def_or_undef (parse_in, "__k6");
85 0 : def_or_undef (parse_in, "__k6__");
86 0 : if (last_arch_char == '2')
87 0 : def_or_undef (parse_in, "__k6_2__");
88 0 : else if (last_arch_char == '3')
89 0 : def_or_undef (parse_in, "__k6_3__");
90 0 : else if (isa_flag & OPTION_MASK_ISA_3DNOW)
91 0 : def_or_undef (parse_in, "__k6_3__");
92 : break;
93 0 : case PROCESSOR_ATHLON:
94 0 : def_or_undef (parse_in, "__athlon");
95 0 : def_or_undef (parse_in, "__athlon__");
96 0 : if (isa_flag & OPTION_MASK_ISA_SSE)
97 0 : def_or_undef (parse_in, "__athlon_sse__");
98 : break;
99 207025 : case PROCESSOR_K8:
100 207025 : def_or_undef (parse_in, "__k8");
101 207025 : def_or_undef (parse_in, "__k8__");
102 207025 : break;
103 40 : case PROCESSOR_AMDFAM10:
104 40 : def_or_undef (parse_in, "__amdfam10");
105 40 : def_or_undef (parse_in, "__amdfam10__");
106 40 : break;
107 5 : case PROCESSOR_BDVER1:
108 5 : def_or_undef (parse_in, "__bdver1");
109 5 : def_or_undef (parse_in, "__bdver1__");
110 5 : break;
111 12 : case PROCESSOR_BDVER2:
112 12 : def_or_undef (parse_in, "__bdver2");
113 12 : def_or_undef (parse_in, "__bdver2__");
114 12 : break;
115 0 : case PROCESSOR_BDVER3:
116 0 : def_or_undef (parse_in, "__bdver3");
117 0 : def_or_undef (parse_in, "__bdver3__");
118 0 : break;
119 16 : case PROCESSOR_BDVER4:
120 16 : def_or_undef (parse_in, "__bdver4");
121 16 : def_or_undef (parse_in, "__bdver4__");
122 16 : break;
123 7 : case PROCESSOR_ZNVER1:
124 7 : def_or_undef (parse_in, "__znver1");
125 7 : def_or_undef (parse_in, "__znver1__");
126 7 : break;
127 21 : case PROCESSOR_ZNVER2:
128 21 : def_or_undef (parse_in, "__znver2");
129 21 : def_or_undef (parse_in, "__znver2__");
130 21 : break;
131 6 : case PROCESSOR_ZNVER3:
132 6 : def_or_undef (parse_in, "__znver3");
133 6 : def_or_undef (parse_in, "__znver3__");
134 6 : break;
135 15 : case PROCESSOR_ZNVER4:
136 15 : def_or_undef (parse_in, "__znver4");
137 15 : def_or_undef (parse_in, "__znver4__");
138 15 : break;
139 18 : case PROCESSOR_ZNVER5:
140 18 : def_or_undef (parse_in, "__znver5");
141 18 : def_or_undef (parse_in, "__znver5__");
142 18 : break;
143 0 : case PROCESSOR_ZNVER6:
144 0 : def_or_undef (parse_in, "__znver6");
145 0 : def_or_undef (parse_in, "__znver6__");
146 0 : break;
147 0 : case PROCESSOR_BTVER1:
148 0 : def_or_undef (parse_in, "__btver1");
149 0 : def_or_undef (parse_in, "__btver1__");
150 0 : break;
151 2 : case PROCESSOR_BTVER2:
152 2 : def_or_undef (parse_in, "__btver2");
153 2 : def_or_undef (parse_in, "__btver2__");
154 2 : break;
155 0 : case PROCESSOR_LUJIAZUI:
156 0 : def_or_undef (parse_in, "__lujiazui");
157 0 : def_or_undef (parse_in, "__lujiazui__");
158 0 : break;
159 0 : case PROCESSOR_YONGFENG:
160 0 : def_or_undef (parse_in, "__yongfeng");
161 0 : def_or_undef (parse_in, "__yongfeng__");
162 0 : break;
163 0 : case PROCESSOR_SHIJIDADAO:
164 0 : def_or_undef (parse_in, "__shijidadao");
165 0 : def_or_undef (parse_in, "__shijidadao__");
166 0 : break;
167 0 : case PROCESSOR_PENTIUM4:
168 0 : def_or_undef (parse_in, "__pentium4");
169 0 : def_or_undef (parse_in, "__pentium4__");
170 0 : break;
171 8 : case PROCESSOR_NOCONA:
172 8 : def_or_undef (parse_in, "__nocona");
173 8 : def_or_undef (parse_in, "__nocona__");
174 8 : break;
175 17 : case PROCESSOR_CORE2:
176 17 : def_or_undef (parse_in, "__core2");
177 17 : def_or_undef (parse_in, "__core2__");
178 17 : break;
179 17 : case PROCESSOR_NEHALEM:
180 17 : def_or_undef (parse_in, "__corei7");
181 17 : def_or_undef (parse_in, "__corei7__");
182 17 : def_or_undef (parse_in, "__nehalem");
183 17 : def_or_undef (parse_in, "__nehalem__");
184 17 : break;
185 3 : case PROCESSOR_SANDYBRIDGE:
186 3 : def_or_undef (parse_in, "__corei7_avx");
187 3 : def_or_undef (parse_in, "__corei7_avx__");
188 3 : def_or_undef (parse_in, "__sandybridge");
189 3 : def_or_undef (parse_in, "__sandybridge__");
190 3 : break;
191 79 : case PROCESSOR_HASWELL:
192 79 : def_or_undef (parse_in, "__core_avx2");
193 79 : def_or_undef (parse_in, "__core_avx2__");
194 79 : def_or_undef (parse_in, "__haswell");
195 79 : def_or_undef (parse_in, "__haswell__");
196 79 : break;
197 19 : case PROCESSOR_BONNELL:
198 19 : def_or_undef (parse_in, "__atom");
199 19 : def_or_undef (parse_in, "__atom__");
200 19 : def_or_undef (parse_in, "__bonnell");
201 19 : def_or_undef (parse_in, "__bonnell__");
202 19 : break;
203 8 : case PROCESSOR_SILVERMONT:
204 8 : def_or_undef (parse_in, "__slm");
205 8 : def_or_undef (parse_in, "__slm__");
206 8 : def_or_undef (parse_in, "__silvermont");
207 8 : def_or_undef (parse_in, "__silvermont__");
208 8 : break;
209 3 : case PROCESSOR_GOLDMONT:
210 3 : def_or_undef (parse_in, "__goldmont");
211 3 : def_or_undef (parse_in, "__goldmont__");
212 3 : break;
213 0 : case PROCESSOR_GOLDMONT_PLUS:
214 0 : def_or_undef (parse_in, "__goldmont_plus");
215 0 : def_or_undef (parse_in, "__goldmont_plus__");
216 0 : break;
217 0 : case PROCESSOR_TREMONT:
218 0 : def_or_undef (parse_in, "__tremont");
219 0 : def_or_undef (parse_in, "__tremont__");
220 0 : break;
221 5 : case PROCESSOR_SIERRAFOREST:
222 5 : def_or_undef (parse_in, "__sierraforest");
223 5 : def_or_undef (parse_in, "__sierraforest__");
224 5 : break;
225 0 : case PROCESSOR_GRANDRIDGE:
226 0 : def_or_undef (parse_in, "__grandridge");
227 0 : def_or_undef (parse_in, "__grandridge__");
228 0 : break;
229 0 : case PROCESSOR_CLEARWATERFOREST:
230 0 : def_or_undef (parse_in, "__clearwaterforest");
231 0 : def_or_undef (parse_in, "__clearwaterforest__");
232 0 : break;
233 : break;
234 61 : case PROCESSOR_SKYLAKE:
235 61 : def_or_undef (parse_in, "__skylake");
236 61 : def_or_undef (parse_in, "__skylake__");
237 61 : break;
238 165 : case PROCESSOR_SKYLAKE_AVX512:
239 165 : def_or_undef (parse_in, "__skylake_avx512");
240 165 : def_or_undef (parse_in, "__skylake_avx512__");
241 165 : break;
242 11 : case PROCESSOR_CANNONLAKE:
243 11 : def_or_undef (parse_in, "__cannonlake");
244 11 : def_or_undef (parse_in, "__cannonlake__");
245 11 : break;
246 0 : case PROCESSOR_ICELAKE_CLIENT:
247 0 : def_or_undef (parse_in, "__icelake_client");
248 0 : def_or_undef (parse_in, "__icelake_client__");
249 0 : break;
250 12 : case PROCESSOR_ICELAKE_SERVER:
251 12 : def_or_undef (parse_in, "__icelake_server");
252 12 : def_or_undef (parse_in, "__icelake_server__");
253 12 : break;
254 17 : case PROCESSOR_CASCADELAKE:
255 17 : def_or_undef (parse_in, "__cascadelake");
256 17 : def_or_undef (parse_in, "__cascadelake__");
257 17 : break;
258 8 : case PROCESSOR_TIGERLAKE:
259 8 : def_or_undef (parse_in, "__tigerlake");
260 8 : def_or_undef (parse_in, "__tigerlake__");
261 8 : break;
262 2 : case PROCESSOR_COOPERLAKE:
263 2 : def_or_undef (parse_in, "__cooperlake");
264 2 : def_or_undef (parse_in, "__cooperlake__");
265 2 : break;
266 30 : case PROCESSOR_SAPPHIRERAPIDS:
267 30 : def_or_undef (parse_in, "__sapphirerapids");
268 30 : def_or_undef (parse_in, "__sapphirerapids__");
269 30 : break;
270 0 : case PROCESSOR_GRANITERAPIDS:
271 0 : def_or_undef (parse_in, "__graniterapids");
272 0 : def_or_undef (parse_in, "__graniterapids__");
273 0 : break;
274 0 : case PROCESSOR_GRANITERAPIDS_D:
275 0 : def_or_undef (parse_in, "__graniterapids_d");
276 0 : def_or_undef (parse_in, "__graniterapids_d__");
277 0 : break;
278 7 : case PROCESSOR_ALDERLAKE:
279 7 : def_or_undef (parse_in, "__alderlake");
280 7 : def_or_undef (parse_in, "__alderlake__");
281 7 : break;
282 0 : case PROCESSOR_ROCKETLAKE:
283 0 : def_or_undef (parse_in, "__rocketlake");
284 0 : def_or_undef (parse_in, "__rocketlake__");
285 0 : break;
286 0 : case PROCESSOR_ARROWLAKE:
287 0 : def_or_undef (parse_in, "__arrowlake");
288 0 : def_or_undef (parse_in, "__arrowlake__");
289 0 : break;
290 0 : case PROCESSOR_ARROWLAKE_S:
291 0 : def_or_undef (parse_in, "__arrowlake_s");
292 0 : def_or_undef (parse_in, "__arrowlake_s__");
293 0 : break;
294 0 : case PROCESSOR_PANTHERLAKE:
295 0 : def_or_undef (parse_in, "__pantherlake");
296 0 : def_or_undef (parse_in, "__pantherlake__");
297 0 : break;
298 0 : case PROCESSOR_DIAMONDRAPIDS:
299 0 : def_or_undef (parse_in, "__diamondrapids");
300 0 : def_or_undef (parse_in, "__diamondrapids__");
301 0 : break;
302 0 : case PROCESSOR_NOVALAKE:
303 0 : def_or_undef (parse_in, "__novalake");
304 0 : def_or_undef (parse_in, "__novalake__");
305 0 : break;
306 :
307 : /* use PROCESSOR_max to not set/unset the arch macro. */
308 : case PROCESSOR_max:
309 : break;
310 0 : case PROCESSOR_INTEL:
311 0 : case PROCESSOR_GENERIC:
312 0 : gcc_unreachable ();
313 : }
314 :
315 : /* Built-ins based on -mtune=. */
316 2433293 : switch (tune)
317 : {
318 0 : case PROCESSOR_I386:
319 0 : def_or_undef (parse_in, "__tune_i386__");
320 0 : break;
321 0 : case PROCESSOR_I486:
322 0 : def_or_undef (parse_in, "__tune_i486__");
323 0 : break;
324 0 : case PROCESSOR_PENTIUM:
325 0 : def_or_undef (parse_in, "__tune_i586__");
326 0 : def_or_undef (parse_in, "__tune_pentium__");
327 0 : if (last_tune_char == 'x')
328 0 : def_or_undef (parse_in, "__tune_pentium_mmx__");
329 : break;
330 0 : case PROCESSOR_PENTIUMPRO:
331 0 : def_or_undef (parse_in, "__tune_i686__");
332 0 : def_or_undef (parse_in, "__tune_pentiumpro__");
333 0 : switch (last_tune_char)
334 : {
335 0 : case '3':
336 0 : def_or_undef (parse_in, "__tune_pentium3__");
337 : /* FALLTHRU */
338 0 : case '2':
339 0 : def_or_undef (parse_in, "__tune_pentium2__");
340 0 : break;
341 : }
342 : break;
343 0 : case PROCESSOR_GEODE:
344 0 : def_or_undef (parse_in, "__tune_geode__");
345 0 : break;
346 0 : case PROCESSOR_K6:
347 0 : def_or_undef (parse_in, "__tune_k6__");
348 0 : if (last_tune_char == '2')
349 0 : def_or_undef (parse_in, "__tune_k6_2__");
350 0 : else if (last_tune_char == '3')
351 0 : def_or_undef (parse_in, "__tune_k6_3__");
352 0 : else if (isa_flag & OPTION_MASK_ISA_3DNOW)
353 0 : def_or_undef (parse_in, "__tune_k6_3__");
354 : break;
355 0 : case PROCESSOR_ATHLON:
356 0 : def_or_undef (parse_in, "__tune_athlon__");
357 0 : if (isa_flag & OPTION_MASK_ISA_SSE)
358 0 : def_or_undef (parse_in, "__tune_athlon_sse__");
359 : break;
360 101 : case PROCESSOR_K8:
361 101 : def_or_undef (parse_in, "__tune_k8__");
362 101 : break;
363 52 : case PROCESSOR_AMDFAM10:
364 52 : def_or_undef (parse_in, "__tune_amdfam10__");
365 52 : break;
366 7 : case PROCESSOR_BDVER1:
367 7 : def_or_undef (parse_in, "__tune_bdver1__");
368 7 : break;
369 12 : case PROCESSOR_BDVER2:
370 12 : def_or_undef (parse_in, "__tune_bdver2__");
371 12 : break;
372 0 : case PROCESSOR_BDVER3:
373 0 : def_or_undef (parse_in, "__tune_bdver3__");
374 0 : break;
375 17 : case PROCESSOR_BDVER4:
376 17 : def_or_undef (parse_in, "__tune_bdver4__");
377 17 : break;
378 11 : case PROCESSOR_ZNVER1:
379 11 : def_or_undef (parse_in, "__tune_znver1__");
380 11 : break;
381 21 : case PROCESSOR_ZNVER2:
382 21 : def_or_undef (parse_in, "__tune_znver2__");
383 21 : break;
384 7 : case PROCESSOR_ZNVER3:
385 7 : def_or_undef (parse_in, "__tune_znver3__");
386 7 : break;
387 17 : case PROCESSOR_ZNVER4:
388 17 : def_or_undef (parse_in, "__tune_znver4__");
389 17 : break;
390 21 : case PROCESSOR_ZNVER5:
391 21 : def_or_undef (parse_in, "__tune_znver5__");
392 21 : break;
393 0 : case PROCESSOR_ZNVER6:
394 0 : def_or_undef (parse_in, "__tune_znver6__");
395 0 : break;
396 0 : case PROCESSOR_BTVER1:
397 0 : def_or_undef (parse_in, "__tune_btver1__");
398 0 : break;
399 4 : case PROCESSOR_BTVER2:
400 4 : def_or_undef (parse_in, "__tune_btver2__");
401 4 : break;
402 0 : case PROCESSOR_LUJIAZUI:
403 0 : def_or_undef (parse_in, "__tune_lujiazui__");
404 0 : break;
405 0 : case PROCESSOR_YONGFENG:
406 0 : def_or_undef (parse_in, "__tune_yongfeng__");
407 0 : break;
408 0 : case PROCESSOR_SHIJIDADAO:
409 0 : def_or_undef (parse_in, "__tune_shijidadao__");
410 0 : break;
411 0 : case PROCESSOR_PENTIUM4:
412 0 : def_or_undef (parse_in, "__tune_pentium4__");
413 0 : break;
414 10 : case PROCESSOR_NOCONA:
415 10 : def_or_undef (parse_in, "__tune_nocona__");
416 10 : break;
417 60 : case PROCESSOR_CORE2:
418 60 : def_or_undef (parse_in, "__tune_core2__");
419 60 : break;
420 25 : case PROCESSOR_NEHALEM:
421 25 : def_or_undef (parse_in, "__tune_corei7__");
422 25 : def_or_undef (parse_in, "__tune_nehalem__");
423 25 : break;
424 16 : case PROCESSOR_SANDYBRIDGE:
425 16 : def_or_undef (parse_in, "__tune_corei7_avx__");
426 16 : def_or_undef (parse_in, "__tune_sandybridge__");
427 16 : break;
428 96 : case PROCESSOR_HASWELL:
429 96 : def_or_undef (parse_in, "__tune_core_avx2__");
430 96 : def_or_undef (parse_in, "__tune_haswell__");
431 96 : break;
432 36 : case PROCESSOR_BONNELL:
433 36 : def_or_undef (parse_in, "__tune_atom__");
434 36 : def_or_undef (parse_in, "__tune_bonnell__");
435 36 : break;
436 18 : case PROCESSOR_SILVERMONT:
437 18 : def_or_undef (parse_in, "__tune_slm__");
438 18 : def_or_undef (parse_in, "__tune_silvermont__");
439 18 : break;
440 9 : case PROCESSOR_GOLDMONT:
441 9 : def_or_undef (parse_in, "__tune_goldmont__");
442 9 : break;
443 0 : case PROCESSOR_GOLDMONT_PLUS:
444 0 : def_or_undef (parse_in, "__tune_goldmont_plus__");
445 0 : break;
446 0 : case PROCESSOR_TREMONT:
447 0 : def_or_undef (parse_in, "__tune_tremont__");
448 0 : break;
449 5 : case PROCESSOR_SIERRAFOREST:
450 5 : def_or_undef (parse_in, "__tune_sierraforest__");
451 5 : break;
452 0 : case PROCESSOR_GRANDRIDGE:
453 0 : def_or_undef (parse_in, "__tune_grandridge__");
454 0 : break;
455 0 : case PROCESSOR_CLEARWATERFOREST:
456 0 : def_or_undef (parse_in, "__tune_clearwaterforest__");
457 0 : break;
458 82 : case PROCESSOR_SKYLAKE:
459 82 : def_or_undef (parse_in, "__tune_skylake__");
460 82 : break;
461 190 : case PROCESSOR_SKYLAKE_AVX512:
462 190 : def_or_undef (parse_in, "__tune_skylake_avx512__");
463 190 : break;
464 11 : case PROCESSOR_CANNONLAKE:
465 11 : def_or_undef (parse_in, "__tune_cannonlake__");
466 11 : break;
467 0 : case PROCESSOR_ICELAKE_CLIENT:
468 0 : def_or_undef (parse_in, "__tune_icelake_client__");
469 0 : break;
470 22 : case PROCESSOR_ICELAKE_SERVER:
471 22 : def_or_undef (parse_in, "__tune_icelake_server__");
472 22 : break;
473 0 : case PROCESSOR_LAKEMONT:
474 0 : def_or_undef (parse_in, "__tune_lakemont__");
475 0 : break;
476 17 : case PROCESSOR_CASCADELAKE:
477 17 : def_or_undef (parse_in, "__tune_cascadelake__");
478 17 : break;
479 8 : case PROCESSOR_TIGERLAKE:
480 8 : def_or_undef (parse_in, "__tune_tigerlake__");
481 8 : break;
482 2 : case PROCESSOR_COOPERLAKE:
483 2 : def_or_undef (parse_in, "__tune_cooperlake__");
484 2 : break;
485 33 : case PROCESSOR_SAPPHIRERAPIDS:
486 33 : def_or_undef (parse_in, "__tune_sapphirerapids__");
487 33 : break;
488 7 : case PROCESSOR_ALDERLAKE:
489 7 : def_or_undef (parse_in, "__tune_alderlake__");
490 7 : break;
491 0 : case PROCESSOR_ROCKETLAKE:
492 0 : def_or_undef (parse_in, "__tune_rocketlake__");
493 0 : break;
494 0 : case PROCESSOR_GRANITERAPIDS:
495 0 : def_or_undef (parse_in, "__tune_graniterapids__");
496 0 : break;
497 0 : case PROCESSOR_GRANITERAPIDS_D:
498 0 : def_or_undef (parse_in, "__tune_graniterapids_d__");
499 0 : break;
500 0 : case PROCESSOR_ARROWLAKE:
501 0 : def_or_undef (parse_in, "__tune_arrowlake__");
502 0 : break;
503 0 : case PROCESSOR_ARROWLAKE_S:
504 0 : def_or_undef (parse_in, "__tune_arrowlake_s__");
505 0 : break;
506 0 : case PROCESSOR_PANTHERLAKE:
507 0 : def_or_undef (parse_in, "__tune_pantherlake__");
508 0 : break;
509 0 : case PROCESSOR_DIAMONDRAPIDS:
510 0 : def_or_undef (parse_in, "__tune_diamondrapids__");
511 0 : break;
512 0 : case PROCESSOR_NOVALAKE:
513 0 : def_or_undef (parse_in, "__tune_novalake__");
514 0 : break;
515 : case PROCESSOR_INTEL:
516 : case PROCESSOR_GENERIC:
517 : break;
518 : /* use PROCESSOR_max to not set/unset the tune macro. */
519 : case PROCESSOR_max:
520 : break;
521 : }
522 :
523 2433293 : switch (ix86_cmodel)
524 : {
525 2387815 : case CM_SMALL:
526 2387815 : case CM_SMALL_PIC:
527 2387815 : def_or_undef (parse_in, "__code_model_small__");
528 2387815 : break;
529 870 : case CM_MEDIUM:
530 870 : case CM_MEDIUM_PIC:
531 870 : def_or_undef (parse_in, "__code_model_medium__");
532 870 : break;
533 491 : case CM_LARGE:
534 491 : case CM_LARGE_PIC:
535 491 : def_or_undef (parse_in, "__code_model_large__");
536 491 : break;
537 44116 : case CM_32:
538 44116 : def_or_undef (parse_in, "__code_model_32__");
539 44116 : break;
540 1 : case CM_KERNEL:
541 1 : def_or_undef (parse_in, "__code_model_kernel__");
542 1 : break;
543 2433293 : default:
544 2433293 : ;
545 : }
546 :
547 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD)
548 10556 : def_or_undef (parse_in, "__WBNOINVD__");
549 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT)
550 20780 : def_or_undef (parse_in, "__AVX512VP2INTERSECT__");
551 2433293 : if (isa_flag & OPTION_MASK_ISA_MMX)
552 216492 : def_or_undef (parse_in, "__MMX__");
553 2433293 : if (isa_flag & OPTION_MASK_ISA_3DNOW)
554 2799 : def_or_undef (parse_in, "__3dNOW__");
555 2433293 : if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
556 1480 : def_or_undef (parse_in, "__3dNOW_A__");
557 2433293 : if (isa_flag & OPTION_MASK_ISA_SSE)
558 218385 : def_or_undef (parse_in, "__SSE__");
559 2433293 : if (isa_flag & OPTION_MASK_ISA_SSE2)
560 218283 : def_or_undef (parse_in, "__SSE2__");
561 2433293 : if (isa_flag & OPTION_MASK_ISA_SSE3)
562 95959 : def_or_undef (parse_in, "__SSE3__");
563 2433293 : if (isa_flag & OPTION_MASK_ISA_SSSE3)
564 94063 : def_or_undef (parse_in, "__SSSE3__");
565 2433293 : if (isa_flag & OPTION_MASK_ISA_SSE4_1)
566 93047 : def_or_undef (parse_in, "__SSE4_1__");
567 2433293 : if (isa_flag & OPTION_MASK_ISA_SSE4_2)
568 93316 : def_or_undef (parse_in, "__SSE4_2__");
569 2433293 : if (isa_flag & OPTION_MASK_ISA_AES)
570 10764 : def_or_undef (parse_in, "__AES__");
571 2433293 : if (isa_flag & OPTION_MASK_ISA_SHA)
572 10464 : def_or_undef (parse_in, "__SHA__");
573 2433293 : if (isa_flag & OPTION_MASK_ISA_PCLMUL)
574 31309 : def_or_undef (parse_in, "__PCLMUL__");
575 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX)
576 92927 : def_or_undef (parse_in, "__AVX__");
577 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX2)
578 147118 : def_or_undef (parse_in, "__AVX2__");
579 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512F)
580 177360 : def_or_undef (parse_in, "__AVX512F__");
581 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512CD)
582 90907 : def_or_undef (parse_in, "__AVX512CD__");
583 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
584 104573 : def_or_undef (parse_in, "__AVX512DQ__");
585 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512BW)
586 183424 : def_or_undef (parse_in, "__AVX512BW__");
587 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512VL)
588 : {
589 180236 : def_or_undef (parse_in, "__AVX512VL__");
590 180236 : def_or_undef (parse_in, "__EVEX256__");
591 : }
592 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
593 91163 : def_or_undef (parse_in, "__AVX512VBMI__");
594 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
595 91212 : def_or_undef (parse_in, "__AVX512IFMA__");
596 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
597 90582 : def_or_undef (parse_in, "__AVX512VBMI2__");
598 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
599 91212 : def_or_undef (parse_in, "__AVX512VNNI__");
600 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG)
601 10510 : def_or_undef (parse_in, "__PCONFIG__");
602 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_SGX)
603 10747 : def_or_undef (parse_in, "__SGX__");
604 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
605 91128 : def_or_undef (parse_in, "__AVX512BITALG__");
606 2433293 : if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ)
607 91202 : def_or_undef (parse_in, "__AVX512VPOPCNTDQ__");
608 2433293 : if (isa_flag & OPTION_MASK_ISA_FMA)
609 11368 : def_or_undef (parse_in, "__FMA__");
610 2433293 : if (isa_flag & OPTION_MASK_ISA_RTM)
611 20352 : def_or_undef (parse_in, "__RTM__");
612 2433293 : if (isa_flag & OPTION_MASK_ISA_SSE4A)
613 4121 : def_or_undef (parse_in, "__SSE4A__");
614 2433293 : if (isa_flag & OPTION_MASK_ISA_FMA4)
615 2749 : def_or_undef (parse_in, "__FMA4__");
616 2433293 : if (isa_flag & OPTION_MASK_ISA_XOP)
617 1478 : def_or_undef (parse_in, "__XOP__");
618 2433293 : if (isa_flag & OPTION_MASK_ISA_LWP)
619 10517 : def_or_undef (parse_in, "__LWP__");
620 2433293 : if (isa_flag & OPTION_MASK_ISA_ABM)
621 159 : def_or_undef (parse_in, "__ABM__");
622 2433293 : if (isa_flag & OPTION_MASK_ISA_BMI)
623 10954 : def_or_undef (parse_in, "__BMI__");
624 2433293 : if (isa_flag & OPTION_MASK_ISA_BMI2)
625 10937 : def_or_undef (parse_in, "__BMI2__");
626 2433293 : if (isa_flag & OPTION_MASK_ISA_LZCNT)
627 10992 : def_or_undef (parse_in, "__LZCNT__");
628 2433293 : if (isa_flag & OPTION_MASK_ISA_TBM)
629 10506 : def_or_undef (parse_in, "__TBM__");
630 2433293 : if (isa_flag & OPTION_MASK_ISA_CRC32)
631 87668 : def_or_undef (parse_in, "__CRC32__");
632 2433293 : if (isa_flag & OPTION_MASK_ISA_POPCNT)
633 85550 : def_or_undef (parse_in, "__POPCNT__");
634 2433293 : if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
635 10695 : def_or_undef (parse_in, "__FSGSBASE__");
636 2433293 : if (isa_flag & OPTION_MASK_ISA_RDRND)
637 21060 : def_or_undef (parse_in, "__RDRND__");
638 2433293 : if (isa_flag & OPTION_MASK_ISA_F16C)
639 11231 : def_or_undef (parse_in, "__F16C__");
640 2433293 : if (isa_flag & OPTION_MASK_ISA_RDSEED)
641 10810 : def_or_undef (parse_in, "__RDSEED__");
642 2433293 : if (isa_flag & OPTION_MASK_ISA_PRFCHW)
643 486 : def_or_undef (parse_in, "__PRFCHW__");
644 2433293 : if (isa_flag & OPTION_MASK_ISA_ADX)
645 411 : def_or_undef (parse_in, "__ADX__");
646 2433293 : if (isa_flag & OPTION_MASK_ISA_FXSR)
647 207638 : def_or_undef (parse_in, "__FXSR__");
648 2433293 : if (isa_flag & OPTION_MASK_ISA_XSAVE)
649 82087 : def_or_undef (parse_in, "__XSAVE__");
650 2433293 : if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
651 10886 : def_or_undef (parse_in, "__XSAVEOPT__");
652 2433293 : if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
653 212755 : def_or_undef (parse_in, "__SSE_MATH__");
654 1594737 : if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
655 212653 : def_or_undef (parse_in, "__SSE2_MATH__");
656 2433293 : if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
657 10813 : def_or_undef (parse_in, "__CLFLUSHOPT__");
658 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_CLZERO)
659 10545 : def_or_undef (parse_in, "__CLZERO__");
660 2433293 : if (isa_flag & OPTION_MASK_ISA_XSAVEC)
661 10812 : def_or_undef (parse_in, "__XSAVEC__");
662 2433293 : if (isa_flag & OPTION_MASK_ISA_XSAVES)
663 10812 : def_or_undef (parse_in, "__XSAVES__");
664 2433293 : if (isa_flag & OPTION_MASK_ISA_CLWB)
665 10745 : def_or_undef (parse_in, "__CLWB__");
666 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_MWAITX)
667 10561 : def_or_undef (parse_in, "__MWAITX__");
668 2433293 : if (isa_flag & OPTION_MASK_ISA_PKU)
669 10726 : def_or_undef (parse_in, "__PKU__");
670 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_RDPID)
671 10575 : def_or_undef (parse_in, "__RDPID__");
672 2433293 : if (isa_flag & OPTION_MASK_ISA_GFNI)
673 61957 : def_or_undef (parse_in, "__GFNI__");
674 2433293 : if ((isa_flag & OPTION_MASK_ISA_SHSTK))
675 29096 : def_or_undef (parse_in, "__SHSTK__");
676 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_VAES)
677 20863 : def_or_undef (parse_in, "__VAES__");
678 2433293 : if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
679 20854 : def_or_undef (parse_in, "__VPCLMULQDQ__");
680 2433293 : if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
681 10554 : def_or_undef (parse_in, "__MOVDIRI__");
682 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B)
683 10560 : def_or_undef (parse_in, "__MOVDIR64B__");
684 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG)
685 10528 : def_or_undef (parse_in, "__WAITPKG__");
686 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE)
687 10524 : def_or_undef (parse_in, "__CLDEMOTE__");
688 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_SERIALIZE)
689 10499 : def_or_undef (parse_in, "__SERIALIZE__");
690 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE)
691 10531 : def_or_undef (parse_in, "__PTWRITE__");
692 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16)
693 91191 : def_or_undef (parse_in, "__AVX512BF16__");
694 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512FP16)
695 83484 : def_or_undef (parse_in, "__AVX512FP16__");
696 2433293 : if (TARGET_MMX_WITH_SSE)
697 1580183 : def_or_undef (parse_in, "__MMX_WITH_SSE__");
698 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
699 10496 : def_or_undef (parse_in, "__ENQCMD__");
700 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK)
701 10489 : def_or_undef (parse_in, "__TSXLDTRK__");
702 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_TILE)
703 70917 : def_or_undef (parse_in, "__AMX_TILE__");
704 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_INT8)
705 10357 : def_or_undef (parse_in, "__AMX_INT8__");
706 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_BF16)
707 10369 : def_or_undef (parse_in, "__AMX_BF16__");
708 2433293 : if (isa_flag & OPTION_MASK_ISA_SAHF)
709 6266 : def_or_undef (parse_in, "__LAHF_SAHF__");
710 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_MOVBE)
711 796 : def_or_undef (parse_in, "__MOVBE__");
712 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_UINTR)
713 10310 : def_or_undef (parse_in, "__UINTR__");
714 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_HRESET)
715 10515 : def_or_undef (parse_in, "__HRESET__");
716 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_KL)
717 20773 : def_or_undef (parse_in, "__KL__");
718 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_WIDEKL)
719 10432 : def_or_undef (parse_in, "__WIDEKL__");
720 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNI)
721 10489 : def_or_undef (parse_in, "__AVXVNNI__");
722 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVXIFMA)
723 10421 : def_or_undef (parse_in, "__AVXIFMA__");
724 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT8)
725 10428 : def_or_undef (parse_in, "__AVXVNNIINT8__");
726 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVXNECONVERT)
727 10426 : def_or_undef (parse_in, "__AVXNECONVERT__");
728 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_CMPCCXADD)
729 10310 : def_or_undef (parse_in, "__CMPCCXADD__");
730 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP16)
731 22 : def_or_undef (parse_in, "__AMX_FP16__");
732 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_PREFETCHI)
733 10324 : def_or_undef (parse_in, "__PREFETCHI__");
734 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_RAOINT)
735 10477 : def_or_undef (parse_in, "__RAOINT__");
736 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_COMPLEX)
737 10356 : def_or_undef (parse_in, "__AMX_COMPLEX__");
738 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT16)
739 10425 : def_or_undef (parse_in, "__AVXVNNIINT16__");
740 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_SM3)
741 10413 : def_or_undef (parse_in, "__SM3__");
742 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_SHA512)
743 10413 : def_or_undef (parse_in, "__SHA512__");
744 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_SM4)
745 20756 : def_or_undef (parse_in, "__SM4__");
746 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_USER_MSR)
747 10329 : def_or_undef (parse_in, "__USER_MSR__");
748 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVX10_1)
749 71232 : def_or_undef (parse_in, "__AVX10_1__");
750 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_APX_F)
751 64 : def_or_undef (parse_in, "__APX_F__");
752 2433293 : if (ix86_apx_inline_asm_use_gpr32)
753 1 : def_or_undef (parse_in, "__APX_INLINE_ASM_USE_GPR32__");
754 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVX10_2)
755 71255 : def_or_undef (parse_in, "__AVX10_2__");
756 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_AVX512)
757 10419 : def_or_undef (parse_in, "__AMX_AVX512__");
758 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_TF32)
759 10357 : def_or_undef (parse_in, "__AMX_TF32__");
760 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP8)
761 23 : def_or_undef (parse_in, "__AMX_FP8__");
762 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_MOVRS)
763 20539 : def_or_undef (parse_in, "__MOVRS__");
764 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_MOVRS)
765 10185 : def_or_undef (parse_in, "__AMX_MOVRS__");
766 2433293 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512BMM)
767 20786 : def_or_undef (parse_in, "__AVX512BMM__");
768 2433293 : if (TARGET_IAMCU)
769 : {
770 0 : def_or_undef (parse_in, "__iamcu");
771 0 : def_or_undef (parse_in, "__iamcu__");
772 : }
773 2433293 : }
774 :
775 :
776 : /* Hook to validate the current #pragma GCC target and set the state, and
777 : update the macros based on what was changed. If ARGS is NULL, then
778 : POP_TARGET is used to reset the options. */
779 :
780 : static bool
781 1113097 : ix86_pragma_target_parse (tree args, tree pop_target)
782 : {
783 1113097 : tree prev_tree
784 1113097 : = build_target_option_node (&global_options, &global_options_set);
785 1113097 : tree cur_tree;
786 1113097 : struct cl_target_option *prev_opt;
787 1113097 : struct cl_target_option *cur_opt;
788 1113097 : HOST_WIDE_INT prev_isa;
789 1113097 : HOST_WIDE_INT cur_isa;
790 1113097 : HOST_WIDE_INT diff_isa;
791 1113097 : HOST_WIDE_INT prev_isa2;
792 1113097 : HOST_WIDE_INT cur_isa2;
793 1113097 : HOST_WIDE_INT diff_isa2;
794 1113097 : enum processor_type prev_arch;
795 1113097 : enum processor_type prev_tune;
796 1113097 : enum processor_type cur_arch;
797 1113097 : enum processor_type cur_tune;
798 :
799 1113097 : if (! args)
800 : {
801 554084 : cur_tree = (pop_target ? pop_target : target_option_default_node);
802 554084 : cl_target_option_restore (&global_options, &global_options_set,
803 554084 : TREE_TARGET_OPTION (cur_tree));
804 : }
805 : else
806 : {
807 559013 : cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args,
808 : &global_options,
809 : &global_options_set, 0);
810 559013 : if (!cur_tree || cur_tree == error_mark_node)
811 : {
812 269 : cl_target_option_restore (&global_options, &global_options_set,
813 269 : TREE_TARGET_OPTION (prev_tree));
814 269 : return false;
815 : }
816 : }
817 :
818 1112828 : target_option_current_node = cur_tree;
819 1112828 : ix86_reset_previous_fndecl ();
820 :
821 : /* Figure out the previous/current isa, arch, tune and the differences. */
822 1112828 : prev_opt = TREE_TARGET_OPTION (prev_tree);
823 1112828 : cur_opt = TREE_TARGET_OPTION (cur_tree);
824 1112828 : prev_isa = prev_opt->x_ix86_isa_flags;
825 1112828 : cur_isa = cur_opt->x_ix86_isa_flags;
826 1112828 : diff_isa = (prev_isa ^ cur_isa);
827 1112828 : prev_isa2 = prev_opt->x_ix86_isa_flags2;
828 1112828 : cur_isa2 = cur_opt->x_ix86_isa_flags2;
829 1112828 : diff_isa2 = (prev_isa2 ^ cur_isa2);
830 1112828 : prev_arch = (enum processor_type) prev_opt->arch;
831 1112828 : prev_tune = (enum processor_type) prev_opt->tune;
832 1112828 : cur_arch = (enum processor_type) cur_opt->arch;
833 1112828 : cur_tune = (enum processor_type) cur_opt->tune;
834 :
835 : /* If the same processor is used for both previous and current options, don't
836 : change the macros. */
837 1112828 : if (cur_arch == prev_arch)
838 1112827 : cur_arch = prev_arch = PROCESSOR_max;
839 :
840 1112828 : if (cur_tune == prev_tune)
841 1112827 : cur_tune = prev_tune = PROCESSOR_max;
842 :
843 : /* Undef all of the macros for that are no longer current. */
844 1112828 : cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
845 1112828 : ix86_target_macros_internal (prev_isa & diff_isa,
846 : prev_isa2 & diff_isa2,
847 : prev_arch,
848 : prev_tune,
849 1112828 : (enum fpmath_unit) prev_opt->x_ix86_fpmath,
850 : cpp_undef);
851 1112828 : cpp_stop_forcing_token_locations (parse_in);
852 :
853 : /* For the definitions, ensure all newly defined macros are considered
854 : as used for -Wunused-macros. There is no point warning about the
855 : compiler predefined macros. */
856 1112828 : cpp_options *cpp_opts = cpp_get_options (parse_in);
857 1112828 : unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
858 1112828 : cpp_opts->warn_unused_macros = 0;
859 :
860 : /* Define all of the macros for new options that were just turned on. */
861 1112828 : cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
862 1112828 : ix86_target_macros_internal (cur_isa & diff_isa,
863 : cur_isa2 & diff_isa2,
864 : cur_arch,
865 : cur_tune,
866 1112828 : (enum fpmath_unit) cur_opt->x_ix86_fpmath,
867 : cpp_define);
868 1112828 : cpp_stop_forcing_token_locations (parse_in);
869 :
870 1112828 : cpp_opts->warn_unused_macros = saved_warn_unused_macros;
871 :
872 1112828 : return true;
873 : }
874 :
875 : /* Function to tell the preprocessor about the defines for the current target. */
876 :
877 : void
878 207637 : ix86_target_macros (void)
879 : {
880 : /* 32/64-bit won't change with target specific options, so do the assert and
881 : builtin_define_std calls here. */
882 207637 : if (TARGET_64BIT)
883 : {
884 202261 : cpp_assert (parse_in, "cpu=x86_64");
885 202261 : cpp_assert (parse_in, "machine=x86_64");
886 202261 : cpp_define (parse_in, "__amd64");
887 202261 : cpp_define (parse_in, "__amd64__");
888 202261 : cpp_define (parse_in, "__x86_64");
889 202261 : cpp_define (parse_in, "__x86_64__");
890 202261 : if (TARGET_X32)
891 : {
892 94 : cpp_define (parse_in, "_ILP32");
893 94 : cpp_define (parse_in, "__ILP32__");
894 : }
895 : }
896 : else
897 : {
898 5376 : cpp_assert (parse_in, "cpu=i386");
899 5376 : cpp_assert (parse_in, "machine=i386");
900 5376 : builtin_define_std ("i386");
901 5376 : cpp_define (parse_in, "_ILP32");
902 5376 : cpp_define (parse_in, "__ILP32__");
903 : }
904 :
905 207637 : if (!TARGET_80387)
906 221 : cpp_define (parse_in, "_SOFT_FLOAT");
907 :
908 : /* HFmode/BFmode is supported without depending any isa
909 : in scalar_mode_supported_p and libgcc_floating_mode_supported_p,
910 : but according to psABI, they're really supported w/ SSE2 and above.
911 : Since libstdc++ uses __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__
912 : for backend support of the types, undef the macros to avoid
913 : build failure, see PR109504. */
914 207637 : if (!TARGET_SSE2)
915 : {
916 397 : if (c_dialect_cxx () && cxx_dialect > cxx20)
917 : {
918 5 : cpp_undef (parse_in, "__STDCPP_FLOAT16_T__");
919 5 : cpp_undef (parse_in, "__STDCPP_BFLOAT16_T__");
920 : }
921 : }
922 :
923 207637 : if (TARGET_LONG_DOUBLE_64)
924 16 : cpp_define (parse_in, "__LONG_DOUBLE_64__");
925 :
926 207637 : if (TARGET_LONG_DOUBLE_128)
927 6 : cpp_define (parse_in, "__LONG_DOUBLE_128__");
928 :
929 207637 : cpp_define_formatted (parse_in, "__SIZEOF_FLOAT80__=%d",
930 207637 : GET_MODE_SIZE (XFmode));
931 :
932 207637 : cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
933 :
934 207637 : cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
935 207637 : cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
936 :
937 207637 : cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
938 :
939 207637 : ix86_target_macros_internal (ix86_isa_flags,
940 : ix86_isa_flags2,
941 : ix86_arch,
942 : ix86_tune,
943 : ix86_fpmath,
944 : cpp_define);
945 :
946 207637 : cpp_define (parse_in, "__SEG_FS");
947 207637 : cpp_define (parse_in, "__SEG_GS");
948 :
949 207637 : if (flag_cf_protection != CF_NONE)
950 19282 : cpp_define_formatted (parse_in, "__CET__=%d", flag_cf_protection & ~CF_SET);
951 207637 : }
952 :
953 :
954 : /* Register target pragmas. We need to add the hook for parsing #pragma GCC
955 : option here rather than in i386.cc since it will pull in various preprocessor
956 : functions, and those are not present in languages like fortran without a
957 : preprocessor. */
958 :
959 : void
960 208165 : ix86_register_pragmas (void)
961 : {
962 : /* Update pragma hook to allow parsing #pragma GCC target. */
963 208165 : targetm.target_option.pragma_parse = ix86_pragma_target_parse;
964 :
965 208165 : c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
966 208165 : c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
967 :
968 : #ifdef REGISTER_SUBTARGET_PRAGMAS
969 : REGISTER_SUBTARGET_PRAGMAS ();
970 : #endif
971 208165 : }
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