Line data Source code
1 : /* Subroutines used for macro/preprocessor support on the ia-32.
2 : Copyright (C) 2008-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify
7 : it under the terms of the GNU General Public License as published by
8 : the Free Software Foundation; either version 3, or (at your option)
9 : any later version.
10 :
11 : GCC is distributed in the hope that it will be useful,
12 : but WITHOUT ANY WARRANTY; without even the implied warranty of
13 : MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 : GNU General Public License for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : #define IN_TARGET_CODE 1
21 :
22 : #include "config.h"
23 : #include "system.h"
24 : #include "coretypes.h"
25 : #include "target.h"
26 : #include "c-family/c-common.h"
27 : #include "memmodel.h"
28 : #include "tm_p.h"
29 : #include "c-family/c-pragma.h"
30 :
31 : static bool ix86_pragma_target_parse (tree, tree);
32 : static void ix86_target_macros_internal
33 : (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
34 : void (*def_or_undef) (cpp_reader *, const char *));
35 :
36 : /* Internal function to either define or undef the appropriate system
37 : macros. */
38 : static void
39 2439843 : ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
40 : HOST_WIDE_INT isa_flag2,
41 : enum processor_type arch,
42 : enum processor_type tune,
43 : enum fpmath_unit fpmath,
44 : void (*def_or_undef) (cpp_reader *,
45 : const char *))
46 : {
47 : /* For some of the k6/pentium varients there weren't separate ISA bits to
48 : identify which tune/arch flag was passed, so figure it out here. */
49 2439843 : size_t arch_len = strlen (ix86_arch_string);
50 2439843 : size_t tune_len = strlen (ix86_tune_string);
51 2439843 : int last_arch_char = ix86_arch_string[arch_len - 1];
52 2439843 : int last_tune_char = ix86_tune_string[tune_len - 1];
53 :
54 : /* Built-ins based on -march=. */
55 2439843 : switch (arch)
56 : {
57 : case PROCESSOR_I386:
58 : break;
59 0 : case PROCESSOR_I486:
60 0 : def_or_undef (parse_in, "__i486");
61 0 : def_or_undef (parse_in, "__i486__");
62 0 : break;
63 0 : case PROCESSOR_LAKEMONT:
64 : /* Intel MCU is based on Intel Pentium CPU. */
65 0 : case PROCESSOR_PENTIUM:
66 0 : def_or_undef (parse_in, "__i586");
67 0 : def_or_undef (parse_in, "__i586__");
68 0 : def_or_undef (parse_in, "__pentium");
69 0 : def_or_undef (parse_in, "__pentium__");
70 0 : if (isa_flag & OPTION_MASK_ISA_MMX)
71 0 : def_or_undef (parse_in, "__pentium_mmx__");
72 : break;
73 0 : case PROCESSOR_PENTIUMPRO:
74 0 : def_or_undef (parse_in, "__i686");
75 0 : def_or_undef (parse_in, "__i686__");
76 0 : def_or_undef (parse_in, "__pentiumpro");
77 0 : def_or_undef (parse_in, "__pentiumpro__");
78 0 : break;
79 0 : case PROCESSOR_GEODE:
80 0 : def_or_undef (parse_in, "__geode");
81 0 : def_or_undef (parse_in, "__geode__");
82 0 : break;
83 0 : case PROCESSOR_K6:
84 0 : def_or_undef (parse_in, "__k6");
85 0 : def_or_undef (parse_in, "__k6__");
86 0 : if (last_arch_char == '2')
87 0 : def_or_undef (parse_in, "__k6_2__");
88 0 : else if (last_arch_char == '3')
89 0 : def_or_undef (parse_in, "__k6_3__");
90 0 : else if (isa_flag & OPTION_MASK_ISA_3DNOW)
91 0 : def_or_undef (parse_in, "__k6_3__");
92 : break;
93 0 : case PROCESSOR_ATHLON:
94 0 : def_or_undef (parse_in, "__athlon");
95 0 : def_or_undef (parse_in, "__athlon__");
96 0 : if (isa_flag & OPTION_MASK_ISA_SSE)
97 0 : def_or_undef (parse_in, "__athlon_sse__");
98 : break;
99 208450 : case PROCESSOR_K8:
100 208450 : def_or_undef (parse_in, "__k8");
101 208450 : def_or_undef (parse_in, "__k8__");
102 208450 : break;
103 40 : case PROCESSOR_AMDFAM10:
104 40 : def_or_undef (parse_in, "__amdfam10");
105 40 : def_or_undef (parse_in, "__amdfam10__");
106 40 : break;
107 5 : case PROCESSOR_BDVER1:
108 5 : def_or_undef (parse_in, "__bdver1");
109 5 : def_or_undef (parse_in, "__bdver1__");
110 5 : break;
111 12 : case PROCESSOR_BDVER2:
112 12 : def_or_undef (parse_in, "__bdver2");
113 12 : def_or_undef (parse_in, "__bdver2__");
114 12 : break;
115 0 : case PROCESSOR_BDVER3:
116 0 : def_or_undef (parse_in, "__bdver3");
117 0 : def_or_undef (parse_in, "__bdver3__");
118 0 : break;
119 16 : case PROCESSOR_BDVER4:
120 16 : def_or_undef (parse_in, "__bdver4");
121 16 : def_or_undef (parse_in, "__bdver4__");
122 16 : break;
123 7 : case PROCESSOR_ZNVER1:
124 7 : def_or_undef (parse_in, "__znver1");
125 7 : def_or_undef (parse_in, "__znver1__");
126 7 : break;
127 21 : case PROCESSOR_ZNVER2:
128 21 : def_or_undef (parse_in, "__znver2");
129 21 : def_or_undef (parse_in, "__znver2__");
130 21 : break;
131 6 : case PROCESSOR_ZNVER3:
132 6 : def_or_undef (parse_in, "__znver3");
133 6 : def_or_undef (parse_in, "__znver3__");
134 6 : break;
135 15 : case PROCESSOR_ZNVER4:
136 15 : def_or_undef (parse_in, "__znver4");
137 15 : def_or_undef (parse_in, "__znver4__");
138 15 : break;
139 18 : case PROCESSOR_ZNVER5:
140 18 : def_or_undef (parse_in, "__znver5");
141 18 : def_or_undef (parse_in, "__znver5__");
142 18 : break;
143 0 : case PROCESSOR_ZNVER6:
144 0 : def_or_undef (parse_in, "__znver6");
145 0 : def_or_undef (parse_in, "__znver6__");
146 0 : break;
147 0 : case PROCESSOR_BTVER1:
148 0 : def_or_undef (parse_in, "__btver1");
149 0 : def_or_undef (parse_in, "__btver1__");
150 0 : break;
151 2 : case PROCESSOR_BTVER2:
152 2 : def_or_undef (parse_in, "__btver2");
153 2 : def_or_undef (parse_in, "__btver2__");
154 2 : break;
155 0 : case PROCESSOR_LUJIAZUI:
156 0 : def_or_undef (parse_in, "__lujiazui");
157 0 : def_or_undef (parse_in, "__lujiazui__");
158 0 : break;
159 0 : case PROCESSOR_YONGFENG:
160 0 : def_or_undef (parse_in, "__yongfeng");
161 0 : def_or_undef (parse_in, "__yongfeng__");
162 0 : break;
163 0 : case PROCESSOR_SHIJIDADAO:
164 0 : def_or_undef (parse_in, "__shijidadao");
165 0 : def_or_undef (parse_in, "__shijidadao__");
166 0 : break;
167 0 : case PROCESSOR_PENTIUM4:
168 0 : def_or_undef (parse_in, "__pentium4");
169 0 : def_or_undef (parse_in, "__pentium4__");
170 0 : break;
171 8 : case PROCESSOR_NOCONA:
172 8 : def_or_undef (parse_in, "__nocona");
173 8 : def_or_undef (parse_in, "__nocona__");
174 8 : break;
175 17 : case PROCESSOR_CORE2:
176 17 : def_or_undef (parse_in, "__core2");
177 17 : def_or_undef (parse_in, "__core2__");
178 17 : break;
179 18 : case PROCESSOR_NEHALEM:
180 18 : def_or_undef (parse_in, "__corei7");
181 18 : def_or_undef (parse_in, "__corei7__");
182 18 : def_or_undef (parse_in, "__nehalem");
183 18 : def_or_undef (parse_in, "__nehalem__");
184 18 : break;
185 3 : case PROCESSOR_SANDYBRIDGE:
186 3 : def_or_undef (parse_in, "__corei7_avx");
187 3 : def_or_undef (parse_in, "__corei7_avx__");
188 3 : def_or_undef (parse_in, "__sandybridge");
189 3 : def_or_undef (parse_in, "__sandybridge__");
190 3 : break;
191 79 : case PROCESSOR_HASWELL:
192 79 : def_or_undef (parse_in, "__core_avx2");
193 79 : def_or_undef (parse_in, "__core_avx2__");
194 79 : def_or_undef (parse_in, "__haswell");
195 79 : def_or_undef (parse_in, "__haswell__");
196 79 : break;
197 19 : case PROCESSOR_BONNELL:
198 19 : def_or_undef (parse_in, "__atom");
199 19 : def_or_undef (parse_in, "__atom__");
200 19 : def_or_undef (parse_in, "__bonnell");
201 19 : def_or_undef (parse_in, "__bonnell__");
202 19 : break;
203 8 : case PROCESSOR_SILVERMONT:
204 8 : def_or_undef (parse_in, "__slm");
205 8 : def_or_undef (parse_in, "__slm__");
206 8 : def_or_undef (parse_in, "__silvermont");
207 8 : def_or_undef (parse_in, "__silvermont__");
208 8 : break;
209 3 : case PROCESSOR_GOLDMONT:
210 3 : def_or_undef (parse_in, "__goldmont");
211 3 : def_or_undef (parse_in, "__goldmont__");
212 3 : break;
213 0 : case PROCESSOR_GOLDMONT_PLUS:
214 0 : def_or_undef (parse_in, "__goldmont_plus");
215 0 : def_or_undef (parse_in, "__goldmont_plus__");
216 0 : break;
217 0 : case PROCESSOR_TREMONT:
218 0 : def_or_undef (parse_in, "__tremont");
219 0 : def_or_undef (parse_in, "__tremont__");
220 0 : break;
221 5 : case PROCESSOR_SIERRAFOREST:
222 5 : def_or_undef (parse_in, "__sierraforest");
223 5 : def_or_undef (parse_in, "__sierraforest__");
224 5 : break;
225 0 : case PROCESSOR_GRANDRIDGE:
226 0 : def_or_undef (parse_in, "__grandridge");
227 0 : def_or_undef (parse_in, "__grandridge__");
228 0 : break;
229 0 : case PROCESSOR_CLEARWATERFOREST:
230 0 : def_or_undef (parse_in, "__clearwaterforest");
231 0 : def_or_undef (parse_in, "__clearwaterforest__");
232 0 : break;
233 : break;
234 61 : case PROCESSOR_SKYLAKE:
235 61 : def_or_undef (parse_in, "__skylake");
236 61 : def_or_undef (parse_in, "__skylake__");
237 61 : break;
238 165 : case PROCESSOR_SKYLAKE_AVX512:
239 165 : def_or_undef (parse_in, "__skylake_avx512");
240 165 : def_or_undef (parse_in, "__skylake_avx512__");
241 165 : break;
242 11 : case PROCESSOR_CANNONLAKE:
243 11 : def_or_undef (parse_in, "__cannonlake");
244 11 : def_or_undef (parse_in, "__cannonlake__");
245 11 : break;
246 0 : case PROCESSOR_ICELAKE_CLIENT:
247 0 : def_or_undef (parse_in, "__icelake_client");
248 0 : def_or_undef (parse_in, "__icelake_client__");
249 0 : break;
250 12 : case PROCESSOR_ICELAKE_SERVER:
251 12 : def_or_undef (parse_in, "__icelake_server");
252 12 : def_or_undef (parse_in, "__icelake_server__");
253 12 : break;
254 17 : case PROCESSOR_CASCADELAKE:
255 17 : def_or_undef (parse_in, "__cascadelake");
256 17 : def_or_undef (parse_in, "__cascadelake__");
257 17 : break;
258 8 : case PROCESSOR_TIGERLAKE:
259 8 : def_or_undef (parse_in, "__tigerlake");
260 8 : def_or_undef (parse_in, "__tigerlake__");
261 8 : break;
262 2 : case PROCESSOR_COOPERLAKE:
263 2 : def_or_undef (parse_in, "__cooperlake");
264 2 : def_or_undef (parse_in, "__cooperlake__");
265 2 : break;
266 30 : case PROCESSOR_SAPPHIRERAPIDS:
267 30 : def_or_undef (parse_in, "__sapphirerapids");
268 30 : def_or_undef (parse_in, "__sapphirerapids__");
269 30 : break;
270 0 : case PROCESSOR_GRANITERAPIDS:
271 0 : def_or_undef (parse_in, "__graniterapids");
272 0 : def_or_undef (parse_in, "__graniterapids__");
273 0 : break;
274 0 : case PROCESSOR_GRANITERAPIDS_D:
275 0 : def_or_undef (parse_in, "__graniterapids_d");
276 0 : def_or_undef (parse_in, "__graniterapids_d__");
277 0 : break;
278 7 : case PROCESSOR_ALDERLAKE:
279 7 : def_or_undef (parse_in, "__alderlake");
280 7 : def_or_undef (parse_in, "__alderlake__");
281 7 : break;
282 0 : case PROCESSOR_ROCKETLAKE:
283 0 : def_or_undef (parse_in, "__rocketlake");
284 0 : def_or_undef (parse_in, "__rocketlake__");
285 0 : break;
286 0 : case PROCESSOR_ARROWLAKE:
287 0 : def_or_undef (parse_in, "__arrowlake");
288 0 : def_or_undef (parse_in, "__arrowlake__");
289 0 : break;
290 0 : case PROCESSOR_ARROWLAKE_S:
291 0 : def_or_undef (parse_in, "__arrowlake_s");
292 0 : def_or_undef (parse_in, "__arrowlake_s__");
293 0 : break;
294 0 : case PROCESSOR_PANTHERLAKE:
295 0 : def_or_undef (parse_in, "__pantherlake");
296 0 : def_or_undef (parse_in, "__pantherlake__");
297 0 : break;
298 0 : case PROCESSOR_DIAMONDRAPIDS:
299 0 : def_or_undef (parse_in, "__diamondrapids");
300 0 : def_or_undef (parse_in, "__diamondrapids__");
301 0 : break;
302 0 : case PROCESSOR_NOVALAKE:
303 0 : def_or_undef (parse_in, "__novalake");
304 0 : def_or_undef (parse_in, "__novalake__");
305 0 : break;
306 0 : case PROCESSOR_C86_4G_M4:
307 0 : def_or_undef (parse_in, "__c86_4g_m4");
308 0 : def_or_undef (parse_in, "__c86_4g_m4__");
309 0 : break;
310 0 : case PROCESSOR_C86_4G_M6:
311 0 : def_or_undef (parse_in, "__c86_4g_m6");
312 0 : def_or_undef (parse_in, "__c86_4g_m6__");
313 0 : break;
314 0 : case PROCESSOR_C86_4G_M7:
315 0 : def_or_undef (parse_in, "__c86_4g_m7");
316 0 : def_or_undef (parse_in, "__c86_4g_m7__");
317 0 : break;
318 : /* use PROCESSOR_max to not set/unset the arch macro. */
319 : case PROCESSOR_max:
320 : break;
321 0 : case PROCESSOR_INTEL:
322 0 : case PROCESSOR_GENERIC:
323 0 : gcc_unreachable ();
324 : }
325 :
326 : /* Built-ins based on -mtune=. */
327 2439843 : switch (tune)
328 : {
329 0 : case PROCESSOR_I386:
330 0 : def_or_undef (parse_in, "__tune_i386__");
331 0 : break;
332 0 : case PROCESSOR_I486:
333 0 : def_or_undef (parse_in, "__tune_i486__");
334 0 : break;
335 0 : case PROCESSOR_PENTIUM:
336 0 : def_or_undef (parse_in, "__tune_i586__");
337 0 : def_or_undef (parse_in, "__tune_pentium__");
338 0 : if (last_tune_char == 'x')
339 0 : def_or_undef (parse_in, "__tune_pentium_mmx__");
340 : break;
341 0 : case PROCESSOR_PENTIUMPRO:
342 0 : def_or_undef (parse_in, "__tune_i686__");
343 0 : def_or_undef (parse_in, "__tune_pentiumpro__");
344 0 : switch (last_tune_char)
345 : {
346 0 : case '3':
347 0 : def_or_undef (parse_in, "__tune_pentium3__");
348 : /* FALLTHRU */
349 0 : case '2':
350 0 : def_or_undef (parse_in, "__tune_pentium2__");
351 0 : break;
352 : }
353 : break;
354 0 : case PROCESSOR_GEODE:
355 0 : def_or_undef (parse_in, "__tune_geode__");
356 0 : break;
357 0 : case PROCESSOR_K6:
358 0 : def_or_undef (parse_in, "__tune_k6__");
359 0 : if (last_tune_char == '2')
360 0 : def_or_undef (parse_in, "__tune_k6_2__");
361 0 : else if (last_tune_char == '3')
362 0 : def_or_undef (parse_in, "__tune_k6_3__");
363 0 : else if (isa_flag & OPTION_MASK_ISA_3DNOW)
364 0 : def_or_undef (parse_in, "__tune_k6_3__");
365 : break;
366 0 : case PROCESSOR_ATHLON:
367 0 : def_or_undef (parse_in, "__tune_athlon__");
368 0 : if (isa_flag & OPTION_MASK_ISA_SSE)
369 0 : def_or_undef (parse_in, "__tune_athlon_sse__");
370 : break;
371 101 : case PROCESSOR_K8:
372 101 : def_or_undef (parse_in, "__tune_k8__");
373 101 : break;
374 52 : case PROCESSOR_AMDFAM10:
375 52 : def_or_undef (parse_in, "__tune_amdfam10__");
376 52 : break;
377 7 : case PROCESSOR_BDVER1:
378 7 : def_or_undef (parse_in, "__tune_bdver1__");
379 7 : break;
380 12 : case PROCESSOR_BDVER2:
381 12 : def_or_undef (parse_in, "__tune_bdver2__");
382 12 : break;
383 0 : case PROCESSOR_BDVER3:
384 0 : def_or_undef (parse_in, "__tune_bdver3__");
385 0 : break;
386 17 : case PROCESSOR_BDVER4:
387 17 : def_or_undef (parse_in, "__tune_bdver4__");
388 17 : break;
389 11 : case PROCESSOR_ZNVER1:
390 11 : def_or_undef (parse_in, "__tune_znver1__");
391 11 : break;
392 21 : case PROCESSOR_ZNVER2:
393 21 : def_or_undef (parse_in, "__tune_znver2__");
394 21 : break;
395 7 : case PROCESSOR_ZNVER3:
396 7 : def_or_undef (parse_in, "__tune_znver3__");
397 7 : break;
398 17 : case PROCESSOR_ZNVER4:
399 17 : def_or_undef (parse_in, "__tune_znver4__");
400 17 : break;
401 21 : case PROCESSOR_ZNVER5:
402 21 : def_or_undef (parse_in, "__tune_znver5__");
403 21 : break;
404 0 : case PROCESSOR_ZNVER6:
405 0 : def_or_undef (parse_in, "__tune_znver6__");
406 0 : break;
407 0 : case PROCESSOR_BTVER1:
408 0 : def_or_undef (parse_in, "__tune_btver1__");
409 0 : break;
410 4 : case PROCESSOR_BTVER2:
411 4 : def_or_undef (parse_in, "__tune_btver2__");
412 4 : break;
413 0 : case PROCESSOR_LUJIAZUI:
414 0 : def_or_undef (parse_in, "__tune_lujiazui__");
415 0 : break;
416 0 : case PROCESSOR_YONGFENG:
417 0 : def_or_undef (parse_in, "__tune_yongfeng__");
418 0 : break;
419 0 : case PROCESSOR_SHIJIDADAO:
420 0 : def_or_undef (parse_in, "__tune_shijidadao__");
421 0 : break;
422 0 : case PROCESSOR_PENTIUM4:
423 0 : def_or_undef (parse_in, "__tune_pentium4__");
424 0 : break;
425 10 : case PROCESSOR_NOCONA:
426 10 : def_or_undef (parse_in, "__tune_nocona__");
427 10 : break;
428 63 : case PROCESSOR_CORE2:
429 63 : def_or_undef (parse_in, "__tune_core2__");
430 63 : break;
431 26 : case PROCESSOR_NEHALEM:
432 26 : def_or_undef (parse_in, "__tune_corei7__");
433 26 : def_or_undef (parse_in, "__tune_nehalem__");
434 26 : break;
435 16 : case PROCESSOR_SANDYBRIDGE:
436 16 : def_or_undef (parse_in, "__tune_corei7_avx__");
437 16 : def_or_undef (parse_in, "__tune_sandybridge__");
438 16 : break;
439 96 : case PROCESSOR_HASWELL:
440 96 : def_or_undef (parse_in, "__tune_core_avx2__");
441 96 : def_or_undef (parse_in, "__tune_haswell__");
442 96 : break;
443 36 : case PROCESSOR_BONNELL:
444 36 : def_or_undef (parse_in, "__tune_atom__");
445 36 : def_or_undef (parse_in, "__tune_bonnell__");
446 36 : break;
447 18 : case PROCESSOR_SILVERMONT:
448 18 : def_or_undef (parse_in, "__tune_slm__");
449 18 : def_or_undef (parse_in, "__tune_silvermont__");
450 18 : break;
451 9 : case PROCESSOR_GOLDMONT:
452 9 : def_or_undef (parse_in, "__tune_goldmont__");
453 9 : break;
454 0 : case PROCESSOR_GOLDMONT_PLUS:
455 0 : def_or_undef (parse_in, "__tune_goldmont_plus__");
456 0 : break;
457 0 : case PROCESSOR_TREMONT:
458 0 : def_or_undef (parse_in, "__tune_tremont__");
459 0 : break;
460 5 : case PROCESSOR_SIERRAFOREST:
461 5 : def_or_undef (parse_in, "__tune_sierraforest__");
462 5 : break;
463 0 : case PROCESSOR_GRANDRIDGE:
464 0 : def_or_undef (parse_in, "__tune_grandridge__");
465 0 : break;
466 0 : case PROCESSOR_CLEARWATERFOREST:
467 0 : def_or_undef (parse_in, "__tune_clearwaterforest__");
468 0 : break;
469 82 : case PROCESSOR_SKYLAKE:
470 82 : def_or_undef (parse_in, "__tune_skylake__");
471 82 : break;
472 190 : case PROCESSOR_SKYLAKE_AVX512:
473 190 : def_or_undef (parse_in, "__tune_skylake_avx512__");
474 190 : break;
475 11 : case PROCESSOR_CANNONLAKE:
476 11 : def_or_undef (parse_in, "__tune_cannonlake__");
477 11 : break;
478 0 : case PROCESSOR_ICELAKE_CLIENT:
479 0 : def_or_undef (parse_in, "__tune_icelake_client__");
480 0 : break;
481 22 : case PROCESSOR_ICELAKE_SERVER:
482 22 : def_or_undef (parse_in, "__tune_icelake_server__");
483 22 : break;
484 0 : case PROCESSOR_LAKEMONT:
485 0 : def_or_undef (parse_in, "__tune_lakemont__");
486 0 : break;
487 17 : case PROCESSOR_CASCADELAKE:
488 17 : def_or_undef (parse_in, "__tune_cascadelake__");
489 17 : break;
490 8 : case PROCESSOR_TIGERLAKE:
491 8 : def_or_undef (parse_in, "__tune_tigerlake__");
492 8 : break;
493 2 : case PROCESSOR_COOPERLAKE:
494 2 : def_or_undef (parse_in, "__tune_cooperlake__");
495 2 : break;
496 33 : case PROCESSOR_SAPPHIRERAPIDS:
497 33 : def_or_undef (parse_in, "__tune_sapphirerapids__");
498 33 : break;
499 7 : case PROCESSOR_ALDERLAKE:
500 7 : def_or_undef (parse_in, "__tune_alderlake__");
501 7 : break;
502 0 : case PROCESSOR_ROCKETLAKE:
503 0 : def_or_undef (parse_in, "__tune_rocketlake__");
504 0 : break;
505 0 : case PROCESSOR_GRANITERAPIDS:
506 0 : def_or_undef (parse_in, "__tune_graniterapids__");
507 0 : break;
508 0 : case PROCESSOR_GRANITERAPIDS_D:
509 0 : def_or_undef (parse_in, "__tune_graniterapids_d__");
510 0 : break;
511 0 : case PROCESSOR_ARROWLAKE:
512 0 : def_or_undef (parse_in, "__tune_arrowlake__");
513 0 : break;
514 0 : case PROCESSOR_ARROWLAKE_S:
515 0 : def_or_undef (parse_in, "__tune_arrowlake_s__");
516 0 : break;
517 0 : case PROCESSOR_PANTHERLAKE:
518 0 : def_or_undef (parse_in, "__tune_pantherlake__");
519 0 : break;
520 0 : case PROCESSOR_DIAMONDRAPIDS:
521 0 : def_or_undef (parse_in, "__tune_diamondrapids__");
522 0 : break;
523 0 : case PROCESSOR_NOVALAKE:
524 0 : def_or_undef (parse_in, "__tune_novalake__");
525 0 : break;
526 0 : case PROCESSOR_C86_4G_M4:
527 0 : def_or_undef (parse_in, "__tune_c86_4g_m4__");
528 0 : break;
529 0 : case PROCESSOR_C86_4G_M6:
530 0 : def_or_undef (parse_in, "__tune_c86_4g_m6__");
531 0 : break;
532 0 : case PROCESSOR_C86_4G_M7:
533 0 : def_or_undef (parse_in, "__tune_c86_4g_m7__");
534 0 : break;
535 : case PROCESSOR_INTEL:
536 : case PROCESSOR_GENERIC:
537 : break;
538 : /* use PROCESSOR_max to not set/unset the tune macro. */
539 : case PROCESSOR_max:
540 : break;
541 : }
542 :
543 2439843 : switch (ix86_cmodel)
544 : {
545 2394360 : case CM_SMALL:
546 2394360 : case CM_SMALL_PIC:
547 2394360 : def_or_undef (parse_in, "__code_model_small__");
548 2394360 : break;
549 870 : case CM_MEDIUM:
550 870 : case CM_MEDIUM_PIC:
551 870 : def_or_undef (parse_in, "__code_model_medium__");
552 870 : break;
553 492 : case CM_LARGE:
554 492 : case CM_LARGE_PIC:
555 492 : def_or_undef (parse_in, "__code_model_large__");
556 492 : break;
557 44120 : case CM_32:
558 44120 : def_or_undef (parse_in, "__code_model_32__");
559 44120 : break;
560 1 : case CM_KERNEL:
561 1 : def_or_undef (parse_in, "__code_model_kernel__");
562 1 : break;
563 2439843 : default:
564 2439843 : ;
565 : }
566 :
567 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD)
568 10580 : def_or_undef (parse_in, "__WBNOINVD__");
569 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT)
570 20828 : def_or_undef (parse_in, "__AVX512VP2INTERSECT__");
571 2439843 : if (isa_flag & OPTION_MASK_ISA_MMX)
572 217942 : def_or_undef (parse_in, "__MMX__");
573 2439843 : if (isa_flag & OPTION_MASK_ISA_3DNOW)
574 2835 : def_or_undef (parse_in, "__3dNOW__");
575 2439843 : if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
576 1498 : def_or_undef (parse_in, "__3dNOW_A__");
577 2439843 : if (isa_flag & OPTION_MASK_ISA_SSE)
578 219834 : def_or_undef (parse_in, "__SSE__");
579 2439843 : if (isa_flag & OPTION_MASK_ISA_SSE2)
580 219731 : def_or_undef (parse_in, "__SSE2__");
581 2439843 : if (isa_flag & OPTION_MASK_ISA_SSE3)
582 96587 : def_or_undef (parse_in, "__SSE3__");
583 2439843 : if (isa_flag & OPTION_MASK_ISA_SSSE3)
584 94676 : def_or_undef (parse_in, "__SSSE3__");
585 2439843 : if (isa_flag & OPTION_MASK_ISA_SSE4_1)
586 93653 : def_or_undef (parse_in, "__SSE4_1__");
587 2439843 : if (isa_flag & OPTION_MASK_ISA_SSE4_2)
588 93919 : def_or_undef (parse_in, "__SSE4_2__");
589 2439843 : if (isa_flag & OPTION_MASK_ISA_AES)
590 10789 : def_or_undef (parse_in, "__AES__");
591 2439843 : if (isa_flag & OPTION_MASK_ISA_SHA)
592 10487 : def_or_undef (parse_in, "__SHA__");
593 2439843 : if (isa_flag & OPTION_MASK_ISA_PCLMUL)
594 31381 : def_or_undef (parse_in, "__PCLMUL__");
595 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX)
596 93518 : def_or_undef (parse_in, "__AVX__");
597 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX2)
598 147607 : def_or_undef (parse_in, "__AVX2__");
599 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512F)
600 177956 : def_or_undef (parse_in, "__AVX512F__");
601 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512CD)
602 91117 : def_or_undef (parse_in, "__AVX512CD__");
603 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512DQ)
604 104819 : def_or_undef (parse_in, "__AVX512DQ__");
605 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512BW)
606 183822 : def_or_undef (parse_in, "__AVX512BW__");
607 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512VL)
608 : {
609 180672 : def_or_undef (parse_in, "__AVX512VL__");
610 180672 : def_or_undef (parse_in, "__EVEX256__");
611 : }
612 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512VBMI)
613 91375 : def_or_undef (parse_in, "__AVX512VBMI__");
614 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512IFMA)
615 91422 : def_or_undef (parse_in, "__AVX512IFMA__");
616 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2)
617 90791 : def_or_undef (parse_in, "__AVX512VBMI2__");
618 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512VNNI)
619 91422 : def_or_undef (parse_in, "__AVX512VNNI__");
620 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG)
621 10534 : def_or_undef (parse_in, "__PCONFIG__");
622 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_SGX)
623 10771 : def_or_undef (parse_in, "__SGX__");
624 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512BITALG)
625 91338 : def_or_undef (parse_in, "__AVX512BITALG__");
626 2439843 : if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ)
627 91413 : def_or_undef (parse_in, "__AVX512VPOPCNTDQ__");
628 2439843 : if (isa_flag & OPTION_MASK_ISA_FMA)
629 11396 : def_or_undef (parse_in, "__FMA__");
630 2439843 : if (isa_flag & OPTION_MASK_ISA_RTM)
631 20400 : def_or_undef (parse_in, "__RTM__");
632 2439843 : if (isa_flag & OPTION_MASK_ISA_SSE4A)
633 4182 : def_or_undef (parse_in, "__SSE4A__");
634 2439843 : if (isa_flag & OPTION_MASK_ISA_FMA4)
635 2793 : def_or_undef (parse_in, "__FMA4__");
636 2439843 : if (isa_flag & OPTION_MASK_ISA_XOP)
637 1504 : def_or_undef (parse_in, "__XOP__");
638 2439843 : if (isa_flag & OPTION_MASK_ISA_LWP)
639 10541 : def_or_undef (parse_in, "__LWP__");
640 2439843 : if (isa_flag & OPTION_MASK_ISA_ABM)
641 159 : def_or_undef (parse_in, "__ABM__");
642 2439843 : if (isa_flag & OPTION_MASK_ISA_BMI)
643 11031 : def_or_undef (parse_in, "__BMI__");
644 2439843 : if (isa_flag & OPTION_MASK_ISA_BMI2)
645 11012 : def_or_undef (parse_in, "__BMI2__");
646 2439843 : if (isa_flag & OPTION_MASK_ISA_LZCNT)
647 11017 : def_or_undef (parse_in, "__LZCNT__");
648 2439843 : if (isa_flag & OPTION_MASK_ISA_TBM)
649 10530 : def_or_undef (parse_in, "__TBM__");
650 2439843 : if (isa_flag & OPTION_MASK_ISA_CRC32)
651 88279 : def_or_undef (parse_in, "__CRC32__");
652 2439843 : if (isa_flag & OPTION_MASK_ISA_POPCNT)
653 86145 : def_or_undef (parse_in, "__POPCNT__");
654 2439843 : if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
655 10719 : def_or_undef (parse_in, "__FSGSBASE__");
656 2439843 : if (isa_flag & OPTION_MASK_ISA_RDRND)
657 21108 : def_or_undef (parse_in, "__RDRND__");
658 2439843 : if (isa_flag & OPTION_MASK_ISA_F16C)
659 11255 : def_or_undef (parse_in, "__F16C__");
660 2439843 : if (isa_flag & OPTION_MASK_ISA_RDSEED)
661 10834 : def_or_undef (parse_in, "__RDSEED__");
662 2439843 : if (isa_flag & OPTION_MASK_ISA_PRFCHW)
663 486 : def_or_undef (parse_in, "__PRFCHW__");
664 2439843 : if (isa_flag & OPTION_MASK_ISA_ADX)
665 411 : def_or_undef (parse_in, "__ADX__");
666 2439843 : if (isa_flag & OPTION_MASK_ISA_FXSR)
667 209064 : def_or_undef (parse_in, "__FXSR__");
668 2439843 : if (isa_flag & OPTION_MASK_ISA_XSAVE)
669 82702 : def_or_undef (parse_in, "__XSAVE__");
670 2439843 : if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
671 10910 : def_or_undef (parse_in, "__XSAVEOPT__");
672 2439843 : if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
673 214200 : def_or_undef (parse_in, "__SSE_MATH__");
674 1599350 : if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
675 214097 : def_or_undef (parse_in, "__SSE2_MATH__");
676 2439843 : if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT)
677 10837 : def_or_undef (parse_in, "__CLFLUSHOPT__");
678 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_CLZERO)
679 10569 : def_or_undef (parse_in, "__CLZERO__");
680 2439843 : if (isa_flag & OPTION_MASK_ISA_XSAVEC)
681 10836 : def_or_undef (parse_in, "__XSAVEC__");
682 2439843 : if (isa_flag & OPTION_MASK_ISA_XSAVES)
683 10836 : def_or_undef (parse_in, "__XSAVES__");
684 2439843 : if (isa_flag & OPTION_MASK_ISA_CLWB)
685 10769 : def_or_undef (parse_in, "__CLWB__");
686 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_MWAITX)
687 10585 : def_or_undef (parse_in, "__MWAITX__");
688 2439843 : if (isa_flag & OPTION_MASK_ISA_PKU)
689 10750 : def_or_undef (parse_in, "__PKU__");
690 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_RDPID)
691 10599 : def_or_undef (parse_in, "__RDPID__");
692 2439843 : if (isa_flag & OPTION_MASK_ISA_GFNI)
693 62101 : def_or_undef (parse_in, "__GFNI__");
694 2439843 : if ((isa_flag & OPTION_MASK_ISA_SHSTK))
695 29115 : def_or_undef (parse_in, "__SHSTK__");
696 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_VAES)
697 20911 : def_or_undef (parse_in, "__VAES__");
698 2439843 : if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
699 20902 : def_or_undef (parse_in, "__VPCLMULQDQ__");
700 2439843 : if (isa_flag & OPTION_MASK_ISA_MOVDIRI)
701 10578 : def_or_undef (parse_in, "__MOVDIRI__");
702 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B)
703 10584 : def_or_undef (parse_in, "__MOVDIR64B__");
704 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG)
705 10552 : def_or_undef (parse_in, "__WAITPKG__");
706 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE)
707 10548 : def_or_undef (parse_in, "__CLDEMOTE__");
708 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_SERIALIZE)
709 10523 : def_or_undef (parse_in, "__SERIALIZE__");
710 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE)
711 10555 : def_or_undef (parse_in, "__PTWRITE__");
712 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16)
713 91401 : def_or_undef (parse_in, "__AVX512BF16__");
714 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512FP16)
715 83683 : def_or_undef (parse_in, "__AVX512FP16__");
716 2439843 : if (TARGET_MMX_WITH_SSE)
717 1584795 : def_or_undef (parse_in, "__MMX_WITH_SSE__");
718 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
719 10520 : def_or_undef (parse_in, "__ENQCMD__");
720 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK)
721 10513 : def_or_undef (parse_in, "__TSXLDTRK__");
722 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_TILE)
723 71085 : def_or_undef (parse_in, "__AMX_TILE__");
724 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_INT8)
725 10382 : def_or_undef (parse_in, "__AMX_INT8__");
726 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_BF16)
727 10393 : def_or_undef (parse_in, "__AMX_BF16__");
728 2439843 : if (isa_flag & OPTION_MASK_ISA_SAHF)
729 6271 : def_or_undef (parse_in, "__LAHF_SAHF__");
730 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_MOVBE)
731 796 : def_or_undef (parse_in, "__MOVBE__");
732 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_UINTR)
733 10334 : def_or_undef (parse_in, "__UINTR__");
734 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_HRESET)
735 10539 : def_or_undef (parse_in, "__HRESET__");
736 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_KL)
737 20821 : def_or_undef (parse_in, "__KL__");
738 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_WIDEKL)
739 10456 : def_or_undef (parse_in, "__WIDEKL__");
740 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNI)
741 10513 : def_or_undef (parse_in, "__AVXVNNI__");
742 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVXIFMA)
743 10445 : def_or_undef (parse_in, "__AVXIFMA__");
744 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT8)
745 10452 : def_or_undef (parse_in, "__AVXVNNIINT8__");
746 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVXNECONVERT)
747 10450 : def_or_undef (parse_in, "__AVXNECONVERT__");
748 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_CMPCCXADD)
749 10334 : def_or_undef (parse_in, "__CMPCCXADD__");
750 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP16)
751 22 : def_or_undef (parse_in, "__AMX_FP16__");
752 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_PREFETCHI)
753 10348 : def_or_undef (parse_in, "__PREFETCHI__");
754 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_RAOINT)
755 10501 : def_or_undef (parse_in, "__RAOINT__");
756 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_COMPLEX)
757 10380 : def_or_undef (parse_in, "__AMX_COMPLEX__");
758 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVXVNNIINT16)
759 10448 : def_or_undef (parse_in, "__AVXVNNIINT16__");
760 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_SM3)
761 10437 : def_or_undef (parse_in, "__SM3__");
762 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_SHA512)
763 10437 : def_or_undef (parse_in, "__SHA512__");
764 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_SM4)
765 20805 : def_or_undef (parse_in, "__SM4__");
766 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_USER_MSR)
767 10353 : def_or_undef (parse_in, "__USER_MSR__");
768 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVX10_1)
769 71410 : def_or_undef (parse_in, "__AVX10_1__");
770 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_APX_F)
771 65 : def_or_undef (parse_in, "__APX_F__");
772 2439843 : if (ix86_apx_inline_asm_use_gpr32)
773 1 : def_or_undef (parse_in, "__APX_INLINE_ASM_USE_GPR32__");
774 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVX10_2)
775 71433 : def_or_undef (parse_in, "__AVX10_2__");
776 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_AVX512)
777 10442 : def_or_undef (parse_in, "__AMX_AVX512__");
778 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_TF32)
779 10381 : def_or_undef (parse_in, "__AMX_TF32__");
780 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_FP8)
781 23 : def_or_undef (parse_in, "__AMX_FP8__");
782 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_MOVRS)
783 20584 : def_or_undef (parse_in, "__MOVRS__");
784 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AMX_MOVRS)
785 10209 : def_or_undef (parse_in, "__AMX_MOVRS__");
786 2439843 : if (isa_flag2 & OPTION_MASK_ISA2_AVX512BMM)
787 20834 : def_or_undef (parse_in, "__AVX512BMM__");
788 2439843 : if (TARGET_IAMCU)
789 : {
790 0 : def_or_undef (parse_in, "__iamcu");
791 0 : def_or_undef (parse_in, "__iamcu__");
792 : }
793 2439843 : }
794 :
795 :
796 : /* Hook to validate the current #pragma GCC target and set the state, and
797 : update the macros based on what was changed. If ARGS is NULL, then
798 : POP_TARGET is used to reset the options. */
799 :
800 : static bool
801 1115659 : ix86_pragma_target_parse (tree args, tree pop_target)
802 : {
803 1115659 : tree prev_tree
804 1115659 : = build_target_option_node (&global_options, &global_options_set);
805 1115659 : tree cur_tree;
806 1115659 : struct cl_target_option *prev_opt;
807 1115659 : struct cl_target_option *cur_opt;
808 1115659 : HOST_WIDE_INT prev_isa;
809 1115659 : HOST_WIDE_INT cur_isa;
810 1115659 : HOST_WIDE_INT diff_isa;
811 1115659 : HOST_WIDE_INT prev_isa2;
812 1115659 : HOST_WIDE_INT cur_isa2;
813 1115659 : HOST_WIDE_INT diff_isa2;
814 1115659 : enum processor_type prev_arch;
815 1115659 : enum processor_type prev_tune;
816 1115659 : enum processor_type cur_arch;
817 1115659 : enum processor_type cur_tune;
818 :
819 1115659 : if (! args)
820 : {
821 555361 : cur_tree = (pop_target ? pop_target : target_option_default_node);
822 555361 : cl_target_option_restore (&global_options, &global_options_set,
823 555361 : TREE_TARGET_OPTION (cur_tree));
824 : }
825 : else
826 : {
827 560298 : cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args,
828 : &global_options,
829 : &global_options_set, 0);
830 560298 : if (!cur_tree || cur_tree == error_mark_node)
831 : {
832 269 : cl_target_option_restore (&global_options, &global_options_set,
833 269 : TREE_TARGET_OPTION (prev_tree));
834 269 : return false;
835 : }
836 : }
837 :
838 1115390 : target_option_current_node = cur_tree;
839 1115390 : ix86_reset_previous_fndecl ();
840 :
841 : /* Figure out the previous/current isa, arch, tune and the differences. */
842 1115390 : prev_opt = TREE_TARGET_OPTION (prev_tree);
843 1115390 : cur_opt = TREE_TARGET_OPTION (cur_tree);
844 1115390 : prev_isa = prev_opt->x_ix86_isa_flags;
845 1115390 : cur_isa = cur_opt->x_ix86_isa_flags;
846 1115390 : diff_isa = (prev_isa ^ cur_isa);
847 1115390 : prev_isa2 = prev_opt->x_ix86_isa_flags2;
848 1115390 : cur_isa2 = cur_opt->x_ix86_isa_flags2;
849 1115390 : diff_isa2 = (prev_isa2 ^ cur_isa2);
850 1115390 : prev_arch = (enum processor_type) prev_opt->arch;
851 1115390 : prev_tune = (enum processor_type) prev_opt->tune;
852 1115390 : cur_arch = (enum processor_type) cur_opt->arch;
853 1115390 : cur_tune = (enum processor_type) cur_opt->tune;
854 :
855 : /* If the same processor is used for both previous and current options, don't
856 : change the macros. */
857 1115390 : if (cur_arch == prev_arch)
858 1115389 : cur_arch = prev_arch = PROCESSOR_max;
859 :
860 1115390 : if (cur_tune == prev_tune)
861 1115389 : cur_tune = prev_tune = PROCESSOR_max;
862 :
863 : /* Undef all of the macros for that are no longer current. */
864 1115390 : cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
865 1115390 : ix86_target_macros_internal (prev_isa & diff_isa,
866 : prev_isa2 & diff_isa2,
867 : prev_arch,
868 : prev_tune,
869 1115390 : (enum fpmath_unit) prev_opt->x_ix86_fpmath,
870 : cpp_undef);
871 1115390 : cpp_stop_forcing_token_locations (parse_in);
872 :
873 : /* For the definitions, ensure all newly defined macros are considered
874 : as used for -Wunused-macros. There is no point warning about the
875 : compiler predefined macros. */
876 1115390 : cpp_options *cpp_opts = cpp_get_options (parse_in);
877 1115390 : unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
878 1115390 : cpp_opts->warn_unused_macros = 0;
879 :
880 : /* Define all of the macros for new options that were just turned on. */
881 1115390 : cpp_force_token_locations (parse_in, BUILTINS_LOCATION);
882 1115390 : ix86_target_macros_internal (cur_isa & diff_isa,
883 : cur_isa2 & diff_isa2,
884 : cur_arch,
885 : cur_tune,
886 1115390 : (enum fpmath_unit) cur_opt->x_ix86_fpmath,
887 : cpp_define);
888 1115390 : cpp_stop_forcing_token_locations (parse_in);
889 :
890 1115390 : cpp_opts->warn_unused_macros = saved_warn_unused_macros;
891 :
892 1115390 : return true;
893 : }
894 :
895 : /* Function to tell the preprocessor about the defines for the current target. */
896 :
897 : void
898 209063 : ix86_target_macros (void)
899 : {
900 : /* 32/64-bit won't change with target specific options, so do the assert and
901 : builtin_define_std calls here. */
902 209063 : if (TARGET_64BIT)
903 : {
904 203683 : cpp_assert (parse_in, "cpu=x86_64");
905 203683 : cpp_assert (parse_in, "machine=x86_64");
906 203683 : cpp_define (parse_in, "__amd64");
907 203683 : cpp_define (parse_in, "__amd64__");
908 203683 : cpp_define (parse_in, "__x86_64");
909 203683 : cpp_define (parse_in, "__x86_64__");
910 203683 : if (TARGET_X32)
911 : {
912 96 : cpp_define (parse_in, "_ILP32");
913 96 : cpp_define (parse_in, "__ILP32__");
914 : }
915 : }
916 : else
917 : {
918 5380 : cpp_assert (parse_in, "cpu=i386");
919 5380 : cpp_assert (parse_in, "machine=i386");
920 5380 : builtin_define_std ("i386");
921 5380 : cpp_define (parse_in, "_ILP32");
922 5380 : cpp_define (parse_in, "__ILP32__");
923 : }
924 :
925 209063 : if (!TARGET_80387)
926 221 : cpp_define (parse_in, "_SOFT_FLOAT");
927 :
928 : /* HFmode/BFmode is supported without depending any isa
929 : in scalar_mode_supported_p and libgcc_floating_mode_supported_p,
930 : but according to psABI, they're really supported w/ SSE2 and above.
931 : Since libstdc++ uses __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__
932 : for backend support of the types, undef the macros to avoid
933 : build failure, see PR109504. */
934 209063 : if (!TARGET_SSE2)
935 : {
936 399 : if (c_dialect_cxx () && cxx_dialect > cxx20)
937 : {
938 5 : cpp_undef (parse_in, "__STDCPP_FLOAT16_T__");
939 5 : cpp_undef (parse_in, "__STDCPP_BFLOAT16_T__");
940 : }
941 : }
942 :
943 209063 : if (TARGET_LONG_DOUBLE_64)
944 16 : cpp_define (parse_in, "__LONG_DOUBLE_64__");
945 :
946 209063 : if (TARGET_LONG_DOUBLE_128)
947 6 : cpp_define (parse_in, "__LONG_DOUBLE_128__");
948 :
949 209063 : cpp_define_formatted (parse_in, "__SIZEOF_FLOAT80__=%d",
950 209063 : GET_MODE_SIZE (XFmode));
951 :
952 209063 : cpp_define (parse_in, "__SIZEOF_FLOAT128__=16");
953 :
954 209063 : cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE);
955 209063 : cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE);
956 :
957 209063 : cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__");
958 :
959 209063 : ix86_target_macros_internal (ix86_isa_flags,
960 : ix86_isa_flags2,
961 : ix86_arch,
962 : ix86_tune,
963 : ix86_fpmath,
964 : cpp_define);
965 :
966 209063 : cpp_define (parse_in, "__SEG_FS");
967 209063 : cpp_define (parse_in, "__SEG_GS");
968 :
969 209063 : if (flag_cf_protection != CF_NONE)
970 19283 : cpp_define_formatted (parse_in, "__CET__=%d", flag_cf_protection & ~CF_SET);
971 209063 : }
972 :
973 :
974 : /* Register target pragmas. We need to add the hook for parsing #pragma GCC
975 : option here rather than in i386.cc since it will pull in various preprocessor
976 : functions, and those are not present in languages like fortran without a
977 : preprocessor. */
978 :
979 : void
980 209601 : ix86_register_pragmas (void)
981 : {
982 : /* Update pragma hook to allow parsing #pragma GCC target. */
983 209601 : targetm.target_option.pragma_parse = ix86_pragma_target_parse;
984 :
985 209601 : c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS);
986 209601 : c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS);
987 :
988 : #ifdef REGISTER_SUBTARGET_PRAGMAS
989 : REGISTER_SUBTARGET_PRAGMAS ();
990 : #endif
991 209601 : }
|
