LCOV - code coverage report
Current view: top level - gcc/config/i386 - i386-rust.cc (source / functions) Coverage Total Hit
Test: gcc.info Lines: 54.4 % 90 49
Test Date: 2024-04-27 14:03:13 Functions: 100.0 % 1 1
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: - 0 0

             Branch data     Line data    Source code
       1                 :             : /* Subroutines for the Rust front end on the x86 architecture.
       2                 :             :    Copyright (C) 2022-2024 Free Software Foundation, Inc.
       3                 :             : 
       4                 :             : GCC is free software; you can redistribute it and/or modify
       5                 :             : it under the terms of the GNU General Public License as published by
       6                 :             : the Free Software Foundation; either version 3, or (at your option)
       7                 :             : any later version.
       8                 :             : 
       9                 :             : GCC is distributed in the hope that it will be useful,
      10                 :             : but WITHOUT ANY WARRANTY; without even the implied warranty of
      11                 :             : MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
      12                 :             : GNU General Public License for more details.
      13                 :             : 
      14                 :             : You should have received a copy of the GNU General Public License
      15                 :             : along with GCC; see the file COPYING3.  If not see
      16                 :             : <http://www.gnu.org/licenses/>.  */
      17                 :             : 
      18                 :             : #define IN_TARGET_CODE 1
      19                 :             : 
      20                 :             : #include "config.h"
      21                 :             : #include "system.h"
      22                 :             : #include "coretypes.h"
      23                 :             : #include "tm.h"
      24                 :             : #include "tm_rust.h"
      25                 :             : #include "rust/rust-target.h"
      26                 :             : 
      27                 :             : /* Implement TARGET_RUST_CPU_INFO for x86 targets.  */
      28                 :             : 
      29                 :             : void
      30                 :        3696 : ix86_rust_target_cpu_info (void)
      31                 :             : {
      32                 :        3696 :   if (TARGET_64BIT)
      33                 :        3696 :     rust_add_target_info ("target_arch", "x86_64");
      34                 :             :   else
      35                 :           0 :     rust_add_target_info ("target_arch", "x86");
      36                 :             : 
      37                 :             :   // features officially "stabilised" in rustc
      38                 :        3696 :   if (TARGET_MMX)
      39                 :        3696 :     rust_add_target_info ("target_feature", "mmx");
      40                 :        3696 :   if (TARGET_SSE)
      41                 :        3696 :     rust_add_target_info ("target_feature", "sse");
      42                 :        3696 :   if (TARGET_SSE2)
      43                 :        3696 :     rust_add_target_info ("target_feature", "sse2");
      44                 :        3696 :   if (TARGET_SSE3)
      45                 :           0 :     rust_add_target_info ("target_feature", "sse3");
      46                 :        3696 :   if (TARGET_SSSE3)
      47                 :           0 :     rust_add_target_info ("target_feature", "ssse3");
      48                 :        3696 :   if (TARGET_SSE4_1)
      49                 :           0 :     rust_add_target_info ("target_feature", "sse4.1");
      50                 :        3696 :   if (TARGET_SSE4_2)
      51                 :           0 :     rust_add_target_info ("target_feature", "sse4.2");
      52                 :        3696 :   if (TARGET_AES)
      53                 :           0 :     rust_add_target_info ("target_feature", "aes");
      54                 :        3696 :   if (TARGET_SHA)
      55                 :           0 :     rust_add_target_info ("target_feature", "sha");
      56                 :        3696 :   if (TARGET_AVX)
      57                 :           0 :     rust_add_target_info ("target_feature", "avx");
      58                 :        3696 :   if (TARGET_AVX2)
      59                 :           0 :     rust_add_target_info ("target_feature", "avx2");
      60                 :        3696 :   if (TARGET_AVX512F)
      61                 :           0 :     rust_add_target_info ("target_feature", "avx512f");
      62                 :        3696 :   if (TARGET_AVX512ER)
      63                 :           0 :     rust_add_target_info ("target_feature", "avx512er");
      64                 :        3696 :   if (TARGET_AVX512CD)
      65                 :           0 :     rust_add_target_info ("target_feature", "avx512cd");
      66                 :        3696 :   if (TARGET_AVX512PF)
      67                 :           0 :     rust_add_target_info ("target_feature", "avx512pf");
      68                 :        3696 :   if (TARGET_AVX512DQ)
      69                 :           0 :     rust_add_target_info ("target_feature", "avx512dq");
      70                 :        3696 :   if (TARGET_AVX512BW)
      71                 :           0 :     rust_add_target_info ("target_feature", "avx512bw");
      72                 :        3696 :   if (TARGET_AVX512VL)
      73                 :           0 :     rust_add_target_info ("target_feature", "avx512vl");
      74                 :        3696 :   if (TARGET_AVX512VBMI)
      75                 :           0 :     rust_add_target_info ("target_feature", "avx512vbmi");
      76                 :        3696 :   if (TARGET_AVX512IFMA)
      77                 :           0 :     rust_add_target_info ("target_feature", "avx512ifma");
      78                 :        3696 :   if (TARGET_AVX512VPOPCNTDQ)
      79                 :           0 :     rust_add_target_info ("target_feature", "avx512vpopcntdq");
      80                 :        3696 :   if (TARGET_FMA)
      81                 :           0 :     rust_add_target_info ("target_feature", "fma");
      82                 :        3696 :   if (TARGET_RTM)
      83                 :           0 :     rust_add_target_info ("target_feature", "rtm");
      84                 :        3696 :   if (TARGET_SSE4A)
      85                 :           0 :     rust_add_target_info ("target_feature", "sse4a");
      86                 :        3696 :   if (TARGET_BMI)
      87                 :             :     {
      88                 :           0 :       rust_add_target_info ("target_feature", "bmi1");
      89                 :           0 :       rust_add_target_info ("target_feature", "bmi");
      90                 :             :     }
      91                 :        3696 :   if (TARGET_BMI2)
      92                 :           0 :     rust_add_target_info ("target_feature", "bmi2");
      93                 :        3696 :   if (TARGET_LZCNT)
      94                 :           0 :     rust_add_target_info ("target_feature", "lzcnt");
      95                 :        3696 :   if (TARGET_TBM)
      96                 :           0 :     rust_add_target_info ("target_feature", "tbm");
      97                 :        3696 :   if (TARGET_POPCNT)
      98                 :           0 :     rust_add_target_info ("target_feature", "popcnt");
      99                 :        3696 :   if (TARGET_RDRND)
     100                 :             :     {
     101                 :           0 :       rust_add_target_info ("target_feature", "rdrand");
     102                 :           0 :       rust_add_target_info ("target_feature", "rdrnd");
     103                 :             :     }
     104                 :        3696 :   if (TARGET_F16C)
     105                 :           0 :     rust_add_target_info ("target_feature", "f16c");
     106                 :        3696 :   if (TARGET_RDSEED)
     107                 :           0 :     rust_add_target_info ("target_feature", "rdseed");
     108                 :        3696 :   if (TARGET_ADX)
     109                 :           0 :     rust_add_target_info ("target_feature", "adx");
     110                 :        3696 :   if (TARGET_FXSR)
     111                 :        3696 :     rust_add_target_info ("target_feature", "fxsr");
     112                 :        3696 :   if (TARGET_XSAVE)
     113                 :           0 :     rust_add_target_info ("target_feature", "xsave");
     114                 :        3696 :   if (TARGET_XSAVEOPT)
     115                 :           0 :     rust_add_target_info ("target_feature", "xsaveopt");
     116                 :        3696 :   if (TARGET_XSAVEC)
     117                 :           0 :     rust_add_target_info ("target_feature", "xsavec");
     118                 :        3696 :   if (TARGET_XSAVES)
     119                 :           0 :     rust_add_target_info ("target_feature", "xsaves");
     120                 :        3696 :   if (TARGET_VPCLMULQDQ)
     121                 :             :     {
     122                 :           0 :       rust_add_target_info ("target_feature", "pclmulqdq");
     123                 :           0 :       rust_add_target_info ("target_feature", "vpclmulqdq");
     124                 :             :     }
     125                 :        3696 :   if (TARGET_CMPXCHG16B)
     126                 :           0 :     rust_add_target_info ("target_feature", "cmpxchg16b");
     127                 :        3696 :   if (TARGET_MOVBE)
     128                 :           0 :     rust_add_target_info ("target_feature", "movbe");
     129                 :        3696 : }
        

Generated by: LCOV version 2.1-beta

LCOV profile is generated on x86_64 machine using following configure options: configure --disable-bootstrap --enable-coverage=opt --enable-languages=c,c++,fortran,go,jit,lto,rust,m2 --enable-host-shared. GCC test suite is run with the built compiler.