Line data Source code
1 : ;; Predicate definitions for IA-32 and x86-64.
2 : ;; Copyright (C) 2004-2026 Free Software Foundation, Inc.
3 : ;;
4 : ;; This file is part of GCC.
5 : ;;
6 : ;; GCC is free software; you can redistribute it and/or modify
7 : ;; it under the terms of the GNU General Public License as published by
8 : ;; the Free Software Foundation; either version 3, or (at your option)
9 : ;; any later version.
10 : ;;
11 : ;; GCC is distributed in the hope that it will be useful,
12 : ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 : ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 : ;; GNU General Public License for more details.
15 : ;;
16 : ;; You should have received a copy of the GNU General Public License
17 : ;; along with GCC; see the file COPYING3. If not see
18 : ;; <http://www.gnu.org/licenses/>.
19 :
20 : ;; Return true if OP is either a i387 or SSE fp register.
21 : (define_predicate "any_fp_register_operand"
22 : (and (match_code "reg")
23 130238933 : (match_test "ANY_FP_REGNO_P (REGNO (op))")))
24 40530 :
25 : ;; Return true if OP is an i387 fp register.
26 : (define_predicate "fp_register_operand"
27 : (and (match_code "reg")
28 1583923 : (match_test "STACK_REGNO_P (REGNO (op))")))
29 1499707 :
30 428734995 : ;; True if the operand is a GENERAL class register.
31 : (define_predicate "general_reg_operand"
32 : (and (match_code "reg")
33 266403939 : (match_test "GENERAL_REGNO_P (REGNO (op))")))
34 199143134 :
35 444760558 : ;; True if the operand is an INDEX class register.
36 : (define_predicate "index_reg_operand"
37 : (and (match_code "reg")
38 658647 : (match_test "INDEX_REGNO_P (REGNO (op))")))
39 658572 :
40 659152 : ;; True if the operand is a nonimmediate operand with GENERAL class register.
41 : (define_predicate "nonimmediate_gr_operand"
42 : (if_then_else (match_code "reg")
43 55080716 : (match_test "GENERAL_REGNO_P (REGNO (op))")
44 61130467 : (match_operand 0 "nonimmediate_operand")))
45 76611635 :
46 : ;; True if the operand is a general operand with GENERAL class register.
47 : (define_predicate "general_gr_operand"
48 89399421 : (if_then_else (match_code "reg")
49 38687047 : (match_test "GENERAL_REGNO_P (REGNO (op))")
50 113216842 : (match_operand 0 "general_operand")))
51 :
52 : ;; True if the operand is an MMX register.
53 : (define_predicate "mmx_reg_operand"
54 38943142 : (and (match_code "reg")
55 192 : (match_test "MMX_REGNO_P (REGNO (op))")))
56 38943142 :
57 : ;; Match register operands, but include memory operands for
58 : ;; !TARGET_MMX_WITH_SSE.
59 : (define_predicate "register_mmxmem_operand"
60 583852 : (ior (match_operand 0 "register_operand")
61 15 : (and (not (match_test "TARGET_MMX_WITH_SSE"))
62 583852 : (match_operand 0 "memory_operand"))))
63 :
64 : ;; True if the operand is an SSE register.
65 155218159 : (define_predicate "sse_reg_operand"
66 : (and (match_code "reg")
67 155218159 : (match_test "SSE_REGNO_P (REGNO (op))")))
68 1704907 :
69 : ;; Return true if op is a QImode register.
70 : (define_predicate "any_QIreg_operand"
71 : (and (match_code "reg")
72 2231398 : (match_test "ANY_QI_REGNO_P (REGNO (op))")))
73 766231 :
74 2257453 : ;; Return true if op is one of QImode registers: %[abcd][hl].
75 : (define_predicate "QIreg_operand"
76 : (and (match_code "reg")
77 809440 : (match_test "QI_REGNO_P (REGNO (op))")))
78 634157 :
79 1643485 : ;; Return true if op is a QImode register operand other than %[abcd][hl].
80 : (define_predicate "ext_QIreg_operand"
81 3288781 : (and (match_test "TARGET_64BIT")
82 3289116 : (match_code "reg")
83 995525 : (not (match_test "QI_REGNO_P (REGNO (op))"))))
84 3560410 :
85 : ;; Return true if op is the AX register.
86 : (define_predicate "ax_reg_operand"
87 : (and (match_code "reg")
88 22338660 : (match_test "REGNO (op) == AX_REG")))
89 0 :
90 113834863 : ;; Return true if op is the flags register.
91 : (define_special_predicate "flags_reg_operand"
92 : (and (match_code "reg")
93 112802150 : (match_test "REGNO (op) == FLAGS_REG")))
94 :
95 40632969 : ;; True if the operand is a MASK register.
96 : (define_predicate "mask_reg_operand"
97 9804742 : (and (match_code "reg")
98 4548 : (match_test "MASK_REGNO_P (REGNO (op))")))
99 9809290 :
100 : ;; Match a DI, SI or HImode register operand.
101 : (define_special_predicate "int248_register_operand"
102 : (and (match_operand 0 "register_operand")
103 980307 : (ior (and (match_test "TARGET_64BIT")
104 282038 : (match_test "GET_MODE (op) == DImode"))
105 582507 : (match_test "GET_MODE (op) == SImode")
106 363012 : (match_test "GET_MODE (op) == HImode"))))
107 :
108 : ;; Match a DI, SI, HI or QImode nonimmediate_operand.
109 : (define_special_predicate "int_nonimmediate_operand"
110 438489 : (and (match_operand 0 "nonimmediate_operand")
111 589820 : (ior (and (match_test "TARGET_64BIT")
112 438489 : (match_test "GET_MODE (op) == DImode"))
113 182303 : (match_test "GET_MODE (op) == SImode")
114 : (match_test "GET_MODE (op) == HImode")
115 438489 : (match_test "GET_MODE (op) == QImode"))))
116 :
117 : ;; Match register operands, but include memory operands for TARGET_SSE_MATH.
118 : (define_predicate "register_ssemem_operand"
119 2796989 : (if_then_else
120 2796989 : (match_test "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")
121 2796989 : (match_operand 0 "nonimmediate_operand")
122 : (match_operand 0 "register_operand")))
123 :
124 1077513 : ;; Match nonimmediate operands, but exclude memory operands
125 : ;; for TARGET_SSE_MATH if TARGET_MIX_SSE_I387 is not enabled.
126 1077513 : (define_predicate "nonimm_ssenomem_operand"
127 : (if_then_else
128 1077513 : (and (match_test "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")
129 2155026 : (not (match_test "TARGET_MIX_SSE_I387")))
130 : (match_operand 0 "register_operand")
131 : (match_operand 0 "nonimmediate_operand")))
132 :
133 726107 : ;; The above predicate, suitable for x87 arithmetic operators.
134 : (define_predicate "x87nonimm_ssenomem_operand"
135 726107 : (if_then_else
136 726107 : (and (match_test "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")
137 1452214 : (not (match_test "TARGET_MIX_SSE_I387 && X87_ENABLE_ARITH (mode)")))
138 : (match_operand 0 "register_operand")
139 : (match_operand 0 "nonimmediate_operand")))
140 :
141 35231 : ;; Match register operands, include memory operand for TARGET_SSE4_1.
142 : (define_predicate "register_sse4nonimm_operand"
143 35231 : (if_then_else (match_test "TARGET_SSE4_1")
144 : (match_operand 0 "nonimmediate_operand")
145 : (match_operand 0 "register_operand")))
146 :
147 14090 : ;; Return true if VALUE is symbol reference
148 : (define_predicate "symbol_operand"
149 14090 : (match_code "symbol_ref"))
150 14090 :
151 : ;; Return true if VALUE is an ENDBR opcode in immediate field.
152 : (define_predicate "ix86_endbr_immediate_operand"
153 : (match_code "const_int")
154 6351981136 : {
155 6351981136 : if (flag_cf_protection & CF_BRANCH)
156 : {
157 1205504496 : unsigned HOST_WIDE_INT imm = UINTVAL (op);
158 1205504496 : unsigned HOST_WIDE_INT val = TARGET_64BIT ? 0xfa1e0ff3 : 0xfb1e0ff3;
159 :
160 1205504496 : if (imm == val)
161 : return true;
162 :
163 : /* NB: Encoding is byte based. */
164 1205504288 : if (TARGET_64BIT)
165 2294974336 : for (; imm >= val; imm >>= 8)
166 1279471921 : if (imm == val)
167 : return true;
168 : }
169 :
170 : return false;
171 : })
172 :
173 : ;; Return true if VALUE can be stored in a sign extended immediate field.
174 8221640041 : (define_predicate "x86_64_immediate_operand"
175 : (match_code "const_int,symbol_ref,label_ref,const")
176 8221640041 : {
177 11241191782 : if (ix86_endbr_immediate_operand (op, VOIDmode))
178 : return false;
179 :
180 4889210395 : if (!TARGET_64BIT)
181 5075621424 : return immediate_operand (op, mode);
182 :
183 4702799617 : switch (GET_CODE (op))
184 : {
185 3844997851 : case CONST_INT:
186 3844997851 : {
187 3844997851 : HOST_WIDE_INT val = INTVAL (op);
188 3844997851 : return trunc_int_for_mode (val, SImode) == val;
189 : }
190 694164131 : case SYMBOL_REF:
191 : /* TLS symbols are not constant. */
192 694164131 : if (SYMBOL_REF_TLS_MODEL (op))
193 : return false;
194 :
195 : /* Load the external function address via the GOT slot. */
196 694128423 : if (ix86_force_load_from_GOT_p (op))
197 : return false;
198 :
199 : /* For certain code models, the symbolic references are known to fit.
200 : in CM_SMALL_PIC model we know it fits if it is local to the shared
201 : library. Don't count TLS SYMBOL_REFs here, since they should fit
202 : only if inside of UNSPEC handled below. */
203 694128321 : return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL
204 694128321 : || (ix86_cmodel == CM_MEDIUM && !SYMBOL_REF_FAR_ADDR_P (op)));
205 :
206 23484174 : case LABEL_REF:
207 : /* For certain code models, the code is near as well. */
208 23484174 : return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
209 : || ix86_cmodel == CM_KERNEL);
210 :
211 140153461 : case CONST:
212 : /* We also may accept the offsetted memory references in certain
213 : special cases. */
214 140153461 : if (GET_CODE (XEXP (op, 0)) == UNSPEC)
215 731289 : switch (XINT (XEXP (op, 0), 1))
216 : {
217 : case UNSPEC_GOTPCREL:
218 : case UNSPEC_DTPOFF:
219 : case UNSPEC_GOTNTPOFF:
220 : case UNSPEC_NTPOFF:
221 : case UNSPEC_SECREL32:
222 : return true;
223 : default:
224 : break;
225 : }
226 :
227 139423264 : if (GET_CODE (XEXP (op, 0)) == PLUS)
228 : {
229 139422172 : rtx op1 = XEXP (XEXP (op, 0), 0);
230 139422172 : rtx op2 = XEXP (XEXP (op, 0), 1);
231 :
232 139422172 : if (ix86_cmodel == CM_LARGE && GET_CODE (op1) != UNSPEC)
233 : return false;
234 139422167 : if (!CONST_INT_P (op2))
235 : return false;
236 :
237 139422167 : HOST_WIDE_INT offset = INTVAL (op2);
238 139422167 : if (trunc_int_for_mode (offset, SImode) != offset)
239 : return false;
240 :
241 139416581 : switch (GET_CODE (op1))
242 : {
243 139080177 : case SYMBOL_REF:
244 : /* TLS symbols are not constant. */
245 139080177 : if (SYMBOL_REF_TLS_MODEL (op1))
246 : return false;
247 :
248 : /* Load the external function address via the GOT slot. */
249 139069627 : if (ix86_force_load_from_GOT_p (op1))
250 : return false;
251 :
252 : /* For CM_SMALL assume that latest object is 16MB before
253 : end of 31bits boundary. We may also accept pretty
254 : large negative constants knowing that all objects are
255 : in the positive half of address space. */
256 139069621 : if ((ix86_cmodel == CM_SMALL
257 192956 : || (ix86_cmodel == CM_MEDIUM
258 0 : && !SYMBOL_REF_FAR_ADDR_P (op1)))
259 139069621 : && offset < 16*1024*1024)
260 : return true;
261 : /* For CM_KERNEL we know that all object resist in the
262 : negative half of 32bits address space. We may not
263 : accept negative offsets, since they may be just off
264 : and we may accept pretty large positive ones. */
265 196284 : if (ix86_cmodel == CM_KERNEL
266 0 : && offset > 0)
267 : return true;
268 : break;
269 :
270 4687 : case LABEL_REF:
271 : /* These conditions are similar to SYMBOL_REF ones, just the
272 : constraints for code models differ. */
273 4687 : if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
274 4687 : && offset < 16*1024*1024)
275 : return true;
276 0 : if (ix86_cmodel == CM_KERNEL
277 0 : && offset > 0)
278 : return true;
279 : break;
280 :
281 331717 : case UNSPEC:
282 331717 : switch (XINT (op1, 1))
283 : {
284 : case UNSPEC_DTPOFF:
285 : case UNSPEC_NTPOFF:
286 : return true;
287 : }
288 : break;
289 :
290 : default:
291 : break;
292 : }
293 : }
294 : break;
295 :
296 0 : default:
297 0 : gcc_unreachable ();
298 : }
299 :
300 : return false;
301 : })
302 :
303 : ;; Return true if VALUE can be stored in the zero extended immediate field.
304 5369442107 : (define_predicate "x86_64_zext_immediate_operand"
305 : (match_code "const_int,symbol_ref,label_ref,const")
306 5369442107 : {
307 724816361 : if (ix86_endbr_immediate_operand (op, VOIDmode))
308 4889210646 : return false;
309 4889210646 :
310 724816213 : switch (GET_CODE (op))
311 4889210646 : {
312 5548979124 : case CONST_INT:
313 659768478 : return !(INTVAL (op) & ~HOST_WIDE_INT_C (0xffffffff));
314 :
315 58897754 : case SYMBOL_REF:
316 4889210646 : /* TLS symbols are not constant. */
317 4948108400 : if (SYMBOL_REF_TLS_MODEL (op))
318 266292947 : return false;
319 :
320 : /* Load the external function address via the GOT slot. */
321 58862917 : if (ix86_force_load_from_GOT_p (op))
322 724816361 : return false;
323 :
324 : /* For certain code models, the symbolic references are known to fit. */
325 58862816 : return (ix86_cmodel == CM_SMALL
326 58862816 : || (ix86_cmodel == CM_MEDIUM
327 219 : && !SYMBOL_REF_FAR_ADDR_P (op)));
328 :
329 2119996 : case LABEL_REF:
330 : /* For certain code models, the code is near as well. */
331 2119996 : return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
332 :
333 4029985 : case CONST:
334 : /* We also may accept the offsetted memory references in certain
335 : special cases. */
336 4029985 : if (GET_CODE (XEXP (op, 0)) == PLUS)
337 : {
338 4025633 : rtx op1 = XEXP (XEXP (op, 0), 0);
339 4025633 : rtx op2 = XEXP (XEXP (op, 0), 1);
340 :
341 4025633 : if (ix86_cmodel == CM_LARGE)
342 : return false;
343 4025631 : if (!CONST_INT_P (op2))
344 : return false;
345 :
346 4025631 : HOST_WIDE_INT offset = INTVAL (op2);
347 4025631 : if (trunc_int_for_mode (offset, SImode) != offset)
348 : return false;
349 :
350 4022644 : switch (GET_CODE (op1))
351 : {
352 4022139 : case SYMBOL_REF:
353 : /* TLS symbols are not constant. */
354 4022139 : if (SYMBOL_REF_TLS_MODEL (op1))
355 : return false;
356 :
357 : /* Load the external function address via the GOT slot. */
358 4012817 : if (ix86_force_load_from_GOT_p (op1))
359 : return false;
360 :
361 : /* For small code model we may accept pretty large positive
362 : offsets, since one bit is available for free. Negative
363 : offsets are limited by the size of NULL pointer area
364 : specified by the ABI. */
365 4012811 : if ((ix86_cmodel == CM_SMALL
366 162713 : || (ix86_cmodel == CM_MEDIUM
367 0 : && !SYMBOL_REF_FAR_ADDR_P (op1)))
368 4012811 : && offset > -0x10000)
369 : return true;
370 : /* ??? For the kernel, we may accept adjustment of
371 : -0x10000000, since we know that it will just convert
372 : negative address space to positive, but perhaps this
373 : is not worthwhile. */
374 : break;
375 :
376 0 : case LABEL_REF:
377 : /* These conditions are similar to SYMBOL_REF ones, just the
378 : constraints for code models differ. */
379 0 : if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
380 0 : && offset > -0x10000)
381 : return true;
382 : break;
383 :
384 : default:
385 : return false;
386 : }
387 : }
388 : break;
389 :
390 0 : default:
391 0 : gcc_unreachable ();
392 : }
393 : return false;
394 : })
395 :
396 : ;; Return true if VALUE is a constant integer whose negation satisfies
397 971628315 : ;; x86_64_immediate_operand.
398 : (define_predicate "x86_64_neg_const_int_operand"
399 971628315 : (match_code "const_int")
400 : {
401 724852171 : HOST_WIDE_INT val = -UINTVAL (op);
402 14866 : if (mode == DImode && trunc_int_for_mode (val, SImode) != val)
403 724816361 : return false;
404 35113 : if (flag_cf_protection & CF_BRANCH)
405 724816361 : {
406 16329 : unsigned HOST_WIDE_INT endbr = TARGET_64BIT ? 0xfa1e0ff3 : 0xfb1e0ff3;
407 16329 : if ((val & HOST_WIDE_INT_C (0xffffffff)) == endbr)
408 : return false;
409 724816361 : }
410 724816361 : return true;
411 55630219 : })
412 :
413 : ;; Return true if VALUE is a constant integer whose low and high words satisfy
414 49000 : ;; x86_64_immediate_operand.
415 35810 : (define_predicate "x86_64_hilo_int_operand"
416 84810 : (match_code "const_int,const_wide_int")
417 35810 : {
418 42832536 : switch (GET_CODE (op))
419 : {
420 42783127 : case CONST_INT:
421 42832536 : return x86_64_immediate_operand (op, mode);
422 :
423 49409 : case CONST_WIDE_INT:
424 49409 : gcc_assert (CONST_WIDE_INT_NUNITS (op) == 2);
425 49409 : return (x86_64_immediate_operand (GEN_INT (CONST_WIDE_INT_ELT (op, 0)),
426 : DImode)
427 49409 : && x86_64_immediate_operand (GEN_INT (CONST_WIDE_INT_ELT (op,
428 : 1)),
429 : DImode));
430 :
431 0 : default:
432 0 : gcc_unreachable ();
433 : }
434 : })
435 :
436 : ;; Return true if VALUE is a constant integer whose value is
437 43506463 : ;; x86_64_immediate_operand value zero extended from word mode to mode.
438 : (define_predicate "x86_64_dwzext_immediate_operand"
439 43506463 : (match_code "const_int,const_wide_int")
440 : {
441 3742 : if (ix86_endbr_immediate_operand (op, VOIDmode))
442 42832536 : return false;
443 42832536 :
444 3742 : switch (GET_CODE (op))
445 : {
446 1624 : case CONST_INT:
447 1624 : if (!TARGET_64BIT)
448 42832536 : return UINTVAL (op) <= HOST_WIDE_INT_UC (0xffffffff);
449 1624 : return UINTVAL (op) <= HOST_WIDE_INT_UC (0x7fffffff);
450 :
451 2118 : case CONST_WIDE_INT:
452 5860 : if (!TARGET_64BIT)
453 : return false;
454 2118 : return (CONST_WIDE_INT_NUNITS (op) == 2
455 2118 : && CONST_WIDE_INT_ELT (op, 1) == 0
456 4236 : && (trunc_int_for_mode (CONST_WIDE_INT_ELT (op, 0), SImode)
457 2118 : == (HOST_WIDE_INT) CONST_WIDE_INT_ELT (op, 0)));
458 :
459 0 : default:
460 0 : gcc_unreachable ();
461 : }
462 : })
463 :
464 : ;; Return true if size of VALUE can be stored in a sign
465 3742 : ;; extended immediate field.
466 : (define_predicate "x86_64_immediate_size_operand"
467 3742 : (and (match_code "symbol_ref")
468 0 : (ior (not (match_test "TARGET_64BIT"))
469 0 : (match_test "ix86_cmodel == CM_SMALL")
470 0 : (match_test "ix86_cmodel == CM_KERNEL"))))
471 0 :
472 : ;; Return true if OP is general operand representable on x86_64.
473 : (define_predicate "x86_64_general_operand"
474 147130614 : (if_then_else (match_test "TARGET_64BIT")
475 147134356 : (ior (match_operand 0 "nonimmediate_operand")
476 3742 : (match_operand 0 "x86_64_immediate_operand"))
477 147130614 : (match_operand 0 "general_operand")))
478 60868747 :
479 : ;; Return true if OP's both words are general operands representable
480 60868747 : ;; on x86_64.
481 : (define_predicate "x86_64_hilo_general_operand"
482 60868747 : (if_then_else (match_test "TARGET_64BIT")
483 : (ior (match_operand 0 "nonimmediate_operand")
484 : (match_operand 0 "x86_64_hilo_int_operand"))
485 : (match_operand 0 "general_operand")))
486 291526 :
487 : ;; Return true if OP is non-VOIDmode general operand representable
488 291526 : ;; on x86_64. This predicate is used in sign-extending conversion
489 : ;; operations that require non-VOIDmode immediate operands.
490 : (define_predicate "x86_64_sext_operand"
491 291526 : (and (match_test "GET_MODE (op) != VOIDmode")
492 : (match_operand 0 "x86_64_general_operand")))
493 :
494 : ;; Return true if OP is non-VOIDmode general operand. This predicate
495 11471 : ;; is used in sign-extending conversion operations that require
496 : ;; non-VOIDmode immediate operands.
497 11471 : (define_predicate "sext_operand"
498 11471 : (and (match_test "GET_MODE (op) != VOIDmode")
499 : (match_operand 0 "general_operand")))
500 :
501 : ;; Return true if OP is representable on x86_64 as zero-extended operand.
502 3776857 : ;; This predicate is used in zero-extending conversion operations that
503 : ;; require non-VOIDmode immediate operands.
504 3776857 : (define_predicate "x86_64_zext_operand"
505 3776857 : (if_then_else (match_test "TARGET_64BIT")
506 : (ior (match_operand 0 "nonimmediate_operand")
507 : (and (match_operand 0 "x86_64_zext_immediate_operand")
508 111870 : (match_test "GET_MODE (op) != VOIDmode")))
509 : (match_operand 0 "nonimmediate_operand")))
510 :
511 : ;; Return true if OP is general operand representable on x86_64
512 2461200 : ;; as either sign extended or zero extended constant.
513 : (define_predicate "x86_64_szext_general_operand"
514 2461200 : (if_then_else (match_test "TARGET_64BIT")
515 : (ior (match_operand 0 "nonimmediate_operand")
516 : (match_operand 0 "x86_64_immediate_operand")
517 : (match_operand 0 "x86_64_zext_immediate_operand"))
518 29613732 : (match_operand 0 "general_operand")))
519 :
520 29613732 : ;; Return true if OP is nonmemory operand representable on x86_64.
521 : (define_predicate "x86_64_nonmemory_operand"
522 29613732 : (if_then_else (match_test "TARGET_64BIT")
523 : (ior (match_operand 0 "register_operand")
524 : (match_operand 0 "x86_64_immediate_operand"))
525 : (match_operand 0 "nonmemory_operand")))
526 18604 :
527 : ;; Return true if OP is nonmemory operand representable on x86_64.
528 18604 : (define_predicate "x86_64_szext_nonmemory_operand"
529 18604 : (if_then_else (match_test "TARGET_64BIT")
530 : (ior (match_operand 0 "register_operand")
531 : (match_operand 0 "x86_64_immediate_operand")
532 : (match_operand 0 "x86_64_zext_immediate_operand"))
533 167243390 : (match_operand 0 "nonmemory_operand")))
534 :
535 : ;; Return true when operand is PIC expression that can be computed by lea
536 : ;; operation.
537 : (define_predicate "pic_32bit_operand"
538 : (match_code "const,symbol_ref,label_ref")
539 : {
540 167243390 : if (!flag_pic)
541 : return false;
542 :
543 : /* Rule out relocations that translate into 64bit constants. */
544 8000174 : if (TARGET_64BIT && GET_CODE (op) == CONST)
545 : {
546 146270 : rtx tmp = XEXP (op, 0);
547 146270 : if (GET_CODE (tmp) == PLUS && CONST_INT_P (XEXP (tmp, 1)))
548 145139 : tmp = XEXP (tmp, 0);
549 146270 : if (GET_CODE (tmp) == UNSPEC
550 1131 : && (XINT (tmp, 1) == UNSPEC_GOTOFF
551 1131 : || XINT (tmp, 1) == UNSPEC_GOT))
552 : return false;
553 : }
554 :
555 7999502 : return symbolic_operand (op, mode);
556 : })
557 :
558 : ;; Return true if OP is nonmemory operand acceptable by movabs patterns.
559 1241998020 : (define_predicate "x86_64_movabs_operand"
560 : (and (match_operand 0 "nonmemory_operand")
561 1241998020 : (not (match_operand 0 "pic_32bit_operand"))))
562 :
563 167243390 : ;; Return true if OP is either a symbol reference or a sum of a symbol
564 167243390 : ;; reference and a constant.
565 167243390 : (define_predicate "symbolic_operand"
566 167243390 : (match_code "symbol_ref,label_ref,const")
567 : {
568 8358287 : switch (GET_CODE (op))
569 : {
570 167243390 : case SYMBOL_REF:
571 167243390 : case LABEL_REF:
572 176035 : return true;
573 :
574 178365 : case CONST:
575 178365 : op = XEXP (op, 0);
576 487753616 : if (SYMBOL_REF_P (op)
577 178365 : || LABEL_REF_P (op)
578 487753616 : || (GET_CODE (op) == UNSPEC
579 8403 : && (XINT (op, 1) == UNSPEC_GOT
580 8403 : || XINT (op, 1) == UNSPEC_GOTOFF
581 : || XINT (op, 1) == UNSPEC_SECREL32
582 8358287 : || XINT (op, 1) == UNSPEC_PCREL
583 : || XINT (op, 1) == UNSPEC_GOTPCREL)))
584 : return true;
585 170547 : if (GET_CODE (op) != PLUS
586 169962 : || !CONST_INT_P (XEXP (op, 1)))
587 : return false;
588 :
589 169962 : op = XEXP (op, 0);
590 169962 : if (SYMBOL_REF_P (op)
591 169962 : || LABEL_REF_P (op))
592 : return true;
593 : /* Only @GOTOFF and @SECREL32 get offsets. */
594 2122 : if (GET_CODE (op) != UNSPEC
595 2122 : || (XINT (op, 1) != UNSPEC_GOTOFF
596 0 : && XINT (op, 1) != UNSPEC_SECREL32))
597 : return false;
598 :
599 2122 : op = XVECEXP (op, 0, 0);
600 2122 : if (SYMBOL_REF_P (op)
601 2122 : || LABEL_REF_P (op))
602 2122 : return true;
603 : return false;
604 :
605 0 : default:
606 0 : gcc_unreachable ();
607 : }
608 : })
609 :
610 : ;; Return true if OP is a symbolic operand that resolves locally.
611 15700589 : (define_predicate "local_symbolic_operand"
612 : (match_code "const,label_ref,symbol_ref")
613 15700589 : {
614 2911466 : if (GET_CODE (op) == CONST
615 16139 : && GET_CODE (XEXP (op, 0)) == PLUS
616 8389 : && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
617 8389 : op = XEXP (XEXP (op, 0), 0);
618 8358287 :
619 2911466 : if (LABEL_REF_P (op))
620 : return true;
621 :
622 2871464 : if (!SYMBOL_REF_P (op))
623 8358287 : return false;
624 534694 :
625 2861592 : if (SYMBOL_REF_TLS_MODEL (op))
626 : return false;
627 :
628 2911466 : /* Dll-imported symbols are always external. */
629 2861592 : if (TARGET_DLLIMPORT_DECL_ATTRIBUTES && SYMBOL_REF_DLLIMPORT_P (op))
630 : return false;
631 2861592 : if (SYMBOL_REF_LOCAL_P (op))
632 : return true;
633 :
634 : /* There is, however, a not insubstantial body of code in the rest of
635 : the compiler that assumes it can just stick the results of
636 : ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done. */
637 : /* ??? This is a hack. Should update the body of the compiler to
638 : always create a DECL an invoke targetm.encode_section_info. */
639 93210 : if (strncmp (XSTR (op, 0), internal_label_prefix,
640 : internal_label_prefix_len) == 0)
641 0 : return true;
642 :
643 : return false;
644 : })
645 :
646 : (define_predicate "local_func_symbolic_operand"
647 2919835 : (match_operand 0 "local_symbolic_operand")
648 : {
649 2919835 : if (GET_CODE (op) == CONST
650 0 : && GET_CODE (XEXP (op, 0)) == PLUS
651 0 : && CONST_INT_P (XEXP (XEXP (op, 0), 1)))
652 0 : op = XEXP (XEXP (op, 0), 0);
653 2911466 :
654 2911478 : if (SYMBOL_REF_P (op)
655 12 : && !SYMBOL_REF_FUNCTION_P (op))
656 0 : return false;
657 :
658 2911466 : return true;
659 2911466 : })
660 2808376 :
661 : ;; Test for a legitimate @GOTOFF operand.
662 30 : ;;
663 : ;; VxWorks does not impose a fixed gap between segments; the run-time
664 42 : ;; gap can be different from the object-file gap. We therefore can't
665 12 : ;; use @GOTOFF unless we are absolutely sure that the symbol is in the
666 : ;; same segment as the GOT. Unfortunately, the flexibility of linker
667 : ;; scripts means that we can't be sure of that in general, so assume
668 : ;; @GOTOFF is not valid on VxWorks, except with the large code model.
669 2919772 : ;; The comments above seem to apply only to VxWorks releases before 7.
670 : (define_predicate "gotoff_operand"
671 2919772 : (and (ior (not (match_test "TARGET_VXWORKS_VAROFF"))
672 : (match_test "ix86_cmodel == CM_LARGE")
673 2919772 : (match_test "ix86_cmodel == CM_LARGE_PIC"))
674 : (match_operand 0 "local_symbolic_operand")))
675 :
676 : ;; Test for various thread-local symbols.
677 30009 : (define_special_predicate "tls_symbolic_operand"
678 : (and (match_code "symbol_ref")
679 30009 : (match_test "SYMBOL_REF_TLS_MODEL (op)")))
680 :
681 : (define_special_predicate "tls_modbase_operand"
682 : (and (match_code "symbol_ref")
683 63 : (match_test "op == ix86_tls_module_base ()")))
684 :
685 126 : (define_predicate "tls_address_pattern"
686 : (and (match_code "set,parallel,unspec,unspec_volatile")
687 233034471 : (match_test "ix86_tls_address_pattern_p (op)")))
688 0 :
689 233034471 : ;; Test for a pc-relative call operand
690 : (define_predicate "constant_call_address_operand"
691 233034471 : (match_code "symbol_ref")
692 364270276 : {
693 131235596 : if (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC
694 131235590 : || flag_force_indirect_call
695 262469891 : || (TARGET_INDIRECT_BRANCH_REGISTER
696 1022 : && ix86_nopic_noplt_attribute_p (op)))
697 1743 : return false;
698 : if (TARGET_DLLIMPORT_DECL_ATTRIBUTES && SYMBOL_REF_DLLIMPORT_P (op))
699 233034471 : return false;
700 : return true;
701 : })
702 :
703 : ;; True for any non-virtual and non-eliminable register. Used in places where
704 136954953 : ;; instantiation of such a register may cause the pattern to not be recognized.
705 : (define_predicate "register_no_elim_operand"
706 131235805 : (match_operand 0 "register_operand")
707 268189015 : {
708 94479726 : if (SUBREG_P (op))
709 64289 : op = SUBREG_REG (op);
710 :
711 : /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
712 20414815 : because it is guaranteed to be reloaded into one. */
713 20414815 : if (MEM_P (op))
714 : return true;
715 :
716 20414815 : return !(op == arg_pointer_rtx
717 20387032 : || op == frame_pointer_rtx
718 20386474 : || VIRTUAL_REGISTER_P (op));
719 : })
720 :
721 : ;; Similarly, but include the stack pointer. This is used
722 25057018 : ;; to prevent esp from being used as an index reg.
723 : (define_predicate "register_no_SP_operand"
724 25057018 : (match_operand 0 "register_operand")
725 20414815 : {
726 332334 : if (SUBREG_P (op))
727 7971 : op = SUBREG_REG (op);
728 :
729 332334 : /* Before reload, we can allow (SUBREG (MEM...)) as a register operand
730 : because it is guaranteed to be reloaded into one. */
731 332334 : if (MEM_P (op))
732 : return true;
733 :
734 332334 : return !(op == arg_pointer_rtx
735 332334 : || op == frame_pointer_rtx
736 332334 : || op == stack_pointer_rtx
737 332334 : || VIRTUAL_REGISTER_P (op));
738 : })
739 :
740 : ;; P6 processors will jump to the address after the decrement when %esp
741 368406 : ;; is used as a call operand, so they will execute return address as a code.
742 : ;; See Pentium Pro errata 70, Pentium 2 errata A33 and Pentium 3 errata E17.
743 368406 :
744 332334 : (define_predicate "call_register_operand"
745 1869719 : (if_then_else (match_test "TARGET_64BIT")
746 : (match_operand 0 "register_operand")
747 : (match_operand 0 "register_no_SP_operand")))
748 1869719 :
749 18509356 : ;; Return false if this is any eliminable register. Otherwise general_operand.
750 1869719 : (define_predicate "general_no_elim_operand"
751 18509356 : (if_then_else (match_code "reg,subreg")
752 : (match_operand 0 "register_no_elim_operand")
753 : (match_operand 0 "general_operand")))
754 :
755 12201761 : ;; Return false if this is any eliminable register. Otherwise
756 : ;; register_operand or a constant.
757 12201761 : (define_predicate "nonmemory_no_elim_operand"
758 : (ior (match_operand 0 "register_no_elim_operand")
759 : (match_operand 0 "immediate_operand")))
760 :
761 625430 : ;; Test for a valid operand for indirect branch.
762 : (define_predicate "indirect_branch_operand"
763 625430 : (ior (match_operand 0 "register_operand")
764 565836 : (and (not (match_test "TARGET_INDIRECT_BRANCH_REGISTER"))
765 565809 : (not (match_test "TARGET_X32"))
766 : (match_operand 0 "memory_operand"))))
767 :
768 : ;; Return true if OP is a memory operands that can be used in sibcalls.
769 24329 : ;; Since sibcall never returns, we can only use call-clobbered register
770 : ;; as GOT base. Allow GOT slot here only with pseudo register as GOT
771 : ;; base. Properly handle sibcall over GOT slot with *sibcall_GOT_32
772 : ;; and *sibcall_value_GOT_32 patterns.
773 : (define_predicate "sibcall_memory_operand"
774 : (match_operand 0 "memory_operand")
775 : {
776 24329 : op = XEXP (op, 0);
777 24329 : if (CONSTANT_P (op))
778 : return true;
779 10824 : if (GET_CODE (op) == PLUS && REG_P (XEXP (op, 0)))
780 : {
781 9732 : int regno = REGNO (XEXP (op, 0));
782 9732 : if (!HARD_REGISTER_NUM_P (regno) || call_used_or_fixed_reg_p (regno))
783 : {
784 7886 : op = XEXP (op, 1);
785 7886 : if (GOT32_symbol_operand (op, VOIDmode))
786 : return true;
787 : }
788 : }
789 : return false;
790 : })
791 :
792 : ;; Return true if OP is a GOT memory operand.
793 1367537 : (define_predicate "GOT_memory_operand"
794 : (and (match_operand 0 "memory_operand")
795 1391866 : (match_code "const" "0")
796 24329 : (match_code "unspec" "00")
797 564 : (match_test "XINT (XEXP (XEXP (op, 0), 0), 1) == UNSPEC_GOTPCREL")))
798 :
799 : ;; Test for a valid operand for a call instruction.
800 462 : ;; Allow constant call address operands in Pmode only.
801 46919787 : (define_special_predicate "call_insn_operand"
802 462 : (ior (match_test "constant_call_address_operand
803 53083208 : (op, mode == VOIDmode ? mode : Pmode)")
804 : (match_operand 0 "call_register_operand")
805 862622 : (match_test "satisfies_constraint_Bw (op)")))
806 :
807 : ;; Similarly, but for tail calls, in which we cannot allow memory references.
808 : (define_special_predicate "sibcall_insn_operand"
809 1216515 : (ior (match_test "constant_call_address_operand
810 1384623 : (op, mode == VOIDmode ? mode : Pmode)")
811 1216515 : (match_operand 0 "register_no_elim_operand")
812 131042 : (match_test "satisfies_constraint_Bs (op)")))
813 :
814 : ;; Return true if OP is a 32-bit GOT symbol operand.
815 : (define_predicate "GOT32_symbol_operand"
816 9807 : (and (match_code "const")
817 : (match_code "unspec" "0")
818 9807 : (match_test "XINT (XEXP (op, 0), 1) == UNSPEC_GOT")))
819 0 :
820 : ;; Match exactly zero.
821 : (define_predicate "const0_operand"
822 : (match_code "const_int,const_double,const_vector")
823 131312220 : {
824 131312220 : if (mode == VOIDmode)
825 20716488 : mode = GET_MODE (op);
826 131312220 : return op == CONST0_RTX (mode);
827 : })
828 :
829 : ;; Match one or a vector with all elements equal to one.
830 952408068 : (define_predicate "const1_operand"
831 : (match_code "const_int,const_double,const_vector")
832 952408068 : {
833 12601144 : if (mode == VOIDmode)
834 12598309 : mode = GET_MODE (op);
835 143913364 : return op == CONST1_RTX (mode);
836 131312220 : })
837 131312220 :
838 : ;; Match exactly -1.
839 13549308 : (define_predicate "constm1_operand"
840 : (and (match_code "const_int")
841 144861528 : (match_test "op == constm1_rtx")))
842 131312220 :
843 59838323 : ;; Match 0 or -1.
844 12601144 : (define_predicate "const0_or_m1_operand"
845 12604021 : (ior (match_operand 0 "const0_operand")
846 12601144 : (match_operand 0 "constm1_operand")))
847 2877 :
848 : ;; Match exactly eight.
849 : (define_predicate "const8_operand"
850 12601144 : (and (match_code "const_int")
851 12601144 : (match_test "INTVAL (op) == 8")))
852 2808 :
853 216121 : ;; Match exactly 128.
854 : (define_predicate "const128_operand"
855 26592701 : (and (match_code "const_int")
856 235442496 : (match_test "INTVAL (op) == 128")))
857 26592701 :
858 186446957 : ;; Match exactly 0x0FFFFFFFF in anddi as a zero-extension operation
859 : (define_predicate "const_32bit_mask"
860 2773186 : (and (match_code "const_int")
861 1815359 : (match_test "trunc_int_for_mode (INTVAL (op), DImode)
862 4588545 : == HOST_WIDE_INT_C (0xffffffff)")))
863 :
864 : ;; Match 2, 4, or 8. Used for leal multiplicands.
865 : (define_predicate "const248_operand"
866 293295 : (match_code "const_int")
867 : {
868 293295 : HOST_WIDE_INT i = INTVAL (op);
869 293295 : return i == 2 || i == 4 || i == 8;
870 : })
871 :
872 : ;; Match 1, 2, or 3. Used for lea shift amounts.
873 984343 : (define_predicate "const123_operand"
874 : (match_code "const_int")
875 984343 : {
876 1206218 : HOST_WIDE_INT i = INTVAL (op);
877 221875 : return i == 1 || i == 2 || i == 3;
878 : })
879 :
880 221875 : ;; Match 2, 3, 6, or 7
881 230272 : (define_predicate "const2367_operand"
882 : (match_code "const_int")
883 230272 : {
884 221875 : HOST_WIDE_INT i = INTVAL (op);
885 0 : return i == 2 || i == 3 || i == 6 || i == 7;
886 : })
887 :
888 0 : ;; Match 1, 2, 4, or 8
889 0 : (define_predicate "const1248_operand"
890 : (match_code "const_int")
891 0 : {
892 108159 : HOST_WIDE_INT i = INTVAL (op);
893 108159 : return i == 1 || i == 2 || i == 4 || i == 8;
894 : })
895 :
896 108159 : ;; Match 3, 5, or 9. Used for leal multiplicands.
897 492501 : (define_predicate "const359_operand"
898 : (match_code "const_int")
899 492501 : {
900 539236 : HOST_WIDE_INT i = INTVAL (op);
901 46735 : return i == 3 || i == 5 || i == 9;
902 : })
903 :
904 46735 : ;; Match 4 or 8 to 11. Used for embeded rounding.
905 202163 : (define_predicate "const_4_or_8_to_11_operand"
906 : (match_code "const_int")
907 202163 : {
908 282175 : HOST_WIDE_INT i = INTVAL (op);
909 80012 : return i == 4 || (i >= 8 && i <= 11);
910 : })
911 :
912 80012 : ;; Match 4 or 8. Used for SAE.
913 80014 : (define_predicate "const48_operand"
914 : (match_code "const_int")
915 80014 : {
916 80012 : HOST_WIDE_INT i = INTVAL (op);
917 64572 : return i == 4 || i == 8;
918 : })
919 :
920 64572 : ;; Match 0 or 1.
921 64572 : (define_predicate "const_0_to_1_operand"
922 : (and (match_code "const_int")
923 64572 : (ior (match_test "op == const0_rtx")
924 294699 : (match_test "op == const1_rtx"))))
925 :
926 : ;; Match 0 to 3.
927 : (define_predicate "const_0_to_3_operand"
928 7230763 : (and (match_code "const_int")
929 13669505 : (match_test "IN_RANGE (INTVAL (op), 0, 3)")))
930 7230763 :
931 : ;; Match 0 to 4.
932 : (define_predicate "const_0_to_4_operand"
933 0 : (and (match_code "const_int")
934 0 : (match_test "IN_RANGE (INTVAL (op), 0, 4)")))
935 0 :
936 : ;; Match 0 to 5.
937 : (define_predicate "const_0_to_5_operand"
938 0 : (and (match_code "const_int")
939 0 : (match_test "IN_RANGE (INTVAL (op), 0, 5)")))
940 0 :
941 : ;; Match 0 to 7.
942 : (define_predicate "const_0_to_7_operand"
943 790547 : (and (match_code "const_int")
944 1581080 : (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
945 790547 :
946 : ;; Match 0 to 15.
947 : (define_predicate "const_0_to_15_operand"
948 84681 : (and (match_code "const_int")
949 169346 : (match_test "IN_RANGE (INTVAL (op), 0, 15)")))
950 84681 :
951 : ;; Match 0 to 31.
952 : (define_predicate "const_0_to_31_operand"
953 58322 : (and (match_code "const_int")
954 116076 : (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
955 58322 :
956 : ;; Match 0 to 63.
957 : (define_predicate "const_0_to_63_operand"
958 28502 : (and (match_code "const_int")
959 55231 : (match_test "IN_RANGE (INTVAL (op), 0, 63)")))
960 28502 :
961 : ;; Match 0 to 127.
962 : (define_predicate "const_0_to_127_operand"
963 9863 : (and (match_code "const_int")
964 18750 : (match_test "IN_RANGE (INTVAL (op), 0, 127)")))
965 9863 :
966 : ;; Match 0 to 255.
967 : (define_predicate "const_0_to_255_operand"
968 8693865 : (and (match_code "const_int")
969 17358550 : (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
970 8693865 :
971 : ;; Match (0 to 255) * 8
972 : (define_predicate "const_0_to_255_mul_8_operand"
973 440021 : (match_code "const_int")
974 : {
975 440021 : unsigned HOST_WIDE_INT val = INTVAL (op);
976 440021 : return val <= 255*8 && val % 8 == 0;
977 : })
978 :
979 : ;; Match 1 to 255 except multiples of 8
980 440023 : (define_predicate "const_0_to_255_not_mul_8_operand"
981 : (match_code "const_int")
982 440023 : {
983 1268381 : unsigned HOST_WIDE_INT val = INTVAL (op);
984 828344 : return val <= 255 && val % 8 != 0;
985 : })
986 :
987 828358 : ;; Return true if OP is CONST_INT >= 1 and <= 31 (a valid operand
988 828358 : ;; for shift & compare patterns, as shifting by 0 does not change flags).
989 : (define_predicate "const_1_to_31_operand"
990 828358 : (and (match_code "const_int")
991 874544 : (match_test "IN_RANGE (INTVAL (op), 1, 31)")))
992 :
993 : ;; Return true if OP is CONST_INT >= 1 and <= 63 (a valid operand
994 : ;; for 64bit shift & compare patterns, as shifting by 0 does not change flags).
995 93486 : (define_predicate "const_1_to_63_operand"
996 : (and (match_code "const_int")
997 93486 : (match_test "IN_RANGE (INTVAL (op), 1, 63)")))
998 :
999 : ;; Match 2 or 3.
1000 : (define_predicate "const_2_to_3_operand"
1001 73099 : (and (match_code "const_int")
1002 146198 : (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
1003 73099 :
1004 : ;; Match 4 to 5.
1005 : (define_predicate "const_4_to_5_operand"
1006 6644 : (and (match_code "const_int")
1007 13288 : (match_test "IN_RANGE (INTVAL (op), 4, 5)")))
1008 6644 :
1009 : ;; Match 4 to 7.
1010 : (define_predicate "const_4_to_7_operand"
1011 971414 : (and (match_code "const_int")
1012 1942828 : (match_test "IN_RANGE (INTVAL (op), 4, 7)")))
1013 971414 :
1014 : ;; Match 6 to 7.
1015 : (define_predicate "const_6_to_7_operand"
1016 700 : (and (match_code "const_int")
1017 1400 : (match_test "IN_RANGE (INTVAL (op), 6, 7)")))
1018 700 :
1019 : ;; Match 8 to 9.
1020 : (define_predicate "const_8_to_9_operand"
1021 512 : (and (match_code "const_int")
1022 1024 : (match_test "IN_RANGE (INTVAL (op), 8, 9)")))
1023 512 :
1024 : ;; Match 8 to 11.
1025 : (define_predicate "const_8_to_11_operand"
1026 42891 : (and (match_code "const_int")
1027 85782 : (match_test "IN_RANGE (INTVAL (op), 8, 11)")))
1028 42891 :
1029 : ;; Match 8 to 15.
1030 : (define_predicate "const_8_to_15_operand"
1031 41293 : (and (match_code "const_int")
1032 82586 : (match_test "IN_RANGE (INTVAL (op), 8, 15)")))
1033 41293 :
1034 : ;; Match 10 to 11.
1035 : (define_predicate "const_10_to_11_operand"
1036 267 : (and (match_code "const_int")
1037 534 : (match_test "IN_RANGE (INTVAL (op), 10, 11)")))
1038 267 :
1039 : ;; Match 12 to 13.
1040 : (define_predicate "const_12_to_13_operand"
1041 266 : (and (match_code "const_int")
1042 532 : (match_test "IN_RANGE (INTVAL (op), 12, 13)")))
1043 266 :
1044 : ;; Match 12 to 15.
1045 : (define_predicate "const_12_to_15_operand"
1046 28878 : (and (match_code "const_int")
1047 57756 : (match_test "IN_RANGE (INTVAL (op), 12, 15)")))
1048 28878 :
1049 : ;; Match 14 to 15.
1050 : (define_predicate "const_14_to_15_operand"
1051 266 : (and (match_code "const_int")
1052 532 : (match_test "IN_RANGE (INTVAL (op), 14, 15)")))
1053 266 :
1054 : ;; Match 16 to 19.
1055 : (define_predicate "const_16_to_19_operand"
1056 1552 : (and (match_code "const_int")
1057 3104 : (match_test "IN_RANGE (INTVAL (op), 16, 19)")))
1058 1552 :
1059 : ;; Match 16 to 31.
1060 : (define_predicate "const_16_to_31_operand"
1061 10399 : (and (match_code "const_int")
1062 20798 : (match_test "IN_RANGE (INTVAL (op), 16, 31)")))
1063 10399 :
1064 : ;; Match 20 to 23.
1065 : (define_predicate "const_20_to_23_operand"
1066 1128 : (and (match_code "const_int")
1067 2256 : (match_test "IN_RANGE (INTVAL (op), 20, 23)")))
1068 1128 :
1069 : ;; Match 24 to 27.
1070 : (define_predicate "const_24_to_27_operand"
1071 1128 : (and (match_code "const_int")
1072 2256 : (match_test "IN_RANGE (INTVAL (op), 24, 27)")))
1073 1128 :
1074 : ;; Match 28 to 31.
1075 : (define_predicate "const_28_to_31_operand"
1076 1128 : (and (match_code "const_int")
1077 2256 : (match_test "IN_RANGE (INTVAL (op), 28, 31)")))
1078 1128 :
1079 : (define_predicate "cmpps_imm_operand"
1080 : (ior (match_operand 0 "const_0_to_7_operand")
1081 4084 : (and (match_test "TARGET_AVX")
1082 : (match_operand 0 "const_0_to_31_operand"))))
1083 58543 :
1084 : ;; True if this is a constant appropriate for an increment or decrement.
1085 99312585 : (define_predicate "incdec_operand"
1086 : (match_code "const_int")
1087 : {
1088 : /* On Pentium4, the inc and dec operations causes extra dependency on flag
1089 : registers, since carry flag is not set. */
1090 99312585 : if (!TARGET_USE_INCDEC && !optimize_insn_for_size_p ())
1091 : return false;
1092 2545185 : return op == const1_rtx || op == constm1_rtx;
1093 : })
1094 :
1095 : ;; True for registers, or const_int_operand, used to vec_setm expander.
1096 122444456 : (define_predicate "vec_setm_sse41_operand"
1097 : (ior (and (match_operand 0 "register_operand")
1098 221757777 : (match_test "TARGET_SSE4_1"))
1099 99312585 : (match_code "const_int")))
1100 :
1101 : (define_predicate "vec_setm_avx2_operand"
1102 : (ior (and (match_operand 0 "register_operand")
1103 971 : (match_test "TARGET_AVX2"))
1104 0 : (match_code "const_int")))
1105 1209 :
1106 : (define_predicate "vec_setm_mmx_operand"
1107 : (ior (and (match_operand 0 "register_operand")
1108 22 : (match_test "TARGET_SSE4_1")
1109 252 : (match_test "TARGET_MMX_WITH_SSE"))
1110 252 : (match_code "const_int")))
1111 :
1112 : ;; True for registers, or 1 or -1. Used to optimize double-word shifts.
1113 : (define_predicate "reg_or_pm1_operand"
1114 4336717 : (ior (match_operand 0 "register_operand")
1115 : (and (match_code "const_int")
1116 4336717 : (ior (match_test "op == const1_rtx")
1117 257597 : (match_test "op == constm1_rtx")))))
1118 241635 :
1119 : ;; True for registers, or (not: registers). Used to optimize 3-operand
1120 : ;; bitwise operation.
1121 : (define_predicate "regmem_or_bitnot_regmem_operand"
1122 666883 : (ior (match_operand 0 "nonimmediate_operand")
1123 : (and (match_code "not")
1124 666883 : (match_test "nonimmediate_operand (XEXP (op, 0), mode)"))))
1125 26604 :
1126 : ;; True for expressions valid for 3-operand ternlog instructions.
1127 : (define_predicate "ternlog_operand"
1128 : (and (match_code "not,and,ior,xor")
1129 2196426 : (match_test "ix86_ternlog_operand_p (op)")))
1130 233812 :
1131 64334615 : ;; True if OP is acceptable as operand of DImode shift expander.
1132 : (define_predicate "shiftdi_operand"
1133 1291323 : (if_then_else (match_test "TARGET_64BIT")
1134 3487749 : (match_operand 0 "nonimmediate_operand")
1135 2196426 : (match_operand 0 "register_operand")))
1136 1291323 :
1137 2812405 : (define_predicate "ashldi_input_operand"
1138 615979 : (if_then_else (match_test "TARGET_64BIT")
1139 615979 : (match_operand 0 "nonimmediate_operand")
1140 : (match_operand 0 "reg_or_pm1_operand")))
1141 2196426 :
1142 556535 : ;; Return true if OP is a vector load from the constant pool with just
1143 : ;; the first element nonzero.
1144 : (define_predicate "zero_extended_scalar_load_operand"
1145 : (match_code "mem")
1146 : {
1147 556535 : unsigned n_elts;
1148 556535 : op = avoid_constant_pool_reference (op);
1149 :
1150 556535 : if (!CONST_VECTOR_P (op))
1151 : return false;
1152 :
1153 76756 : n_elts = CONST_VECTOR_NUNITS (op);
1154 :
1155 161432 : for (n_elts--; n_elts > 0; n_elts--)
1156 : {
1157 116144 : rtx elt = CONST_VECTOR_ELT (op, n_elts);
1158 232288 : if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op))))
1159 : return false;
1160 : }
1161 : return true;
1162 : })
1163 :
1164 : /* Return true if operand is a float vector constant that is all ones. */
1165 1869896 : (define_predicate "float_vector_all_ones_operand"
1166 : (match_code "const_vector,mem")
1167 556535 : {
1168 1915184 : mode = GET_MODE (op);
1169 45288 : if (!FLOAT_MODE_P (mode)
1170 13390326 : || (MEM_P (op)
1171 11629525 : && (!SYMBOL_REF_P (XEXP (op, 0))
1172 1324609 : || !CONSTANT_POOL_ADDRESS_P (XEXP (op, 0)))))
1173 16398540 : return false;
1174 :
1175 2846032 : if (MEM_P (op))
1176 : {
1177 1085231 : op = get_pool_constant (XEXP (op, 0));
1178 1085231 : if (!CONST_VECTOR_P (op))
1179 : return false;
1180 :
1181 1085227 : if (GET_MODE (op) != mode
1182 5663 : && INTEGRAL_MODE_P (GET_MODE (op))
1183 5663 : && op == CONSTM1_RTX (GET_MODE (op)))
1184 : return true;
1185 : }
1186 :
1187 2846028 : rtx first = XVECEXP (op, 0, 0);
1188 8304010 : for (int i = 1; i != GET_MODE_NUNITS (GET_MODE (op)); i++)
1189 : {
1190 3651421 : rtx tmp = XVECEXP (op, 0, i);
1191 3651421 : if (!rtx_equal_p (tmp, first))
1192 : return false;
1193 : }
1194 500584 : if (GET_MODE (first) == E_SFmode)
1195 : {
1196 231145 : long l;
1197 231145 : REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (first), l);
1198 231145 : return (l & 0xffffffff) == 0xffffffff;
1199 : }
1200 269439 : else if (GET_MODE (first) == E_DFmode)
1201 : {
1202 262742 : long l[2];
1203 262742 : REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (first), l);
1204 262742 : return ((l[0] & 0xffffffff) == 0xffffffff
1205 262742 : && (l[1] & 0xffffffff) == 0xffffffff);
1206 : }
1207 : else
1208 : return false;
1209 : })
1210 :
1211 : /* Return true if operand is an integral vector constant that is all ones. */
1212 54368908 : (define_predicate "vector_all_ones_operand"
1213 : (and (match_code "const_vector")
1214 67173862 : (match_test "INTEGRAL_MODE_P (GET_MODE (op))")
1215 11108510 : (match_test "op == CONSTM1_RTX (GET_MODE (op))")))
1216 826992 :
1217 16398540 : /* Return true if operand is a vector constant that is all ones. */
1218 16398540 : (define_predicate "int_float_vector_all_ones_operand"
1219 : (ior (match_operand 0 "vector_all_ones_operand")
1220 8981395 : (match_operand 0 "float_vector_all_ones_operand")
1221 0 : (match_test "op == constm1_rtx")))
1222 8981395 :
1223 16398540 : /* Return true if operand is an 128/256bit all ones vector
1224 3189 : that zero-extends to 256/512bit. */
1225 : (define_predicate "vector_all_ones_zero_extend_half_operand"
1226 11541941 : (match_code "const_vector")
1227 : {
1228 161259078 : mode = GET_MODE (op);
1229 11541941 : if (GET_MODE_CLASS (mode) != MODE_VECTOR_INT
1230 171301120 : || (GET_MODE_SIZE (mode) != 32
1231 9736460 : && GET_MODE_SIZE (mode) != 64))
1232 : return false;
1233 :
1234 475973 : int nelts = CONST_VECTOR_NUNITS (op);
1235 548449 : for (int i = 0; i != nelts; i++)
1236 : {
1237 547499 : rtx elt = CONST_VECTOR_ELT (op, i);
1238 547499 : if (i < nelts / 2
1239 1076378 : && elt != CONSTM1_RTX (GET_MODE_INNER (mode)))
1240 : return false;
1241 83493 : if (i >= nelts / 2
1242 102113 : && elt != CONST0_RTX (GET_MODE_INNER (mode)))
1243 : return false;
1244 : }
1245 : return true;
1246 : })
1247 :
1248 : /* Return true if operand is an 128bit all ones vector
1249 162860360 : that zero extends to 512bit. */
1250 : (define_predicate "vector_all_ones_zero_extend_quarter_operand"
1251 11541941 : (match_code "const_vector")
1252 162861310 : {
1253 950 : mode = GET_MODE (op);
1254 11540991 : if (GET_MODE_CLASS (mode) != MODE_VECTOR_INT
1255 10041092 : || GET_MODE_SIZE (mode) != 64)
1256 : return false;
1257 11540991 :
1258 170182 : int nelts = CONST_VECTOR_NUNITS (op);
1259 183970 : for (int i = 0; i != nelts; i++)
1260 : {
1261 183882 : rtx elt = CONST_VECTOR_ELT (op, i);
1262 183882 : if (i < nelts / 4
1263 364289 : && elt != CONSTM1_RTX (GET_MODE_INNER (mode)))
1264 : return false;
1265 16429 : if (i >= nelts / 4
1266 19904 : && elt != CONST0_RTX (GET_MODE_INNER (mode)))
1267 : return false;
1268 : }
1269 : return true;
1270 : })
1271 :
1272 : ; Return true when OP is operand acceptable for vector memory operand.
1273 162859410 : ; Only AVX can have misaligned memory operand.
1274 : (define_predicate "vector_memory_operand"
1275 11540991 : (and (match_operand 0 "memory_operand")
1276 164078259 : (ior (match_test "TARGET_AVX")
1277 1218849 : (match_test "MEM_ALIGN (op) >= GET_MODE_ALIGNMENT (mode)"))))
1278 :
1279 : ; Return true when OP is register_operand or vector_memory_operand.
1280 : (define_predicate "vector_operand"
1281 18901055 : (ior (match_operand 0 "register_operand")
1282 : (match_operand 0 "vector_memory_operand")))
1283 18901055 :
1284 : ; Return true when OP is register_operand, vector_memory_operand
1285 : ; or const_vector.
1286 : (define_predicate "vector_or_const_vector_operand"
1287 14202 : (ior (match_operand 0 "register_operand")
1288 : (match_operand 0 "vector_memory_operand")
1289 14202 : (match_code "const_vector")))
1290 8214 :
1291 : ; Return true when OP is register_operand, vector_memory_operand,
1292 : ; const_vector zero or const_vector all ones.
1293 : (define_predicate "vector_or_0_or_1s_operand"
1294 4548 : (ior (match_operand 0 "register_operand")
1295 : (match_operand 0 "vector_memory_operand")
1296 4548 : (match_operand 0 "const0_operand")
1297 : (match_operand 0 "int_float_vector_all_ones_operand")))
1298 :
1299 : (define_predicate "bcst_mem_operand"
1300 162716323 : (and (match_code "vec_duplicate")
1301 14357 : (and (match_test "TARGET_AVX512F")
1302 96064 : (ior (match_test "TARGET_AVX512VL")
1303 9102 : (match_test "GET_MODE_SIZE (GET_MODE (op)) == 64")))
1304 53744 : (match_test "VALID_BCST_MODE_P (GET_MODE_INNER (GET_MODE (op)))")
1305 13397 : (match_test "GET_MODE (XEXP (op, 0))
1306 40175 : == GET_MODE_INNER (GET_MODE (op))")
1307 162735019 : (match_test "memory_operand (XEXP (op, 0), GET_MODE (XEXP (op, 0)))")))
1308 5315 :
1309 : ; Return true when OP is bcst_mem_operand or vector_memory_operand.
1310 : (define_predicate "bcst_vector_operand"
1311 : (ior (match_operand 0 "vector_operand")
1312 5143785 : (match_operand 0 "bcst_mem_operand")))
1313 :
1314 5143785 : ;; Return true when OP is either nonimmediate operand, or any
1315 : ;; CONST_VECTOR.
1316 : (define_predicate "nonimmediate_or_const_vector_operand"
1317 : (ior (match_operand 0 "nonimmediate_operand")
1318 84014 : (match_code "const_vector")))
1319 :
1320 84014 : (define_predicate "nonimmediate_or_const_vec_dup_operand"
1321 12499 : (ior (match_operand 0 "nonimmediate_operand")
1322 58 : (match_test "const_vec_duplicate_p (op)")))
1323 58 :
1324 : ;; Return true when OP is either register operand, or any
1325 106 : ;; CONST_VECTOR.
1326 : (define_predicate "reg_or_const_vector_operand"
1327 106 : (ior (match_operand 0 "register_operand")
1328 : (match_code "const_vector")))
1329 244 :
1330 153 : ;; Return true when OP is CONST_VECTOR which can be converted to a
1331 : ;; sign extended 32-bit integer.
1332 : (define_predicate "x86_64_const_vector_operand"
1333 : (match_code "const_vector")
1334 148768 : {
1335 148768 : if (mode == VOIDmode)
1336 0 : mode = GET_MODE (op);
1337 148768 : else if (GET_MODE (op) != mode)
1338 : return false;
1339 354058 : if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
1340 : return false;
1341 105750 : HOST_WIDE_INT val = ix86_convert_const_vector_to_integer (op, mode);
1342 105750 : return trunc_int_for_mode (val, SImode) == val;
1343 : })
1344 :
1345 : (define_predicate "nonimmediate_or_x86_64_const_vector_operand"
1346 996491 : (ior (match_operand 0 "nonimmediate_operand")
1347 : (match_operand 0 "x86_64_const_vector_operand")))
1348 148768 :
1349 1087778 : ;; Return true when OP is nonimmediate or standard SSE constant.
1350 91287 : (define_predicate "nonimmediate_or_sse_const_operand"
1351 : (ior (match_operand 0 "nonimmediate_operand")
1352 23684171 : (match_test "standard_sse_constant_p (op, mode)")))
1353 2594515 :
1354 5094 : ;; Return true if OP is a register or a zero.
1355 : (define_predicate "reg_or_0_operand"
1356 5094 : (ior (match_operand 0 "register_operand")
1357 574922 : (match_operand 0 "const0_operand")))
1358 :
1359 574922 : ; Return true when OP is a nonimmediate or zero.
1360 97285011 : (define_predicate "nonimm_or_0_operand"
1361 : (ior (match_operand 0 "nonimmediate_operand")
1362 118374667 : (match_operand 0 "const0_operand")))
1363 123110705 :
1364 : ; Return true when OP is a nonimmediate or zero or all ones.
1365 123110705 : (define_predicate "nonimm_or_0_or_1s_operand"
1366 : (ior (match_operand 0 "nonimmediate_operand")
1367 : (match_operand 0 "const0_operand")
1368 : (match_operand 0 "int_float_vector_all_ones_operand")))
1369 97466 :
1370 : ;; Return true for RTX codes that force SImode address.
1371 97466 : (define_predicate "SImode_address_operand"
1372 : (match_code "subreg,zero_extend,and"))
1373 :
1374 : ;; Return true if op is a valid address for LEA, and does not contain
1375 265028886 : ;; a segment override. Defined as a special predicate to allow
1376 : ;; mode-less const_int operands pass to address_operand.
1377 265028886 : (define_special_predicate "address_no_seg_operand"
1378 175332641 : (match_test "address_operand (op, VOIDmode)")
1379 63743192 : {
1380 64191233 : struct ix86_address parts;
1381 64191233 : int ok;
1382 448041 :
1383 63782602 : if (!CONST_INT_P (op)
1384 60899698 : && mode != VOIDmode
1385 60899698 : && GET_MODE (op) != mode)
1386 448041 : return false;
1387 448041 :
1388 63743128 : ok = ix86_decompose_address (op, &parts);
1389 63743128 : gcc_assert (ok);
1390 63743128 : return parts.seg == ADDR_SPACE_GENERIC;
1391 63743192 : })
1392 :
1393 : ;; Return true if op if a valid base register, displacement or
1394 111589449 : ;; sum of base register and displacement for VSIB addressing.
1395 : (define_predicate "vsib_address_operand"
1396 111628859 : (match_test "address_operand (op, VOIDmode)")
1397 79581 : {
1398 38232 : struct ix86_address parts;
1399 39410 : int ok;
1400 39410 : rtx disp;
1401 :
1402 39410 : ok = ix86_decompose_address (op, &parts);
1403 39410 : gcc_assert (ok);
1404 66028 : if (parts.index || parts.seg != ADDR_SPACE_GENERIC)
1405 26618 : return false;
1406 :
1407 : /* VSIB addressing doesn't support (%rip). */
1408 39390 : if (parts.disp)
1409 27053016 : {
1410 7342 : disp = parts.disp;
1411 7342 : if (GET_CODE (disp) == CONST)
1412 : {
1413 148 : disp = XEXP (disp, 0);
1414 148 : if (GET_CODE (disp) == PLUS)
1415 148 : disp = XEXP (disp, 0);
1416 148 : if (GET_CODE (disp) == UNSPEC)
1417 0 : switch (XINT (disp, 1))
1418 : {
1419 : case UNSPEC_GOTPCREL:
1420 : case UNSPEC_PCREL:
1421 : case UNSPEC_GOTNTPOFF:
1422 : return false;
1423 : }
1424 : }
1425 7342 : if (TARGET_64BIT
1426 7342 : && flag_pic
1427 0 : && (SYMBOL_REF_P (disp)
1428 0 : || LABEL_REF_P (disp)))
1429 0 : return false;
1430 : }
1431 :
1432 : return true;
1433 : })
1434 :
1435 : (define_predicate "vsib_mem_operator"
1436 40191 : (match_code "mem"))
1437 :
1438 40191 : ;; Return true if the rtx is known to be at least 32 bits aligned.
1439 : (define_predicate "aligned_operand"
1440 : (match_operand 0 "general_operand")
1441 : {
1442 27053016 : struct ix86_address parts;
1443 27053016 : int ok;
1444 :
1445 : /* Registers and immediate operands are always "aligned". */
1446 27053016 : if (!MEM_P (op))
1447 : return true;
1448 :
1449 : /* All patterns using aligned_operand on memory operands ends up
1450 : in promoting memory operand to 64bit and thus causing memory mismatch. */
1451 7292332 : if (TARGET_MEMORY_MISMATCH_STALL && !optimize_insn_for_size_p ())
1452 : return false;
1453 :
1454 : /* Don't even try to do any aligned optimizations with volatiles. */
1455 132105 : if (MEM_VOLATILE_P (op))
1456 : return false;
1457 :
1458 133847 : if (MEM_ALIGN (op) >= 32)
1459 : return true;
1460 :
1461 53569 : op = XEXP (op, 0);
1462 :
1463 : /* Pushes and pops are only valid on the stack pointer. */
1464 53569 : if (GET_CODE (op) == PRE_DEC
1465 53569 : || GET_CODE (op) == POST_INC)
1466 : return true;
1467 :
1468 : /* Decode the address. */
1469 53569 : ok = ix86_decompose_address (op, &parts);
1470 53569 : gcc_assert (ok);
1471 :
1472 53569 : if (parts.base && SUBREG_P (parts.base))
1473 0 : parts.base = SUBREG_REG (parts.base);
1474 53569 : if (parts.index && SUBREG_P (parts.index))
1475 0 : parts.index = SUBREG_REG (parts.index);
1476 :
1477 : /* Look for some component that isn't known to be aligned. */
1478 53569 : if (parts.index)
1479 : {
1480 7324 : if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
1481 : return false;
1482 : }
1483 46245 : if (parts.base)
1484 : {
1485 38690 : if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
1486 : return false;
1487 : }
1488 13878 : if (parts.disp)
1489 : {
1490 13878 : if (!CONST_INT_P (parts.disp)
1491 6434 : || (INTVAL (parts.disp) & 3))
1492 : return false;
1493 : }
1494 :
1495 : /* Didn't find one -- this must be an aligned address. */
1496 : return true;
1497 : })
1498 :
1499 : ;; Return true if OP is memory operand with a displacement.
1500 27610168 : (define_predicate "memory_displacement_operand"
1501 : (match_operand 0 "memory_operand")
1502 54663184 : {
1503 27053016 : struct ix86_address parts;
1504 0 : int ok;
1505 :
1506 0 : ok = ix86_decompose_address (XEXP (op, 0), &parts);
1507 0 : gcc_assert (ok);
1508 0 : return parts.disp != NULL_RTX;
1509 : })
1510 :
1511 : ;; Return true if OP is memory operand with a displacement only.
1512 0 : (define_predicate "memory_displacement_only_operand"
1513 : (match_operand 0 "memory_operand")
1514 0 : {
1515 0 : struct ix86_address parts;
1516 38621826 : int ok;
1517 :
1518 38621826 : if (TARGET_64BIT)
1519 38621826 : return false;
1520 :
1521 18868500 : ok = ix86_decompose_address (XEXP (op, 0), &parts);
1522 18868500 : gcc_assert (ok);
1523 :
1524 18868500 : if (parts.base || parts.index)
1525 : return false;
1526 :
1527 235225 : return parts.disp != NULL_RTX;
1528 : })
1529 :
1530 : ;; Return true if OP is memory operand that cannot be represented
1531 59699163 : ;; by the modRM array.
1532 : (define_predicate "long_memory_operand"
1533 98320989 : (and (match_operand 0 "memory_operand")
1534 38621826 : (match_test "memory_address_length (op, false)")))
1535 :
1536 : ;; Return true if OP is a comparison operator that can be issued by fcmov.
1537 : (define_predicate "fcmov_comparison_operator"
1538 84098 : (match_operand 0 "comparison_operator")
1539 : {
1540 0 : machine_mode inmode = GET_MODE (XEXP (op, 0));
1541 84098 : enum rtx_code code = GET_CODE (op);
1542 :
1543 84098 : if (inmode == CCFPmode)
1544 8554 : code = ix86_fp_compare_code_to_integer (code);
1545 :
1546 : /* i387 supports just limited amount of conditional codes. */
1547 84098 : switch (code)
1548 : {
1549 1943 : case GEU: case LTU:
1550 1943 : if (inmode == CCCmode || inmode == CCGZmode)
1551 : return true;
1552 : /* FALLTHRU */
1553 6553 : case GTU: case LEU:
1554 6553 : if (inmode == CCmode || inmode == CCFPmode)
1555 : return true;
1556 : return false;
1557 : case ORDERED: case UNORDERED:
1558 : case EQ: case NE:
1559 : return true;
1560 : default:
1561 : return false;
1562 : }
1563 : })
1564 :
1565 : ;; Return true if OP is a comparison that can be used in the CMPSS/CMPPS insns.
1566 84098 : ;; The first set are supported directly; the second set can't be done with
1567 : ;; full IEEE support, i.e. NaNs.
1568 168196 :
1569 84098 : (define_predicate "sse_comparison_operator"
1570 : (ior (match_code "eq,ne,lt,le,unordered,unge,ungt,ordered")
1571 126091 : (and (match_test "TARGET_AVX")
1572 126091 : (match_code "ge,gt,uneq,unle,unlt,ltgt"))))
1573 127763 :
1574 : (define_predicate "ix86_comparison_int_operator"
1575 127763 : (match_code "ne,eq,ge,gt,le,lt"))
1576 214020 :
1577 : (define_predicate "ix86_comparison_uns_operator"
1578 214020 : (match_code "ne,eq,geu,gtu,leu,ltu"))
1579 :
1580 214020 : (define_predicate "bt_comparison_operator"
1581 214020 : (match_code "ne,eq"))
1582 214020 :
1583 214020 : (define_predicate "shr_comparison_operator"
1584 214020 : (match_code "gtu,leu"))
1585 214020 :
1586 214020 : (define_predicate "add_comparison_operator"
1587 : (match_code "geu,ltu"))
1588 :
1589 : (define_predicate "ieee_maxmin_comparison_operator"
1590 214020 : (match_code "lt,gt"))
1591 214020 :
1592 : ;; Return true if OP is a valid comparison operator in valid mode.
1593 : (define_predicate "ix86_comparison_operator"
1594 : (match_operand 0 "comparison_operator")
1595 121940 : {
1596 99923202 : machine_mode inmode = GET_MODE (XEXP (op, 0));
1597 121940 : enum rtx_code code = GET_CODE (op);
1598 :
1599 100045142 : if (inmode == CCFPmode)
1600 6817359 : return ix86_trivial_fp_comparison_operator (op, mode);
1601 121940 :
1602 93105843 : switch (code)
1603 121940 : {
1604 71699063 : case EQ: case NE:
1605 71577123 : if (inmode == CCGZmode)
1606 0 : return false;
1607 : return true;
1608 4418804 : case GE: case LT:
1609 4418804 : if (inmode == CCmode || inmode == CCGCmode
1610 2363524 : || inmode == CCGOCmode || inmode == CCNOmode || inmode == CCGZmode)
1611 3900041 : return true;
1612 : return false;
1613 7758594 : case GEU: case LTU:
1614 7758594 : if (inmode == CCCmode || inmode == CCGZmode)
1615 : return true;
1616 62020792 : /* FALLTHRU */
1617 10748119 : case GTU: case LEU:
1618 10748119 : if (inmode == CCmode)
1619 9514648 : return true;
1620 51252442 : return false;
1621 3456 : case ORDERED: case UNORDERED:
1622 3456 : if (inmode == CCmode)
1623 3203 : return true;
1624 51252442 : return false;
1625 51252442 : case GT: case LE:
1626 5866969 : if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
1627 5139733 : return true;
1628 : return false;
1629 772751 : default:
1630 : return false;
1631 772751 : }
1632 : })
1633 772751 :
1634 772751 : ;; Return true if OP is a valid comparison operator
1635 115198677 : ;; testing carry flag to be set.
1636 : (define_predicate "ix86_carry_flag_operator"
1637 214349128 : (match_code "ltu,unlt")
1638 99923202 : {
1639 1608855 : machine_mode inmode = GET_MODE (XEXP (op, 0));
1640 772751 : enum rtx_code code = GET_CODE (op);
1641 :
1642 836104 : if (inmode == CCFPmode)
1643 10234 : code = ix86_fp_compare_code_to_integer (code);
1644 825870 : else if (inmode != CCmode && inmode != CCCmode && inmode != CCGZmode)
1645 : return false;
1646 1365086 :
1647 613332 : return code == LTU;
1648 1365086 : })
1649 1365086 :
1650 1365086 : ;; Return true if OP is a valid comparison operator
1651 4107245 : ;; testing carry flag to be unset.
1652 : (define_predicate "ix86_carry_flag_unset_operator"
1653 4107245 : (match_code "geu,ge")
1654 1365086 : {
1655 1365086 : machine_mode inmode = GET_MODE (XEXP (op, 0));
1656 837660 : enum rtx_code code = GET_CODE (op);
1657 836104 :
1658 1556 : if (inmode == CCFPmode)
1659 66 : code = ix86_fp_compare_code_to_integer (code);
1660 1490 : else if (inmode != CCmode && inmode != CCCmode && inmode != CCGZmode)
1661 726 : return false;
1662 836104 :
1663 414287 : return code == GEU;
1664 726 : })
1665 726 :
1666 : ;; Return true if this comparison only requires testing one flag bit.
1667 3021859 : ;; VCOMX/VUCOMX set ZF, SF, OF, differently from COMI/UCOMI.
1668 : (define_predicate "ix86_trivial_fp_comparison_operator"
1669 12290913 : (if_then_else (match_test "TARGET_AVX10_2")
1670 657702 : (match_code "gt,ge,unlt,unle,eq,uneq,ne,ltgt,ordered,unordered")
1671 1556 : (match_code "gt,ge,unlt,unle,uneq,ltgt,ordered,unordered")))
1672 1556 :
1673 1556 : (define_predicate "ix86_trivial_fp_comparison_operator_xf"
1674 101283226 : (match_code "gt,ge,unlt,unle,uneq,ltgt,ordered,unordered"))
1675 :
1676 1360024 : ;; Return true if we know how to do this comparison. Others require
1677 1556 : ;; testing more than one flag bit, and we let the generic middle-end
1678 411357 : ;; code do that.
1679 410922 : (define_predicate "ix86_fp_comparison_operator"
1680 2863052 : (if_then_else (match_test "ix86_fp_comparison_strategy (GET_CODE (op))
1681 2863052 : == IX86_FPCMP_ARITH")
1682 409801 : (match_operand 0 "comparison_operator")
1683 9680411 : (match_operand 0 "ix86_trivial_fp_comparison_operator")))
1684 409801 :
1685 9680411 : (define_predicate "ix86_fp_comparison_operator_xf"
1686 1769825 : (if_then_else (match_test "ix86_fp_comparison_strategy (GET_CODE (op))
1687 1360024 : == IX86_FPCMP_ARITH")
1688 : (match_operand 0 "comparison_operator")
1689 : (match_operand 0 "ix86_trivial_fp_comparison_operator_xf")))
1690 409801 :
1691 845304 : ;; Return true if we can perform this comparison on TImode operands.
1692 : (define_predicate "ix86_timode_comparison_operator"
1693 435503 : (if_then_else (match_test "TARGET_64BIT")
1694 : (match_operand 0 "ordered_comparison_operator")
1695 2453251 : (match_operand 0 "bt_comparison_operator")))
1696 :
1697 2453251 : ;; Return true if this is a valid second operand for a TImode comparison.
1698 : (define_predicate "ix86_timode_comparison_operand"
1699 156590 : (if_then_else (match_test "TARGET_64BIT")
1700 : (match_operand 0 "x86_64_general_operand")
1701 : (match_operand 0 "nonimmediate_operand")))
1702 :
1703 1978060 : ;; Nearly general operand, but accept any const_double, since we wish
1704 : ;; to be able to drop them into memory rather than have them get pulled
1705 511269 : ;; into registers.
1706 2489329 : (define_predicate "cmp_fp_expander_operand"
1707 : (ior (match_code "const_double")
1708 : (match_operand 0 "general_operand")))
1709 :
1710 4908649 : ;; Return true if this is a valid binary floating-point operation.
1711 : (define_predicate "binary_fp_operator"
1712 4908649 : (match_code "plus,minus,mult,div"))
1713 :
1714 4901147 : ;; Return true if this is a multiply operation.
1715 4901147 : (define_predicate "mult_operator"
1716 4901147 : (match_code "mult"))
1717 4901147 :
1718 4901147 : ;; Return true if this is a division operation.
1719 : (define_predicate "div_operator"
1720 : (match_code "div"))
1721 :
1722 4901147 : ;; Return true if this is an and, ior or xor operation.
1723 4901147 : (define_predicate "logic_operator"
1724 : (match_code "and,ior,xor"))
1725 :
1726 : ;; Return true if this is an and operation.
1727 17070641 : (define_predicate "and_operator"
1728 : (match_code "and"))
1729 17070641 :
1730 3491875 : ;; Return true if this is a plus, minus, and, ior or xor operation.
1731 : (define_predicate "plusminuslogic_operator"
1732 : (match_code "plus,minus,and,ior,xor"))
1733 :
1734 2628638 : ;; Return true for ARITHMETIC_P.
1735 : (define_predicate "arith_or_logical_operator"
1736 2628638 : (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax,compare,minus,div,
1737 919547 : mod,udiv,umod,ashift,rotate,ashiftrt,lshiftrt,rotatert"))
1738 :
1739 : ;; Return true for COMMUTATIVE_P.
1740 : (define_predicate "commutative_operator"
1741 0 : (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax"))
1742 :
1743 0 : ;; Return true if OP is a binary operator that can be promoted to wider mode.
1744 : (define_predicate "promotable_binary_operator"
1745 0 : (ior (match_code "plus,minus,and,ior,xor,ashift")
1746 0 : (and (match_code "mult")
1747 25137956 : (match_test "TARGET_TUNE_PROMOTE_HIMODE_IMUL"))))
1748 0 :
1749 : (define_predicate "compare_operator"
1750 : (match_code "compare"))
1751 :
1752 7722296 : (define_predicate "extract_high_operator"
1753 0 : (match_code "zero_extract,sign_extract,ashiftrt,lshiftrt")
1754 7722296 : {
1755 0 : return (const8_operand (XEXP (op, 1), VOIDmode)
1756 152535 : && (BINARY_P (op) || const8_operand (XEXP (op, 2), VOIDmode)));
1757 100 : })
1758 :
1759 152635 : ;; Return true if OP is a memory operand, aligned to
1760 0 : ;; less than its natural alignment.
1761 : (define_predicate "misaligned_operand"
1762 152535 : (and (match_code "mem")
1763 6501525 : (match_test "MEM_ALIGN (op) < GET_MODE_BITSIZE (mode)")))
1764 1720149 :
1765 152535 : ;; Return true if OP is a parallel for an mov{d,q,dqa,ps,pd} vec_select,
1766 509419 : ;; where one of the two operands of the vec_concat is const0_operand.
1767 152535 : (define_predicate "movq_parallel"
1768 1914260 : (match_code "parallel")
1769 505474 : {
1770 1761725 : unsigned nelt = XVECLEN (op, 0);
1771 1761725 : unsigned nelt2 = nelt >> 1;
1772 1914260 : unsigned i;
1773 152535 :
1774 1314755 : if (nelt < 2)
1775 : return false;
1776 :
1777 505474 : /* Validate that all of the elements are constants,
1778 505474 : lower halves of permute are lower halves of the first operand,
1779 : upper halves of permute come from any of the second operand. */
1780 15458598 : for (i = 0; i < nelt; ++i)
1781 : {
1782 6277502 : rtx er = XVECEXP (op, 0, i);
1783 2032615 : unsigned HOST_WIDE_INT ei;
1784 4244887 :
1785 2032615 : if (!CONST_INT_P (er))
1786 4244887 : return false;
1787 6277502 : ei = INTVAL (er);
1788 2032615 : if (i < nelt2 && ei != i)
1789 4244887 : return false;
1790 875513 : if (i >= nelt2 && (ei < nelt || ei >= nelt << 1))
1791 4244887 : return false;
1792 4244887 : }
1793 4244887 :
1794 4244887 : return true;
1795 4244887 : })
1796 4244887 :
1797 4244887 : ;; Return true if OP is a vzeroall operation, known to be a PARALLEL.
1798 5501138 : (define_predicate "vzeroall_operation"
1799 4244887 : (match_code "parallel")
1800 6757389 : {
1801 1256270 : unsigned i, nregs = TARGET_64BIT ? 16 : 8;
1802 0 :
1803 4280 : if ((unsigned) XVECLEN (op, 0) != 1 + nregs)
1804 4244887 : return false;
1805 4244887 :
1806 76888 : for (i = 0; i < nregs; i++)
1807 : {
1808 68328 : rtx elt = XVECEXP (op, 0, i+1);
1809 :
1810 4313215 : if (GET_CODE (elt) != SET
1811 4313215 : || GET_CODE (SET_DEST (elt)) != REG
1812 68328 : || GET_MODE (SET_DEST (elt)) != V8SImode
1813 68328 : || REGNO (SET_DEST (elt)) != GET_SSE_REGNO (i)
1814 136656 : || SET_SRC (elt) != CONST0_RTX (V8SImode))
1815 929145 : return false;
1816 : }
1817 929145 : return true;
1818 : })
1819 326109 :
1820 326109 : ;; return true if OP is a vzeroall pattern.
1821 330389 : (define_predicate "vzeroall_pattern"
1822 326109 : (and (match_code "parallel")
1823 334669 : (match_code "unspec_volatile" "a")
1824 4404 : (match_test "XINT (XVECEXP (op, 0, 0), 1) == UNSPECV_VZEROALL")))
1825 0 :
1826 326109 : ;; return true if OP is a vzeroupper pattern.
1827 326109 : (define_predicate "vzeroupper_pattern"
1828 326109 : (and (match_code "parallel")
1829 252137218 : (match_code "unspec" "b")
1830 983562 : (match_test "XINT (XVECEXP (op, 0, 1), 1) == UNSPEC_CALLEE_ABI")
1831 252137218 : (match_test "INTVAL (XVECEXP (XVECEXP (op, 0, 1), 0, 0)) == ABI_VZEROUPPER")))
1832 0 :
1833 326109 : ;; Return true if OP is an addsub vec_merge operation
1834 : (define_predicate "addsub_vm_operator"
1835 : (match_code "vec_merge")
1836 8230 : {
1837 25146186 : rtx op0, op1;
1838 8230 : int swapped;
1839 25137956 : HOST_WIDE_INT mask;
1840 8230 : int nunits, elt;
1841 :
1842 8230 : op0 = XEXP (op, 0);
1843 8230 : op1 = XEXP (op, 1);
1844 :
1845 : /* Sanity check. */
1846 8230 : if (GET_CODE (op0) == MINUS && GET_CODE (op1) == PLUS)
1847 : swapped = 0;
1848 4274 : else if (GET_CODE (op0) == PLUS && GET_CODE (op1) == MINUS)
1849 : swapped = 1;
1850 : else
1851 0 : gcc_unreachable ();
1852 :
1853 8230 : mask = INTVAL (XEXP (op, 2));
1854 8230 : nunits = GET_MODE_NUNITS (mode);
1855 :
1856 33138 : for (elt = 0; elt < nunits; elt++)
1857 : {
1858 : /* bit clear: take from op0, set: take from op1 */
1859 25154 : int bit = !(mask & (HOST_WIDE_INT_1U << elt));
1860 :
1861 25154 : if (bit != ((elt & 1) ^ swapped))
1862 : return false;
1863 : }
1864 :
1865 : return true;
1866 : })
1867 :
1868 : ;; Return true if OP is an addsub vec_select/vec_concat operation
1869 8230 : (define_predicate "addsub_vs_operator"
1870 : (and (match_code "vec_select")
1871 8230 : (match_code "vec_concat" "0"))
1872 16214 : {
1873 7984 : rtx op0, op1;
1874 0 : bool swapped;
1875 0 : int nunits, elt;
1876 :
1877 0 : op0 = XEXP (XEXP (op, 0), 0);
1878 0 : op1 = XEXP (XEXP (op, 0), 1);
1879 :
1880 : /* Sanity check. */
1881 0 : if (GET_CODE (op0) == MINUS && GET_CODE (op1) == PLUS)
1882 : swapped = false;
1883 0 : else if (GET_CODE (op0) == PLUS && GET_CODE (op1) == MINUS)
1884 : swapped = true;
1885 : else
1886 0 : gcc_unreachable ();
1887 :
1888 0 : nunits = GET_MODE_NUNITS (mode);
1889 0 : if (XVECLEN (XEXP (op, 1), 0) != nunits)
1890 : return false;
1891 :
1892 : /* We already checked that permutation is suitable for addsub,
1893 : so only look at the first element of the parallel. */
1894 0 : elt = INTVAL (XVECEXP (XEXP (op, 1), 0, 0));
1895 :
1896 0 : return elt == (swapped ? nunits : 0);
1897 : })
1898 :
1899 : ;; Return true if OP is a parallel for an addsub vec_select.
1900 0 : (define_predicate "addsub_vs_parallel"
1901 : (and (match_code "parallel")
1902 0 : (match_code "const_int" "a"))
1903 0 : {
1904 0 : int nelt = XVECLEN (op, 0);
1905 476 : int elt, i;
1906 :
1907 476 : if (nelt < 2)
1908 476 : return false;
1909 :
1910 : /* Check that the permutation is suitable for addsub.
1911 : For example, { 0 9 2 11 4 13 6 15 } or { 8 1 10 3 12 5 14 7 }. */
1912 476 : elt = INTVAL (XVECEXP (op, 0, 0));
1913 476 : if (elt == 0)
1914 : {
1915 444 : for (i = 1; i < nelt; ++i)
1916 436 : if (INTVAL (XVECEXP (op, 0, i)) != (i + (i & 1) * nelt))
1917 : return false;
1918 : }
1919 40 : else if (elt == nelt)
1920 : {
1921 0 : for (i = 1; i < nelt; ++i)
1922 0 : if (INTVAL (XVECEXP (op, 0, i)) != (elt + i - (i & 1) * nelt))
1923 : return false;
1924 : }
1925 : else
1926 : return false;
1927 :
1928 : return true;
1929 : })
1930 :
1931 : ;; Return true if OP is a constant pool in perm{w,d,b} which constains index
1932 476 : ;; match pmov{dw,wb,qd}.
1933 : (define_predicate "permvar_truncate_operand"
1934 476 : (match_code "mem")
1935 952 : {
1936 0 : int nelt = GET_MODE_NUNITS (mode);
1937 16 : int perm[128];
1938 16 : int id;
1939 :
1940 32 : if (!INTEGRAL_MODE_P (mode) || !VECTOR_MODE_P (mode))
1941 : return false;
1942 :
1943 16 : if (nelt < 2)
1944 : return false;
1945 :
1946 16 : if (!ix86_extract_perm_from_pool_constant (&perm[0], op))
1947 : return false;
1948 :
1949 16 : id = exact_log2 (nelt);
1950 :
1951 : /* Check that the permutation is suitable for pmovz{bw,wd,dq}.
1952 : For example V16HImode to V8HImode
1953 : { 0 2 4 6 8 10 12 14 * * * * * * * * }. */
1954 232 : for (int i = 0; i != nelt / 2; i++)
1955 216 : if ((perm[i] & ((1 << id) - 1)) != i * 2)
1956 : return false;
1957 :
1958 : return true;
1959 : })
1960 :
1961 : ;; Return true if OP is a constant pool in shufb which constains index
1962 49 : ;; match pmovdw.
1963 : (define_predicate "pshufb_truncv4siv4hi_operand"
1964 16 : (match_code "mem")
1965 65 : {
1966 16 : int perm[128];
1967 :
1968 8 : if (mode != E_V16QImode)
1969 : return false;
1970 8 :
1971 8 : if (!ix86_extract_perm_from_pool_constant (&perm[0], op))
1972 : return false;
1973 :
1974 : /* Check that the permutation is suitable for pmovdw.
1975 : For example V4SImode to V4HImode
1976 : { 0 1 4 5 8 9 12 13 * * * * * * * * }.
1977 : index = i % 2 + (i / 2) * 4. */
1978 58 : for (int i = 0; i != 8; i++)
1979 : {
1980 : /* if (SRC2[(i * 8)+7] = 1) then DEST[(i*8)+7..(i*8)+0] := 0; */
1981 52 : if (perm[i] & 128)
1982 : return false;
1983 :
1984 52 : if ((perm[i] & 15) != ((i & 1) + (i & 0xFE) * 2))
1985 : return false;
1986 : }
1987 :
1988 : return true;
1989 : })
1990 :
1991 : ;; Return true if OP is a constant pool in shufb which constains index
1992 11 : ;; match pmovdw.
1993 : (define_predicate "pshufb_truncv8hiv8qi_operand"
1994 8 : (match_code "mem")
1995 17 : {
1996 6 : int perm[128];
1997 :
1998 11 : if (mode != E_V16QImode)
1999 : return false;
2000 11 :
2001 11 : if (!ix86_extract_perm_from_pool_constant (&perm[0], op))
2002 : return false;
2003 :
2004 : /* Check that the permutation is suitable for pmovwb.
2005 : For example V16QImode to V8QImode
2006 : { 0 2 4 6 8 10 12 14 * * * * * * * * }.
2007 : index = i % 2 + (i / 2) * 4. */
2008 57 : for (int i = 0; i != 8; i++)
2009 : {
2010 : /* if (SRC2[(i * 8)+7] = 1) then DEST[(i*8)+7..(i*8)+0] := 0; */
2011 52 : if (perm[i] & 128)
2012 : return false;
2013 :
2014 52 : if ((perm[i] & 15) != i * 2)
2015 : return false;
2016 : }
2017 :
2018 : return true;
2019 : })
2020 :
2021 : ;; Return true if OP is a parallel for an pmovz{bw,wd,dq} vec_select,
2022 14 : ;; where one of the two operands of the vec_concat is const0_operand.
2023 : (define_predicate "pmovzx_parallel"
2024 11 : (and (match_code "parallel")
2025 19 : (match_code "const_int" "a"))
2026 5 : {
2027 1324885 : int nelt = XVECLEN (op, 0);
2028 1324885 : int elt, i;
2029 :
2030 1324885 : if (nelt < 2)
2031 : return false;
2032 :
2033 : /* Check that the permutation is suitable for pmovz{bw,wd,dq}.
2034 : For example { 0 16 1 17 2 18 3 19 4 20 5 21 6 22 7 23 }. */
2035 1324883 : elt = INTVAL (XVECEXP (op, 0, 0));
2036 1324883 : if (elt == 0)
2037 : {
2038 3040060 : for (i = 1; i < nelt; ++i)
2039 2613699 : if ((i & 1) != 0)
2040 : {
2041 1649693 : if (INTVAL (XVECEXP (op, 0, i)) < nelt)
2042 : return false;
2043 : }
2044 964006 : else if (INTVAL (XVECEXP (op, 0, i)) != i / 2)
2045 : return false;
2046 : }
2047 : else
2048 : return false;
2049 :
2050 : return true;
2051 : })
2052 :
2053 : ;; Return true if OP is a const vector with duplicate value.
2054 1324885 : (define_predicate "const_vector_duplicate_operand"
2055 : (match_code "const_vector")
2056 1324885 : {
2057 2649770 : rtx elt = XVECEXP (op, 0, 0);
2058 0 : int i, nelt = XVECLEN (op, 0);
2059 :
2060 96 : for (i = 1; i < nelt; ++i)
2061 93 : if (!rtx_equal_p (elt, XVECEXP (op, 0, i)))
2062 3 : return false;
2063 : return true;
2064 : })
2065 :
2066 : ;; Return true if OP is a parallel for a vbroadcast permute.
2067 3 : (define_predicate "avx_vbroadcast_operand"
2068 : (and (match_code "parallel")
2069 3 : (match_code "const_int" "a"))
2070 6 : {
2071 3 : rtx elt = XVECEXP (op, 0, 0);
2072 407666 : int i, nelt = XVECLEN (op, 0);
2073 :
2074 : /* Don't bother checking there are the right number of operands,
2075 407666 : merely that they're all identical. */
2076 499016 : for (i = 1; i < nelt; ++i)
2077 265724 : if (XVECEXP (op, 0, i) != elt)
2078 : return false;
2079 : return true;
2080 : })
2081 :
2082 : ;; Return true if OP is a parallel for a vbroadcastf128 permute.
2083 407666 : (define_predicate "avx_vbroadcast128_operand"
2084 : (and (match_code "parallel")
2085 407666 : (match_code "const_int" "a"))
2086 815332 : {
2087 0 : int i, nelt = XVECLEN (op, 0);
2088 1245412 : int half = nelt / 2;
2089 :
2090 1971606 : for (i = 0; i < nelt; ++i)
2091 1245412 : {
2092 1971465 : int index = INTVAL (XVECEXP (op, 0, i));
2093 1971465 : if ((i < half && index != i)
2094 824758 : || (i >= half && index != (i - half)))
2095 : return false;
2096 : }
2097 :
2098 : return true;
2099 : })
2100 :
2101 : ;; Return true if OP is a parallel for a palignr permute.
2102 1245412 : (define_predicate "palignr_operand"
2103 : (and (match_code "parallel")
2104 1245412 : (match_code "const_int" "a"))
2105 2490824 : {
2106 0 : int elt = INTVAL (XVECEXP (op, 0, 0));
2107 26044 : int i, nelt = XVECLEN (op, 0);
2108 :
2109 : /* Check that an order in the permutation is suitable for palignr.
2110 26044 : For example, {5 6 7 0 1 2 3 4} is "palignr 5, xmm, xmm". */
2111 59278 : for (i = 1; i < nelt; ++i)
2112 55614 : if (INTVAL (XVECEXP (op, 0, i)) != ((elt + i) % nelt))
2113 : return false;
2114 : return true;
2115 : })
2116 :
2117 : ;; Return true if OP is a proper third operand to vpblendw256.
2118 26044 : (define_predicate "avx2_pblendw_operand"
2119 : (match_code "const_int")
2120 26044 : {
2121 52088 : HOST_WIDE_INT val = INTVAL (op);
2122 0 : HOST_WIDE_INT low = val & 0xff;
2123 7001 : return val == ((low << 8) | low);
2124 : })
2125 :
2126 7001 : ;; Return true if OP is vector_operand or CONST_VECTOR.
2127 7001 : (define_predicate "general_vector_operand"
2128 : (ior (match_operand 0 "vector_operand")
2129 7001 : (match_code "const_vector")))
2130 7001 :
2131 : ;; Return true if OP is either -1 constant or stored in register.
2132 : (define_predicate "register_or_constm1_operand"
2133 : (ior (match_operand 0 "register_operand")
2134 12588 : (and (match_code "const_int")
2135 0 : (match_test "op == constm1_rtx"))))
2136 12588 :
2137 2382 : ;; Return true if the vector ends with between 12 and 18 register saves using
2138 : ;; RAX as the base address.
2139 : (define_predicate "save_multiple"
2140 220293 : (match_code "parallel")
2141 1324 : {
2142 220293 : const unsigned len = XVECLEN (op, 0);
2143 1324 : unsigned i;
2144 :
2145 : /* Starting from end of vector, count register saves. */
2146 313126 : for (i = 0; i < len; ++i)
2147 : {
2148 313126 : rtx src, dest, addr;
2149 313126 : rtx e = XVECEXP (op, 0, len - 1 - i);
2150 :
2151 313126 : if (GET_CODE (e) != SET)
2152 : break;
2153 :
2154 306081 : src = SET_SRC (e);
2155 306081 : dest = SET_DEST (e);
2156 :
2157 306081 : if (!REG_P (src) || !MEM_P (dest))
2158 : break;
2159 :
2160 92833 : addr = XEXP (dest, 0);
2161 :
2162 : /* Good if dest address is in RAX. */
2163 92833 : if (REG_P (addr) && REGNO (addr) == AX_REG)
2164 4202 : continue;
2165 :
2166 : /* Good if dest address is offset of RAX. */
2167 177262 : if (GET_CODE (addr) == PLUS
2168 88631 : && REG_P (XEXP (addr, 0))
2169 177262 : && REGNO (XEXP (addr, 0)) == AX_REG)
2170 88631 : continue;
2171 :
2172 : break;
2173 : }
2174 220293 : return (i >= 12 && i <= 18);
2175 : })
2176 :
2177 :
2178 220293 : ;; Return true if the vector ends with between 12 and 18 register loads using
2179 : ;; RSI as the base address.
2180 440586 : (define_predicate "restore_multiple"
2181 220293 : (match_code "parallel")
2182 0 : {
2183 7318942 : const unsigned len = XVECLEN (op, 0);
2184 7318942 : unsigned i;
2185 :
2186 7318942 : /* Starting from end of vector, count register restores. */
2187 7425520 : for (i = 0; i < len; ++i)
2188 : {
2189 7425520 : rtx src, dest, addr;
2190 7425520 : rtx e = XVECEXP (op, 0, len - 1 - i);
2191 :
2192 7425520 : if (GET_CODE (e) != SET)
2193 : break;
2194 :
2195 4224610 : src = SET_SRC (e);
2196 4224610 : dest = SET_DEST (e);
2197 :
2198 4224610 : if (!MEM_P (src) || !REG_P (dest))
2199 : break;
2200 :
2201 1268803 : addr = XEXP (src, 0);
2202 :
2203 : /* Good if src address is in RSI. */
2204 1268803 : if (REG_P (addr) && REGNO (addr) == SI_REG)
2205 5137 : continue;
2206 :
2207 : /* Good if src address is offset of RSI. */
2208 1365107 : if (GET_CODE (addr) == PLUS
2209 850599 : && REG_P (XEXP (addr, 0))
2210 2033160 : && REGNO (XEXP (addr, 0)) == SI_REG)
2211 101441 : continue;
2212 :
2213 : break;
2214 : }
2215 7318942 : return (i >= 12 && i <= 18);
2216 : })
2217 :
2218 : ;; Keylocker specific predicates
2219 7318942 : (define_predicate "encodekey128_operation"
2220 : (match_code "parallel")
2221 14637884 : {
2222 7318942 : unsigned i;
2223 0 : rtx elt;
2224 :
2225 108 : if (XVECLEN (op, 0) != 8)
2226 : return false;
2227 108 :
2228 392 : for(i = 0; i < 3; i++)
2229 : {
2230 294 : elt = XVECEXP (op, 0, i + 1);
2231 294 : if (GET_CODE (elt) != SET
2232 294 : || GET_CODE (SET_DEST (elt)) != REG
2233 294 : || GET_MODE (SET_DEST (elt)) != V2DImode
2234 294 : || REGNO (SET_DEST (elt)) != GET_SSE_REGNO (i)
2235 294 : || GET_CODE (SET_SRC (elt)) != UNSPEC_VOLATILE
2236 294 : || GET_MODE (SET_SRC (elt)) != V2DImode
2237 294 : || XVECLEN(SET_SRC (elt), 0) != 1
2238 588 : || XVECEXP(SET_SRC (elt), 0, 0) != const0_rtx)
2239 : return false;
2240 : }
2241 :
2242 392 : for(i = 4; i < 7; i++)
2243 : {
2244 294 : elt = XVECEXP (op, 0, i);
2245 294 : if (GET_CODE (elt) != CLOBBER
2246 294 : || GET_MODE (elt) != VOIDmode
2247 294 : || GET_CODE (XEXP (elt, 0)) != REG
2248 294 : || GET_MODE (XEXP (elt, 0)) != V2DImode
2249 588 : || REGNO (XEXP (elt, 0)) != GET_SSE_REGNO (i))
2250 : return false;
2251 : }
2252 :
2253 98 : elt = XVECEXP (op, 0, 7);
2254 98 : if (GET_CODE (elt) != CLOBBER
2255 98 : || GET_MODE (elt) != VOIDmode
2256 98 : || GET_CODE (XEXP (elt, 0)) != REG
2257 98 : || GET_MODE (XEXP (elt, 0)) != CCmode
2258 196 : || REGNO (XEXP (elt, 0)) != FLAGS_REG)
2259 : return false;
2260 : return true;
2261 : })
2262 :
2263 : (define_predicate "encodekey256_operation"
2264 108 : (match_code "parallel")
2265 : {
2266 337 : unsigned i;
2267 108 : rtx elt;
2268 0 :
2269 121 : if (XVECLEN (op, 0) != 9)
2270 : return false;
2271 :
2272 121 : elt = SET_SRC (XVECEXP (op, 0, 0));
2273 112 : elt = XVECEXP (elt, 0, 2);
2274 112 : if (!REG_P (elt)
2275 112 : || REGNO(elt) != GET_SSE_REGNO (1))
2276 : return false;
2277 :
2278 560 : for(i = 0; i < 4; i++)
2279 : {
2280 448 : elt = XVECEXP (op, 0, i + 1);
2281 448 : if (GET_CODE (elt) != SET
2282 448 : || GET_CODE (SET_DEST (elt)) != REG
2283 448 : || GET_MODE (SET_DEST (elt)) != V2DImode
2284 448 : || REGNO (SET_DEST (elt)) != GET_SSE_REGNO (i)
2285 448 : || GET_CODE (SET_SRC (elt)) != UNSPEC_VOLATILE
2286 448 : || GET_MODE (SET_SRC (elt)) != V2DImode
2287 448 : || XVECLEN(SET_SRC (elt), 0) != 1
2288 896 : || XVECEXP(SET_SRC (elt), 0, 0) != const0_rtx)
2289 : return false;
2290 : }
2291 :
2292 448 : for(i = 4; i < 7; i++)
2293 : {
2294 336 : elt = XVECEXP (op, 0, i + 1);
2295 336 : if (GET_CODE (elt) != CLOBBER
2296 336 : || GET_MODE (elt) != VOIDmode
2297 336 : || GET_CODE (XEXP (elt, 0)) != REG
2298 336 : || GET_MODE (XEXP (elt, 0)) != V2DImode
2299 672 : || REGNO (XEXP (elt, 0)) != GET_SSE_REGNO (i))
2300 : return false;
2301 : }
2302 :
2303 112 : elt = XVECEXP (op, 0, 8);
2304 112 : if (GET_CODE (elt) != CLOBBER
2305 112 : || GET_MODE (elt) != VOIDmode
2306 112 : || GET_CODE (XEXP (elt, 0)) != REG
2307 112 : || GET_MODE (XEXP (elt, 0)) != CCmode
2308 224 : || REGNO (XEXP (elt, 0)) != FLAGS_REG)
2309 : return false;
2310 : return true;
2311 : })
2312 :
2313 :
2314 121 : (define_predicate "aeswidekl_operation"
2315 : (match_code "parallel")
2316 242 : {
2317 121 : unsigned i;
2318 0 : rtx elt;
2319 :
2320 5796 : for (i = 0; i < 8; i++)
2321 : {
2322 660 : elt = XVECEXP (op, 0, i + 1);
2323 5168 : if (GET_CODE (elt) != SET
2324 5168 : || GET_CODE (SET_DEST (elt)) != REG
2325 5168 : || GET_MODE (SET_DEST (elt)) != V2DImode
2326 5168 : || REGNO (SET_DEST (elt)) != GET_SSE_REGNO (i)
2327 5168 : || GET_CODE (SET_SRC (elt)) != UNSPEC_VOLATILE
2328 5168 : || GET_MODE (SET_SRC (elt)) != V2DImode
2329 5168 : || XVECLEN (SET_SRC (elt), 0) != 1
2330 5168 : || !REG_P (XVECEXP (SET_SRC (elt), 0, 0))
2331 10304 : || REGNO (XVECEXP (SET_SRC (elt), 0, 0)) != GET_SSE_REGNO (i))
2332 : return false;
2333 : }
2334 : return true;
2335 : })
2336 :
2337 : ;; Return true if OP is a memory operand that can be also used in APX
2338 660 : ;; EVEX-encoded patterns (i.e. APX NDD/NF) with immediate operand. With
2339 : ;; non-default address space, segment register or address size prefix,
2340 1320 : ;; APX EVEX-encoded instruction length can exceed the 15 byte size limit.
2341 660 : (define_predicate "apx_evex_memory_operand"
2342 0 : (match_operand 0 "memory_operand")
2343 : {
2344 : /* OK if immediate operand size < 4 bytes. */
2345 1689 : if (GET_MODE_SIZE (mode) < 4)
2346 1689 : return true;
2347 :
2348 1530 : bool default_addr = ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (op));
2349 1698 : bool address_size_prefix = TARGET_X32 && Pmode == SImode;
2350 :
2351 1530 : struct ix86_address parts;
2352 1530 : int ok;
2353 :
2354 1530 : op = XEXP (op, 0);
2355 1530 : ok = ix86_decompose_address (op, &parts);
2356 1530 : gcc_assert (ok);
2357 :
2358 1530 : if (default_addr)
2359 : {
2360 : /* Default address space. */
2361 :
2362 : /* Not OK with address size prefix, index register and disp. */
2363 694 : if (address_size_prefix
2364 168 : && parts.index
2365 42 : && parts.disp
2366 42 : && parts.disp != const0_rtx)
2367 : return false;
2368 : }
2369 : else
2370 : {
2371 : /* Non-default address space. */
2372 :
2373 : /* Not OK without base register. */
2374 836 : if (!parts.base)
2375 : return false;
2376 :
2377 : /* Not OK with disp and address size prefix. */
2378 668 : if (address_size_prefix && parts.disp)
2379 : return false;
2380 : }
2381 :
2382 : return true;
2383 : })
2384 :
2385 : ;; Return true if OP is a memory operand which can be used in APX EVEX-encoded
2386 1900 : ;; ADD patterns (i.e. APX NDD/NF) for with register source operand.
2387 : ;; UNSPEC_GOTNTPOFF memory operand is allowed with APX EVEX-encoded ADD only if
2388 3589 : ;; R_X86_64_CODE_6_GOTTPOFF works.
2389 1689 : (define_predicate "apx_evex_add_memory_operand"
2390 : (match_operand 0 "memory_operand")
2391 : {
2392 : /* OK if "add %reg1, name@gottpoff(%rip), %reg2" or
2393 : "{nf} add name@gottpoff(%rip), %reg1" are supported. */
2394 : if (HAVE_AS_R_X86_64_CODE_6_GOTTPOFF)
2395 : return true;
2396 :
2397 : op = XEXP (op, 0);
2398 :
2399 : /* Disallow APX EVEX-encoded ADD with UNSPEC_GOTNTPOFF. */
2400 : if (GET_CODE (op) == CONST
2401 : && GET_CODE (XEXP (op, 0)) == UNSPEC
2402 : && XINT (XEXP (op, 0), 1) == UNSPEC_GOTNTPOFF)
2403 : return false;
2404 :
2405 : return true;
2406 : })
2407 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2408 : /* (content generated from coverage data) */
2409 1021 : /* BEGIN: function "_Z27apx_evex_add_memory_operandP7rtx_def12machine_mode" */
2410 : /* ... */
2411 1021 : /* ... */
2412 1021 : /* ... */
2413 : /* END: function "_Z27apx_evex_add_memory_operandP7rtx_def12machine_mode" */
2414 : /* ... */
2415 : /* ... */
2416 991081407 : /* BEGIN: function "_Z19lookup_constraint_1PKc" */
2417 : /* ... */
2418 991081407 : /* ... */
2419 : /* ... */
2420 : /* ... */
2421 : /* ... */
2422 0 : /* ... */
2423 0 : /* ... */
2424 0 : /* ... */
2425 0 : /* ... */
2426 0 : /* ... */
2427 0 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2428 588043868 : /* (content generated from coverage data) */
2429 588043868 : /* ... */
2430 : /* ... */
2431 : /* ... */
2432 7769924 : /* ... */
2433 : /* ... */
2434 133292252 : /* ... */
2435 : /* ... */
2436 144291 : /* ... */
2437 : /* ... */
2438 1648498 : /* ... */
2439 : /* ... */
2440 1400833 : /* ... */
2441 : /* ... */
2442 54940732 : /* ... */
2443 : /* ... */
2444 50129926 : /* ... */
2445 : /* ... */
2446 103818665 : /* ... */
2447 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2448 39128699 : /* (content generated from coverage data) */
2449 : /* ... */
2450 122071606 : /* ... */
2451 : /* ... */
2452 73697615 : /* ... */
2453 : /* ... */
2454 827 : /* ... */
2455 : /* ... */
2456 0 : /* ... */
2457 0 : /* ... */
2458 0 : /* ... */
2459 0 : /* ... */
2460 0 : /* ... */
2461 0 : /* ... */
2462 0 : /* ... */
2463 0 : /* ... */
2464 0 : /* ... */
2465 0 : /* ... */
2466 0 : /* ... */
2467 0 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2468 0 : /* (content generated from coverage data) */
2469 0 : /* ... */
2470 0 : /* ... */
2471 0 : /* ... */
2472 0 : /* ... */
2473 0 : /* ... */
2474 0 : /* ... */
2475 0 : /* ... */
2476 0 : /* ... */
2477 0 : /* ... */
2478 0 : /* ... */
2479 0 : /* ... */
2480 0 : /* ... */
2481 0 : /* ... */
2482 0 : /* ... */
2483 0 : /* ... */
2484 0 : /* ... */
2485 0 : /* ... */
2486 38841859 : /* ... */
2487 38841859 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2488 : /* (content generated from coverage data) */
2489 22212 : /* ... */
2490 : /* ... */
2491 : /* ... */
2492 0 : /* ... */
2493 0 : /* ... */
2494 0 : /* ... */
2495 0 : /* ... */
2496 3455750 : /* ... */
2497 3455750 : /* ... */
2498 : /* ... */
2499 : /* ... */
2500 5350 : /* ... */
2501 : /* ... */
2502 313761 : /* ... */
2503 : /* ... */
2504 2809892 : /* ... */
2505 : /* ... */
2506 254582 : /* ... */
2507 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2508 1418 : /* (content generated from coverage data) */
2509 : /* ... */
2510 240 : /* ... */
2511 : /* ... */
2512 4913 : /* ... */
2513 : /* ... */
2514 0 : /* ... */
2515 0 : /* ... */
2516 352387280 : /* ... */
2517 352387280 : /* ... */
2518 : /* ... */
2519 : /* ... */
2520 9551335 : /* ... */
2521 : /* ... */
2522 1265524 : /* ... */
2523 : /* ... */
2524 1497369 : /* ... */
2525 : /* ... */
2526 18843 : /* ... */
2527 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2528 194757707 : /* (content generated from coverage data) */
2529 : /* ... */
2530 1075291 : /* ... */
2531 : /* ... */
2532 139479202 : /* ... */
2533 : /* ... */
2534 3179481 : /* ... */
2535 : /* ... */
2536 397756 : /* ... */
2537 : /* ... */
2538 1137233 : /* ... */
2539 : /* ... */
2540 0 : /* ... */
2541 0 : /* ... */
2542 0 : /* ... */
2543 0 : /* ... */
2544 0 : /* ... */
2545 0 : /* ... */
2546 0 : /* ... */
2547 0 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2548 0 : /* (content generated from coverage data) */
2549 0 : /* ... */
2550 0 : /* ... */
2551 0 : /* ... */
2552 0 : /* ... */
2553 0 : /* ... */
2554 0 : /* ... */
2555 0 : /* ... */
2556 8352650 : /* ... */
2557 8352650 : /* ... */
2558 : /* ... */
2559 : /* ... */
2560 1118497 : /* ... */
2561 : /* ... */
2562 0 : /* ... */
2563 : /* ... */
2564 0 : /* ... */
2565 : /* ... */
2566 0 : /* ... */
2567 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2568 0 : /* (content generated from coverage data) */
2569 : /* ... */
2570 0 : /* ... */
2571 : /* ... */
2572 218687 : /* ... */
2573 : /* ... */
2574 8598 : /* ... */
2575 : /* ... */
2576 6106470 : /* ... */
2577 : /* ... */
2578 153953 : /* ... */
2579 : /* ... */
2580 266725 : /* ... */
2581 : /* ... */
2582 3586 : /* ... */
2583 : /* ... */
2584 0 : /* ... */
2585 : /* ... */
2586 0 : /* ... */
2587 0 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2588 0 : /* (content generated from coverage data) */
2589 0 : /* ... */
2590 0 : /* ... */
2591 0 : /* ... */
2592 0 : /* ... */
2593 0 : /* ... */
2594 0 : /* ... */
2595 0 : /* ... */
2596 0 : /* ... */
2597 0 : /* ... */
2598 0 : /* ... */
2599 0 : /* ... */
2600 0 : /* ... */
2601 0 : /* ... */
2602 0 : /* ... */
2603 0 : /* ... */
2604 0 : /* ... */
2605 0 : /* ... */
2606 0 : /* ... */
2607 0 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2608 0 : /* (content generated from coverage data) */
2609 0 : /* ... */
2610 0 : /* ... */
2611 0 : /* ... */
2612 0 : /* ... */
2613 0 : /* ... */
2614 : /* ... */
2615 : /* ... */
2616 1334 : /* ... */
2617 : /* END: function "_Z19lookup_constraint_1PKc" */
2618 : /* ... */
2619 : /* ... */
2620 : /* ... */
2621 : /* ... */
2622 : /* ... */
2623 : /* ... */
2624 : /* ... */
2625 : /* ... */
2626 : /* ... */
2627 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2628 : /* (content generated from coverage data) */
2629 : /* ... */
2630 : /* ... */
2631 : /* ... */
2632 : /* ... */
2633 : /* ... */
2634 : /* ... */
2635 : /* ... */
2636 : /* ... */
2637 : /* ... */
2638 : /* ... */
2639 : /* ... */
2640 : /* ... */
2641 : /* ... */
2642 : /* ... */
2643 : /* ... */
2644 : /* ... */
2645 : /* ... */
2646 : /* ... */
2647 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2648 : /* (content generated from coverage data) */
2649 : /* ... */
2650 : /* ... */
2651 : /* ... */
2652 : /* ... */
2653 : /* ... */
2654 : /* ... */
2655 : /* ... */
2656 : /* ... */
2657 : /* ... */
2658 : /* ... */
2659 : /* ... */
2660 : /* ... */
2661 : /* ... */
2662 : /* ... */
2663 : /* ... */
2664 : /* ... */
2665 : /* ... */
2666 : /* ... */
2667 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2668 : /* (content generated from coverage data) */
2669 : /* ... */
2670 : /* ... */
2671 : /* ... */
2672 : /* ... */
2673 : /* ... */
2674 : /* ... */
2675 : /* ... */
2676 : /* ... */
2677 : /* ... */
2678 : /* ... */
2679 : /* ... */
2680 : /* ... */
2681 : /* ... */
2682 : /* ... */
2683 : /* ... */
2684 : /* ... */
2685 : /* ... */
2686 : /* ... */
2687 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2688 : /* (content generated from coverage data) */
2689 : /* ... */
2690 : /* ... */
2691 : /* ... */
2692 : /* ... */
2693 : /* ... */
2694 : /* ... */
2695 : /* ... */
2696 : /* ... */
2697 : /* ... */
2698 : /* ... */
2699 : /* ... */
2700 : /* ... */
2701 : /* ... */
2702 : /* ... */
2703 : /* ... */
2704 : /* ... */
2705 : /* ... */
2706 : /* ... */
2707 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2708 : /* (content generated from coverage data) */
2709 : /* ... */
2710 : /* ... */
2711 : /* ... */
2712 : /* ... */
2713 : /* ... */
2714 : /* ... */
2715 : /* ... */
2716 : /* ... */
2717 : /* ... */
2718 : /* ... */
2719 : /* ... */
2720 : /* ... */
2721 : /* ... */
2722 : /* ... */
2723 : /* ... */
2724 : /* ... */
2725 : /* ... */
2726 : /* ... */
2727 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2728 : /* (content generated from coverage data) */
2729 : /* ... */
2730 : /* ... */
2731 : /* ... */
2732 : /* ... */
2733 : /* ... */
2734 : /* ... */
2735 : /* ... */
2736 : /* ... */
2737 : /* ... */
2738 : /* ... */
2739 : /* ... */
2740 : /* ... */
2741 : /* ... */
2742 : /* ... */
2743 : /* ... */
2744 : /* ... */
2745 : /* ... */
2746 : /* ... */
2747 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2748 : /* (content generated from coverage data) */
2749 : /* ... */
2750 : /* ... */
2751 : /* ... */
2752 : /* ... */
2753 : /* ... */
2754 : /* ... */
2755 : /* ... */
2756 : /* ... */
2757 : /* ... */
2758 : /* ... */
2759 : /* ... */
2760 : /* ... */
2761 : /* ... */
2762 : /* ... */
2763 : /* ... */
2764 : /* ... */
2765 : /* ... */
2766 : /* ... */
2767 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2768 : /* (content generated from coverage data) */
2769 : /* ... */
2770 : /* ... */
2771 : /* ... */
2772 : /* ... */
2773 : /* ... */
2774 : /* ... */
2775 : /* ... */
2776 : /* ... */
2777 : /* ... */
2778 : /* ... */
2779 : /* ... */
2780 : /* ... */
2781 : /* ... */
2782 : /* ... */
2783 : /* ... */
2784 : /* ... */
2785 : /* ... */
2786 : /* ... */
2787 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2788 : /* (content generated from coverage data) */
2789 : /* ... */
2790 : /* ... */
2791 : /* ... */
2792 : /* ... */
2793 : /* ... */
2794 : /* ... */
2795 : /* ... */
2796 : /* ... */
2797 : /* ... */
2798 : /* ... */
2799 : /* ... */
2800 : /* ... */
2801 : /* ... */
2802 : /* ... */
2803 : /* ... */
2804 : /* ... */
2805 : /* ... */
2806 : /* ... */
2807 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2808 : /* (content generated from coverage data) */
2809 : /* ... */
2810 : /* ... */
2811 : /* ... */
2812 : /* ... */
2813 : /* ... */
2814 : /* ... */
2815 : /* ... */
2816 : /* ... */
2817 : /* ... */
2818 : /* ... */
2819 : /* ... */
2820 : /* ... */
2821 : /* ... */
2822 : /* ... */
2823 : /* ... */
2824 : /* ... */
2825 : /* ... */
2826 : /* ... */
2827 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2828 : /* (content generated from coverage data) */
2829 : /* ... */
2830 : /* ... */
2831 : /* ... */
2832 : /* ... */
2833 : /* ... */
2834 : /* ... */
2835 : /* ... */
2836 : /* ... */
2837 : /* ... */
2838 : /* ... */
2839 : /* ... */
2840 : /* ... */
2841 : /* ... */
2842 : /* ... */
2843 : /* ... */
2844 : /* ... */
2845 : /* ... */
2846 : /* ... */
2847 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2848 : /* (content generated from coverage data) */
2849 : /* ... */
2850 : /* ... */
2851 : /* ... */
2852 : /* ... */
2853 : /* ... */
2854 : /* ... */
2855 : /* ... */
2856 : /* ... */
2857 : /* ... */
2858 : /* ... */
2859 : /* ... */
2860 : /* ... */
2861 : /* ... */
2862 : /* ... */
2863 : /* ... */
2864 : /* ... */
2865 : /* ... */
2866 : /* ... */
2867 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2868 : /* (content generated from coverage data) */
2869 : /* ... */
2870 : /* ... */
2871 : /* ... */
2872 : /* ... */
2873 : /* ... */
2874 : /* ... */
2875 : /* ... */
2876 : /* ... */
2877 : /* ... */
2878 : /* ... */
2879 7251638501 : /* BEGIN: function "_Z26reg_class_for_constraint_114constraint_num" */
2880 : /* ... */
2881 7251638501 : /* ... */
2882 : /* ... */
2883 : /* ... */
2884 : /* ... */
2885 137764299 : /* ... */
2886 : /* ... */
2887 53183233 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2888 23092014 : /* (content generated from coverage data) */
2889 : /* ... */
2890 23787402 : /* ... */
2891 9376091 : /* ... */
2892 718922 : /* ... */
2893 887919 : /* ... */
2894 706224 : /* ... */
2895 1425650 : /* ... */
2896 216112331 : /* ... */
2897 81659 : /* ... */
2898 8627 : /* ... */
2899 904361 : /* ... */
2900 43785651 : /* ... */
2901 654981387 : /* ... */
2902 240491651 : /* ... */
2903 1496709464 : /* ... */
2904 14365 : /* ... */
2905 9551335 : /* ... */
2906 1265524 : /* ... */
2907 0 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2908 1497369 : /* (content generated from coverage data) */
2909 14175 : /* ... */
2910 184311509 : /* ... */
2911 316138 : /* ... */
2912 139320742 : /* ... */
2913 2886656 : /* ... */
2914 353831 : /* ... */
2915 : /* ... */
2916 80380 : /* ... */
2917 6106470 : /* ... */
2918 : /* ... */
2919 : /* ... */
2920 : /* ... */
2921 : /* END: function "_Z26reg_class_for_constraint_114constraint_num" */
2922 : /* ... */
2923 : /* ... */
2924 : /* ... */
2925 : /* ... */
2926 : /* ... */
2927 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2928 : /* (content generated from coverage data) */
2929 : /* ... */
2930 : /* ... */
2931 : /* ... */
2932 : /* ... */
2933 : /* ... */
2934 : /* ... */
2935 : /* ... */
2936 : /* ... */
2937 : /* ... */
2938 : /* ... */
2939 : /* ... */
2940 : /* ... */
2941 : /* ... */
2942 : /* ... */
2943 : /* ... */
2944 : /* ... */
2945 : /* ... */
2946 : /* ... */
2947 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2948 : /* (content generated from coverage data) */
2949 : /* ... */
2950 : /* ... */
2951 : /* ... */
2952 : /* ... */
2953 : /* ... */
2954 : /* ... */
2955 : /* ... */
2956 : /* ... */
2957 : /* ... */
2958 : /* ... */
2959 : /* ... */
2960 : /* ... */
2961 : /* ... */
2962 : /* ... */
2963 : /* ... */
2964 : /* ... */
2965 : /* ... */
2966 : /* ... */
2967 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2968 : /* (content generated from coverage data) */
2969 : /* ... */
2970 : /* ... */
2971 : /* ... */
2972 : /* ... */
2973 : /* ... */
2974 : /* ... */
2975 : /* ... */
2976 : /* ... */
2977 : /* ... */
2978 : /* ... */
2979 : /* ... */
2980 : /* ... */
2981 : /* ... */
2982 : /* ... */
2983 : /* ... */
2984 : /* ... */
2985 7063040 : /* END: function "_Z32insn_const_int_ok_for_constraintl14constraint_num" */
2986 : /* ... */
2987 7063040 : /* /home/worker/buildworker/tiber-lcov/build/gcc/config/i386/predicates.md not long enough */
2988 : /* (content generated from coverage data) */
2989 1361583 : /* ... */
2990 1361583 : /* ... */
|
