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1 : : /* Common subexpression elimination for GNU compiler.
2 : : Copyright (C) 1987-2024 Free Software Foundation, Inc.
3 : :
4 : : This file is part of GCC.
5 : :
6 : : GCC is free software; you can redistribute it and/or modify it under
7 : : the terms of the GNU General Public License as published by the Free
8 : : Software Foundation; either version 3, or (at your option) any later
9 : : version.
10 : :
11 : : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : : for more details.
15 : :
16 : : You should have received a copy of the GNU General Public License
17 : : along with GCC; see the file COPYING3. If not see
18 : : <http://www.gnu.org/licenses/>. */
19 : :
20 : : #include "config.h"
21 : : #include "system.h"
22 : : #include "coretypes.h"
23 : : #include "backend.h"
24 : : #include "target.h"
25 : : #include "rtl.h"
26 : : #include "tree.h"
27 : : #include "cfghooks.h"
28 : : #include "df.h"
29 : : #include "memmodel.h"
30 : : #include "tm_p.h"
31 : : #include "insn-config.h"
32 : : #include "regs.h"
33 : : #include "emit-rtl.h"
34 : : #include "recog.h"
35 : : #include "cfgrtl.h"
36 : : #include "cfganal.h"
37 : : #include "cfgcleanup.h"
38 : : #include "alias.h"
39 : : #include "toplev.h"
40 : : #include "rtlhooks-def.h"
41 : : #include "tree-pass.h"
42 : : #include "dbgcnt.h"
43 : : #include "rtl-iter.h"
44 : : #include "regs.h"
45 : : #include "function-abi.h"
46 : : #include "rtlanal.h"
47 : : #include "expr.h"
48 : :
49 : : /* The basic idea of common subexpression elimination is to go
50 : : through the code, keeping a record of expressions that would
51 : : have the same value at the current scan point, and replacing
52 : : expressions encountered with the cheapest equivalent expression.
53 : :
54 : : It is too complicated to keep track of the different possibilities
55 : : when control paths merge in this code; so, at each label, we forget all
56 : : that is known and start fresh. This can be described as processing each
57 : : extended basic block separately. We have a separate pass to perform
58 : : global CSE.
59 : :
60 : : Note CSE can turn a conditional or computed jump into a nop or
61 : : an unconditional jump. When this occurs we arrange to run the jump
62 : : optimizer after CSE to delete the unreachable code.
63 : :
64 : : We use two data structures to record the equivalent expressions:
65 : : a hash table for most expressions, and a vector of "quantity
66 : : numbers" to record equivalent (pseudo) registers.
67 : :
68 : : The use of the special data structure for registers is desirable
69 : : because it is faster. It is possible because registers references
70 : : contain a fairly small number, the register number, taken from
71 : : a contiguously allocated series, and two register references are
72 : : identical if they have the same number. General expressions
73 : : do not have any such thing, so the only way to retrieve the
74 : : information recorded on an expression other than a register
75 : : is to keep it in a hash table.
76 : :
77 : : Registers and "quantity numbers":
78 : :
79 : : At the start of each basic block, all of the (hardware and pseudo)
80 : : registers used in the function are given distinct quantity
81 : : numbers to indicate their contents. During scan, when the code
82 : : copies one register into another, we copy the quantity number.
83 : : When a register is loaded in any other way, we allocate a new
84 : : quantity number to describe the value generated by this operation.
85 : : `REG_QTY (N)' records what quantity register N is currently thought
86 : : of as containing.
87 : :
88 : : All real quantity numbers are greater than or equal to zero.
89 : : If register N has not been assigned a quantity, `REG_QTY (N)' will
90 : : equal -N - 1, which is always negative.
91 : :
92 : : Quantity numbers below zero do not exist and none of the `qty_table'
93 : : entries should be referenced with a negative index.
94 : :
95 : : We also maintain a bidirectional chain of registers for each
96 : : quantity number. The `qty_table` members `first_reg' and `last_reg',
97 : : and `reg_eqv_table' members `next' and `prev' hold these chains.
98 : :
99 : : The first register in a chain is the one whose lifespan is least local.
100 : : Among equals, it is the one that was seen first.
101 : : We replace any equivalent register with that one.
102 : :
103 : : If two registers have the same quantity number, it must be true that
104 : : REG expressions with qty_table `mode' must be in the hash table for both
105 : : registers and must be in the same class.
106 : :
107 : : The converse is not true. Since hard registers may be referenced in
108 : : any mode, two REG expressions might be equivalent in the hash table
109 : : but not have the same quantity number if the quantity number of one
110 : : of the registers is not the same mode as those expressions.
111 : :
112 : : Constants and quantity numbers
113 : :
114 : : When a quantity has a known constant value, that value is stored
115 : : in the appropriate qty_table `const_rtx'. This is in addition to
116 : : putting the constant in the hash table as is usual for non-regs.
117 : :
118 : : Whether a reg or a constant is preferred is determined by the configuration
119 : : macro CONST_COSTS and will often depend on the constant value. In any
120 : : event, expressions containing constants can be simplified, by fold_rtx.
121 : :
122 : : When a quantity has a known nearly constant value (such as an address
123 : : of a stack slot), that value is stored in the appropriate qty_table
124 : : `const_rtx'.
125 : :
126 : : Integer constants don't have a machine mode. However, cse
127 : : determines the intended machine mode from the destination
128 : : of the instruction that moves the constant. The machine mode
129 : : is recorded in the hash table along with the actual RTL
130 : : constant expression so that different modes are kept separate.
131 : :
132 : : Other expressions:
133 : :
134 : : To record known equivalences among expressions in general
135 : : we use a hash table called `table'. It has a fixed number of buckets
136 : : that contain chains of `struct table_elt' elements for expressions.
137 : : These chains connect the elements whose expressions have the same
138 : : hash codes.
139 : :
140 : : Other chains through the same elements connect the elements which
141 : : currently have equivalent values.
142 : :
143 : : Register references in an expression are canonicalized before hashing
144 : : the expression. This is done using `reg_qty' and qty_table `first_reg'.
145 : : The hash code of a register reference is computed using the quantity
146 : : number, not the register number.
147 : :
148 : : When the value of an expression changes, it is necessary to remove from the
149 : : hash table not just that expression but all expressions whose values
150 : : could be different as a result.
151 : :
152 : : 1. If the value changing is in memory, except in special cases
153 : : ANYTHING referring to memory could be changed. That is because
154 : : nobody knows where a pointer does not point.
155 : : The function `invalidate_memory' removes what is necessary.
156 : :
157 : : The special cases are when the address is constant or is
158 : : a constant plus a fixed register such as the frame pointer
159 : : or a static chain pointer. When such addresses are stored in,
160 : : we can tell exactly which other such addresses must be invalidated
161 : : due to overlap. `invalidate' does this.
162 : : All expressions that refer to non-constant
163 : : memory addresses are also invalidated. `invalidate_memory' does this.
164 : :
165 : : 2. If the value changing is a register, all expressions
166 : : containing references to that register, and only those,
167 : : must be removed.
168 : :
169 : : Because searching the entire hash table for expressions that contain
170 : : a register is very slow, we try to figure out when it isn't necessary.
171 : : Precisely, this is necessary only when expressions have been
172 : : entered in the hash table using this register, and then the value has
173 : : changed, and then another expression wants to be added to refer to
174 : : the register's new value. This sequence of circumstances is rare
175 : : within any one basic block.
176 : :
177 : : `REG_TICK' and `REG_IN_TABLE', accessors for members of
178 : : cse_reg_info, are used to detect this case. REG_TICK (i) is
179 : : incremented whenever a value is stored in register i.
180 : : REG_IN_TABLE (i) holds -1 if no references to register i have been
181 : : entered in the table; otherwise, it contains the value REG_TICK (i)
182 : : had when the references were entered. If we want to enter a
183 : : reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
184 : : remove old references. Until we want to enter a new entry, the
185 : : mere fact that the two vectors don't match makes the entries be
186 : : ignored if anyone tries to match them.
187 : :
188 : : Registers themselves are entered in the hash table as well as in
189 : : the equivalent-register chains. However, `REG_TICK' and
190 : : `REG_IN_TABLE' do not apply to expressions which are simple
191 : : register references. These expressions are removed from the table
192 : : immediately when they become invalid, and this can be done even if
193 : : we do not immediately search for all the expressions that refer to
194 : : the register.
195 : :
196 : : A CLOBBER rtx in an instruction invalidates its operand for further
197 : : reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
198 : : invalidates everything that resides in memory.
199 : :
200 : : Related expressions:
201 : :
202 : : Constant expressions that differ only by an additive integer
203 : : are called related. When a constant expression is put in
204 : : the table, the related expression with no constant term
205 : : is also entered. These are made to point at each other
206 : : so that it is possible to find out if there exists any
207 : : register equivalent to an expression related to a given expression. */
208 : :
209 : : /* Length of qty_table vector. We know in advance we will not need
210 : : a quantity number this big. */
211 : :
212 : : static int max_qty;
213 : :
214 : : /* Next quantity number to be allocated.
215 : : This is 1 + the largest number needed so far. */
216 : :
217 : : static int next_qty;
218 : :
219 : : /* Per-qty information tracking.
220 : :
221 : : `first_reg' and `last_reg' track the head and tail of the
222 : : chain of registers which currently contain this quantity.
223 : :
224 : : `mode' contains the machine mode of this quantity.
225 : :
226 : : `const_rtx' holds the rtx of the constant value of this
227 : : quantity, if known. A summations of the frame/arg pointer
228 : : and a constant can also be entered here. When this holds
229 : : a known value, `const_insn' is the insn which stored the
230 : : constant value.
231 : :
232 : : `comparison_{code,const,qty}' are used to track when a
233 : : comparison between a quantity and some constant or register has
234 : : been passed. In such a case, we know the results of the comparison
235 : : in case we see it again. These members record a comparison that
236 : : is known to be true. `comparison_code' holds the rtx code of such
237 : : a comparison, else it is set to UNKNOWN and the other two
238 : : comparison members are undefined. `comparison_const' holds
239 : : the constant being compared against, or zero if the comparison
240 : : is not against a constant. `comparison_qty' holds the quantity
241 : : being compared against when the result is known. If the comparison
242 : : is not with a register, `comparison_qty' is -1. */
243 : :
244 : : struct qty_table_elem
245 : : {
246 : : rtx const_rtx;
247 : : rtx_insn *const_insn;
248 : : rtx comparison_const;
249 : : int comparison_qty;
250 : : unsigned int first_reg, last_reg;
251 : : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
252 : : ENUM_BITFIELD(rtx_code) comparison_code : RTX_CODE_BITSIZE;
253 : : };
254 : :
255 : : /* The table of all qtys, indexed by qty number. */
256 : : static struct qty_table_elem *qty_table;
257 : :
258 : : /* Insn being scanned. */
259 : :
260 : : static rtx_insn *this_insn;
261 : : static bool optimize_this_for_speed_p;
262 : :
263 : : /* Index by register number, gives the number of the next (or
264 : : previous) register in the chain of registers sharing the same
265 : : value.
266 : :
267 : : Or -1 if this register is at the end of the chain.
268 : :
269 : : If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
270 : :
271 : : /* Per-register equivalence chain. */
272 : : struct reg_eqv_elem
273 : : {
274 : : int next, prev;
275 : : };
276 : :
277 : : /* The table of all register equivalence chains. */
278 : : static struct reg_eqv_elem *reg_eqv_table;
279 : :
280 : : struct cse_reg_info
281 : : {
282 : : /* The timestamp at which this register is initialized. */
283 : : unsigned int timestamp;
284 : :
285 : : /* The quantity number of the register's current contents. */
286 : : int reg_qty;
287 : :
288 : : /* The number of times the register has been altered in the current
289 : : basic block. */
290 : : int reg_tick;
291 : :
292 : : /* The REG_TICK value at which rtx's containing this register are
293 : : valid in the hash table. If this does not equal the current
294 : : reg_tick value, such expressions existing in the hash table are
295 : : invalid. */
296 : : int reg_in_table;
297 : :
298 : : /* The SUBREG that was set when REG_TICK was last incremented. Set
299 : : to -1 if the last store was to the whole register, not a subreg. */
300 : : unsigned int subreg_ticked;
301 : : };
302 : :
303 : : /* A table of cse_reg_info indexed by register numbers. */
304 : : static struct cse_reg_info *cse_reg_info_table;
305 : :
306 : : /* The size of the above table. */
307 : : static unsigned int cse_reg_info_table_size;
308 : :
309 : : /* The index of the first entry that has not been initialized. */
310 : : static unsigned int cse_reg_info_table_first_uninitialized;
311 : :
312 : : /* The timestamp at the beginning of the current run of
313 : : cse_extended_basic_block. We increment this variable at the beginning of
314 : : the current run of cse_extended_basic_block. The timestamp field of a
315 : : cse_reg_info entry matches the value of this variable if and only
316 : : if the entry has been initialized during the current run of
317 : : cse_extended_basic_block. */
318 : : static unsigned int cse_reg_info_timestamp;
319 : :
320 : : /* A HARD_REG_SET containing all the hard registers for which there is
321 : : currently a REG expression in the hash table. Note the difference
322 : : from the above variables, which indicate if the REG is mentioned in some
323 : : expression in the table. */
324 : :
325 : : static HARD_REG_SET hard_regs_in_table;
326 : :
327 : : /* True if CSE has altered the CFG. */
328 : : static bool cse_cfg_altered;
329 : :
330 : : /* True if CSE has altered conditional jump insns in such a way
331 : : that jump optimization should be redone. */
332 : : static bool cse_jumps_altered;
333 : :
334 : : /* True if we put a LABEL_REF into the hash table for an INSN
335 : : without a REG_LABEL_OPERAND, we have to rerun jump after CSE
336 : : to put in the note. */
337 : : static bool recorded_label_ref;
338 : :
339 : : /* canon_hash stores 1 in do_not_record if it notices a reference to PC or
340 : : some other volatile subexpression. */
341 : :
342 : : static int do_not_record;
343 : :
344 : : /* canon_hash stores 1 in hash_arg_in_memory
345 : : if it notices a reference to memory within the expression being hashed. */
346 : :
347 : : static int hash_arg_in_memory;
348 : :
349 : : /* The hash table contains buckets which are chains of `struct table_elt's,
350 : : each recording one expression's information.
351 : : That expression is in the `exp' field.
352 : :
353 : : The canon_exp field contains a canonical (from the point of view of
354 : : alias analysis) version of the `exp' field.
355 : :
356 : : Those elements with the same hash code are chained in both directions
357 : : through the `next_same_hash' and `prev_same_hash' fields.
358 : :
359 : : Each set of expressions with equivalent values
360 : : are on a two-way chain through the `next_same_value'
361 : : and `prev_same_value' fields, and all point with
362 : : the `first_same_value' field at the first element in
363 : : that chain. The chain is in order of increasing cost.
364 : : Each element's cost value is in its `cost' field.
365 : :
366 : : The `in_memory' field is nonzero for elements that
367 : : involve any reference to memory. These elements are removed
368 : : whenever a write is done to an unidentified location in memory.
369 : : To be safe, we assume that a memory address is unidentified unless
370 : : the address is either a symbol constant or a constant plus
371 : : the frame pointer or argument pointer.
372 : :
373 : : The `related_value' field is used to connect related expressions
374 : : (that differ by adding an integer).
375 : : The related expressions are chained in a circular fashion.
376 : : `related_value' is zero for expressions for which this
377 : : chain is not useful.
378 : :
379 : : The `cost' field stores the cost of this element's expression.
380 : : The `regcost' field stores the value returned by approx_reg_cost for
381 : : this element's expression.
382 : :
383 : : The `is_const' flag is set if the element is a constant (including
384 : : a fixed address).
385 : :
386 : : The `flag' field is used as a temporary during some search routines.
387 : :
388 : : The `mode' field is usually the same as GET_MODE (`exp'), but
389 : : if `exp' is a CONST_INT and has no machine mode then the `mode'
390 : : field is the mode it was being used as. Each constant is
391 : : recorded separately for each mode it is used with. */
392 : :
393 : : struct table_elt
394 : : {
395 : : rtx exp;
396 : : rtx canon_exp;
397 : : struct table_elt *next_same_hash;
398 : : struct table_elt *prev_same_hash;
399 : : struct table_elt *next_same_value;
400 : : struct table_elt *prev_same_value;
401 : : struct table_elt *first_same_value;
402 : : struct table_elt *related_value;
403 : : int cost;
404 : : int regcost;
405 : : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
406 : : char in_memory;
407 : : char is_const;
408 : : char flag;
409 : : };
410 : :
411 : : /* We don't want a lot of buckets, because we rarely have very many
412 : : things stored in the hash table, and a lot of buckets slows
413 : : down a lot of loops that happen frequently. */
414 : : #define HASH_SHIFT 5
415 : : #define HASH_SIZE (1 << HASH_SHIFT)
416 : : #define HASH_MASK (HASH_SIZE - 1)
417 : :
418 : : /* Determine whether register number N is considered a fixed register for the
419 : : purpose of approximating register costs.
420 : : It is desirable to replace other regs with fixed regs, to reduce need for
421 : : non-fixed hard regs.
422 : : A reg wins if it is either the frame pointer or designated as fixed. */
423 : : #define FIXED_REGNO_P(N) \
424 : : ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
425 : : || fixed_regs[N] || global_regs[N])
426 : :
427 : : /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
428 : : hard registers and pointers into the frame are the cheapest with a cost
429 : : of 0. Next come pseudos with a cost of one and other hard registers with
430 : : a cost of 2. Aside from these special cases, call `rtx_cost'. */
431 : :
432 : : #define CHEAP_REGNO(N) \
433 : : (REGNO_PTR_FRAME_P (N) \
434 : : || (HARD_REGISTER_NUM_P (N) \
435 : : && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
436 : :
437 : : #define COST(X, MODE) \
438 : : (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
439 : : #define COST_IN(X, MODE, OUTER, OPNO) \
440 : : (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
441 : :
442 : : /* Get the number of times this register has been updated in this
443 : : basic block. */
444 : :
445 : : #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
446 : :
447 : : /* Get the point at which REG was recorded in the table. */
448 : :
449 : : #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
450 : :
451 : : /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
452 : : SUBREG). */
453 : :
454 : : #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
455 : :
456 : : /* Get the quantity number for REG. */
457 : :
458 : : #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
459 : :
460 : : /* Determine if the quantity number for register X represents a valid index
461 : : into the qty_table. */
462 : :
463 : : #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
464 : :
465 : : /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
466 : :
467 : : #define CHEAPER(X, Y) \
468 : : (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
469 : :
470 : : static struct table_elt *table[HASH_SIZE];
471 : :
472 : : /* Chain of `struct table_elt's made so far for this function
473 : : but currently removed from the table. */
474 : :
475 : : static struct table_elt *free_element_chain;
476 : :
477 : : /* Trace a patch through the CFG. */
478 : :
479 : : struct branch_path
480 : : {
481 : : /* The basic block for this path entry. */
482 : : basic_block bb;
483 : : };
484 : :
485 : : /* This data describes a block that will be processed by
486 : : cse_extended_basic_block. */
487 : :
488 : : struct cse_basic_block_data
489 : : {
490 : : /* Total number of SETs in block. */
491 : : int nsets;
492 : : /* Size of current branch path, if any. */
493 : : int path_size;
494 : : /* Current path, indicating which basic_blocks will be processed. */
495 : : struct branch_path *path;
496 : : };
497 : :
498 : :
499 : : /* Pointers to the live in/live out bitmaps for the boundaries of the
500 : : current EBB. */
501 : : static bitmap cse_ebb_live_in, cse_ebb_live_out;
502 : :
503 : : /* A simple bitmap to track which basic blocks have been visited
504 : : already as part of an already processed extended basic block. */
505 : : static sbitmap cse_visited_basic_blocks;
506 : :
507 : : static bool fixed_base_plus_p (rtx x);
508 : : static int notreg_cost (rtx, machine_mode, enum rtx_code, int);
509 : : static int preferable (int, int, int, int);
510 : : static void new_basic_block (void);
511 : : static void make_new_qty (unsigned int, machine_mode);
512 : : static void make_regs_eqv (unsigned int, unsigned int);
513 : : static void delete_reg_equiv (unsigned int);
514 : : static bool mention_regs (rtx);
515 : : static bool insert_regs (rtx, struct table_elt *, bool);
516 : : static void remove_from_table (struct table_elt *, unsigned);
517 : : static void remove_pseudo_from_table (rtx, unsigned);
518 : : static struct table_elt *lookup (rtx, unsigned, machine_mode);
519 : : static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode);
520 : : static rtx lookup_as_function (rtx, enum rtx_code);
521 : : static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
522 : : machine_mode, int, int);
523 : : static struct table_elt *insert (rtx, struct table_elt *, unsigned,
524 : : machine_mode);
525 : : static void merge_equiv_classes (struct table_elt *, struct table_elt *);
526 : : static void invalidate (rtx, machine_mode);
527 : : static void remove_invalid_refs (unsigned int);
528 : : static void remove_invalid_subreg_refs (unsigned int, poly_uint64,
529 : : machine_mode);
530 : : static void rehash_using_reg (rtx);
531 : : static void invalidate_memory (void);
532 : : static rtx use_related_value (rtx, struct table_elt *);
533 : :
534 : : static inline unsigned canon_hash (rtx, machine_mode);
535 : : static inline unsigned safe_hash (rtx, machine_mode);
536 : : static inline unsigned hash_rtx_string (const char *);
537 : :
538 : : static rtx canon_reg (rtx, rtx_insn *);
539 : : static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
540 : : machine_mode *,
541 : : machine_mode *);
542 : : static rtx fold_rtx (rtx, rtx_insn *);
543 : : static rtx equiv_constant (rtx);
544 : : static void record_jump_equiv (rtx_insn *, bool);
545 : : static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx);
546 : : static void cse_insn (rtx_insn *);
547 : : static void cse_prescan_path (struct cse_basic_block_data *);
548 : : static void invalidate_from_clobbers (rtx_insn *);
549 : : static void invalidate_from_sets_and_clobbers (rtx_insn *);
550 : : static void cse_extended_basic_block (struct cse_basic_block_data *);
551 : : extern void dump_class (struct table_elt*);
552 : : static void get_cse_reg_info_1 (unsigned int regno);
553 : : static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
554 : :
555 : : static void flush_hash_table (void);
556 : : static bool insn_live_p (rtx_insn *, int *);
557 : : static bool set_live_p (rtx, int *);
558 : : static void cse_change_cc_mode_insn (rtx_insn *, rtx);
559 : : static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
560 : : static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
561 : : bool);
562 : :
563 : :
564 : : #undef RTL_HOOKS_GEN_LOWPART
565 : : #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
566 : :
567 : : static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
568 : :
569 : : /* Compute hash code of X in mode M. Special-case case where X is a pseudo
570 : : register (hard registers may require `do_not_record' to be set). */
571 : :
572 : : static inline unsigned
573 : 767726958 : HASH (rtx x, machine_mode mode)
574 : : {
575 : 499452405 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
576 : 1062746825 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
577 : 472707091 : : canon_hash (x, mode));
578 : 767726958 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
579 : : }
580 : :
581 : : /* Like HASH, but without side-effects. */
582 : :
583 : : static inline unsigned
584 : 208789770 : SAFE_HASH (rtx x, machine_mode mode)
585 : : {
586 : 106449010 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
587 : 269105356 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
588 : 148474184 : : safe_hash (x, mode));
589 : 208789770 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
590 : : }
591 : :
592 : : /* Nonzero if X has the form (PLUS frame-pointer integer). */
593 : :
594 : : static bool
595 : 214502147 : fixed_base_plus_p (rtx x)
596 : : {
597 : 243652992 : switch (GET_CODE (x))
598 : : {
599 : 127280953 : case REG:
600 : 127280953 : if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
601 : : return true;
602 : 113954766 : if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
603 : 112155 : return true;
604 : : return false;
605 : :
606 : 34509852 : case PLUS:
607 : 34509852 : if (!CONST_INT_P (XEXP (x, 1)))
608 : : return false;
609 : 29150845 : return fixed_base_plus_p (XEXP (x, 0));
610 : :
611 : : default:
612 : : return false;
613 : : }
614 : : }
615 : :
616 : : /* Dump the expressions in the equivalence class indicated by CLASSP.
617 : : This function is used only for debugging. */
618 : : DEBUG_FUNCTION void
619 : 0 : dump_class (struct table_elt *classp)
620 : : {
621 : 0 : struct table_elt *elt;
622 : :
623 : 0 : fprintf (stderr, "Equivalence chain for ");
624 : 0 : print_rtl (stderr, classp->exp);
625 : 0 : fprintf (stderr, ": \n");
626 : :
627 : 0 : for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
628 : : {
629 : 0 : print_rtl (stderr, elt->exp);
630 : 0 : fprintf (stderr, "\n");
631 : : }
632 : 0 : }
633 : :
634 : : /* Return an estimate of the cost of the registers used in an rtx.
635 : : This is mostly the number of different REG expressions in the rtx;
636 : : however for some exceptions like fixed registers we use a cost of
637 : : 0. If any other hard register reference occurs, return MAX_COST. */
638 : :
639 : : static int
640 : 395274432 : approx_reg_cost (const_rtx x)
641 : : {
642 : 395274432 : int cost = 0;
643 : 395274432 : subrtx_iterator::array_type array;
644 : 1242351974 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
645 : : {
646 : 898291710 : const_rtx x = *iter;
647 : 898291710 : if (REG_P (x))
648 : : {
649 : 371285391 : unsigned int regno = REGNO (x);
650 : 371285391 : if (!CHEAP_REGNO (regno))
651 : : {
652 : 51214168 : if (regno < FIRST_PSEUDO_REGISTER)
653 : : {
654 : 51214168 : if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
655 : 51214168 : return MAX_COST;
656 : 0 : cost += 2;
657 : : }
658 : : else
659 : 260075703 : cost += 1;
660 : : }
661 : : }
662 : : }
663 : 344060264 : return cost;
664 : 395274432 : }
665 : :
666 : : /* Return a negative value if an rtx A, whose costs are given by COST_A
667 : : and REGCOST_A, is more desirable than an rtx B.
668 : : Return a positive value if A is less desirable, or 0 if the two are
669 : : equally good. */
670 : : static int
671 : 604689222 : preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
672 : : {
673 : : /* First, get rid of cases involving expressions that are entirely
674 : : unwanted. */
675 : 604689222 : if (cost_a != cost_b)
676 : : {
677 : 565114684 : if (cost_a == MAX_COST)
678 : : return 1;
679 : 563619223 : if (cost_b == MAX_COST)
680 : : return -1;
681 : : }
682 : :
683 : : /* Avoid extending lifetimes of hardregs. */
684 : 156501505 : if (regcost_a != regcost_b)
685 : : {
686 : 86473333 : if (regcost_a == MAX_COST)
687 : : return 1;
688 : 67350617 : if (regcost_b == MAX_COST)
689 : : return -1;
690 : : }
691 : :
692 : : /* Normal operation costs take precedence. */
693 : 135517059 : if (cost_a != cost_b)
694 : 96041492 : return cost_a - cost_b;
695 : : /* Only if these are identical consider effects on register pressure. */
696 : 39475567 : if (regcost_a != regcost_b)
697 : 15079271 : return regcost_a - regcost_b;
698 : : return 0;
699 : : }
700 : :
701 : : /* Internal function, to compute cost when X is not a register; called
702 : : from COST macro to keep it simple. */
703 : :
704 : : static int
705 : 278493811 : notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno)
706 : : {
707 : 278493811 : scalar_int_mode int_mode, inner_mode;
708 : 278493811 : return ((GET_CODE (x) == SUBREG
709 : 5047762 : && REG_P (SUBREG_REG (x))
710 : 280394260 : && is_int_mode (mode, &int_mode)
711 : 4422917 : && is_int_mode (GET_MODE (SUBREG_REG (x)), &inner_mode)
712 : 7264096 : && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
713 : 3583043 : && subreg_lowpart_p (x)
714 : 2522468 : && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode))
715 : 554465154 : ? 0
716 : 275971343 : : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2);
717 : : }
718 : :
719 : :
720 : : /* Initialize CSE_REG_INFO_TABLE. */
721 : :
722 : : static void
723 : 2173619 : init_cse_reg_info (unsigned int nregs)
724 : : {
725 : : /* Do we need to grow the table? */
726 : 2173619 : if (nregs > cse_reg_info_table_size)
727 : : {
728 : 166175 : unsigned int new_size;
729 : :
730 : 166175 : if (cse_reg_info_table_size < 2048)
731 : : {
732 : : /* Compute a new size that is a power of 2 and no smaller
733 : : than the large of NREGS and 64. */
734 : 165485 : new_size = (cse_reg_info_table_size
735 : 165485 : ? cse_reg_info_table_size : 64);
736 : :
737 : 366299 : while (new_size < nregs)
738 : 200814 : new_size *= 2;
739 : : }
740 : : else
741 : : {
742 : : /* If we need a big table, allocate just enough to hold
743 : : NREGS registers. */
744 : : new_size = nregs;
745 : : }
746 : :
747 : : /* Reallocate the table with NEW_SIZE entries. */
748 : 166175 : free (cse_reg_info_table);
749 : 166175 : cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
750 : 166175 : cse_reg_info_table_size = new_size;
751 : 166175 : cse_reg_info_table_first_uninitialized = 0;
752 : : }
753 : :
754 : : /* Do we have all of the first NREGS entries initialized? */
755 : 2173619 : if (cse_reg_info_table_first_uninitialized < nregs)
756 : : {
757 : 299189 : unsigned int old_timestamp = cse_reg_info_timestamp - 1;
758 : 299189 : unsigned int i;
759 : :
760 : : /* Put the old timestamp on newly allocated entries so that they
761 : : will all be considered out of date. We do not touch those
762 : : entries beyond the first NREGS entries to be nice to the
763 : : virtual memory. */
764 : 31056123 : for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
765 : 30756934 : cse_reg_info_table[i].timestamp = old_timestamp;
766 : :
767 : 299189 : cse_reg_info_table_first_uninitialized = nregs;
768 : : }
769 : 2173619 : }
770 : :
771 : : /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
772 : :
773 : : static void
774 : 797663347 : get_cse_reg_info_1 (unsigned int regno)
775 : : {
776 : : /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
777 : : entry will be considered to have been initialized. */
778 : 797663347 : cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
779 : :
780 : : /* Initialize the rest of the entry. */
781 : 797663347 : cse_reg_info_table[regno].reg_tick = 1;
782 : 797663347 : cse_reg_info_table[regno].reg_in_table = -1;
783 : 797663347 : cse_reg_info_table[regno].subreg_ticked = -1;
784 : 797663347 : cse_reg_info_table[regno].reg_qty = -regno - 1;
785 : 797663347 : }
786 : :
787 : : /* Find a cse_reg_info entry for REGNO. */
788 : :
789 : : static inline struct cse_reg_info *
790 : 10405966409 : get_cse_reg_info (unsigned int regno)
791 : : {
792 : 10405966409 : struct cse_reg_info *p = &cse_reg_info_table[regno];
793 : :
794 : : /* If this entry has not been initialized, go ahead and initialize
795 : : it. */
796 : 10405966409 : if (p->timestamp != cse_reg_info_timestamp)
797 : 797663347 : get_cse_reg_info_1 (regno);
798 : :
799 : 10405966409 : return p;
800 : : }
801 : :
802 : : /* Clear the hash table and initialize each register with its own quantity,
803 : : for a new basic block. */
804 : :
805 : : static void
806 : 18656822 : new_basic_block (void)
807 : : {
808 : 18656822 : int i;
809 : :
810 : 18656822 : next_qty = 0;
811 : :
812 : : /* Invalidate cse_reg_info_table. */
813 : 18656822 : cse_reg_info_timestamp++;
814 : :
815 : : /* Clear out hash table state for this pass. */
816 : 18656822 : CLEAR_HARD_REG_SET (hard_regs_in_table);
817 : :
818 : : /* The per-quantity values used to be initialized here, but it is
819 : : much faster to initialize each as it is made in `make_new_qty'. */
820 : :
821 : 615675126 : for (i = 0; i < HASH_SIZE; i++)
822 : : {
823 : 597018304 : struct table_elt *first;
824 : :
825 : 597018304 : first = table[i];
826 : 597018304 : if (first != NULL)
827 : : {
828 : 122836519 : struct table_elt *last = first;
829 : :
830 : 122836519 : table[i] = NULL;
831 : :
832 : 173961272 : while (last->next_same_hash != NULL)
833 : : last = last->next_same_hash;
834 : :
835 : : /* Now relink this hash entire chain into
836 : : the free element list. */
837 : :
838 : 122836519 : last->next_same_hash = free_element_chain;
839 : 122836519 : free_element_chain = first;
840 : : }
841 : : }
842 : 18656822 : }
843 : :
844 : : /* Say that register REG contains a quantity in mode MODE not in any
845 : : register before and initialize that quantity. */
846 : :
847 : : static void
848 : 94126709 : make_new_qty (unsigned int reg, machine_mode mode)
849 : : {
850 : 94126709 : int q;
851 : 94126709 : struct qty_table_elem *ent;
852 : 94126709 : struct reg_eqv_elem *eqv;
853 : :
854 : 94126709 : gcc_assert (next_qty < max_qty);
855 : :
856 : 94126709 : q = REG_QTY (reg) = next_qty++;
857 : 94126709 : ent = &qty_table[q];
858 : 94126709 : ent->first_reg = reg;
859 : 94126709 : ent->last_reg = reg;
860 : 94126709 : ent->mode = mode;
861 : 94126709 : ent->const_rtx = ent->const_insn = NULL;
862 : 94126709 : ent->comparison_code = UNKNOWN;
863 : :
864 : 94126709 : eqv = ®_eqv_table[reg];
865 : 94126709 : eqv->next = eqv->prev = -1;
866 : 94126709 : }
867 : :
868 : : /* Make reg NEW equivalent to reg OLD.
869 : : OLD is not changing; NEW is. */
870 : :
871 : : static void
872 : 10427639 : make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
873 : : {
874 : 10427639 : unsigned int lastr, firstr;
875 : 10427639 : int q = REG_QTY (old_reg);
876 : 10427639 : struct qty_table_elem *ent;
877 : :
878 : 10427639 : ent = &qty_table[q];
879 : :
880 : : /* Nothing should become eqv until it has a "non-invalid" qty number. */
881 : 10427639 : gcc_assert (REGNO_QTY_VALID_P (old_reg));
882 : :
883 : 10427639 : REG_QTY (new_reg) = q;
884 : 10427639 : firstr = ent->first_reg;
885 : 10427639 : lastr = ent->last_reg;
886 : :
887 : : /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
888 : : hard regs. Among pseudos, if NEW will live longer than any other reg
889 : : of the same qty, and that is beyond the current basic block,
890 : : make it the new canonical replacement for this qty. */
891 : 305851 : if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
892 : : /* Certain fixed registers might be of the class NO_REGS. This means
893 : : that not only can they not be allocated by the compiler, but
894 : : they cannot be used in substitutions or canonicalizations
895 : : either. */
896 : 10121788 : && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
897 : 10432022 : && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
898 : 10117405 : || (new_reg >= FIRST_PSEUDO_REGISTER
899 : 10117405 : && (firstr < FIRST_PSEUDO_REGISTER
900 : 10117405 : || (bitmap_bit_p (cse_ebb_live_out, new_reg)
901 : 3051426 : && !bitmap_bit_p (cse_ebb_live_out, firstr))
902 : 8348815 : || (bitmap_bit_p (cse_ebb_live_in, new_reg)
903 : 369425 : && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
904 : : {
905 : 1844756 : reg_eqv_table[firstr].prev = new_reg;
906 : 1844756 : reg_eqv_table[new_reg].next = firstr;
907 : 1844756 : reg_eqv_table[new_reg].prev = -1;
908 : 1844756 : ent->first_reg = new_reg;
909 : : }
910 : : else
911 : : {
912 : : /* If NEW is a hard reg (known to be non-fixed), insert at end.
913 : : Otherwise, insert before any non-fixed hard regs that are at the
914 : : end. Registers of class NO_REGS cannot be used as an
915 : : equivalent for anything. */
916 : 288945 : while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
917 : 0 : && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
918 : 8582883 : && new_reg >= FIRST_PSEUDO_REGISTER)
919 : 0 : lastr = reg_eqv_table[lastr].prev;
920 : 8582883 : reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
921 : 8582883 : if (reg_eqv_table[lastr].next >= 0)
922 : 0 : reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
923 : : else
924 : 8582883 : qty_table[q].last_reg = new_reg;
925 : 8582883 : reg_eqv_table[lastr].next = new_reg;
926 : 8582883 : reg_eqv_table[new_reg].prev = lastr;
927 : : }
928 : 10427639 : }
929 : :
930 : : /* Remove REG from its equivalence class. */
931 : :
932 : : static void
933 : 1411589278 : delete_reg_equiv (unsigned int reg)
934 : : {
935 : 1411589278 : struct qty_table_elem *ent;
936 : 1411589278 : int q = REG_QTY (reg);
937 : 1411589278 : int p, n;
938 : :
939 : : /* If invalid, do nothing. */
940 : 1411589278 : if (! REGNO_QTY_VALID_P (reg))
941 : : return;
942 : :
943 : 16985662 : ent = &qty_table[q];
944 : :
945 : 16985662 : p = reg_eqv_table[reg].prev;
946 : 16985662 : n = reg_eqv_table[reg].next;
947 : :
948 : 16985662 : if (n != -1)
949 : 645430 : reg_eqv_table[n].prev = p;
950 : : else
951 : 16340232 : ent->last_reg = p;
952 : 16985662 : if (p != -1)
953 : 626495 : reg_eqv_table[p].next = n;
954 : : else
955 : 16359167 : ent->first_reg = n;
956 : :
957 : 16985662 : REG_QTY (reg) = -reg - 1;
958 : : }
959 : :
960 : : /* Remove any invalid expressions from the hash table
961 : : that refer to any of the registers contained in expression X.
962 : :
963 : : Make sure that newly inserted references to those registers
964 : : as subexpressions will be considered valid.
965 : :
966 : : mention_regs is not called when a register itself
967 : : is being stored in the table.
968 : :
969 : : Return true if we have done something that may have changed
970 : : the hash code of X. */
971 : :
972 : : static bool
973 : 417544549 : mention_regs (rtx x)
974 : : {
975 : 417544549 : enum rtx_code code;
976 : 417544549 : int i, j;
977 : 417544549 : const char *fmt;
978 : 417544549 : bool changed = false;
979 : :
980 : 417544549 : if (x == 0)
981 : : return false;
982 : :
983 : 417544549 : code = GET_CODE (x);
984 : 417544549 : if (code == REG)
985 : : {
986 : 125811421 : unsigned int regno = REGNO (x);
987 : 125811421 : unsigned int endregno = END_REGNO (x);
988 : 125811421 : unsigned int i;
989 : :
990 : 251622842 : for (i = regno; i < endregno; i++)
991 : : {
992 : 125811421 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
993 : 167410 : remove_invalid_refs (i);
994 : :
995 : 125811421 : REG_IN_TABLE (i) = REG_TICK (i);
996 : 125811421 : SUBREG_TICKED (i) = -1;
997 : : }
998 : :
999 : : return false;
1000 : : }
1001 : :
1002 : : /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1003 : : pseudo if they don't use overlapping words. We handle only pseudos
1004 : : here for simplicity. */
1005 : 6623897 : if (code == SUBREG && REG_P (SUBREG_REG (x))
1006 : 298349496 : && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1007 : : {
1008 : 6616255 : unsigned int i = REGNO (SUBREG_REG (x));
1009 : :
1010 : 6616255 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1011 : : {
1012 : : /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1013 : : the last store to this register really stored into this
1014 : : subreg, then remove the memory of this subreg.
1015 : : Otherwise, remove any memory of the entire register and
1016 : : all its subregs from the table. */
1017 : 296397 : if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1018 : 296397 : || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1019 : 296397 : remove_invalid_refs (i);
1020 : : else
1021 : 0 : remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1022 : : }
1023 : :
1024 : 6616255 : REG_IN_TABLE (i) = REG_TICK (i);
1025 : 6616255 : SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1026 : 6616255 : return false;
1027 : : }
1028 : :
1029 : : /* If X is a comparison or a COMPARE and either operand is a register
1030 : : that does not have a quantity, give it one. This is so that a later
1031 : : call to record_jump_equiv won't cause X to be assigned a different
1032 : : hash code and not found in the table after that call.
1033 : :
1034 : : It is not necessary to do this here, since rehash_using_reg can
1035 : : fix up the table later, but doing this here eliminates the need to
1036 : : call that expensive function in the most common case where the only
1037 : : use of the register is in the comparison. */
1038 : :
1039 : 285116873 : if (code == COMPARE || COMPARISON_P (x))
1040 : : {
1041 : 21160864 : if (REG_P (XEXP (x, 0))
1042 : 21160864 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1043 : 8101572 : if (insert_regs (XEXP (x, 0), NULL, false))
1044 : : {
1045 : 8101572 : rehash_using_reg (XEXP (x, 0));
1046 : 8101572 : changed = true;
1047 : : }
1048 : :
1049 : 21160864 : if (REG_P (XEXP (x, 1))
1050 : 21160864 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1051 : 2044565 : if (insert_regs (XEXP (x, 1), NULL, false))
1052 : : {
1053 : 2044565 : rehash_using_reg (XEXP (x, 1));
1054 : 2044565 : changed = true;
1055 : : }
1056 : : }
1057 : :
1058 : 285116873 : fmt = GET_RTX_FORMAT (code);
1059 : 741490841 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1060 : 456373968 : if (fmt[i] == 'e')
1061 : : {
1062 : 269485477 : if (mention_regs (XEXP (x, i)))
1063 : 456373968 : changed = true;
1064 : : }
1065 : 186888491 : else if (fmt[i] == 'E')
1066 : 13916562 : for (j = 0; j < XVECLEN (x, i); j++)
1067 : 10208962 : if (mention_regs (XVECEXP (x, i, j)))
1068 : 354017 : changed = true;
1069 : :
1070 : : return changed;
1071 : : }
1072 : :
1073 : : /* Update the register quantities for inserting X into the hash table
1074 : : with a value equivalent to CLASSP.
1075 : : (If the class does not contain a REG, it is irrelevant.)
1076 : : If MODIFIED is true, X is a destination; it is being modified.
1077 : : Note that delete_reg_equiv should be called on a register
1078 : : before insert_regs is done on that register with MODIFIED != 0.
1079 : :
1080 : : True value means that elements of reg_qty have changed
1081 : : so X's hash code may be different. */
1082 : :
1083 : : static bool
1084 : 227595495 : insert_regs (rtx x, struct table_elt *classp, bool modified)
1085 : : {
1086 : 227595495 : if (REG_P (x))
1087 : : {
1088 : 110537756 : unsigned int regno = REGNO (x);
1089 : 110537756 : int qty_valid;
1090 : :
1091 : : /* If REGNO is in the equivalence table already but is of the
1092 : : wrong mode for that equivalence, don't do anything here. */
1093 : :
1094 : 110537756 : qty_valid = REGNO_QTY_VALID_P (regno);
1095 : 110537756 : if (qty_valid)
1096 : : {
1097 : 5983408 : struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1098 : :
1099 : 5983408 : if (ent->mode != GET_MODE (x))
1100 : : return false;
1101 : : }
1102 : :
1103 : 110537756 : if (modified || ! qty_valid)
1104 : : {
1105 : 104554348 : if (classp)
1106 : 84829378 : for (classp = classp->first_same_value;
1107 : 167652512 : classp != 0;
1108 : 82823134 : classp = classp->next_same_value)
1109 : 93250773 : if (REG_P (classp->exp)
1110 : 10427639 : && GET_MODE (classp->exp) == GET_MODE (x))
1111 : : {
1112 : 10427639 : unsigned c_regno = REGNO (classp->exp);
1113 : :
1114 : 10427639 : gcc_assert (REGNO_QTY_VALID_P (c_regno));
1115 : :
1116 : : /* Suppose that 5 is hard reg and 100 and 101 are
1117 : : pseudos. Consider
1118 : :
1119 : : (set (reg:si 100) (reg:si 5))
1120 : : (set (reg:si 5) (reg:si 100))
1121 : : (set (reg:di 101) (reg:di 5))
1122 : :
1123 : : We would now set REG_QTY (101) = REG_QTY (5), but the
1124 : : entry for 5 is in SImode. When we use this later in
1125 : : copy propagation, we get the register in wrong mode. */
1126 : 10427639 : if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1127 : 0 : continue;
1128 : :
1129 : 10427639 : make_regs_eqv (regno, c_regno);
1130 : 10427639 : return true;
1131 : : }
1132 : :
1133 : : /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1134 : : than REG_IN_TABLE to find out if there was only a single preceding
1135 : : invalidation - for the SUBREG - or another one, which would be
1136 : : for the full register. However, if we find here that REG_TICK
1137 : : indicates that the register is invalid, it means that it has
1138 : : been invalidated in a separate operation. The SUBREG might be used
1139 : : now (then this is a recursive call), or we might use the full REG
1140 : : now and a SUBREG of it later. So bump up REG_TICK so that
1141 : : mention_regs will do the right thing. */
1142 : 94126709 : if (! modified
1143 : 19923887 : && REG_IN_TABLE (regno) >= 0
1144 : 95872960 : && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1145 : 134 : REG_TICK (regno)++;
1146 : 94126709 : make_new_qty (regno, GET_MODE (x));
1147 : 94126709 : return true;
1148 : : }
1149 : :
1150 : : return false;
1151 : : }
1152 : :
1153 : : /* If X is a SUBREG, we will likely be inserting the inner register in the
1154 : : table. If that register doesn't have an assigned quantity number at
1155 : : this point but does later, the insertion that we will be doing now will
1156 : : not be accessible because its hash code will have changed. So assign
1157 : : a quantity number now. */
1158 : :
1159 : 3071073 : else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1160 : 120124140 : && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1161 : : {
1162 : 1584135 : insert_regs (SUBREG_REG (x), NULL, false);
1163 : 1584135 : mention_regs (x);
1164 : 1584135 : return true;
1165 : : }
1166 : : else
1167 : 115473604 : return mention_regs (x);
1168 : : }
1169 : :
1170 : :
1171 : : /* Compute upper and lower anchors for CST. Also compute the offset of CST
1172 : : from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1173 : : CST is equal to an anchor. */
1174 : :
1175 : : static bool
1176 : 0 : compute_const_anchors (rtx cst,
1177 : : HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1178 : : HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1179 : : {
1180 : 0 : unsigned HOST_WIDE_INT n = UINTVAL (cst);
1181 : :
1182 : 0 : *lower_base = n & ~(targetm.const_anchor - 1);
1183 : 0 : if ((unsigned HOST_WIDE_INT) *lower_base == n)
1184 : : return false;
1185 : :
1186 : 0 : *upper_base = ((n + (targetm.const_anchor - 1))
1187 : 0 : & ~(targetm.const_anchor - 1));
1188 : 0 : *upper_offs = n - *upper_base;
1189 : 0 : *lower_offs = n - *lower_base;
1190 : 0 : return true;
1191 : : }
1192 : :
1193 : : /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1194 : :
1195 : : static void
1196 : 0 : insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1197 : : machine_mode mode)
1198 : : {
1199 : 0 : struct table_elt *elt;
1200 : 0 : unsigned hash;
1201 : 0 : rtx anchor_exp;
1202 : 0 : rtx exp;
1203 : :
1204 : 0 : anchor_exp = gen_int_mode (anchor, mode);
1205 : 0 : hash = HASH (anchor_exp, mode);
1206 : 0 : elt = lookup (anchor_exp, hash, mode);
1207 : 0 : if (!elt)
1208 : 0 : elt = insert (anchor_exp, NULL, hash, mode);
1209 : :
1210 : 0 : exp = plus_constant (mode, reg, offs);
1211 : : /* REG has just been inserted and the hash codes recomputed. */
1212 : 0 : mention_regs (exp);
1213 : 0 : hash = HASH (exp, mode);
1214 : :
1215 : : /* Use the cost of the register rather than the whole expression. When
1216 : : looking up constant anchors we will further offset the corresponding
1217 : : expression therefore it does not make sense to prefer REGs over
1218 : : reg-immediate additions. Prefer instead the oldest expression. Also
1219 : : don't prefer pseudos over hard regs so that we derive constants in
1220 : : argument registers from other argument registers rather than from the
1221 : : original pseudo that was used to synthesize the constant. */
1222 : 0 : insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1);
1223 : 0 : }
1224 : :
1225 : : /* The constant CST is equivalent to the register REG. Create
1226 : : equivalences between the two anchors of CST and the corresponding
1227 : : register-offset expressions using REG. */
1228 : :
1229 : : static void
1230 : 0 : insert_const_anchors (rtx reg, rtx cst, machine_mode mode)
1231 : : {
1232 : 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1233 : :
1234 : 0 : if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1235 : : &upper_base, &upper_offs))
1236 : 0 : return;
1237 : :
1238 : : /* Ignore anchors of value 0. Constants accessible from zero are
1239 : : simple. */
1240 : 0 : if (lower_base != 0)
1241 : 0 : insert_const_anchor (lower_base, reg, -lower_offs, mode);
1242 : :
1243 : 0 : if (upper_base != 0)
1244 : 0 : insert_const_anchor (upper_base, reg, -upper_offs, mode);
1245 : : }
1246 : :
1247 : : /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1248 : : ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1249 : : valid expression. Return the cheapest and oldest of such expressions. In
1250 : : *OLD, return how old the resulting expression is compared to the other
1251 : : equivalent expressions. */
1252 : :
1253 : : static rtx
1254 : 0 : find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1255 : : unsigned *old)
1256 : : {
1257 : 0 : struct table_elt *elt;
1258 : 0 : unsigned idx;
1259 : 0 : struct table_elt *match_elt;
1260 : 0 : rtx match;
1261 : :
1262 : : /* Find the cheapest and *oldest* expression to maximize the chance of
1263 : : reusing the same pseudo. */
1264 : :
1265 : 0 : match_elt = NULL;
1266 : 0 : match = NULL_RTX;
1267 : 0 : for (elt = anchor_elt->first_same_value, idx = 0;
1268 : 0 : elt;
1269 : 0 : elt = elt->next_same_value, idx++)
1270 : : {
1271 : 0 : if (match_elt && CHEAPER (match_elt, elt))
1272 : 0 : return match;
1273 : :
1274 : 0 : if (REG_P (elt->exp)
1275 : 0 : || (GET_CODE (elt->exp) == PLUS
1276 : 0 : && REG_P (XEXP (elt->exp, 0))
1277 : 0 : && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1278 : : {
1279 : 0 : rtx x;
1280 : :
1281 : : /* Ignore expressions that are no longer valid. */
1282 : 0 : if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1283 : 0 : continue;
1284 : :
1285 : 0 : x = plus_constant (GET_MODE (elt->exp), elt->exp, offs);
1286 : 0 : if (REG_P (x)
1287 : 0 : || (GET_CODE (x) == PLUS
1288 : 0 : && IN_RANGE (INTVAL (XEXP (x, 1)),
1289 : : -targetm.const_anchor,
1290 : : targetm.const_anchor - 1)))
1291 : : {
1292 : 0 : match = x;
1293 : 0 : match_elt = elt;
1294 : 0 : *old = idx;
1295 : : }
1296 : : }
1297 : : }
1298 : :
1299 : : return match;
1300 : : }
1301 : :
1302 : : /* Try to express the constant SRC_CONST using a register+offset expression
1303 : : derived from a constant anchor. Return it if successful or NULL_RTX,
1304 : : otherwise. */
1305 : :
1306 : : static rtx
1307 : 0 : try_const_anchors (rtx src_const, machine_mode mode)
1308 : : {
1309 : 0 : struct table_elt *lower_elt, *upper_elt;
1310 : 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1311 : 0 : rtx lower_anchor_rtx, upper_anchor_rtx;
1312 : 0 : rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1313 : 0 : unsigned lower_old, upper_old;
1314 : :
1315 : : /* CONST_INT may be in various modes, avoid non-scalar-int mode. */
1316 : 0 : if (!SCALAR_INT_MODE_P (mode))
1317 : : return NULL_RTX;
1318 : :
1319 : 0 : if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1320 : : &upper_base, &upper_offs))
1321 : : return NULL_RTX;
1322 : :
1323 : 0 : lower_anchor_rtx = GEN_INT (lower_base);
1324 : 0 : upper_anchor_rtx = GEN_INT (upper_base);
1325 : 0 : lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1326 : 0 : upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1327 : :
1328 : 0 : if (lower_elt)
1329 : 0 : lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1330 : 0 : if (upper_elt)
1331 : 0 : upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1332 : :
1333 : 0 : if (!lower_exp)
1334 : : return upper_exp;
1335 : 0 : if (!upper_exp)
1336 : : return lower_exp;
1337 : :
1338 : : /* Return the older expression. */
1339 : 0 : return (upper_old > lower_old ? upper_exp : lower_exp);
1340 : : }
1341 : :
1342 : : /* Look in or update the hash table. */
1343 : :
1344 : : /* Remove table element ELT from use in the table.
1345 : : HASH is its hash code, made using the HASH macro.
1346 : : It's an argument because often that is known in advance
1347 : : and we save much time not recomputing it. */
1348 : :
1349 : : static void
1350 : 62912496 : remove_from_table (struct table_elt *elt, unsigned int hash)
1351 : : {
1352 : 62912496 : if (elt == 0)
1353 : : return;
1354 : :
1355 : : /* Mark this element as removed. See cse_insn. */
1356 : 62912496 : elt->first_same_value = 0;
1357 : :
1358 : : /* Remove the table element from its equivalence class. */
1359 : :
1360 : 62912496 : {
1361 : 62912496 : struct table_elt *prev = elt->prev_same_value;
1362 : 62912496 : struct table_elt *next = elt->next_same_value;
1363 : :
1364 : 62912496 : if (next)
1365 : 6916166 : next->prev_same_value = prev;
1366 : :
1367 : 62912496 : if (prev)
1368 : 40476993 : prev->next_same_value = next;
1369 : : else
1370 : : {
1371 : : struct table_elt *newfirst = next;
1372 : 29169467 : while (next)
1373 : : {
1374 : 6733964 : next->first_same_value = newfirst;
1375 : 6733964 : next = next->next_same_value;
1376 : : }
1377 : : }
1378 : : }
1379 : :
1380 : : /* Remove the table element from its hash bucket. */
1381 : :
1382 : 62912496 : {
1383 : 62912496 : struct table_elt *prev = elt->prev_same_hash;
1384 : 62912496 : struct table_elt *next = elt->next_same_hash;
1385 : :
1386 : 62912496 : if (next)
1387 : 18860189 : next->prev_same_hash = prev;
1388 : :
1389 : 62912496 : if (prev)
1390 : 7826304 : prev->next_same_hash = next;
1391 : 55086192 : else if (table[hash] == elt)
1392 : 55086175 : table[hash] = next;
1393 : : else
1394 : : {
1395 : : /* This entry is not in the proper hash bucket. This can happen
1396 : : when two classes were merged by `merge_equiv_classes'. Search
1397 : : for the hash bucket that it heads. This happens only very
1398 : : rarely, so the cost is acceptable. */
1399 : 561 : for (hash = 0; hash < HASH_SIZE; hash++)
1400 : 544 : if (table[hash] == elt)
1401 : 17 : table[hash] = next;
1402 : : }
1403 : : }
1404 : :
1405 : : /* Remove the table element from its related-value circular chain. */
1406 : :
1407 : 62912496 : if (elt->related_value != 0 && elt->related_value != elt)
1408 : : {
1409 : : struct table_elt *p = elt->related_value;
1410 : :
1411 : 141790 : while (p->related_value != elt)
1412 : : p = p->related_value;
1413 : 25498 : p->related_value = elt->related_value;
1414 : 25498 : if (p->related_value == p)
1415 : 19343 : p->related_value = 0;
1416 : : }
1417 : :
1418 : : /* Now add it to the free element chain. */
1419 : 62912496 : elt->next_same_hash = free_element_chain;
1420 : 62912496 : free_element_chain = elt;
1421 : : }
1422 : :
1423 : : /* Same as above, but X is a pseudo-register. */
1424 : :
1425 : : static void
1426 : 84066303 : remove_pseudo_from_table (rtx x, unsigned int hash)
1427 : : {
1428 : 84066303 : struct table_elt *elt;
1429 : :
1430 : : /* Because a pseudo-register can be referenced in more than one
1431 : : mode, we might have to remove more than one table entry. */
1432 : 88171981 : while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1433 : 4105678 : remove_from_table (elt, hash);
1434 : 84066303 : }
1435 : :
1436 : : /* Look up X in the hash table and return its table element,
1437 : : or 0 if X is not in the table.
1438 : :
1439 : : MODE is the machine-mode of X, or if X is an integer constant
1440 : : with VOIDmode then MODE is the mode with which X will be used.
1441 : :
1442 : : Here we are satisfied to find an expression whose tree structure
1443 : : looks like X. */
1444 : :
1445 : : static struct table_elt *
1446 : 448802898 : lookup (rtx x, unsigned int hash, machine_mode mode)
1447 : : {
1448 : 448802898 : struct table_elt *p;
1449 : :
1450 : 671022444 : for (p = table[hash]; p; p = p->next_same_hash)
1451 : 339844990 : if (mode == p->mode && ((x == p->exp && REG_P (x))
1452 : 135236855 : || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1453 : 117625444 : return p;
1454 : :
1455 : : return 0;
1456 : : }
1457 : :
1458 : : /* Like `lookup' but don't care whether the table element uses invalid regs.
1459 : : Also ignore discrepancies in the machine mode of a register. */
1460 : :
1461 : : static struct table_elt *
1462 : 88171981 : lookup_for_remove (rtx x, unsigned int hash, machine_mode mode)
1463 : : {
1464 : 88171981 : struct table_elt *p;
1465 : :
1466 : 88171981 : if (REG_P (x))
1467 : : {
1468 : 88171981 : unsigned int regno = REGNO (x);
1469 : :
1470 : : /* Don't check the machine mode when comparing registers;
1471 : : invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1472 : 163348384 : for (p = table[hash]; p; p = p->next_same_hash)
1473 : 79282081 : if (REG_P (p->exp)
1474 : 79282081 : && REGNO (p->exp) == regno)
1475 : 4105678 : return p;
1476 : : }
1477 : : else
1478 : : {
1479 : 0 : for (p = table[hash]; p; p = p->next_same_hash)
1480 : 0 : if (mode == p->mode
1481 : 0 : && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1482 : 0 : return p;
1483 : : }
1484 : :
1485 : : return 0;
1486 : : }
1487 : :
1488 : : /* Look for an expression equivalent to X and with code CODE.
1489 : : If one is found, return that expression. */
1490 : :
1491 : : static rtx
1492 : 53877539 : lookup_as_function (rtx x, enum rtx_code code)
1493 : : {
1494 : 53877539 : struct table_elt *p
1495 : 53877539 : = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1496 : :
1497 : 53877539 : if (p == 0)
1498 : : return 0;
1499 : :
1500 : 36039440 : for (p = p->first_same_value; p; p = p->next_same_value)
1501 : 25094831 : if (GET_CODE (p->exp) == code
1502 : : /* Make sure this is a valid entry in the table. */
1503 : 25094831 : && exp_equiv_p (p->exp, p->exp, 1, false))
1504 : 871006 : return p->exp;
1505 : :
1506 : : return 0;
1507 : : }
1508 : :
1509 : : /* Insert X in the hash table, assuming HASH is its hash code and
1510 : : CLASSP is an element of the class it should go in (or 0 if a new
1511 : : class should be made). COST is the code of X and reg_cost is the
1512 : : cost of registers in X. It is inserted at the proper position to
1513 : : keep the class in the order cheapest first.
1514 : :
1515 : : MODE is the machine-mode of X, or if X is an integer constant
1516 : : with VOIDmode then MODE is the mode with which X will be used.
1517 : :
1518 : : For elements of equal cheapness, the most recent one
1519 : : goes in front, except that the first element in the list
1520 : : remains first unless a cheaper element is added. The order of
1521 : : pseudo-registers does not matter, as canon_reg will be called to
1522 : : find the cheapest when a register is retrieved from the table.
1523 : :
1524 : : The in_memory field in the hash table element is set to 0.
1525 : : The caller must set it nonzero if appropriate.
1526 : :
1527 : : You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1528 : : and if insert_regs returns a nonzero value
1529 : : you must then recompute its hash code before calling here.
1530 : :
1531 : : If necessary, update table showing constant values of quantities. */
1532 : :
1533 : : static struct table_elt *
1534 : 237324319 : insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1535 : : machine_mode mode, int cost, int reg_cost)
1536 : : {
1537 : 237324319 : struct table_elt *elt;
1538 : :
1539 : : /* If X is a register and we haven't made a quantity for it,
1540 : : something is wrong. */
1541 : 237324319 : gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1542 : :
1543 : : /* If X is a hard register, show it is being put in the table. */
1544 : 237324319 : if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1545 : 19709954 : add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1546 : :
1547 : : /* Put an element for X into the right hash bucket. */
1548 : :
1549 : 237324319 : elt = free_element_chain;
1550 : 237324319 : if (elt)
1551 : 232700698 : free_element_chain = elt->next_same_hash;
1552 : : else
1553 : 4623621 : elt = XNEW (struct table_elt);
1554 : :
1555 : 237324319 : elt->exp = x;
1556 : 237324319 : elt->canon_exp = NULL_RTX;
1557 : 237324319 : elt->cost = cost;
1558 : 237324319 : elt->regcost = reg_cost;
1559 : 237324319 : elt->next_same_value = 0;
1560 : 237324319 : elt->prev_same_value = 0;
1561 : 237324319 : elt->next_same_hash = table[hash];
1562 : 237324319 : elt->prev_same_hash = 0;
1563 : 237324319 : elt->related_value = 0;
1564 : 237324319 : elt->in_memory = 0;
1565 : 237324319 : elt->mode = mode;
1566 : 237324319 : elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1567 : :
1568 : 237324319 : if (table[hash])
1569 : 75009779 : table[hash]->prev_same_hash = elt;
1570 : 237324319 : table[hash] = elt;
1571 : :
1572 : : /* Put it into the proper value-class. */
1573 : 237324319 : if (classp)
1574 : : {
1575 : 115872146 : classp = classp->first_same_value;
1576 : 115872146 : if (CHEAPER (elt, classp))
1577 : : /* Insert at the head of the class. */
1578 : : {
1579 : 54339055 : struct table_elt *p;
1580 : 54339055 : elt->next_same_value = classp;
1581 : 54339055 : classp->prev_same_value = elt;
1582 : 54339055 : elt->first_same_value = elt;
1583 : :
1584 : 114962248 : for (p = classp; p; p = p->next_same_value)
1585 : 60623193 : p->first_same_value = elt;
1586 : : }
1587 : : else
1588 : : {
1589 : : /* Insert not at head of the class. */
1590 : : /* Put it after the last element cheaper than X. */
1591 : : struct table_elt *p, *next;
1592 : :
1593 : : for (p = classp;
1594 : 134113006 : (next = p->next_same_value) && CHEAPER (next, elt);
1595 : : p = next)
1596 : : ;
1597 : :
1598 : : /* Put it after P and before NEXT. */
1599 : 61533091 : elt->next_same_value = next;
1600 : 61533091 : if (next)
1601 : 15074941 : next->prev_same_value = elt;
1602 : :
1603 : 61533091 : elt->prev_same_value = p;
1604 : 61533091 : p->next_same_value = elt;
1605 : 61533091 : elt->first_same_value = classp;
1606 : : }
1607 : : }
1608 : : else
1609 : 121452173 : elt->first_same_value = elt;
1610 : :
1611 : : /* If this is a constant being set equivalent to a register or a register
1612 : : being set equivalent to a constant, note the constant equivalence.
1613 : :
1614 : : If this is a constant, it cannot be equivalent to a different constant,
1615 : : and a constant is the only thing that can be cheaper than a register. So
1616 : : we know the register is the head of the class (before the constant was
1617 : : inserted).
1618 : :
1619 : : If this is a register that is not already known equivalent to a
1620 : : constant, we must check the entire class.
1621 : :
1622 : : If this is a register that is already known equivalent to an insn,
1623 : : update the qtys `const_insn' to show that `this_insn' is the latest
1624 : : insn making that quantity equivalent to the constant. */
1625 : :
1626 : 237324319 : if (elt->is_const && classp && REG_P (classp->exp)
1627 : 3020360 : && !REG_P (x))
1628 : : {
1629 : 3018173 : int exp_q = REG_QTY (REGNO (classp->exp));
1630 : 3018173 : struct qty_table_elem *exp_ent = &qty_table[exp_q];
1631 : :
1632 : 3018173 : exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1633 : 3018173 : exp_ent->const_insn = this_insn;
1634 : 3018173 : }
1635 : :
1636 : 234306146 : else if (REG_P (x)
1637 : 98807484 : && classp
1638 : 84838210 : && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1639 : 315090967 : && ! elt->is_const)
1640 : : {
1641 : : struct table_elt *p;
1642 : :
1643 : 183012525 : for (p = classp; p != 0; p = p->next_same_value)
1644 : : {
1645 : 115404106 : if (p->is_const && !REG_P (p->exp))
1646 : : {
1647 : 13174194 : int x_q = REG_QTY (REGNO (x));
1648 : 13174194 : struct qty_table_elem *x_ent = &qty_table[x_q];
1649 : :
1650 : 13174194 : x_ent->const_rtx
1651 : 13174194 : = gen_lowpart (GET_MODE (x), p->exp);
1652 : 13174194 : x_ent->const_insn = this_insn;
1653 : 13174194 : break;
1654 : : }
1655 : : }
1656 : : }
1657 : :
1658 : 153523533 : else if (REG_P (x)
1659 : 18024871 : && qty_table[REG_QTY (REGNO (x))].const_rtx
1660 : 157576923 : && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1661 : 4053390 : qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1662 : :
1663 : : /* If this is a constant with symbolic value,
1664 : : and it has a term with an explicit integer value,
1665 : : link it up with related expressions. */
1666 : 237324319 : if (GET_CODE (x) == CONST)
1667 : : {
1668 : 730537 : rtx subexp = get_related_value (x);
1669 : 730537 : unsigned subhash;
1670 : 730537 : struct table_elt *subelt, *subelt_prev;
1671 : :
1672 : 730537 : if (subexp != 0)
1673 : : {
1674 : : /* Get the integer-free subexpression in the hash table. */
1675 : 716789 : subhash = SAFE_HASH (subexp, mode);
1676 : 716789 : subelt = lookup (subexp, subhash, mode);
1677 : 716789 : if (subelt == 0)
1678 : 331461 : subelt = insert (subexp, NULL, subhash, mode);
1679 : : /* Initialize SUBELT's circular chain if it has none. */
1680 : 716789 : if (subelt->related_value == 0)
1681 : 492248 : subelt->related_value = subelt;
1682 : : /* Find the element in the circular chain that precedes SUBELT. */
1683 : 716789 : subelt_prev = subelt;
1684 : 2069383 : while (subelt_prev->related_value != subelt)
1685 : : subelt_prev = subelt_prev->related_value;
1686 : : /* Put new ELT into SUBELT's circular chain just before SUBELT.
1687 : : This way the element that follows SUBELT is the oldest one. */
1688 : 716789 : elt->related_value = subelt_prev->related_value;
1689 : 716789 : subelt_prev->related_value = elt;
1690 : : }
1691 : : }
1692 : :
1693 : 237324319 : return elt;
1694 : : }
1695 : :
1696 : : /* Wrap insert_with_costs by passing the default costs. */
1697 : :
1698 : : static struct table_elt *
1699 : 237324319 : insert (rtx x, struct table_elt *classp, unsigned int hash,
1700 : : machine_mode mode)
1701 : : {
1702 : 474648638 : return insert_with_costs (x, classp, hash, mode,
1703 : 237324319 : COST (x, mode), approx_reg_cost (x));
1704 : : }
1705 : :
1706 : :
1707 : : /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1708 : : CLASS2 into CLASS1. This is done when we have reached an insn which makes
1709 : : the two classes equivalent.
1710 : :
1711 : : CLASS1 will be the surviving class; CLASS2 should not be used after this
1712 : : call.
1713 : :
1714 : : Any invalid entries in CLASS2 will not be copied. */
1715 : :
1716 : : static void
1717 : 4759153 : merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1718 : : {
1719 : 4759153 : struct table_elt *elt, *next, *new_elt;
1720 : :
1721 : : /* Ensure we start with the head of the classes. */
1722 : 4759153 : class1 = class1->first_same_value;
1723 : 4759153 : class2 = class2->first_same_value;
1724 : :
1725 : : /* If they were already equal, forget it. */
1726 : 4759153 : if (class1 == class2)
1727 : : return;
1728 : :
1729 : 11294938 : for (elt = class2; elt; elt = next)
1730 : : {
1731 : 6535785 : unsigned int hash;
1732 : 6535785 : rtx exp = elt->exp;
1733 : 6535785 : machine_mode mode = elt->mode;
1734 : :
1735 : 6535785 : next = elt->next_same_value;
1736 : :
1737 : : /* Remove old entry, make a new one in CLASS1's class.
1738 : : Don't do this for invalid entries as we cannot find their
1739 : : hash code (it also isn't necessary). */
1740 : 6535785 : if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1741 : : {
1742 : 6535731 : bool need_rehash = false;
1743 : :
1744 : 6535731 : hash_arg_in_memory = 0;
1745 : 6535731 : hash = HASH (exp, mode);
1746 : :
1747 : 6535731 : if (REG_P (exp))
1748 : : {
1749 : 1758850 : need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1750 : 1758850 : delete_reg_equiv (REGNO (exp));
1751 : : }
1752 : :
1753 : 6535731 : if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1754 : 1758282 : remove_pseudo_from_table (exp, hash);
1755 : : else
1756 : 4777449 : remove_from_table (elt, hash);
1757 : :
1758 : 6535731 : if (insert_regs (exp, class1, false) || need_rehash)
1759 : : {
1760 : 1758850 : rehash_using_reg (exp);
1761 : 1758850 : hash = HASH (exp, mode);
1762 : : }
1763 : 6535731 : new_elt = insert (exp, class1, hash, mode);
1764 : 6535731 : new_elt->in_memory = hash_arg_in_memory;
1765 : 6535731 : if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST)
1766 : 0 : new_elt->cost = MAX_COST;
1767 : : }
1768 : : }
1769 : : }
1770 : :
1771 : : /* Flush the entire hash table. */
1772 : :
1773 : : static void
1774 : 3827 : flush_hash_table (void)
1775 : : {
1776 : 3827 : int i;
1777 : 3827 : struct table_elt *p;
1778 : :
1779 : 126291 : for (i = 0; i < HASH_SIZE; i++)
1780 : 920422 : for (p = table[i]; p; p = table[i])
1781 : : {
1782 : : /* Note that invalidate can remove elements
1783 : : after P in the current hash chain. */
1784 : 797958 : if (REG_P (p->exp))
1785 : 363921 : invalidate (p->exp, VOIDmode);
1786 : : else
1787 : 434037 : remove_from_table (p, i);
1788 : : }
1789 : 3827 : }
1790 : :
1791 : : /* Check whether an anti dependence exists between X and EXP. MODE and
1792 : : ADDR are as for canon_anti_dependence. */
1793 : :
1794 : : static bool
1795 : 168452277 : check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr)
1796 : : {
1797 : 168452277 : subrtx_iterator::array_type array;
1798 : 795603758 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
1799 : : {
1800 : 634662664 : const_rtx x = *iter;
1801 : 634662664 : if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr))
1802 : 7511183 : return true;
1803 : : }
1804 : 160941094 : return false;
1805 : 168452277 : }
1806 : :
1807 : : /* Remove from the hash table, or mark as invalid, all expressions whose
1808 : : values could be altered by storing in register X. */
1809 : :
1810 : : static void
1811 : 202393676 : invalidate_reg (rtx x)
1812 : : {
1813 : 202393676 : gcc_assert (GET_CODE (x) == REG);
1814 : :
1815 : : /* If X is a register, dependencies on its contents are recorded
1816 : : through the qty number mechanism. Just change the qty number of
1817 : : the register, mark it as invalid for expressions that refer to it,
1818 : : and remove it itself. */
1819 : 202393676 : unsigned int regno = REGNO (x);
1820 : 202393676 : unsigned int hash = HASH (x, GET_MODE (x));
1821 : :
1822 : : /* Remove REGNO from any quantity list it might be on and indicate
1823 : : that its value might have changed. If it is a pseudo, remove its
1824 : : entry from the hash table.
1825 : :
1826 : : For a hard register, we do the first two actions above for any
1827 : : additional hard registers corresponding to X. Then, if any of these
1828 : : registers are in the table, we must remove any REG entries that
1829 : : overlap these registers. */
1830 : :
1831 : 202393676 : delete_reg_equiv (regno);
1832 : 202393676 : REG_TICK (regno)++;
1833 : 202393676 : SUBREG_TICKED (regno) = -1;
1834 : :
1835 : 202393676 : if (regno >= FIRST_PSEUDO_REGISTER)
1836 : 82308021 : remove_pseudo_from_table (x, hash);
1837 : : else
1838 : : {
1839 : 120085655 : HOST_WIDE_INT in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1840 : 120085655 : unsigned int endregno = END_REGNO (x);
1841 : 120085655 : unsigned int rn;
1842 : 120085655 : struct table_elt *p, *next;
1843 : :
1844 : 120085655 : CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1845 : :
1846 : 120660914 : for (rn = regno + 1; rn < endregno; rn++)
1847 : : {
1848 : 575259 : in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1849 : 575259 : CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1850 : 575259 : delete_reg_equiv (rn);
1851 : 575259 : REG_TICK (rn)++;
1852 : 575259 : SUBREG_TICKED (rn) = -1;
1853 : : }
1854 : :
1855 : 120085655 : if (in_table)
1856 : 365065404 : for (hash = 0; hash < HASH_SIZE; hash++)
1857 : 573460998 : for (p = table[hash]; p; p = next)
1858 : : {
1859 : 219458182 : next = p->next_same_hash;
1860 : :
1861 : 219458182 : if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1862 : 210160503 : continue;
1863 : :
1864 : 9297679 : unsigned int tregno = REGNO (p->exp);
1865 : 9297679 : unsigned int tendregno = END_REGNO (p->exp);
1866 : 9297679 : if (tendregno > regno && tregno < endregno)
1867 : 9232370 : remove_from_table (p, hash);
1868 : : }
1869 : : }
1870 : 202393676 : }
1871 : :
1872 : : /* Remove from the hash table, or mark as invalid, all expressions whose
1873 : : values could be altered by storing in X. X is a register, a subreg, or
1874 : : a memory reference with nonvarying address (because, when a memory
1875 : : reference with a varying address is stored in, all memory references are
1876 : : removed by invalidate_memory so specific invalidation is superfluous).
1877 : : FULL_MODE, if not VOIDmode, indicates that this much should be
1878 : : invalidated instead of just the amount indicated by the mode of X. This
1879 : : is only used for bitfield stores into memory.
1880 : :
1881 : : A nonvarying address may be just a register or just a symbol reference,
1882 : : or it may be either of those plus a numeric offset. */
1883 : :
1884 : : static void
1885 : 228533876 : invalidate (rtx x, machine_mode full_mode)
1886 : : {
1887 : 229854331 : int i;
1888 : 229854331 : struct table_elt *p;
1889 : 229854331 : rtx addr;
1890 : :
1891 : 229854331 : switch (GET_CODE (x))
1892 : : {
1893 : 202393676 : case REG:
1894 : 202393676 : invalidate_reg (x);
1895 : 202393676 : return;
1896 : :
1897 : 1277670 : case SUBREG:
1898 : 1277670 : invalidate (SUBREG_REG (x), VOIDmode);
1899 : 1277670 : return;
1900 : :
1901 : 23512 : case PARALLEL:
1902 : 66297 : for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1903 : 42785 : invalidate (XVECEXP (x, 0, i), VOIDmode);
1904 : : return;
1905 : :
1906 : 42785 : case EXPR_LIST:
1907 : : /* This is part of a disjoint return value; extract the location in
1908 : : question ignoring the offset. */
1909 : 42785 : invalidate (XEXP (x, 0), VOIDmode);
1910 : 42785 : return;
1911 : :
1912 : 26116688 : case MEM:
1913 : 26116688 : addr = canon_rtx (get_addr (XEXP (x, 0)));
1914 : : /* Calculate the canonical version of X here so that
1915 : : true_dependence doesn't generate new RTL for X on each call. */
1916 : 26116688 : x = canon_rtx (x);
1917 : :
1918 : : /* Remove all hash table elements that refer to overlapping pieces of
1919 : : memory. */
1920 : 26116688 : if (full_mode == VOIDmode)
1921 : 26115666 : full_mode = GET_MODE (x);
1922 : :
1923 : 861850704 : for (i = 0; i < HASH_SIZE; i++)
1924 : : {
1925 : 835734016 : struct table_elt *next;
1926 : :
1927 : 1711383044 : for (p = table[i]; p; p = next)
1928 : : {
1929 : 875649028 : next = p->next_same_hash;
1930 : 875649028 : if (p->in_memory)
1931 : : {
1932 : : /* Just canonicalize the expression once;
1933 : : otherwise each time we call invalidate
1934 : : true_dependence will canonicalize the
1935 : : expression again. */
1936 : 168452277 : if (!p->canon_exp)
1937 : 24654095 : p->canon_exp = canon_rtx (p->exp);
1938 : 168452277 : if (check_dependence (p->canon_exp, x, full_mode, addr))
1939 : 7511183 : remove_from_table (p, i);
1940 : : }
1941 : : }
1942 : : }
1943 : : return;
1944 : :
1945 : 0 : default:
1946 : 0 : gcc_unreachable ();
1947 : : }
1948 : : }
1949 : :
1950 : : /* Invalidate DEST. Used when DEST is not going to be added
1951 : : into the hash table for some reason, e.g. do_not_record
1952 : : flagged on it. */
1953 : :
1954 : : static void
1955 : 51190967 : invalidate_dest (rtx dest)
1956 : : {
1957 : 51190967 : if (REG_P (dest)
1958 : 24427971 : || GET_CODE (dest) == SUBREG
1959 : 24427971 : || MEM_P (dest))
1960 : 33270073 : invalidate (dest, VOIDmode);
1961 : 17920894 : else if (GET_CODE (dest) == STRICT_LOW_PART
1962 : 17920894 : || GET_CODE (dest) == ZERO_EXTRACT)
1963 : 1030 : invalidate (XEXP (dest, 0), GET_MODE (dest));
1964 : 51190967 : }
1965 : :
1966 : : /* Remove all expressions that refer to register REGNO,
1967 : : since they are already invalid, and we are about to
1968 : : mark that register valid again and don't want the old
1969 : : expressions to reappear as valid. */
1970 : :
1971 : : static void
1972 : 12260677 : remove_invalid_refs (unsigned int regno)
1973 : : {
1974 : 12260677 : unsigned int i;
1975 : 12260677 : struct table_elt *p, *next;
1976 : :
1977 : 404602341 : for (i = 0; i < HASH_SIZE; i++)
1978 : 634865952 : for (p = table[i]; p; p = next)
1979 : : {
1980 : 242524288 : next = p->next_same_hash;
1981 : 242524288 : if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp))
1982 : 15594904 : remove_from_table (p, i);
1983 : : }
1984 : 12260677 : }
1985 : :
1986 : : /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1987 : : and mode MODE. */
1988 : : static void
1989 : 0 : remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset,
1990 : : machine_mode mode)
1991 : : {
1992 : 0 : unsigned int i;
1993 : 0 : struct table_elt *p, *next;
1994 : :
1995 : 0 : for (i = 0; i < HASH_SIZE; i++)
1996 : 0 : for (p = table[i]; p; p = next)
1997 : : {
1998 : 0 : rtx exp = p->exp;
1999 : 0 : next = p->next_same_hash;
2000 : :
2001 : 0 : if (!REG_P (exp)
2002 : 0 : && (GET_CODE (exp) != SUBREG
2003 : 0 : || !REG_P (SUBREG_REG (exp))
2004 : 0 : || REGNO (SUBREG_REG (exp)) != regno
2005 : 0 : || ranges_maybe_overlap_p (SUBREG_BYTE (exp),
2006 : 0 : GET_MODE_SIZE (GET_MODE (exp)),
2007 : 0 : offset, GET_MODE_SIZE (mode)))
2008 : 0 : && refers_to_regno_p (regno, p->exp))
2009 : 0 : remove_from_table (p, i);
2010 : : }
2011 : 0 : }
2012 : :
2013 : : /* Recompute the hash codes of any valid entries in the hash table that
2014 : : reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2015 : :
2016 : : This is called when we make a jump equivalence. */
2017 : :
2018 : : static void
2019 : 113300271 : rehash_using_reg (rtx x)
2020 : : {
2021 : 113300271 : unsigned int i;
2022 : 113300271 : struct table_elt *p, *next;
2023 : 113300271 : unsigned hash;
2024 : :
2025 : 113300271 : if (GET_CODE (x) == SUBREG)
2026 : 1584135 : x = SUBREG_REG (x);
2027 : :
2028 : : /* If X is not a register or if the register is known not to be in any
2029 : : valid entries in the table, we have no work to do. */
2030 : :
2031 : 113300271 : if (!REG_P (x)
2032 : 104554348 : || REG_IN_TABLE (REGNO (x)) < 0
2033 : 117646100 : || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2034 : 108954564 : return;
2035 : :
2036 : : /* Scan all hash chains looking for valid entries that mention X.
2037 : : If we find one and it is in the wrong hash chain, move it. */
2038 : :
2039 : 143408331 : for (i = 0; i < HASH_SIZE; i++)
2040 : 233874827 : for (p = table[i]; p; p = next)
2041 : : {
2042 : 94812203 : next = p->next_same_hash;
2043 : 94812203 : if (reg_mentioned_p (x, p->exp)
2044 : 4100391 : && exp_equiv_p (p->exp, p->exp, 1, false)
2045 : 98912382 : && i != (hash = SAFE_HASH (p->exp, p->mode)))
2046 : : {
2047 : 2899990 : if (p->next_same_hash)
2048 : 968330 : p->next_same_hash->prev_same_hash = p->prev_same_hash;
2049 : :
2050 : 2899990 : if (p->prev_same_hash)
2051 : 553398 : p->prev_same_hash->next_same_hash = p->next_same_hash;
2052 : : else
2053 : 2346592 : table[i] = p->next_same_hash;
2054 : :
2055 : 2899990 : p->next_same_hash = table[hash];
2056 : 2899990 : p->prev_same_hash = 0;
2057 : 2899990 : if (table[hash])
2058 : 1449515 : table[hash]->prev_same_hash = p;
2059 : 2899990 : table[hash] = p;
2060 : : }
2061 : : }
2062 : : }
2063 : :
2064 : : /* Remove from the hash table any expression that is a call-clobbered
2065 : : register in INSN. Also update their TICK values. */
2066 : :
2067 : : static void
2068 : 14771722 : invalidate_for_call (rtx_insn *insn)
2069 : : {
2070 : 14771722 : unsigned int regno;
2071 : 14771722 : unsigned hash;
2072 : 14771722 : struct table_elt *p, *next;
2073 : 14771722 : int in_table = 0;
2074 : 14771722 : hard_reg_set_iterator hrsi;
2075 : :
2076 : : /* Go through all the hard registers. For each that might be clobbered
2077 : : in call insn INSN, remove the register from quantity chains and update
2078 : : reg_tick if defined. Also see if any of these registers is currently
2079 : : in the table.
2080 : :
2081 : : ??? We could be more precise for partially-clobbered registers,
2082 : : and only invalidate values that actually occupy the clobbered part
2083 : : of the registers. It doesn't seem worth the effort though, since
2084 : : we shouldn't see this situation much before RA. Whatever choice
2085 : : we make here has to be consistent with the table walk below,
2086 : : so any change to this test will require a change there too. */
2087 : 14771722 : HARD_REG_SET callee_clobbers
2088 : 14771722 : = insn_callee_abi (insn).full_and_partial_reg_clobbers ();
2089 : 1221633215 : EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi)
2090 : : {
2091 : 1206861493 : delete_reg_equiv (regno);
2092 : 1206861493 : if (REG_TICK (regno) >= 0)
2093 : : {
2094 : 1206861493 : REG_TICK (regno)++;
2095 : 1206861493 : SUBREG_TICKED (regno) = -1;
2096 : : }
2097 : 1206861493 : in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2098 : : }
2099 : :
2100 : : /* In the case where we have no call-clobbered hard registers in the
2101 : : table, we are done. Otherwise, scan the table and remove any
2102 : : entry that overlaps a call-clobbered register. */
2103 : :
2104 : 14771722 : if (in_table)
2105 : 117461355 : for (hash = 0; hash < HASH_SIZE; hash++)
2106 : 167435202 : for (p = table[hash]; p; p = next)
2107 : : {
2108 : 53533282 : next = p->next_same_hash;
2109 : :
2110 : 104003279 : if (!REG_P (p->exp)
2111 : 53533282 : || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2112 : 50469997 : continue;
2113 : :
2114 : : /* This must use the same test as above rather than the
2115 : : more accurate clobbers_reg_p. */
2116 : 3063285 : if (overlaps_hard_reg_set_p (callee_clobbers, GET_MODE (p->exp),
2117 : 3063285 : REGNO (p->exp)))
2118 : 3043111 : remove_from_table (p, hash);
2119 : : }
2120 : 14771722 : }
2121 : :
2122 : : /* Given an expression X of type CONST,
2123 : : and ELT which is its table entry (or 0 if it
2124 : : is not in the hash table),
2125 : : return an alternate expression for X as a register plus integer.
2126 : : If none can be found, return 0. */
2127 : :
2128 : : static rtx
2129 : 690047 : use_related_value (rtx x, struct table_elt *elt)
2130 : : {
2131 : 690047 : struct table_elt *relt = 0;
2132 : 690047 : struct table_elt *p, *q;
2133 : 690047 : HOST_WIDE_INT offset;
2134 : :
2135 : : /* First, is there anything related known?
2136 : : If we have a table element, we can tell from that.
2137 : : Otherwise, must look it up. */
2138 : :
2139 : 690047 : if (elt != 0 && elt->related_value != 0)
2140 : : relt = elt;
2141 : 533097 : else if (elt == 0 && GET_CODE (x) == CONST)
2142 : : {
2143 : 533097 : rtx subexp = get_related_value (x);
2144 : 533097 : if (subexp != 0)
2145 : 519350 : relt = lookup (subexp,
2146 : : SAFE_HASH (subexp, GET_MODE (subexp)),
2147 : 519350 : GET_MODE (subexp));
2148 : : }
2149 : :
2150 : 635868 : if (relt == 0)
2151 : 378143 : return 0;
2152 : :
2153 : : /* Search all related table entries for one that has an
2154 : : equivalent register. */
2155 : :
2156 : : p = relt;
2157 : 838107 : while (1)
2158 : : {
2159 : : /* This loop is strange in that it is executed in two different cases.
2160 : : The first is when X is already in the table. Then it is searching
2161 : : the RELATED_VALUE list of X's class (RELT). The second case is when
2162 : : X is not in the table. Then RELT points to a class for the related
2163 : : value.
2164 : :
2165 : : Ensure that, whatever case we are in, that we ignore classes that have
2166 : : the same value as X. */
2167 : :
2168 : 838107 : if (rtx_equal_p (x, p->exp))
2169 : : q = 0;
2170 : : else
2171 : 1666040 : for (q = p->first_same_value; q; q = q->next_same_value)
2172 : 1167936 : if (REG_P (q->exp))
2173 : : break;
2174 : :
2175 : 721589 : if (q)
2176 : : break;
2177 : :
2178 : 614622 : p = p->related_value;
2179 : :
2180 : : /* We went all the way around, so there is nothing to be found.
2181 : : Alternatively, perhaps RELT was in the table for some other reason
2182 : : and it has no related values recorded. */
2183 : 614622 : if (p == relt || p == 0)
2184 : : break;
2185 : : }
2186 : :
2187 : 311904 : if (q == 0)
2188 : : return 0;
2189 : :
2190 : 223485 : offset = (get_integer_term (x) - get_integer_term (p->exp));
2191 : : /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2192 : 223485 : return plus_constant (q->mode, q->exp, offset);
2193 : : }
2194 : :
2195 : :
2196 : : /* Hash a string. Just add its bytes up. */
2197 : : static inline unsigned
2198 : 157062 : hash_rtx_string (const char *ps)
2199 : : {
2200 : 157062 : unsigned hash = 0;
2201 : 157062 : const unsigned char *p = (const unsigned char *) ps;
2202 : :
2203 : 157062 : if (p)
2204 : 864576 : while (*p)
2205 : 707514 : hash += *p++;
2206 : :
2207 : 157062 : return hash;
2208 : : }
2209 : :
2210 : : /* Hash an rtx. We are careful to make sure the value is never negative.
2211 : : Equivalent registers hash identically.
2212 : : MODE is used in hashing for CONST_INTs only;
2213 : : otherwise the mode of X is used.
2214 : :
2215 : : Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2216 : :
2217 : : If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2218 : : a MEM rtx which does not have the MEM_READONLY_P flag set.
2219 : :
2220 : : Note that cse_insn knows that the hash code of a MEM expression
2221 : : is just (int) MEM plus the hash code of the address.
2222 : :
2223 : : Call CB on each rtx if CB is not NULL.
2224 : : When the callback returns true, we continue with the new rtx. */
2225 : :
2226 : : unsigned
2227 : 1161323088 : hash_rtx (const_rtx x, machine_mode mode,
2228 : : int *do_not_record_p, int *hash_arg_in_memory_p,
2229 : : bool have_reg_qty, hash_rtx_callback_function cb)
2230 : : {
2231 : 1161323088 : int i, j;
2232 : 1161323088 : unsigned hash = 0;
2233 : 1708874866 : enum rtx_code code;
2234 : 1708874866 : const char *fmt;
2235 : 1708874866 : machine_mode newmode;
2236 : 1708874866 : rtx newx;
2237 : :
2238 : : /* Used to turn recursion into iteration. We can't rely on GCC's
2239 : : tail-recursion elimination since we need to keep accumulating values
2240 : : in HASH. */
2241 : 1708874866 : repeat:
2242 : 1708874866 : if (x == 0)
2243 : 0 : return hash;
2244 : :
2245 : : /* Invoke the callback first. */
2246 : 1708874866 : if (cb != NULL
2247 : 1708874866 : && ((*cb) (x, mode, &newx, &newmode)))
2248 : : {
2249 : 0 : hash += hash_rtx (newx, newmode, do_not_record_p,
2250 : : hash_arg_in_memory_p, have_reg_qty, cb);
2251 : 0 : return hash;
2252 : : }
2253 : :
2254 : 1708874866 : code = GET_CODE (x);
2255 : 1708874866 : switch (code)
2256 : : {
2257 : 596303311 : case REG:
2258 : 596303311 : {
2259 : 596303311 : unsigned int regno = REGNO (x);
2260 : :
2261 : 596303311 : if (do_not_record_p && !reload_completed)
2262 : : {
2263 : : /* On some machines, we can't record any non-fixed hard register,
2264 : : because extending its life will cause reload problems. We
2265 : : consider ap, fp, sp, gp to be fixed for this purpose.
2266 : :
2267 : : We also consider CCmode registers to be fixed for this purpose;
2268 : : failure to do so leads to failure to simplify 0<100 type of
2269 : : conditionals.
2270 : :
2271 : : On all machines, we can't record any global registers.
2272 : : Nor should we record any register that is in a small
2273 : : class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2274 : 593292451 : bool record;
2275 : :
2276 : 593292451 : if (regno >= FIRST_PSEUDO_REGISTER)
2277 : : record = true;
2278 : 403187840 : else if (x == frame_pointer_rtx
2279 : 280287666 : || x == hard_frame_pointer_rtx
2280 : 280173541 : || x == arg_pointer_rtx
2281 : 272658697 : || x == stack_pointer_rtx
2282 : 237949703 : || x == pic_offset_table_rtx)
2283 : : record = true;
2284 : 237949703 : else if (global_regs[regno])
2285 : : record = false;
2286 : 237949317 : else if (fixed_regs[regno])
2287 : : record = true;
2288 : 73789507 : else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2289 : : record = true;
2290 : 73789507 : else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2291 : : record = false;
2292 : 0 : else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2293 : : record = false;
2294 : : else
2295 : : record = true;
2296 : :
2297 : : if (!record)
2298 : : {
2299 : 73789893 : *do_not_record_p = 1;
2300 : 73789893 : return 0;
2301 : : }
2302 : : }
2303 : :
2304 : 522513418 : hash += ((unsigned int) REG << 7);
2305 : 522513418 : hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2306 : 522513418 : return hash;
2307 : : }
2308 : :
2309 : : /* We handle SUBREG of a REG specially because the underlying
2310 : : reg changes its hash value with every value change; we don't
2311 : : want to have to forget unrelated subregs when one subreg changes. */
2312 : 30531134 : case SUBREG:
2313 : 30531134 : {
2314 : 30531134 : if (REG_P (SUBREG_REG (x)))
2315 : : {
2316 : 60956526 : hash += (((unsigned int) SUBREG << 7)
2317 : 30478263 : + REGNO (SUBREG_REG (x))
2318 : 30478263 : + (constant_lower_bound (SUBREG_BYTE (x))
2319 : 30478263 : / UNITS_PER_WORD));
2320 : 30478263 : return hash;
2321 : : }
2322 : : break;
2323 : : }
2324 : :
2325 : 308042299 : case CONST_INT:
2326 : 308042299 : hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2327 : 308042299 : + (unsigned int) INTVAL (x));
2328 : 308042299 : return hash;
2329 : :
2330 : : case CONST_WIDE_INT:
2331 : 2724783 : for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
2332 : 1816718 : hash += CONST_WIDE_INT_ELT (x, i);
2333 : : return hash;
2334 : :
2335 : 0 : case CONST_POLY_INT:
2336 : 0 : {
2337 : 0 : inchash::hash h;
2338 : 0 : h.add_int (hash);
2339 : 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2340 : 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
2341 : 0 : return h.end ();
2342 : : }
2343 : :
2344 : 4189340 : case CONST_DOUBLE:
2345 : : /* This is like the general case, except that it only counts
2346 : : the integers representing the constant. */
2347 : 4189340 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2348 : 4189340 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
2349 : : hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2350 : : + (unsigned int) CONST_DOUBLE_HIGH (x));
2351 : : else
2352 : 4189340 : hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2353 : 4189340 : return hash;
2354 : :
2355 : 0 : case CONST_FIXED:
2356 : 0 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2357 : 0 : hash += fixed_hash (CONST_FIXED_VALUE (x));
2358 : 0 : return hash;
2359 : :
2360 : 2967920 : case CONST_VECTOR:
2361 : 2967920 : {
2362 : 2967920 : int units;
2363 : 2967920 : rtx elt;
2364 : :
2365 : 2967920 : units = const_vector_encoded_nelts (x);
2366 : :
2367 : 8434155 : for (i = 0; i < units; ++i)
2368 : : {
2369 : 5466235 : elt = CONST_VECTOR_ENCODED_ELT (x, i);
2370 : 5466235 : hash += hash_rtx (elt, GET_MODE (elt),
2371 : : do_not_record_p, hash_arg_in_memory_p,
2372 : : have_reg_qty, cb);
2373 : : }
2374 : :
2375 : : return hash;
2376 : : }
2377 : :
2378 : : /* Assume there is only one rtx object for any given label. */
2379 : 18139762 : case LABEL_REF:
2380 : : /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2381 : : differences and differences between each stage's debugging dumps. */
2382 : 18139762 : hash += (((unsigned int) LABEL_REF << 7)
2383 : 18139762 : + CODE_LABEL_NUMBER (label_ref_label (x)));
2384 : 18139762 : return hash;
2385 : :
2386 : 141667685 : case SYMBOL_REF:
2387 : 141667685 : {
2388 : : /* Don't hash on the symbol's address to avoid bootstrap differences.
2389 : : Different hash values may cause expressions to be recorded in
2390 : : different orders and thus different registers to be used in the
2391 : : final assembler. This also avoids differences in the dump files
2392 : : between various stages. */
2393 : 141667685 : unsigned int h = 0;
2394 : 141667685 : const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2395 : :
2396 : 3124380021 : while (*p)
2397 : 2982712336 : h += (h << 7) + *p++; /* ??? revisit */
2398 : :
2399 : 141667685 : hash += ((unsigned int) SYMBOL_REF << 7) + h;
2400 : 141667685 : return hash;
2401 : : }
2402 : :
2403 : 241568466 : case MEM:
2404 : : /* We don't record if marked volatile or if BLKmode since we don't
2405 : : know the size of the move. */
2406 : 241568466 : if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2407 : : {
2408 : 5230899 : *do_not_record_p = 1;
2409 : 5230899 : return 0;
2410 : : }
2411 : 236337567 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2412 : 54311932 : *hash_arg_in_memory_p = 1;
2413 : :
2414 : : /* Now that we have already found this special case,
2415 : : might as well speed it up as much as possible. */
2416 : 236337567 : hash += (unsigned) MEM;
2417 : 236337567 : x = XEXP (x, 0);
2418 : 236337567 : goto repeat;
2419 : :
2420 : 79 : case USE:
2421 : : /* A USE that mentions non-volatile memory needs special
2422 : : handling since the MEM may be BLKmode which normally
2423 : : prevents an entry from being made. Pure calls are
2424 : : marked by a USE which mentions BLKmode memory.
2425 : : See calls.cc:emit_call_1. */
2426 : 79 : if (MEM_P (XEXP (x, 0))
2427 : 79 : && ! MEM_VOLATILE_P (XEXP (x, 0)))
2428 : : {
2429 : 0 : hash += (unsigned) USE;
2430 : 0 : x = XEXP (x, 0);
2431 : :
2432 : 0 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2433 : 0 : *hash_arg_in_memory_p = 1;
2434 : :
2435 : : /* Now that we have already found this special case,
2436 : : might as well speed it up as much as possible. */
2437 : 0 : hash += (unsigned) MEM;
2438 : 0 : x = XEXP (x, 0);
2439 : 0 : goto repeat;
2440 : : }
2441 : : break;
2442 : :
2443 : 47266736 : case PRE_DEC:
2444 : 47266736 : case PRE_INC:
2445 : 47266736 : case POST_DEC:
2446 : 47266736 : case POST_INC:
2447 : 47266736 : case PRE_MODIFY:
2448 : 47266736 : case POST_MODIFY:
2449 : 47266736 : case PC:
2450 : 47266736 : case CALL:
2451 : 47266736 : case UNSPEC_VOLATILE:
2452 : 47266736 : if (do_not_record_p) {
2453 : 47265025 : *do_not_record_p = 1;
2454 : 47265025 : return 0;
2455 : : }
2456 : : else
2457 : : return hash;
2458 : 241960 : break;
2459 : :
2460 : 241960 : case ASM_OPERANDS:
2461 : 241960 : if (do_not_record_p && MEM_VOLATILE_P (x))
2462 : : {
2463 : 196515 : *do_not_record_p = 1;
2464 : 196515 : return 0;
2465 : : }
2466 : : else
2467 : : {
2468 : : /* We don't want to take the filename and line into account. */
2469 : 90890 : hash += (unsigned) code + (unsigned) GET_MODE (x)
2470 : 45445 : + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2471 : 45445 : + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2472 : 45445 : + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2473 : :
2474 : 45445 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2475 : : {
2476 : 66172 : for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2477 : : {
2478 : 51356 : hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2479 : 25678 : GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2480 : : do_not_record_p, hash_arg_in_memory_p,
2481 : : have_reg_qty, cb)
2482 : 25678 : + hash_rtx_string
2483 : 51356 : (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2484 : : }
2485 : :
2486 : 40494 : hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2487 : 40494 : x = ASM_OPERANDS_INPUT (x, 0);
2488 : 40494 : mode = GET_MODE (x);
2489 : 40494 : goto repeat;
2490 : : }
2491 : :
2492 : 4951 : return hash;
2493 : : }
2494 : : break;
2495 : :
2496 : : default:
2497 : : break;
2498 : : }
2499 : :
2500 : 317101059 : i = GET_RTX_LENGTH (code) - 1;
2501 : 317101059 : hash += (unsigned) code + (unsigned) GET_MODE (x);
2502 : 317101059 : fmt = GET_RTX_FORMAT (code);
2503 : 641923349 : for (; i >= 0; i--)
2504 : : {
2505 : 635996007 : switch (fmt[i])
2506 : : {
2507 : 625012102 : case 'e':
2508 : : /* If we are about to do the last recursive call
2509 : : needed at this level, change it into iteration.
2510 : : This function is called enough to be worth it. */
2511 : 625012102 : if (i == 0)
2512 : : {
2513 : 311173717 : x = XEXP (x, i);
2514 : 311173717 : goto repeat;
2515 : : }
2516 : :
2517 : 313838385 : hash += hash_rtx (XEXP (x, i), VOIDmode, do_not_record_p,
2518 : : hash_arg_in_memory_p,
2519 : : have_reg_qty, cb);
2520 : 313838385 : break;
2521 : :
2522 : : case 'E':
2523 : 14699548 : for (j = 0; j < XVECLEN (x, i); j++)
2524 : 8772477 : hash += hash_rtx (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2525 : : hash_arg_in_memory_p,
2526 : : have_reg_qty, cb);
2527 : : break;
2528 : :
2529 : 0 : case 's':
2530 : 0 : hash += hash_rtx_string (XSTR (x, i));
2531 : 0 : break;
2532 : :
2533 : 5003907 : case 'i':
2534 : 5003907 : hash += (unsigned int) XINT (x, i);
2535 : 5003907 : break;
2536 : :
2537 : 52871 : case 'p':
2538 : 52871 : hash += constant_lower_bound (SUBREG_BYTE (x));
2539 : 52871 : break;
2540 : :
2541 : : case '0': case 't':
2542 : : /* Unused. */
2543 : : break;
2544 : :
2545 : 0 : default:
2546 : 0 : gcc_unreachable ();
2547 : : }
2548 : : }
2549 : :
2550 : : return hash;
2551 : : }
2552 : :
2553 : : /* Hash an rtx X for cse via hash_rtx.
2554 : : Stores 1 in do_not_record if any subexpression is volatile.
2555 : : Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2556 : : does not have the MEM_READONLY_P flag set. */
2557 : :
2558 : : static inline unsigned
2559 : 472707091 : canon_hash (rtx x, machine_mode mode)
2560 : : {
2561 : 472707091 : return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2562 : : }
2563 : :
2564 : : /* Like canon_hash but with no side effects, i.e. do_not_record
2565 : : and hash_arg_in_memory are not changed. */
2566 : :
2567 : : static inline unsigned
2568 : 148474184 : safe_hash (rtx x, machine_mode mode)
2569 : : {
2570 : 148474184 : int dummy_do_not_record;
2571 : 148474184 : return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2572 : : }
2573 : :
2574 : : /* Return true iff X and Y would canonicalize into the same thing,
2575 : : without actually constructing the canonicalization of either one.
2576 : : If VALIDATE is nonzero,
2577 : : we assume X is an expression being processed from the rtl
2578 : : and Y was found in the hash table. We check register refs
2579 : : in Y for being marked as valid.
2580 : :
2581 : : If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2582 : :
2583 : : bool
2584 : 679834039 : exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2585 : : {
2586 : 679834039 : int i, j;
2587 : 679834039 : enum rtx_code code;
2588 : 679834039 : const char *fmt;
2589 : :
2590 : : /* Note: it is incorrect to assume an expression is equivalent to itself
2591 : : if VALIDATE is nonzero. */
2592 : 679834039 : if (x == y && !validate)
2593 : : return true;
2594 : :
2595 : 659325896 : if (x == 0 || y == 0)
2596 : : return x == y;
2597 : :
2598 : 659325896 : code = GET_CODE (x);
2599 : 659325896 : if (code != GET_CODE (y))
2600 : : return false;
2601 : :
2602 : : /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2603 : 560474112 : if (GET_MODE (x) != GET_MODE (y))
2604 : : return false;
2605 : :
2606 : : /* MEMs referring to different address space are not equivalent. */
2607 : 585730637 : if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2608 : : return false;
2609 : :
2610 : 492582195 : switch (code)
2611 : : {
2612 : : case PC:
2613 : : CASE_CONST_UNIQUE:
2614 : : return x == y;
2615 : :
2616 : 4100779 : case CONST_VECTOR:
2617 : 4100779 : if (!same_vector_encodings_p (x, y))
2618 : : return false;
2619 : : break;
2620 : :
2621 : 21908 : case LABEL_REF:
2622 : 21908 : return label_ref_label (x) == label_ref_label (y);
2623 : :
2624 : 15760853 : case SYMBOL_REF:
2625 : 15760853 : return XSTR (x, 0) == XSTR (y, 0);
2626 : :
2627 : 147639925 : case REG:
2628 : 147639925 : if (for_gcse)
2629 : 931992 : return REGNO (x) == REGNO (y);
2630 : : else
2631 : : {
2632 : 146707933 : unsigned int regno = REGNO (y);
2633 : 146707933 : unsigned int i;
2634 : 146707933 : unsigned int endregno = END_REGNO (y);
2635 : :
2636 : : /* If the quantities are not the same, the expressions are not
2637 : : equivalent. If there are and we are not to validate, they
2638 : : are equivalent. Otherwise, ensure all regs are up-to-date. */
2639 : :
2640 : 146707933 : if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2641 : : return false;
2642 : :
2643 : 133881420 : if (! validate)
2644 : : return true;
2645 : :
2646 : 246594901 : for (i = regno; i < endregno; i++)
2647 : 124502525 : if (REG_IN_TABLE (i) != REG_TICK (i))
2648 : : return false;
2649 : :
2650 : : return true;
2651 : : }
2652 : :
2653 : 92427046 : case MEM:
2654 : 92427046 : if (for_gcse)
2655 : : {
2656 : : /* A volatile mem should not be considered equivalent to any
2657 : : other. */
2658 : 53645965 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2659 : : return false;
2660 : :
2661 : : /* Can't merge two expressions in different alias sets, since we
2662 : : can decide that the expression is transparent in a block when
2663 : : it isn't, due to it being set with the different alias set.
2664 : :
2665 : : Also, can't merge two expressions with different MEM_ATTRS.
2666 : : They could e.g. be two different entities allocated into the
2667 : : same space on the stack (see e.g. PR25130). In that case, the
2668 : : MEM addresses can be the same, even though the two MEMs are
2669 : : absolutely not equivalent.
2670 : :
2671 : : But because really all MEM attributes should be the same for
2672 : : equivalent MEMs, we just use the invariant that MEMs that have
2673 : : the same attributes share the same mem_attrs data structure. */
2674 : 53540200 : if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y)))
2675 : : return false;
2676 : :
2677 : : /* If we are handling exceptions, we cannot consider two expressions
2678 : : with different trapping status as equivalent, because simple_mem
2679 : : might accept one and reject the other. */
2680 : 7833830 : if (cfun->can_throw_non_call_exceptions
2681 : 7833830 : && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y)))
2682 : : return false;
2683 : : }
2684 : : break;
2685 : :
2686 : : /* For commutative operations, check both orders. */
2687 : 61999305 : case PLUS:
2688 : 61999305 : case MULT:
2689 : 61999305 : case AND:
2690 : 61999305 : case IOR:
2691 : 61999305 : case XOR:
2692 : 61999305 : case NE:
2693 : 61999305 : case EQ:
2694 : 61999305 : return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2695 : : validate, for_gcse)
2696 : 56933404 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2697 : : validate, for_gcse))
2698 : 68250729 : || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2699 : : validate, for_gcse)
2700 : 14386 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2701 : : validate, for_gcse)));
2702 : :
2703 : 12883 : case ASM_OPERANDS:
2704 : : /* We don't use the generic code below because we want to
2705 : : disregard filename and line numbers. */
2706 : :
2707 : : /* A volatile asm isn't equivalent to any other. */
2708 : 12883 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2709 : : return false;
2710 : :
2711 : 12883 : if (GET_MODE (x) != GET_MODE (y)
2712 : 12883 : || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2713 : 12883 : || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2714 : 12883 : ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2715 : 12873 : || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2716 : 12873 : || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2717 : : return false;
2718 : :
2719 : 12873 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2720 : : {
2721 : 17315 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2722 : 8746 : if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2723 : 8746 : ASM_OPERANDS_INPUT (y, i),
2724 : : validate, for_gcse)
2725 : 8746 : || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2726 : 8676 : ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2727 : : return false;
2728 : : }
2729 : :
2730 : : return true;
2731 : :
2732 : : default:
2733 : : break;
2734 : : }
2735 : :
2736 : : /* Compare the elements. If any pair of corresponding elements
2737 : : fail to match, return 0 for the whole thing. */
2738 : :
2739 : 106476105 : fmt = GET_RTX_FORMAT (code);
2740 : 297700550 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2741 : : {
2742 : 202187849 : switch (fmt[i])
2743 : : {
2744 : 137702934 : case 'e':
2745 : 137702934 : if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2746 : : validate, for_gcse))
2747 : : return false;
2748 : : break;
2749 : :
2750 : 7921110 : case 'E':
2751 : 7921110 : if (XVECLEN (x, i) != XVECLEN (y, i))
2752 : : return 0;
2753 : 31362776 : for (j = 0; j < XVECLEN (x, i); j++)
2754 : 24236575 : if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2755 : : validate, for_gcse))
2756 : : return false;
2757 : : break;
2758 : :
2759 : 0 : case 's':
2760 : 0 : if (strcmp (XSTR (x, i), XSTR (y, i)))
2761 : : return false;
2762 : : break;
2763 : :
2764 : 3372316 : case 'i':
2765 : 3372316 : if (XINT (x, i) != XINT (y, i))
2766 : : return false;
2767 : : break;
2768 : :
2769 : 0 : case 'w':
2770 : 0 : if (XWINT (x, i) != XWINT (y, i))
2771 : : return false;
2772 : : break;
2773 : :
2774 : 6581153 : case 'p':
2775 : 6581153 : if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2776 : : return false;
2777 : : break;
2778 : :
2779 : : case '0':
2780 : : case 't':
2781 : : break;
2782 : :
2783 : 0 : default:
2784 : 0 : gcc_unreachable ();
2785 : : }
2786 : : }
2787 : :
2788 : : return true;
2789 : : }
2790 : :
2791 : : /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2792 : : the result if necessary. INSN is as for canon_reg. */
2793 : :
2794 : : static void
2795 : 891052986 : validate_canon_reg (rtx *xloc, rtx_insn *insn)
2796 : : {
2797 : 891052986 : if (*xloc)
2798 : : {
2799 : 891052986 : rtx new_rtx = canon_reg (*xloc, insn);
2800 : :
2801 : : /* If replacing pseudo with hard reg or vice versa, ensure the
2802 : : insn remains valid. Likewise if the insn has MATCH_DUPs. */
2803 : 891052986 : gcc_assert (insn && new_rtx);
2804 : 891052986 : validate_change (insn, xloc, new_rtx, 1);
2805 : : }
2806 : 891052986 : }
2807 : :
2808 : : /* Canonicalize an expression:
2809 : : replace each register reference inside it
2810 : : with the "oldest" equivalent register.
2811 : :
2812 : : If INSN is nonzero validate_change is used to ensure that INSN remains valid
2813 : : after we make our substitution. The calls are made with IN_GROUP nonzero
2814 : : so apply_change_group must be called upon the outermost return from this
2815 : : function (unless INSN is zero). The result of apply_change_group can
2816 : : generally be discarded since the changes we are making are optional. */
2817 : :
2818 : : static rtx
2819 : 1468884815 : canon_reg (rtx x, rtx_insn *insn)
2820 : : {
2821 : 1468884815 : int i;
2822 : 1468884815 : enum rtx_code code;
2823 : 1468884815 : const char *fmt;
2824 : :
2825 : 1468884815 : if (x == 0)
2826 : : return x;
2827 : :
2828 : 1468884815 : code = GET_CODE (x);
2829 : 1468884815 : switch (code)
2830 : : {
2831 : : case PC:
2832 : : case CONST:
2833 : : CASE_CONST_ANY:
2834 : : case SYMBOL_REF:
2835 : : case LABEL_REF:
2836 : : case ADDR_VEC:
2837 : : case ADDR_DIFF_VEC:
2838 : : return x;
2839 : :
2840 : 423354496 : case REG:
2841 : 423354496 : {
2842 : 423354496 : int first;
2843 : 423354496 : int q;
2844 : 423354496 : struct qty_table_elem *ent;
2845 : :
2846 : : /* Never replace a hard reg, because hard regs can appear
2847 : : in more than one machine mode, and we must preserve the mode
2848 : : of each occurrence. Also, some hard regs appear in
2849 : : MEMs that are shared and mustn't be altered. Don't try to
2850 : : replace any reg that maps to a reg of class NO_REGS. */
2851 : 423354496 : if (REGNO (x) < FIRST_PSEUDO_REGISTER
2852 : 423354496 : || ! REGNO_QTY_VALID_P (REGNO (x)))
2853 : 275595627 : return x;
2854 : :
2855 : 147758869 : q = REG_QTY (REGNO (x));
2856 : 147758869 : ent = &qty_table[q];
2857 : 147758869 : first = ent->first_reg;
2858 : 147758869 : return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2859 : 397375 : : REGNO_REG_CLASS (first) == NO_REGS ? x
2860 : 397375 : : gen_rtx_REG (ent->mode, first));
2861 : : }
2862 : :
2863 : 636542533 : default:
2864 : 636542533 : break;
2865 : : }
2866 : :
2867 : 636542533 : fmt = GET_RTX_FORMAT (code);
2868 : 1765965499 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2869 : : {
2870 : 1129422966 : int j;
2871 : :
2872 : 1129422966 : if (fmt[i] == 'e')
2873 : 879941617 : validate_canon_reg (&XEXP (x, i), insn);
2874 : 249481349 : else if (fmt[i] == 'E')
2875 : 17306645 : for (j = 0; j < XVECLEN (x, i); j++)
2876 : 11111369 : validate_canon_reg (&XVECEXP (x, i, j), insn);
2877 : : }
2878 : :
2879 : : return x;
2880 : : }
2881 : :
2882 : : /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2883 : : operation (EQ, NE, GT, etc.), follow it back through the hash table and
2884 : : what values are being compared.
2885 : :
2886 : : *PARG1 and *PARG2 are updated to contain the rtx representing the values
2887 : : actually being compared. For example, if *PARG1 was (reg:CC CC_REG) and
2888 : : *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that
2889 : : were compared to produce (reg:CC CC_REG).
2890 : :
2891 : : The return value is the comparison operator and is either the code of
2892 : : A or the code corresponding to the inverse of the comparison. */
2893 : :
2894 : : static enum rtx_code
2895 : 32925365 : find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2896 : : machine_mode *pmode1, machine_mode *pmode2)
2897 : : {
2898 : 32925365 : rtx arg1, arg2;
2899 : 32925365 : hash_set<rtx> *visited = NULL;
2900 : : /* Set nonzero when we find something of interest. */
2901 : 32925365 : rtx x = NULL;
2902 : :
2903 : 32925365 : arg1 = *parg1, arg2 = *parg2;
2904 : :
2905 : : /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2906 : :
2907 : 64010083 : while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2908 : : {
2909 : 48902845 : int reverse_code = 0;
2910 : 48902845 : struct table_elt *p = 0;
2911 : :
2912 : : /* Remember state from previous iteration. */
2913 : 48902845 : if (x)
2914 : : {
2915 : 16058703 : if (!visited)
2916 : 16054654 : visited = new hash_set<rtx>;
2917 : 16058703 : visited->add (x);
2918 : 16058703 : x = 0;
2919 : : }
2920 : :
2921 : : /* If arg1 is a COMPARE, extract the comparison arguments from it. */
2922 : :
2923 : 48902845 : if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2924 : 0 : x = arg1;
2925 : :
2926 : : /* If ARG1 is a comparison operator and CODE is testing for
2927 : : STORE_FLAG_VALUE, get the inner arguments. */
2928 : :
2929 : 48902845 : else if (COMPARISON_P (arg1))
2930 : : {
2931 : : #ifdef FLOAT_STORE_FLAG_VALUE
2932 : : REAL_VALUE_TYPE fsfv;
2933 : : #endif
2934 : :
2935 : 0 : if (code == NE
2936 : : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2937 : : && code == LT && STORE_FLAG_VALUE == -1)
2938 : : #ifdef FLOAT_STORE_FLAG_VALUE
2939 : : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2940 : : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2941 : : REAL_VALUE_NEGATIVE (fsfv)))
2942 : : #endif
2943 : : )
2944 : 0 : x = arg1;
2945 : 0 : else if (code == EQ
2946 : : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2947 : : && code == GE && STORE_FLAG_VALUE == -1)
2948 : : #ifdef FLOAT_STORE_FLAG_VALUE
2949 : : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2950 : : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2951 : : REAL_VALUE_NEGATIVE (fsfv)))
2952 : : #endif
2953 : : )
2954 : 0 : x = arg1, reverse_code = 1;
2955 : : }
2956 : :
2957 : : /* ??? We could also check for
2958 : :
2959 : : (ne (and (eq (...) (const_int 1))) (const_int 0))
2960 : :
2961 : : and related forms, but let's wait until we see them occurring. */
2962 : :
2963 : 48902845 : if (x == 0)
2964 : : /* Look up ARG1 in the hash table and see if it has an equivalence
2965 : : that lets us see what is being compared. */
2966 : 48902845 : p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2967 : 48902845 : if (p)
2968 : : {
2969 : 38508660 : p = p->first_same_value;
2970 : :
2971 : : /* If what we compare is already known to be constant, that is as
2972 : : good as it gets.
2973 : : We need to break the loop in this case, because otherwise we
2974 : : can have an infinite loop when looking at a reg that is known
2975 : : to be a constant which is the same as a comparison of a reg
2976 : : against zero which appears later in the insn stream, which in
2977 : : turn is constant and the same as the comparison of the first reg
2978 : : against zero... */
2979 : 38508660 : if (p->is_const)
2980 : : break;
2981 : : }
2982 : :
2983 : 63380748 : for (; p; p = p->next_same_value)
2984 : : {
2985 : 45568723 : machine_mode inner_mode = GET_MODE (p->exp);
2986 : : #ifdef FLOAT_STORE_FLAG_VALUE
2987 : : REAL_VALUE_TYPE fsfv;
2988 : : #endif
2989 : :
2990 : : /* If the entry isn't valid, skip it. */
2991 : 45568723 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
2992 : 1849948 : continue;
2993 : :
2994 : : /* If it's a comparison we've used before, skip it. */
2995 : 43718775 : if (visited && visited->contains (p->exp))
2996 : 0 : continue;
2997 : :
2998 : 43718775 : if (GET_CODE (p->exp) == COMPARE
2999 : : /* Another possibility is that this machine has a compare insn
3000 : : that includes the comparison code. In that case, ARG1 would
3001 : : be equivalent to a comparison operation that would set ARG1 to
3002 : : either STORE_FLAG_VALUE or zero. If this is an NE operation,
3003 : : ORIG_CODE is the actual comparison being done; if it is an EQ,
3004 : : we must reverse ORIG_CODE. On machine with a negative value
3005 : : for STORE_FLAG_VALUE, also look at LT and GE operations. */
3006 : 43718775 : || ((code == NE
3007 : 8726200 : || (code == LT
3008 : 232703 : && val_signbit_known_set_p (inner_mode,
3009 : : STORE_FLAG_VALUE))
3010 : : #ifdef FLOAT_STORE_FLAG_VALUE
3011 : : || (code == LT
3012 : : && SCALAR_FLOAT_MODE_P (inner_mode)
3013 : : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3014 : : REAL_VALUE_NEGATIVE (fsfv)))
3015 : : #endif
3016 : : )
3017 : 4025229 : && COMPARISON_P (p->exp)))
3018 : : {
3019 : 30970702 : x = p->exp;
3020 : 30970702 : break;
3021 : : }
3022 : 12748073 : else if ((code == EQ
3023 : 7083193 : || (code == GE
3024 : 295263 : && val_signbit_known_set_p (inner_mode,
3025 : : STORE_FLAG_VALUE))
3026 : : #ifdef FLOAT_STORE_FLAG_VALUE
3027 : : || (code == GE
3028 : : && SCALAR_FLOAT_MODE_P (inner_mode)
3029 : : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3030 : : REAL_VALUE_NEGATIVE (fsfv)))
3031 : : #endif
3032 : : )
3033 : 12748073 : && COMPARISON_P (p->exp))
3034 : : {
3035 : 114016 : reverse_code = 1;
3036 : 114016 : x = p->exp;
3037 : 114016 : break;
3038 : : }
3039 : :
3040 : : /* If this non-trapping address, e.g. fp + constant, the
3041 : : equivalent is a better operand since it may let us predict
3042 : : the value of the comparison. */
3043 : 12634057 : else if (!rtx_addr_can_trap_p (p->exp))
3044 : : {
3045 : 0 : arg1 = p->exp;
3046 : 0 : continue;
3047 : : }
3048 : : }
3049 : :
3050 : : /* If we didn't find a useful equivalence for ARG1, we are done.
3051 : : Otherwise, set up for the next iteration. */
3052 : 48896743 : if (x == 0)
3053 : : break;
3054 : :
3055 : : /* If we need to reverse the comparison, make sure that is
3056 : : possible -- we can't necessarily infer the value of GE from LT
3057 : : with floating-point operands. */
3058 : 31084718 : if (reverse_code)
3059 : : {
3060 : 114016 : enum rtx_code reversed = reversed_comparison_code (x, NULL);
3061 : 114016 : if (reversed == UNKNOWN)
3062 : : break;
3063 : : else
3064 : : code = reversed;
3065 : : }
3066 : 30970702 : else if (COMPARISON_P (x))
3067 : 3356 : code = GET_CODE (x);
3068 : 31084718 : arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3069 : : }
3070 : :
3071 : : /* Return our results. Return the modes from before fold_rtx
3072 : : because fold_rtx might produce const_int, and then it's too late. */
3073 : 32925365 : *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3074 : 32925365 : *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3075 : :
3076 : 32925365 : if (visited)
3077 : 16054654 : delete visited;
3078 : 32925365 : return code;
3079 : : }
3080 : :
3081 : : /* If X is a nontrivial arithmetic operation on an argument for which
3082 : : a constant value can be determined, return the result of operating
3083 : : on that value, as a constant. Otherwise, return X, possibly with
3084 : : one or more operands changed to a forward-propagated constant.
3085 : :
3086 : : If X is a register whose contents are known, we do NOT return
3087 : : those contents here; equiv_constant is called to perform that task.
3088 : : For SUBREGs and MEMs, we do that both here and in equiv_constant.
3089 : :
3090 : : INSN is the insn that we may be modifying. If it is 0, make a copy
3091 : : of X before modifying it. */
3092 : :
3093 : : static rtx
3094 : 361072019 : fold_rtx (rtx x, rtx_insn *insn)
3095 : : {
3096 : 361073754 : enum rtx_code code;
3097 : 361073754 : machine_mode mode;
3098 : 361073754 : const char *fmt;
3099 : 361073754 : int i;
3100 : 361073754 : rtx new_rtx = 0;
3101 : 361073754 : bool changed = false;
3102 : 361073754 : poly_int64 xval;
3103 : :
3104 : : /* Operands of X. */
3105 : : /* Workaround -Wmaybe-uninitialized false positive during
3106 : : profiledbootstrap by initializing them. */
3107 : 361073754 : rtx folded_arg0 = NULL_RTX;
3108 : 361073754 : rtx folded_arg1 = NULL_RTX;
3109 : :
3110 : : /* Constant equivalents of first three operands of X;
3111 : : 0 when no such equivalent is known. */
3112 : 361073754 : rtx const_arg0;
3113 : 361073754 : rtx const_arg1;
3114 : 361073754 : rtx const_arg2;
3115 : :
3116 : : /* The mode of the first operand of X. We need this for sign and zero
3117 : : extends. */
3118 : 361073754 : machine_mode mode_arg0;
3119 : :
3120 : 361073754 : if (x == 0)
3121 : : return x;
3122 : :
3123 : : /* Try to perform some initial simplifications on X. */
3124 : 361073754 : code = GET_CODE (x);
3125 : 361073754 : switch (code)
3126 : : {
3127 : 56809982 : case MEM:
3128 : 56809982 : case SUBREG:
3129 : : /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3130 : : than it would in other contexts. Basically its mode does not
3131 : : signify the size of the object read. That information is carried
3132 : : by size operand. If we happen to have a MEM of the appropriate
3133 : : mode in our tables with a constant value we could simplify the
3134 : : extraction incorrectly if we allowed substitution of that value
3135 : : for the MEM. */
3136 : 56809982 : case ZERO_EXTRACT:
3137 : 56809982 : case SIGN_EXTRACT:
3138 : 56809982 : if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3139 : : return new_rtx;
3140 : : return x;
3141 : :
3142 : : case CONST:
3143 : : CASE_CONST_ANY:
3144 : : case SYMBOL_REF:
3145 : : case LABEL_REF:
3146 : : case REG:
3147 : : case PC:
3148 : : /* No use simplifying an EXPR_LIST
3149 : : since they are used only for lists of args
3150 : : in a function call's REG_EQUAL note. */
3151 : : case EXPR_LIST:
3152 : : return x;
3153 : :
3154 : 241139 : case ASM_OPERANDS:
3155 : 241139 : if (insn)
3156 : : {
3157 : 0 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3158 : 0 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3159 : 0 : fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3160 : : }
3161 : : return x;
3162 : :
3163 : 14771722 : case CALL:
3164 : 14771722 : if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3165 : : return x;
3166 : : break;
3167 : 731690 : case VEC_SELECT:
3168 : 731690 : {
3169 : 731690 : rtx trueop0 = XEXP (x, 0);
3170 : 731690 : mode = GET_MODE (trueop0);
3171 : 731690 : rtx trueop1 = XEXP (x, 1);
3172 : : /* If we select a low-part subreg, return that. */
3173 : 731690 : if (vec_series_lowpart_p (GET_MODE (x), mode, trueop1))
3174 : : {
3175 : 386 : rtx new_rtx = lowpart_subreg (GET_MODE (x), trueop0, mode);
3176 : 386 : if (new_rtx != NULL_RTX)
3177 : : return new_rtx;
3178 : : }
3179 : : }
3180 : :
3181 : : /* Anything else goes through the loop below. */
3182 : : default:
3183 : : break;
3184 : : }
3185 : :
3186 : 103826465 : mode = GET_MODE (x);
3187 : 103826465 : const_arg0 = 0;
3188 : 103826465 : const_arg1 = 0;
3189 : 103826465 : const_arg2 = 0;
3190 : 103826465 : mode_arg0 = VOIDmode;
3191 : :
3192 : : /* Try folding our operands.
3193 : : Then see which ones have constant values known. */
3194 : :
3195 : 103826465 : fmt = GET_RTX_FORMAT (code);
3196 : 323643807 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3197 : 219817342 : if (fmt[i] == 'e')
3198 : : {
3199 : 215702666 : rtx folded_arg = XEXP (x, i), const_arg;
3200 : 215702666 : machine_mode mode_arg = GET_MODE (folded_arg);
3201 : :
3202 : 215702666 : switch (GET_CODE (folded_arg))
3203 : : {
3204 : 95803139 : case MEM:
3205 : 95803139 : case REG:
3206 : 95803139 : case SUBREG:
3207 : 95803139 : const_arg = equiv_constant (folded_arg);
3208 : 95803139 : break;
3209 : :
3210 : : case CONST:
3211 : : CASE_CONST_ANY:
3212 : : case SYMBOL_REF:
3213 : : case LABEL_REF:
3214 : : const_arg = folded_arg;
3215 : : break;
3216 : :
3217 : 40534412 : default:
3218 : 40534412 : folded_arg = fold_rtx (folded_arg, insn);
3219 : 40534412 : const_arg = equiv_constant (folded_arg);
3220 : 40534412 : break;
3221 : : }
3222 : :
3223 : : /* For the first three operands, see if the operand
3224 : : is constant or equivalent to a constant. */
3225 : 215702666 : switch (i)
3226 : : {
3227 : 101403475 : case 0:
3228 : 101403475 : folded_arg0 = folded_arg;
3229 : 101403475 : const_arg0 = const_arg;
3230 : 101403475 : mode_arg0 = mode_arg;
3231 : 101403475 : break;
3232 : 95871353 : case 1:
3233 : 95871353 : folded_arg1 = folded_arg;
3234 : 95871353 : const_arg1 = const_arg;
3235 : 95871353 : break;
3236 : 18427838 : case 2:
3237 : 18427838 : const_arg2 = const_arg;
3238 : 18427838 : break;
3239 : : }
3240 : :
3241 : : /* Pick the least expensive of the argument and an equivalent constant
3242 : : argument. */
3243 : 215702666 : if (const_arg != 0
3244 : 215702666 : && const_arg != folded_arg
3245 : 5974276 : && (COST_IN (const_arg, mode_arg, code, i)
3246 : 2987138 : <= COST_IN (folded_arg, mode_arg, code, i))
3247 : :
3248 : : /* It's not safe to substitute the operand of a conversion
3249 : : operator with a constant, as the conversion's identity
3250 : : depends upon the mode of its operand. This optimization
3251 : : is handled by the call to simplify_unary_operation. */
3252 : 217400956 : && (GET_RTX_CLASS (code) != RTX_UNARY
3253 : 428072 : || GET_MODE (const_arg) == mode_arg0
3254 : 354220 : || (code != ZERO_EXTEND
3255 : : && code != SIGN_EXTEND
3256 : 354220 : && code != TRUNCATE
3257 : 354220 : && code != FLOAT_TRUNCATE
3258 : 268264 : && code != FLOAT_EXTEND
3259 : 268264 : && code != FLOAT
3260 : : && code != FIX
3261 : 268100 : && code != UNSIGNED_FLOAT
3262 : 268100 : && code != UNSIGNED_FIX)))
3263 : : folded_arg = const_arg;
3264 : :
3265 : 215702666 : if (folded_arg == XEXP (x, i))
3266 : 213525077 : continue;
3267 : :
3268 : 2177589 : if (insn == NULL_RTX && !changed)
3269 : 1952222 : x = copy_rtx (x);
3270 : 2177589 : changed = true;
3271 : 2177589 : validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3272 : : }
3273 : :
3274 : 103826465 : if (changed)
3275 : : {
3276 : : /* Canonicalize X if necessary, and keep const_argN and folded_argN
3277 : : consistent with the order in X. */
3278 : 1952882 : if (canonicalize_change_group (insn, x))
3279 : : {
3280 : 179587 : std::swap (const_arg0, const_arg1);
3281 : 179587 : std::swap (folded_arg0, folded_arg1);
3282 : : }
3283 : :
3284 : 1952882 : apply_change_group ();
3285 : : }
3286 : :
3287 : : /* If X is an arithmetic operation, see if we can simplify it. */
3288 : :
3289 : 103826465 : switch (GET_RTX_CLASS (code))
3290 : : {
3291 : 5532122 : case RTX_UNARY:
3292 : 5532122 : {
3293 : : /* We can't simplify extension ops unless we know the
3294 : : original mode. */
3295 : 5532122 : if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3296 : 3908258 : && mode_arg0 == VOIDmode)
3297 : : break;
3298 : :
3299 : 5532122 : new_rtx = simplify_unary_operation (code, mode,
3300 : : const_arg0 ? const_arg0 : folded_arg0,
3301 : : mode_arg0);
3302 : : }
3303 : 5532122 : break;
3304 : :
3305 : 19756041 : case RTX_COMPARE:
3306 : 19756041 : case RTX_COMM_COMPARE:
3307 : : /* See what items are actually being compared and set FOLDED_ARG[01]
3308 : : to those values and CODE to the actual comparison code. If any are
3309 : : constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3310 : : do anything if both operands are already known to be constant. */
3311 : :
3312 : : /* ??? Vector mode comparisons are not supported yet. */
3313 : 19756041 : if (VECTOR_MODE_P (mode))
3314 : : break;
3315 : :
3316 : 19670205 : if (const_arg0 == 0 || const_arg1 == 0)
3317 : : {
3318 : 19669136 : struct table_elt *p0, *p1;
3319 : 19669136 : rtx true_rtx, false_rtx;
3320 : 19669136 : machine_mode mode_arg1;
3321 : :
3322 : 19669136 : if (SCALAR_FLOAT_MODE_P (mode))
3323 : : {
3324 : : #ifdef FLOAT_STORE_FLAG_VALUE
3325 : : true_rtx = (const_double_from_real_value
3326 : : (FLOAT_STORE_FLAG_VALUE (mode), mode));
3327 : : #else
3328 : 2255 : true_rtx = NULL_RTX;
3329 : : #endif
3330 : 2255 : false_rtx = CONST0_RTX (mode);
3331 : : }
3332 : : else
3333 : : {
3334 : 19666881 : true_rtx = const_true_rtx;
3335 : 19666881 : false_rtx = const0_rtx;
3336 : : }
3337 : :
3338 : 19669136 : code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3339 : : &mode_arg0, &mode_arg1);
3340 : :
3341 : : /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3342 : : what kinds of things are being compared, so we can't do
3343 : : anything with this comparison. */
3344 : :
3345 : 19669136 : if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3346 : : break;
3347 : :
3348 : 18370827 : const_arg0 = equiv_constant (folded_arg0);
3349 : 18370827 : const_arg1 = equiv_constant (folded_arg1);
3350 : :
3351 : : /* If we do not now have two constants being compared, see
3352 : : if we can nevertheless deduce some things about the
3353 : : comparison. */
3354 : 18370827 : if (const_arg0 == 0 || const_arg1 == 0)
3355 : : {
3356 : 18192497 : if (const_arg1 != NULL)
3357 : : {
3358 : 13838357 : rtx cheapest_simplification;
3359 : 13838357 : int cheapest_cost;
3360 : 13838357 : rtx simp_result;
3361 : 13838357 : struct table_elt *p;
3362 : :
3363 : : /* See if we can find an equivalent of folded_arg0
3364 : : that gets us a cheaper expression, possibly a
3365 : : constant through simplifications. */
3366 : 13838357 : p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3367 : : mode_arg0);
3368 : :
3369 : 13838357 : if (p != NULL)
3370 : : {
3371 : 5683203 : cheapest_simplification = x;
3372 : 5683203 : cheapest_cost = COST (x, mode);
3373 : :
3374 : 16693286 : for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3375 : : {
3376 : 11010083 : int cost;
3377 : :
3378 : : /* If the entry isn't valid, skip it. */
3379 : 11010083 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3380 : 553277 : continue;
3381 : :
3382 : : /* Try to simplify using this equivalence. */
3383 : 10456806 : simp_result
3384 : 10456806 : = simplify_relational_operation (code, mode,
3385 : : mode_arg0,
3386 : : p->exp,
3387 : : const_arg1);
3388 : :
3389 : 10456806 : if (simp_result == NULL)
3390 : 10337948 : continue;
3391 : :
3392 : 118858 : cost = COST (simp_result, mode);
3393 : 118858 : if (cost < cheapest_cost)
3394 : : {
3395 : 11010083 : cheapest_cost = cost;
3396 : 11010083 : cheapest_simplification = simp_result;
3397 : : }
3398 : : }
3399 : :
3400 : : /* If we have a cheaper expression now, use that
3401 : : and try folding it further, from the top. */
3402 : 5683203 : if (cheapest_simplification != x)
3403 : 1735 : return fold_rtx (copy_rtx (cheapest_simplification),
3404 : 9892 : insn);
3405 : : }
3406 : : }
3407 : :
3408 : : /* See if the two operands are the same. */
3409 : :
3410 : 18356351 : if ((REG_P (folded_arg0)
3411 : 15466421 : && REG_P (folded_arg1)
3412 : 3825633 : && (REG_QTY (REGNO (folded_arg0))
3413 : 3825633 : == REG_QTY (REGNO (folded_arg1))))
3414 : 33811240 : || ((p0 = lookup (folded_arg0,
3415 : : SAFE_HASH (folded_arg0, mode_arg0),
3416 : : mode_arg0))
3417 : 7776216 : && (p1 = lookup (folded_arg1,
3418 : : SAFE_HASH (folded_arg1, mode_arg0),
3419 : : mode_arg0))
3420 : 2141903 : && p0->first_same_value == p1->first_same_value))
3421 : 12071 : folded_arg1 = folded_arg0;
3422 : :
3423 : : /* If FOLDED_ARG0 is a register, see if the comparison we are
3424 : : doing now is either the same as we did before or the reverse
3425 : : (we only check the reverse if not floating-point). */
3426 : 18344280 : else if (REG_P (folded_arg0))
3427 : : {
3428 : 15454592 : int qty = REG_QTY (REGNO (folded_arg0));
3429 : :
3430 : 15454592 : if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3431 : : {
3432 : 15443825 : struct qty_table_elem *ent = &qty_table[qty];
3433 : :
3434 : 15443825 : if ((comparison_dominates_p (ent->comparison_code, code)
3435 : 15070852 : || (! FLOAT_MODE_P (mode_arg0)
3436 : 14905181 : && comparison_dominates_p (ent->comparison_code,
3437 : : reverse_condition (code))))
3438 : 15826285 : && (rtx_equal_p (ent->comparison_const, folded_arg1)
3439 : 748375 : || (const_arg1
3440 : 630958 : && rtx_equal_p (ent->comparison_const,
3441 : : const_arg1))
3442 : 748375 : || (REG_P (folded_arg1)
3443 : 119824 : && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3444 : : {
3445 : 8157 : if (comparison_dominates_p (ent->comparison_code, code))
3446 : : {
3447 : 5276 : if (true_rtx)
3448 : : return true_rtx;
3449 : : else
3450 : : break;
3451 : : }
3452 : : else
3453 : : return false_rtx;
3454 : : }
3455 : : }
3456 : : }
3457 : : }
3458 : : }
3459 : :
3460 : : /* If we are comparing against zero, see if the first operand is
3461 : : equivalent to an IOR with a constant. If so, we may be able to
3462 : : determine the result of this comparison. */
3463 : 18362004 : if (const_arg1 == const0_rtx && !const_arg0)
3464 : : {
3465 : 9245743 : rtx y = lookup_as_function (folded_arg0, IOR);
3466 : 9245743 : rtx inner_const;
3467 : :
3468 : 9245743 : if (y != 0
3469 : 67715 : && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3470 : 78 : && CONST_INT_P (inner_const)
3471 : 9245821 : && INTVAL (inner_const) != 0)
3472 : 78 : folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3473 : : }
3474 : :
3475 : 18353552 : {
3476 : 18353552 : rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0);
3477 : 18362004 : rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1);
3478 : 18362004 : new_rtx = simplify_relational_operation (code, mode, mode_arg0,
3479 : : op0, op1);
3480 : : }
3481 : 18362004 : break;
3482 : :
3483 : 57186012 : case RTX_BIN_ARITH:
3484 : 57186012 : case RTX_COMM_ARITH:
3485 : 57186012 : switch (code)
3486 : : {
3487 : 24619567 : case PLUS:
3488 : : /* If the second operand is a LABEL_REF, see if the first is a MINUS
3489 : : with that LABEL_REF as its second operand. If so, the result is
3490 : : the first operand of that MINUS. This handles switches with an
3491 : : ADDR_DIFF_VEC table. */
3492 : 24619567 : if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3493 : : {
3494 : 2695 : rtx y
3495 : 2695 : = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3496 : 2695 : : lookup_as_function (folded_arg0, MINUS);
3497 : :
3498 : 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3499 : 2695 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg1))
3500 : 0 : return XEXP (y, 0);
3501 : :
3502 : : /* Now try for a CONST of a MINUS like the above. */
3503 : 2695 : if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3504 : 2695 : : lookup_as_function (folded_arg0, CONST))) != 0
3505 : 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3506 : 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3507 : 2695 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg1))
3508 : 0 : return XEXP (XEXP (y, 0), 0);
3509 : : }
3510 : :
3511 : : /* Likewise if the operands are in the other order. */
3512 : 24619567 : if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3513 : : {
3514 : 23 : rtx y
3515 : 23 : = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3516 : 23 : : lookup_as_function (folded_arg1, MINUS);
3517 : :
3518 : 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3519 : 23 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg0))
3520 : 0 : return XEXP (y, 0);
3521 : :
3522 : : /* Now try for a CONST of a MINUS like the above. */
3523 : 23 : if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3524 : 23 : : lookup_as_function (folded_arg1, CONST))) != 0
3525 : 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3526 : 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3527 : 23 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg0))
3528 : 0 : return XEXP (XEXP (y, 0), 0);
3529 : : }
3530 : :
3531 : : /* If second operand is a register equivalent to a negative
3532 : : CONST_INT, see if we can find a register equivalent to the
3533 : : positive constant. Make a MINUS if so. Don't do this for
3534 : : a non-negative constant since we might then alternate between
3535 : : choosing positive and negative constants. Having the positive
3536 : : constant previously-used is the more common case. Be sure
3537 : : the resulting constant is non-negative; if const_arg1 were
3538 : : the smallest negative number this would overflow: depending
3539 : : on the mode, this would either just be the same value (and
3540 : : hence not save anything) or be incorrect. */
3541 : 24619567 : if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3542 : 19862511 : && INTVAL (const_arg1) < 0
3543 : : /* This used to test
3544 : :
3545 : : -INTVAL (const_arg1) >= 0
3546 : :
3547 : : But The Sun V5.0 compilers mis-compiled that test. So
3548 : : instead we test for the problematic value in a more direct
3549 : : manner and hope the Sun compilers get it correct. */
3550 : 11189841 : && INTVAL (const_arg1) !=
3551 : : (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1))
3552 : 11170191 : && REG_P (folded_arg1))
3553 : : {
3554 : 27162 : rtx new_const = GEN_INT (-INTVAL (const_arg1));
3555 : 27162 : struct table_elt *p
3556 : 27162 : = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3557 : :
3558 : 27162 : if (p)
3559 : 5185 : for (p = p->first_same_value; p; p = p->next_same_value)
3560 : 5185 : if (REG_P (p->exp))
3561 : 2739 : return simplify_gen_binary (MINUS, mode, folded_arg0,
3562 : 2739 : canon_reg (p->exp, NULL));
3563 : : }
3564 : 24616828 : goto from_plus;
3565 : :
3566 : 2001477 : case MINUS:
3567 : : /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3568 : : If so, produce (PLUS Z C2-C). */
3569 : 2001477 : if (const_arg1 != 0 && poly_int_rtx_p (const_arg1, &xval))
3570 : : {
3571 : 48774 : rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3572 : 48774 : if (y && poly_int_rtx_p (XEXP (y, 1)))
3573 : 0 : return fold_rtx (plus_constant (mode, copy_rtx (y), -xval),
3574 : 0 : NULL);
3575 : : }
3576 : :
3577 : : /* Fall through. */
3578 : :
3579 : 35973545 : from_plus:
3580 : 35973545 : case SMIN: case SMAX: case UMIN: case UMAX:
3581 : 35973545 : case IOR: case AND: case XOR:
3582 : 35973545 : case MULT:
3583 : 35973545 : case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3584 : : /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3585 : : is known to be of similar form, we may be able to replace the
3586 : : operation with a combined operation. This may eliminate the
3587 : : intermediate operation if every use is simplified in this way.
3588 : : Note that the similar optimization done by combine.cc only works
3589 : : if the intermediate operation's result has only one reference. */
3590 : :
3591 : 35973545 : if (REG_P (folded_arg0)
3592 : 32898579 : && const_arg1 && CONST_INT_P (const_arg1))
3593 : : {
3594 : 24334503 : int is_shift
3595 : 24334503 : = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3596 : : rtx y, inner_const, new_const;
3597 : : rtx canon_const_arg1 = const_arg1;
3598 : : enum rtx_code associate_code;
3599 : :
3600 : : if (is_shift
3601 : 5713668 : && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode)
3602 : 2856813 : || INTVAL (const_arg1) < 0))
3603 : : {
3604 : : if (SHIFT_COUNT_TRUNCATED)
3605 : : canon_const_arg1 = gen_int_shift_amount
3606 : : (mode, (INTVAL (const_arg1)
3607 : : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3608 : : else
3609 : : break;
3610 : : }
3611 : :
3612 : 24334480 : y = lookup_as_function (folded_arg0, code);
3613 : 24334480 : if (y == 0)
3614 : : break;
3615 : :
3616 : : /* If we have compiled a statement like
3617 : : "if (x == (x & mask1))", and now are looking at
3618 : : "x & mask2", we will have a case where the first operand
3619 : : of Y is the same as our first operand. Unless we detect
3620 : : this case, an infinite loop will result. */
3621 : 790268 : if (XEXP (y, 0) == folded_arg0)
3622 : : break;
3623 : :
3624 : 789767 : inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3625 : 789767 : if (!inner_const || !CONST_INT_P (inner_const))
3626 : : break;
3627 : :
3628 : : /* Don't associate these operations if they are a PLUS with the
3629 : : same constant and it is a power of two. These might be doable
3630 : : with a pre- or post-increment. Similarly for two subtracts of
3631 : : identical powers of two with post decrement. */
3632 : :
3633 : 549781 : if (code == PLUS && const_arg1 == inner_const
3634 : : && ((HAVE_PRE_INCREMENT
3635 : : && pow2p_hwi (INTVAL (const_arg1)))
3636 : : || (HAVE_POST_INCREMENT
3637 : : && pow2p_hwi (INTVAL (const_arg1)))
3638 : : || (HAVE_PRE_DECREMENT
3639 : : && pow2p_hwi (- INTVAL (const_arg1)))
3640 : : || (HAVE_POST_DECREMENT
3641 : : && pow2p_hwi (- INTVAL (const_arg1)))))
3642 : : break;
3643 : :
3644 : : /* ??? Vector mode shifts by scalar
3645 : : shift operand are not supported yet. */
3646 : 549781 : if (is_shift && VECTOR_MODE_P (mode))
3647 : : break;
3648 : :
3649 : 2807 : if (is_shift
3650 : 5614 : && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode)
3651 : 2807 : || INTVAL (inner_const) < 0))
3652 : : {
3653 : : if (SHIFT_COUNT_TRUNCATED)
3654 : : inner_const = gen_int_shift_amount
3655 : : (mode, (INTVAL (inner_const)
3656 : : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3657 : : else
3658 : : break;
3659 : : }
3660 : :
3661 : : /* Compute the code used to compose the constants. For example,
3662 : : A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3663 : :
3664 : 549506 : associate_code = (is_shift || code == MINUS ? PLUS : code);
3665 : :
3666 : 549506 : new_const = simplify_binary_operation (associate_code, mode,
3667 : : canon_const_arg1,
3668 : : inner_const);
3669 : :
3670 : 549506 : if (new_const == 0)
3671 : : break;
3672 : :
3673 : : /* If we are associating shift operations, don't let this
3674 : : produce a shift of the size of the object or larger.
3675 : : This could occur when we follow a sign-extend by a right
3676 : : shift on a machine that does a sign-extend as a pair
3677 : : of shifts. */
3678 : :
3679 : 549506 : if (is_shift
3680 : 2807 : && CONST_INT_P (new_const)
3681 : 555120 : && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode))
3682 : : {
3683 : : /* As an exception, we can turn an ASHIFTRT of this
3684 : : form into a shift of the number of bits - 1. */
3685 : 1365 : if (code == ASHIFTRT)
3686 : 1356 : new_const = gen_int_shift_amount
3687 : 1356 : (mode, GET_MODE_UNIT_BITSIZE (mode) - 1);
3688 : 9 : else if (!side_effects_p (XEXP (y, 0)))
3689 : 9 : return CONST0_RTX (mode);
3690 : : else
3691 : : break;
3692 : : }
3693 : :
3694 : 549497 : y = copy_rtx (XEXP (y, 0));
3695 : :
3696 : : /* If Y contains our first operand (the most common way this
3697 : : can happen is if Y is a MEM), we would do into an infinite
3698 : : loop if we tried to fold it. So don't in that case. */
3699 : :
3700 : 549497 : if (! reg_mentioned_p (folded_arg0, y))
3701 : 549497 : y = fold_rtx (y, insn);
3702 : :
3703 : 549497 : return simplify_gen_binary (code, mode, y, new_const);
3704 : : }
3705 : : break;
3706 : :
3707 : : case DIV: case UDIV:
3708 : : /* ??? The associative optimization performed immediately above is
3709 : : also possible for DIV and UDIV using associate_code of MULT.
3710 : : However, we would need extra code to verify that the
3711 : : multiplication does not overflow, that is, there is no overflow
3712 : : in the calculation of new_const. */
3713 : : break;
3714 : :
3715 : : default:
3716 : : break;
3717 : : }
3718 : :
3719 : 97057334 : new_rtx = simplify_binary_operation (code, mode,
3720 : : const_arg0 ? const_arg0 : folded_arg0,
3721 : : const_arg1 ? const_arg1 : folded_arg1);
3722 : 56633767 : break;
3723 : :
3724 : 0 : case RTX_OBJ:
3725 : : /* (lo_sum (high X) X) is simply X. */
3726 : 0 : if (code == LO_SUM && const_arg0 != 0
3727 : 0 : && GET_CODE (const_arg0) == HIGH
3728 : 0 : && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3729 : : return const_arg1;
3730 : : break;
3731 : :
3732 : 18427838 : case RTX_TERNARY:
3733 : 18427838 : case RTX_BITFIELD_OPS:
3734 : 18427838 : new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3735 : : const_arg0 ? const_arg0 : folded_arg0,
3736 : : const_arg1 ? const_arg1 : folded_arg1,
3737 : : const_arg2 ? const_arg2 : XEXP (x, 2));
3738 : 18427838 : break;
3739 : :
3740 : : default:
3741 : : break;
3742 : : }
3743 : :
3744 : 100254040 : return new_rtx ? new_rtx : x;
3745 : : }
3746 : :
3747 : : /* Return a constant value currently equivalent to X.
3748 : : Return 0 if we don't know one. */
3749 : :
3750 : : static rtx
3751 : 242530529 : equiv_constant (rtx x)
3752 : : {
3753 : 242530529 : if (REG_P (x)
3754 : 242530529 : && REGNO_QTY_VALID_P (REGNO (x)))
3755 : : {
3756 : 75929277 : int x_q = REG_QTY (REGNO (x));
3757 : 75929277 : struct qty_table_elem *x_ent = &qty_table[x_q];
3758 : :
3759 : 75929277 : if (x_ent->const_rtx)
3760 : 4225926 : x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3761 : : }
3762 : :
3763 : 242530529 : if (x == 0 || CONSTANT_P (x))
3764 : 24585554 : return x;
3765 : :
3766 : 217944975 : if (GET_CODE (x) == SUBREG)
3767 : : {
3768 : 5060226 : machine_mode mode = GET_MODE (x);
3769 : 5060226 : machine_mode imode = GET_MODE (SUBREG_REG (x));
3770 : 5060226 : rtx new_rtx;
3771 : :
3772 : : /* See if we previously assigned a constant value to this SUBREG. */
3773 : 5060226 : if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3774 : 5053867 : || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
3775 : 5053867 : || (NUM_POLY_INT_COEFFS > 1
3776 : : && (new_rtx = lookup_as_function (x, CONST_POLY_INT)) != 0)
3777 : 5047983 : || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3778 : 10108037 : || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3779 : 12415 : return new_rtx;
3780 : :
3781 : : /* If we didn't and if doing so makes sense, see if we previously
3782 : : assigned a constant value to the enclosing word mode SUBREG. */
3783 : 10939619 : if (known_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD)
3784 : 7815299 : && known_lt (UNITS_PER_WORD, GET_MODE_SIZE (imode)))
3785 : : {
3786 : 33219 : poly_int64 byte = (SUBREG_BYTE (x)
3787 : 33219 : - subreg_lowpart_offset (mode, word_mode));
3788 : 66438 : if (known_ge (byte, 0) && multiple_p (byte, UNITS_PER_WORD))
3789 : : {
3790 : 33219 : rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3791 : 33219 : new_rtx = lookup_as_function (y, CONST_INT);
3792 : 33219 : if (new_rtx)
3793 : 0 : return gen_lowpart (mode, new_rtx);
3794 : : }
3795 : : }
3796 : :
3797 : : /* Otherwise see if we already have a constant for the inner REG,
3798 : : and if that is enough to calculate an equivalent constant for
3799 : : the subreg. Note that the upper bits of paradoxical subregs
3800 : : are undefined, so they cannot be said to equal anything. */
3801 : 5047811 : if (REG_P (SUBREG_REG (x))
3802 : 5039228 : && !paradoxical_subreg_p (x)
3803 : 9940624 : && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3804 : 65378 : return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3805 : :
3806 : 4982433 : return 0;
3807 : : }
3808 : :
3809 : : /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3810 : : the hash table in case its value was seen before. */
3811 : :
3812 : 212884749 : if (MEM_P (x))
3813 : : {
3814 : 62621943 : struct table_elt *elt;
3815 : :
3816 : 62621943 : x = avoid_constant_pool_reference (x);
3817 : 62621943 : if (CONSTANT_P (x))
3818 : : return x;
3819 : :
3820 : 60686514 : elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3821 : 60686514 : if (elt == 0)
3822 : : return 0;
3823 : :
3824 : 5634900 : for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3825 : 3998404 : if (elt->is_const && CONSTANT_P (elt->exp))
3826 : 107318 : return elt->exp;
3827 : : }
3828 : :
3829 : : return 0;
3830 : : }
3831 : :
3832 : : /* Given INSN, a jump insn, TAKEN indicates if we are following the
3833 : : "taken" branch.
3834 : :
3835 : : In certain cases, this can cause us to add an equivalence. For example,
3836 : : if we are following the taken case of
3837 : : if (i == 2)
3838 : : we can add the fact that `i' and '2' are now equivalent.
3839 : :
3840 : : In any case, we can record that this comparison was passed. If the same
3841 : : comparison is seen later, we will know its value. */
3842 : :
3843 : : static void
3844 : 13256229 : record_jump_equiv (rtx_insn *insn, bool taken)
3845 : : {
3846 : 13256229 : int cond_known_true;
3847 : 13256229 : rtx op0, op1;
3848 : 13256229 : rtx set;
3849 : 13256229 : machine_mode mode, mode0, mode1;
3850 : 13256229 : enum rtx_code code;
3851 : :
3852 : : /* Ensure this is the right kind of insn. */
3853 : 13256229 : gcc_assert (any_condjump_p (insn));
3854 : :
3855 : 13256229 : set = pc_set (insn);
3856 : :
3857 : : /* See if this jump condition is known true or false. */
3858 : 13256229 : if (taken)
3859 : 5286164 : cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3860 : : else
3861 : 7970065 : cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3862 : :
3863 : : /* Get the type of comparison being done and the operands being compared.
3864 : : If we had to reverse a non-equality condition, record that fact so we
3865 : : know that it isn't valid for floating-point. */
3866 : 13256229 : code = GET_CODE (XEXP (SET_SRC (set), 0));
3867 : 13256229 : op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3868 : 13256229 : op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3869 : :
3870 : : /* If fold_rtx returns NULL_RTX, there's nothing to record. */
3871 : 13256229 : if (op0 == NULL_RTX || op1 == NULL_RTX)
3872 : 61961 : return;
3873 : :
3874 : 13256229 : code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3875 : 13256229 : if (! cond_known_true)
3876 : : {
3877 : 7970065 : code = reversed_comparison_code_parts (code, op0, op1, insn);
3878 : :
3879 : : /* Don't remember if we can't find the inverse. */
3880 : 7970065 : if (code == UNKNOWN)
3881 : : return;
3882 : : }
3883 : :
3884 : : /* The mode is the mode of the non-constant. */
3885 : 13194268 : mode = mode0;
3886 : 13194268 : if (mode1 != VOIDmode)
3887 : 3083838 : mode = mode1;
3888 : :
3889 : 13194268 : record_jump_cond (code, mode, op0, op1);
3890 : : }
3891 : :
3892 : : /* Yet another form of subreg creation. In this case, we want something in
3893 : : MODE, and we should assume OP has MODE iff it is naturally modeless. */
3894 : :
3895 : : static rtx
3896 : 72504 : record_jump_cond_subreg (machine_mode mode, rtx op)
3897 : : {
3898 : 72504 : machine_mode op_mode = GET_MODE (op);
3899 : 72504 : if (op_mode == mode || op_mode == VOIDmode)
3900 : : return op;
3901 : 6280 : return lowpart_subreg (mode, op, op_mode);
3902 : : }
3903 : :
3904 : : /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3905 : : Make any useful entries we can with that information. Called from
3906 : : above function and called recursively. */
3907 : :
3908 : : static void
3909 : 13266768 : record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, rtx op1)
3910 : : {
3911 : 13266768 : unsigned op0_hash, op1_hash;
3912 : 13266768 : int op0_in_memory, op1_in_memory;
3913 : 13266768 : struct table_elt *op0_elt, *op1_elt;
3914 : :
3915 : : /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3916 : : we know that they are also equal in the smaller mode (this is also
3917 : : true for all smaller modes whether or not there is a SUBREG, but
3918 : : is not worth testing for with no SUBREG). */
3919 : :
3920 : : /* Note that GET_MODE (op0) may not equal MODE. */
3921 : 13266768 : if (code == EQ && paradoxical_subreg_p (op0))
3922 : : {
3923 : 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3924 : 0 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3925 : 0 : if (tem)
3926 : 0 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3927 : : }
3928 : :
3929 : 13266768 : if (code == EQ && paradoxical_subreg_p (op1))
3930 : : {
3931 : 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3932 : 0 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3933 : 0 : if (tem)
3934 : 0 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3935 : : }
3936 : :
3937 : : /* Similarly, if this is an NE comparison, and either is a SUBREG
3938 : : making a smaller mode, we know the whole thing is also NE. */
3939 : :
3940 : : /* Note that GET_MODE (op0) may not equal MODE;
3941 : : if we test MODE instead, we can get an infinite recursion
3942 : : alternating between two modes each wider than MODE. */
3943 : :
3944 : 13266768 : if (code == NE
3945 : 5685264 : && partial_subreg_p (op0)
3946 : 13334289 : && subreg_lowpart_p (op0))
3947 : : {
3948 : 67206 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3949 : 67206 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3950 : 67206 : if (tem)
3951 : 67206 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3952 : : }
3953 : :
3954 : 13266768 : if (code == NE
3955 : 5685264 : && partial_subreg_p (op1)
3956 : 13272111 : && subreg_lowpart_p (op1))
3957 : : {
3958 : 5298 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3959 : 5298 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3960 : 5298 : if (tem)
3961 : 5294 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3962 : : }
3963 : :
3964 : : /* Hash both operands. */
3965 : :
3966 : 13266768 : do_not_record = 0;
3967 : 13266768 : hash_arg_in_memory = 0;
3968 : 13266768 : op0_hash = HASH (op0, mode);
3969 : 13266768 : op0_in_memory = hash_arg_in_memory;
3970 : :
3971 : 13266768 : if (do_not_record)
3972 : : return;
3973 : :
3974 : 13266768 : do_not_record = 0;
3975 : 13266768 : hash_arg_in_memory = 0;
3976 : 13266768 : op1_hash = HASH (op1, mode);
3977 : 13266768 : op1_in_memory = hash_arg_in_memory;
3978 : :
3979 : 13266768 : if (do_not_record)
3980 : : return;
3981 : :
3982 : : /* Look up both operands. */
3983 : 13266768 : op0_elt = lookup (op0, op0_hash, mode);
3984 : 13266768 : op1_elt = lookup (op1, op1_hash, mode);
3985 : :
3986 : : /* If both operands are already equivalent or if they are not in the
3987 : : table but are identical, do nothing. */
3988 : 13266768 : if ((op0_elt != 0 && op1_elt != 0
3989 : 1629638 : && op0_elt->first_same_value == op1_elt->first_same_value)
3990 : 14896384 : || op0 == op1 || rtx_equal_p (op0, op1))
3991 : 717 : return;
3992 : :
3993 : : /* If we aren't setting two things equal all we can do is save this
3994 : : comparison. Similarly if this is floating-point. In the latter
3995 : : case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3996 : : If we record the equality, we might inadvertently delete code
3997 : : whose intent was to change -0 to +0. */
3998 : :
3999 : 13266051 : if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4000 : : {
4001 : 8519557 : struct qty_table_elem *ent;
4002 : 8519557 : int qty;
4003 : :
4004 : : /* If OP0 is not a register, or if OP1 is neither a register
4005 : : or constant, we can't do anything. */
4006 : :
4007 : 8519557 : if (!REG_P (op1))
4008 : 6891047 : op1 = equiv_constant (op1);
4009 : :
4010 : 8519557 : if (!REG_P (op0) || op1 == 0)
4011 : : return;
4012 : :
4013 : : /* Put OP0 in the hash table if it isn't already. This gives it a
4014 : : new quantity number. */
4015 : 7393626 : if (op0_elt == 0)
4016 : : {
4017 : 3198310 : if (insert_regs (op0, NULL, false))
4018 : : {
4019 : 66925 : rehash_using_reg (op0);
4020 : 66925 : op0_hash = HASH (op0, mode);
4021 : :
4022 : : /* If OP0 is contained in OP1, this changes its hash code
4023 : : as well. Faster to rehash than to check, except
4024 : : for the simple case of a constant. */
4025 : 66925 : if (! CONSTANT_P (op1))
4026 : 530 : op1_hash = HASH (op1,mode);
4027 : : }
4028 : :
4029 : 3198310 : op0_elt = insert (op0, NULL, op0_hash, mode);
4030 : 3198310 : op0_elt->in_memory = op0_in_memory;
4031 : : }
4032 : :
4033 : 7393626 : qty = REG_QTY (REGNO (op0));
4034 : 7393626 : ent = &qty_table[qty];
4035 : :
4036 : 7393626 : ent->comparison_code = code;
4037 : 7393626 : if (REG_P (op1))
4038 : : {
4039 : : /* Look it up again--in case op0 and op1 are the same. */
4040 : 1546272 : op1_elt = lookup (op1, op1_hash, mode);
4041 : :
4042 : : /* Put OP1 in the hash table so it gets a new quantity number. */
4043 : 1546272 : if (op1_elt == 0)
4044 : : {
4045 : 581571 : if (insert_regs (op1, NULL, false))
4046 : : {
4047 : 420 : rehash_using_reg (op1);
4048 : 420 : op1_hash = HASH (op1, mode);
4049 : : }
4050 : :
4051 : 581571 : op1_elt = insert (op1, NULL, op1_hash, mode);
4052 : 581571 : op1_elt->in_memory = op1_in_memory;
4053 : : }
4054 : :
4055 : 1546272 : ent->comparison_const = NULL_RTX;
4056 : 1546272 : ent->comparison_qty = REG_QTY (REGNO (op1));
4057 : : }
4058 : : else
4059 : : {
4060 : 5847354 : ent->comparison_const = op1;
4061 : 5847354 : ent->comparison_qty = -1;
4062 : : }
4063 : :
4064 : 7393626 : return;
4065 : : }
4066 : :
4067 : : /* If either side is still missing an equivalence, make it now,
4068 : : then merge the equivalences. */
4069 : :
4070 : 4746494 : if (op0_elt == 0)
4071 : : {
4072 : 2958526 : if (insert_regs (op0, NULL, false))
4073 : : {
4074 : 23814 : rehash_using_reg (op0);
4075 : 23814 : op0_hash = HASH (op0, mode);
4076 : : }
4077 : :
4078 : 2958526 : op0_elt = insert (op0, NULL, op0_hash, mode);
4079 : 2958526 : op0_elt->in_memory = op0_in_memory;
4080 : : }
4081 : :
4082 : 4746494 : if (op1_elt == 0)
4083 : : {
4084 : 3615221 : if (insert_regs (op1, NULL, false))
4085 : : {
4086 : 6568 : rehash_using_reg (op1);
4087 : 6568 : op1_hash = HASH (op1, mode);
4088 : : }
4089 : :
4090 : 3615221 : op1_elt = insert (op1, NULL, op1_hash, mode);
4091 : 3615221 : op1_elt->in_memory = op1_in_memory;
4092 : : }
4093 : :
4094 : 4746494 : merge_equiv_classes (op0_elt, op1_elt);
4095 : : }
4096 : :
4097 : : /* CSE processing for one instruction.
4098 : :
4099 : : Most "true" common subexpressions are mostly optimized away in GIMPLE,
4100 : : but the few that "leak through" are cleaned up by cse_insn, and complex
4101 : : addressing modes are often formed here.
4102 : :
4103 : : The main function is cse_insn, and between here and that function
4104 : : a couple of helper functions is defined to keep the size of cse_insn
4105 : : within reasonable proportions.
4106 : :
4107 : : Data is shared between the main and helper functions via STRUCT SET,
4108 : : that contains all data related for every set in the instruction that
4109 : : is being processed.
4110 : :
4111 : : Note that cse_main processes all sets in the instruction. Most
4112 : : passes in GCC only process simple SET insns or single_set insns, but
4113 : : CSE processes insns with multiple sets as well. */
4114 : :
4115 : : /* Data on one SET contained in the instruction. */
4116 : :
4117 : : struct set
4118 : : {
4119 : : /* The SET rtx itself. */
4120 : : rtx rtl;
4121 : : /* The SET_SRC of the rtx (the original value, if it is changing). */
4122 : : rtx src;
4123 : : /* The hash-table element for the SET_SRC of the SET. */
4124 : : struct table_elt *src_elt;
4125 : : /* Hash value for the SET_SRC. */
4126 : : unsigned src_hash;
4127 : : /* Hash value for the SET_DEST. */
4128 : : unsigned dest_hash;
4129 : : /* The SET_DEST, with SUBREG, etc., stripped. */
4130 : : rtx inner_dest;
4131 : : /* Original machine mode, in case it becomes a CONST_INT. */
4132 : : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
4133 : : /* Nonzero if the SET_SRC is in memory. */
4134 : : unsigned int src_in_memory : 1;
4135 : : /* Nonzero if the SET_SRC contains something
4136 : : whose value cannot be predicted and understood. */
4137 : : unsigned int src_volatile : 1;
4138 : : /* Nonzero if RTL is an artifical set that has been created to describe
4139 : : part of an insn's effect. Zero means that RTL appears directly in
4140 : : the insn pattern. */
4141 : : unsigned int is_fake_set : 1;
4142 : : /* Hash value of constant equivalent for SET_SRC. */
4143 : : unsigned src_const_hash;
4144 : : /* A constant equivalent for SET_SRC, if any. */
4145 : : rtx src_const;
4146 : : /* Table entry for constant equivalent for SET_SRC, if any. */
4147 : : struct table_elt *src_const_elt;
4148 : : /* Table entry for the destination address. */
4149 : : struct table_elt *dest_addr_elt;
4150 : : };
4151 : :
4152 : : /* Special handling for (set REG0 REG1) where REG0 is the
4153 : : "cheapest", cheaper than REG1. After cse, REG1 will probably not
4154 : : be used in the sequel, so (if easily done) change this insn to
4155 : : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4156 : : that computed their value. Then REG1 will become a dead store
4157 : : and won't cloud the situation for later optimizations.
4158 : :
4159 : : Do not make this change if REG1 is a hard register, because it will
4160 : : then be used in the sequel and we may be changing a two-operand insn
4161 : : into a three-operand insn.
4162 : :
4163 : : This is the last transformation that cse_insn will try to do. */
4164 : :
4165 : : static void
4166 : 124283881 : try_back_substitute_reg (rtx set, rtx_insn *insn)
4167 : : {
4168 : 124283881 : rtx dest = SET_DEST (set);
4169 : 124283881 : rtx src = SET_SRC (set);
4170 : :
4171 : 124283881 : if (REG_P (dest)
4172 : 104046265 : && REG_P (src) && ! HARD_REGISTER_P (src)
4173 : 130895618 : && REGNO_QTY_VALID_P (REGNO (src)))
4174 : : {
4175 : 6603345 : int src_q = REG_QTY (REGNO (src));
4176 : 6603345 : struct qty_table_elem *src_ent = &qty_table[src_q];
4177 : :
4178 : 6603345 : if (src_ent->first_reg == REGNO (dest))
4179 : : {
4180 : : /* Scan for the previous nonnote insn, but stop at a basic
4181 : : block boundary. */
4182 : 1579194 : rtx_insn *prev = insn;
4183 : 1579194 : rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
4184 : 3744874 : do
4185 : : {
4186 : 3744874 : prev = PREV_INSN (prev);
4187 : : }
4188 : 3744874 : while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
4189 : :
4190 : : /* Do not swap the registers around if the previous instruction
4191 : : attaches a REG_EQUIV note to REG1.
4192 : :
4193 : : ??? It's not entirely clear whether we can transfer a REG_EQUIV
4194 : : from the pseudo that originally shadowed an incoming argument
4195 : : to another register. Some uses of REG_EQUIV might rely on it
4196 : : being attached to REG1 rather than REG2.
4197 : :
4198 : : This section previously turned the REG_EQUIV into a REG_EQUAL
4199 : : note. We cannot do that because REG_EQUIV may provide an
4200 : : uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4201 : 1579194 : if (NONJUMP_INSN_P (prev)
4202 : 964619 : && GET_CODE (PATTERN (prev)) == SET
4203 : 712212 : && SET_DEST (PATTERN (prev)) == src
4204 : 1785022 : && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
4205 : : {
4206 : 205759 : rtx note;
4207 : :
4208 : 205759 : validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
4209 : 205759 : validate_change (insn, &SET_DEST (set), src, 1);
4210 : 205759 : validate_change (insn, &SET_SRC (set), dest, 1);
4211 : 205759 : apply_change_group ();
4212 : :
4213 : : /* If INSN has a REG_EQUAL note, and this note mentions
4214 : : REG0, then we must delete it, because the value in
4215 : : REG0 has changed. If the note's value is REG1, we must
4216 : : also delete it because that is now this insn's dest. */
4217 : 205759 : note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4218 : 205759 : if (note != 0
4219 : 205759 : && (reg_mentioned_p (dest, XEXP (note, 0))
4220 : 1542 : || rtx_equal_p (src, XEXP (note, 0))))
4221 : 0 : remove_note (insn, note);
4222 : :
4223 : : /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4224 : 205759 : note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4225 : 205759 : if (note != 0)
4226 : : {
4227 : 0 : remove_note (insn, note);
4228 : 0 : gcc_assert (!find_reg_note (prev, REG_ARGS_SIZE, NULL_RTX));
4229 : 0 : set_unique_reg_note (prev, REG_ARGS_SIZE, XEXP (note, 0));
4230 : : }
4231 : : }
4232 : : }
4233 : : }
4234 : 124283881 : }
4235 : :
4236 : : /* Add an entry containing RTL X into SETS. IS_FAKE_SET is true if X is
4237 : : an artifical set that has been created to describe part of an insn's
4238 : : effect. */
4239 : : static inline void
4240 : 178057902 : add_to_set (vec<struct set> *sets, rtx x, bool is_fake_set)
4241 : : {
4242 : 178057902 : struct set entry = {};
4243 : 178057902 : entry.rtl = x;
4244 : 178057902 : entry.is_fake_set = is_fake_set;
4245 : 178057902 : sets->safe_push (entry);
4246 : 178057902 : }
4247 : :
4248 : : /* Record all the SETs in this instruction into SETS_PTR,
4249 : : and return the number of recorded sets. */
4250 : : static int
4251 : 334322010 : find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
4252 : : {
4253 : 334322010 : rtx x = PATTERN (insn);
4254 : :
4255 : 334322010 : if (GET_CODE (x) == SET)
4256 : : {
4257 : : /* Ignore SETs that are unconditional jumps.
4258 : : They never need cse processing, so this does not hurt.
4259 : : The reason is not efficiency but rather
4260 : : so that we can test at the end for instructions
4261 : : that have been simplified to unconditional jumps
4262 : : and not be misled by unchanged instructions
4263 : : that were unconditional jumps to begin with. */
4264 : 155654489 : if (SET_DEST (x) == pc_rtx
4265 : 17924512 : && GET_CODE (SET_SRC (x)) == LABEL_REF)
4266 : : ;
4267 : : /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4268 : : The hard function value register is used only once, to copy to
4269 : : someplace else, so it isn't worth cse'ing. */
4270 : 155654013 : else if (GET_CODE (SET_SRC (x)) == CALL)
4271 : : ;
4272 : 148776638 : else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR
4273 : 484573 : && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL
4274 : : /* Prevent duplicates from being generated if the type is a V1
4275 : : type and a subreg. Folding this will result in the same
4276 : : element as folding x itself. */
4277 : 149261211 : && !(SUBREG_P (SET_DEST (x))
4278 : 88 : && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1)))
4279 : : {
4280 : : /* First register the vector itself. */
4281 : 484573 : add_to_set (psets, x, false);
4282 : 484573 : rtx src = SET_SRC (x);
4283 : : /* Go over the constants of the CONST_VECTOR in forward order, to
4284 : : put them in the same order in the SETS array. */
4285 : 969276 : for (unsigned i = 0; i < const_vector_encoded_nelts (src) ; i++)
4286 : : {
4287 : : /* These are templates and don't actually get emitted but are
4288 : : used to tell CSE how to get to a particular constant. */
4289 : 484703 : rtx y = simplify_gen_vec_select (SET_DEST (x), i);
4290 : 484703 : gcc_assert (y);
4291 : 484703 : rtx set = gen_rtx_SET (y, CONST_VECTOR_ELT (src, i));
4292 : 484703 : add_to_set (psets, set, true);
4293 : : }
4294 : : }
4295 : : else
4296 : 148292065 : add_to_set (psets, x, false);
4297 : : }
4298 : 178667521 : else if (GET_CODE (x) == PARALLEL)
4299 : : {
4300 : 27931939 : int i, lim = XVECLEN (x, 0);
4301 : :
4302 : : /* Go over the expressions of the PARALLEL in forward order, to
4303 : : put them in the same order in the SETS array. */
4304 : 85164145 : for (i = 0; i < lim; i++)
4305 : : {
4306 : 57232206 : rtx y = XVECEXP (x, 0, i);
4307 : 57232206 : if (GET_CODE (y) == SET)
4308 : : {
4309 : : /* As above, we ignore unconditional jumps and call-insns and
4310 : : ignore the result of apply_change_group. */
4311 : 28807671 : if (SET_DEST (y) == pc_rtx
4312 : 17074 : && GET_CODE (SET_SRC (y)) == LABEL_REF)
4313 : : ;
4314 : 28807671 : else if (GET_CODE (SET_SRC (y)) == CALL)
4315 : : ;
4316 : : else
4317 : 28796561 : add_to_set (psets, y, false);
4318 : : }
4319 : : }
4320 : : }
4321 : :
4322 : 334322010 : return psets->length ();
4323 : : }
4324 : :
4325 : : /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4326 : :
4327 : : static void
4328 : 102404 : canon_asm_operands (rtx x, rtx_insn *insn)
4329 : : {
4330 : 129229 : for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4331 : : {
4332 : 26825 : rtx input = ASM_OPERANDS_INPUT (x, i);
4333 : 26825 : if (!(REG_P (input) && HARD_REGISTER_P (input)))
4334 : : {
4335 : 26439 : input = canon_reg (input, insn);
4336 : 26439 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4337 : : }
4338 : : }
4339 : 102404 : }
4340 : :
4341 : : /* Where possible, substitute every register reference in the N_SETS
4342 : : number of SETS in INSN with the canonical register.
4343 : :
4344 : : Register canonicalization propagatest the earliest register (i.e.
4345 : : one that is set before INSN) with the same value. This is a very
4346 : : useful, simple form of CSE, to clean up warts from expanding GIMPLE
4347 : : to RTL. For instance, a CONST for an address is usually expanded
4348 : : multiple times to loads into different registers, thus creating many
4349 : : subexpressions of the form:
4350 : :
4351 : : (set (reg1) (some_const))
4352 : : (set (mem (... reg1 ...) (thing)))
4353 : : (set (reg2) (some_const))
4354 : : (set (mem (... reg2 ...) (thing)))
4355 : :
4356 : : After canonicalizing, the code takes the following form:
4357 : :
4358 : : (set (reg1) (some_const))
4359 : : (set (mem (... reg1 ...) (thing)))
4360 : : (set (reg2) (some_const))
4361 : : (set (mem (... reg1 ...) (thing)))
4362 : :
4363 : : The set to reg2 is now trivially dead, and the memory reference (or
4364 : : address, or whatever) may be a candidate for further CSEing.
4365 : :
4366 : : In this function, the result of apply_change_group can be ignored;
4367 : : see canon_reg. */
4368 : :
4369 : : static void
4370 : 334322010 : canonicalize_insn (rtx_insn *insn, vec<struct set> *psets)
4371 : : {
4372 : 334322010 : vec<struct set> sets = *psets;
4373 : 334322010 : int n_sets = sets.length ();
4374 : 334322010 : rtx tem;
4375 : 334322010 : rtx x = PATTERN (insn);
4376 : 334322010 : int i;
4377 : :
4378 : 334322010 : if (CALL_P (insn))
4379 : : {
4380 : 41389617 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4381 : 26617895 : if (GET_CODE (XEXP (tem, 0)) != SET)
4382 : 26487791 : XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4383 : : }
4384 : :
4385 : 334322010 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
4386 : : {
4387 : 6877375 : canon_reg (SET_SRC (x), insn);
4388 : 6877375 : apply_change_group ();
4389 : 6877375 : fold_rtx (SET_SRC (x), insn);
4390 : : }
4391 : 327444635 : else if (GET_CODE (x) == CLOBBER)
4392 : : {
4393 : : /* If we clobber memory, canon the address.
4394 : : This does nothing when a register is clobbered
4395 : : because we have already invalidated the reg. */
4396 : 70991 : if (MEM_P (XEXP (x, 0)))
4397 : 12678 : canon_reg (XEXP (x, 0), insn);
4398 : : }
4399 : 327373644 : else if (GET_CODE (x) == USE
4400 : 327373644 : && ! (REG_P (XEXP (x, 0))
4401 : 1213784 : && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4402 : : /* Canonicalize a USE of a pseudo register or memory location. */
4403 : 0 : canon_reg (x, insn);
4404 : 327373644 : else if (GET_CODE (x) == ASM_OPERANDS)
4405 : 18 : canon_asm_operands (x, insn);
4406 : 327373626 : else if (GET_CODE (x) == CALL)
4407 : : {
4408 : 7397475 : canon_reg (x, insn);
4409 : 7397475 : apply_change_group ();
4410 : 7397475 : fold_rtx (x, insn);
4411 : : }
4412 : 319976151 : else if (DEBUG_INSN_P (insn))
4413 : 141351993 : canon_reg (PATTERN (insn), insn);
4414 : 178624158 : else if (GET_CODE (x) == PARALLEL)
4415 : : {
4416 : 85164145 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4417 : : {
4418 : 57232206 : rtx y = XVECEXP (x, 0, i);
4419 : 57232206 : if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
4420 : : {
4421 : 11110 : canon_reg (SET_SRC (y), insn);
4422 : 11110 : apply_change_group ();
4423 : 11110 : fold_rtx (SET_SRC (y), insn);
4424 : : }
4425 : 57221096 : else if (GET_CODE (y) == CLOBBER)
4426 : : {
4427 : 27514431 : if (MEM_P (XEXP (y, 0)))
4428 : 65862 : canon_reg (XEXP (y, 0), insn);
4429 : : }
4430 : 29706665 : else if (GET_CODE (y) == USE
4431 : 29706665 : && ! (REG_P (XEXP (y, 0))
4432 : 252677 : && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4433 : 287209 : canon_reg (y, insn);
4434 : 29419456 : else if (GET_CODE (y) == ASM_OPERANDS)
4435 : 102386 : canon_asm_operands (y, insn);
4436 : 29317070 : else if (GET_CODE (y) == CALL)
4437 : : {
4438 : 485762 : canon_reg (y, insn);
4439 : 485762 : apply_change_group ();
4440 : 485762 : fold_rtx (y, insn);
4441 : : }
4442 : : }
4443 : : }
4444 : :
4445 : 175422885 : if (n_sets == 1 && REG_NOTES (insn) != 0
4446 : 448232355 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4447 : : {
4448 : : /* We potentially will process this insn many times. Therefore,
4449 : : drop the REG_EQUAL note if it is equal to the SET_SRC of the
4450 : : unique set in INSN.
4451 : :
4452 : : Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4453 : : because cse_insn handles those specially. */
4454 : 8140746 : if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART
4455 : 8140746 : && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
4456 : 170620 : remove_note (insn, tem);
4457 : : else
4458 : : {
4459 : 7970126 : canon_reg (XEXP (tem, 0), insn);
4460 : 7970126 : apply_change_group ();
4461 : 7970126 : XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn);
4462 : 7970126 : df_notes_rescan (insn);
4463 : : }
4464 : : }
4465 : :
4466 : : /* Canonicalize sources and addresses of destinations.
4467 : : We do this in a separate pass to avoid problems when a MATCH_DUP is
4468 : : present in the insn pattern. In that case, we want to ensure that
4469 : : we don't break the duplicate nature of the pattern. So we will replace
4470 : : both operands at the same time. Otherwise, we would fail to find an
4471 : : equivalent substitution in the loop calling validate_change below.
4472 : :
4473 : : We used to suppress canonicalization of DEST if it appears in SRC,
4474 : : but we don't do this any more. */
4475 : :
4476 : 512379912 : for (i = 0; i < n_sets; i++)
4477 : : {
4478 : 178057902 : rtx dest = SET_DEST (sets[i].rtl);
4479 : 178057902 : rtx src = SET_SRC (sets[i].rtl);
4480 : 178057902 : rtx new_rtx = canon_reg (src, insn);
4481 : :
4482 : 178057902 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4483 : :
4484 : 178057902 : if (GET_CODE (dest) == ZERO_EXTRACT)
4485 : : {
4486 : 4935 : validate_change (insn, &XEXP (dest, 1),
4487 : : canon_reg (XEXP (dest, 1), insn), 1);
4488 : 4935 : validate_change (insn, &XEXP (dest, 2),
4489 : : canon_reg (XEXP (dest, 2), insn), 1);
4490 : : }
4491 : :
4492 : 179356444 : while (GET_CODE (dest) == SUBREG
4493 : 178078651 : || GET_CODE (dest) == ZERO_EXTRACT
4494 : 357430160 : || GET_CODE (dest) == STRICT_LOW_PART)
4495 : 1298542 : dest = XEXP (dest, 0);
4496 : :
4497 : 178057902 : if (MEM_P (dest))
4498 : 26035405 : canon_reg (dest, insn);
4499 : : }
4500 : :
4501 : : /* Now that we have done all the replacements, we can apply the change
4502 : : group and see if they all work. Note that this will cause some
4503 : : canonicalizations that would have worked individually not to be applied
4504 : : because some other canonicalization didn't work, but this should not
4505 : : occur often.
4506 : :
4507 : : The result of apply_change_group can be ignored; see canon_reg. */
4508 : :
4509 : 334322010 : apply_change_group ();
4510 : 334322010 : }
4511 : :
4512 : : /* Main function of CSE.
4513 : : First simplify sources and addresses of all assignments
4514 : : in the instruction, using previously-computed equivalents values.
4515 : : Then install the new sources and destinations in the table
4516 : : of available values. */
4517 : :
4518 : : static void
4519 : 334322010 : cse_insn (rtx_insn *insn)
4520 : : {
4521 : 334322010 : rtx x = PATTERN (insn);
4522 : 334322010 : int i;
4523 : 334322010 : rtx tem;
4524 : 334322010 : int n_sets = 0;
4525 : :
4526 : 334322010 : rtx src_eqv = 0;
4527 : 334322010 : struct table_elt *src_eqv_elt = 0;
4528 : 334322010 : int src_eqv_volatile = 0;
4529 : 334322010 : int src_eqv_in_memory = 0;
4530 : 334322010 : unsigned src_eqv_hash = 0;
4531 : :
4532 : 334322010 : this_insn = insn;
4533 : :
4534 : : /* Find all regs explicitly clobbered in this insn,
4535 : : to ensure they are not replaced with any other regs
4536 : : elsewhere in this insn. */
4537 : 334322010 : invalidate_from_sets_and_clobbers (insn);
4538 : :
4539 : : /* Record all the SETs in this instruction. */
4540 : 334322010 : auto_vec<struct set, 8> sets;
4541 : 334322010 : n_sets = find_sets_in_insn (insn, (vec<struct set>*)&sets);
4542 : :
4543 : : /* Substitute the canonical register where possible. */
4544 : 334322010 : canonicalize_insn (insn, (vec<struct set>*)&sets);
4545 : :
4546 : : /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4547 : : if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4548 : : latter condition is necessary because SRC_EQV is handled specially for
4549 : : this case, and if it isn't set, then there will be no equivalence
4550 : : for the destination. */
4551 : 175422885 : if (n_sets == 1 && REG_NOTES (insn) != 0
4552 : 448098866 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4553 : : {
4554 : :
4555 : 7970126 : if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT
4556 : 7970126 : && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4557 : 16482 : || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4558 : 7953644 : src_eqv = copy_rtx (XEXP (tem, 0));
4559 : : /* If DEST is of the form ZERO_EXTACT, as in:
4560 : : (set (zero_extract:SI (reg:SI 119)
4561 : : (const_int 16 [0x10])
4562 : : (const_int 16 [0x10]))
4563 : : (const_int 51154 [0xc7d2]))
4564 : : REG_EQUAL note will specify the value of register (reg:SI 119) at this
4565 : : point. Note that this is different from SRC_EQV. We can however
4566 : : calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4567 : 16482 : else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
4568 : 0 : && CONST_INT_P (XEXP (tem, 0))
4569 : 0 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
4570 : 16482 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
4571 : : {
4572 : 0 : rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
4573 : : /* This is the mode of XEXP (tem, 0) as well. */
4574 : 0 : scalar_int_mode dest_mode
4575 : 0 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
4576 : 0 : rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
4577 : 0 : rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
4578 : 0 : HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
4579 : 0 : HOST_WIDE_INT mask;
4580 : 0 : unsigned int shift;
4581 : 0 : if (BITS_BIG_ENDIAN)
4582 : : shift = (GET_MODE_PRECISION (dest_mode)
4583 : : - INTVAL (pos) - INTVAL (width));
4584 : : else
4585 : 0 : shift = INTVAL (pos);
4586 : 0 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
4587 : : mask = HOST_WIDE_INT_M1;
4588 : : else
4589 : 0 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
4590 : 0 : val = (val >> shift) & mask;
4591 : 0 : src_eqv = GEN_INT (val);
4592 : : }
4593 : : }
4594 : :
4595 : : /* Set sets[i].src_elt to the class each source belongs to.
4596 : : Detect assignments from or to volatile things
4597 : : and set set[i] to zero so they will be ignored
4598 : : in the rest of this function.
4599 : :
4600 : : Nothing in this loop changes the hash table or the register chains. */
4601 : :
4602 : 512379912 : for (i = 0; i < n_sets; i++)
4603 : : {
4604 : 178057902 : bool repeat = false;
4605 : 178057902 : bool noop_insn = false;
4606 : 178057902 : rtx src, dest;
4607 : 178057902 : rtx src_folded;
4608 : 178057902 : struct table_elt *elt = 0, *p;
4609 : 178057902 : machine_mode mode;
4610 : 178057902 : rtx src_eqv_here;
4611 : 178057902 : rtx src_const = 0;
4612 : 178057902 : rtx src_related = 0;
4613 : 178057902 : rtx dest_related = 0;
4614 : 178057902 : bool src_related_is_const_anchor = false;
4615 : 178057902 : struct table_elt *src_const_elt = 0;
4616 : 178057902 : int src_cost = MAX_COST;
4617 : 178057902 : int src_eqv_cost = MAX_COST;
4618 : 178057902 : int src_folded_cost = MAX_COST;
4619 : 178057902 : int src_related_cost = MAX_COST;
4620 : 178057902 : int src_elt_cost = MAX_COST;
4621 : 178057902 : int src_regcost = MAX_COST;
4622 : 178057902 : int src_eqv_regcost = MAX_COST;
4623 : 178057902 : int src_folded_regcost = MAX_COST;
4624 : 178057902 : int src_related_regcost = MAX_COST;
4625 : 178057902 : int src_elt_regcost = MAX_COST;
4626 : 178057902 : scalar_int_mode int_mode;
4627 : 178057902 : bool is_fake_set = sets[i].is_fake_set;
4628 : :
4629 : 178057902 : dest = SET_DEST (sets[i].rtl);
4630 : 178057902 : src = SET_SRC (sets[i].rtl);
4631 : :
4632 : : /* If SRC is a constant that has no machine mode,
4633 : : hash it with the destination's machine mode.
4634 : : This way we can keep different modes separate. */
4635 : :
4636 : 178057902 : mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4637 : 178057902 : sets[i].mode = mode;
4638 : :
4639 : 178057902 : if (!is_fake_set && src_eqv)
4640 : : {
4641 : 7953644 : machine_mode eqvmode = mode;
4642 : 7953644 : if (GET_CODE (dest) == STRICT_LOW_PART)
4643 : 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4644 : 7953644 : do_not_record = 0;
4645 : 7953644 : hash_arg_in_memory = 0;
4646 : 7953644 : src_eqv_hash = HASH (src_eqv, eqvmode);
4647 : :
4648 : : /* Find the equivalence class for the equivalent expression. */
4649 : :
4650 : 7953644 : if (!do_not_record)
4651 : 7951490 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4652 : :
4653 : 7953644 : src_eqv_volatile = do_not_record;
4654 : 7953644 : src_eqv_in_memory = hash_arg_in_memory;
4655 : : }
4656 : :
4657 : : /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4658 : : value of the INNER register, not the destination. So it is not
4659 : : a valid substitution for the source. But save it for later. */
4660 : 178057902 : if (is_fake_set || GET_CODE (dest) == STRICT_LOW_PART)
4661 : : src_eqv_here = 0;
4662 : : else
4663 : 178057902 : src_eqv_here = src_eqv;
4664 : :
4665 : : /* Simplify and foldable subexpressions in SRC. Then get the fully-
4666 : : simplified result, which may not necessarily be valid. */
4667 : 178057902 : src_folded = fold_rtx (src, NULL);
4668 : :
4669 : : #if 0
4670 : : /* ??? This caused bad code to be generated for the m68k port with -O2.
4671 : : Suppose src is (CONST_INT -1), and that after truncation src_folded
4672 : : is (CONST_INT 3). Suppose src_folded is then used for src_const.
4673 : : At the end we will add src and src_const to the same equivalence
4674 : : class. We now have 3 and -1 on the same equivalence class. This
4675 : : causes later instructions to be mis-optimized. */
4676 : : /* If storing a constant in a bitfield, pre-truncate the constant
4677 : : so we will be able to record it later. */
4678 : : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4679 : : {
4680 : : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4681 : :
4682 : : if (CONST_INT_P (src)
4683 : : && CONST_INT_P (width)
4684 : : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4685 : : && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4686 : : src_folded
4687 : : = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1
4688 : : << INTVAL (width)) - 1));
4689 : : }
4690 : : #endif
4691 : :
4692 : : /* Compute SRC's hash code, and also notice if it
4693 : : should not be recorded at all. In that case,
4694 : : prevent any further processing of this assignment.
4695 : :
4696 : : We set DO_NOT_RECORD if the destination has a REG_UNUSED note.
4697 : : This avoids getting the source register into the tables, where it
4698 : : may be invalidated later (via REG_QTY), then trigger an ICE upon
4699 : : re-insertion.
4700 : :
4701 : : This is only a problem in multi-set insns. If it were a single
4702 : : set the dead copy would have been removed. If the RHS were anything
4703 : : but a simple REG, then we won't call insert_regs and thus there's
4704 : : no potential for triggering the ICE. */
4705 : 356115804 : do_not_record = (REG_P (dest)
4706 : 132802200 : && REG_P (src)
4707 : 210440292 : && find_reg_note (insn, REG_UNUSED, dest));
4708 : 178057902 : hash_arg_in_memory = 0;
4709 : :
4710 : 178057902 : sets[i].src = src;
4711 : 178057902 : sets[i].src_hash = HASH (src, mode);
4712 : 178057902 : sets[i].src_volatile = do_not_record;
4713 : 178057902 : sets[i].src_in_memory = hash_arg_in_memory;
4714 : :
4715 : : /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4716 : : a pseudo, do not record SRC. Using SRC as a replacement for
4717 : : anything else will be incorrect in that situation. Note that
4718 : : this usually occurs only for stack slots, in which case all the
4719 : : RTL would be referring to SRC, so we don't lose any optimization
4720 : : opportunities by not having SRC in the hash table. */
4721 : :
4722 : 178057902 : if (MEM_P (src)
4723 : 23380472 : && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4724 : 902476 : && REG_P (dest)
4725 : 178960378 : && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4726 : 902476 : sets[i].src_volatile = 1;
4727 : :
4728 : 177155426 : else if (GET_CODE (src) == ASM_OPERANDS
4729 : 241139 : && GET_CODE (x) == PARALLEL)
4730 : : {
4731 : : /* Do not record result of a non-volatile inline asm with
4732 : : more than one result. */
4733 : 241115 : if (n_sets > 1)
4734 : 196301 : sets[i].src_volatile = 1;
4735 : :
4736 : 241115 : int j, lim = XVECLEN (x, 0);
4737 : 1262604 : for (j = 0; j < lim; j++)
4738 : : {
4739 : 1025300 : rtx y = XVECEXP (x, 0, j);
4740 : : /* And do not record result of a non-volatile inline asm
4741 : : with "memory" clobber. */
4742 : 1025300 : if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0)))
4743 : : {
4744 : 3811 : sets[i].src_volatile = 1;
4745 : 3811 : break;
4746 : : }
4747 : : }
4748 : : }
4749 : :
4750 : : #if 0
4751 : : /* It is no longer clear why we used to do this, but it doesn't
4752 : : appear to still be needed. So let's try without it since this
4753 : : code hurts cse'ing widened ops. */
4754 : : /* If source is a paradoxical subreg (such as QI treated as an SI),
4755 : : treat it as volatile. It may do the work of an SI in one context
4756 : : where the extra bits are not being used, but cannot replace an SI
4757 : : in general. */
4758 : : if (paradoxical_subreg_p (src))
4759 : : sets[i].src_volatile = 1;
4760 : : #endif
4761 : :
4762 : : /* Locate all possible equivalent forms for SRC. Try to replace
4763 : : SRC in the insn with each cheaper equivalent.
4764 : :
4765 : : We have the following types of equivalents: SRC itself, a folded
4766 : : version, a value given in a REG_EQUAL note, or a value related
4767 : : to a constant.
4768 : :
4769 : : Each of these equivalents may be part of an additional class
4770 : : of equivalents (if more than one is in the table, they must be in
4771 : : the same class; we check for this).
4772 : :
4773 : : If the source is volatile, we don't do any table lookups.
4774 : :
4775 : : We note any constant equivalent for possible later use in a
4776 : : REG_NOTE. */
4777 : :
4778 : 178057902 : if (!sets[i].src_volatile)
4779 : 146311476 : elt = lookup (src, sets[i].src_hash, mode);
4780 : :
4781 : 178057902 : sets[i].src_elt = elt;
4782 : :
4783 : 178057902 : if (elt && src_eqv_here && src_eqv_elt)
4784 : : {
4785 : 2666073 : if (elt->first_same_value != src_eqv_elt->first_same_value)
4786 : : {
4787 : : /* The REG_EQUAL is indicating that two formerly distinct
4788 : : classes are now equivalent. So merge them. */
4789 : 10723 : merge_equiv_classes (elt, src_eqv_elt);
4790 : 10723 : src_eqv_hash = HASH (src_eqv, elt->mode);
4791 : 10723 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4792 : : }
4793 : :
4794 : : src_eqv_here = 0;
4795 : : }
4796 : :
4797 : 175191794 : else if (src_eqv_elt)
4798 : 178057902 : elt = src_eqv_elt;
4799 : :
4800 : : /* Try to find a constant somewhere and record it in `src_const'.
4801 : : Record its table element, if any, in `src_const_elt'. Look in
4802 : : any known equivalences first. (If the constant is not in the
4803 : : table, also set `sets[i].src_const_hash'). */
4804 : 178057902 : if (elt)
4805 : 85154346 : for (p = elt->first_same_value; p; p = p->next_same_value)
4806 : 68200012 : if (p->is_const)
4807 : : {
4808 : 14197277 : src_const = p->exp;
4809 : 14197277 : src_const_elt = elt;
4810 : 14197277 : break;
4811 : : }
4812 : :
4813 : 31151611 : if (src_const == 0
4814 : 163860625 : && (CONSTANT_P (src_folded)
4815 : : /* Consider (minus (label_ref L1) (label_ref L2)) as
4816 : : "constant" here so we will record it. This allows us
4817 : : to fold switch statements when an ADDR_DIFF_VEC is used. */
4818 : 139358356 : || (GET_CODE (src_folded) == MINUS
4819 : 1624576 : && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4820 : 95 : && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4821 : : src_const = src_folded, src_const_elt = elt;
4822 : 153555547 : else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4823 : 415786 : src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4824 : :
4825 : : /* If we don't know if the constant is in the table, get its
4826 : : hash code and look it up. */
4827 : 178057902 : if (src_const && src_const_elt == 0)
4828 : : {
4829 : 24918108 : sets[i].src_const_hash = HASH (src_const, mode);
4830 : 24918108 : src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4831 : : }
4832 : :
4833 : 178057902 : sets[i].src_const = src_const;
4834 : 178057902 : sets[i].src_const_elt = src_const_elt;
4835 : :
4836 : : /* If the constant and our source are both in the table, mark them as
4837 : : equivalent. Otherwise, if a constant is in the table but the source
4838 : : isn't, set ELT to it. */
4839 : 178057902 : if (src_const_elt && elt
4840 : 14197310 : && src_const_elt->first_same_value != elt->first_same_value)
4841 : 0 : merge_equiv_classes (elt, src_const_elt);
4842 : 178057902 : else if (src_const_elt && elt == 0)
4843 : 178057902 : elt = src_const_elt;
4844 : :
4845 : : /* See if there is a register linearly related to a constant
4846 : : equivalent of SRC. */
4847 : 178057902 : if (src_const
4848 : 39115418 : && (GET_CODE (src_const) == CONST
4849 : 38508735 : || (src_const_elt && src_const_elt->related_value != 0)))
4850 : : {
4851 : 690047 : src_related = use_related_value (src_const, src_const_elt);
4852 : 690047 : if (src_related)
4853 : : {
4854 : 223485 : struct table_elt *src_related_elt
4855 : 223485 : = lookup (src_related, HASH (src_related, mode), mode);
4856 : 223485 : if (src_related_elt && elt)
4857 : : {
4858 : 2138 : if (elt->first_same_value
4859 : 2138 : != src_related_elt->first_same_value)
4860 : : /* This can occur when we previously saw a CONST
4861 : : involving a SYMBOL_REF and then see the SYMBOL_REF
4862 : : twice. Merge the involved classes. */
4863 : 1861 : merge_equiv_classes (elt, src_related_elt);
4864 : :
4865 : : src_related = 0;
4866 : 178057902 : src_related_elt = 0;
4867 : : }
4868 : 221347 : else if (src_related_elt && elt == 0)
4869 : 7011 : elt = src_related_elt;
4870 : : }
4871 : : }
4872 : :
4873 : : /* See if we have a CONST_INT that is already in a register in a
4874 : : wider mode. */
4875 : :
4876 : 38894071 : if (src_const && src_related == 0 && CONST_INT_P (src_const)
4877 : 16958819 : && is_int_mode (mode, &int_mode)
4878 : 196958700 : && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD)
4879 : : {
4880 : 7230300 : opt_scalar_int_mode wider_mode_iter;
4881 : 18976580 : FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode)
4882 : : {
4883 : 18976580 : scalar_int_mode wider_mode = wider_mode_iter.require ();
4884 : 19834652 : if (GET_MODE_PRECISION (wider_mode) > BITS_PER_WORD)
4885 : : break;
4886 : :
4887 : 11966591 : struct table_elt *const_elt
4888 : 11966591 : = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4889 : :
4890 : 11966591 : if (const_elt == 0)
4891 : 11279441 : continue;
4892 : :
4893 : 687150 : for (const_elt = const_elt->first_same_value;
4894 : 2040655 : const_elt; const_elt = const_elt->next_same_value)
4895 : 1573816 : if (REG_P (const_elt->exp))
4896 : : {
4897 : 220311 : src_related = gen_lowpart (int_mode, const_elt->exp);
4898 : 220311 : break;
4899 : : }
4900 : :
4901 : 687150 : if (src_related != 0)
4902 : : break;
4903 : : }
4904 : : }
4905 : :
4906 : : /* Another possibility is that we have an AND with a constant in
4907 : : a mode narrower than a word. If so, it might have been generated
4908 : : as part of an "if" which would narrow the AND. If we already
4909 : : have done the AND in a wider mode, we can use a SUBREG of that
4910 : : value. */
4911 : :
4912 : 174252753 : if (flag_expensive_optimizations && ! src_related
4913 : 173824690 : && is_a <scalar_int_mode> (mode, &int_mode)
4914 : 120753845 : && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4915 : 179460722 : && GET_MODE_SIZE (int_mode) < UNITS_PER_WORD)
4916 : : {
4917 : 881068 : opt_scalar_int_mode tmode_iter;
4918 : 881068 : rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4919 : :
4920 : 2481071 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4921 : : {
4922 : 2481071 : scalar_int_mode tmode = tmode_iter.require ();
4923 : 5093425 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4924 : : break;
4925 : :
4926 : 1600050 : rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4927 : 1600050 : struct table_elt *larger_elt;
4928 : :
4929 : 1600050 : if (inner)
4930 : : {
4931 : 1599742 : PUT_MODE (new_and, tmode);
4932 : 1599742 : XEXP (new_and, 0) = inner;
4933 : 1599742 : larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4934 : 1599742 : if (larger_elt == 0)
4935 : 1599695 : continue;
4936 : :
4937 : 47 : for (larger_elt = larger_elt->first_same_value;
4938 : 47 : larger_elt; larger_elt = larger_elt->next_same_value)
4939 : 47 : if (REG_P (larger_elt->exp))
4940 : : {
4941 : 47 : src_related
4942 : 47 : = gen_lowpart (int_mode, larger_elt->exp);
4943 : 47 : break;
4944 : : }
4945 : :
4946 : 47 : if (src_related)
4947 : : break;
4948 : : }
4949 : : }
4950 : : }
4951 : :
4952 : : /* See if a MEM has already been loaded with a widening operation;
4953 : : if it has, we can use a subreg of that. Many CISC machines
4954 : : also have such operations, but this is only likely to be
4955 : : beneficial on these machines. */
4956 : :
4957 : 178057902 : rtx_code extend_op;
4958 : 174252753 : if (flag_expensive_optimizations && src_related == 0
4959 : 173824643 : && MEM_P (src) && ! do_not_record
4960 : 21844046 : && is_a <scalar_int_mode> (mode, &int_mode)
4961 : 196272991 : && (extend_op = load_extend_op (int_mode)) != UNKNOWN)
4962 : : {
4963 : : #if GCC_VERSION >= 5000
4964 : 0 : struct rtx_def memory_extend_buf;
4965 : 0 : rtx memory_extend_rtx = &memory_extend_buf;
4966 : : #else
4967 : : /* Workaround GCC < 5 bug, fixed in r5-3834 as part of PR63362
4968 : : fix. */
4969 : : alignas (rtx_def) unsigned char memory_extended_buf[sizeof (rtx_def)];
4970 : : rtx memory_extend_rtx = (rtx) &memory_extended_buf[0];
4971 : : #endif
4972 : :
4973 : : /* Set what we are trying to extend and the operation it might
4974 : : have been extended with. */
4975 : 0 : memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
4976 : 0 : PUT_CODE (memory_extend_rtx, extend_op);
4977 : 0 : XEXP (memory_extend_rtx, 0) = src;
4978 : :
4979 : 0 : opt_scalar_int_mode tmode_iter;
4980 : 0 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4981 : : {
4982 : 0 : struct table_elt *larger_elt;
4983 : :
4984 : 0 : scalar_int_mode tmode = tmode_iter.require ();
4985 : 0 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4986 : : break;
4987 : :
4988 : 0 : PUT_MODE (memory_extend_rtx, tmode);
4989 : 0 : larger_elt = lookup (memory_extend_rtx,
4990 : : HASH (memory_extend_rtx, tmode), tmode);
4991 : 0 : if (larger_elt == 0)
4992 : 0 : continue;
4993 : :
4994 : 0 : for (larger_elt = larger_elt->first_same_value;
4995 : 0 : larger_elt; larger_elt = larger_elt->next_same_value)
4996 : 0 : if (REG_P (larger_elt->exp))
4997 : : {
4998 : 0 : src_related = gen_lowpart (int_mode, larger_elt->exp);
4999 : 0 : break;
5000 : : }
5001 : :
5002 : 0 : if (src_related)
5003 : : break;
5004 : : }
5005 : : }
5006 : :
5007 : : /* Try to express the constant using a register+offset expression
5008 : : derived from a constant anchor. */
5009 : :
5010 : 178057902 : if (targetm.const_anchor
5011 : 0 : && !src_related
5012 : 0 : && src_const
5013 : 0 : && GET_CODE (src_const) == CONST_INT)
5014 : : {
5015 : 0 : src_related = try_const_anchors (src_const, mode);
5016 : 0 : src_related_is_const_anchor = src_related != NULL_RTX;
5017 : : }
5018 : :
5019 : : /* Try to re-materialize a vec_dup with an existing constant. */
5020 : 178057902 : rtx src_elt;
5021 : 5287571 : if ((!src_eqv_here || CONSTANT_P (src_eqv_here))
5022 : 180041258 : && const_vec_duplicate_p (src, &src_elt))
5023 : : {
5024 : 488785 : machine_mode const_mode = GET_MODE_INNER (GET_MODE (src));
5025 : 488785 : struct table_elt *related_elt
5026 : 488785 : = lookup (src_elt, HASH (src_elt, const_mode), const_mode);
5027 : 488785 : if (related_elt)
5028 : : {
5029 : 204738 : for (related_elt = related_elt->first_same_value;
5030 : 1294246 : related_elt; related_elt = related_elt->next_same_value)
5031 : 1112526 : if (REG_P (related_elt->exp))
5032 : : {
5033 : : /* We don't need to compare costs with an existing (constant)
5034 : : src_eqv_here, since any such src_eqv_here should already be
5035 : : available in src_const. */
5036 : 23018 : src_eqv_here
5037 : 23018 : = gen_rtx_VEC_DUPLICATE (GET_MODE (src),
5038 : : related_elt->exp);
5039 : 23018 : break;
5040 : : }
5041 : : }
5042 : : }
5043 : :
5044 : 178057902 : if (src == src_folded)
5045 : 173917369 : src_folded = 0;
5046 : :
5047 : : /* At this point, ELT, if nonzero, points to a class of expressions
5048 : : equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5049 : : and SRC_RELATED, if nonzero, each contain additional equivalent
5050 : : expressions. Prune these latter expressions by deleting expressions
5051 : : already in the equivalence class.
5052 : :
5053 : : Check for an equivalent identical to the destination. If found,
5054 : : this is the preferred equivalent since it will likely lead to
5055 : : elimination of the insn. Indicate this by placing it in
5056 : : `src_related'. */
5057 : :
5058 : 178057902 : if (elt)
5059 : 31224290 : elt = elt->first_same_value;
5060 : 265916258 : for (p = elt; p; p = p->next_same_value)
5061 : : {
5062 : 87858356 : enum rtx_code code = GET_CODE (p->exp);
5063 : :
5064 : : /* If the expression is not valid, ignore it. Then we do not
5065 : : have to check for validity below. In most cases, we can use
5066 : : `rtx_equal_p', since canonicalization has already been done. */
5067 : 87858356 : if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5068 : 4761 : continue;
5069 : :
5070 : : /* Also skip paradoxical subregs, unless that's what we're
5071 : : looking for. */
5072 : 87856606 : if (paradoxical_subreg_p (p->exp)
5073 : 87853595 : && ! (src != 0
5074 : 3011 : && GET_CODE (src) == SUBREG
5075 : 3011 : && GET_MODE (src) == GET_MODE (p->exp)
5076 : 3011 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5077 : 3011 : GET_MODE (SUBREG_REG (p->exp)))))
5078 : 3011 : continue;
5079 : :
5080 : 87850584 : if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5081 : : src = 0;
5082 : 1921231 : else if (src_folded && GET_CODE (src_folded) == code
5083 : 57555545 : && rtx_equal_p (src_folded, p->exp))
5084 : : src_folded = 0;
5085 : 853794 : else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5086 : 56820678 : && rtx_equal_p (src_eqv_here, p->exp))
5087 : : src_eqv_here = 0;
5088 : 514219 : else if (src_related && GET_CODE (src_related) == code
5089 : 56318599 : && rtx_equal_p (src_related, p->exp))
5090 : : src_related = 0;
5091 : :
5092 : : /* This is the same as the destination of the insns, we want
5093 : : to prefer it. The code below will then give it a negative
5094 : : cost. */
5095 : 87850584 : if (!dest_related
5096 : 87850584 : && GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5097 : 225795 : dest_related = p->exp;
5098 : : }
5099 : :
5100 : : /* Find the cheapest valid equivalent, trying all the available
5101 : : possibilities. Prefer items not in the hash table to ones
5102 : : that are when they are equal cost. Note that we can never
5103 : : worsen an insn as the current contents will also succeed.
5104 : : If we find an equivalent identical to the destination, use it as best,
5105 : : since this insn will probably be eliminated in that case. */
5106 : 178057902 : if (src)
5107 : : {
5108 : 147257819 : if (rtx_equal_p (src, dest))
5109 : : src_cost = src_regcost = -1;
5110 : : else
5111 : : {
5112 : 147257748 : src_cost = COST (src, mode);
5113 : 147257748 : src_regcost = approx_reg_cost (src);
5114 : : }
5115 : : }
5116 : :
5117 : 178057902 : if (src_eqv_here)
5118 : : {
5119 : 5036388 : if (rtx_equal_p (src_eqv_here, dest))
5120 : : src_eqv_cost = src_eqv_regcost = -1;
5121 : : else
5122 : : {
5123 : 5036388 : src_eqv_cost = COST (src_eqv_here, mode);
5124 : 5036388 : src_eqv_regcost = approx_reg_cost (src_eqv_here);
5125 : : }
5126 : : }
5127 : :
5128 : 178057902 : if (src_folded)
5129 : : {
5130 : 3636121 : if (rtx_equal_p (src_folded, dest))
5131 : : src_folded_cost = src_folded_regcost = -1;
5132 : : else
5133 : : {
5134 : 3622828 : src_folded_cost = COST (src_folded, mode);
5135 : 3622828 : src_folded_regcost = approx_reg_cost (src_folded);
5136 : : }
5137 : : }
5138 : :
5139 : 178057902 : if (dest_related)
5140 : : {
5141 : : src_related_cost = src_related_regcost = -1;
5142 : : /* Handle it as src_related. */
5143 : : src_related = dest_related;
5144 : : }
5145 : 177832107 : else if (src_related)
5146 : : {
5147 : 439863 : src_related_cost = COST (src_related, mode);
5148 : 439863 : src_related_regcost = approx_reg_cost (src_related);
5149 : :
5150 : : /* If a const-anchor is used to synthesize a constant that
5151 : : normally requires multiple instructions then slightly prefer
5152 : : it over the original sequence. These instructions are likely
5153 : : to become redundant now. We can't compare against the cost
5154 : : of src_eqv_here because, on MIPS for example, multi-insn
5155 : : constants have zero cost; they are assumed to be hoisted from
5156 : : loops. */
5157 : 439863 : if (src_related_is_const_anchor
5158 : 439863 : && src_related_cost == src_cost
5159 : 0 : && src_eqv_here)
5160 : 0 : src_related_cost--;
5161 : : }
5162 : :
5163 : : /* If this was an indirect jump insn, a known label will really be
5164 : : cheaper even though it looks more expensive. */
5165 : 178057902 : if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5166 : 178057902 : src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5167 : :
5168 : : /* Terminate loop when replacement made. This must terminate since
5169 : : the current contents will be tested and will always be valid. */
5170 : 182876054 : while (!is_fake_set)
5171 : : {
5172 : : rtx trial;
5173 : :
5174 : : /* Skip invalid entries. */
5175 : 31907951 : while (elt && !REG_P (elt->exp)
5176 : 190022693 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5177 : 0 : elt = elt->next_same_value;
5178 : :
5179 : : /* A paradoxical subreg would be bad here: it'll be the right
5180 : : size, but later may be adjusted so that the upper bits aren't
5181 : : what we want. So reject it. */
5182 : 182392846 : if (elt != 0
5183 : 31907951 : && paradoxical_subreg_p (elt->exp)
5184 : : /* It is okay, though, if the rtx we're trying to match
5185 : : will ignore any of the bits we can't predict. */
5186 : 182392846 : && ! (src != 0
5187 : 1495 : && GET_CODE (src) == SUBREG
5188 : 1495 : && GET_MODE (src) == GET_MODE (elt->exp)
5189 : 1495 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5190 : 1495 : GET_MODE (SUBREG_REG (elt->exp)))))
5191 : : {
5192 : 1495 : elt = elt->next_same_value;
5193 : 1495 : continue;
5194 : : }
5195 : :
5196 : 182389856 : if (elt)
5197 : : {
5198 : 31906456 : src_elt_cost = elt->cost;
5199 : 31906456 : src_elt_regcost = elt->regcost;
5200 : : }
5201 : :
5202 : : /* Find cheapest and skip it for the next time. For items
5203 : : of equal cost, use this order:
5204 : : src_folded, src, src_eqv, src_related and hash table entry. */
5205 : 182389856 : if (src_folded
5206 : 7494350 : && preferable (src_folded_cost, src_folded_regcost,
5207 : : src_cost, src_regcost) <= 0
5208 : 5566544 : && preferable (src_folded_cost, src_folded_regcost,
5209 : : src_eqv_cost, src_eqv_regcost) <= 0
5210 : 4798124 : && preferable (src_folded_cost, src_folded_regcost,
5211 : : src_related_cost, src_related_regcost) <= 0
5212 : 187173966 : && preferable (src_folded_cost, src_folded_regcost,
5213 : : src_elt_cost, src_elt_regcost) <= 0)
5214 : : trial = src_folded, src_folded_cost = MAX_COST;
5215 : 177882363 : else if (src
5216 : 146432934 : && preferable (src_cost, src_regcost,
5217 : : src_eqv_cost, src_eqv_regcost) <= 0
5218 : 144884448 : && preferable (src_cost, src_regcost,
5219 : : src_related_cost, src_related_regcost) <= 0
5220 : 322737190 : && preferable (src_cost, src_regcost,
5221 : : src_elt_cost, src_elt_regcost) <= 0)
5222 : : trial = src, src_cost = MAX_COST;
5223 : 33103545 : else if (src_eqv_here
5224 : 1754255 : && preferable (src_eqv_cost, src_eqv_regcost,
5225 : : src_related_cost, src_related_regcost) <= 0
5226 : 34855313 : && preferable (src_eqv_cost, src_eqv_regcost,
5227 : : src_elt_cost, src_elt_regcost) <= 0)
5228 : : trial = src_eqv_here, src_eqv_cost = MAX_COST;
5229 : 31557850 : else if (src_related
5230 : 31557850 : && preferable (src_related_cost, src_related_regcost,
5231 : : src_elt_cost, src_elt_regcost) <= 0)
5232 : : trial = src_related, src_related_cost = MAX_COST;
5233 : : else
5234 : : {
5235 : 31312755 : trial = elt->exp;
5236 : 31312755 : elt = elt->next_same_value;
5237 : 31312755 : src_elt_cost = MAX_COST;
5238 : : }
5239 : :
5240 : : /* Try to optimize
5241 : : (set (reg:M N) (const_int A))
5242 : : (set (reg:M2 O) (const_int B))
5243 : : (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5244 : : (reg:M2 O)). */
5245 : 182389856 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5246 : 4935 : && CONST_INT_P (trial)
5247 : 794 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5248 : 794 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5249 : 622 : && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5250 : 182389856 : && (known_ge
5251 : : (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))),
5252 : : INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))))
5253 : 182389986 : && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5254 : 130 : + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5255 : : <= HOST_BITS_PER_WIDE_INT))
5256 : : {
5257 : 130 : rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5258 : 130 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5259 : 130 : rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5260 : 130 : unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5261 : 130 : struct table_elt *dest_elt
5262 : 130 : = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5263 : 130 : rtx dest_cst = NULL;
5264 : :
5265 : 130 : if (dest_elt)
5266 : 336 : for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5267 : 241 : if (p->is_const && CONST_INT_P (p->exp))
5268 : : {
5269 : : dest_cst = p->exp;
5270 : : break;
5271 : : }
5272 : 95 : if (dest_cst)
5273 : : {
5274 : 0 : HOST_WIDE_INT val = INTVAL (dest_cst);
5275 : 0 : HOST_WIDE_INT mask;
5276 : 0 : unsigned int shift;
5277 : : /* This is the mode of DEST_CST as well. */
5278 : 0 : scalar_int_mode dest_mode
5279 : 0 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
5280 : 0 : if (BITS_BIG_ENDIAN)
5281 : : shift = GET_MODE_PRECISION (dest_mode)
5282 : : - INTVAL (pos) - INTVAL (width);
5283 : : else
5284 : 0 : shift = INTVAL (pos);
5285 : 0 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5286 : : mask = HOST_WIDE_INT_M1;
5287 : : else
5288 : 0 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
5289 : 0 : val &= ~(mask << shift);
5290 : 0 : val |= (INTVAL (trial) & mask) << shift;
5291 : 0 : val = trunc_int_for_mode (val, dest_mode);
5292 : 0 : validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5293 : : dest_reg, 1);
5294 : 0 : validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5295 : : GEN_INT (val), 1);
5296 : 0 : if (apply_change_group ())
5297 : : {
5298 : 0 : rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5299 : 0 : if (note)
5300 : : {
5301 : 0 : remove_note (insn, note);
5302 : 0 : df_notes_rescan (insn);
5303 : : }
5304 : 0 : src_eqv = NULL_RTX;
5305 : 0 : src_eqv_elt = NULL;
5306 : 0 : src_eqv_volatile = 0;
5307 : 0 : src_eqv_in_memory = 0;
5308 : 0 : src_eqv_hash = 0;
5309 : 0 : repeat = true;
5310 : 0 : break;
5311 : : }
5312 : : }
5313 : : }
5314 : :
5315 : : /* We don't normally have an insn matching (set (pc) (pc)), so
5316 : : check for this separately here. We will delete such an
5317 : : insn below.
5318 : :
5319 : : For other cases such as a table jump or conditional jump
5320 : : where we know the ultimate target, go ahead and replace the
5321 : : operand. While that may not make a valid insn, we will
5322 : : reemit the jump below (and also insert any necessary
5323 : : barriers). */
5324 : 179778639 : if (n_sets == 1 && dest == pc_rtx
5325 : 200339881 : && (trial == pc_rtx
5326 : 17936808 : || (GET_CODE (trial) == LABEL_REF
5327 : 9343 : && ! condjump_p (insn))))
5328 : : {
5329 : : /* Don't substitute non-local labels, this confuses CFG. */
5330 : 15834 : if (GET_CODE (trial) == LABEL_REF
5331 : 14526 : && LABEL_REF_NONLOCAL_P (trial))
5332 : 1308 : continue;
5333 : :
5334 : 13218 : SET_SRC (sets[i].rtl) = trial;
5335 : 13218 : cse_jumps_altered = true;
5336 : 13218 : break;
5337 : : }
5338 : :
5339 : : /* Similarly, lots of targets don't allow no-op
5340 : : (set (mem x) (mem x)) moves. Even (set (reg x) (reg x))
5341 : : might be impossible for certain registers (like CC registers). */
5342 : 182375330 : else if (n_sets == 1
5343 : 179764113 : && !CALL_P (insn)
5344 : 179278415 : && (MEM_P (trial) || REG_P (trial))
5345 : 73895111 : && rtx_equal_p (trial, dest)
5346 : 214073 : && !side_effects_p (dest)
5347 : 214073 : && (cfun->can_delete_dead_exceptions
5348 : 63713 : || insn_nothrow_p (insn))
5349 : : /* We can only remove the later store if the earlier aliases
5350 : : at least all accesses the later one. */
5351 : 182571529 : && (!MEM_P (trial)
5352 : 21137 : || ((MEM_ALIAS_SET (dest) == MEM_ALIAS_SET (trial)
5353 : 5431 : || alias_set_subset_of (MEM_ALIAS_SET (dest),
5354 : : MEM_ALIAS_SET (trial)))
5355 : 15990 : && (!MEM_EXPR (trial)
5356 : 15509 : || refs_same_for_tbaa_p (MEM_EXPR (trial),
5357 : 15509 : MEM_EXPR (dest))))))
5358 : : {
5359 : 189139 : SET_SRC (sets[i].rtl) = trial;
5360 : 189139 : noop_insn = true;
5361 : 189139 : break;
5362 : : }
5363 : :
5364 : : /* Reject certain invalid forms of CONST that we create. */
5365 : 182186191 : else if (CONSTANT_P (trial)
5366 : 29982356 : && GET_CODE (trial) == CONST
5367 : : /* Reject cases that will cause decode_rtx_const to
5368 : : die. On the alpha when simplifying a switch, we
5369 : : get (const (truncate (minus (label_ref)
5370 : : (label_ref)))). */
5371 : 572865 : && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5372 : : /* Likewise on IA-64, except without the
5373 : : truncate. */
5374 : 572865 : || (GET_CODE (XEXP (trial, 0)) == MINUS
5375 : 0 : && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5376 : 0 : && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5377 : : /* Do nothing for this case. */
5378 : : ;
5379 : :
5380 : : /* Do not replace anything with a MEM, except the replacement
5381 : : is a no-op. This allows this loop to terminate. */
5382 : 182186191 : else if (MEM_P (trial) && !rtx_equal_p (trial, SET_SRC(sets[i].rtl)))
5383 : : /* Do nothing for this case. */
5384 : : ;
5385 : :
5386 : : /* Look for a substitution that makes a valid insn. */
5387 : 182116369 : else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5388 : : trial, 0))
5389 : : {
5390 : 177370842 : rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5391 : :
5392 : : /* The result of apply_change_group can be ignored; see
5393 : : canon_reg. */
5394 : :
5395 : 177370842 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5396 : 177370842 : apply_change_group ();
5397 : :
5398 : 177370842 : break;
5399 : : }
5400 : :
5401 : : /* If the current function uses a constant pool and this is a
5402 : : constant, try making a pool entry. Put it in src_folded
5403 : : unless we already have done this since that is where it
5404 : : likely came from. */
5405 : :
5406 : 4745527 : else if (crtl->uses_const_pool
5407 : 3295996 : && CONSTANT_P (trial)
5408 : 2369238 : && !CONST_INT_P (trial)
5409 : 2350515 : && (src_folded == 0 || !MEM_P (src_folded))
5410 : 1594307 : && GET_MODE_CLASS (mode) != MODE_CC
5411 : 1594307 : && mode != VOIDmode)
5412 : : {
5413 : 1594307 : src_folded = force_const_mem (mode, trial);
5414 : 1594307 : if (src_folded)
5415 : : {
5416 : 1593286 : src_folded_cost = COST (src_folded, mode);
5417 : 1593286 : src_folded_regcost = approx_reg_cost (src_folded);
5418 : : }
5419 : : }
5420 : : }
5421 : :
5422 : : /* If we changed the insn too much, handle this set from scratch. */
5423 : 178057902 : if (repeat)
5424 : : {
5425 : 0 : i--;
5426 : 0 : continue;
5427 : : }
5428 : :
5429 : 178057902 : src = SET_SRC (sets[i].rtl);
5430 : :
5431 : : /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5432 : : However, there is an important exception: If both are registers
5433 : : that are not the head of their equivalence class, replace SET_SRC
5434 : : with the head of the class. If we do not do this, we will have
5435 : : both registers live over a portion of the basic block. This way,
5436 : : their lifetimes will likely abut instead of overlapping. */
5437 : 178057902 : if (!is_fake_set
5438 : 177573199 : && REG_P (dest)
5439 : 310859649 : && REGNO_QTY_VALID_P (REGNO (dest)))
5440 : : {
5441 : 7301115 : int dest_q = REG_QTY (REGNO (dest));
5442 : 7301115 : struct qty_table_elem *dest_ent = &qty_table[dest_q];
5443 : :
5444 : 7301115 : if (dest_ent->mode == GET_MODE (dest)
5445 : 5638310 : && dest_ent->first_reg != REGNO (dest)
5446 : 124180 : && REG_P (src) && REGNO (src) == REGNO (dest)
5447 : : /* Don't do this if the original insn had a hard reg as
5448 : : SET_SRC or SET_DEST. */
5449 : 4331 : && (!REG_P (sets[i].src)
5450 : 3283 : || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5451 : 7305426 : && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5452 : : /* We can't call canon_reg here because it won't do anything if
5453 : : SRC is a hard register. */
5454 : : {
5455 : 4311 : int src_q = REG_QTY (REGNO (src));
5456 : 4311 : struct qty_table_elem *src_ent = &qty_table[src_q];
5457 : 4311 : int first = src_ent->first_reg;
5458 : 4311 : rtx new_src
5459 : : = (first >= FIRST_PSEUDO_REGISTER
5460 : 4311 : ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5461 : :
5462 : : /* We must use validate-change even for this, because this
5463 : : might be a special no-op instruction, suitable only to
5464 : : tag notes onto. */
5465 : 4311 : if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5466 : : {
5467 : 4311 : src = new_src;
5468 : : /* If we had a constant that is cheaper than what we are now
5469 : : setting SRC to, use that constant. We ignored it when we
5470 : : thought we could make this into a no-op. */
5471 : 1623 : if (src_const && COST (src_const, mode) < COST (src, mode)
5472 : 4311 : && validate_change (insn, &SET_SRC (sets[i].rtl),
5473 : : src_const, 0))
5474 : : src = src_const;
5475 : : }
5476 : : }
5477 : : }
5478 : :
5479 : : /* If we made a change, recompute SRC values. */
5480 : 178057902 : if (src != sets[i].src)
5481 : : {
5482 : 2977108 : do_not_record = 0;
5483 : 2977108 : hash_arg_in_memory = 0;
5484 : 2977108 : sets[i].src = src;
5485 : 2977108 : sets[i].src_hash = HASH (src, mode);
5486 : 2977108 : sets[i].src_volatile = do_not_record;
5487 : 2977108 : sets[i].src_in_memory = hash_arg_in_memory;
5488 : 2977108 : sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5489 : : }
5490 : :
5491 : : /* If this is a single SET, we are setting a register, and we have an
5492 : : equivalent constant, we want to add a REG_EQUAL note if the constant
5493 : : is different from the source. We don't want to do it for a constant
5494 : : pseudo since verifying that this pseudo hasn't been eliminated is a
5495 : : pain; moreover such a note won't help anything.
5496 : :
5497 : : Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5498 : : which can be created for a reference to a compile time computable
5499 : : entry in a jump table. */
5500 : 178057902 : if (n_sets == 1
5501 : 175422885 : && REG_P (dest)
5502 : 130977852 : && src_const
5503 : 26891633 : && !REG_P (src_const)
5504 : 26866132 : && !(GET_CODE (src_const) == SUBREG
5505 : 0 : && REG_P (SUBREG_REG (src_const)))
5506 : 26866132 : && !(GET_CODE (src_const) == CONST
5507 : 361264 : && GET_CODE (XEXP (src_const, 0)) == MINUS
5508 : 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5509 : 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)
5510 : 204924034 : && !rtx_equal_p (src, src_const))
5511 : : {
5512 : : /* Make sure that the rtx is not shared. */
5513 : 6779155 : src_const = copy_rtx (src_const);
5514 : :
5515 : : /* Record the actual constant value in a REG_EQUAL note,
5516 : : making a new one if one does not already exist. */
5517 : 6779155 : set_unique_reg_note (insn, REG_EQUAL, src_const);
5518 : 6779155 : df_notes_rescan (insn);
5519 : : }
5520 : :
5521 : : /* Now deal with the destination. */
5522 : 178057902 : do_not_record = 0;
5523 : :
5524 : : /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5525 : 178057902 : while (GET_CODE (dest) == SUBREG
5526 : 178078651 : || GET_CODE (dest) == ZERO_EXTRACT
5527 : 357430160 : || GET_CODE (dest) == STRICT_LOW_PART)
5528 : 1298542 : dest = XEXP (dest, 0);
5529 : :
5530 : 178057902 : sets[i].inner_dest = dest;
5531 : :
5532 : 178057902 : if (MEM_P (dest))
5533 : : {
5534 : : #ifdef PUSH_ROUNDING
5535 : : /* Stack pushes invalidate the stack pointer. */
5536 : 26035405 : rtx addr = XEXP (dest, 0);
5537 : 26035405 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5538 : 5413245 : && XEXP (addr, 0) == stack_pointer_rtx)
5539 : 5413245 : invalidate (stack_pointer_rtx, VOIDmode);
5540 : : #endif
5541 : 26035405 : dest = fold_rtx (dest, insn);
5542 : : }
5543 : :
5544 : : /* Compute the hash code of the destination now,
5545 : : before the effects of this instruction are recorded,
5546 : : since the register values used in the address computation
5547 : : are those before this instruction. */
5548 : 178057902 : sets[i].dest_hash = HASH (dest, mode);
5549 : :
5550 : : /* Don't enter a bit-field in the hash table
5551 : : because the value in it after the store
5552 : : may not equal what was stored, due to truncation. */
5553 : :
5554 : 178057902 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5555 : : {
5556 : 4935 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5557 : :
5558 : 4935 : if (src_const != 0 && CONST_INT_P (src_const)
5559 : 794 : && CONST_INT_P (width)
5560 : 794 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5561 : 794 : && ! (INTVAL (src_const)
5562 : 794 : & (HOST_WIDE_INT_M1U << INTVAL (width))))
5563 : : /* Exception: if the value is constant,
5564 : : and it won't be truncated, record it. */
5565 : : ;
5566 : : else
5567 : : {
5568 : : /* This is chosen so that the destination will be invalidated
5569 : : but no new value will be recorded.
5570 : : We must invalidate because sometimes constant
5571 : : values can be recorded for bitfields. */
5572 : 4142 : sets[i].src_elt = 0;
5573 : 4142 : sets[i].src_volatile = 1;
5574 : 4142 : src_eqv = 0;
5575 : 4142 : src_eqv_elt = 0;
5576 : : }
5577 : : }
5578 : :
5579 : : /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5580 : : the insn. */
5581 : 178052967 : else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5582 : : {
5583 : : /* One less use of the label this insn used to jump to. */
5584 : 13217 : cse_cfg_altered |= delete_insn_and_edges (insn);
5585 : 13217 : cse_jumps_altered = true;
5586 : : /* No more processing for this set. */
5587 : 13217 : sets[i].rtl = 0;
5588 : : }
5589 : :
5590 : : /* Similarly for no-op moves. */
5591 : 178039750 : else if (noop_insn)
5592 : : {
5593 : 189139 : if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
5594 : 0 : cse_cfg_altered = true;
5595 : 189139 : cse_cfg_altered |= delete_insn_and_edges (insn);
5596 : : /* No more processing for this set. */
5597 : 189139 : sets[i].rtl = 0;
5598 : : }
5599 : :
5600 : : /* If this SET is now setting PC to a label, we know it used to
5601 : : be a conditional or computed branch. */
5602 : 17927893 : else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5603 : 177858646 : && !LABEL_REF_NONLOCAL_P (src))
5604 : : {
5605 : : /* We reemit the jump in as many cases as possible just in
5606 : : case the form of an unconditional jump is significantly
5607 : : different than a computed jump or conditional jump.
5608 : :
5609 : : If this insn has multiple sets, then reemitting the
5610 : : jump is nontrivial. So instead we just force rerecognition
5611 : : and hope for the best. */
5612 : 8035 : if (n_sets == 1)
5613 : : {
5614 : 8035 : rtx_jump_insn *new_rtx;
5615 : 8035 : rtx note;
5616 : :
5617 : 8035 : rtx_insn *seq = targetm.gen_jump (XEXP (src, 0));
5618 : 8035 : new_rtx = emit_jump_insn_before (seq, insn);
5619 : 8035 : JUMP_LABEL (new_rtx) = XEXP (src, 0);
5620 : 8035 : LABEL_NUSES (XEXP (src, 0))++;
5621 : :
5622 : : /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5623 : 8035 : note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5624 : 8035 : if (note)
5625 : : {
5626 : 0 : XEXP (note, 1) = NULL_RTX;
5627 : 0 : REG_NOTES (new_rtx) = note;
5628 : : }
5629 : :
5630 : 8035 : cse_cfg_altered |= delete_insn_and_edges (insn);
5631 : 8035 : insn = new_rtx;
5632 : : }
5633 : : else
5634 : 0 : INSN_CODE (insn) = -1;
5635 : :
5636 : : /* Do not bother deleting any unreachable code, let jump do it. */
5637 : 8035 : cse_jumps_altered = true;
5638 : 8035 : sets[i].rtl = 0;
5639 : : }
5640 : :
5641 : : /* If destination is volatile, invalidate it and then do no further
5642 : : processing for this assignment. */
5643 : :
5644 : 177842576 : else if (do_not_record)
5645 : : {
5646 : 51189919 : invalidate_dest (dest);
5647 : 51189919 : sets[i].rtl = 0;
5648 : : }
5649 : :
5650 : 178057902 : if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5651 : : {
5652 : 1350773 : do_not_record = 0;
5653 : 1350773 : sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5654 : 1350773 : if (do_not_record)
5655 : : {
5656 : 1048 : invalidate_dest (SET_DEST (sets[i].rtl));
5657 : 1048 : sets[i].rtl = 0;
5658 : : }
5659 : : }
5660 : : }
5661 : :
5662 : : /* Now enter all non-volatile source expressions in the hash table
5663 : : if they are not already present.
5664 : : Record their equivalence classes in src_elt.
5665 : : This way we can insert the corresponding destinations into
5666 : : the same classes even if the actual sources are no longer in them
5667 : : (having been invalidated). */
5668 : :
5669 : 4937378 : if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5670 : 338414996 : && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5671 : : {
5672 : 4092986 : struct table_elt *elt;
5673 : 4092986 : struct table_elt *classp = sets[0].src_elt;
5674 : 4092986 : rtx dest = SET_DEST (sets[0].rtl);
5675 : 4092986 : machine_mode eqvmode = GET_MODE (dest);
5676 : :
5677 : 4092986 : if (GET_CODE (dest) == STRICT_LOW_PART)
5678 : : {
5679 : 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5680 : 0 : classp = 0;
5681 : : }
5682 : 4092986 : if (insert_regs (src_eqv, classp, false))
5683 : : {
5684 : 144500 : rehash_using_reg (src_eqv);
5685 : 144500 : src_eqv_hash = HASH (src_eqv, eqvmode);
5686 : : }
5687 : 4092986 : elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5688 : 4092986 : elt->in_memory = src_eqv_in_memory;
5689 : 4092986 : src_eqv_elt = elt;
5690 : :
5691 : : /* Check to see if src_eqv_elt is the same as a set source which
5692 : : does not yet have an elt, and if so set the elt of the set source
5693 : : to src_eqv_elt. */
5694 : 8185972 : for (i = 0; i < n_sets; i++)
5695 : 8185972 : if (sets[i].rtl && sets[i].src_elt == 0
5696 : 8090745 : && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5697 : 96453 : sets[i].src_elt = src_eqv_elt;
5698 : : }
5699 : :
5700 : 512379912 : for (i = 0; i < n_sets; i++)
5701 : 304714446 : if (sets[i].rtl && ! sets[i].src_volatile
5702 : 291391855 : && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5703 : : {
5704 : 113329025 : if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5705 : : {
5706 : : /* REG_EQUAL in setting a STRICT_LOW_PART
5707 : : gives an equivalent for the entire destination register,
5708 : : not just for the subreg being stored in now.
5709 : : This is a more interesting equivalence, so we arrange later
5710 : : to treat the entire reg as the destination. */
5711 : 15814 : sets[i].src_elt = src_eqv_elt;
5712 : 15814 : sets[i].src_hash = src_eqv_hash;
5713 : : }
5714 : : else
5715 : : {
5716 : : /* Insert source and constant equivalent into hash table, if not
5717 : : already present. */
5718 : 113313211 : struct table_elt *classp = src_eqv_elt;
5719 : 113313211 : rtx src = sets[i].src;
5720 : 113313211 : rtx dest = SET_DEST (sets[i].rtl);
5721 : 226626422 : machine_mode mode
5722 : 113313211 : = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5723 : :
5724 : : /* It's possible that we have a source value known to be
5725 : : constant but don't have a REG_EQUAL note on the insn.
5726 : : Lack of a note will mean src_eqv_elt will be NULL. This
5727 : : can happen where we've generated a SUBREG to access a
5728 : : CONST_INT that is already in a register in a wider mode.
5729 : : Ensure that the source expression is put in the proper
5730 : : constant class. */
5731 : 113313211 : if (!classp)
5732 : 108378162 : classp = sets[i].src_const_elt;
5733 : :
5734 : 113313211 : if (sets[i].src_elt == 0)
5735 : : {
5736 : 93592035 : struct table_elt *elt;
5737 : :
5738 : : /* Note that these insert_regs calls cannot remove
5739 : : any of the src_elt's, because they would have failed to
5740 : : match if not still valid. */
5741 : 93592035 : if (insert_regs (src, classp, false))
5742 : : {
5743 : 15422124 : rehash_using_reg (src);
5744 : 15422124 : sets[i].src_hash = HASH (src, mode);
5745 : : }
5746 : 93592035 : elt = insert (src, classp, sets[i].src_hash, mode);
5747 : 93592035 : elt->in_memory = sets[i].src_in_memory;
5748 : : /* If inline asm has any clobbers, ensure we only reuse
5749 : : existing inline asms and never try to put the ASM_OPERANDS
5750 : : into an insn that isn't inline asm. */
5751 : 93592035 : if (GET_CODE (src) == ASM_OPERANDS
5752 : 20567 : && GET_CODE (x) == PARALLEL)
5753 : 20549 : elt->cost = MAX_COST;
5754 : 93592035 : sets[i].src_elt = classp = elt;
5755 : : }
5756 : 135265438 : if (sets[i].src_const && sets[i].src_const_elt == 0
5757 : 13340686 : && src != sets[i].src_const
5758 : 115310187 : && ! rtx_equal_p (sets[i].src_const, src))
5759 : 1996974 : sets[i].src_elt = insert (sets[i].src_const, classp,
5760 : 1996974 : sets[i].src_const_hash, mode);
5761 : : }
5762 : : }
5763 : 64728877 : else if (sets[i].src_elt == 0)
5764 : : /* If we did not insert the source into the hash table (e.g., it was
5765 : : volatile), note the equivalence class for the REG_EQUAL value, if any,
5766 : : so that the destination goes into that class. */
5767 : 53324183 : sets[i].src_elt = src_eqv_elt;
5768 : :
5769 : : /* Record destination addresses in the hash table. This allows us to
5770 : : check if they are invalidated by other sets. */
5771 : 512379912 : for (i = 0; i < n_sets; i++)
5772 : : {
5773 : 178057902 : if (sets[i].rtl)
5774 : : {
5775 : 126656544 : rtx x = sets[i].inner_dest;
5776 : 126656544 : struct table_elt *elt;
5777 : 126656544 : machine_mode mode;
5778 : 126656544 : unsigned hash;
5779 : :
5780 : 126656544 : if (MEM_P (x))
5781 : : {
5782 : 19513229 : x = XEXP (x, 0);
5783 : 19513229 : mode = GET_MODE (x);
5784 : 19513229 : hash = HASH (x, mode);
5785 : 19513229 : elt = lookup (x, hash, mode);
5786 : 19513229 : if (!elt)
5787 : : {
5788 : 17031399 : if (insert_regs (x, NULL, false))
5789 : : {
5790 : 1918597 : rtx dest = SET_DEST (sets[i].rtl);
5791 : :
5792 : 1918597 : rehash_using_reg (x);
5793 : 1918597 : hash = HASH (x, mode);
5794 : 1918597 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5795 : : }
5796 : 17031399 : elt = insert (x, NULL, hash, mode);
5797 : : }
5798 : :
5799 : 19513229 : sets[i].dest_addr_elt = elt;
5800 : : }
5801 : : else
5802 : 107143315 : sets[i].dest_addr_elt = NULL;
5803 : : }
5804 : : }
5805 : :
5806 : 334322010 : invalidate_from_clobbers (insn);
5807 : :
5808 : : /* Some registers are invalidated by subroutine calls. Memory is
5809 : : invalidated by non-constant calls. */
5810 : :
5811 : 334322010 : if (CALL_P (insn))
5812 : : {
5813 : 14771722 : if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5814 : 12485950 : invalidate_memory ();
5815 : : else
5816 : : /* For const/pure calls, invalidate any argument slots, because
5817 : : those are owned by the callee. */
5818 : 6692045 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
5819 : 4406273 : if (GET_CODE (XEXP (tem, 0)) == USE
5820 : 4406135 : && MEM_P (XEXP (XEXP (tem, 0), 0)))
5821 : 16820 : invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode);
5822 : 14771722 : invalidate_for_call (insn);
5823 : : }
5824 : :
5825 : : /* Now invalidate everything set by this instruction.
5826 : : If a SUBREG or other funny destination is being set,
5827 : : sets[i].rtl is still nonzero, so here we invalidate the reg
5828 : : a part of which is being set. */
5829 : :
5830 : 512379912 : for (i = 0; i < n_sets; i++)
5831 : 178057902 : if (sets[i].rtl)
5832 : : {
5833 : : /* We can't use the inner dest, because the mode associated with
5834 : : a ZERO_EXTRACT is significant. */
5835 : 126656544 : rtx dest = SET_DEST (sets[i].rtl);
5836 : :
5837 : : /* Needed for registers to remove the register from its
5838 : : previous quantity's chain.
5839 : : Needed for memory if this is a nonvarying address, unless
5840 : : we have just done an invalidate_memory that covers even those. */
5841 : 126656544 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5842 : 107123461 : invalidate (dest, VOIDmode);
5843 : 19533083 : else if (MEM_P (dest))
5844 : 19513229 : invalidate (dest, VOIDmode);
5845 : 19854 : else if (GET_CODE (dest) == STRICT_LOW_PART
5846 : 4040 : || GET_CODE (dest) == ZERO_EXTRACT)
5847 : 19719 : invalidate (XEXP (dest, 0), GET_MODE (dest));
5848 : : }
5849 : :
5850 : : /* Don't cse over a call to setjmp; on some machines (eg VAX)
5851 : : the regs restored by the longjmp come from a later time
5852 : : than the setjmp. */
5853 : 334322010 : if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5854 : : {
5855 : 1984 : flush_hash_table ();
5856 : 1984 : goto done;
5857 : : }
5858 : :
5859 : : /* Make sure registers mentioned in destinations
5860 : : are safe for use in an expression to be inserted.
5861 : : This removes from the hash table
5862 : : any invalid entry that refers to one of these registers.
5863 : :
5864 : : We don't care about the return value from mention_regs because
5865 : : we are going to hash the SET_DEST values unconditionally. */
5866 : :
5867 : 512377928 : for (i = 0; i < n_sets; i++)
5868 : : {
5869 : 178057902 : if (sets[i].rtl)
5870 : : {
5871 : 126656544 : rtx x = SET_DEST (sets[i].rtl);
5872 : :
5873 : 126656544 : if (!REG_P (x))
5874 : 20792371 : mention_regs (x);
5875 : : else
5876 : : {
5877 : : /* We used to rely on all references to a register becoming
5878 : : inaccessible when a register changes to a new quantity,
5879 : : since that changes the hash code. However, that is not
5880 : : safe, since after HASH_SIZE new quantities we get a
5881 : : hash 'collision' of a register with its own invalid
5882 : : entries. And since SUBREGs have been changed not to
5883 : : change their hash code with the hash code of the register,
5884 : : it wouldn't work any longer at all. So we have to check
5885 : : for any invalid references lying around now.
5886 : : This code is similar to the REG case in mention_regs,
5887 : : but it knows that reg_tick has been incremented, and
5888 : : it leaves reg_in_table as -1 . */
5889 : 105864173 : unsigned int regno = REGNO (x);
5890 : 105864173 : unsigned int endregno = END_REGNO (x);
5891 : 105864173 : unsigned int i;
5892 : :
5893 : 211728346 : for (i = regno; i < endregno; i++)
5894 : : {
5895 : 105864173 : if (REG_IN_TABLE (i) >= 0)
5896 : : {
5897 : 11796870 : remove_invalid_refs (i);
5898 : 11796870 : REG_IN_TABLE (i) = -1;
5899 : : }
5900 : : }
5901 : : }
5902 : : }
5903 : : }
5904 : :
5905 : : /* We may have just removed some of the src_elt's from the hash table.
5906 : : So replace each one with the current head of the same class.
5907 : : Also check if destination addresses have been removed. */
5908 : :
5909 : 512377928 : for (i = 0; i < n_sets; i++)
5910 : 178057902 : if (sets[i].rtl)
5911 : : {
5912 : 126656544 : if (sets[i].dest_addr_elt
5913 : 126656544 : && sets[i].dest_addr_elt->first_same_value == 0)
5914 : : {
5915 : : /* The elt was removed, which means this destination is not
5916 : : valid after this instruction. */
5917 : 12 : sets[i].rtl = NULL_RTX;
5918 : : }
5919 : 126656532 : else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5920 : : /* If elt was removed, find current head of same class,
5921 : : or 0 if nothing remains of that class. */
5922 : : {
5923 : 10001998 : struct table_elt *elt = sets[i].src_elt;
5924 : :
5925 : 10001998 : while (elt && elt->prev_same_value)
5926 : : elt = elt->prev_same_value;
5927 : :
5928 : 19917082 : while (elt && elt->first_same_value == 0)
5929 : 9953121 : elt = elt->next_same_value;
5930 : 9963961 : sets[i].src_elt = elt ? elt->first_same_value : 0;
5931 : : }
5932 : : }
5933 : :
5934 : : /* Now insert the destinations into their equivalence classes. */
5935 : :
5936 : 512377928 : for (i = 0; i < n_sets; i++)
5937 : 178057902 : if (sets[i].rtl)
5938 : : {
5939 : 126656532 : rtx dest = SET_DEST (sets[i].rtl);
5940 : 126656532 : struct table_elt *elt;
5941 : :
5942 : : /* Don't record value if we are not supposed to risk allocating
5943 : : floating-point values in registers that might be wider than
5944 : : memory. */
5945 : 149894323 : if ((flag_float_store
5946 : 10526 : && MEM_P (dest)
5947 : 3313 : && FLOAT_MODE_P (GET_MODE (dest)))
5948 : : /* Don't record BLKmode values, because we don't know the
5949 : : size of it, and can't be sure that other BLKmode values
5950 : : have the same or smaller size. */
5951 : 126654136 : || GET_MODE (dest) == BLKmode
5952 : : /* If we didn't put a REG_EQUAL value or a source into the hash
5953 : : table, there is no point is recording DEST. */
5954 : 253310668 : || sets[i].src_elt == 0)
5955 : 23237791 : continue;
5956 : :
5957 : : /* STRICT_LOW_PART isn't part of the value BEING set,
5958 : : and neither is the SUBREG inside it.
5959 : : Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5960 : 103418741 : if (GET_CODE (dest) == STRICT_LOW_PART)
5961 : 0 : dest = SUBREG_REG (XEXP (dest, 0));
5962 : :
5963 : 103418741 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5964 : : /* Registers must also be inserted into chains for quantities. */
5965 : 84227073 : if (insert_regs (dest, sets[i].src_elt, true))
5966 : : {
5967 : : /* If `insert_regs' changes something, the hash code must be
5968 : : recalculated. */
5969 : 83812336 : rehash_using_reg (dest);
5970 : 83812336 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5971 : : }
5972 : :
5973 : : /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
5974 : : outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
5975 : 103418741 : if (paradoxical_subreg_p (dest))
5976 : 61007 : continue;
5977 : :
5978 : 103357734 : elt = insert (dest, sets[i].src_elt,
5979 : 103357734 : sets[i].dest_hash, GET_MODE (dest));
5980 : :
5981 : : /* If this is a constant, insert the constant anchors with the
5982 : : equivalent register-offset expressions using register DEST. */
5983 : 103357734 : if (targetm.const_anchor
5984 : 0 : && REG_P (dest)
5985 : 0 : && SCALAR_INT_MODE_P (GET_MODE (dest))
5986 : 103357734 : && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
5987 : 0 : insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
5988 : :
5989 : 103357734 : elt->in_memory = (MEM_P (sets[i].inner_dest)
5990 : 103357734 : && !MEM_READONLY_P (sets[i].inner_dest));
5991 : :
5992 : : /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5993 : : narrower than M2, and both M1 and M2 are the same number of words,
5994 : : we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5995 : : make that equivalence as well.
5996 : :
5997 : : However, BAR may have equivalences for which gen_lowpart
5998 : : will produce a simpler value than gen_lowpart applied to
5999 : : BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6000 : : BAR's equivalences. If we don't get a simplified form, make
6001 : : the SUBREG. It will not be used in an equivalence, but will
6002 : : cause two similar assignments to be detected.
6003 : :
6004 : : Note the loop below will find SUBREG_REG (DEST) since we have
6005 : : already entered SRC and DEST of the SET in the table. */
6006 : :
6007 : 103357734 : if (GET_CODE (dest) == SUBREG
6008 : 1171052 : && (known_equal_after_align_down
6009 : 1171052 : (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1,
6010 : 105673121 : GET_MODE_SIZE (GET_MODE (dest)) - 1,
6011 : 1171052 : UNITS_PER_WORD))
6012 : 71228 : && !partial_subreg_p (dest)
6013 : 103384451 : && sets[i].src_elt != 0)
6014 : : {
6015 : 26717 : machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6016 : 26717 : struct table_elt *elt, *classp = 0;
6017 : :
6018 : 99355 : for (elt = sets[i].src_elt->first_same_value; elt;
6019 : 72638 : elt = elt->next_same_value)
6020 : : {
6021 : 72638 : rtx new_src = 0;
6022 : 72638 : unsigned src_hash;
6023 : 72638 : struct table_elt *src_elt;
6024 : :
6025 : : /* Ignore invalid entries. */
6026 : 72638 : if (!REG_P (elt->exp)
6027 : 72638 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6028 : 0 : continue;
6029 : :
6030 : : /* We may have already been playing subreg games. If the
6031 : : mode is already correct for the destination, use it. */
6032 : 72638 : if (GET_MODE (elt->exp) == new_mode)
6033 : : new_src = elt->exp;
6034 : : else
6035 : : {
6036 : 72638 : poly_uint64 byte
6037 : 72638 : = subreg_lowpart_offset (new_mode, GET_MODE (dest));
6038 : 72638 : new_src = simplify_gen_subreg (new_mode, elt->exp,
6039 : 72638 : GET_MODE (dest), byte);
6040 : : }
6041 : :
6042 : : /* The call to simplify_gen_subreg fails if the value
6043 : : is VOIDmode, yet we can't do any simplification, e.g.
6044 : : for EXPR_LISTs denoting function call results.
6045 : : It is invalid to construct a SUBREG with a VOIDmode
6046 : : SUBREG_REG, hence a zero new_src means we can't do
6047 : : this substitution. */
6048 : 72638 : if (! new_src)
6049 : 6 : continue;
6050 : :
6051 : 72632 : src_hash = HASH (new_src, new_mode);
6052 : 72632 : src_elt = lookup (new_src, src_hash, new_mode);
6053 : :
6054 : : /* Put the new source in the hash table is if isn't
6055 : : already. */
6056 : 72632 : if (src_elt == 0)
6057 : : {
6058 : 32371 : if (insert_regs (new_src, classp, false))
6059 : : {
6060 : 0 : rehash_using_reg (new_src);
6061 : 0 : src_hash = HASH (new_src, new_mode);
6062 : : }
6063 : 32371 : src_elt = insert (new_src, classp, src_hash, new_mode);
6064 : 32371 : src_elt->in_memory = elt->in_memory;
6065 : 32371 : if (GET_CODE (new_src) == ASM_OPERANDS
6066 : 0 : && elt->cost == MAX_COST)
6067 : 0 : src_elt->cost = MAX_COST;
6068 : : }
6069 : 40261 : else if (classp && classp != src_elt->first_same_value)
6070 : : /* Show that two things that we've seen before are
6071 : : actually the same. */
6072 : 75 : merge_equiv_classes (src_elt, classp);
6073 : :
6074 : 72632 : classp = src_elt->first_same_value;
6075 : : /* Ignore invalid entries. */
6076 : 72632 : while (classp
6077 : 72632 : && !REG_P (classp->exp)
6078 : 115676 : && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6079 : 0 : classp = classp->next_same_value;
6080 : : }
6081 : : }
6082 : : }
6083 : :
6084 : : /* Special handling for (set REG0 REG1) where REG0 is the
6085 : : "cheapest", cheaper than REG1. After cse, REG1 will probably not
6086 : : be used in the sequel, so (if easily done) change this insn to
6087 : : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6088 : : that computed their value. Then REG1 will become a dead store
6089 : : and won't cloud the situation for later optimizations.
6090 : :
6091 : : Do not make this change if REG1 is a hard register, because it will
6092 : : then be used in the sequel and we may be changing a two-operand insn
6093 : : into a three-operand insn.
6094 : :
6095 : : Also do not do this if we are operating on a copy of INSN. */
6096 : :
6097 : 334320026 : if (n_sets == 1 && sets[0].rtl)
6098 : 124283881 : try_back_substitute_reg (sets[0].rtl, insn);
6099 : :
6100 : 334322010 : done:;
6101 : 334322010 : }
6102 : :
6103 : : /* Remove from the hash table all expressions that reference memory. */
6104 : :
6105 : : static void
6106 : 12485950 : invalidate_memory (void)
6107 : : {
6108 : 12485950 : int i;
6109 : 12485950 : struct table_elt *p, *next;
6110 : :
6111 : 412036350 : for (i = 0; i < HASH_SIZE; i++)
6112 : 576279968 : for (p = table[i]; p; p = next)
6113 : : {
6114 : 176729568 : next = p->next_same_hash;
6115 : 176729568 : if (p->in_memory)
6116 : 18213764 : remove_from_table (p, i);
6117 : : }
6118 : 12485950 : }
6119 : :
6120 : : /* Perform invalidation on the basis of everything about INSN,
6121 : : except for invalidating the actual places that are SET in it.
6122 : : This includes the places CLOBBERed, and anything that might
6123 : : alias with something that is SET or CLOBBERed. */
6124 : :
6125 : : static void
6126 : 334322010 : invalidate_from_clobbers (rtx_insn *insn)
6127 : : {
6128 : 334322010 : rtx x = PATTERN (insn);
6129 : :
6130 : 334322010 : if (GET_CODE (x) == CLOBBER)
6131 : : {
6132 : 70991 : rtx ref = XEXP (x, 0);
6133 : 70991 : if (ref)
6134 : : {
6135 : 70991 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6136 : 12678 : || MEM_P (ref))
6137 : 70991 : invalidate (ref, VOIDmode);
6138 : 0 : else if (GET_CODE (ref) == STRICT_LOW_PART
6139 : 0 : || GET_CODE (ref) == ZERO_EXTRACT)
6140 : 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6141 : : }
6142 : : }
6143 : 334251019 : else if (GET_CODE (x) == PARALLEL)
6144 : : {
6145 : 27284546 : int i;
6146 : 83216576 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6147 : : {
6148 : 55932030 : rtx y = XVECEXP (x, 0, i);
6149 : 55932030 : if (GET_CODE (y) == CLOBBER)
6150 : : {
6151 : 26861648 : rtx ref = XEXP (y, 0);
6152 : 26861648 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6153 : 255185 : || MEM_P (ref))
6154 : 26672325 : invalidate (ref, VOIDmode);
6155 : 189323 : else if (GET_CODE (ref) == STRICT_LOW_PART
6156 : 189323 : || GET_CODE (ref) == ZERO_EXTRACT)
6157 : 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6158 : : }
6159 : : }
6160 : : }
6161 : 334322010 : }
6162 : :
6163 : : /* Perform invalidation on the basis of everything about INSN.
6164 : : This includes the places CLOBBERed, and anything that might
6165 : : alias with something that is SET or CLOBBERed. */
6166 : :
6167 : : static void
6168 : 334322010 : invalidate_from_sets_and_clobbers (rtx_insn *insn)
6169 : : {
6170 : 334322010 : rtx tem;
6171 : 334322010 : rtx x = PATTERN (insn);
6172 : :
6173 : 334322010 : if (CALL_P (insn))
6174 : : {
6175 : 41389617 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6176 : : {
6177 : 26617895 : rtx temx = XEXP (tem, 0);
6178 : 26617895 : if (GET_CODE (temx) == CLOBBER)
6179 : 864474 : invalidate (SET_DEST (temx), VOIDmode);
6180 : : }
6181 : : }
6182 : :
6183 : : /* Ensure we invalidate the destination register of a CALL insn.
6184 : : This is necessary for machines where this register is a fixed_reg,
6185 : : because no other code would invalidate it. */
6186 : 334322010 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
6187 : 6877375 : invalidate (SET_DEST (x), VOIDmode);
6188 : :
6189 : 327444635 : else if (GET_CODE (x) == PARALLEL)
6190 : : {
6191 : 27931939 : int i;
6192 : :
6193 : 85164145 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6194 : : {
6195 : 57232206 : rtx y = XVECEXP (x, 0, i);
6196 : 57232206 : if (GET_CODE (y) == CLOBBER)
6197 : : {
6198 : 27514431 : rtx clobbered = XEXP (y, 0);
6199 : :
6200 : 27514431 : if (REG_P (clobbered)
6201 : 260571 : || GET_CODE (clobbered) == SUBREG)
6202 : 27253860 : invalidate (clobbered, VOIDmode);
6203 : 260571 : else if (GET_CODE (clobbered) == STRICT_LOW_PART
6204 : 260571 : || GET_CODE (clobbered) == ZERO_EXTRACT)
6205 : 0 : invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6206 : : }
6207 : 29717775 : else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
6208 : 11110 : invalidate (SET_DEST (y), VOIDmode);
6209 : : }
6210 : : }
6211 : 334322010 : }
6212 : :
6213 : : static rtx cse_process_note (rtx);
6214 : :
6215 : : /* A simplify_replace_fn_rtx callback for cse_process_note. Process X,
6216 : : part of the REG_NOTES of an insn. Replace any registers with either
6217 : : an equivalent constant or the canonical form of the register.
6218 : : Only replace addresses if the containing MEM remains valid.
6219 : :
6220 : : Return the replacement for X, or null if it should be simplified
6221 : : recursively. */
6222 : :
6223 : : static rtx
6224 : 25934649 : cse_process_note_1 (rtx x, const_rtx, void *)
6225 : : {
6226 : 25934649 : if (MEM_P (x))
6227 : : {
6228 : 1975344 : validate_change (x, &XEXP (x, 0), cse_process_note (XEXP (x, 0)), false);
6229 : 987672 : return x;
6230 : : }
6231 : :
6232 : 24946977 : if (REG_P (x))
6233 : : {
6234 : 5385268 : int i = REG_QTY (REGNO (x));
6235 : :
6236 : : /* Return a constant or a constant register. */
6237 : 5385268 : if (REGNO_QTY_VALID_P (REGNO (x)))
6238 : : {
6239 : 1415350 : struct qty_table_elem *ent = &qty_table[i];
6240 : :
6241 : 1415350 : if (ent->const_rtx != NULL_RTX
6242 : 20395 : && (CONSTANT_P (ent->const_rtx)
6243 : 16378 : || REG_P (ent->const_rtx)))
6244 : : {
6245 : 4017 : rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6246 : 4017 : if (new_rtx)
6247 : 4017 : return copy_rtx (new_rtx);
6248 : : }
6249 : : }
6250 : :
6251 : : /* Otherwise, canonicalize this register. */
6252 : 5381251 : return canon_reg (x, NULL);
6253 : : }
6254 : :
6255 : : return NULL_RTX;
6256 : : }
6257 : :
6258 : : /* Process X, part of the REG_NOTES of an insn. Replace any registers in it
6259 : : with either an equivalent constant or the canonical form of the register.
6260 : : Only replace addresses if the containing MEM remains valid. */
6261 : :
6262 : : static rtx
6263 : 9128431 : cse_process_note (rtx x)
6264 : : {
6265 : 987672 : return simplify_replace_fn_rtx (x, NULL_RTX, cse_process_note_1, NULL);
6266 : : }
6267 : :
6268 : :
6269 : : /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6270 : :
6271 : : DATA is a pointer to a struct cse_basic_block_data, that is used to
6272 : : describe the path.
6273 : : It is filled with a queue of basic blocks, starting with FIRST_BB
6274 : : and following a trace through the CFG.
6275 : :
6276 : : If all paths starting at FIRST_BB have been followed, or no new path
6277 : : starting at FIRST_BB can be constructed, this function returns FALSE.
6278 : : Otherwise, DATA->path is filled and the function returns TRUE indicating
6279 : : that a path to follow was found.
6280 : :
6281 : : If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6282 : : block in the path will be FIRST_BB. */
6283 : :
6284 : : static bool
6285 : 35458535 : cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6286 : : int follow_jumps)
6287 : : {
6288 : 35458535 : basic_block bb;
6289 : 35458535 : edge e;
6290 : 35458535 : int path_size;
6291 : :
6292 : 35458535 : bitmap_set_bit (cse_visited_basic_blocks, first_bb->index);
6293 : :
6294 : : /* See if there is a previous path. */
6295 : 35458535 : path_size = data->path_size;
6296 : :
6297 : : /* There is a previous path. Make sure it started with FIRST_BB. */
6298 : 35458535 : if (path_size)
6299 : 19102498 : gcc_assert (data->path[0].bb == first_bb);
6300 : :
6301 : : /* There was only one basic block in the last path. Clear the path and
6302 : : return, so that paths starting at another basic block can be tried. */
6303 : 19102498 : if (path_size == 1)
6304 : : {
6305 : 12739309 : path_size = 0;
6306 : 12739309 : goto done;
6307 : : }
6308 : :
6309 : : /* If the path was empty from the beginning, construct a new path. */
6310 : 22719226 : if (path_size == 0)
6311 : 16356037 : data->path[path_size++].bb = first_bb;
6312 : : else
6313 : : {
6314 : : /* Otherwise, path_size must be equal to or greater than 2, because
6315 : : a previous path exists that is at least two basic blocks long.
6316 : :
6317 : : Update the previous branch path, if any. If the last branch was
6318 : : previously along the branch edge, take the fallthrough edge now. */
6319 : 13891578 : while (path_size >= 2)
6320 : : {
6321 : 10274850 : basic_block last_bb_in_path, previous_bb_in_path;
6322 : 10274850 : edge e;
6323 : :
6324 : 10274850 : --path_size;
6325 : 10274850 : last_bb_in_path = data->path[path_size].bb;
6326 : 10274850 : previous_bb_in_path = data->path[path_size - 1].bb;
6327 : :
6328 : : /* If we previously followed a path along the branch edge, try
6329 : : the fallthru edge now. */
6330 : 17803239 : if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6331 : 9967654 : && any_condjump_p (BB_END (previous_bb_in_path))
6332 : 9967654 : && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6333 : 20242504 : && e == BRANCH_EDGE (previous_bb_in_path))
6334 : : {
6335 : 3664988 : bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6336 : 3664988 : if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun)
6337 : 3664988 : && single_pred_p (bb)
6338 : : /* We used to assert here that we would only see blocks
6339 : : that we have not visited yet. But we may end up
6340 : : visiting basic blocks twice if the CFG has changed
6341 : : in this run of cse_main, because when the CFG changes
6342 : : the topological sort of the CFG also changes. A basic
6343 : : blocks that previously had more than two predecessors
6344 : : may now have a single predecessor, and become part of
6345 : : a path that starts at another basic block.
6346 : :
6347 : : We still want to visit each basic block only once, so
6348 : : halt the path here if we have already visited BB. */
6349 : 6411449 : && !bitmap_bit_p (cse_visited_basic_blocks, bb->index))
6350 : : {
6351 : 2746461 : bitmap_set_bit (cse_visited_basic_blocks, bb->index);
6352 : 2746461 : data->path[path_size++].bb = bb;
6353 : 2746461 : break;
6354 : : }
6355 : : }
6356 : :
6357 : 7528389 : data->path[path_size].bb = NULL;
6358 : : }
6359 : :
6360 : : /* If only one block remains in the path, bail. */
6361 : 6363189 : if (path_size == 1)
6362 : : {
6363 : 3616728 : path_size = 0;
6364 : 3616728 : goto done;
6365 : : }
6366 : : }
6367 : :
6368 : : /* Extend the path if possible. */
6369 : 19102498 : if (follow_jumps)
6370 : : {
6371 : 11126327 : bb = data->path[path_size - 1].bb;
6372 : 18657880 : while (bb && path_size < param_max_cse_path_length)
6373 : : {
6374 : 18504956 : if (single_succ_p (bb))
6375 : 8168858 : e = single_succ_edge (bb);
6376 : 10336098 : else if (EDGE_COUNT (bb->succs) == 2
6377 : 10327957 : && any_condjump_p (BB_END (bb)))
6378 : : {
6379 : : /* First try to follow the branch. If that doesn't lead
6380 : : to a useful path, follow the fallthru edge. */
6381 : 8064573 : e = BRANCH_EDGE (bb);
6382 : 16129146 : if (!single_pred_p (e->dest))
6383 : 4390610 : e = FALLTHRU_EDGE (bb);
6384 : : }
6385 : : else
6386 : : e = NULL;
6387 : :
6388 : 16233431 : if (e
6389 : 16233431 : && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6390 : 16232386 : && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
6391 : 14203748 : && single_pred_p (e->dest)
6392 : : /* Avoid visiting basic blocks twice. The large comment
6393 : : above explains why this can happen. */
6394 : 23765016 : && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index))
6395 : : {
6396 : 7531553 : basic_block bb2 = e->dest;
6397 : 7531553 : bitmap_set_bit (cse_visited_basic_blocks, bb2->index);
6398 : 7531553 : data->path[path_size++].bb = bb2;
6399 : 7531553 : bb = bb2;
6400 : : }
6401 : : else
6402 : : bb = NULL;
6403 : : }
6404 : : }
6405 : :
6406 : 7976171 : done:
6407 : 35458535 : data->path_size = path_size;
6408 : 35458535 : return path_size != 0;
6409 : : }
6410 : :
6411 : : /* Dump the path in DATA to file F. NSETS is the number of sets
6412 : : in the path. */
6413 : :
6414 : : static void
6415 : 317 : cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6416 : : {
6417 : 317 : int path_entry;
6418 : :
6419 : 317 : fprintf (f, ";; Following path with %d sets: ", nsets);
6420 : 1119 : for (path_entry = 0; path_entry < data->path_size; path_entry++)
6421 : 485 : fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6422 : 317 : fputc ('\n', f);
6423 : 317 : fflush (f);
6424 : 317 : }
6425 : :
6426 : :
6427 : : /* Return true if BB has exception handling successor edges. */
6428 : :
6429 : : static bool
6430 : 8978921 : have_eh_succ_edges (basic_block bb)
6431 : : {
6432 : 8978921 : edge e;
6433 : 8978921 : edge_iterator ei;
6434 : :
6435 : 21055442 : FOR_EACH_EDGE (e, ei, bb->succs)
6436 : 13102378 : if (e->flags & EDGE_EH)
6437 : : return true;
6438 : :
6439 : : return false;
6440 : : }
6441 : :
6442 : :
6443 : : /* Scan to the end of the path described by DATA. Return an estimate of
6444 : : the total number of SETs of all insns in the path. */
6445 : :
6446 : : static void
6447 : 19102498 : cse_prescan_path (struct cse_basic_block_data *data)
6448 : : {
6449 : 19102498 : int nsets = 0;
6450 : 19102498 : int path_size = data->path_size;
6451 : 19102498 : int path_entry;
6452 : :
6453 : : /* Scan to end of each basic block in the path. */
6454 : 51781988 : for (path_entry = 0; path_entry < path_size; path_entry++)
6455 : : {
6456 : 32679490 : basic_block bb;
6457 : 32679490 : rtx_insn *insn;
6458 : :
6459 : 32679490 : bb = data->path[path_entry].bb;
6460 : :
6461 : 419127396 : FOR_BB_INSNS (bb, insn)
6462 : : {
6463 : 386447906 : if (!INSN_P (insn))
6464 : 52112401 : continue;
6465 : :
6466 : : /* A PARALLEL can have lots of SETs in it,
6467 : : especially if it is really an ASM_OPERANDS. */
6468 : 334335505 : if (GET_CODE (PATTERN (insn)) == PARALLEL)
6469 : 27936141 : nsets += XVECLEN (PATTERN (insn), 0);
6470 : : else
6471 : 306399364 : nsets += 1;
6472 : : }
6473 : : }
6474 : :
6475 : 19102498 : data->nsets = nsets;
6476 : 19102498 : }
6477 : :
6478 : : /* Return true if the pattern of INSN uses a LABEL_REF for which
6479 : : there isn't a REG_LABEL_OPERAND note. */
6480 : :
6481 : : static bool
6482 : 334150619 : check_for_label_ref (rtx_insn *insn)
6483 : : {
6484 : : /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6485 : : note for it, we must rerun jump since it needs to place the note. If
6486 : : this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6487 : : don't do this since no REG_LABEL_OPERAND will be added. */
6488 : 334150619 : subrtx_iterator::array_type array;
6489 : 1703139598 : FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
6490 : : {
6491 : 1368990310 : const_rtx x = *iter;
6492 : 1368990310 : if (GET_CODE (x) == LABEL_REF
6493 : 17960783 : && !LABEL_REF_NONLOCAL_P (x)
6494 : 17959956 : && (!JUMP_P (insn)
6495 : 17922051 : || !label_is_jump_target_p (label_ref_label (x), insn))
6496 : 37906 : && LABEL_P (label_ref_label (x))
6497 : 37563 : && INSN_UID (label_ref_label (x)) != 0
6498 : 1369027873 : && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x)))
6499 : 1331 : return true;
6500 : : }
6501 : 334149288 : return false;
6502 : 334150619 : }
6503 : :
6504 : : /* Process a single extended basic block described by EBB_DATA. */
6505 : :
6506 : : static void
6507 : 18656822 : cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6508 : : {
6509 : 18656822 : int path_size = ebb_data->path_size;
6510 : 18656822 : int path_entry;
6511 : 18656822 : int num_insns = 0;
6512 : :
6513 : : /* Allocate the space needed by qty_table. */
6514 : 18656822 : qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6515 : :
6516 : 18656822 : new_basic_block ();
6517 : 18656822 : cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6518 : 18656822 : cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6519 : 50887335 : for (path_entry = 0; path_entry < path_size; path_entry++)
6520 : : {
6521 : 32230513 : basic_block bb;
6522 : 32230513 : rtx_insn *insn;
6523 : :
6524 : 32230513 : bb = ebb_data->path[path_entry].bb;
6525 : :
6526 : : /* Invalidate recorded information for eh regs if there is an EH
6527 : : edge pointing to that bb. */
6528 : 32230513 : if (bb_has_eh_pred (bb))
6529 : : {
6530 : 509729 : df_ref def;
6531 : :
6532 : 2038916 : FOR_EACH_ARTIFICIAL_DEF (def, bb->index)
6533 : 1019458 : if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6534 : 1019458 : invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6535 : : }
6536 : :
6537 : 32230513 : optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6538 : 417877783 : FOR_BB_INSNS (bb, insn)
6539 : : {
6540 : : /* If we have processed 1,000 insns, flush the hash table to
6541 : : avoid extreme quadratic behavior. We must not include NOTEs
6542 : : in the count since there may be more of them when generating
6543 : : debugging information. If we clear the table at different
6544 : : times, code generated with -g -O might be different than code
6545 : : generated with -O but not -g.
6546 : :
6547 : : FIXME: This is a real kludge and needs to be done some other
6548 : : way. */
6549 : 385647270 : if (NONDEBUG_INSN_P (insn)
6550 : 385647270 : && num_insns++ > param_max_cse_insns)
6551 : : {
6552 : 1843 : flush_hash_table ();
6553 : 1843 : num_insns = 0;
6554 : : }
6555 : :
6556 : 385647270 : if (INSN_P (insn))
6557 : : {
6558 : : /* Process notes first so we have all notes in canonical forms
6559 : : when looking for duplicate operations. */
6560 : 334322010 : bool changed = false;
6561 : 550895341 : for (rtx note = REG_NOTES (insn); note; note = XEXP (note, 1))
6562 : 216573331 : if (REG_NOTE_KIND (note) == REG_EQUAL)
6563 : : {
6564 : 8140759 : rtx newval = cse_process_note (XEXP (note, 0));
6565 : 8140759 : if (newval != XEXP (note, 0))
6566 : : {
6567 : 34964 : XEXP (note, 0) = newval;
6568 : 34964 : changed = true;
6569 : : }
6570 : : }
6571 : 334322010 : if (changed)
6572 : 34964 : df_notes_rescan (insn);
6573 : :
6574 : 334322010 : cse_insn (insn);
6575 : :
6576 : : /* If we haven't already found an insn where we added a LABEL_REF,
6577 : : check this one. */
6578 : 334322010 : if (INSN_P (insn) && !recorded_label_ref
6579 : 668472629 : && check_for_label_ref (insn))
6580 : 1331 : recorded_label_ref = true;
6581 : : }
6582 : : }
6583 : :
6584 : : /* With non-call exceptions, we are not always able to update
6585 : : the CFG properly inside cse_insn. So clean up possibly
6586 : : redundant EH edges here. */
6587 : 32230513 : if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6588 : 1025857 : cse_cfg_altered |= purge_dead_edges (bb);
6589 : :
6590 : : /* If we changed a conditional jump, we may have terminated
6591 : : the path we are following. Check that by verifying that
6592 : : the edge we would take still exists. If the edge does
6593 : : not exist anymore, purge the remainder of the path.
6594 : : Note that this will cause us to return to the caller. */
6595 : 32230513 : if (path_entry < path_size - 1)
6596 : : {
6597 : 13576586 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6598 : 13576586 : if (!find_edge (bb, next_bb))
6599 : : {
6600 : 3164 : do
6601 : : {
6602 : 3164 : path_size--;
6603 : :
6604 : : /* If we truncate the path, we must also reset the
6605 : : visited bit on the remaining blocks in the path,
6606 : : or we will never visit them at all. */
6607 : 3164 : bitmap_clear_bit (cse_visited_basic_blocks,
6608 : 3164 : ebb_data->path[path_size].bb->index);
6609 : 3164 : ebb_data->path[path_size].bb = NULL;
6610 : : }
6611 : 3164 : while (path_size - 1 != path_entry);
6612 : 2895 : ebb_data->path_size = path_size;
6613 : : }
6614 : : }
6615 : :
6616 : : /* If this is a conditional jump insn, record any known
6617 : : equivalences due to the condition being tested. */
6618 : 32230513 : insn = BB_END (bb);
6619 : 32230513 : if (path_entry < path_size - 1
6620 : 45486742 : && EDGE_COUNT (bb->succs) == 2
6621 : 13256229 : && JUMP_P (insn)
6622 : 13256229 : && single_set (insn)
6623 : 45486742 : && any_condjump_p (insn))
6624 : : {
6625 : 13256229 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6626 : 13256229 : bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6627 : 13256229 : record_jump_equiv (insn, taken);
6628 : : }
6629 : : }
6630 : :
6631 : 18656822 : gcc_assert (next_qty <= max_qty);
6632 : :
6633 : 18656822 : free (qty_table);
6634 : 18656822 : }
6635 : :
6636 : :
6637 : : /* Perform cse on the instructions of a function.
6638 : : F is the first instruction.
6639 : : NREGS is one plus the highest pseudo-reg number used in the instruction.
6640 : :
6641 : : Return 2 if jump optimizations should be redone due to simplifications
6642 : : in conditional jump instructions.
6643 : : Return 1 if the CFG should be cleaned up because it has been modified.
6644 : : Return 0 otherwise. */
6645 : :
6646 : : static int
6647 : 2173619 : cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
6648 : : {
6649 : 2173619 : struct cse_basic_block_data ebb_data;
6650 : 2173619 : basic_block bb;
6651 : 2173619 : int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
6652 : 2173619 : int i, n_blocks;
6653 : :
6654 : : /* CSE doesn't use dominane info but can invalidate it in different ways.
6655 : : For simplicity free dominance info here. */
6656 : 2173619 : free_dominance_info (CDI_DOMINATORS);
6657 : :
6658 : 2173619 : df_set_flags (DF_LR_RUN_DCE);
6659 : 2173619 : df_note_add_problem ();
6660 : 2173619 : df_analyze ();
6661 : 2173619 : df_set_flags (DF_DEFER_INSN_RESCAN);
6662 : :
6663 : 2173619 : reg_scan (get_insns (), max_reg_num ());
6664 : 2173619 : init_cse_reg_info (nregs);
6665 : :
6666 : 2173619 : ebb_data.path = XNEWVEC (struct branch_path,
6667 : : param_max_cse_path_length);
6668 : :
6669 : 2173619 : cse_cfg_altered = false;
6670 : 2173619 : cse_jumps_altered = false;
6671 : 2173619 : recorded_label_ref = false;
6672 : 2173619 : ebb_data.path_size = 0;
6673 : 2173619 : ebb_data.nsets = 0;
6674 : 2173619 : rtl_hooks = cse_rtl_hooks;
6675 : :
6676 : 2173619 : init_recog ();
6677 : 2173619 : init_alias_analysis ();
6678 : :
6679 : 2173619 : reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6680 : :
6681 : : /* Set up the table of already visited basic blocks. */
6682 : 2173619 : cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
6683 : 2173619 : bitmap_clear (cse_visited_basic_blocks);
6684 : :
6685 : : /* Loop over basic blocks in reverse completion order (RPO),
6686 : : excluding the ENTRY and EXIT blocks. */
6687 : 2173619 : n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6688 : 2173619 : i = 0;
6689 : 20703275 : while (i < n_blocks)
6690 : : {
6691 : : /* Find the first block in the RPO queue that we have not yet
6692 : : processed before. */
6693 : 26240686 : do
6694 : : {
6695 : 26240686 : bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]);
6696 : : }
6697 : 26240686 : while (bitmap_bit_p (cse_visited_basic_blocks, bb->index)
6698 : 42596723 : && i < n_blocks);
6699 : :
6700 : : /* Find all paths starting with BB, and process them. */
6701 : 35458535 : while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6702 : : {
6703 : : /* Pre-scan the path. */
6704 : 19102498 : cse_prescan_path (&ebb_data);
6705 : :
6706 : : /* If this basic block has no sets, skip it. */
6707 : 19102498 : if (ebb_data.nsets == 0)
6708 : 445676 : continue;
6709 : :
6710 : : /* Get a reasonable estimate for the maximum number of qty's
6711 : : needed for this path. For this, we take the number of sets
6712 : : and multiply that by MAX_RECOG_OPERANDS. */
6713 : 18656822 : max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6714 : :
6715 : : /* Dump the path we're about to process. */
6716 : 18656822 : if (dump_file)
6717 : 317 : cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6718 : :
6719 : 18656822 : cse_extended_basic_block (&ebb_data);
6720 : : }
6721 : : }
6722 : :
6723 : : /* Clean up. */
6724 : 2173619 : end_alias_analysis ();
6725 : 2173619 : free (reg_eqv_table);
6726 : 2173619 : free (ebb_data.path);
6727 : 2173619 : sbitmap_free (cse_visited_basic_blocks);
6728 : 2173619 : free (rc_order);
6729 : 2173619 : rtl_hooks = general_rtl_hooks;
6730 : :
6731 : 2173619 : if (cse_jumps_altered || recorded_label_ref)
6732 : : return 2;
6733 : 2165918 : else if (cse_cfg_altered)
6734 : : return 1;
6735 : : else
6736 : 2155887 : return 0;
6737 : : }
6738 : :
6739 : : /* Count the number of times registers are used (not set) in X.
6740 : : COUNTS is an array in which we accumulate the count, INCR is how much
6741 : : we count each register usage.
6742 : :
6743 : : Don't count a usage of DEST, which is the SET_DEST of a SET which
6744 : : contains X in its SET_SRC. This is because such a SET does not
6745 : : modify the liveness of DEST.
6746 : : DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6747 : : We must then count uses of a SET_DEST regardless, because the insn can't be
6748 : : deleted here. */
6749 : :
6750 : : static void
6751 : 2181533798 : count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6752 : : {
6753 : 2621528580 : enum rtx_code code;
6754 : 2621528580 : rtx note;
6755 : 2621528580 : const char *fmt;
6756 : 2621528580 : int i, j;
6757 : :
6758 : 2621528580 : if (x == 0)
6759 : : return;
6760 : :
6761 : 2593492392 : switch (code = GET_CODE (x))
6762 : : {
6763 : 493210958 : case REG:
6764 : 493210958 : if (x != dest)
6765 : 475748249 : counts[REGNO (x)] += incr;
6766 : : return;
6767 : :
6768 : : case PC:
6769 : : case CONST:
6770 : : CASE_CONST_ANY:
6771 : : case SYMBOL_REF:
6772 : : case LABEL_REF:
6773 : : return;
6774 : :
6775 : 134395823 : case CLOBBER:
6776 : : /* If we are clobbering a MEM, mark any registers inside the address
6777 : : as being used. */
6778 : 134395823 : if (MEM_P (XEXP (x, 0)))
6779 : 221574 : count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6780 : : return;
6781 : :
6782 : 365362522 : case SET:
6783 : : /* Unless we are setting a REG, count everything in SET_DEST. */
6784 : 365362522 : if (!REG_P (SET_DEST (x)))
6785 : 87295783 : count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6786 : 365362522 : count_reg_usage (SET_SRC (x), counts,
6787 : : dest ? dest : SET_DEST (x),
6788 : : incr);
6789 : 365362522 : return;
6790 : :
6791 : : case DEBUG_INSN:
6792 : : return;
6793 : :
6794 : 384860811 : case CALL_INSN:
6795 : 384860811 : case INSN:
6796 : 384860811 : case JUMP_INSN:
6797 : : /* We expect dest to be NULL_RTX here. If the insn may throw,
6798 : : or if it cannot be deleted due to side-effects, mark this fact
6799 : : by setting DEST to pc_rtx. */
6800 : 150080545 : if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x))
6801 : 517130048 : || side_effects_p (PATTERN (x)))
6802 : 52496467 : dest = pc_rtx;
6803 : 384860811 : if (code == CALL_INSN)
6804 : 28036188 : count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6805 : 384860811 : count_reg_usage (PATTERN (x), counts, dest, incr);
6806 : :
6807 : : /* Things used in a REG_EQUAL note aren't dead since loop may try to
6808 : : use them. */
6809 : :
6810 : 384860811 : note = find_reg_equal_equiv_note (x);
6811 : 384860811 : if (note)
6812 : : {
6813 : 20734446 : rtx eqv = XEXP (note, 0);
6814 : :
6815 : 20734446 : if (GET_CODE (eqv) == EXPR_LIST)
6816 : : /* This REG_EQUAL note describes the result of a function call.
6817 : : Process all the arguments. */
6818 : 0 : do
6819 : : {
6820 : 0 : count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6821 : 0 : eqv = XEXP (eqv, 1);
6822 : : }
6823 : 0 : while (eqv && GET_CODE (eqv) == EXPR_LIST);
6824 : : else
6825 : : count_reg_usage (eqv, counts, dest, incr);
6826 : : }
6827 : : return;
6828 : :
6829 : 53676240 : case EXPR_LIST:
6830 : 53676240 : if (REG_NOTE_KIND (x) == REG_EQUAL
6831 : 53676240 : || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6832 : : /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6833 : : involving registers in the address. */
6834 : 3375338 : || GET_CODE (XEXP (x, 0)) == CLOBBER)
6835 : 53182855 : count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6836 : :
6837 : 53676240 : count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6838 : 53676240 : return;
6839 : :
6840 : 796295 : case ASM_OPERANDS:
6841 : : /* Iterate over just the inputs, not the constraints as well. */
6842 : 1533547 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6843 : 737252 : count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6844 : : return;
6845 : :
6846 : 0 : case INSN_LIST:
6847 : 0 : case INT_LIST:
6848 : 0 : gcc_unreachable ();
6849 : :
6850 : 645901598 : default:
6851 : 645901598 : break;
6852 : : }
6853 : :
6854 : 645901598 : fmt = GET_RTX_FORMAT (code);
6855 : 1795525306 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6856 : : {
6857 : 1149623708 : if (fmt[i] == 'e')
6858 : 878850133 : count_reg_usage (XEXP (x, i), counts, dest, incr);
6859 : 270773575 : else if (fmt[i] == 'E')
6860 : 189907598 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6861 : 127132730 : count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6862 : : }
6863 : : }
6864 : :
6865 : : /* Return true if X is a dead register. */
6866 : :
6867 : : static inline bool
6868 : 659471728 : is_dead_reg (const_rtx x, int *counts)
6869 : : {
6870 : 659471728 : return (REG_P (x)
6871 : 314583121 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
6872 : 196309793 : && counts[REGNO (x)] == 0);
6873 : : }
6874 : :
6875 : : /* Return true if set is live. */
6876 : : static bool
6877 : 343879625 : set_live_p (rtx set, int *counts)
6878 : : {
6879 : 343879625 : if (set_noop_p (set))
6880 : : return false;
6881 : :
6882 : 343862763 : if (!is_dead_reg (SET_DEST (set), counts)
6883 : 8182060 : || side_effects_p (SET_SRC (set)))
6884 : 335763370 : return true;
6885 : :
6886 : : return false;
6887 : : }
6888 : :
6889 : : /* Return true if insn is live. */
6890 : :
6891 : : static bool
6892 : 613143633 : insn_live_p (rtx_insn *insn, int *counts)
6893 : : {
6894 : 613143633 : int i;
6895 : 613143633 : if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
6896 : : return true;
6897 : 595067311 : else if (GET_CODE (PATTERN (insn)) == SET)
6898 : 289836421 : return set_live_p (PATTERN (insn), counts);
6899 : 305230890 : else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6900 : : {
6901 : 109670734 : for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6902 : : {
6903 : 109202615 : rtx elt = XVECEXP (PATTERN (insn), 0, i);
6904 : :
6905 : 109202615 : if (GET_CODE (elt) == SET)
6906 : : {
6907 : 54043204 : if (set_live_p (elt, counts))
6908 : : return true;
6909 : : }
6910 : 55159411 : else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6911 : : return true;
6912 : : }
6913 : : return false;
6914 : : }
6915 : 251054701 : else if (DEBUG_INSN_P (insn))
6916 : : {
6917 : 235884582 : if (DEBUG_MARKER_INSN_P (insn))
6918 : : return true;
6919 : :
6920 : 176549032 : if (DEBUG_BIND_INSN_P (insn)
6921 : 176549032 : && TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
6922 : : return false;
6923 : :
6924 : : return true;
6925 : : }
6926 : : else
6927 : : return true;
6928 : : }
6929 : :
6930 : : /* Count the number of stores into pseudo. Callback for note_stores. */
6931 : :
6932 : : static void
6933 : 236621441 : count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6934 : : {
6935 : 236621441 : int *counts = (int *) data;
6936 : 236621441 : if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6937 : 89702562 : counts[REGNO (x)]++;
6938 : 236621441 : }
6939 : :
6940 : : /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
6941 : : pseudo doesn't have a replacement. COUNTS[X] is zero if register X
6942 : : is dead and REPLACEMENTS[X] is null if it has no replacemenet.
6943 : : Set *SEEN_REPL to true if we see a dead register that does have
6944 : : a replacement. */
6945 : :
6946 : : static bool
6947 : 176421013 : is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements,
6948 : : bool *seen_repl)
6949 : : {
6950 : 176421013 : subrtx_iterator::array_type array;
6951 : 488214295 : FOR_EACH_SUBRTX (iter, array, pat, NONCONST)
6952 : : {
6953 : 311818628 : const_rtx x = *iter;
6954 : 364066754 : if (is_dead_reg (x, counts))
6955 : : {
6956 : 48428 : if (replacements && replacements[REGNO (x)] != NULL_RTX)
6957 : 23082 : *seen_repl = true;
6958 : : else
6959 : 25346 : return true;
6960 : : }
6961 : : }
6962 : 176395667 : return false;
6963 : 176421013 : }
6964 : :
6965 : : /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6966 : : Callback for simplify_replace_fn_rtx. */
6967 : :
6968 : : static rtx
6969 : 36004 : replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
6970 : : {
6971 : 36004 : rtx *replacements = (rtx *) data;
6972 : :
6973 : 36004 : if (REG_P (x)
6974 : 23710 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
6975 : 59709 : && replacements[REGNO (x)] != NULL_RTX)
6976 : : {
6977 : 23082 : if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
6978 : : return replacements[REGNO (x)];
6979 : 0 : return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
6980 : 0 : GET_MODE (replacements[REGNO (x)]));
6981 : : }
6982 : : return NULL_RTX;
6983 : : }
6984 : :
6985 : : /* Scan all the insns and delete any that are dead; i.e., they store a register
6986 : : that is never used or they copy a register to itself.
6987 : :
6988 : : This is used to remove insns made obviously dead by cse, loop or other
6989 : : optimizations. It improves the heuristics in loop since it won't try to
6990 : : move dead invariants out of loops or make givs for dead quantities. The
6991 : : remaining passes of the compilation are also sped up. */
6992 : :
6993 : : int
6994 : 6064799 : delete_trivially_dead_insns (rtx_insn *insns, int nreg)
6995 : : {
6996 : 6064799 : int *counts;
6997 : 6064799 : rtx_insn *insn, *prev;
6998 : 6064799 : rtx *replacements = NULL;
6999 : 6064799 : int ndead = 0;
7000 : :
7001 : 6064799 : timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7002 : : /* First count the number of times each register is used. */
7003 : 6064799 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7004 : : {
7005 : 2560290 : counts = XCNEWVEC (int, nreg * 3);
7006 : 520540345 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7007 : 517980055 : if (DEBUG_BIND_INSN_P (insn))
7008 : : {
7009 : 176814046 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7010 : : NULL_RTX, 1);
7011 : 176814046 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 0;
7012 : : }
7013 : 341166009 : else if (INSN_P (insn))
7014 : : {
7015 : 274968255 : count_reg_usage (insn, counts, NULL_RTX, 1);
7016 : 274968255 : note_stores (insn, count_stores, counts + nreg * 2);
7017 : : }
7018 : : /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7019 : : First one counts how many times each pseudo is used outside
7020 : : of debug insns, second counts how many times each pseudo is
7021 : : used in debug insns and third counts how many times a pseudo
7022 : : is stored. */
7023 : : }
7024 : : else
7025 : : {
7026 : 3504509 : counts = XCNEWVEC (int, nreg);
7027 : 211607152 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7028 : 204598134 : if (INSN_P (insn))
7029 : 161361332 : count_reg_usage (insn, counts, NULL_RTX, 1);
7030 : : /* If no debug insns can be present, COUNTS is just an array
7031 : : which counts how many times each pseudo is used. */
7032 : : }
7033 : : /* Pseudo PIC register should be considered as used due to possible
7034 : : new usages generated. */
7035 : 6064799 : if (!reload_completed
7036 : 6064799 : && pic_offset_table_rtx
7037 : 6276735 : && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
7038 : 211936 : counts[REGNO (pic_offset_table_rtx)]++;
7039 : : /* Go from the last insn to the first and delete insns that only set unused
7040 : : registers or copy a register to itself. As we delete an insn, remove
7041 : : usage counts for registers it uses.
7042 : :
7043 : : The first jump optimization pass may leave a real insn as the last
7044 : : insn in the function. We must not skip that insn or we may end
7045 : : up deleting code that is not really dead.
7046 : :
7047 : : If some otherwise unused register is only used in DEBUG_INSNs,
7048 : : try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7049 : : the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7050 : : has been created for the unused register, replace it with
7051 : : the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7052 : 6064799 : auto_vec<tree, 32> later_debug_set_vars;
7053 : 728642988 : for (insn = get_last_insn (); insn; insn = prev)
7054 : : {
7055 : 722578189 : int live_insn = 0;
7056 : :
7057 : 722578189 : prev = PREV_INSN (insn);
7058 : 722578189 : if (!INSN_P (insn))
7059 : 109434556 : continue;
7060 : :
7061 : 613143633 : live_insn = insn_live_p (insn, counts);
7062 : :
7063 : : /* If this is a dead insn, delete it and show registers in it aren't
7064 : : being used. */
7065 : :
7066 : 613143633 : if (! live_insn && dbg_cnt (delete_trivial_dead))
7067 : : {
7068 : 8277110 : if (DEBUG_INSN_P (insn))
7069 : : {
7070 : 410336 : if (DEBUG_BIND_INSN_P (insn))
7071 : 410336 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7072 : : NULL_RTX, -1);
7073 : : }
7074 : : else
7075 : : {
7076 : 7866774 : rtx set;
7077 : 7866774 : if (MAY_HAVE_DEBUG_BIND_INSNS
7078 : 3790337 : && (set = single_set (insn)) != NULL_RTX
7079 : 3790337 : && is_dead_reg (SET_DEST (set), counts)
7080 : : /* Used at least once in some DEBUG_INSN. */
7081 : 3784231 : && counts[REGNO (SET_DEST (set)) + nreg] > 0
7082 : : /* And set exactly once. */
7083 : 18728 : && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
7084 : 17304 : && !side_effects_p (SET_SRC (set))
7085 : 7884078 : && asm_noperands (PATTERN (insn)) < 0)
7086 : : {
7087 : 17303 : rtx dval, bind_var_loc;
7088 : 17303 : rtx_insn *bind;
7089 : :
7090 : : /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7091 : 17303 : dval = make_debug_expr_from_rtl (SET_DEST (set));
7092 : :
7093 : : /* Emit a debug bind insn before the insn in which
7094 : : reg dies. */
7095 : 17303 : bind_var_loc =
7096 : 17303 : gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
7097 : : DEBUG_EXPR_TREE_DECL (dval),
7098 : : SET_SRC (set),
7099 : : VAR_INIT_STATUS_INITIALIZED);
7100 : 17303 : count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
7101 : :
7102 : 17303 : bind = emit_debug_insn_before (bind_var_loc, insn);
7103 : 17303 : df_insn_rescan (bind);
7104 : :
7105 : 17303 : if (replacements == NULL)
7106 : 8355 : replacements = XCNEWVEC (rtx, nreg);
7107 : 17303 : replacements[REGNO (SET_DEST (set))] = dval;
7108 : : }
7109 : :
7110 : 7866774 : count_reg_usage (insn, counts, NULL_RTX, -1);
7111 : 7866774 : ndead++;
7112 : : }
7113 : 8277110 : cse_cfg_altered |= delete_insn_and_edges (insn);
7114 : : }
7115 : : else
7116 : : {
7117 : 604866523 : if (!DEBUG_INSN_P (insn) || DEBUG_MARKER_INSN_P (insn))
7118 : : {
7119 : 1461518409 : for (tree var : later_debug_set_vars)
7120 : 176129970 : TREE_VISITED (var) = 0;
7121 : 428462813 : later_debug_set_vars.truncate (0);
7122 : : }
7123 : 176403710 : else if (DEBUG_BIND_INSN_P (insn)
7124 : 176403710 : && !TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
7125 : : {
7126 : 176396929 : later_debug_set_vars.safe_push (INSN_VAR_LOCATION_DECL (insn));
7127 : 176396929 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 1;
7128 : : }
7129 : : }
7130 : : }
7131 : :
7132 : 6064799 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7133 : : {
7134 : 516356975 : for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
7135 : 513796685 : if (DEBUG_BIND_INSN_P (insn))
7136 : : {
7137 : : /* If this debug insn references a dead register that wasn't replaced
7138 : : with an DEBUG_EXPR, reset the DEBUG_INSN. */
7139 : 176421013 : bool seen_repl = false;
7140 : 176421013 : if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn),
7141 : : counts, replacements, &seen_repl))
7142 : : {
7143 : 25346 : INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
7144 : 25346 : df_insn_rescan (insn);
7145 : : }
7146 : 176395667 : else if (seen_repl)
7147 : : {
7148 : 22994 : INSN_VAR_LOCATION_LOC (insn)
7149 : 22994 : = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
7150 : : NULL_RTX, replace_dead_reg,
7151 : : replacements);
7152 : 22994 : df_insn_rescan (insn);
7153 : : }
7154 : : }
7155 : 2560290 : free (replacements);
7156 : : }
7157 : :
7158 : 6064799 : if (dump_file && ndead)
7159 : 26 : fprintf (dump_file, "Deleted %i trivially dead insns\n",
7160 : : ndead);
7161 : : /* Clean up. */
7162 : 6064799 : free (counts);
7163 : 6064799 : timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7164 : 6064799 : return ndead;
7165 : 6064799 : }
7166 : :
7167 : : /* If LOC contains references to NEWREG in a different mode, change them
7168 : : to use NEWREG instead. */
7169 : :
7170 : : static void
7171 : 56564 : cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
7172 : : rtx *loc, rtx_insn *insn, rtx newreg)
7173 : : {
7174 : 333799 : FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
7175 : : {
7176 : 277235 : rtx *loc = *iter;
7177 : 277235 : rtx x = *loc;
7178 : 277235 : if (x
7179 : 248953 : && REG_P (x)
7180 : 60045 : && REGNO (x) == REGNO (newreg)
7181 : 322746 : && GET_MODE (x) != GET_MODE (newreg))
7182 : : {
7183 : 45511 : validate_change (insn, loc, newreg, 1);
7184 : 45511 : iter.skip_subrtxes ();
7185 : : }
7186 : : }
7187 : 56564 : }
7188 : :
7189 : : /* Change the mode of any reference to the register REGNO (NEWREG) to
7190 : : GET_MODE (NEWREG) in INSN. */
7191 : :
7192 : : static void
7193 : 28282 : cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
7194 : : {
7195 : 28282 : int success;
7196 : :
7197 : 28282 : if (!INSN_P (insn))
7198 : 0 : return;
7199 : :
7200 : 28282 : subrtx_ptr_iterator::array_type array;
7201 : 28282 : cse_change_cc_mode (array, &PATTERN (insn), insn, newreg);
7202 : 28282 : cse_change_cc_mode (array, ®_NOTES (insn), insn, newreg);
7203 : :
7204 : : /* If the following assertion was triggered, there is most probably
7205 : : something wrong with the cc_modes_compatible back end function.
7206 : : CC modes only can be considered compatible if the insn - with the mode
7207 : : replaced by any of the compatible modes - can still be recognized. */
7208 : 28282 : success = apply_change_group ();
7209 : 28282 : gcc_assert (success);
7210 : 28282 : }
7211 : :
7212 : : /* Change the mode of any reference to the register REGNO (NEWREG) to
7213 : : GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7214 : : any instruction which modifies NEWREG. */
7215 : :
7216 : : static void
7217 : 17703 : cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
7218 : : {
7219 : 17703 : rtx_insn *insn;
7220 : :
7221 : 36058 : for (insn = start; insn != end; insn = NEXT_INSN (insn))
7222 : : {
7223 : 18798 : if (! INSN_P (insn))
7224 : 0 : continue;
7225 : :
7226 : 18798 : if (reg_set_p (newreg, insn))
7227 : : return;
7228 : :
7229 : 18355 : cse_change_cc_mode_insn (insn, newreg);
7230 : : }
7231 : : }
7232 : :
7233 : : /* BB is a basic block which finishes with CC_REG as a condition code
7234 : : register which is set to CC_SRC. Look through the successors of BB
7235 : : to find blocks which have a single predecessor (i.e., this one),
7236 : : and look through those blocks for an assignment to CC_REG which is
7237 : : equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7238 : : permitted to change the mode of CC_SRC to a compatible mode. This
7239 : : returns VOIDmode if no equivalent assignments were found.
7240 : : Otherwise it returns the mode which CC_SRC should wind up with.
7241 : : ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7242 : : but is passed unmodified down to recursive calls in order to prevent
7243 : : endless recursion.
7244 : :
7245 : : The main complexity in this function is handling the mode issues.
7246 : : We may have more than one duplicate which we can eliminate, and we
7247 : : try to find a mode which will work for multiple duplicates. */
7248 : :
7249 : : static machine_mode
7250 : 4982871 : cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7251 : : bool can_change_mode)
7252 : : {
7253 : 4982871 : bool found_equiv;
7254 : 4982871 : machine_mode mode;
7255 : 4982871 : unsigned int insn_count;
7256 : 4982871 : edge e;
7257 : 4982871 : rtx_insn *insns[2];
7258 : 4982871 : machine_mode modes[2];
7259 : 4982871 : rtx_insn *last_insns[2];
7260 : 4982871 : unsigned int i;
7261 : 4982871 : rtx newreg;
7262 : 4982871 : edge_iterator ei;
7263 : :
7264 : : /* We expect to have two successors. Look at both before picking
7265 : : the final mode for the comparison. If we have more successors
7266 : : (i.e., some sort of table jump, although that seems unlikely),
7267 : : then we require all beyond the first two to use the same
7268 : : mode. */
7269 : :
7270 : 4982871 : found_equiv = false;
7271 : 4982871 : mode = GET_MODE (cc_src);
7272 : 4982871 : insn_count = 0;
7273 : 14066884 : FOR_EACH_EDGE (e, ei, bb->succs)
7274 : : {
7275 : 9084013 : rtx_insn *insn;
7276 : 9084013 : rtx_insn *end;
7277 : :
7278 : 9084013 : if (e->flags & EDGE_COMPLEX)
7279 : 33768 : continue;
7280 : :
7281 : 9050245 : if (EDGE_COUNT (e->dest->preds) != 1
7282 : 5063928 : || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
7283 : : /* Avoid endless recursion on unreachable blocks. */
7284 : 14022170 : || e->dest == orig_bb)
7285 : 4078320 : continue;
7286 : :
7287 : 4971925 : end = NEXT_INSN (BB_END (e->dest));
7288 : 28423299 : for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7289 : : {
7290 : 27358129 : rtx set;
7291 : :
7292 : 27358129 : if (! INSN_P (insn))
7293 : 6778920 : continue;
7294 : :
7295 : : /* If CC_SRC is modified, we have to stop looking for
7296 : : something which uses it. */
7297 : 20579209 : if (modified_in_p (cc_src, insn))
7298 : : break;
7299 : :
7300 : : /* Check whether INSN sets CC_REG to CC_SRC. */
7301 : 20140056 : set = single_set (insn);
7302 : 20140056 : if (set
7303 : 9946467 : && REG_P (SET_DEST (set))
7304 : 28849815 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7305 : : {
7306 : 1208147 : bool found;
7307 : 1208147 : machine_mode set_mode;
7308 : 1208147 : machine_mode comp_mode;
7309 : :
7310 : 1208147 : found = false;
7311 : 1208147 : set_mode = GET_MODE (SET_SRC (set));
7312 : 1208147 : comp_mode = set_mode;
7313 : 1208147 : if (rtx_equal_p (cc_src, SET_SRC (set)))
7314 : : found = true;
7315 : 1202023 : else if (GET_CODE (cc_src) == COMPARE
7316 : 1126361 : && GET_CODE (SET_SRC (set)) == COMPARE
7317 : 1077763 : && mode != set_mode
7318 : 309611 : && rtx_equal_p (XEXP (cc_src, 0),
7319 : 309611 : XEXP (SET_SRC (set), 0))
7320 : 1256290 : && rtx_equal_p (XEXP (cc_src, 1),
7321 : 54267 : XEXP (SET_SRC (set), 1)))
7322 : :
7323 : : {
7324 : 17707 : comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7325 : 17707 : if (comp_mode != VOIDmode
7326 : 17707 : && (can_change_mode || comp_mode == mode))
7327 : : found = true;
7328 : : }
7329 : :
7330 : 23827 : if (found)
7331 : : {
7332 : 23827 : found_equiv = true;
7333 : 23827 : if (insn_count < ARRAY_SIZE (insns))
7334 : : {
7335 : 23827 : insns[insn_count] = insn;
7336 : 23827 : modes[insn_count] = set_mode;
7337 : 23827 : last_insns[insn_count] = end;
7338 : 23827 : ++insn_count;
7339 : :
7340 : 23827 : if (mode != comp_mode)
7341 : : {
7342 : 9927 : gcc_assert (can_change_mode);
7343 : 9927 : mode = comp_mode;
7344 : :
7345 : : /* The modified insn will be re-recognized later. */
7346 : 9927 : PUT_MODE (cc_src, mode);
7347 : : }
7348 : : }
7349 : : else
7350 : : {
7351 : 0 : if (set_mode != mode)
7352 : : {
7353 : : /* We found a matching expression in the
7354 : : wrong mode, but we don't have room to
7355 : : store it in the array. Punt. This case
7356 : : should be rare. */
7357 : : break;
7358 : : }
7359 : : /* INSN sets CC_REG to a value equal to CC_SRC
7360 : : with the right mode. We can simply delete
7361 : : it. */
7362 : 0 : delete_insn (insn);
7363 : : }
7364 : :
7365 : : /* We found an instruction to delete. Keep looking,
7366 : : in the hopes of finding a three-way jump. */
7367 : 23827 : continue;
7368 : : }
7369 : :
7370 : : /* We found an instruction which sets the condition
7371 : : code, so don't look any farther. */
7372 : : break;
7373 : : }
7374 : :
7375 : : /* If INSN sets CC_REG in some other way, don't look any
7376 : : farther. */
7377 : 18931909 : if (reg_set_p (cc_reg, insn))
7378 : : break;
7379 : : }
7380 : :
7381 : : /* If we fell off the bottom of the block, we can keep looking
7382 : : through successors. We pass CAN_CHANGE_MODE as false because
7383 : : we aren't prepared to handle compatibility between the
7384 : : further blocks and this block. */
7385 : 4971925 : if (insn == end)
7386 : : {
7387 : 1065170 : machine_mode submode;
7388 : :
7389 : 1065170 : submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7390 : 1065170 : if (submode != VOIDmode)
7391 : : {
7392 : 2 : gcc_assert (submode == mode);
7393 : : found_equiv = true;
7394 : : can_change_mode = false;
7395 : : }
7396 : : }
7397 : : }
7398 : :
7399 : 4982871 : if (! found_equiv)
7400 : : return VOIDmode;
7401 : :
7402 : : /* Now INSN_COUNT is the number of instructions we found which set
7403 : : CC_REG to a value equivalent to CC_SRC. The instructions are in
7404 : : INSNS. The modes used by those instructions are in MODES. */
7405 : :
7406 : : newreg = NULL_RTX;
7407 : 47656 : for (i = 0; i < insn_count; ++i)
7408 : : {
7409 : 23827 : if (modes[i] != mode)
7410 : : {
7411 : : /* We need to change the mode of CC_REG in INSNS[i] and
7412 : : subsequent instructions. */
7413 : 7776 : if (! newreg)
7414 : : {
7415 : 7776 : if (GET_MODE (cc_reg) == mode)
7416 : : newreg = cc_reg;
7417 : : else
7418 : 6947 : newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7419 : : }
7420 : 7776 : cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7421 : : newreg);
7422 : : }
7423 : :
7424 : 23827 : cse_cfg_altered |= delete_insn_and_edges (insns[i]);
7425 : : }
7426 : :
7427 : : return mode;
7428 : : }
7429 : :
7430 : : /* If we have a fixed condition code register (or two), walk through
7431 : : the instructions and try to eliminate duplicate assignments. */
7432 : :
7433 : : static void
7434 : 914372 : cse_condition_code_reg (void)
7435 : : {
7436 : 914372 : unsigned int cc_regno_1;
7437 : 914372 : unsigned int cc_regno_2;
7438 : 914372 : rtx cc_reg_1;
7439 : 914372 : rtx cc_reg_2;
7440 : 914372 : basic_block bb;
7441 : :
7442 : 914372 : if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7443 : 0 : return;
7444 : :
7445 : 914372 : cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7446 : 914372 : if (cc_regno_2 != INVALID_REGNUM)
7447 : 0 : cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7448 : : else
7449 : : cc_reg_2 = NULL_RTX;
7450 : :
7451 : 9824605 : FOR_EACH_BB_FN (bb, cfun)
7452 : : {
7453 : 8910233 : rtx_insn *last_insn;
7454 : 8910233 : rtx cc_reg;
7455 : 8910233 : rtx_insn *insn;
7456 : 8910233 : rtx_insn *cc_src_insn;
7457 : 8910233 : rtx cc_src;
7458 : 8910233 : machine_mode mode;
7459 : 8910233 : machine_mode orig_mode;
7460 : :
7461 : : /* Look for blocks which end with a conditional jump based on a
7462 : : condition code register. Then look for the instruction which
7463 : : sets the condition code register. Then look through the
7464 : : successor blocks for instructions which set the condition
7465 : : code register to the same value. There are other possible
7466 : : uses of the condition code register, but these are by far the
7467 : : most common and the ones which we are most likely to be able
7468 : : to optimize. */
7469 : :
7470 : 8910233 : last_insn = BB_END (bb);
7471 : 8910233 : if (!JUMP_P (last_insn))
7472 : 4849232 : continue;
7473 : :
7474 : 4061001 : if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7475 : : cc_reg = cc_reg_1;
7476 : 11938 : else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7477 : : cc_reg = cc_reg_2;
7478 : : else
7479 : 11938 : continue;
7480 : :
7481 : 4049063 : cc_src_insn = NULL;
7482 : 4049063 : cc_src = NULL_RTX;
7483 : 4203407 : for (insn = PREV_INSN (last_insn);
7484 : 4203407 : insn && insn != PREV_INSN (BB_HEAD (bb));
7485 : 154344 : insn = PREV_INSN (insn))
7486 : : {
7487 : 4091075 : rtx set;
7488 : :
7489 : 4091075 : if (! INSN_P (insn))
7490 : 120191 : continue;
7491 : 3970884 : set = single_set (insn);
7492 : 3970884 : if (set
7493 : 3930300 : && REG_P (SET_DEST (set))
7494 : 7900243 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7495 : : {
7496 : 3917722 : cc_src_insn = insn;
7497 : 3917722 : cc_src = SET_SRC (set);
7498 : 3917722 : break;
7499 : : }
7500 : 53162 : else if (reg_set_p (cc_reg, insn))
7501 : : break;
7502 : : }
7503 : :
7504 : 4049063 : if (! cc_src_insn)
7505 : 131341 : continue;
7506 : :
7507 : 3917722 : if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7508 : 21 : continue;
7509 : :
7510 : : /* Now CC_REG is a condition code register used for a
7511 : : conditional jump at the end of the block, and CC_SRC, in
7512 : : CC_SRC_INSN, is the value to which that condition code
7513 : : register is set, and CC_SRC is still meaningful at the end of
7514 : : the basic block. */
7515 : :
7516 : 3917701 : orig_mode = GET_MODE (cc_src);
7517 : 3917701 : mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7518 : 3917701 : if (mode != VOIDmode)
7519 : : {
7520 : 23827 : gcc_assert (mode == GET_MODE (cc_src));
7521 : 23827 : if (mode != orig_mode)
7522 : : {
7523 : 9927 : rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7524 : :
7525 : 9927 : cse_change_cc_mode_insn (cc_src_insn, newreg);
7526 : :
7527 : : /* Do the same in the following insns that use the
7528 : : current value of CC_REG within BB. */
7529 : 9927 : cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7530 : : NEXT_INSN (last_insn),
7531 : : newreg);
7532 : : }
7533 : : }
7534 : : }
7535 : : }
7536 : :
7537 : :
7538 : : /* Perform common subexpression elimination. Nonzero value from
7539 : : `cse_main' means that jumps were simplified and some code may now
7540 : : be unreachable, so do jump optimization again. */
7541 : : static unsigned int
7542 : 987682 : rest_of_handle_cse (void)
7543 : : {
7544 : 987682 : int tem;
7545 : :
7546 : 987682 : if (dump_file)
7547 : 32 : dump_flow_info (dump_file, dump_flags);
7548 : :
7549 : 987682 : tem = cse_main (get_insns (), max_reg_num ());
7550 : :
7551 : : /* If we are not running more CSE passes, then we are no longer
7552 : : expecting CSE to be run. But always rerun it in a cheap mode. */
7553 : 987682 : cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7554 : :
7555 : 987682 : if (tem == 2)
7556 : : {
7557 : 5157 : timevar_push (TV_JUMP);
7558 : 5157 : rebuild_jump_labels (get_insns ());
7559 : 5157 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7560 : 5157 : timevar_pop (TV_JUMP);
7561 : : }
7562 : 982525 : else if (tem == 1 || optimize > 1)
7563 : 909526 : cse_cfg_altered |= cleanup_cfg (0);
7564 : :
7565 : 987682 : return 0;
7566 : : }
7567 : :
7568 : : namespace {
7569 : :
7570 : : const pass_data pass_data_cse =
7571 : : {
7572 : : RTL_PASS, /* type */
7573 : : "cse1", /* name */
7574 : : OPTGROUP_NONE, /* optinfo_flags */
7575 : : TV_CSE, /* tv_id */
7576 : : 0, /* properties_required */
7577 : : 0, /* properties_provided */
7578 : : 0, /* properties_destroyed */
7579 : : 0, /* todo_flags_start */
7580 : : TODO_df_finish, /* todo_flags_finish */
7581 : : };
7582 : :
7583 : : class pass_cse : public rtl_opt_pass
7584 : : {
7585 : : public:
7586 : 281914 : pass_cse (gcc::context *ctxt)
7587 : 563828 : : rtl_opt_pass (pass_data_cse, ctxt)
7588 : : {}
7589 : :
7590 : : /* opt_pass methods: */
7591 : 1426773 : bool gate (function *) final override { return optimize > 0; }
7592 : 987682 : unsigned int execute (function *) final override
7593 : : {
7594 : 987682 : return rest_of_handle_cse ();
7595 : : }
7596 : :
7597 : : }; // class pass_cse
7598 : :
7599 : : } // anon namespace
7600 : :
7601 : : rtl_opt_pass *
7602 : 281914 : make_pass_cse (gcc::context *ctxt)
7603 : : {
7604 : 281914 : return new pass_cse (ctxt);
7605 : : }
7606 : :
7607 : :
7608 : : /* Run second CSE pass after loop optimizations. */
7609 : : static unsigned int
7610 : 914372 : rest_of_handle_cse2 (void)
7611 : : {
7612 : 914372 : int tem;
7613 : :
7614 : 914372 : if (dump_file)
7615 : 22 : dump_flow_info (dump_file, dump_flags);
7616 : :
7617 : 914372 : tem = cse_main (get_insns (), max_reg_num ());
7618 : :
7619 : : /* Run a pass to eliminate duplicated assignments to condition code
7620 : : registers. We have to run this after bypass_jumps, because it
7621 : : makes it harder for that pass to determine whether a jump can be
7622 : : bypassed safely. */
7623 : 914372 : cse_condition_code_reg ();
7624 : :
7625 : 914372 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7626 : :
7627 : 914372 : if (tem == 2)
7628 : : {
7629 : 2304 : timevar_push (TV_JUMP);
7630 : 2304 : rebuild_jump_labels (get_insns ());
7631 : 2304 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7632 : 2304 : timevar_pop (TV_JUMP);
7633 : : }
7634 : 912068 : else if (tem == 1 || cse_cfg_altered)
7635 : 117 : cse_cfg_altered |= cleanup_cfg (0);
7636 : :
7637 : 914372 : cse_not_expected = 1;
7638 : 914372 : return 0;
7639 : : }
7640 : :
7641 : :
7642 : : namespace {
7643 : :
7644 : : const pass_data pass_data_cse2 =
7645 : : {
7646 : : RTL_PASS, /* type */
7647 : : "cse2", /* name */
7648 : : OPTGROUP_NONE, /* optinfo_flags */
7649 : : TV_CSE2, /* tv_id */
7650 : : 0, /* properties_required */
7651 : : 0, /* properties_provided */
7652 : : 0, /* properties_destroyed */
7653 : : 0, /* todo_flags_start */
7654 : : TODO_df_finish, /* todo_flags_finish */
7655 : : };
7656 : :
7657 : : class pass_cse2 : public rtl_opt_pass
7658 : : {
7659 : : public:
7660 : 281914 : pass_cse2 (gcc::context *ctxt)
7661 : 563828 : : rtl_opt_pass (pass_data_cse2, ctxt)
7662 : : {}
7663 : :
7664 : : /* opt_pass methods: */
7665 : 1426773 : bool gate (function *) final override
7666 : : {
7667 : 1426773 : return optimize > 0 && flag_rerun_cse_after_loop;
7668 : : }
7669 : :
7670 : 914372 : unsigned int execute (function *) final override
7671 : : {
7672 : 914372 : return rest_of_handle_cse2 ();
7673 : : }
7674 : :
7675 : : }; // class pass_cse2
7676 : :
7677 : : } // anon namespace
7678 : :
7679 : : rtl_opt_pass *
7680 : 281914 : make_pass_cse2 (gcc::context *ctxt)
7681 : : {
7682 : 281914 : return new pass_cse2 (ctxt);
7683 : : }
7684 : :
7685 : : /* Run second CSE pass after loop optimizations. */
7686 : : static unsigned int
7687 : 271565 : rest_of_handle_cse_after_global_opts (void)
7688 : : {
7689 : 271565 : int save_cfj;
7690 : 271565 : int tem;
7691 : :
7692 : : /* We only want to do local CSE, so don't follow jumps. */
7693 : 271565 : save_cfj = flag_cse_follow_jumps;
7694 : 271565 : flag_cse_follow_jumps = 0;
7695 : :
7696 : 271565 : rebuild_jump_labels (get_insns ());
7697 : 271565 : tem = cse_main (get_insns (), max_reg_num ());
7698 : 271565 : cse_cfg_altered |= purge_all_dead_edges ();
7699 : 271565 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7700 : :
7701 : 271565 : cse_not_expected = !flag_rerun_cse_after_loop;
7702 : :
7703 : : /* If cse altered any jumps, rerun jump opts to clean things up. */
7704 : 271565 : if (tem == 2)
7705 : : {
7706 : 240 : timevar_push (TV_JUMP);
7707 : 240 : rebuild_jump_labels (get_insns ());
7708 : 240 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7709 : 240 : timevar_pop (TV_JUMP);
7710 : : }
7711 : 271325 : else if (tem == 1 || cse_cfg_altered)
7712 : 4960 : cse_cfg_altered |= cleanup_cfg (0);
7713 : :
7714 : 271565 : flag_cse_follow_jumps = save_cfj;
7715 : 271565 : return 0;
7716 : : }
7717 : :
7718 : : namespace {
7719 : :
7720 : : const pass_data pass_data_cse_after_global_opts =
7721 : : {
7722 : : RTL_PASS, /* type */
7723 : : "cse_local", /* name */
7724 : : OPTGROUP_NONE, /* optinfo_flags */
7725 : : TV_CSE, /* tv_id */
7726 : : 0, /* properties_required */
7727 : : 0, /* properties_provided */
7728 : : 0, /* properties_destroyed */
7729 : : 0, /* todo_flags_start */
7730 : : TODO_df_finish, /* todo_flags_finish */
7731 : : };
7732 : :
7733 : : class pass_cse_after_global_opts : public rtl_opt_pass
7734 : : {
7735 : : public:
7736 : 281914 : pass_cse_after_global_opts (gcc::context *ctxt)
7737 : 563828 : : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt)
7738 : : {}
7739 : :
7740 : : /* opt_pass methods: */
7741 : 1426773 : bool gate (function *) final override
7742 : : {
7743 : 1426773 : return optimize > 0 && flag_rerun_cse_after_global_opts;
7744 : : }
7745 : :
7746 : 271565 : unsigned int execute (function *) final override
7747 : : {
7748 : 271565 : return rest_of_handle_cse_after_global_opts ();
7749 : : }
7750 : :
7751 : : }; // class pass_cse_after_global_opts
7752 : :
7753 : : } // anon namespace
7754 : :
7755 : : rtl_opt_pass *
7756 : 281914 : make_pass_cse_after_global_opts (gcc::context *ctxt)
7757 : : {
7758 : 281914 : return new pass_cse_after_global_opts (ctxt);
7759 : : }
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