Line data Source code
1 : /* Common subexpression elimination for GNU compiler.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : #include "config.h"
21 : #include "system.h"
22 : #include "coretypes.h"
23 : #include "backend.h"
24 : #include "target.h"
25 : #include "rtl.h"
26 : #include "stmt.h"
27 : #include "tree.h"
28 : #include "cfghooks.h"
29 : #include "df.h"
30 : #include "memmodel.h"
31 : #include "tm_p.h"
32 : #include "insn-config.h"
33 : #include "regs.h"
34 : #include "emit-rtl.h"
35 : #include "recog.h"
36 : #include "cfgrtl.h"
37 : #include "cfganal.h"
38 : #include "cfgcleanup.h"
39 : #include "alias.h"
40 : #include "toplev.h"
41 : #include "rtlhooks-def.h"
42 : #include "tree-pass.h"
43 : #include "dbgcnt.h"
44 : #include "rtl-iter.h"
45 : #include "regs.h"
46 : #include "function-abi.h"
47 : #include "rtlanal.h"
48 : #include "expr.h"
49 :
50 : /* The basic idea of common subexpression elimination is to go
51 : through the code, keeping a record of expressions that would
52 : have the same value at the current scan point, and replacing
53 : expressions encountered with the cheapest equivalent expression.
54 :
55 : It is too complicated to keep track of the different possibilities
56 : when control paths merge in this code; so, at each label, we forget all
57 : that is known and start fresh. This can be described as processing each
58 : extended basic block separately. We have a separate pass to perform
59 : global CSE.
60 :
61 : Note CSE can turn a conditional or computed jump into a nop or
62 : an unconditional jump. When this occurs we arrange to run the jump
63 : optimizer after CSE to delete the unreachable code.
64 :
65 : We use two data structures to record the equivalent expressions:
66 : a hash table for most expressions, and a vector of "quantity
67 : numbers" to record equivalent (pseudo) registers.
68 :
69 : The use of the special data structure for registers is desirable
70 : because it is faster. It is possible because registers references
71 : contain a fairly small number, the register number, taken from
72 : a contiguously allocated series, and two register references are
73 : identical if they have the same number. General expressions
74 : do not have any such thing, so the only way to retrieve the
75 : information recorded on an expression other than a register
76 : is to keep it in a hash table.
77 :
78 : Registers and "quantity numbers":
79 :
80 : At the start of each basic block, all of the (hardware and pseudo)
81 : registers used in the function are given distinct quantity
82 : numbers to indicate their contents. During scan, when the code
83 : copies one register into another, we copy the quantity number.
84 : When a register is loaded in any other way, we allocate a new
85 : quantity number to describe the value generated by this operation.
86 : `REG_QTY (N)' records what quantity register N is currently thought
87 : of as containing.
88 :
89 : All real quantity numbers are greater than or equal to zero.
90 : If register N has not been assigned a quantity, `REG_QTY (N)' will
91 : equal -N - 1, which is always negative.
92 :
93 : Quantity numbers below zero do not exist and none of the `qty_table'
94 : entries should be referenced with a negative index.
95 :
96 : We also maintain a bidirectional chain of registers for each
97 : quantity number. The `qty_table` members `first_reg' and `last_reg',
98 : and `reg_eqv_table' members `next' and `prev' hold these chains.
99 :
100 : The first register in a chain is the one whose lifespan is least local.
101 : Among equals, it is the one that was seen first.
102 : We replace any equivalent register with that one.
103 :
104 : If two registers have the same quantity number, it must be true that
105 : REG expressions with qty_table `mode' must be in the hash table for both
106 : registers and must be in the same class.
107 :
108 : The converse is not true. Since hard registers may be referenced in
109 : any mode, two REG expressions might be equivalent in the hash table
110 : but not have the same quantity number if the quantity number of one
111 : of the registers is not the same mode as those expressions.
112 :
113 : Constants and quantity numbers
114 :
115 : When a quantity has a known constant value, that value is stored
116 : in the appropriate qty_table `const_rtx'. This is in addition to
117 : putting the constant in the hash table as is usual for non-regs.
118 :
119 : Whether a reg or a constant is preferred is determined by the configuration
120 : macro CONST_COSTS and will often depend on the constant value. In any
121 : event, expressions containing constants can be simplified, by fold_rtx.
122 :
123 : When a quantity has a known nearly constant value (such as an address
124 : of a stack slot), that value is stored in the appropriate qty_table
125 : `const_rtx'.
126 :
127 : Integer constants don't have a machine mode. However, cse
128 : determines the intended machine mode from the destination
129 : of the instruction that moves the constant. The machine mode
130 : is recorded in the hash table along with the actual RTL
131 : constant expression so that different modes are kept separate.
132 :
133 : Other expressions:
134 :
135 : To record known equivalences among expressions in general
136 : we use a hash table called `table'. It has a fixed number of buckets
137 : that contain chains of `struct table_elt' elements for expressions.
138 : These chains connect the elements whose expressions have the same
139 : hash codes.
140 :
141 : Other chains through the same elements connect the elements which
142 : currently have equivalent values.
143 :
144 : Register references in an expression are canonicalized before hashing
145 : the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 : The hash code of a register reference is computed using the quantity
147 : number, not the register number.
148 :
149 : When the value of an expression changes, it is necessary to remove from the
150 : hash table not just that expression but all expressions whose values
151 : could be different as a result.
152 :
153 : 1. If the value changing is in memory, except in special cases
154 : ANYTHING referring to memory could be changed. That is because
155 : nobody knows where a pointer does not point.
156 : The function `invalidate_memory' removes what is necessary.
157 :
158 : The special cases are when the address is constant or is
159 : a constant plus a fixed register such as the frame pointer
160 : or a static chain pointer. When such addresses are stored in,
161 : we can tell exactly which other such addresses must be invalidated
162 : due to overlap. `invalidate' does this.
163 : All expressions that refer to non-constant
164 : memory addresses are also invalidated. `invalidate_memory' does this.
165 :
166 : 2. If the value changing is a register, all expressions
167 : containing references to that register, and only those,
168 : must be removed.
169 :
170 : Because searching the entire hash table for expressions that contain
171 : a register is very slow, we try to figure out when it isn't necessary.
172 : Precisely, this is necessary only when expressions have been
173 : entered in the hash table using this register, and then the value has
174 : changed, and then another expression wants to be added to refer to
175 : the register's new value. This sequence of circumstances is rare
176 : within any one basic block.
177 :
178 : `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 : cse_reg_info, are used to detect this case. REG_TICK (i) is
180 : incremented whenever a value is stored in register i.
181 : REG_IN_TABLE (i) holds -1 if no references to register i have been
182 : entered in the table; otherwise, it contains the value REG_TICK (i)
183 : had when the references were entered. If we want to enter a
184 : reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 : remove old references. Until we want to enter a new entry, the
186 : mere fact that the two vectors don't match makes the entries be
187 : ignored if anyone tries to match them.
188 :
189 : Registers themselves are entered in the hash table as well as in
190 : the equivalent-register chains. However, `REG_TICK' and
191 : `REG_IN_TABLE' do not apply to expressions which are simple
192 : register references. These expressions are removed from the table
193 : immediately when they become invalid, and this can be done even if
194 : we do not immediately search for all the expressions that refer to
195 : the register.
196 :
197 : A CLOBBER rtx in an instruction invalidates its operand for further
198 : reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 : invalidates everything that resides in memory.
200 :
201 : Related expressions:
202 :
203 : Constant expressions that differ only by an additive integer
204 : are called related. When a constant expression is put in
205 : the table, the related expression with no constant term
206 : is also entered. These are made to point at each other
207 : so that it is possible to find out if there exists any
208 : register equivalent to an expression related to a given expression. */
209 :
210 : /* Length of qty_table vector. We know in advance we will not need
211 : a quantity number this big. */
212 :
213 : static int max_qty;
214 :
215 : /* Next quantity number to be allocated.
216 : This is 1 + the largest number needed so far. */
217 :
218 : static int next_qty;
219 :
220 : /* Per-qty information tracking.
221 :
222 : `first_reg' and `last_reg' track the head and tail of the
223 : chain of registers which currently contain this quantity.
224 :
225 : `mode' contains the machine mode of this quantity.
226 :
227 : `const_rtx' holds the rtx of the constant value of this
228 : quantity, if known. A summations of the frame/arg pointer
229 : and a constant can also be entered here. When this holds
230 : a known value, `const_insn' is the insn which stored the
231 : constant value.
232 :
233 : `comparison_{code,const,qty}' are used to track when a
234 : comparison between a quantity and some constant or register has
235 : been passed. In such a case, we know the results of the comparison
236 : in case we see it again. These members record a comparison that
237 : is known to be true. `comparison_code' holds the rtx code of such
238 : a comparison, else it is set to UNKNOWN and the other two
239 : comparison members are undefined. `comparison_const' holds
240 : the constant being compared against, or zero if the comparison
241 : is not against a constant. `comparison_qty' holds the quantity
242 : being compared against when the result is known. If the comparison
243 : is not with a register, `comparison_qty' is INT_MIN. */
244 :
245 : struct qty_table_elem
246 : {
247 : rtx const_rtx;
248 : rtx_insn *const_insn;
249 : rtx comparison_const;
250 : int comparison_qty;
251 : unsigned int first_reg, last_reg;
252 : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
253 : ENUM_BITFIELD(rtx_code) comparison_code : RTX_CODE_BITSIZE;
254 : };
255 :
256 : /* The table of all qtys, indexed by qty number. */
257 : static struct qty_table_elem *qty_table;
258 :
259 : /* Insn being scanned. */
260 :
261 : static rtx_insn *this_insn;
262 : static bool optimize_this_for_speed_p;
263 :
264 : /* Index by register number, gives the number of the next (or
265 : previous) register in the chain of registers sharing the same
266 : value.
267 :
268 : Or -1 if this register is at the end of the chain.
269 :
270 : If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
271 :
272 : /* Per-register equivalence chain. */
273 : struct reg_eqv_elem
274 : {
275 : int next, prev;
276 : };
277 :
278 : /* The table of all register equivalence chains. */
279 : static struct reg_eqv_elem *reg_eqv_table;
280 :
281 : struct cse_reg_info
282 : {
283 : /* The timestamp at which this register is initialized. */
284 : unsigned int timestamp;
285 :
286 : /* The quantity number of the register's current contents. */
287 : int reg_qty;
288 :
289 : /* The number of times the register has been altered in the current
290 : basic block. */
291 : int reg_tick;
292 :
293 : /* The REG_TICK value at which rtx's containing this register are
294 : valid in the hash table. If this does not equal the current
295 : reg_tick value, such expressions existing in the hash table are
296 : invalid. */
297 : int reg_in_table;
298 :
299 : /* The SUBREG that was set when REG_TICK was last incremented. Set
300 : to -1 if the last store was to the whole register, not a subreg. */
301 : unsigned int subreg_ticked;
302 : };
303 :
304 : /* A table of cse_reg_info indexed by register numbers. */
305 : static struct cse_reg_info *cse_reg_info_table;
306 :
307 : /* The size of the above table. */
308 : static unsigned int cse_reg_info_table_size;
309 :
310 : /* The index of the first entry that has not been initialized. */
311 : static unsigned int cse_reg_info_table_first_uninitialized;
312 :
313 : /* The timestamp at the beginning of the current run of
314 : cse_extended_basic_block. We increment this variable at the beginning of
315 : the current run of cse_extended_basic_block. The timestamp field of a
316 : cse_reg_info entry matches the value of this variable if and only
317 : if the entry has been initialized during the current run of
318 : cse_extended_basic_block. */
319 : static unsigned int cse_reg_info_timestamp;
320 :
321 : /* A HARD_REG_SET containing all the hard registers for which there is
322 : currently a REG expression in the hash table. Note the difference
323 : from the above variables, which indicate if the REG is mentioned in some
324 : expression in the table. */
325 :
326 : static HARD_REG_SET hard_regs_in_table;
327 :
328 : /* True if CSE has altered the CFG. */
329 : static bool cse_cfg_altered;
330 :
331 : /* True if CSE has altered conditional jump insns in such a way
332 : that jump optimization should be redone. */
333 : static bool cse_jumps_altered;
334 :
335 : /* True if we put a LABEL_REF into the hash table for an INSN
336 : without a REG_LABEL_OPERAND, we have to rerun jump after CSE
337 : to put in the note. */
338 : static bool recorded_label_ref;
339 :
340 : /* canon_hash stores 1 in do_not_record if it notices a reference to PC or
341 : some other volatile subexpression. */
342 :
343 : static int do_not_record;
344 :
345 : /* canon_hash stores 1 in hash_arg_in_memory
346 : if it notices a reference to memory within the expression being hashed. */
347 :
348 : static int hash_arg_in_memory;
349 :
350 : /* The hash table contains buckets which are chains of `struct table_elt's,
351 : each recording one expression's information.
352 : That expression is in the `exp' field.
353 :
354 : The canon_exp field contains a canonical (from the point of view of
355 : alias analysis) version of the `exp' field.
356 :
357 : Those elements with the same hash code are chained in both directions
358 : through the `next_same_hash' and `prev_same_hash' fields.
359 :
360 : Each set of expressions with equivalent values
361 : are on a two-way chain through the `next_same_value'
362 : and `prev_same_value' fields, and all point with
363 : the `first_same_value' field at the first element in
364 : that chain. The chain is in order of increasing cost.
365 : Each element's cost value is in its `cost' field.
366 :
367 : The `in_memory' field is nonzero for elements that
368 : involve any reference to memory. These elements are removed
369 : whenever a write is done to an unidentified location in memory.
370 : To be safe, we assume that a memory address is unidentified unless
371 : the address is either a symbol constant or a constant plus
372 : the frame pointer or argument pointer.
373 :
374 : The `related_value' field is used to connect related expressions
375 : (that differ by adding an integer).
376 : The related expressions are chained in a circular fashion.
377 : `related_value' is zero for expressions for which this
378 : chain is not useful.
379 :
380 : The `cost' field stores the cost of this element's expression.
381 : The `regcost' field stores the value returned by approx_reg_cost for
382 : this element's expression.
383 :
384 : The `is_const' flag is set if the element is a constant (including
385 : a fixed address).
386 :
387 : The `flag' field is used as a temporary during some search routines.
388 :
389 : The `mode' field is usually the same as GET_MODE (`exp'), but
390 : if `exp' is a CONST_INT and has no machine mode then the `mode'
391 : field is the mode it was being used as. Each constant is
392 : recorded separately for each mode it is used with. */
393 :
394 : struct table_elt
395 : {
396 : rtx exp;
397 : rtx canon_exp;
398 : struct table_elt *next_same_hash;
399 : struct table_elt *prev_same_hash;
400 : struct table_elt *next_same_value;
401 : struct table_elt *prev_same_value;
402 : struct table_elt *first_same_value;
403 : struct table_elt *related_value;
404 : int cost;
405 : int regcost;
406 : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
407 : char in_memory;
408 : char is_const;
409 : char flag;
410 : };
411 :
412 : /* We don't want a lot of buckets, because we rarely have very many
413 : things stored in the hash table, and a lot of buckets slows
414 : down a lot of loops that happen frequently. */
415 : #define HASH_SHIFT 5
416 : #define HASH_SIZE (1 << HASH_SHIFT)
417 : #define HASH_MASK (HASH_SIZE - 1)
418 :
419 : /* Determine whether register number N is considered a fixed register for the
420 : purpose of approximating register costs.
421 : It is desirable to replace other regs with fixed regs, to reduce need for
422 : non-fixed hard regs.
423 : A reg wins if it is either the frame pointer or designated as fixed. */
424 : #define FIXED_REGNO_P(N) \
425 : ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
426 : || fixed_regs[N] || global_regs[N])
427 :
428 : /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
429 : hard registers and pointers into the frame are the cheapest with a cost
430 : of 0. Next come pseudos with a cost of one and other hard registers with
431 : a cost of 2. Aside from these special cases, call `rtx_cost'. */
432 :
433 : #define CHEAP_REGNO(N) \
434 : (REGNO_PTR_FRAME_P (N) \
435 : || (HARD_REGISTER_NUM_P (N) \
436 : && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
437 :
438 : #define COST(X, MODE) \
439 : (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
440 : #define COST_IN(X, MODE, OUTER, OPNO) \
441 : (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
442 :
443 : /* Get the number of times this register has been updated in this
444 : basic block. */
445 :
446 : #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
447 :
448 : /* Get the point at which REG was recorded in the table. */
449 :
450 : #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
451 :
452 : /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
453 : SUBREG). */
454 :
455 : #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
456 :
457 : /* Get the quantity number for REG. */
458 :
459 : #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
460 :
461 : /* Determine if the quantity number for register X represents a valid index
462 : into the qty_table. */
463 :
464 : #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
465 :
466 : /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
467 :
468 : #define CHEAPER(X, Y) \
469 : (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
470 :
471 : static struct table_elt *table[HASH_SIZE];
472 :
473 : /* Chain of `struct table_elt's made so far for this function
474 : but currently removed from the table. */
475 :
476 : static struct table_elt *free_element_chain;
477 :
478 : /* Trace a patch through the CFG. */
479 :
480 : struct branch_path
481 : {
482 : /* The basic block for this path entry. */
483 : basic_block bb;
484 : };
485 :
486 : /* This data describes a block that will be processed by
487 : cse_extended_basic_block. */
488 :
489 : struct cse_basic_block_data
490 : {
491 : /* Total number of SETs in block. */
492 : int nsets;
493 : /* Size of current branch path, if any. */
494 : int path_size;
495 : /* Current path, indicating which basic_blocks will be processed. */
496 : struct branch_path *path;
497 : };
498 :
499 :
500 : /* Pointers to the live in/live out bitmaps for the boundaries of the
501 : current EBB. */
502 : static bitmap cse_ebb_live_in, cse_ebb_live_out;
503 :
504 : /* A simple bitmap to track which basic blocks have been visited
505 : already as part of an already processed extended basic block. */
506 : static sbitmap cse_visited_basic_blocks;
507 :
508 : static bool fixed_base_plus_p (rtx x);
509 : static int notreg_cost (rtx, machine_mode, enum rtx_code, int);
510 : static int preferable (int, int, int, int);
511 : static void new_basic_block (void);
512 : static void make_new_qty (unsigned int, machine_mode);
513 : static void make_regs_eqv (unsigned int, unsigned int);
514 : static void delete_reg_equiv (unsigned int);
515 : static bool mention_regs (rtx);
516 : static bool insert_regs (rtx, struct table_elt *, bool);
517 : static void remove_from_table (struct table_elt *, unsigned);
518 : static void remove_pseudo_from_table (rtx, unsigned);
519 : static struct table_elt *lookup (rtx, unsigned, machine_mode);
520 : static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode);
521 : static rtx lookup_as_function (rtx, enum rtx_code);
522 : static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
523 : machine_mode, int, int);
524 : static struct table_elt *insert (rtx, struct table_elt *, unsigned,
525 : machine_mode);
526 : static void merge_equiv_classes (struct table_elt *, struct table_elt *);
527 : static void invalidate (rtx, machine_mode);
528 : static void remove_invalid_refs (unsigned int);
529 : static void remove_invalid_subreg_refs (unsigned int, poly_uint64,
530 : machine_mode);
531 : static void rehash_using_reg (rtx);
532 : static void invalidate_memory (void);
533 : static rtx use_related_value (rtx, struct table_elt *);
534 :
535 : static inline unsigned canon_hash (rtx, machine_mode);
536 : static inline unsigned safe_hash (rtx, machine_mode);
537 : static inline unsigned hash_rtx_string (const char *);
538 :
539 : static rtx canon_reg (rtx, rtx_insn *);
540 : static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
541 : machine_mode *,
542 : machine_mode *);
543 : static rtx fold_rtx (rtx, rtx_insn *);
544 : static rtx equiv_constant (rtx);
545 : static void record_jump_equiv (rtx_insn *, bool);
546 : static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx);
547 : static void cse_insn (rtx_insn *);
548 : static void cse_prescan_path (struct cse_basic_block_data *);
549 : static void invalidate_from_clobbers (rtx_insn *);
550 : static void invalidate_from_sets_and_clobbers (rtx_insn *);
551 : static void cse_extended_basic_block (struct cse_basic_block_data *);
552 : extern void dump_class (struct table_elt*);
553 : static void get_cse_reg_info_1 (unsigned int regno);
554 : static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
555 :
556 : static void flush_hash_table (void);
557 : static bool insn_live_p (rtx_insn *, int *);
558 : static bool set_live_p (rtx, int *);
559 : static void cse_change_cc_mode_insn (rtx_insn *, rtx);
560 : static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
561 : static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
562 : bool);
563 :
564 :
565 : #undef RTL_HOOKS_GEN_LOWPART
566 : #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
567 :
568 : static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
569 :
570 : /* Compute hash code of X in mode M. Special-case case where X is a pseudo
571 : register (hard registers may require `do_not_record' to be set). */
572 :
573 : static inline unsigned
574 836507076 : HASH (rtx x, machine_mode mode)
575 : {
576 542888820 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
577 1159225320 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
578 836507076 : : canon_hash (x, mode));
579 836507076 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
580 : }
581 :
582 : /* Like HASH, but without side-effects. */
583 :
584 : static inline unsigned
585 229402904 : SAFE_HASH (rtx x, machine_mode mode)
586 : {
587 117440933 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
588 296067722 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
589 229402904 : : safe_hash (x, mode));
590 229402904 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
591 : }
592 :
593 : /* Nonzero if X has the form (PLUS frame-pointer integer). */
594 :
595 : static bool
596 237502412 : fixed_base_plus_p (rtx x)
597 : {
598 269681821 : switch (GET_CODE (x))
599 : {
600 140427663 : case REG:
601 140427663 : if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
602 : return true;
603 126289668 : if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
604 117316 : return true;
605 : return false;
606 :
607 38413642 : case PLUS:
608 38413642 : if (!CONST_INT_P (XEXP (x, 1)))
609 : return false;
610 32179409 : return fixed_base_plus_p (XEXP (x, 0));
611 :
612 : default:
613 : return false;
614 : }
615 : }
616 :
617 : /* Dump the expressions in the equivalence class indicated by CLASSP.
618 : This function is used only for debugging. */
619 : DEBUG_FUNCTION void
620 0 : dump_class (struct table_elt *classp)
621 : {
622 0 : struct table_elt *elt;
623 :
624 0 : fprintf (stderr, "Equivalence chain for ");
625 0 : print_rtl (stderr, classp->exp);
626 0 : fprintf (stderr, ": \n");
627 :
628 0 : for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
629 : {
630 0 : print_rtl (stderr, elt->exp);
631 0 : fprintf (stderr, "\n");
632 : }
633 0 : }
634 :
635 : /* Return an estimate of the cost of the registers used in an rtx.
636 : This is mostly the number of different REG expressions in the rtx;
637 : however for some exceptions like fixed registers we use a cost of
638 : 0. If any other hard register reference occurs, return MAX_COST. */
639 :
640 : static int
641 433887302 : approx_reg_cost (const_rtx x)
642 : {
643 433887302 : int cost = 0;
644 433887302 : subrtx_iterator::array_type array;
645 1368926086 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
646 : {
647 991339998 : const_rtx x = *iter;
648 991339998 : if (REG_P (x))
649 : {
650 410766886 : unsigned int regno = REGNO (x);
651 410766886 : if (!CHEAP_REGNO (regno))
652 : {
653 56301214 : if (regno < FIRST_PSEUDO_REGISTER)
654 : {
655 56301214 : if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
656 56301214 : return MAX_COST;
657 0 : cost += 2;
658 : }
659 : else
660 291741153 : cost += 1;
661 : }
662 : }
663 : }
664 377586088 : return cost;
665 433887302 : }
666 :
667 : /* Return a negative value if an rtx A, whose costs are given by COST_A
668 : and REGCOST_A, is more desirable than an rtx B.
669 : Return a positive value if A is less desirable, or 0 if the two are
670 : equally good. */
671 : static int
672 659371854 : preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
673 : {
674 : /* First, get rid of cases involving expressions that are entirely
675 : unwanted. */
676 659371854 : if (cost_a != cost_b)
677 : {
678 616512995 : if (cost_a == MAX_COST)
679 : return 1;
680 615094015 : if (cost_b == MAX_COST)
681 : return -1;
682 : }
683 :
684 : /* Avoid extending lifetimes of hardregs. */
685 172979845 : if (regcost_a != regcost_b)
686 : {
687 94025248 : if (regcost_a == MAX_COST)
688 : return 1;
689 72685590 : if (regcost_b == MAX_COST)
690 : return -1;
691 : }
692 :
693 : /* Normal operation costs take precedence. */
694 149718368 : if (cost_a != cost_b)
695 106981819 : return cost_a - cost_b;
696 : /* Only if these are identical consider effects on register pressure. */
697 42736549 : if (regcost_a != regcost_b)
698 42736549 : return regcost_a - regcost_b;
699 : return 0;
700 : }
701 :
702 : /* Internal function, to compute cost when X is not a register; called
703 : from COST macro to keep it simple. */
704 :
705 : static int
706 306332740 : notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno)
707 : {
708 306332740 : scalar_int_mode int_mode, inner_mode;
709 306332740 : return ((GET_CODE (x) == SUBREG
710 5300158 : && REG_P (SUBREG_REG (x))
711 308385121 : && is_int_mode (mode, &int_mode)
712 307607996 : && is_int_mode (GET_MODE (SUBREG_REG (x)), &inner_mode)
713 7716352 : && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
714 3802511 : && subreg_lowpart_p (x)
715 2582920 : && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode))
716 306332740 : ? 0
717 303749820 : : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2);
718 : }
719 :
720 :
721 : /* Initialize CSE_REG_INFO_TABLE. */
722 :
723 : static void
724 2291532 : init_cse_reg_info (unsigned int nregs)
725 : {
726 : /* Do we need to grow the table? */
727 2291532 : if (nregs > cse_reg_info_table_size)
728 : {
729 175051 : unsigned int new_size;
730 :
731 175051 : if (cse_reg_info_table_size < 2048)
732 : {
733 : /* Compute a new size that is a power of 2 and no smaller
734 : than the large of NREGS and 64. */
735 31480 : new_size = (cse_reg_info_table_size
736 174746 : ? cse_reg_info_table_size : 64);
737 :
738 387665 : while (new_size < nregs)
739 212919 : new_size *= 2;
740 : }
741 : else
742 : {
743 : /* If we need a big table, allocate just enough to hold
744 : NREGS registers. */
745 : new_size = nregs;
746 : }
747 :
748 : /* Reallocate the table with NEW_SIZE entries. */
749 175051 : free (cse_reg_info_table);
750 175051 : cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
751 175051 : cse_reg_info_table_size = new_size;
752 175051 : cse_reg_info_table_first_uninitialized = 0;
753 : }
754 :
755 : /* Do we have all of the first NREGS entries initialized? */
756 2291532 : if (cse_reg_info_table_first_uninitialized < nregs)
757 : {
758 315579 : unsigned int old_timestamp = cse_reg_info_timestamp - 1;
759 315579 : unsigned int i;
760 :
761 : /* Put the old timestamp on newly allocated entries so that they
762 : will all be considered out of date. We do not touch those
763 : entries beyond the first NREGS entries to be nice to the
764 : virtual memory. */
765 32904199 : for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
766 32588620 : cse_reg_info_table[i].timestamp = old_timestamp;
767 :
768 315579 : cse_reg_info_table_first_uninitialized = nregs;
769 : }
770 2291532 : }
771 :
772 : /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
773 :
774 : static void
775 845411150 : get_cse_reg_info_1 (unsigned int regno)
776 : {
777 : /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
778 : entry will be considered to have been initialized. */
779 845411150 : cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
780 :
781 : /* Initialize the rest of the entry. */
782 845411150 : cse_reg_info_table[regno].reg_tick = 1;
783 845411150 : cse_reg_info_table[regno].reg_in_table = -1;
784 845411150 : cse_reg_info_table[regno].subreg_ticked = -1;
785 845411150 : cse_reg_info_table[regno].reg_qty = -regno - 1;
786 845411150 : }
787 :
788 : /* Find a cse_reg_info entry for REGNO. */
789 :
790 : static inline struct cse_reg_info *
791 11074702636 : get_cse_reg_info (unsigned int regno)
792 : {
793 11074702636 : struct cse_reg_info *p = &cse_reg_info_table[regno];
794 :
795 : /* If this entry has not been initialized, go ahead and initialize
796 : it. */
797 11074702636 : if (p->timestamp != cse_reg_info_timestamp)
798 845411150 : get_cse_reg_info_1 (regno);
799 :
800 11074702636 : return p;
801 : }
802 :
803 : /* Clear the hash table and initialize each register with its own quantity,
804 : for a new basic block. */
805 :
806 : static void
807 20671616 : new_basic_block (void)
808 : {
809 20671616 : int i;
810 :
811 20671616 : next_qty = 0;
812 :
813 : /* Invalidate cse_reg_info_table. */
814 20671616 : cse_reg_info_timestamp++;
815 :
816 : /* Clear out hash table state for this pass. */
817 20671616 : CLEAR_HARD_REG_SET (hard_regs_in_table);
818 :
819 : /* The per-quantity values used to be initialized here, but it is
820 : much faster to initialize each as it is made in `make_new_qty'. */
821 :
822 682163328 : for (i = 0; i < HASH_SIZE; i++)
823 : {
824 661491712 : struct table_elt *first;
825 :
826 661491712 : first = table[i];
827 661491712 : if (first != NULL)
828 : {
829 136526833 : struct table_elt *last = first;
830 :
831 136526833 : table[i] = NULL;
832 :
833 193060347 : while (last->next_same_hash != NULL)
834 : last = last->next_same_hash;
835 :
836 : /* Now relink this hash entire chain into
837 : the free element list. */
838 :
839 136526833 : last->next_same_hash = free_element_chain;
840 136526833 : free_element_chain = first;
841 : }
842 : }
843 20671616 : }
844 :
845 : /* Say that register REG contains a quantity in mode MODE not in any
846 : register before and initialize that quantity. */
847 :
848 : static void
849 104161817 : make_new_qty (unsigned int reg, machine_mode mode)
850 : {
851 104161817 : int q;
852 104161817 : struct qty_table_elem *ent;
853 104161817 : struct reg_eqv_elem *eqv;
854 :
855 104161817 : gcc_assert (next_qty < max_qty);
856 :
857 104161817 : q = REG_QTY (reg) = next_qty++;
858 104161817 : ent = &qty_table[q];
859 104161817 : ent->first_reg = reg;
860 104161817 : ent->last_reg = reg;
861 104161817 : ent->mode = mode;
862 104161817 : ent->const_rtx = ent->const_insn = NULL;
863 104161817 : ent->comparison_code = UNKNOWN;
864 :
865 104161817 : eqv = ®_eqv_table[reg];
866 104161817 : eqv->next = eqv->prev = -1;
867 104161817 : }
868 :
869 : /* Make reg NEW equivalent to reg OLD.
870 : OLD is not changing; NEW is. */
871 :
872 : static void
873 11480887 : make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
874 : {
875 11480887 : unsigned int lastr, firstr;
876 11480887 : int q = REG_QTY (old_reg);
877 11480887 : struct qty_table_elem *ent;
878 :
879 11480887 : ent = &qty_table[q];
880 :
881 : /* Nothing should become eqv until it has a "non-invalid" qty number. */
882 11480887 : gcc_assert (REGNO_QTY_VALID_P (old_reg));
883 :
884 11480887 : REG_QTY (new_reg) = q;
885 11480887 : firstr = ent->first_reg;
886 11480887 : lastr = ent->last_reg;
887 :
888 : /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
889 : hard regs. Among pseudos, if NEW will live longer than any other reg
890 : of the same qty, and that is beyond the current basic block,
891 : make it the new canonical replacement for this qty. */
892 315425 : if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
893 : /* Certain fixed registers might be of the class NO_REGS. This means
894 : that not only can they not be allocated by the compiler, but
895 : they cannot be used in substitutions or canonicalizations
896 : either. */
897 11165462 : && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
898 11485447 : && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
899 11160902 : || (new_reg >= FIRST_PSEUDO_REGISTER
900 11160902 : && (firstr < FIRST_PSEUDO_REGISTER
901 11160902 : || (bitmap_bit_p (cse_ebb_live_out, new_reg)
902 3599854 : && !bitmap_bit_p (cse_ebb_live_out, firstr))
903 9132357 : || (bitmap_bit_p (cse_ebb_live_in, new_reg)
904 468056 : && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
905 : {
906 2130624 : reg_eqv_table[firstr].prev = new_reg;
907 2130624 : reg_eqv_table[new_reg].next = firstr;
908 2130624 : reg_eqv_table[new_reg].prev = -1;
909 2130624 : ent->first_reg = new_reg;
910 : }
911 : else
912 : {
913 : /* If NEW is a hard reg (known to be non-fixed), insert at end.
914 : Otherwise, insert before any non-fixed hard regs that are at the
915 : end. Registers of class NO_REGS cannot be used as an
916 : equivalent for anything. */
917 297352 : while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
918 0 : && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
919 9350263 : && new_reg >= FIRST_PSEUDO_REGISTER)
920 0 : lastr = reg_eqv_table[lastr].prev;
921 9350263 : reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
922 9350263 : if (reg_eqv_table[lastr].next >= 0)
923 0 : reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
924 : else
925 9350263 : qty_table[q].last_reg = new_reg;
926 9350263 : reg_eqv_table[lastr].next = new_reg;
927 9350263 : reg_eqv_table[new_reg].prev = lastr;
928 : }
929 11480887 : }
930 :
931 : /* Remove REG from its equivalence class. */
932 :
933 : static void
934 1469600940 : delete_reg_equiv (unsigned int reg)
935 : {
936 1469600940 : struct qty_table_elem *ent;
937 1469600940 : int q = REG_QTY (reg);
938 1469600940 : int p, n;
939 :
940 : /* If invalid, do nothing. */
941 1469600940 : if (! REGNO_QTY_VALID_P (reg))
942 : return;
943 :
944 18698029 : ent = &qty_table[q];
945 :
946 18698029 : p = reg_eqv_table[reg].prev;
947 18698029 : n = reg_eqv_table[reg].next;
948 :
949 18698029 : if (n != -1)
950 657800 : reg_eqv_table[n].prev = p;
951 : else
952 18040229 : ent->last_reg = p;
953 18698029 : if (p != -1)
954 646254 : reg_eqv_table[p].next = n;
955 : else
956 18051775 : ent->first_reg = n;
957 :
958 18698029 : REG_QTY (reg) = -reg - 1;
959 : }
960 :
961 : /* Remove any invalid expressions from the hash table
962 : that refer to any of the registers contained in expression X.
963 :
964 : Make sure that newly inserted references to those registers
965 : as subexpressions will be considered valid.
966 :
967 : mention_regs is not called when a register itself
968 : is being stored in the table.
969 :
970 : Return true if we have done something that may have changed
971 : the hash code of X. */
972 :
973 : static bool
974 465691820 : mention_regs (rtx x)
975 : {
976 465691820 : enum rtx_code code;
977 465691820 : int i, j;
978 465691820 : const char *fmt;
979 465691820 : bool changed = false;
980 :
981 465691820 : if (x == 0)
982 : return false;
983 :
984 465691820 : code = GET_CODE (x);
985 465691820 : if (code == REG)
986 : {
987 140720845 : unsigned int regno = REGNO (x);
988 140720845 : unsigned int endregno = END_REGNO (x);
989 140720845 : unsigned int i;
990 :
991 281441690 : for (i = regno; i < endregno; i++)
992 : {
993 140720845 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
994 170002 : remove_invalid_refs (i);
995 :
996 140720845 : REG_IN_TABLE (i) = REG_TICK (i);
997 140720845 : SUBREG_TICKED (i) = -1;
998 : }
999 :
1000 : return false;
1001 : }
1002 :
1003 : /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1004 : pseudo if they don't use overlapping words. We handle only pseudos
1005 : here for simplicity. */
1006 7626950 : if (code == SUBREG && REG_P (SUBREG_REG (x))
1007 332587063 : && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1008 : {
1009 7615975 : unsigned int i = REGNO (SUBREG_REG (x));
1010 :
1011 7615975 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1012 : {
1013 : /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1014 : the last store to this register really stored into this
1015 : subreg, then remove the memory of this subreg.
1016 : Otherwise, remove any memory of the entire register and
1017 : all its subregs from the table. */
1018 328019 : if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1019 328019 : || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1020 328019 : remove_invalid_refs (i);
1021 : else
1022 0 : remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1023 : }
1024 :
1025 7615975 : REG_IN_TABLE (i) = REG_TICK (i);
1026 7615975 : SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1027 7615975 : return false;
1028 : }
1029 :
1030 : /* If X is a comparison or a COMPARE and either operand is a register
1031 : that does not have a quantity, give it one. This is so that a later
1032 : call to record_jump_equiv won't cause X to be assigned a different
1033 : hash code and not found in the table after that call.
1034 :
1035 : It is not necessary to do this here, since rehash_using_reg can
1036 : fix up the table later, but doing this here eliminates the need to
1037 : call that expensive function in the most common case where the only
1038 : use of the register is in the comparison. */
1039 :
1040 317355000 : if (code == COMPARE || COMPARISON_P (x))
1041 : {
1042 23530581 : if (REG_P (XEXP (x, 0))
1043 23530581 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1044 8849952 : if (insert_regs (XEXP (x, 0), NULL, false))
1045 : {
1046 8849952 : rehash_using_reg (XEXP (x, 0));
1047 8849952 : changed = true;
1048 : }
1049 :
1050 23530581 : if (REG_P (XEXP (x, 1))
1051 23530581 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1052 2441952 : if (insert_regs (XEXP (x, 1), NULL, false))
1053 : {
1054 2441952 : rehash_using_reg (XEXP (x, 1));
1055 2441952 : changed = true;
1056 : }
1057 : }
1058 :
1059 317355000 : fmt = GET_RTX_FORMAT (code);
1060 824520600 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1061 507165600 : if (fmt[i] == 'e')
1062 : {
1063 299916864 : if (mention_regs (XEXP (x, i)))
1064 507165600 : changed = true;
1065 : }
1066 207248736 : else if (fmt[i] == 'E')
1067 17344739 : for (j = 0; j < XVECLEN (x, i); j++)
1068 13064938 : if (mention_regs (XVECEXP (x, i, j)))
1069 360518 : changed = true;
1070 :
1071 : return changed;
1072 : }
1073 :
1074 : /* Update the register quantities for inserting X into the hash table
1075 : with a value equivalent to CLASSP.
1076 : (If the class does not contain a REG, it is irrelevant.)
1077 : If MODIFIED is true, X is a destination; it is being modified.
1078 : Note that delete_reg_equiv should be called on a register
1079 : before insert_regs is done on that register with MODIFIED != 0.
1080 :
1081 : True value means that elements of reg_qty have changed
1082 : so X's hash code may be different. */
1083 :
1084 : static bool
1085 251360850 : insert_regs (rtx x, struct table_elt *classp, bool modified)
1086 : {
1087 251360850 : if (REG_P (x))
1088 : {
1089 122107946 : unsigned int regno = REGNO (x);
1090 122107946 : int qty_valid;
1091 :
1092 : /* If REGNO is in the equivalence table already but is of the
1093 : wrong mode for that equivalence, don't do anything here. */
1094 :
1095 122107946 : qty_valid = REGNO_QTY_VALID_P (regno);
1096 122107946 : if (qty_valid)
1097 : {
1098 6465242 : struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1099 :
1100 6465242 : if (ent->mode != GET_MODE (x))
1101 : return false;
1102 : }
1103 :
1104 122107946 : if (modified || ! qty_valid)
1105 : {
1106 115642704 : if (classp)
1107 93540937 : for (classp = classp->first_same_value;
1108 184674368 : classp != 0;
1109 91133431 : classp = classp->next_same_value)
1110 102614318 : if (REG_P (classp->exp)
1111 11480887 : && GET_MODE (classp->exp) == GET_MODE (x))
1112 : {
1113 11480887 : unsigned c_regno = REGNO (classp->exp);
1114 :
1115 11480887 : gcc_assert (REGNO_QTY_VALID_P (c_regno));
1116 :
1117 : /* Suppose that 5 is hard reg and 100 and 101 are
1118 : pseudos. Consider
1119 :
1120 : (set (reg:si 100) (reg:si 5))
1121 : (set (reg:si 5) (reg:si 100))
1122 : (set (reg:di 101) (reg:di 5))
1123 :
1124 : We would now set REG_QTY (101) = REG_QTY (5), but the
1125 : entry for 5 is in SImode. When we use this later in
1126 : copy propagation, we get the register in wrong mode. */
1127 11480887 : if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1128 0 : continue;
1129 :
1130 11480887 : make_regs_eqv (regno, c_regno);
1131 11480887 : return true;
1132 : }
1133 :
1134 : /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1135 : than REG_IN_TABLE to find out if there was only a single preceding
1136 : invalidation - for the SUBREG - or another one, which would be
1137 : for the full register. However, if we find here that REG_TICK
1138 : indicates that the register is invalid, it means that it has
1139 : been invalidated in a separate operation. The SUBREG might be used
1140 : now (then this is a recursive call), or we might use the full REG
1141 : now and a SUBREG of it later. So bump up REG_TICK so that
1142 : mention_regs will do the right thing. */
1143 104161817 : if (! modified
1144 22310404 : && REG_IN_TABLE (regno) >= 0
1145 106216528 : && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1146 447 : REG_TICK (regno)++;
1147 104161817 : make_new_qty (regno, GET_MODE (x));
1148 104161817 : return true;
1149 : }
1150 :
1151 : return false;
1152 : }
1153 :
1154 : /* If X is a SUBREG, we will likely be inserting the inner register in the
1155 : table. If that register doesn't have an assigned quantity number at
1156 : this point but does later, the insertion that we will be doing now will
1157 : not be accessible because its hash code will have changed. So assign
1158 : a quantity number now. */
1159 :
1160 3349833 : else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1161 132594293 : && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1162 : {
1163 1613554 : insert_regs (SUBREG_REG (x), NULL, false);
1164 1613554 : mention_regs (x);
1165 1613554 : return true;
1166 : }
1167 : else
1168 127639350 : return mention_regs (x);
1169 : }
1170 :
1171 :
1172 : /* Compute upper and lower anchors for CST. Also compute the offset of CST
1173 : from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1174 : CST is equal to an anchor. */
1175 :
1176 : static bool
1177 0 : compute_const_anchors (rtx cst,
1178 : HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1179 : HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1180 : {
1181 0 : unsigned HOST_WIDE_INT n = UINTVAL (cst);
1182 :
1183 0 : *lower_base = n & ~(targetm.const_anchor - 1);
1184 0 : if ((unsigned HOST_WIDE_INT) *lower_base == n)
1185 : return false;
1186 :
1187 0 : *upper_base = ((n + (targetm.const_anchor - 1))
1188 0 : & ~(targetm.const_anchor - 1));
1189 0 : *upper_offs = n - *upper_base;
1190 0 : *lower_offs = n - *lower_base;
1191 0 : return true;
1192 : }
1193 :
1194 : /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1195 :
1196 : static void
1197 0 : insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1198 : machine_mode mode)
1199 : {
1200 0 : struct table_elt *elt;
1201 0 : unsigned hash;
1202 0 : rtx anchor_exp;
1203 0 : rtx exp;
1204 :
1205 0 : anchor_exp = gen_int_mode (anchor, mode);
1206 0 : hash = HASH (anchor_exp, mode);
1207 0 : elt = lookup (anchor_exp, hash, mode);
1208 0 : if (!elt)
1209 0 : elt = insert (anchor_exp, NULL, hash, mode);
1210 :
1211 0 : exp = plus_constant (mode, reg, offs);
1212 : /* REG has just been inserted and the hash codes recomputed. */
1213 0 : mention_regs (exp);
1214 0 : hash = HASH (exp, mode);
1215 :
1216 : /* Use the cost of the register rather than the whole expression. When
1217 : looking up constant anchors we will further offset the corresponding
1218 : expression therefore it does not make sense to prefer REGs over
1219 : reg-immediate additions. Prefer instead the oldest expression. Also
1220 : don't prefer pseudos over hard regs so that we derive constants in
1221 : argument registers from other argument registers rather than from the
1222 : original pseudo that was used to synthesize the constant. */
1223 0 : insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1);
1224 0 : }
1225 :
1226 : /* The constant CST is equivalent to the register REG. Create
1227 : equivalences between the two anchors of CST and the corresponding
1228 : register-offset expressions using REG. */
1229 :
1230 : static void
1231 0 : insert_const_anchors (rtx reg, rtx cst, machine_mode mode)
1232 : {
1233 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1234 :
1235 0 : if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1236 : &upper_base, &upper_offs))
1237 0 : return;
1238 :
1239 : /* Ignore anchors of value 0. Constants accessible from zero are
1240 : simple. */
1241 0 : if (lower_base != 0)
1242 0 : insert_const_anchor (lower_base, reg, -lower_offs, mode);
1243 :
1244 0 : if (upper_base != 0)
1245 0 : insert_const_anchor (upper_base, reg, -upper_offs, mode);
1246 : }
1247 :
1248 : /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1249 : ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1250 : valid expression. Return the cheapest and oldest of such expressions. In
1251 : *OLD, return how old the resulting expression is compared to the other
1252 : equivalent expressions. */
1253 :
1254 : static rtx
1255 0 : find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1256 : unsigned *old)
1257 : {
1258 0 : struct table_elt *elt;
1259 0 : unsigned idx;
1260 0 : struct table_elt *match_elt;
1261 0 : rtx match;
1262 :
1263 : /* Find the cheapest and *oldest* expression to maximize the chance of
1264 : reusing the same pseudo. */
1265 :
1266 0 : match_elt = NULL;
1267 0 : match = NULL_RTX;
1268 0 : for (elt = anchor_elt->first_same_value, idx = 0;
1269 0 : elt;
1270 0 : elt = elt->next_same_value, idx++)
1271 : {
1272 0 : if (match_elt && CHEAPER (match_elt, elt))
1273 : return match;
1274 :
1275 0 : if (REG_P (elt->exp)
1276 0 : || (GET_CODE (elt->exp) == PLUS
1277 0 : && REG_P (XEXP (elt->exp, 0))
1278 0 : && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1279 : {
1280 0 : rtx x;
1281 :
1282 : /* Ignore expressions that are no longer valid. */
1283 0 : if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1284 0 : continue;
1285 :
1286 0 : x = plus_constant (GET_MODE (elt->exp), elt->exp, offs);
1287 0 : if (REG_P (x)
1288 0 : || (GET_CODE (x) == PLUS
1289 0 : && IN_RANGE (INTVAL (XEXP (x, 1)),
1290 : -targetm.const_anchor,
1291 : targetm.const_anchor - 1)))
1292 : {
1293 0 : match = x;
1294 0 : match_elt = elt;
1295 0 : *old = idx;
1296 : }
1297 : }
1298 : }
1299 :
1300 : return match;
1301 : }
1302 :
1303 : /* Try to express the constant SRC_CONST using a register+offset expression
1304 : derived from a constant anchor. Return it if successful or NULL_RTX,
1305 : otherwise. */
1306 :
1307 : static rtx
1308 0 : try_const_anchors (rtx src_const, machine_mode mode)
1309 : {
1310 0 : struct table_elt *lower_elt, *upper_elt;
1311 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1312 0 : rtx lower_anchor_rtx, upper_anchor_rtx;
1313 0 : rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1314 0 : unsigned lower_old, upper_old;
1315 :
1316 : /* CONST_INT may be in various modes, avoid non-scalar-int mode. */
1317 0 : if (!SCALAR_INT_MODE_P (mode))
1318 : return NULL_RTX;
1319 :
1320 0 : if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1321 : &upper_base, &upper_offs))
1322 : return NULL_RTX;
1323 :
1324 0 : lower_anchor_rtx = GEN_INT (lower_base);
1325 0 : upper_anchor_rtx = GEN_INT (upper_base);
1326 0 : lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1327 0 : upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1328 :
1329 0 : if (lower_elt)
1330 0 : lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1331 0 : if (upper_elt)
1332 0 : upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1333 :
1334 0 : if (!lower_exp)
1335 : return upper_exp;
1336 0 : if (!upper_exp)
1337 : return lower_exp;
1338 :
1339 : /* Return the older expression. */
1340 0 : return (upper_old > lower_old ? upper_exp : lower_exp);
1341 : }
1342 :
1343 : /* Look in or update the hash table. */
1344 :
1345 : /* Remove table element ELT from use in the table.
1346 : HASH is its hash code, made using the HASH macro.
1347 : It's an argument because often that is known in advance
1348 : and we save much time not recomputing it. */
1349 :
1350 : static void
1351 68912469 : remove_from_table (struct table_elt *elt, unsigned int hash)
1352 : {
1353 68912469 : if (elt == 0)
1354 : return;
1355 :
1356 : /* Mark this element as removed. See cse_insn. */
1357 68912469 : elt->first_same_value = 0;
1358 :
1359 : /* Remove the table element from its equivalence class. */
1360 :
1361 68912469 : {
1362 68912469 : struct table_elt *prev = elt->prev_same_value;
1363 68912469 : struct table_elt *next = elt->next_same_value;
1364 :
1365 68912469 : if (next)
1366 7793166 : next->prev_same_value = prev;
1367 :
1368 68912469 : if (prev)
1369 44196687 : prev->next_same_value = next;
1370 : else
1371 : {
1372 : struct table_elt *newfirst = next;
1373 32406322 : while (next)
1374 : {
1375 7690540 : next->first_same_value = newfirst;
1376 7690540 : next = next->next_same_value;
1377 : }
1378 : }
1379 : }
1380 :
1381 : /* Remove the table element from its hash bucket. */
1382 :
1383 68912469 : {
1384 68912469 : struct table_elt *prev = elt->prev_same_hash;
1385 68912469 : struct table_elt *next = elt->next_same_hash;
1386 :
1387 68912469 : if (next)
1388 20289336 : next->prev_same_hash = prev;
1389 :
1390 68912469 : if (prev)
1391 8779710 : prev->next_same_hash = next;
1392 60132759 : else if (table[hash] == elt)
1393 60132745 : table[hash] = next;
1394 : else
1395 : {
1396 : /* This entry is not in the proper hash bucket. This can happen
1397 : when two classes were merged by `merge_equiv_classes'. Search
1398 : for the hash bucket that it heads. This happens only very
1399 : rarely, so the cost is acceptable. */
1400 462 : for (hash = 0; hash < HASH_SIZE; hash++)
1401 448 : if (table[hash] == elt)
1402 14 : table[hash] = next;
1403 : }
1404 : }
1405 :
1406 : /* Remove the table element from its related-value circular chain. */
1407 :
1408 68912469 : if (elt->related_value != 0 && elt->related_value != elt)
1409 : {
1410 : struct table_elt *p = elt->related_value;
1411 :
1412 114216 : while (p->related_value != elt)
1413 : p = p->related_value;
1414 30319 : p->related_value = elt->related_value;
1415 30319 : if (p->related_value == p)
1416 24740 : p->related_value = 0;
1417 : }
1418 :
1419 : /* Now add it to the free element chain. */
1420 68912469 : elt->next_same_hash = free_element_chain;
1421 68912469 : free_element_chain = elt;
1422 : }
1423 :
1424 : /* Same as above, but X is a pseudo-register. */
1425 :
1426 : static void
1427 91497701 : remove_pseudo_from_table (rtx x, unsigned int hash)
1428 : {
1429 91497701 : struct table_elt *elt;
1430 :
1431 : /* Because a pseudo-register can be referenced in more than one
1432 : mode, we might have to remove more than one table entry. */
1433 95917649 : while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1434 4419948 : remove_from_table (elt, hash);
1435 91497701 : }
1436 :
1437 : /* Look up X in the hash table and return its table element,
1438 : or 0 if X is not in the table.
1439 :
1440 : MODE is the machine-mode of X, or if X is an integer constant
1441 : with VOIDmode then MODE is the mode with which X will be used.
1442 :
1443 : Here we are satisfied to find an expression whose tree structure
1444 : looks like X. */
1445 :
1446 : static struct table_elt *
1447 490849039 : lookup (rtx x, unsigned int hash, machine_mode mode)
1448 : {
1449 490849039 : struct table_elt *p;
1450 :
1451 727822672 : for (p = table[hash]; p; p = p->next_same_hash)
1452 368329591 : if (mode == p->mode && ((x == p->exp && REG_P (x))
1453 144175476 : || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1454 131355958 : return p;
1455 :
1456 : return 0;
1457 : }
1458 :
1459 : /* Like `lookup' but don't care whether the table element uses invalid regs.
1460 : Also ignore discrepancies in the machine mode of a register. */
1461 :
1462 : static struct table_elt *
1463 95917649 : lookup_for_remove (rtx x, unsigned int hash, machine_mode mode)
1464 : {
1465 95917649 : struct table_elt *p;
1466 :
1467 95917649 : if (REG_P (x))
1468 : {
1469 95917649 : unsigned int regno = REGNO (x);
1470 :
1471 : /* Don't check the machine mode when comparing registers;
1472 : invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1473 174632169 : for (p = table[hash]; p; p = p->next_same_hash)
1474 83134468 : if (REG_P (p->exp)
1475 83134468 : && REGNO (p->exp) == regno)
1476 : return p;
1477 : }
1478 : else
1479 : {
1480 0 : for (p = table[hash]; p; p = p->next_same_hash)
1481 0 : if (mode == p->mode
1482 0 : && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1483 0 : return p;
1484 : }
1485 :
1486 : return 0;
1487 : }
1488 :
1489 : /* Look for an expression equivalent to X and with code CODE.
1490 : If one is found, return that expression. */
1491 :
1492 : static rtx
1493 58487704 : lookup_as_function (rtx x, enum rtx_code code)
1494 : {
1495 58487704 : struct table_elt *p
1496 58487704 : = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1497 :
1498 58487704 : if (p == 0)
1499 : return 0;
1500 :
1501 39642382 : for (p = p->first_same_value; p; p = p->next_same_value)
1502 27542117 : if (GET_CODE (p->exp) == code
1503 : /* Make sure this is a valid entry in the table. */
1504 27542117 : && exp_equiv_p (p->exp, p->exp, 1, false))
1505 928399 : return p->exp;
1506 :
1507 : return 0;
1508 : }
1509 :
1510 : /* Insert X in the hash table, assuming HASH is its hash code and
1511 : CLASSP is an element of the class it should go in (or 0 if a new
1512 : class should be made). COST is the code of X and reg_cost is the
1513 : cost of registers in X. It is inserted at the proper position to
1514 : keep the class in the order cheapest first.
1515 :
1516 : MODE is the machine-mode of X, or if X is an integer constant
1517 : with VOIDmode then MODE is the mode with which X will be used.
1518 :
1519 : For elements of equal cheapness, the most recent one
1520 : goes in front, except that the first element in the list
1521 : remains first unless a cheaper element is added. The order of
1522 : pseudo-registers does not matter, as canon_reg will be called to
1523 : find the cheapest when a register is retrieved from the table.
1524 :
1525 : The in_memory field in the hash table element is set to 0.
1526 : The caller must set it nonzero if appropriate.
1527 :
1528 : You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1529 : and if insert_regs returns a nonzero value
1530 : you must then recompute its hash code before calling here.
1531 :
1532 : If necessary, update table showing constant values of quantities. */
1533 :
1534 : static struct table_elt *
1535 262478839 : insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1536 : machine_mode mode, int cost, int reg_cost)
1537 : {
1538 262478839 : struct table_elt *elt;
1539 :
1540 : /* If X is a register and we haven't made a quantity for it,
1541 : something is wrong. */
1542 262478839 : gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1543 :
1544 : /* If X is a hard register, show it is being put in the table. */
1545 262478839 : if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1546 21942926 : add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1547 :
1548 : /* Put an element for X into the right hash bucket. */
1549 :
1550 262478839 : elt = free_element_chain;
1551 262478839 : if (elt)
1552 257521311 : free_element_chain = elt->next_same_hash;
1553 : else
1554 4957528 : elt = XNEW (struct table_elt);
1555 :
1556 262478839 : elt->exp = x;
1557 262478839 : elt->canon_exp = NULL_RTX;
1558 262478839 : elt->cost = cost;
1559 262478839 : elt->regcost = reg_cost;
1560 262478839 : elt->next_same_value = 0;
1561 262478839 : elt->prev_same_value = 0;
1562 262478839 : elt->next_same_hash = table[hash];
1563 262478839 : elt->prev_same_hash = 0;
1564 262478839 : elt->related_value = 0;
1565 262478839 : elt->in_memory = 0;
1566 262478839 : elt->mode = mode;
1567 262478839 : elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1568 :
1569 262478839 : if (table[hash])
1570 82489075 : table[hash]->prev_same_hash = elt;
1571 262478839 : table[hash] = elt;
1572 :
1573 : /* Put it into the proper value-class. */
1574 262478839 : if (classp)
1575 : {
1576 128328292 : classp = classp->first_same_value;
1577 128328292 : if (CHEAPER (elt, classp))
1578 : /* Insert at the head of the class. */
1579 : {
1580 59944898 : struct table_elt *p;
1581 59944898 : elt->next_same_value = classp;
1582 59944898 : classp->prev_same_value = elt;
1583 59944898 : elt->first_same_value = elt;
1584 :
1585 126730494 : for (p = classp; p; p = p->next_same_value)
1586 66785596 : p->first_same_value = elt;
1587 : }
1588 : else
1589 : {
1590 : /* Insert not at head of the class. */
1591 : /* Put it after the last element cheaper than X. */
1592 : struct table_elt *p, *next;
1593 :
1594 : for (p = classp;
1595 149308872 : (next = p->next_same_value) && CHEAPER (next, elt);
1596 : p = next)
1597 : ;
1598 :
1599 : /* Put it after P and before NEXT. */
1600 68383394 : elt->next_same_value = next;
1601 68383394 : if (next)
1602 16641947 : next->prev_same_value = elt;
1603 :
1604 68383394 : elt->prev_same_value = p;
1605 68383394 : p->next_same_value = elt;
1606 68383394 : elt->first_same_value = classp;
1607 : }
1608 : }
1609 : else
1610 134150547 : elt->first_same_value = elt;
1611 :
1612 : /* If this is a constant being set equivalent to a register or a register
1613 : being set equivalent to a constant, note the constant equivalence.
1614 :
1615 : If this is a constant, it cannot be equivalent to a different constant,
1616 : and a constant is the only thing that can be cheaper than a register. So
1617 : we know the register is the head of the class (before the constant was
1618 : inserted).
1619 :
1620 : If this is a register that is not already known equivalent to a
1621 : constant, we must check the entire class.
1622 :
1623 : If this is a register that is already known equivalent to an insn,
1624 : update the qtys `const_insn' to show that `this_insn' is the latest
1625 : insn making that quantity equivalent to the constant. */
1626 :
1627 262478839 : if (elt->is_const && classp && REG_P (classp->exp)
1628 3410300 : && !REG_P (x))
1629 : {
1630 3408033 : int exp_q = REG_QTY (REGNO (classp->exp));
1631 3408033 : struct qty_table_elem *exp_ent = &qty_table[exp_q];
1632 :
1633 3408033 : exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1634 3408033 : exp_ent->const_insn = this_insn;
1635 3408033 : }
1636 :
1637 259070806 : else if (REG_P (x)
1638 109202488 : && classp
1639 93550103 : && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1640 348024991 : && ! elt->is_const)
1641 : {
1642 : struct table_elt *p;
1643 :
1644 200756451 : for (p = classp; p != 0; p = p->next_same_value)
1645 : {
1646 125940560 : if (p->is_const && !REG_P (p->exp))
1647 : {
1648 14136008 : int x_q = REG_QTY (REGNO (x));
1649 14136008 : struct qty_table_elem *x_ent = &qty_table[x_q];
1650 :
1651 14136008 : x_ent->const_rtx
1652 14136008 : = gen_lowpart (GET_MODE (x), p->exp);
1653 14136008 : x_ent->const_insn = this_insn;
1654 14136008 : break;
1655 : }
1656 : }
1657 : }
1658 :
1659 170118907 : else if (REG_P (x)
1660 20250589 : && qty_table[REG_QTY (REGNO (x))].const_rtx
1661 174714827 : && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1662 4595920 : qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1663 :
1664 : /* If this is a constant with symbolic value,
1665 : and it has a term with an explicit integer value,
1666 : link it up with related expressions. */
1667 262478839 : if (GET_CODE (x) == CONST)
1668 : {
1669 819671 : rtx subexp = get_related_value (x);
1670 819671 : unsigned subhash;
1671 819671 : struct table_elt *subelt, *subelt_prev;
1672 :
1673 819671 : if (subexp != 0)
1674 : {
1675 : /* Get the integer-free subexpression in the hash table. */
1676 805944 : subhash = SAFE_HASH (subexp, mode);
1677 805944 : subelt = lookup (subexp, subhash, mode);
1678 805944 : if (subelt == 0)
1679 360430 : subelt = insert (subexp, NULL, subhash, mode);
1680 : /* Initialize SUBELT's circular chain if it has none. */
1681 805944 : if (subelt->related_value == 0)
1682 526255 : subelt->related_value = subelt;
1683 : /* Find the element in the circular chain that precedes SUBELT. */
1684 805944 : subelt_prev = subelt;
1685 2968263 : while (subelt_prev->related_value != subelt)
1686 : subelt_prev = subelt_prev->related_value;
1687 : /* Put new ELT into SUBELT's circular chain just before SUBELT.
1688 : This way the element that follows SUBELT is the oldest one. */
1689 805944 : elt->related_value = subelt_prev->related_value;
1690 805944 : subelt_prev->related_value = elt;
1691 : }
1692 : }
1693 :
1694 262478839 : return elt;
1695 : }
1696 :
1697 : /* Wrap insert_with_costs by passing the default costs. */
1698 :
1699 : static struct table_elt *
1700 262478839 : insert (rtx x, struct table_elt *classp, unsigned int hash,
1701 : machine_mode mode)
1702 : {
1703 524957678 : return insert_with_costs (x, classp, hash, mode,
1704 262478839 : COST (x, mode), approx_reg_cost (x));
1705 : }
1706 :
1707 :
1708 : /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1709 : CLASS2 into CLASS1. This is done when we have reached an insn which makes
1710 : the two classes equivalent.
1711 :
1712 : CLASS1 will be the surviving class; CLASS2 should not be used after this
1713 : call.
1714 :
1715 : Any invalid entries in CLASS2 will not be copied. */
1716 :
1717 : static void
1718 5318394 : merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1719 : {
1720 5318394 : struct table_elt *elt, *next, *new_elt;
1721 :
1722 : /* Ensure we start with the head of the classes. */
1723 5318394 : class1 = class1->first_same_value;
1724 5318394 : class2 = class2->first_same_value;
1725 :
1726 : /* If they were already equal, forget it. */
1727 5318394 : if (class1 == class2)
1728 : return;
1729 :
1730 12859913 : for (elt = class2; elt; elt = next)
1731 : {
1732 7541519 : unsigned int hash;
1733 7541519 : rtx exp = elt->exp;
1734 7541519 : machine_mode mode = elt->mode;
1735 :
1736 7541519 : next = elt->next_same_value;
1737 :
1738 : /* Remove old entry, make a new one in CLASS1's class.
1739 : Don't do this for invalid entries as we cannot find their
1740 : hash code (it also isn't necessary). */
1741 7541519 : if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1742 : {
1743 7541495 : bool need_rehash = false;
1744 :
1745 7541495 : hash_arg_in_memory = 0;
1746 7541495 : hash = HASH (exp, mode);
1747 :
1748 7541495 : if (REG_P (exp))
1749 : {
1750 2053466 : need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1751 2053466 : delete_reg_equiv (REGNO (exp));
1752 : }
1753 :
1754 7541495 : if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1755 2052818 : remove_pseudo_from_table (exp, hash);
1756 : else
1757 5488677 : remove_from_table (elt, hash);
1758 :
1759 7541495 : if (insert_regs (exp, class1, false) || need_rehash)
1760 : {
1761 2053466 : rehash_using_reg (exp);
1762 2053466 : hash = HASH (exp, mode);
1763 : }
1764 7541495 : new_elt = insert (exp, class1, hash, mode);
1765 7541495 : new_elt->in_memory = hash_arg_in_memory;
1766 7541495 : if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST)
1767 0 : new_elt->cost = MAX_COST;
1768 : }
1769 : }
1770 : }
1771 :
1772 : /* Flush the entire hash table. */
1773 :
1774 : static void
1775 7944 : flush_hash_table (void)
1776 : {
1777 7944 : int i;
1778 7944 : struct table_elt *p;
1779 :
1780 262152 : for (i = 0; i < HASH_SIZE; i++)
1781 1051047 : for (p = table[i]; p; p = table[i])
1782 : {
1783 : /* Note that invalidate can remove elements
1784 : after P in the current hash chain. */
1785 796839 : if (REG_P (p->exp))
1786 350339 : invalidate (p->exp, VOIDmode);
1787 : else
1788 446500 : remove_from_table (p, i);
1789 : }
1790 7944 : }
1791 :
1792 : /* Check whether an anti dependence exists between X and EXP. MODE and
1793 : ADDR are as for canon_anti_dependence. */
1794 :
1795 : static bool
1796 180979321 : check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr)
1797 : {
1798 180979321 : subrtx_iterator::array_type array;
1799 851050364 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
1800 : {
1801 678484936 : const_rtx x = *iter;
1802 678484936 : if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr))
1803 8413893 : return true;
1804 : }
1805 172565428 : return false;
1806 180979321 : }
1807 :
1808 : /* Remove from the hash table, or mark as invalid, all expressions whose
1809 : values could be altered by storing in register X. */
1810 :
1811 : static void
1812 219213999 : invalidate_reg (rtx x)
1813 : {
1814 219213999 : gcc_assert (GET_CODE (x) == REG);
1815 :
1816 : /* If X is a register, dependencies on its contents are recorded
1817 : through the qty number mechanism. Just change the qty number of
1818 : the register, mark it as invalid for expressions that refer to it,
1819 : and remove it itself. */
1820 219213999 : unsigned int regno = REGNO (x);
1821 219213999 : unsigned int hash = HASH (x, GET_MODE (x));
1822 :
1823 : /* Remove REGNO from any quantity list it might be on and indicate
1824 : that its value might have changed. If it is a pseudo, remove its
1825 : entry from the hash table.
1826 :
1827 : For a hard register, we do the first two actions above for any
1828 : additional hard registers corresponding to X. Then, if any of these
1829 : registers are in the table, we must remove any REG entries that
1830 : overlap these registers. */
1831 :
1832 219213999 : delete_reg_equiv (regno);
1833 219213999 : REG_TICK (regno)++;
1834 219213999 : SUBREG_TICKED (regno) = -1;
1835 :
1836 219213999 : if (regno >= FIRST_PSEUDO_REGISTER)
1837 89444883 : remove_pseudo_from_table (x, hash);
1838 : else
1839 : {
1840 129769116 : HOST_WIDE_INT in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1841 129769116 : unsigned int endregno = END_REGNO (x);
1842 129769116 : unsigned int rn;
1843 129769116 : struct table_elt *p, *next;
1844 :
1845 129769116 : CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1846 :
1847 130361087 : for (rn = regno + 1; rn < endregno; rn++)
1848 : {
1849 591971 : in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1850 591971 : CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1851 591971 : delete_reg_equiv (rn);
1852 591971 : REG_TICK (rn)++;
1853 591971 : SUBREG_TICKED (rn) = -1;
1854 : }
1855 :
1856 129769116 : if (in_table)
1857 406054935 : for (hash = 0; hash < HASH_SIZE; hash++)
1858 630331388 : for (p = table[hash]; p; p = next)
1859 : {
1860 236581148 : next = p->next_same_hash;
1861 :
1862 236581148 : if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1863 225884930 : continue;
1864 :
1865 10696218 : unsigned int tregno = REGNO (p->exp);
1866 10696218 : unsigned int tendregno = END_REGNO (p->exp);
1867 10696218 : if (tendregno > regno && tregno < endregno)
1868 10625864 : remove_from_table (p, hash);
1869 : }
1870 : }
1871 219213999 : }
1872 :
1873 : /* Remove from the hash table, or mark as invalid, all expressions whose
1874 : values could be altered by storing in X. X is a register, a subreg, or
1875 : a memory reference with nonvarying address (because, when a memory
1876 : reference with a varying address is stored in, all memory references are
1877 : removed by invalidate_memory so specific invalidation is superfluous).
1878 : FULL_MODE, if not VOIDmode, indicates that this much should be
1879 : invalidated instead of just the amount indicated by the mode of X. This
1880 : is only used for bitfield stores into memory.
1881 :
1882 : A nonvarying address may be just a register or just a symbol reference,
1883 : or it may be either of those plus a numeric offset. */
1884 :
1885 : static void
1886 247869770 : invalidate (rtx x, machine_mode full_mode)
1887 : {
1888 249457606 : int i;
1889 249457606 : struct table_elt *p;
1890 249457606 : rtx addr;
1891 :
1892 249457606 : switch (GET_CODE (x))
1893 : {
1894 219213809 : case REG:
1895 219213809 : invalidate_reg (x);
1896 219213809 : return;
1897 :
1898 1542709 : case SUBREG:
1899 1542709 : invalidate (SUBREG_REG (x), VOIDmode);
1900 1542709 : return;
1901 :
1902 26040 : case PARALLEL:
1903 71167 : for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1904 45127 : invalidate (XVECEXP (x, 0, i), VOIDmode);
1905 : return;
1906 :
1907 45127 : case EXPR_LIST:
1908 : /* This is part of a disjoint return value; extract the location in
1909 : question ignoring the offset. */
1910 45127 : invalidate (XEXP (x, 0), VOIDmode);
1911 45127 : return;
1912 :
1913 28629921 : case MEM:
1914 28629921 : addr = canon_rtx (get_addr (XEXP (x, 0)));
1915 : /* Calculate the canonical version of X here so that
1916 : true_dependence doesn't generate new RTL for X on each call. */
1917 28629921 : x = canon_rtx (x);
1918 :
1919 : /* Remove all hash table elements that refer to overlapping pieces of
1920 : memory. */
1921 28629921 : if (full_mode == VOIDmode)
1922 28628969 : full_mode = GET_MODE (x);
1923 :
1924 944787393 : for (i = 0; i < HASH_SIZE; i++)
1925 : {
1926 916157472 : struct table_elt *next;
1927 :
1928 1855149950 : for (p = table[i]; p; p = next)
1929 : {
1930 938992478 : next = p->next_same_hash;
1931 938992478 : if (p->in_memory)
1932 : {
1933 : /* Just canonicalize the expression once;
1934 : otherwise each time we call invalidate
1935 : true_dependence will canonicalize the
1936 : expression again. */
1937 180979321 : if (!p->canon_exp)
1938 27059307 : p->canon_exp = canon_rtx (p->exp);
1939 180979321 : if (check_dependence (p->canon_exp, x, full_mode, addr))
1940 8413893 : remove_from_table (p, i);
1941 : }
1942 : }
1943 : }
1944 : return;
1945 :
1946 0 : default:
1947 0 : gcc_unreachable ();
1948 : }
1949 : }
1950 :
1951 : /* Invalidate DEST. Used when DEST is not going to be added
1952 : into the hash table for some reason, e.g. do_not_record
1953 : flagged on it. */
1954 :
1955 : static void
1956 54733760 : invalidate_dest (rtx dest)
1957 : {
1958 54733760 : if (REG_P (dest)
1959 26727941 : || GET_CODE (dest) == SUBREG
1960 26727941 : || MEM_P (dest))
1961 34577943 : invalidate (dest, VOIDmode);
1962 20155817 : else if (GET_CODE (dest) == STRICT_LOW_PART
1963 20155817 : || GET_CODE (dest) == ZERO_EXTRACT)
1964 960 : invalidate (XEXP (dest, 0), GET_MODE (dest));
1965 54733760 : }
1966 :
1967 : /* Remove all expressions that refer to register REGNO,
1968 : since they are already invalid, and we are about to
1969 : mark that register valid again and don't want the old
1970 : expressions to reappear as valid. */
1971 :
1972 : static void
1973 13138206 : remove_invalid_refs (unsigned int regno)
1974 : {
1975 13138206 : unsigned int i;
1976 13138206 : struct table_elt *p, *next;
1977 :
1978 433560798 : for (i = 0; i < HASH_SIZE; i++)
1979 664681880 : for (p = table[i]; p; p = next)
1980 : {
1981 244259288 : next = p->next_same_hash;
1982 244259288 : if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp))
1983 17247649 : remove_from_table (p, i);
1984 : }
1985 13138206 : }
1986 :
1987 : /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1988 : and mode MODE. */
1989 : static void
1990 0 : remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset,
1991 : machine_mode mode)
1992 : {
1993 0 : unsigned int i;
1994 0 : struct table_elt *p, *next;
1995 :
1996 0 : for (i = 0; i < HASH_SIZE; i++)
1997 0 : for (p = table[i]; p; p = next)
1998 : {
1999 0 : rtx exp = p->exp;
2000 0 : next = p->next_same_hash;
2001 :
2002 0 : if (!REG_P (exp)
2003 0 : && (GET_CODE (exp) != SUBREG
2004 0 : || !REG_P (SUBREG_REG (exp))
2005 0 : || REGNO (SUBREG_REG (exp)) != regno
2006 0 : || ranges_maybe_overlap_p (SUBREG_BYTE (exp),
2007 0 : GET_MODE_SIZE (GET_MODE (exp)),
2008 0 : offset, GET_MODE_SIZE (mode)))
2009 0 : && refers_to_regno_p (regno, p->exp))
2010 0 : remove_from_table (p, i);
2011 : }
2012 0 : }
2013 :
2014 : /* Recompute the hash codes of any valid entries in the hash table that
2015 : reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2016 :
2017 : This is called when we make a jump equivalence. */
2018 :
2019 : static void
2020 125275294 : rehash_using_reg (rtx x)
2021 : {
2022 125275294 : unsigned int i;
2023 125275294 : struct table_elt *p, *next;
2024 125275294 : unsigned hash;
2025 :
2026 125275294 : if (GET_CODE (x) == SUBREG)
2027 1613554 : x = SUBREG_REG (x);
2028 :
2029 : /* If X is not a register or if the register is known not to be in any
2030 : valid entries in the table, we have no work to do. */
2031 :
2032 125275294 : if (!REG_P (x)
2033 115642704 : || REG_IN_TABLE (REGNO (x)) < 0
2034 130296095 : || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2035 120255013 : return;
2036 :
2037 : /* Scan all hash chains looking for valid entries that mention X.
2038 : If we find one and it is in the wrong hash chain, move it. */
2039 :
2040 165669273 : for (i = 0; i < HASH_SIZE; i++)
2041 270283260 : for (p = table[i]; p; p = next)
2042 : {
2043 109634268 : next = p->next_same_hash;
2044 109634268 : if (reg_mentioned_p (x, p->exp)
2045 4898724 : && exp_equiv_p (p->exp, p->exp, 1, false)
2046 114532831 : && i != (hash = SAFE_HASH (p->exp, p->mode)))
2047 : {
2048 3501992 : if (p->next_same_hash)
2049 1139461 : p->next_same_hash->prev_same_hash = p->prev_same_hash;
2050 :
2051 3501992 : if (p->prev_same_hash)
2052 648354 : p->prev_same_hash->next_same_hash = p->next_same_hash;
2053 : else
2054 2853638 : table[i] = p->next_same_hash;
2055 :
2056 3501992 : p->next_same_hash = table[hash];
2057 3501992 : p->prev_same_hash = 0;
2058 3501992 : if (table[hash])
2059 1727036 : table[hash]->prev_same_hash = p;
2060 3501992 : table[hash] = p;
2061 : }
2062 : }
2063 : }
2064 :
2065 : /* Remove from the hash table any expression that is a call-clobbered
2066 : register in INSN. Also update their TICK values. */
2067 :
2068 : static void
2069 15269755 : invalidate_for_call (rtx_insn *insn)
2070 : {
2071 15269755 : unsigned int regno;
2072 15269755 : unsigned hash;
2073 15269755 : struct table_elt *p, *next;
2074 15269755 : int in_table = 0;
2075 15269755 : hard_reg_set_iterator hrsi;
2076 :
2077 : /* Go through all the hard registers. For each that might be clobbered
2078 : in call insn INSN, remove the register from quantity chains and update
2079 : reg_tick if defined. Also see if any of these registers is currently
2080 : in the table.
2081 :
2082 : ??? We could be more precise for partially-clobbered registers,
2083 : and only invalidate values that actually occupy the clobbered part
2084 : of the registers. It doesn't seem worth the effort though, since
2085 : we shouldn't see this situation much before RA. Whatever choice
2086 : we make here has to be consistent with the table walk below,
2087 : so any change to this test will require a change there too. */
2088 15269755 : HARD_REG_SET callee_clobbers
2089 15269755 : = insn_callee_abi (insn).full_and_partial_reg_clobbers ();
2090 1263011259 : EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi)
2091 : {
2092 1247741504 : delete_reg_equiv (regno);
2093 1247741504 : if (REG_TICK (regno) >= 0)
2094 : {
2095 1247741504 : REG_TICK (regno)++;
2096 1247741504 : SUBREG_TICKED (regno) = -1;
2097 : }
2098 1247741504 : in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2099 : }
2100 :
2101 : /* In the case where we have no call-clobbered hard registers in the
2102 : table, we are done. Otherwise, scan the table and remove any
2103 : entry that overlaps a call-clobbered register. */
2104 :
2105 15269755 : if (in_table)
2106 116384004 : for (hash = 0; hash < HASH_SIZE; hash++)
2107 168448490 : for (p = table[hash]; p; p = next)
2108 : {
2109 55591274 : next = p->next_same_hash;
2110 :
2111 108160622 : if (!REG_P (p->exp)
2112 55591274 : || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2113 52569348 : continue;
2114 :
2115 : /* This must use the same test as above rather than the
2116 : more accurate clobbers_reg_p. */
2117 3021926 : if (overlaps_hard_reg_set_p (callee_clobbers, GET_MODE (p->exp),
2118 3021926 : REGNO (p->exp)))
2119 3002118 : remove_from_table (p, hash);
2120 : }
2121 15269755 : }
2122 :
2123 : /* Given an expression X of type CONST,
2124 : and ELT which is its table entry (or 0 if it
2125 : is not in the hash table),
2126 : return an alternate expression for X as a register plus integer.
2127 : If none can be found, return 0. */
2128 :
2129 : static rtx
2130 725717 : use_related_value (rtx x, struct table_elt *elt)
2131 : {
2132 725717 : struct table_elt *relt = 0;
2133 725717 : struct table_elt *p, *q;
2134 725717 : HOST_WIDE_INT offset;
2135 :
2136 : /* First, is there anything related known?
2137 : If we have a table element, we can tell from that.
2138 : Otherwise, must look it up. */
2139 :
2140 725717 : if (elt != 0 && elt->related_value != 0)
2141 : relt = elt;
2142 547781 : else if (elt == 0 && GET_CODE (x) == CONST)
2143 : {
2144 547781 : rtx subexp = get_related_value (x);
2145 547781 : if (subexp != 0)
2146 534055 : relt = lookup (subexp,
2147 : SAFE_HASH (subexp, GET_MODE (subexp)),
2148 534055 : GET_MODE (subexp));
2149 : }
2150 :
2151 668106 : if (relt == 0)
2152 389395 : return 0;
2153 :
2154 : /* Search all related table entries for one that has an
2155 : equivalent register. */
2156 :
2157 : p = relt;
2158 984456 : while (1)
2159 : {
2160 : /* This loop is strange in that it is executed in two different cases.
2161 : The first is when X is already in the table. Then it is searching
2162 : the RELATED_VALUE list of X's class (RELT). The second case is when
2163 : X is not in the table. Then RELT points to a class for the related
2164 : value.
2165 :
2166 : Ensure that, whatever case we are in, that we ignore classes that have
2167 : the same value as X. */
2168 :
2169 984456 : if (rtx_equal_p (x, p->exp))
2170 : q = 0;
2171 : else
2172 1969309 : for (q = p->first_same_value; q; q = q->next_same_value)
2173 1349876 : if (REG_P (q->exp))
2174 : break;
2175 :
2176 850405 : if (q)
2177 : break;
2178 :
2179 753484 : p = p->related_value;
2180 :
2181 : /* We went all the way around, so there is nothing to be found.
2182 : Alternatively, perhaps RELT was in the table for some other reason
2183 : and it has no related values recorded. */
2184 753484 : if (p == relt || p == 0)
2185 : break;
2186 : }
2187 :
2188 336322 : if (q == 0)
2189 : return 0;
2190 :
2191 230972 : offset = (get_integer_term (x) - get_integer_term (p->exp));
2192 : /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2193 230972 : return plus_constant (q->mode, q->exp, offset);
2194 : }
2195 :
2196 :
2197 : /* Hash a string. Just add its bytes up. */
2198 : static inline unsigned
2199 130625 : hash_rtx_string (const char *ps)
2200 : {
2201 130625 : unsigned hash = 0;
2202 130625 : const unsigned char *p = (const unsigned char *) ps;
2203 :
2204 130625 : if (p)
2205 743605 : while (*p)
2206 612980 : hash += *p++;
2207 :
2208 130625 : return hash;
2209 : }
2210 :
2211 : /* Hash an rtx. We are careful to make sure the value is never negative.
2212 : Equivalent registers hash identically.
2213 : MODE is used in hashing for CONST_INTs only;
2214 : otherwise the mode of X is used.
2215 :
2216 : Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2217 :
2218 : If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2219 : a MEM rtx which does not have the MEM_READONLY_P flag set.
2220 :
2221 : Note that cse_insn knows that the hash code of a MEM expression
2222 : is just (int) MEM plus the hash code of the address.
2223 :
2224 : Call CB on each rtx if CB is not NULL.
2225 : When the callback returns true, we continue with the new rtx. */
2226 :
2227 : unsigned
2228 1274552618 : hash_rtx (const_rtx x, machine_mode mode,
2229 : int *do_not_record_p, int *hash_arg_in_memory_p,
2230 : bool have_reg_qty, hash_rtx_callback_function cb)
2231 : {
2232 1274552618 : int i, j;
2233 1274552618 : unsigned hash = 0;
2234 1881485807 : enum rtx_code code;
2235 1881485807 : const char *fmt;
2236 1881485807 : machine_mode newmode;
2237 1881485807 : rtx newx;
2238 :
2239 : /* Used to turn recursion into iteration. We can't rely on GCC's
2240 : tail-recursion elimination since we need to keep accumulating values
2241 : in HASH. */
2242 1881485807 : repeat:
2243 1881485807 : if (x == 0)
2244 : return hash;
2245 :
2246 : /* Invoke the callback first. */
2247 1881485807 : if (cb != NULL
2248 1881485807 : && ((*cb) (x, mode, &newx, &newmode)))
2249 : {
2250 0 : hash += hash_rtx (newx, newmode, do_not_record_p,
2251 : hash_arg_in_memory_p, have_reg_qty, cb);
2252 0 : return hash;
2253 : }
2254 :
2255 1881485807 : code = GET_CODE (x);
2256 1881485807 : switch (code)
2257 : {
2258 657652874 : case REG:
2259 657652874 : {
2260 657652874 : unsigned int regno = REGNO (x);
2261 :
2262 657652874 : if (do_not_record_p && !reload_completed)
2263 : {
2264 : /* On some machines, we can't record any non-fixed hard register,
2265 : because extending its life will cause reload problems. We
2266 : consider ap, fp, sp, gp to be fixed for this purpose.
2267 :
2268 : We also consider CCmode registers to be fixed for this purpose;
2269 : failure to do so leads to failure to simplify 0<100 type of
2270 : conditionals.
2271 :
2272 : On all machines, we can't record any global registers.
2273 : Nor should we record any register that is in a small
2274 : class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2275 654197113 : bool record;
2276 :
2277 654197113 : if (regno >= FIRST_PSEUDO_REGISTER)
2278 : record = true;
2279 433431171 : else if (x == frame_pointer_rtx
2280 302745814 : || x == hard_frame_pointer_rtx
2281 302628913 : || x == arg_pointer_rtx
2282 295001422 : || x == stack_pointer_rtx
2283 259709413 : || x == pic_offset_table_rtx)
2284 : record = true;
2285 259709413 : else if (global_regs[regno])
2286 : record = false;
2287 259709042 : else if (fixed_regs[regno])
2288 : record = true;
2289 76642930 : else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2290 : record = true;
2291 76642930 : else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2292 : record = false;
2293 0 : else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2294 : record = false;
2295 : else
2296 : record = true;
2297 :
2298 : if (!record)
2299 : {
2300 76643301 : *do_not_record_p = 1;
2301 76643301 : return 0;
2302 : }
2303 : }
2304 :
2305 581009573 : hash += ((unsigned int) REG << 7);
2306 581009573 : hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2307 581009573 : return hash;
2308 : }
2309 :
2310 : /* We handle SUBREG of a REG specially because the underlying
2311 : reg changes its hash value with every value change; we don't
2312 : want to have to forget unrelated subregs when one subreg changes. */
2313 33400624 : case SUBREG:
2314 33400624 : {
2315 33400624 : if (REG_P (SUBREG_REG (x)))
2316 : {
2317 66690670 : hash += (((unsigned int) SUBREG << 7)
2318 33345335 : + REGNO (SUBREG_REG (x))
2319 33345335 : + (constant_lower_bound (SUBREG_BYTE (x))
2320 33345335 : / UNITS_PER_WORD));
2321 33345335 : return hash;
2322 : }
2323 : break;
2324 : }
2325 :
2326 340231648 : case CONST_INT:
2327 340231648 : hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2328 340231648 : + (unsigned int) INTVAL (x));
2329 340231648 : return hash;
2330 :
2331 : case CONST_WIDE_INT:
2332 3049380 : for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
2333 2033084 : hash += CONST_WIDE_INT_ELT (x, i);
2334 : return hash;
2335 :
2336 0 : case CONST_POLY_INT:
2337 0 : {
2338 0 : inchash::hash h;
2339 0 : h.add_int (hash);
2340 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2341 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
2342 0 : return h.end ();
2343 : }
2344 :
2345 4297199 : case CONST_DOUBLE:
2346 : /* This is like the general case, except that it only counts
2347 : the integers representing the constant. */
2348 4297199 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2349 4297199 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
2350 : hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2351 : + (unsigned int) CONST_DOUBLE_HIGH (x));
2352 : else
2353 4297199 : hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2354 4297199 : return hash;
2355 :
2356 0 : case CONST_FIXED:
2357 0 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2358 0 : hash += fixed_hash (CONST_FIXED_VALUE (x));
2359 0 : return hash;
2360 :
2361 3575393 : case CONST_VECTOR:
2362 3575393 : {
2363 3575393 : int units;
2364 3575393 : rtx elt;
2365 :
2366 3575393 : units = const_vector_encoded_nelts (x);
2367 :
2368 9829186 : for (i = 0; i < units; ++i)
2369 : {
2370 6253793 : elt = CONST_VECTOR_ENCODED_ELT (x, i);
2371 6253793 : hash += hash_rtx (elt, GET_MODE (elt),
2372 : do_not_record_p, hash_arg_in_memory_p,
2373 : have_reg_qty, cb);
2374 : }
2375 :
2376 : return hash;
2377 : }
2378 :
2379 : /* Assume there is only one rtx object for any given label. */
2380 20402874 : case LABEL_REF:
2381 : /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2382 : differences and differences between each stage's debugging dumps. */
2383 20402874 : hash += (((unsigned int) LABEL_REF << 7)
2384 20402874 : + CODE_LABEL_NUMBER (label_ref_label (x)));
2385 20402874 : return hash;
2386 :
2387 150415412 : case SYMBOL_REF:
2388 150415412 : {
2389 : /* Don't hash on the symbol's address to avoid bootstrap differences.
2390 : Different hash values may cause expressions to be recorded in
2391 : different orders and thus different registers to be used in the
2392 : final assembler. This also avoids differences in the dump files
2393 : between various stages. */
2394 150415412 : unsigned int h = 0;
2395 150415412 : const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2396 :
2397 3279996505 : while (*p)
2398 3129581093 : h += (h << 7) + *p++; /* ??? revisit */
2399 :
2400 150415412 : hash += ((unsigned int) SYMBOL_REF << 7) + h;
2401 150415412 : return hash;
2402 : }
2403 :
2404 263899706 : case MEM:
2405 : /* We don't record if marked volatile or if BLKmode since we don't
2406 : know the size of the move. */
2407 263899706 : if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2408 : {
2409 5174066 : *do_not_record_p = 1;
2410 5174066 : return 0;
2411 : }
2412 258725640 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2413 59275300 : *hash_arg_in_memory_p = 1;
2414 :
2415 : /* Now that we have already found this special case,
2416 : might as well speed it up as much as possible. */
2417 258725640 : hash += (unsigned) MEM;
2418 258725640 : x = XEXP (x, 0);
2419 258725640 : goto repeat;
2420 :
2421 70 : case USE:
2422 : /* A USE that mentions non-volatile memory needs special
2423 : handling since the MEM may be BLKmode which normally
2424 : prevents an entry from being made. Pure calls are
2425 : marked by a USE which mentions BLKmode memory.
2426 : See calls.cc:emit_call_1. */
2427 70 : if (MEM_P (XEXP (x, 0))
2428 70 : && ! MEM_VOLATILE_P (XEXP (x, 0)))
2429 : {
2430 0 : hash += (unsigned) USE;
2431 0 : x = XEXP (x, 0);
2432 :
2433 0 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2434 0 : *hash_arg_in_memory_p = 1;
2435 :
2436 : /* Now that we have already found this special case,
2437 : might as well speed it up as much as possible. */
2438 0 : hash += (unsigned) MEM;
2439 0 : x = XEXP (x, 0);
2440 0 : goto repeat;
2441 : }
2442 : break;
2443 :
2444 51912317 : case PRE_DEC:
2445 51912317 : case PRE_INC:
2446 51912317 : case POST_DEC:
2447 51912317 : case POST_INC:
2448 51912317 : case PRE_MODIFY:
2449 51912317 : case POST_MODIFY:
2450 51912317 : case PC:
2451 51912317 : case CALL:
2452 51912317 : case UNSPEC_VOLATILE:
2453 51912317 : if (do_not_record_p) {
2454 51910852 : *do_not_record_p = 1;
2455 51910852 : return 0;
2456 : }
2457 : else
2458 : return hash;
2459 200442 : break;
2460 :
2461 200442 : case ASM_OPERANDS:
2462 200442 : if (do_not_record_p && MEM_VOLATILE_P (x))
2463 : {
2464 163513 : *do_not_record_p = 1;
2465 163513 : return 0;
2466 : }
2467 : else
2468 : {
2469 : /* We don't want to take the filename and line into account. */
2470 73858 : hash += (unsigned) code + (unsigned) GET_MODE (x)
2471 36929 : + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2472 36929 : + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2473 36929 : + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2474 :
2475 36929 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2476 : {
2477 56767 : for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2478 : {
2479 49292 : hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2480 24646 : GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2481 : do_not_record_p, hash_arg_in_memory_p,
2482 : have_reg_qty, cb)
2483 24646 : + hash_rtx_string
2484 49292 : (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2485 : }
2486 :
2487 32121 : hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2488 32121 : x = ASM_OPERANDS_INPUT (x, 0);
2489 32121 : mode = GET_MODE (x);
2490 32121 : goto repeat;
2491 : }
2492 :
2493 : return hash;
2494 : }
2495 : break;
2496 :
2497 : default:
2498 : break;
2499 : }
2500 :
2501 354536311 : i = GET_RTX_LENGTH (code) - 1;
2502 354536311 : hash += (unsigned) code + (unsigned) GET_MODE (x);
2503 354536311 : fmt = GET_RTX_FORMAT (code);
2504 717671579 : for (; i >= 0; i--)
2505 : {
2506 711310696 : switch (fmt[i])
2507 : {
2508 699691419 : case 'e':
2509 : /* If we are about to do the last recursive call
2510 : needed at this level, change it into iteration.
2511 : This function is called enough to be worth it. */
2512 699691419 : if (i == 0)
2513 : {
2514 348175428 : x = XEXP (x, i);
2515 348175428 : goto repeat;
2516 : }
2517 :
2518 351515991 : hash += hash_rtx (XEXP (x, i), VOIDmode, do_not_record_p,
2519 : hash_arg_in_memory_p,
2520 : have_reg_qty, cb);
2521 351515991 : break;
2522 :
2523 : case 'E':
2524 16315982 : for (j = 0; j < XVECLEN (x, i); j++)
2525 9955361 : hash += hash_rtx (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2526 : hash_arg_in_memory_p,
2527 : have_reg_qty, cb);
2528 : break;
2529 :
2530 0 : case 's':
2531 0 : hash += hash_rtx_string (XSTR (x, i));
2532 0 : break;
2533 :
2534 5203312 : case 'i':
2535 5203312 : hash += (unsigned int) XINT (x, i);
2536 5203312 : break;
2537 :
2538 0 : case 'L':
2539 0 : hash += (unsigned int) XLOC (x, i);
2540 0 : break;
2541 :
2542 55289 : case 'p':
2543 55289 : hash += constant_lower_bound (SUBREG_BYTE (x));
2544 55289 : break;
2545 :
2546 : case '0': case 't':
2547 : /* Unused. */
2548 : break;
2549 :
2550 0 : default:
2551 0 : gcc_unreachable ();
2552 : }
2553 : }
2554 :
2555 : return hash;
2556 : }
2557 :
2558 : /* Hash an rtx X for cse via hash_rtx.
2559 : Stores 1 in do_not_record if any subexpression is volatile.
2560 : Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2561 : does not have the MEM_READONLY_P flag set. */
2562 :
2563 : static inline unsigned
2564 513788832 : canon_hash (rtx x, machine_mode mode)
2565 : {
2566 513788832 : return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2567 : }
2568 :
2569 : /* Like canon_hash but with no side effects, i.e. do_not_record
2570 : and hash_arg_in_memory are not changed. */
2571 :
2572 : static inline unsigned
2573 162738086 : safe_hash (rtx x, machine_mode mode)
2574 : {
2575 162738086 : int dummy_do_not_record;
2576 162738086 : return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2577 : }
2578 :
2579 : /* Return true iff X and Y would canonicalize into the same thing,
2580 : without actually constructing the canonicalization of either one.
2581 : If VALIDATE is nonzero,
2582 : we assume X is an expression being processed from the rtl
2583 : and Y was found in the hash table. We check register refs
2584 : in Y for being marked as valid.
2585 :
2586 : If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2587 :
2588 : bool
2589 755845666 : exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2590 : {
2591 755845666 : int i, j;
2592 755845666 : enum rtx_code code;
2593 755845666 : const char *fmt;
2594 :
2595 : /* Note: it is incorrect to assume an expression is equivalent to itself
2596 : if VALIDATE is nonzero. */
2597 755845666 : if (x == y && !validate)
2598 : return true;
2599 :
2600 733281456 : if (x == 0 || y == 0)
2601 : return x == y;
2602 :
2603 733281456 : code = GET_CODE (x);
2604 733281456 : if (code != GET_CODE (y))
2605 : return false;
2606 :
2607 : /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2608 626663177 : if (GET_MODE (x) != GET_MODE (y))
2609 : return false;
2610 :
2611 : /* MEMs referring to different address space are not equivalent. */
2612 652070967 : if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2613 : return false;
2614 :
2615 551063318 : switch (code)
2616 : {
2617 : case PC:
2618 : CASE_CONST_UNIQUE:
2619 : return x == y;
2620 :
2621 : case CONST_VECTOR:
2622 : if (!same_vector_encodings_p (x, y))
2623 : return false;
2624 : break;
2625 :
2626 25214 : case LABEL_REF:
2627 25214 : return label_ref_label (x) == label_ref_label (y);
2628 :
2629 17040318 : case SYMBOL_REF:
2630 17040318 : return XSTR (x, 0) == XSTR (y, 0);
2631 :
2632 163986796 : case REG:
2633 163986796 : if (for_gcse)
2634 1479035 : return REGNO (x) == REGNO (y);
2635 : else
2636 : {
2637 162507761 : unsigned int regno = REGNO (y);
2638 162507761 : unsigned int i;
2639 162507761 : unsigned int endregno = END_REGNO (y);
2640 :
2641 : /* If the quantities are not the same, the expressions are not
2642 : equivalent. If there are and we are not to validate, they
2643 : are equivalent. Otherwise, ensure all regs are up-to-date. */
2644 :
2645 162507761 : if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2646 : return false;
2647 :
2648 149132460 : if (! validate)
2649 : return true;
2650 :
2651 276407428 : for (i = regno; i < endregno; i++)
2652 139365888 : if (REG_IN_TABLE (i) != REG_TICK (i))
2653 : return false;
2654 :
2655 : return true;
2656 : }
2657 :
2658 99128901 : case MEM:
2659 99128901 : if (for_gcse)
2660 : {
2661 : /* A volatile mem should not be considered equivalent to any
2662 : other. */
2663 56235908 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2664 : return false;
2665 :
2666 : /* Can't merge two expressions in different alias sets, since we
2667 : can decide that the expression is transparent in a block when
2668 : it isn't, due to it being set with the different alias set.
2669 :
2670 : Also, can't merge two expressions with different MEM_ATTRS.
2671 : They could e.g. be two different entities allocated into the
2672 : same space on the stack (see e.g. PR25130). In that case, the
2673 : MEM addresses can be the same, even though the two MEMs are
2674 : absolutely not equivalent.
2675 :
2676 : But because really all MEM attributes should be the same for
2677 : equivalent MEMs, we just use the invariant that MEMs that have
2678 : the same attributes share the same mem_attrs data structure. */
2679 56125915 : if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y)))
2680 : return false;
2681 :
2682 : /* If we are handling exceptions, we cannot consider two expressions
2683 : with different trapping status as equivalent, because simple_mem
2684 : might accept one and reject the other. */
2685 9000876 : if (cfun->can_throw_non_call_exceptions
2686 9000876 : && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y)))
2687 : return false;
2688 : }
2689 : break;
2690 :
2691 : /* For commutative operations, check both orders. */
2692 69125199 : case PLUS:
2693 69125199 : case MULT:
2694 69125199 : case AND:
2695 69125199 : case IOR:
2696 69125199 : case XOR:
2697 69125199 : case NE:
2698 69125199 : case EQ:
2699 69125199 : return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2700 : validate, for_gcse)
2701 63232296 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2702 : validate, for_gcse))
2703 75797748 : || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2704 : validate, for_gcse)
2705 18220 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2706 : validate, for_gcse)));
2707 :
2708 12820 : case ASM_OPERANDS:
2709 : /* We don't use the generic code below because we want to
2710 : disregard filename and line numbers. */
2711 :
2712 : /* A volatile asm isn't equivalent to any other. */
2713 12820 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2714 : return false;
2715 :
2716 12820 : if (GET_MODE (x) != GET_MODE (y)
2717 12820 : || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2718 12820 : || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2719 12820 : ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2720 12810 : || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2721 12810 : || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2722 : return false;
2723 :
2724 12810 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2725 : {
2726 17234 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2727 8716 : if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2728 8716 : ASM_OPERANDS_INPUT (y, i),
2729 : validate, for_gcse)
2730 8716 : || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2731 8636 : ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2732 : return false;
2733 : }
2734 :
2735 : return true;
2736 :
2737 : default:
2738 : break;
2739 : }
2740 :
2741 : /* Compare the elements. If any pair of corresponding elements
2742 : fail to match, return 0 for the whole thing. */
2743 :
2744 119210676 : fmt = GET_RTX_FORMAT (code);
2745 333325564 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2746 : {
2747 226248252 : switch (fmt[i])
2748 : {
2749 154038381 : case 'e':
2750 154038381 : if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2751 : validate, for_gcse))
2752 : return false;
2753 : break;
2754 :
2755 9023076 : case 'E':
2756 9023076 : if (XVECLEN (x, i) != XVECLEN (y, i))
2757 : return 0;
2758 42412017 : for (j = 0; j < XVECLEN (x, i); j++)
2759 34239947 : if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2760 : validate, for_gcse))
2761 : return false;
2762 : break;
2763 :
2764 0 : case 's':
2765 0 : if (strcmp (XSTR (x, i), XSTR (y, i)))
2766 : return false;
2767 : break;
2768 :
2769 3487147 : case 'i':
2770 3487147 : if (XINT (x, i) != XINT (y, i))
2771 : return false;
2772 : break;
2773 :
2774 0 : case 'L':
2775 0 : if (XLOC (x, i) != XLOC (y, i))
2776 : return false;
2777 : break;
2778 :
2779 0 : case 'w':
2780 0 : if (XWINT (x, i) != XWINT (y, i))
2781 : return false;
2782 : break;
2783 :
2784 7815725 : case 'p':
2785 7815725 : if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2786 : return false;
2787 : break;
2788 :
2789 : case '0':
2790 : case 't':
2791 : break;
2792 :
2793 0 : default:
2794 0 : gcc_unreachable ();
2795 : }
2796 : }
2797 :
2798 : return true;
2799 : }
2800 :
2801 : /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2802 : the result if necessary. INSN is as for canon_reg. */
2803 :
2804 : static void
2805 1028369101 : validate_canon_reg (rtx *xloc, rtx_insn *insn)
2806 : {
2807 1028369101 : if (*xloc)
2808 : {
2809 1028369101 : rtx new_rtx = canon_reg (*xloc, insn);
2810 :
2811 : /* If replacing pseudo with hard reg or vice versa, ensure the
2812 : insn remains valid. Likewise if the insn has MATCH_DUPs. */
2813 1028369101 : gcc_assert (insn && new_rtx);
2814 1028369101 : validate_change (insn, xloc, new_rtx, 1);
2815 : }
2816 1028369101 : }
2817 :
2818 : /* Canonicalize an expression:
2819 : replace each register reference inside it
2820 : with the "oldest" equivalent register.
2821 :
2822 : If INSN is nonzero validate_change is used to ensure that INSN remains valid
2823 : after we make our substitution. The calls are made with IN_GROUP nonzero
2824 : so apply_change_group must be called upon the outermost return from this
2825 : function (unless INSN is zero). The result of apply_change_group can
2826 : generally be discarded since the changes we are making are optional. */
2827 :
2828 : static rtx
2829 1684751571 : canon_reg (rtx x, rtx_insn *insn)
2830 : {
2831 1684751571 : int i;
2832 1684751571 : enum rtx_code code;
2833 1684751571 : const char *fmt;
2834 :
2835 1684751571 : if (x == 0)
2836 : return x;
2837 :
2838 1684751571 : code = GET_CODE (x);
2839 1684751571 : switch (code)
2840 : {
2841 : case PC:
2842 : case CONST:
2843 : CASE_CONST_ANY:
2844 : case SYMBOL_REF:
2845 : case LABEL_REF:
2846 : case ADDR_VEC:
2847 : case ADDR_DIFF_VEC:
2848 : return x;
2849 :
2850 470098629 : case REG:
2851 470098629 : {
2852 470098629 : int first;
2853 470098629 : int q;
2854 470098629 : struct qty_table_elem *ent;
2855 :
2856 : /* Never replace a hard reg, because hard regs can appear
2857 : in more than one machine mode, and we must preserve the mode
2858 : of each occurrence. Also, some hard regs appear in
2859 : MEMs that are shared and mustn't be altered. Don't try to
2860 : replace any reg that maps to a reg of class NO_REGS. */
2861 470098629 : if (REGNO (x) < FIRST_PSEUDO_REGISTER
2862 470098629 : || ! REGNO_QTY_VALID_P (REGNO (x)))
2863 304312679 : return x;
2864 :
2865 165785950 : q = REG_QTY (REGNO (x));
2866 165785950 : ent = &qty_table[q];
2867 165785950 : first = ent->first_reg;
2868 165785950 : return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2869 403156 : : REGNO_REG_CLASS (first) == NO_REGS ? x
2870 165785950 : : gen_rtx_REG (ent->mode, first));
2871 : }
2872 :
2873 750052030 : default:
2874 750052030 : break;
2875 : }
2876 :
2877 750052030 : fmt = GET_RTX_FORMAT (code);
2878 2068324634 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2879 : {
2880 1318272604 : int j;
2881 :
2882 1318272604 : if (fmt[i] == 'e')
2883 1015512283 : validate_canon_reg (&XEXP (x, i), insn);
2884 302760321 : else if (fmt[i] == 'E')
2885 19398411 : for (j = 0; j < XVECLEN (x, i); j++)
2886 12856818 : validate_canon_reg (&XVECEXP (x, i, j), insn);
2887 : }
2888 :
2889 : return x;
2890 : }
2891 :
2892 : /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2893 : operation (EQ, NE, GT, etc.), follow it back through the hash table and
2894 : what values are being compared.
2895 :
2896 : *PARG1 and *PARG2 are updated to contain the rtx representing the values
2897 : actually being compared. For example, if *PARG1 was (reg:CC CC_REG) and
2898 : *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that
2899 : were compared to produce (reg:CC CC_REG).
2900 :
2901 : The return value is the comparison operator and is either the code of
2902 : A or the code corresponding to the inverse of the comparison. */
2903 :
2904 : static enum rtx_code
2905 36836322 : find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2906 : machine_mode *pmode1, machine_mode *pmode2)
2907 : {
2908 36836322 : rtx arg1, arg2;
2909 36836322 : hash_set<rtx> *visited = NULL;
2910 : /* Set nonzero when we find something of interest. */
2911 36836322 : rtx x = NULL;
2912 :
2913 36836322 : arg1 = *parg1, arg2 = *parg2;
2914 :
2915 : /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2916 :
2917 71778230 : while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2918 : {
2919 53701033 : int reverse_code = 0;
2920 53701033 : struct table_elt *p = 0;
2921 :
2922 : /* Remember state from previous iteration. */
2923 53701033 : if (x)
2924 : {
2925 16940196 : if (!visited)
2926 16935871 : visited = new hash_set<rtx>;
2927 16940196 : visited->add (x);
2928 16940196 : x = 0;
2929 : }
2930 :
2931 : /* If arg1 is a COMPARE, extract the comparison arguments from it. */
2932 :
2933 53701033 : if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2934 0 : x = arg1;
2935 :
2936 : /* If ARG1 is a comparison operator and CODE is testing for
2937 : STORE_FLAG_VALUE, get the inner arguments. */
2938 :
2939 53701033 : else if (COMPARISON_P (arg1))
2940 : {
2941 : #ifdef FLOAT_STORE_FLAG_VALUE
2942 : REAL_VALUE_TYPE fsfv;
2943 : #endif
2944 :
2945 0 : if (code == NE
2946 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2947 : && code == LT && STORE_FLAG_VALUE == -1)
2948 : #ifdef FLOAT_STORE_FLAG_VALUE
2949 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2950 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2951 : REAL_VALUE_NEGATIVE (fsfv)))
2952 : #endif
2953 : )
2954 0 : x = arg1;
2955 0 : else if (code == EQ
2956 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2957 : && code == GE && STORE_FLAG_VALUE == -1)
2958 : #ifdef FLOAT_STORE_FLAG_VALUE
2959 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2960 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2961 : REAL_VALUE_NEGATIVE (fsfv)))
2962 : #endif
2963 : )
2964 0 : x = arg1, reverse_code = 1;
2965 : }
2966 :
2967 : /* ??? We could also check for
2968 :
2969 : (ne (and (eq (...) (const_int 1))) (const_int 0))
2970 :
2971 : and related forms, but let's wait until we see them occurring. */
2972 :
2973 53701033 : if (x == 0)
2974 : /* Look up ARG1 in the hash table and see if it has an equivalence
2975 : that lets us see what is being compared. */
2976 53701033 : p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2977 53701033 : if (p)
2978 : {
2979 43040355 : p = p->first_same_value;
2980 :
2981 : /* If what we compare is already known to be constant, that is as
2982 : good as it gets.
2983 : We need to break the loop in this case, because otherwise we
2984 : can have an infinite loop when looking at a reg that is known
2985 : to be a constant which is the same as a comparison of a reg
2986 : against zero which appears later in the insn stream, which in
2987 : turn is constant and the same as the comparison of the first reg
2988 : against zero... */
2989 43040355 : if (p->is_const)
2990 : break;
2991 : }
2992 :
2993 69423778 : for (; p; p = p->next_same_value)
2994 : {
2995 50669966 : machine_mode inner_mode = GET_MODE (p->exp);
2996 : #ifdef FLOAT_STORE_FLAG_VALUE
2997 : REAL_VALUE_TYPE fsfv;
2998 : #endif
2999 :
3000 : /* If the entry isn't valid, skip it. */
3001 50669966 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3002 1815151 : continue;
3003 :
3004 : /* If it's a comparison we've used before, skip it. */
3005 48854815 : if (visited && visited->contains (p->exp))
3006 0 : continue;
3007 :
3008 48854815 : if (GET_CODE (p->exp) == COMPARE
3009 : /* Another possibility is that this machine has a compare insn
3010 : that includes the comparison code. In that case, ARG1 would
3011 : be equivalent to a comparison operation that would set ARG1 to
3012 : either STORE_FLAG_VALUE or zero. If this is an NE operation,
3013 : ORIG_CODE is the actual comparison being done; if it is an EQ,
3014 : we must reverse ORIG_CODE. On machine with a negative value
3015 : for STORE_FLAG_VALUE, also look at LT and GE operations. */
3016 48854815 : || ((code == NE
3017 9796694 : || (code == LT
3018 280106 : && val_signbit_known_set_p (inner_mode,
3019 : STORE_FLAG_VALUE))
3020 : #ifdef FLOAT_STORE_FLAG_VALUE
3021 : || (code == LT
3022 : && SCALAR_FLOAT_MODE_P (inner_mode)
3023 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3024 : REAL_VALUE_NEGATIVE (fsfv)))
3025 : #endif
3026 : )
3027 4221514 : && COMPARISON_P (p->exp)))
3028 : {
3029 34839946 : x = p->exp;
3030 34839946 : break;
3031 : }
3032 14014869 : else if ((code == EQ
3033 7364660 : || (code == GE
3034 222396 : && val_signbit_known_set_p (inner_mode,
3035 : STORE_FLAG_VALUE))
3036 : #ifdef FLOAT_STORE_FLAG_VALUE
3037 : || (code == GE
3038 : && SCALAR_FLOAT_MODE_P (inner_mode)
3039 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3040 : REAL_VALUE_NEGATIVE (fsfv)))
3041 : #endif
3042 : )
3043 14014869 : && COMPARISON_P (p->exp))
3044 : {
3045 101962 : reverse_code = 1;
3046 101962 : x = p->exp;
3047 101962 : break;
3048 : }
3049 :
3050 : /* If this non-trapping address, e.g. fp + constant, the
3051 : equivalent is a better operand since it may let us predict
3052 : the value of the comparison. */
3053 13912907 : else if (!rtx_addr_can_trap_p (p->exp))
3054 : {
3055 0 : arg1 = p->exp;
3056 0 : continue;
3057 : }
3058 : }
3059 :
3060 : /* If we didn't find a useful equivalence for ARG1, we are done.
3061 : Otherwise, set up for the next iteration. */
3062 53695720 : if (x == 0)
3063 : break;
3064 :
3065 : /* If we need to reverse the comparison, make sure that is
3066 : possible -- we can't necessarily infer the value of GE from LT
3067 : with floating-point operands. */
3068 34941908 : if (reverse_code)
3069 : {
3070 101962 : enum rtx_code reversed = reversed_comparison_code (x, NULL);
3071 101962 : if (reversed == UNKNOWN)
3072 : break;
3073 : else
3074 : code = reversed;
3075 : }
3076 34839946 : else if (COMPARISON_P (x))
3077 3339 : code = GET_CODE (x);
3078 34941908 : arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3079 : }
3080 :
3081 : /* Return our results. Return the modes from before fold_rtx
3082 : because fold_rtx might produce const_int, and then it's too late. */
3083 36836322 : *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3084 36836322 : *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3085 :
3086 36836322 : if (visited)
3087 16935871 : delete visited;
3088 36836322 : return code;
3089 : }
3090 :
3091 : /* If X is a nontrivial arithmetic operation on an argument for which
3092 : a constant value can be determined, return the result of operating
3093 : on that value, as a constant. Otherwise, return X, possibly with
3094 : one or more operands changed to a forward-propagated constant.
3095 :
3096 : If X is a register whose contents are known, we do NOT return
3097 : those contents here; equiv_constant is called to perform that task.
3098 : For SUBREGs and MEMs, we do that both here and in equiv_constant.
3099 :
3100 : INSN is the insn that we may be modifying. If it is 0, make a copy
3101 : of X before modifying it. */
3102 :
3103 : static rtx
3104 395682267 : fold_rtx (rtx x, rtx_insn *insn)
3105 : {
3106 395684053 : enum rtx_code code;
3107 395684053 : machine_mode mode;
3108 395684053 : const char *fmt;
3109 395684053 : int i;
3110 395684053 : rtx new_rtx = 0;
3111 395684053 : bool changed = false;
3112 395684053 : poly_int64 xval;
3113 :
3114 : /* Operands of X. */
3115 : /* Workaround -Wmaybe-uninitialized false positive during
3116 : profiledbootstrap by initializing them. */
3117 395684053 : rtx folded_arg0 = NULL_RTX;
3118 395684053 : rtx folded_arg1 = NULL_RTX;
3119 :
3120 : /* Constant equivalents of first three operands of X;
3121 : 0 when no such equivalent is known. */
3122 395684053 : rtx const_arg0;
3123 395684053 : rtx const_arg1;
3124 395684053 : rtx const_arg2;
3125 :
3126 : /* The mode of the first operand of X. We need this for sign and zero
3127 : extends. */
3128 395684053 : machine_mode mode_arg0;
3129 :
3130 395684053 : if (x == 0)
3131 : return x;
3132 :
3133 : /* Try to perform some initial simplifications on X. */
3134 395684053 : code = GET_CODE (x);
3135 395684053 : switch (code)
3136 : {
3137 61483863 : case MEM:
3138 61483863 : case SUBREG:
3139 : /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3140 : than it would in other contexts. Basically its mode does not
3141 : signify the size of the object read. That information is carried
3142 : by size operand. If we happen to have a MEM of the appropriate
3143 : mode in our tables with a constant value we could simplify the
3144 : extraction incorrectly if we allowed substitution of that value
3145 : for the MEM. */
3146 61483863 : case ZERO_EXTRACT:
3147 61483863 : case SIGN_EXTRACT:
3148 61483863 : if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3149 : return new_rtx;
3150 : return x;
3151 :
3152 : case CONST:
3153 : CASE_CONST_ANY:
3154 : case SYMBOL_REF:
3155 : case LABEL_REF:
3156 : case REG:
3157 : case PC:
3158 : /* No use simplifying an EXPR_LIST
3159 : since they are used only for lists of args
3160 : in a function call's REG_EQUAL note. */
3161 : case EXPR_LIST:
3162 : return x;
3163 :
3164 199633 : case ASM_OPERANDS:
3165 199633 : if (insn)
3166 : {
3167 0 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3168 0 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3169 0 : fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3170 : }
3171 : return x;
3172 :
3173 15269755 : case CALL:
3174 15269755 : if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3175 : return x;
3176 : break;
3177 922914 : case VEC_SELECT:
3178 922914 : {
3179 922914 : rtx trueop0 = XEXP (x, 0);
3180 922914 : mode = GET_MODE (trueop0);
3181 922914 : rtx trueop1 = XEXP (x, 1);
3182 : /* If we select a low-part subreg, return that. */
3183 922914 : if (vec_series_lowpart_p (GET_MODE (x), mode, trueop1))
3184 : {
3185 205 : rtx new_rtx = lowpart_subreg (GET_MODE (x), trueop0, mode);
3186 205 : if (new_rtx != NULL_RTX)
3187 : return new_rtx;
3188 : }
3189 : }
3190 :
3191 : /* Anything else goes through the loop below. */
3192 : default:
3193 : break;
3194 : }
3195 :
3196 115501360 : mode = GET_MODE (x);
3197 115501360 : const_arg0 = 0;
3198 115501360 : const_arg1 = 0;
3199 115501360 : const_arg2 = 0;
3200 115501360 : mode_arg0 = VOIDmode;
3201 :
3202 : /* Try folding our operands.
3203 : Then see which ones have constant values known. */
3204 :
3205 115501360 : fmt = GET_RTX_FORMAT (code);
3206 360478915 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3207 244977555 : if (fmt[i] == 'e')
3208 : {
3209 240487166 : rtx folded_arg = XEXP (x, i), const_arg;
3210 240487166 : machine_mode mode_arg = GET_MODE (folded_arg);
3211 :
3212 240487166 : switch (GET_CODE (folded_arg))
3213 : {
3214 107145026 : case MEM:
3215 107145026 : case REG:
3216 107145026 : case SUBREG:
3217 107145026 : const_arg = equiv_constant (folded_arg);
3218 107145026 : break;
3219 :
3220 : case CONST:
3221 : CASE_CONST_ANY:
3222 : case SYMBOL_REF:
3223 : case LABEL_REF:
3224 : const_arg = folded_arg;
3225 : break;
3226 :
3227 45501022 : default:
3228 45501022 : folded_arg = fold_rtx (folded_arg, insn);
3229 45501022 : const_arg = equiv_constant (folded_arg);
3230 45501022 : break;
3231 : }
3232 :
3233 : /* For the first three operands, see if the operand
3234 : is constant or equivalent to a constant. */
3235 240487166 : switch (i)
3236 : {
3237 112794811 : case 0:
3238 112794811 : folded_arg0 = folded_arg;
3239 112794811 : const_arg0 = const_arg;
3240 112794811 : mode_arg0 = mode_arg;
3241 112794811 : break;
3242 106830986 : case 1:
3243 106830986 : folded_arg1 = folded_arg;
3244 106830986 : const_arg1 = const_arg;
3245 106830986 : break;
3246 20861369 : case 2:
3247 20861369 : const_arg2 = const_arg;
3248 20861369 : break;
3249 : }
3250 :
3251 : /* Pick the least expensive of the argument and an equivalent constant
3252 : argument. */
3253 240487166 : if (const_arg != 0
3254 240487166 : && const_arg != folded_arg
3255 6126392 : && (COST_IN (const_arg, mode_arg, code, i)
3256 3063196 : <= COST_IN (folded_arg, mode_arg, code, i))
3257 :
3258 : /* It's not safe to substitute the operand of a conversion
3259 : operator with a constant, as the conversion's identity
3260 : depends upon the mode of its operand. This optimization
3261 : is handled by the call to simplify_unary_operation. */
3262 242135725 : && (GET_RTX_CLASS (code) != RTX_UNARY
3263 416660 : || GET_MODE (const_arg) == mode_arg0
3264 337553 : || (code != ZERO_EXTEND
3265 : && code != SIGN_EXTEND
3266 337553 : && code != TRUNCATE
3267 337553 : && code != FLOAT_TRUNCATE
3268 256543 : && code != FLOAT_EXTEND
3269 256543 : && code != FLOAT
3270 : && code != FIX
3271 256369 : && code != UNSIGNED_FLOAT
3272 256369 : && code != UNSIGNED_FIX)))
3273 : folded_arg = const_arg;
3274 :
3275 240487166 : if (folded_arg == XEXP (x, i))
3276 238415689 : continue;
3277 :
3278 2071477 : if (insn == NULL_RTX && !changed)
3279 1853141 : x = copy_rtx (x);
3280 2071477 : changed = true;
3281 2071477 : validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3282 : }
3283 :
3284 115501360 : if (changed)
3285 : {
3286 : /* Canonicalize X if necessary, and keep const_argN and folded_argN
3287 : consistent with the order in X. */
3288 1853867 : if (canonicalize_change_group (insn, x))
3289 : {
3290 94443 : std::swap (const_arg0, const_arg1);
3291 94443 : std::swap (folded_arg0, folded_arg1);
3292 : }
3293 :
3294 1853867 : apply_change_group ();
3295 : }
3296 :
3297 : /* If X is an arithmetic operation, see if we can simplify it. */
3298 :
3299 115501360 : switch (GET_RTX_CLASS (code))
3300 : {
3301 5963825 : case RTX_UNARY:
3302 5963825 : {
3303 : /* We can't simplify extension ops unless we know the
3304 : original mode. */
3305 5963825 : if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3306 4291731 : && mode_arg0 == VOIDmode)
3307 : break;
3308 :
3309 5963825 : new_rtx = simplify_unary_operation (code, mode,
3310 : const_arg0 ? const_arg0 : folded_arg0,
3311 : mode_arg0);
3312 : }
3313 5963825 : break;
3314 :
3315 22217252 : case RTX_COMPARE:
3316 22217252 : case RTX_COMM_COMPARE:
3317 : /* See what items are actually being compared and set FOLDED_ARG[01]
3318 : to those values and CODE to the actual comparison code. If any are
3319 : constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3320 : do anything if both operands are already known to be constant. */
3321 :
3322 : /* ??? Vector mode comparisons are not supported yet. */
3323 22217252 : if (VECTOR_MODE_P (mode))
3324 : break;
3325 :
3326 22083712 : if (const_arg0 == 0 || const_arg1 == 0)
3327 : {
3328 22082637 : struct table_elt *p0, *p1;
3329 22082637 : rtx true_rtx, false_rtx;
3330 22082637 : machine_mode mode_arg1;
3331 :
3332 22082637 : if (SCALAR_FLOAT_MODE_P (mode))
3333 : {
3334 : #ifdef FLOAT_STORE_FLAG_VALUE
3335 : true_rtx = (const_double_from_real_value
3336 : (FLOAT_STORE_FLAG_VALUE (mode), mode));
3337 : #else
3338 2401 : true_rtx = NULL_RTX;
3339 : #endif
3340 2401 : false_rtx = CONST0_RTX (mode);
3341 : }
3342 : else
3343 : {
3344 22080236 : true_rtx = const_true_rtx;
3345 22080236 : false_rtx = const0_rtx;
3346 : }
3347 :
3348 22082637 : code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3349 : &mode_arg0, &mode_arg1);
3350 :
3351 : /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3352 : what kinds of things are being compared, so we can't do
3353 : anything with this comparison. */
3354 :
3355 22082637 : if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3356 : break;
3357 :
3358 20741853 : const_arg0 = equiv_constant (folded_arg0);
3359 20741853 : const_arg1 = equiv_constant (folded_arg1);
3360 :
3361 : /* If we do not now have two constants being compared, see
3362 : if we can nevertheless deduce some things about the
3363 : comparison. */
3364 20741853 : if (const_arg0 == 0 || const_arg1 == 0)
3365 : {
3366 20514551 : if (const_arg1 != NULL)
3367 : {
3368 15212062 : rtx cheapest_simplification;
3369 15212062 : int cheapest_cost;
3370 15212062 : rtx simp_result;
3371 15212062 : struct table_elt *p;
3372 :
3373 : /* See if we can find an equivalent of folded_arg0
3374 : that gets us a cheaper expression, possibly a
3375 : constant through simplifications. */
3376 15212062 : p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3377 : mode_arg0);
3378 :
3379 15212062 : if (p != NULL)
3380 : {
3381 6467048 : cheapest_simplification = x;
3382 6467048 : cheapest_cost = COST (x, mode);
3383 :
3384 18858723 : for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3385 : {
3386 12391675 : int cost;
3387 :
3388 : /* If the entry isn't valid, skip it. */
3389 12391675 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3390 503102 : continue;
3391 :
3392 : /* Try to simplify using this equivalence. */
3393 11888573 : simp_result
3394 11888573 : = simplify_relational_operation (code, mode,
3395 : mode_arg0,
3396 : p->exp,
3397 : const_arg1);
3398 :
3399 11888573 : if (simp_result == NULL)
3400 11729247 : continue;
3401 :
3402 159326 : cost = COST (simp_result, mode);
3403 159326 : if (cost < cheapest_cost)
3404 : {
3405 12391675 : cheapest_cost = cost;
3406 12391675 : cheapest_simplification = simp_result;
3407 : }
3408 : }
3409 :
3410 : /* If we have a cheaper expression now, use that
3411 : and try folding it further, from the top. */
3412 6467048 : if (cheapest_simplification != x)
3413 1759 : return fold_rtx (copy_rtx (cheapest_simplification),
3414 4113 : insn);
3415 : }
3416 : }
3417 :
3418 : /* See if the two operands are the same. */
3419 :
3420 20728490 : if ((REG_P (folded_arg0)
3421 17562898 : && REG_P (folded_arg1)
3422 4723643 : && (REG_QTY (REGNO (folded_arg0))
3423 4723643 : == REG_QTY (REGNO (folded_arg1))))
3424 38279678 : || ((p0 = lookup (folded_arg0,
3425 : SAFE_HASH (folded_arg0, mode_arg0),
3426 : mode_arg0))
3427 9070932 : && (p1 = lookup (folded_arg1,
3428 : SAFE_HASH (folded_arg1, mode_arg0),
3429 : mode_arg0))
3430 2660866 : && p0->first_same_value == p1->first_same_value))
3431 12676 : folded_arg1 = folded_arg0;
3432 :
3433 : /* If FOLDED_ARG0 is a register, see if the comparison we are
3434 : doing now is either the same as we did before or the reverse
3435 : (we only check the reverse if not floating-point). */
3436 20715814 : else if (REG_P (folded_arg0))
3437 : {
3438 17550813 : int qty = REG_QTY (REGNO (folded_arg0));
3439 :
3440 17550813 : if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3441 : {
3442 17539971 : struct qty_table_elem *ent = &qty_table[qty];
3443 :
3444 17539971 : if ((comparison_dominates_p (ent->comparison_code, code)
3445 17051541 : || (! FLOAT_MODE_P (mode_arg0)
3446 16832880 : && comparison_dominates_p (ent->comparison_code,
3447 : reverse_condition (code))))
3448 17987073 : && (rtx_equal_p (ent->comparison_const, folded_arg1)
3449 934668 : || (const_arg1
3450 765533 : && rtx_equal_p (ent->comparison_const,
3451 : const_arg1))
3452 934668 : || (REG_P (folded_arg1)
3453 157617 : && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3454 : {
3455 2354 : if (comparison_dominates_p (ent->comparison_code, code))
3456 : {
3457 1304 : if (true_rtx)
3458 : return true_rtx;
3459 : else
3460 : break;
3461 : }
3462 : else
3463 : return false_rtx;
3464 : }
3465 : }
3466 : }
3467 : }
3468 : }
3469 :
3470 : /* If we are comparing against zero, see if the first operand is
3471 : equivalent to an IOR with a constant. If so, we may be able to
3472 : determine the result of this comparison. */
3473 20738815 : if (const_arg1 == const0_rtx && !const_arg0)
3474 : {
3475 9824611 : rtx y = lookup_as_function (folded_arg0, IOR);
3476 9824611 : rtx inner_const;
3477 :
3478 9824611 : if (y != 0
3479 69059 : && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3480 78 : && CONST_INT_P (inner_const)
3481 9824689 : && INTVAL (inner_const) != 0)
3482 78 : folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3483 : }
3484 :
3485 20731530 : {
3486 20731530 : rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0);
3487 20738815 : rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1);
3488 20738815 : new_rtx = simplify_relational_operation (code, mode, mode_arg0,
3489 : op0, op1);
3490 : }
3491 20738815 : break;
3492 :
3493 63236072 : case RTX_BIN_ARITH:
3494 63236072 : case RTX_COMM_ARITH:
3495 63236072 : switch (code)
3496 : {
3497 26963194 : case PLUS:
3498 : /* If the second operand is a LABEL_REF, see if the first is a MINUS
3499 : with that LABEL_REF as its second operand. If so, the result is
3500 : the first operand of that MINUS. This handles switches with an
3501 : ADDR_DIFF_VEC table. */
3502 26963194 : if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3503 : {
3504 2448 : rtx y
3505 2448 : = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3506 2448 : : lookup_as_function (folded_arg0, MINUS);
3507 :
3508 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3509 2448 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg1))
3510 0 : return XEXP (y, 0);
3511 :
3512 : /* Now try for a CONST of a MINUS like the above. */
3513 2448 : if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3514 2448 : : lookup_as_function (folded_arg0, CONST))) != 0
3515 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3516 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3517 2448 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg1))
3518 0 : return XEXP (XEXP (y, 0), 0);
3519 : }
3520 :
3521 : /* Likewise if the operands are in the other order. */
3522 26963194 : if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3523 : {
3524 23 : rtx y
3525 23 : = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3526 23 : : lookup_as_function (folded_arg1, MINUS);
3527 :
3528 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3529 23 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg0))
3530 0 : return XEXP (y, 0);
3531 :
3532 : /* Now try for a CONST of a MINUS like the above. */
3533 23 : if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3534 23 : : lookup_as_function (folded_arg1, CONST))) != 0
3535 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3536 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3537 23 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg0))
3538 0 : return XEXP (XEXP (y, 0), 0);
3539 : }
3540 :
3541 : /* If second operand is a register equivalent to a negative
3542 : CONST_INT, see if we can find a register equivalent to the
3543 : positive constant. Make a MINUS if so. Don't do this for
3544 : a non-negative constant since we might then alternate between
3545 : choosing positive and negative constants. Having the positive
3546 : constant previously-used is the more common case. Be sure
3547 : the resulting constant is non-negative; if const_arg1 were
3548 : the smallest negative number this would overflow: depending
3549 : on the mode, this would either just be the same value (and
3550 : hence not save anything) or be incorrect. */
3551 26963194 : if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3552 21620222 : && INTVAL (const_arg1) < 0
3553 : /* This used to test
3554 :
3555 : -INTVAL (const_arg1) >= 0
3556 :
3557 : But The Sun V5.0 compilers mis-compiled that test. So
3558 : instead we test for the problematic value in a more direct
3559 : manner and hope the Sun compilers get it correct. */
3560 12119359 : && INTVAL (const_arg1) !=
3561 : (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1))
3562 12100355 : && REG_P (folded_arg1))
3563 : {
3564 31771 : rtx new_const = GEN_INT (-INTVAL (const_arg1));
3565 31771 : struct table_elt *p
3566 31771 : = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3567 :
3568 31771 : if (p)
3569 5027 : for (p = p->first_same_value; p; p = p->next_same_value)
3570 5026 : if (REG_P (p->exp))
3571 2619 : return simplify_gen_binary (MINUS, mode, folded_arg0,
3572 2619 : canon_reg (p->exp, NULL));
3573 : }
3574 26960575 : goto from_plus;
3575 :
3576 2182089 : case MINUS:
3577 : /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3578 : If so, produce (PLUS Z C2-C). */
3579 2182089 : if (const_arg1 != 0 && poly_int_rtx_p (const_arg1, &xval))
3580 : {
3581 43624 : rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3582 43624 : if (y && poly_int_rtx_p (XEXP (y, 1)))
3583 27 : return fold_rtx (plus_constant (mode, copy_rtx (y), -xval),
3584 27 : NULL);
3585 : }
3586 :
3587 : /* Fall through. */
3588 :
3589 39577586 : from_plus:
3590 39577586 : case SMIN: case SMAX: case UMIN: case UMAX:
3591 39577586 : case IOR: case AND: case XOR:
3592 39577586 : case MULT:
3593 39577586 : case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3594 : /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3595 : is known to be of similar form, we may be able to replace the
3596 : operation with a combined operation. This may eliminate the
3597 : intermediate operation if every use is simplified in this way.
3598 : Note that the similar optimization done by combine.cc only works
3599 : if the intermediate operation's result has only one reference. */
3600 :
3601 39577586 : if (REG_P (folded_arg0)
3602 36203861 : && const_arg1 && CONST_INT_P (const_arg1))
3603 : {
3604 26550945 : int is_shift
3605 26550945 : = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3606 : rtx y, inner_const, new_const;
3607 : rtx canon_const_arg1 = const_arg1;
3608 : enum rtx_code associate_code;
3609 :
3610 : if (is_shift
3611 6471018 : && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode)
3612 3235396 : || INTVAL (const_arg1) < 0))
3613 : {
3614 : if (SHIFT_COUNT_TRUNCATED)
3615 : canon_const_arg1 = gen_int_shift_amount
3616 : (mode, (INTVAL (const_arg1)
3617 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3618 : else
3619 : break;
3620 : }
3621 :
3622 26550822 : y = lookup_as_function (folded_arg0, code);
3623 26550822 : if (y == 0)
3624 : break;
3625 :
3626 : /* If we have compiled a statement like
3627 : "if (x == (x & mask1))", and now are looking at
3628 : "x & mask2", we will have a case where the first operand
3629 : of Y is the same as our first operand. Unless we detect
3630 : this case, an infinite loop will result. */
3631 841831 : if (XEXP (y, 0) == folded_arg0)
3632 : break;
3633 :
3634 841560 : inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3635 841560 : if (!inner_const || !CONST_INT_P (inner_const))
3636 : break;
3637 :
3638 : /* Don't associate these operations if they are a PLUS with the
3639 : same constant and it is a power of two. These might be doable
3640 : with a pre- or post-increment. Similarly for two subtracts of
3641 : identical powers of two with post decrement. */
3642 :
3643 509406 : if (code == PLUS && const_arg1 == inner_const
3644 : && ((HAVE_PRE_INCREMENT
3645 : && pow2p_hwi (INTVAL (const_arg1)))
3646 : || (HAVE_POST_INCREMENT
3647 : && pow2p_hwi (INTVAL (const_arg1)))
3648 : || (HAVE_PRE_DECREMENT
3649 : && pow2p_hwi (- INTVAL (const_arg1)))
3650 : || (HAVE_POST_DECREMENT
3651 : && pow2p_hwi (- INTVAL (const_arg1)))))
3652 : break;
3653 :
3654 : /* ??? Vector mode shifts by scalar
3655 : shift operand are not supported yet. */
3656 509406 : if (is_shift && VECTOR_MODE_P (mode))
3657 : break;
3658 :
3659 4065 : if (is_shift
3660 8130 : && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode)
3661 4065 : || INTVAL (inner_const) < 0))
3662 : {
3663 : if (SHIFT_COUNT_TRUNCATED)
3664 : inner_const = gen_int_shift_amount
3665 : (mode, (INTVAL (inner_const)
3666 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3667 : else
3668 : break;
3669 : }
3670 :
3671 : /* Compute the code used to compose the constants. For example,
3672 : A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3673 :
3674 509133 : associate_code = (is_shift || code == MINUS ? PLUS : code);
3675 :
3676 509133 : new_const = simplify_binary_operation (associate_code, mode,
3677 : canon_const_arg1,
3678 : inner_const);
3679 :
3680 509133 : if (new_const == 0)
3681 : break;
3682 :
3683 : /* If we are associating shift operations, don't let this
3684 : produce a shift of the size of the object or larger.
3685 : This could occur when we follow a sign-extend by a right
3686 : shift on a machine that does a sign-extend as a pair
3687 : of shifts. */
3688 :
3689 509133 : if (is_shift
3690 4065 : && CONST_INT_P (new_const)
3691 517263 : && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode))
3692 : {
3693 : /* As an exception, we can turn an ASHIFTRT of this
3694 : form into a shift of the number of bits - 1. */
3695 1579 : if (code == ASHIFTRT)
3696 1555 : new_const = gen_int_shift_amount
3697 1555 : (mode, GET_MODE_UNIT_BITSIZE (mode) - 1);
3698 24 : else if (!side_effects_p (XEXP (y, 0)))
3699 24 : return CONST0_RTX (mode);
3700 : else
3701 : break;
3702 : }
3703 :
3704 509109 : y = copy_rtx (XEXP (y, 0));
3705 :
3706 : /* If Y contains our first operand (the most common way this
3707 : can happen is if Y is a MEM), we would do into an infinite
3708 : loop if we tried to fold it. So don't in that case. */
3709 :
3710 509109 : if (! reg_mentioned_p (folded_arg0, y))
3711 509109 : y = fold_rtx (y, insn);
3712 :
3713 509109 : return simplify_gen_binary (code, mode, y, new_const);
3714 : }
3715 : break;
3716 :
3717 : case DIV: case UDIV:
3718 : /* ??? The associative optimization performed immediately above is
3719 : also possible for DIV and UDIV using associate_code of MULT.
3720 : However, we would need extra code to verify that the
3721 : multiplication does not overflow, that is, there is no overflow
3722 : in the calculation of new_const. */
3723 : break;
3724 :
3725 : default:
3726 : break;
3727 : }
3728 :
3729 106807753 : new_rtx = simplify_binary_operation (code, mode,
3730 : const_arg0 ? const_arg0 : folded_arg0,
3731 : const_arg1 ? const_arg1 : folded_arg1);
3732 62724293 : break;
3733 :
3734 0 : case RTX_OBJ:
3735 : /* (lo_sum (high X) X) is simply X. */
3736 0 : if (code == LO_SUM && const_arg0 != 0
3737 0 : && GET_CODE (const_arg0) == HIGH
3738 0 : && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3739 : return const_arg1;
3740 : break;
3741 :
3742 20861369 : case RTX_TERNARY:
3743 20861369 : case RTX_BITFIELD_OPS:
3744 20861369 : new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3745 : const_arg0 ? const_arg0 : folded_arg0,
3746 : const_arg1 ? const_arg1 : folded_arg1,
3747 : const_arg2 ? const_arg2 : XEXP (x, 2));
3748 20861369 : break;
3749 :
3750 : default:
3751 : break;
3752 : }
3753 :
3754 111629086 : return new_rtx ? new_rtx : x;
3755 : }
3756 :
3757 : /* Return a constant value currently equivalent to X.
3758 : Return 0 if we don't know one. */
3759 :
3760 : static rtx
3761 269210774 : equiv_constant (rtx x)
3762 : {
3763 269210774 : if (REG_P (x)
3764 269210774 : && REGNO_QTY_VALID_P (REGNO (x)))
3765 : {
3766 86079358 : int x_q = REG_QTY (REGNO (x));
3767 86079358 : struct qty_table_elem *x_ent = &qty_table[x_q];
3768 :
3769 86079358 : if (x_ent->const_rtx)
3770 4473870 : x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3771 : }
3772 :
3773 269210774 : if (x == 0 || CONSTANT_P (x))
3774 26432695 : return x;
3775 :
3776 242778079 : if (GET_CODE (x) == SUBREG)
3777 : {
3778 5518299 : machine_mode mode = GET_MODE (x);
3779 5518299 : machine_mode imode = GET_MODE (SUBREG_REG (x));
3780 5518299 : rtx new_rtx;
3781 :
3782 : /* See if we previously assigned a constant value to this SUBREG. */
3783 5518299 : if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3784 5507546 : || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
3785 5507546 : || (NUM_POLY_INT_COEFFS > 1
3786 : && (new_rtx = lookup_as_function (x, CONST_POLY_INT)) != 0)
3787 5501630 : || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3788 11019741 : || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3789 16857 : return new_rtx;
3790 :
3791 : /* If we didn't and if doing so makes sense, see if we previously
3792 : assigned a constant value to the enclosing word mode SUBREG. */
3793 11841415 : if (known_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD)
3794 8451826 : && known_lt (UNITS_PER_WORD, GET_MODE_SIZE (imode)))
3795 : {
3796 34788 : poly_int64 byte = (SUBREG_BYTE (x)
3797 34788 : - subreg_lowpart_offset (mode, word_mode));
3798 69576 : if (known_ge (byte, 0) && multiple_p (byte, UNITS_PER_WORD))
3799 : {
3800 34788 : rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3801 34788 : new_rtx = lookup_as_function (y, CONST_INT);
3802 34788 : if (new_rtx)
3803 0 : return gen_lowpart (mode, new_rtx);
3804 : }
3805 : }
3806 :
3807 : /* Otherwise see if we already have a constant for the inner REG,
3808 : and if that is enough to calculate an equivalent constant for
3809 : the subreg. Note that the upper bits of paradoxical subregs
3810 : are undefined, so they cannot be said to equal anything. */
3811 5501442 : if (REG_P (SUBREG_REG (x))
3812 5492600 : && !paradoxical_subreg_p (x)
3813 10807081 : && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3814 82986 : return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3815 :
3816 5418456 : return 0;
3817 : }
3818 :
3819 : /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3820 : the hash table in case its value was seen before. */
3821 :
3822 237259780 : if (MEM_P (x))
3823 : {
3824 68046151 : struct table_elt *elt;
3825 :
3826 68046151 : x = avoid_constant_pool_reference (x);
3827 68046151 : if (CONSTANT_P (x))
3828 : return x;
3829 :
3830 65944060 : elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3831 65944060 : if (elt == 0)
3832 : return 0;
3833 :
3834 5610852 : for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3835 3971163 : if (elt->is_const && CONSTANT_P (elt->exp))
3836 : return elt->exp;
3837 : }
3838 :
3839 : return 0;
3840 : }
3841 :
3842 : /* Given INSN, a jump insn, TAKEN indicates if we are following the
3843 : "taken" branch.
3844 :
3845 : In certain cases, this can cause us to add an equivalence. For example,
3846 : if we are following the taken case of
3847 : if (i == 2)
3848 : we can add the fact that `i' and '2' are now equivalent.
3849 :
3850 : In any case, we can record that this comparison was passed. If the same
3851 : comparison is seen later, we will know its value. */
3852 :
3853 : static void
3854 14753685 : record_jump_equiv (rtx_insn *insn, bool taken)
3855 : {
3856 14753685 : int cond_known_true;
3857 14753685 : rtx op0, op1;
3858 14753685 : rtx set;
3859 14753685 : machine_mode mode, mode0, mode1;
3860 14753685 : enum rtx_code code;
3861 :
3862 : /* Ensure this is the right kind of insn. */
3863 14753685 : gcc_assert (any_condjump_p (insn));
3864 :
3865 14753685 : set = pc_set (insn);
3866 :
3867 : /* See if this jump condition is known true or false. */
3868 14753685 : if (taken)
3869 5925904 : cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3870 : else
3871 8827781 : cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3872 :
3873 : /* Get the type of comparison being done and the operands being compared.
3874 : If we had to reverse a non-equality condition, record that fact so we
3875 : know that it isn't valid for floating-point. */
3876 14753685 : code = GET_CODE (XEXP (SET_SRC (set), 0));
3877 14753685 : op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3878 14753685 : op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3879 :
3880 : /* If fold_rtx returns NULL_RTX, there's nothing to record. */
3881 14753685 : if (op0 == NULL_RTX || op1 == NULL_RTX)
3882 84341 : return;
3883 :
3884 14753685 : code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3885 14753685 : if (! cond_known_true)
3886 : {
3887 8827781 : code = reversed_comparison_code_parts (code, op0, op1, insn);
3888 :
3889 : /* Don't remember if we can't find the inverse. */
3890 8827781 : if (code == UNKNOWN)
3891 : return;
3892 : }
3893 :
3894 : /* The mode is the mode of the non-constant. */
3895 14669344 : mode = mode0;
3896 14669344 : if (mode1 != VOIDmode)
3897 3794100 : mode = mode1;
3898 :
3899 14669344 : record_jump_cond (code, mode, op0, op1);
3900 : }
3901 :
3902 : /* Yet another form of subreg creation. In this case, we want something in
3903 : MODE, and we should assume OP has MODE iff it is naturally modeless. */
3904 :
3905 : static rtx
3906 69504 : record_jump_cond_subreg (machine_mode mode, rtx op)
3907 : {
3908 69504 : machine_mode op_mode = GET_MODE (op);
3909 69504 : if (op_mode == mode || op_mode == VOIDmode)
3910 : return op;
3911 7110 : return lowpart_subreg (mode, op, op_mode);
3912 : }
3913 :
3914 : /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3915 : Make any useful entries we can with that information. Called from
3916 : above function and called recursively. */
3917 :
3918 : static void
3919 14738844 : record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, rtx op1)
3920 : {
3921 14738844 : unsigned op0_hash, op1_hash;
3922 14738844 : int op0_in_memory, op1_in_memory;
3923 14738844 : struct table_elt *op0_elt, *op1_elt;
3924 :
3925 : /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3926 : we know that they are also equal in the smaller mode (this is also
3927 : true for all smaller modes whether or not there is a SUBREG, but
3928 : is not worth testing for with no SUBREG). */
3929 :
3930 : /* Note that GET_MODE (op0) may not equal MODE. */
3931 14788457 : if (code == EQ && paradoxical_subreg_p (op0))
3932 : {
3933 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3934 0 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3935 0 : if (tem)
3936 0 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3937 : }
3938 :
3939 14753230 : if (code == EQ && paradoxical_subreg_p (op1))
3940 : {
3941 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3942 0 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3943 0 : if (tem)
3944 0 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3945 : }
3946 :
3947 : /* Similarly, if this is an NE comparison, and either is a SUBREG
3948 : making a smaller mode, we know the whole thing is also NE. */
3949 :
3950 : /* Note that GET_MODE (op0) may not equal MODE;
3951 : if we test MODE instead, we can get an infinite recursion
3952 : alternating between two modes each wider than MODE. */
3953 :
3954 14738844 : if (code == NE
3955 63813 : && partial_subreg_p (op0)
3956 14802501 : && subreg_lowpart_p (op0))
3957 : {
3958 63330 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3959 63330 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3960 63330 : if (tem)
3961 63330 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3962 : }
3963 :
3964 14738844 : if (code == NE
3965 12694 : && partial_subreg_p (op1)
3966 14745074 : && subreg_lowpart_p (op1))
3967 : {
3968 6174 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3969 6174 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3970 6174 : if (tem)
3971 6170 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3972 : }
3973 :
3974 : /* Hash both operands. */
3975 :
3976 14738844 : do_not_record = 0;
3977 14738844 : hash_arg_in_memory = 0;
3978 14738844 : op0_hash = HASH (op0, mode);
3979 14738844 : op0_in_memory = hash_arg_in_memory;
3980 :
3981 14738844 : if (do_not_record)
3982 : return;
3983 :
3984 14738844 : do_not_record = 0;
3985 14738844 : hash_arg_in_memory = 0;
3986 14738844 : op1_hash = HASH (op1, mode);
3987 14738844 : op1_in_memory = hash_arg_in_memory;
3988 :
3989 14738844 : if (do_not_record)
3990 : return;
3991 :
3992 : /* Look up both operands. */
3993 14738844 : op0_elt = lookup (op0, op0_hash, mode);
3994 14738844 : op1_elt = lookup (op1, op1_hash, mode);
3995 :
3996 : /* If both operands are already equivalent or if they are not in the
3997 : table but are identical, do nothing. */
3998 14738844 : if ((op0_elt != 0 && op1_elt != 0
3999 2050346 : && op0_elt->first_same_value == op1_elt->first_same_value)
4000 16789121 : || op0 == op1 || rtx_equal_p (op0, op1))
4001 779 : return;
4002 :
4003 : /* If we aren't setting two things equal all we can do is save this
4004 : comparison. Similarly if this is floating-point. In the latter
4005 : case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4006 : If we record the equality, we might inadvertently delete code
4007 : whose intent was to change -0 to +0. */
4008 :
4009 14738065 : if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4010 : {
4011 9430202 : struct qty_table_elem *ent;
4012 9430202 : int qty;
4013 :
4014 : /* If OP0 is not a register, or if OP1 is neither a register
4015 : or constant, we can't do anything. */
4016 :
4017 9430202 : if (!REG_P (op1))
4018 7380899 : op1 = equiv_constant (op1);
4019 :
4020 9430202 : if (!REG_P (op0) || op1 == 0)
4021 : return;
4022 :
4023 : /* Put OP0 in the hash table if it isn't already. This gives it a
4024 : new quantity number. */
4025 8204720 : if (op0_elt == 0)
4026 : {
4027 3323191 : if (insert_regs (op0, NULL, false))
4028 : {
4029 63722 : rehash_using_reg (op0);
4030 63722 : op0_hash = HASH (op0, mode);
4031 :
4032 : /* If OP0 is contained in OP1, this changes its hash code
4033 : as well. Faster to rehash than to check, except
4034 : for the simple case of a constant. */
4035 63722 : if (! CONSTANT_P (op1))
4036 497 : op1_hash = HASH (op1,mode);
4037 : }
4038 :
4039 3323191 : op0_elt = insert (op0, NULL, op0_hash, mode);
4040 3323191 : op0_elt->in_memory = op0_in_memory;
4041 : }
4042 :
4043 8204720 : qty = REG_QTY (REGNO (op0));
4044 8204720 : ent = &qty_table[qty];
4045 :
4046 8204720 : ent->comparison_code = code;
4047 8204720 : if (REG_P (op1))
4048 : {
4049 : /* Look it up again--in case op0 and op1 are the same. */
4050 1961438 : op1_elt = lookup (op1, op1_hash, mode);
4051 :
4052 : /* Put OP1 in the hash table so it gets a new quantity number. */
4053 1961438 : if (op1_elt == 0)
4054 : {
4055 698096 : if (insert_regs (op1, NULL, false))
4056 : {
4057 457 : rehash_using_reg (op1);
4058 457 : op1_hash = HASH (op1, mode);
4059 : }
4060 :
4061 698096 : op1_elt = insert (op1, NULL, op1_hash, mode);
4062 698096 : op1_elt->in_memory = op1_in_memory;
4063 : }
4064 :
4065 1961438 : ent->comparison_const = NULL_RTX;
4066 1961438 : ent->comparison_qty = REG_QTY (REGNO (op1));
4067 : }
4068 : else
4069 : {
4070 6243282 : ent->comparison_const = op1;
4071 6243282 : ent->comparison_qty = INT_MIN;
4072 : }
4073 :
4074 8204720 : return;
4075 : }
4076 :
4077 : /* If either side is still missing an equivalence, make it now,
4078 : then merge the equivalences. */
4079 :
4080 5307863 : if (op0_elt == 0)
4081 : {
4082 3209125 : if (insert_regs (op0, NULL, false))
4083 : {
4084 21317 : rehash_using_reg (op0);
4085 21317 : op0_hash = HASH (op0, mode);
4086 : }
4087 :
4088 3209125 : op0_elt = insert (op0, NULL, op0_hash, mode);
4089 3209125 : op0_elt->in_memory = op0_in_memory;
4090 : }
4091 :
4092 5307863 : if (op1_elt == 0)
4093 : {
4094 3959678 : if (insert_regs (op1, NULL, false))
4095 : {
4096 8410 : rehash_using_reg (op1);
4097 8410 : op1_hash = HASH (op1, mode);
4098 : }
4099 :
4100 3959678 : op1_elt = insert (op1, NULL, op1_hash, mode);
4101 3959678 : op1_elt->in_memory = op1_in_memory;
4102 : }
4103 :
4104 5307863 : merge_equiv_classes (op0_elt, op1_elt);
4105 : }
4106 :
4107 : /* CSE processing for one instruction.
4108 :
4109 : Most "true" common subexpressions are mostly optimized away in GIMPLE,
4110 : but the few that "leak through" are cleaned up by cse_insn, and complex
4111 : addressing modes are often formed here.
4112 :
4113 : The main function is cse_insn, and between here and that function
4114 : a couple of helper functions is defined to keep the size of cse_insn
4115 : within reasonable proportions.
4116 :
4117 : Data is shared between the main and helper functions via STRUCT SET,
4118 : that contains all data related for every set in the instruction that
4119 : is being processed.
4120 :
4121 : Note that cse_main processes all sets in the instruction. Most
4122 : passes in GCC only process simple SET insns or single_set insns, but
4123 : CSE processes insns with multiple sets as well. */
4124 :
4125 : /* Data on one SET contained in the instruction. */
4126 :
4127 : struct set
4128 : {
4129 : /* The SET rtx itself. */
4130 : rtx rtl;
4131 : /* The SET_SRC of the rtx (the original value, if it is changing). */
4132 : rtx src;
4133 : /* The hash-table element for the SET_SRC of the SET. */
4134 : struct table_elt *src_elt;
4135 : /* Hash value for the SET_SRC. */
4136 : unsigned src_hash;
4137 : /* Hash value for the SET_DEST. */
4138 : unsigned dest_hash;
4139 : /* The SET_DEST, with SUBREG, etc., stripped. */
4140 : rtx inner_dest;
4141 : /* Original machine mode, in case it becomes a CONST_INT. */
4142 : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
4143 : /* Nonzero if the SET_SRC is in memory. */
4144 : unsigned int src_in_memory : 1;
4145 : /* Nonzero if the SET_SRC contains something
4146 : whose value cannot be predicted and understood. */
4147 : unsigned int src_volatile : 1;
4148 : /* Nonzero if RTL is an artifical set that has been created to describe
4149 : part of an insn's effect. Zero means that RTL appears directly in
4150 : the insn pattern. */
4151 : unsigned int is_fake_set : 1;
4152 : /* Hash value of constant equivalent for SET_SRC. */
4153 : unsigned src_const_hash;
4154 : /* A constant equivalent for SET_SRC, if any. */
4155 : rtx src_const;
4156 : /* Table entry for constant equivalent for SET_SRC, if any. */
4157 : struct table_elt *src_const_elt;
4158 : /* Table entry for the destination address. */
4159 : struct table_elt *dest_addr_elt;
4160 : };
4161 :
4162 : /* Special handling for (set REG0 REG1) where REG0 is the
4163 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
4164 : be used in the sequel, so (if easily done) change this insn to
4165 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4166 : that computed their value. Then REG1 will become a dead store
4167 : and won't cloud the situation for later optimizations.
4168 :
4169 : Do not make this change if REG1 is a hard register, because it will
4170 : then be used in the sequel and we may be changing a two-operand insn
4171 : into a three-operand insn.
4172 :
4173 : This is the last transformation that cse_insn will try to do. */
4174 :
4175 : static void
4176 135959522 : try_back_substitute_reg (rtx set, rtx_insn *insn)
4177 : {
4178 135959522 : rtx dest = SET_DEST (set);
4179 135959522 : rtx src = SET_SRC (set);
4180 :
4181 135959522 : if (REG_P (dest)
4182 113231919 : && REG_P (src) && ! HARD_REGISTER_P (src)
4183 143102792 : && REGNO_QTY_VALID_P (REGNO (src)))
4184 : {
4185 7143236 : int src_q = REG_QTY (REGNO (src));
4186 7143236 : struct qty_table_elem *src_ent = &qty_table[src_q];
4187 :
4188 7143236 : if (src_ent->first_reg == REGNO (dest))
4189 : {
4190 : /* Scan for the previous nonnote insn, but stop at a basic
4191 : block boundary. */
4192 1815920 : rtx_insn *prev = insn;
4193 1815920 : rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
4194 4425718 : do
4195 : {
4196 4425718 : prev = PREV_INSN (prev);
4197 : }
4198 4425718 : while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
4199 :
4200 : /* Do not swap the registers around if the previous instruction
4201 : attaches a REG_EQUIV note to REG1.
4202 :
4203 : ??? It's not entirely clear whether we can transfer a REG_EQUIV
4204 : from the pseudo that originally shadowed an incoming argument
4205 : to another register. Some uses of REG_EQUIV might rely on it
4206 : being attached to REG1 rather than REG2.
4207 :
4208 : This section previously turned the REG_EQUIV into a REG_EQUAL
4209 : note. We cannot do that because REG_EQUIV may provide an
4210 : uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4211 1815920 : if (NONJUMP_INSN_P (prev)
4212 1110101 : && GET_CODE (PATTERN (prev)) == SET
4213 798205 : && SET_DEST (PATTERN (prev)) == src
4214 2051245 : && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
4215 : {
4216 235207 : rtx note;
4217 :
4218 235207 : validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
4219 235207 : validate_change (insn, &SET_DEST (set), src, 1);
4220 235207 : validate_change (insn, &SET_SRC (set), dest, 1);
4221 235207 : apply_change_group ();
4222 :
4223 : /* If INSN has a REG_EQUAL note, and this note mentions
4224 : REG0, then we must delete it, because the value in
4225 : REG0 has changed. If the note's value is REG1, we must
4226 : also delete it because that is now this insn's dest. */
4227 235207 : note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4228 235207 : if (note != 0
4229 235207 : && (reg_mentioned_p (dest, XEXP (note, 0))
4230 1369 : || rtx_equal_p (src, XEXP (note, 0))))
4231 3 : remove_note (insn, note);
4232 :
4233 : /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4234 235207 : note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4235 235207 : if (note != 0)
4236 : {
4237 0 : remove_note (insn, note);
4238 0 : gcc_assert (!find_reg_note (prev, REG_ARGS_SIZE, NULL_RTX));
4239 0 : set_unique_reg_note (prev, REG_ARGS_SIZE, XEXP (note, 0));
4240 : }
4241 : }
4242 : }
4243 : }
4244 135959522 : }
4245 :
4246 : /* Add an entry containing RTL X into SETS. IS_FAKE_SET is true if X is
4247 : an artifical set that has been created to describe part of an insn's
4248 : effect. */
4249 : static inline void
4250 193455928 : add_to_set (vec<struct set> *sets, rtx x, bool is_fake_set)
4251 : {
4252 193455928 : struct set entry = {};
4253 193455928 : entry.rtl = x;
4254 193455928 : entry.is_fake_set = is_fake_set;
4255 193455928 : sets->safe_push (entry);
4256 193455928 : }
4257 :
4258 : /* Record all the SETs in this instruction into SETS_PTR,
4259 : and return the number of recorded sets. */
4260 : static int
4261 390269249 : find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
4262 : {
4263 390269249 : rtx x = PATTERN (insn);
4264 :
4265 390269249 : if (GET_CODE (x) == SET)
4266 : {
4267 : /* Ignore SETs that are unconditional jumps.
4268 : They never need cse processing, so this does not hurt.
4269 : The reason is not efficiency but rather
4270 : so that we can test at the end for instructions
4271 : that have been simplified to unconditional jumps
4272 : and not be misled by unchanged instructions
4273 : that were unconditional jumps to begin with. */
4274 168295250 : if (SET_DEST (x) == pc_rtx
4275 20147101 : && GET_CODE (SET_SRC (x)) == LABEL_REF)
4276 : ;
4277 : /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4278 : The hard function value register is used only once, to copy to
4279 : someplace else, so it isn't worth cse'ing. */
4280 168294935 : else if (GET_CODE (SET_SRC (x)) == CALL)
4281 : ;
4282 161214915 : else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR
4283 646375 : && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL
4284 : /* Prevent duplicates from being generated if the type is a V1
4285 : type and a subreg. Folding this will result in the same
4286 : element as folding x itself. */
4287 161861290 : && !(SUBREG_P (SET_DEST (x))
4288 68 : && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1)))
4289 : {
4290 : /* First register the vector itself. */
4291 646375 : add_to_set (psets, x, false);
4292 646375 : rtx src = SET_SRC (x);
4293 : /* Go over the constants of the CONST_VECTOR in forward order, to
4294 : put them in the same order in the SETS array. */
4295 1292900 : for (unsigned i = 0; i < const_vector_encoded_nelts (src) ; i++)
4296 : {
4297 : /* These are templates and don't actually get emitted but are
4298 : used to tell CSE how to get to a particular constant. */
4299 646525 : rtx y = simplify_gen_vec_select (SET_DEST (x), i);
4300 646525 : gcc_assert (y);
4301 646525 : if (!REG_P (y))
4302 : {
4303 645652 : rtx set = gen_rtx_SET (y, CONST_VECTOR_ELT (src, i));
4304 645652 : add_to_set (psets, set, true);
4305 : }
4306 : }
4307 : }
4308 : else
4309 160568540 : add_to_set (psets, x, false);
4310 : }
4311 221973999 : else if (GET_CODE (x) == PARALLEL)
4312 : {
4313 30860139 : int i, lim = XVECLEN (x, 0);
4314 :
4315 : /* Go over the expressions of the PARALLEL in forward order, to
4316 : put them in the same order in the SETS array. */
4317 93776396 : for (i = 0; i < lim; i++)
4318 : {
4319 62916257 : rtx y = XVECEXP (x, 0, i);
4320 62916257 : if (GET_CODE (y) == SET)
4321 : {
4322 : /* As above, we ignore unconditional jumps and call-insns and
4323 : ignore the result of apply_change_group. */
4324 31605554 : if (SET_DEST (y) == pc_rtx
4325 23009 : && GET_CODE (SET_SRC (y)) == LABEL_REF)
4326 : ;
4327 31605554 : else if (GET_CODE (SET_SRC (y)) == CALL)
4328 : ;
4329 : else
4330 31595361 : add_to_set (psets, y, false);
4331 : }
4332 : }
4333 : }
4334 :
4335 390269249 : return psets->length ();
4336 : }
4337 :
4338 : /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4339 :
4340 : static void
4341 99571 : canon_asm_operands (rtx x, rtx_insn *insn)
4342 : {
4343 128972 : for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4344 : {
4345 29401 : rtx input = ASM_OPERANDS_INPUT (x, i);
4346 29401 : if (!(REG_P (input) && HARD_REGISTER_P (input)))
4347 : {
4348 29015 : input = canon_reg (input, insn);
4349 29015 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4350 : }
4351 : }
4352 99571 : }
4353 :
4354 : /* Where possible, substitute every register reference in the N_SETS
4355 : number of SETS in INSN with the canonical register.
4356 :
4357 : Register canonicalization propagatest the earliest register (i.e.
4358 : one that is set before INSN) with the same value. This is a very
4359 : useful, simple form of CSE, to clean up warts from expanding GIMPLE
4360 : to RTL. For instance, a CONST for an address is usually expanded
4361 : multiple times to loads into different registers, thus creating many
4362 : subexpressions of the form:
4363 :
4364 : (set (reg1) (some_const))
4365 : (set (mem (... reg1 ...) (thing)))
4366 : (set (reg2) (some_const))
4367 : (set (mem (... reg2 ...) (thing)))
4368 :
4369 : After canonicalizing, the code takes the following form:
4370 :
4371 : (set (reg1) (some_const))
4372 : (set (mem (... reg1 ...) (thing)))
4373 : (set (reg2) (some_const))
4374 : (set (mem (... reg1 ...) (thing)))
4375 :
4376 : The set to reg2 is now trivially dead, and the memory reference (or
4377 : address, or whatever) may be a candidate for further CSEing.
4378 :
4379 : In this function, the result of apply_change_group can be ignored;
4380 : see canon_reg. */
4381 :
4382 : static void
4383 390269249 : canonicalize_insn (rtx_insn *insn, vec<struct set> *psets)
4384 : {
4385 390269249 : vec<struct set> sets = *psets;
4386 390269249 : int n_sets = sets.length ();
4387 390269249 : rtx tem;
4388 390269249 : rtx x = PATTERN (insn);
4389 390269249 : int i;
4390 :
4391 390269249 : if (CALL_P (insn))
4392 : {
4393 45967805 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4394 30698050 : if (GET_CODE (XEXP (tem, 0)) != SET)
4395 30498711 : XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4396 : }
4397 :
4398 390269249 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
4399 : {
4400 7080020 : canon_reg (SET_SRC (x), insn);
4401 7080020 : apply_change_group ();
4402 7080020 : fold_rtx (SET_SRC (x), insn);
4403 : }
4404 383189229 : else if (GET_CODE (x) == CLOBBER)
4405 : {
4406 : /* If we clobber memory, canon the address.
4407 : This does nothing when a register is clobbered
4408 : because we have already invalidated the reg. */
4409 64353 : if (MEM_P (XEXP (x, 0)))
4410 12970 : canon_reg (XEXP (x, 0), insn);
4411 : }
4412 383124876 : else if (GET_CODE (x) == USE
4413 383124876 : && ! (REG_P (XEXP (x, 0))
4414 1267577 : && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4415 : /* Canonicalize a USE of a pseudo register or memory location. */
4416 0 : canon_reg (x, insn);
4417 383124876 : else if (GET_CODE (x) == ASM_OPERANDS)
4418 18 : canon_asm_operands (x, insn);
4419 383124858 : else if (GET_CODE (x) == CALL)
4420 : {
4421 7690501 : canon_reg (x, insn);
4422 7690501 : apply_change_group ();
4423 7690501 : fold_rtx (x, insn);
4424 : }
4425 375434357 : else if (DEBUG_INSN_P (insn))
4426 181383226 : canon_reg (PATTERN (insn), insn);
4427 194051131 : else if (GET_CODE (x) == PARALLEL)
4428 : {
4429 93776396 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4430 : {
4431 62916257 : rtx y = XVECEXP (x, 0, i);
4432 62916257 : if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
4433 : {
4434 10193 : canon_reg (SET_SRC (y), insn);
4435 10193 : apply_change_group ();
4436 10193 : fold_rtx (SET_SRC (y), insn);
4437 : }
4438 62906064 : else if (GET_CODE (y) == CLOBBER)
4439 : {
4440 30476250 : if (MEM_P (XEXP (y, 0)))
4441 62202 : canon_reg (XEXP (y, 0), insn);
4442 : }
4443 32429814 : else if (GET_CODE (y) == USE
4444 32429814 : && ! (REG_P (XEXP (y, 0))
4445 166377 : && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4446 206644 : canon_reg (y, insn);
4447 32223170 : else if (GET_CODE (y) == ASM_OPERANDS)
4448 99553 : canon_asm_operands (y, insn);
4449 32123617 : else if (GET_CODE (y) == CALL)
4450 : {
4451 489041 : canon_reg (y, insn);
4452 489041 : apply_change_group ();
4453 489041 : fold_rtx (y, insn);
4454 : }
4455 : }
4456 : }
4457 :
4458 190676373 : if (n_sets == 1 && REG_NOTES (insn) != 0
4459 513381842 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4460 : {
4461 : /* We potentially will process this insn many times. Therefore,
4462 : drop the REG_EQUAL note if it is equal to the SET_SRC of the
4463 : unique set in INSN.
4464 :
4465 : Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4466 : because cse_insn handles those specially. */
4467 8607864 : if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART
4468 8607864 : && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
4469 181584 : remove_note (insn, tem);
4470 : else
4471 : {
4472 8426280 : canon_reg (XEXP (tem, 0), insn);
4473 8426280 : apply_change_group ();
4474 8426280 : XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn);
4475 8426280 : df_notes_rescan (insn);
4476 : }
4477 : }
4478 :
4479 : /* Canonicalize sources and addresses of destinations.
4480 : We do this in a separate pass to avoid problems when a MATCH_DUP is
4481 : present in the insn pattern. In that case, we want to ensure that
4482 : we don't break the duplicate nature of the pattern. So we will replace
4483 : both operands at the same time. Otherwise, we would fail to find an
4484 : equivalent substitution in the loop calling validate_change below.
4485 :
4486 : We used to suppress canonicalization of DEST if it appears in SRC,
4487 : but we don't do this any more. */
4488 :
4489 583725177 : for (i = 0; i < n_sets; i++)
4490 : {
4491 193455928 : rtx dest = SET_DEST (sets[i].rtl);
4492 193455928 : rtx src = SET_SRC (sets[i].rtl);
4493 193455928 : rtx new_rtx = canon_reg (src, insn);
4494 :
4495 193455928 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4496 :
4497 193455928 : if (GET_CODE (dest) == ZERO_EXTRACT)
4498 : {
4499 3893 : validate_change (insn, &XEXP (dest, 1),
4500 : canon_reg (XEXP (dest, 1), insn), 1);
4501 3893 : validate_change (insn, &XEXP (dest, 2),
4502 : canon_reg (XEXP (dest, 2), insn), 1);
4503 : }
4504 :
4505 195020253 : while (GET_CODE (dest) == SUBREG
4506 193477452 : || GET_CODE (dest) == ZERO_EXTRACT
4507 388493812 : || GET_CODE (dest) == STRICT_LOW_PART)
4508 1564325 : dest = XEXP (dest, 0);
4509 :
4510 193455928 : if (MEM_P (dest))
4511 28498591 : canon_reg (dest, insn);
4512 : }
4513 :
4514 : /* Now that we have done all the replacements, we can apply the change
4515 : group and see if they all work. Note that this will cause some
4516 : canonicalizations that would have worked individually not to be applied
4517 : because some other canonicalization didn't work, but this should not
4518 : occur often.
4519 :
4520 : The result of apply_change_group can be ignored; see canon_reg. */
4521 :
4522 390269249 : apply_change_group ();
4523 390269249 : }
4524 :
4525 : /* Main function of CSE.
4526 : First simplify sources and addresses of all assignments
4527 : in the instruction, using previously-computed equivalents values.
4528 : Then install the new sources and destinations in the table
4529 : of available values. */
4530 :
4531 : static void
4532 390269249 : cse_insn (rtx_insn *insn)
4533 : {
4534 390269249 : rtx x = PATTERN (insn);
4535 390269249 : int i;
4536 390269249 : rtx tem;
4537 390269249 : int n_sets = 0;
4538 :
4539 390269249 : rtx src_eqv = 0;
4540 390269249 : struct table_elt *src_eqv_elt = 0;
4541 390269249 : int src_eqv_volatile = 0;
4542 390269249 : int src_eqv_in_memory = 0;
4543 390269249 : unsigned src_eqv_hash = 0;
4544 :
4545 390269249 : this_insn = insn;
4546 :
4547 : /* Find all regs explicitly clobbered in this insn,
4548 : to ensure they are not replaced with any other regs
4549 : elsewhere in this insn. */
4550 390269249 : invalidate_from_sets_and_clobbers (insn);
4551 :
4552 : /* Record all the SETs in this instruction. */
4553 390269249 : auto_vec<struct set, 8> sets;
4554 390269249 : n_sets = find_sets_in_insn (insn, (vec<struct set>*)&sets);
4555 :
4556 : /* Substitute the canonical register where possible. */
4557 390269249 : canonicalize_insn (insn, (vec<struct set>*)&sets);
4558 :
4559 : /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4560 : if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4561 : latter condition is necessary because SRC_EQV is handled specially for
4562 : this case, and if it isn't set, then there will be no equivalence
4563 : for the destination. */
4564 190676373 : if (n_sets == 1 && REG_NOTES (insn) != 0
4565 513237407 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4566 : {
4567 :
4568 8426280 : if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT
4569 8426280 : && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4570 16719 : || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4571 8409561 : src_eqv = copy_rtx (XEXP (tem, 0));
4572 : /* If DEST is of the form ZERO_EXTACT, as in:
4573 : (set (zero_extract:SI (reg:SI 119)
4574 : (const_int 16 [0x10])
4575 : (const_int 16 [0x10]))
4576 : (const_int 51154 [0xc7d2]))
4577 : REG_EQUAL note will specify the value of register (reg:SI 119) at this
4578 : point. Note that this is different from SRC_EQV. We can however
4579 : calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4580 16719 : else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
4581 0 : && CONST_INT_P (XEXP (tem, 0))
4582 0 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
4583 16719 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
4584 : {
4585 0 : rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
4586 : /* This is the mode of XEXP (tem, 0) as well. */
4587 0 : scalar_int_mode dest_mode
4588 0 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
4589 0 : rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
4590 0 : rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
4591 0 : HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
4592 0 : HOST_WIDE_INT mask;
4593 0 : unsigned int shift;
4594 0 : if (BITS_BIG_ENDIAN)
4595 : shift = (GET_MODE_PRECISION (dest_mode)
4596 : - INTVAL (pos) - INTVAL (width));
4597 : else
4598 0 : shift = INTVAL (pos);
4599 0 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
4600 : mask = HOST_WIDE_INT_M1;
4601 : else
4602 0 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
4603 0 : val = (val >> shift) & mask;
4604 0 : src_eqv = GEN_INT (val);
4605 : }
4606 : }
4607 :
4608 : /* Set sets[i].src_elt to the class each source belongs to.
4609 : Detect assignments from or to volatile things
4610 : and set set[i] to zero so they will be ignored
4611 : in the rest of this function.
4612 :
4613 : Nothing in this loop changes the hash table or the register chains. */
4614 :
4615 583725185 : for (i = 0; i < n_sets; i++)
4616 : {
4617 193455936 : bool repeat = false;
4618 193455936 : bool noop_insn = false;
4619 193455936 : rtx src, dest;
4620 193455936 : rtx src_folded;
4621 193455936 : struct table_elt *elt = 0, *p;
4622 193455936 : machine_mode mode;
4623 193455936 : rtx src_eqv_here;
4624 193455936 : rtx src_const = 0;
4625 193455936 : rtx src_related = 0;
4626 193455936 : rtx dest_related = 0;
4627 193455936 : bool src_related_is_const_anchor = false;
4628 193455936 : struct table_elt *src_const_elt = 0;
4629 193455936 : int src_cost = MAX_COST;
4630 193455936 : int src_eqv_cost = MAX_COST;
4631 193455936 : int src_folded_cost = MAX_COST;
4632 193455936 : int src_related_cost = MAX_COST;
4633 193455936 : int src_elt_cost = MAX_COST;
4634 193455936 : int src_regcost = MAX_COST;
4635 193455936 : int src_eqv_regcost = MAX_COST;
4636 193455936 : int src_folded_regcost = MAX_COST;
4637 193455936 : int src_related_regcost = MAX_COST;
4638 193455936 : int src_elt_regcost = MAX_COST;
4639 193455936 : scalar_int_mode int_mode;
4640 193455936 : bool is_fake_set = sets[i].is_fake_set;
4641 :
4642 193455936 : dest = SET_DEST (sets[i].rtl);
4643 193455936 : src = SET_SRC (sets[i].rtl);
4644 :
4645 : /* If SRC is a constant that has no machine mode,
4646 : hash it with the destination's machine mode.
4647 : This way we can keep different modes separate. */
4648 :
4649 193455936 : mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4650 193455936 : sets[i].mode = mode;
4651 :
4652 193455936 : if (!is_fake_set && src_eqv)
4653 : {
4654 8409561 : machine_mode eqvmode = mode;
4655 8409561 : if (GET_CODE (dest) == STRICT_LOW_PART)
4656 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4657 8409561 : do_not_record = 0;
4658 8409561 : hash_arg_in_memory = 0;
4659 8409561 : src_eqv_hash = HASH (src_eqv, eqvmode);
4660 :
4661 : /* Find the equivalence class for the equivalent expression. */
4662 :
4663 8409561 : if (!do_not_record)
4664 8407327 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4665 :
4666 8409561 : src_eqv_volatile = do_not_record;
4667 8409561 : src_eqv_in_memory = hash_arg_in_memory;
4668 : }
4669 :
4670 : /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4671 : value of the INNER register, not the destination. So it is not
4672 : a valid substitution for the source. But save it for later. */
4673 193455936 : if (is_fake_set || GET_CODE (dest) == STRICT_LOW_PART)
4674 : src_eqv_here = 0;
4675 : else
4676 193455936 : src_eqv_here = src_eqv;
4677 :
4678 : /* Simplify and foldable subexpressions in SRC. Then get the fully-
4679 : simplified result, which may not necessarily be valid. */
4680 193455936 : src_folded = fold_rtx (src, NULL);
4681 :
4682 : #if 0
4683 : /* ??? This caused bad code to be generated for the m68k port with -O2.
4684 : Suppose src is (CONST_INT -1), and that after truncation src_folded
4685 : is (CONST_INT 3). Suppose src_folded is then used for src_const.
4686 : At the end we will add src and src_const to the same equivalence
4687 : class. We now have 3 and -1 on the same equivalence class. This
4688 : causes later instructions to be mis-optimized. */
4689 : /* If storing a constant in a bitfield, pre-truncate the constant
4690 : so we will be able to record it later. */
4691 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4692 : {
4693 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4694 :
4695 : if (CONST_INT_P (src)
4696 : && CONST_INT_P (width)
4697 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4698 : && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4699 : src_folded
4700 : = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1
4701 : << INTVAL (width)) - 1));
4702 : }
4703 : #endif
4704 :
4705 : /* Compute SRC's hash code, and also notice if it
4706 : should not be recorded at all. In that case,
4707 : prevent any further processing of this assignment.
4708 :
4709 : We set DO_NOT_RECORD if the destination has a REG_UNUSED note.
4710 : This avoids getting the source register into the tables, where it
4711 : may be invalidated later (via REG_QTY), then trigger an ICE upon
4712 : re-insertion.
4713 :
4714 : This is only a problem in multi-set insns. If it were a single
4715 : set the dead copy would have been removed. If the RHS were anything
4716 : but a simple REG, then we won't call insert_regs and thus there's
4717 : no potential for triggering the ICE. */
4718 386911872 : do_not_record = (REG_P (dest)
4719 143242751 : && REG_P (src)
4720 227269348 : && find_reg_note (insn, REG_UNUSED, dest));
4721 193455936 : hash_arg_in_memory = 0;
4722 :
4723 193455936 : sets[i].src = src;
4724 193455936 : sets[i].src_hash = HASH (src, mode);
4725 193455936 : sets[i].src_volatile = do_not_record;
4726 193455936 : sets[i].src_in_memory = hash_arg_in_memory;
4727 :
4728 : /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4729 : a pseudo, do not record SRC. Using SRC as a replacement for
4730 : anything else will be incorrect in that situation. Note that
4731 : this usually occurs only for stack slots, in which case all the
4732 : RTL would be referring to SRC, so we don't lose any optimization
4733 : opportunities by not having SRC in the hash table. */
4734 :
4735 193455936 : if (MEM_P (src)
4736 24978266 : && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4737 918171 : && REG_P (dest)
4738 194374107 : && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4739 918171 : sets[i].src_volatile = 1;
4740 :
4741 192537765 : else if (GET_CODE (src) == ASM_OPERANDS
4742 199633 : && GET_CODE (x) == PARALLEL)
4743 : {
4744 : /* Do not record result of a non-volatile inline asm with
4745 : more than one result. */
4746 199609 : if (n_sets > 1)
4747 156565 : sets[i].src_volatile = 1;
4748 :
4749 199609 : int j, lim = XVECLEN (x, 0);
4750 1022359 : for (j = 0; j < lim; j++)
4751 : {
4752 824536 : rtx y = XVECEXP (x, 0, j);
4753 : /* And do not record result of a non-volatile inline asm
4754 : with "memory" clobber. */
4755 824536 : if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0)))
4756 : {
4757 1786 : sets[i].src_volatile = 1;
4758 1786 : break;
4759 : }
4760 : }
4761 : }
4762 :
4763 : #if 0
4764 : /* It is no longer clear why we used to do this, but it doesn't
4765 : appear to still be needed. So let's try without it since this
4766 : code hurts cse'ing widened ops. */
4767 : /* If source is a paradoxical subreg (such as QI treated as an SI),
4768 : treat it as volatile. It may do the work of an SI in one context
4769 : where the extra bits are not being used, but cannot replace an SI
4770 : in general. */
4771 : if (paradoxical_subreg_p (src))
4772 : sets[i].src_volatile = 1;
4773 : #endif
4774 :
4775 : /* Locate all possible equivalent forms for SRC. Try to replace
4776 : SRC in the insn with each cheaper equivalent.
4777 :
4778 : We have the following types of equivalents: SRC itself, a folded
4779 : version, a value given in a REG_EQUAL note, or a value related
4780 : to a constant.
4781 :
4782 : Each of these equivalents may be part of an additional class
4783 : of equivalents (if more than one is in the table, they must be in
4784 : the same class; we check for this).
4785 :
4786 : If the source is volatile, we don't do any table lookups.
4787 :
4788 : We note any constant equivalent for possible later use in a
4789 : REG_NOTE. */
4790 :
4791 193455936 : if (!sets[i].src_volatile)
4792 159329257 : elt = lookup (src, sets[i].src_hash, mode);
4793 :
4794 193455936 : sets[i].src_elt = elt;
4795 :
4796 193455936 : if (elt && src_eqv_here && src_eqv_elt)
4797 : {
4798 2823538 : if (elt->first_same_value != src_eqv_elt->first_same_value)
4799 : {
4800 : /* The REG_EQUAL is indicating that two formerly distinct
4801 : classes are now equivalent. So merge them. */
4802 9555 : merge_equiv_classes (elt, src_eqv_elt);
4803 9555 : src_eqv_hash = HASH (src_eqv, elt->mode);
4804 9555 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4805 : }
4806 :
4807 9555 : src_eqv_here = 0;
4808 : }
4809 :
4810 190435813 : else if (src_eqv_elt)
4811 : elt = src_eqv_elt;
4812 :
4813 : /* Try to find a constant somewhere and record it in `src_const'.
4814 : Record its table element, if any, in `src_const_elt'. Look in
4815 : any known equivalences first. (If the constant is not in the
4816 : table, also set `sets[i].src_const_hash'). */
4817 190273458 : if (elt)
4818 90887455 : for (p = elt->first_same_value; p; p = p->next_same_value)
4819 72806213 : if (p->is_const)
4820 : {
4821 15780103 : src_const = p->exp;
4822 15780103 : src_const_elt = elt;
4823 15780103 : break;
4824 : }
4825 :
4826 33861345 : if (src_const == 0
4827 177675833 : && (CONSTANT_P (src_folded)
4828 : /* Consider (minus (label_ref L1) (label_ref L2)) as
4829 : "constant" here so we will record it. This allows us
4830 : to fold switch statements when an ADDR_DIFF_VEC is used. */
4831 151543270 : || (GET_CODE (src_folded) == MINUS
4832 1781763 : && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4833 95 : && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4834 : src_const = src_folded, src_const_elt = elt;
4835 167323287 : else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4836 410236 : src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4837 :
4838 : /* If we don't know if the constant is in the table, get its
4839 : hash code and look it up. */
4840 193455936 : if (src_const && src_const_elt == 0)
4841 : {
4842 26542673 : sets[i].src_const_hash = HASH (src_const, mode);
4843 26542673 : src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4844 : }
4845 :
4846 193455936 : sets[i].src_const = src_const;
4847 193455936 : sets[i].src_const_elt = src_const_elt;
4848 :
4849 : /* If the constant and our source are both in the table, mark them as
4850 : equivalent. Otherwise, if a constant is in the table but the source
4851 : isn't, set ELT to it. */
4852 193455936 : if (src_const_elt && elt
4853 15780315 : && src_const_elt->first_same_value != elt->first_same_value)
4854 0 : merge_equiv_classes (elt, src_const_elt);
4855 193455936 : else if (src_const_elt && elt == 0)
4856 193455936 : elt = src_const_elt;
4857 :
4858 : /* See if there is a register linearly related to a constant
4859 : equivalent of SRC. */
4860 193455936 : if (src_const
4861 42322988 : && (GET_CODE (src_const) == CONST
4862 41692343 : || (src_const_elt && src_const_elt->related_value != 0)))
4863 : {
4864 725717 : src_related = use_related_value (src_const, src_const_elt);
4865 725717 : if (src_related)
4866 : {
4867 230972 : struct table_elt *src_related_elt
4868 230972 : = lookup (src_related, HASH (src_related, mode), mode);
4869 230972 : if (src_related_elt && elt)
4870 : {
4871 1647 : if (elt->first_same_value
4872 1647 : != src_related_elt->first_same_value)
4873 : /* This can occur when we previously saw a CONST
4874 : involving a SYMBOL_REF and then see the SYMBOL_REF
4875 : twice. Merge the involved classes. */
4876 863 : merge_equiv_classes (elt, src_related_elt);
4877 :
4878 : src_related = 0;
4879 193455936 : src_related_elt = 0;
4880 : }
4881 229325 : else if (src_related_elt && elt == 0)
4882 7427 : elt = src_related_elt;
4883 : }
4884 : }
4885 :
4886 : /* See if we have a CONST_INT that is already in a register in a
4887 : wider mode. */
4888 :
4889 42093663 : if (src_const && src_related == 0 && CONST_INT_P (src_const)
4890 18458938 : && is_int_mode (mode, &int_mode)
4891 213909283 : && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD)
4892 : {
4893 7911390 : opt_scalar_int_mode wider_mode_iter;
4894 20370568 : FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode)
4895 : {
4896 20370568 : scalar_int_mode wider_mode = wider_mode_iter.require ();
4897 21099611 : if (GET_MODE_PRECISION (wider_mode) > BITS_PER_WORD)
4898 : break;
4899 :
4900 12687184 : struct table_elt *const_elt
4901 12687184 : = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4902 :
4903 12687184 : if (const_elt == 0)
4904 12019455 : continue;
4905 :
4906 667729 : for (const_elt = const_elt->first_same_value;
4907 2056402 : const_elt; const_elt = const_elt->next_same_value)
4908 1616679 : if (REG_P (const_elt->exp))
4909 : {
4910 228006 : src_related = gen_lowpart (int_mode, const_elt->exp);
4911 228006 : break;
4912 : }
4913 :
4914 667729 : if (src_related != 0)
4915 : break;
4916 : }
4917 : }
4918 :
4919 : /* Another possibility is that we have an AND with a constant in
4920 : a mode narrower than a word. If so, it might have been generated
4921 : as part of an "if" which would narrow the AND. If we already
4922 : have done the AND in a wider mode, we can use a SUBREG of that
4923 : value. */
4924 :
4925 189242697 : if (flag_expensive_optimizations && ! src_related
4926 322711520 : && is_a <scalar_int_mode> (mode, &int_mode)
4927 129255584 : && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4928 195001606 : && GET_MODE_SIZE (int_mode) < UNITS_PER_WORD)
4929 : {
4930 1036121 : opt_scalar_int_mode tmode_iter;
4931 1036121 : rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4932 :
4933 2856213 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4934 : {
4935 2856213 : scalar_int_mode tmode = tmode_iter.require ();
4936 5853572 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4937 : break;
4938 :
4939 1820149 : rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4940 1820149 : struct table_elt *larger_elt;
4941 :
4942 1820149 : if (inner)
4943 : {
4944 1816495 : PUT_MODE (new_and, tmode);
4945 1816495 : XEXP (new_and, 0) = inner;
4946 1816495 : larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4947 1816495 : if (larger_elt == 0)
4948 1816438 : continue;
4949 :
4950 57 : for (larger_elt = larger_elt->first_same_value;
4951 57 : larger_elt; larger_elt = larger_elt->next_same_value)
4952 57 : if (REG_P (larger_elt->exp))
4953 : {
4954 57 : src_related
4955 57 : = gen_lowpart (int_mode, larger_elt->exp);
4956 57 : break;
4957 : }
4958 :
4959 57 : if (src_related)
4960 : break;
4961 : }
4962 : }
4963 : }
4964 :
4965 : /* See if a MEM has already been loaded with a widening operation;
4966 : if it has, we can use a subreg of that. Many CISC machines
4967 : also have such operations, but this is only likely to be
4968 : beneficial on these machines. */
4969 :
4970 193455936 : rtx_code extend_op;
4971 193455936 : if (flag_expensive_optimizations && src_related == 0
4972 : && MEM_P (src) && ! do_not_record
4973 : && is_a <scalar_int_mode> (mode, &int_mode)
4974 : && (extend_op = load_extend_op (int_mode)) != UNKNOWN)
4975 : {
4976 : #if GCC_VERSION >= 5000
4977 : struct rtx_def memory_extend_buf;
4978 : rtx memory_extend_rtx = &memory_extend_buf;
4979 : #else
4980 : /* Workaround GCC < 5 bug, fixed in r5-3834 as part of PR63362
4981 : fix. */
4982 : alignas (rtx_def) unsigned char memory_extended_buf[sizeof (rtx_def)];
4983 : rtx memory_extend_rtx = (rtx) &memory_extended_buf[0];
4984 : #endif
4985 :
4986 : /* Set what we are trying to extend and the operation it might
4987 : have been extended with. */
4988 : memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
4989 : PUT_CODE (memory_extend_rtx, extend_op);
4990 : XEXP (memory_extend_rtx, 0) = src;
4991 :
4992 : opt_scalar_int_mode tmode_iter;
4993 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4994 : {
4995 : struct table_elt *larger_elt;
4996 :
4997 : scalar_int_mode tmode = tmode_iter.require ();
4998 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4999 : break;
5000 :
5001 : PUT_MODE (memory_extend_rtx, tmode);
5002 : larger_elt = lookup (memory_extend_rtx,
5003 : HASH (memory_extend_rtx, tmode), tmode);
5004 : if (larger_elt == 0)
5005 : continue;
5006 :
5007 : for (larger_elt = larger_elt->first_same_value;
5008 : larger_elt; larger_elt = larger_elt->next_same_value)
5009 : if (REG_P (larger_elt->exp))
5010 : {
5011 : src_related = gen_lowpart (int_mode, larger_elt->exp);
5012 : break;
5013 : }
5014 :
5015 : if (src_related)
5016 : break;
5017 : }
5018 : }
5019 :
5020 : /* Try to express the constant using a register+offset expression
5021 : derived from a constant anchor. */
5022 :
5023 193455936 : if (targetm.const_anchor
5024 0 : && !src_related
5025 0 : && src_const
5026 0 : && GET_CODE (src_const) == CONST_INT)
5027 : {
5028 0 : src_related = try_const_anchors (src_const, mode);
5029 0 : src_related_is_const_anchor = src_related != NULL_RTX;
5030 : }
5031 :
5032 : /* Try to re-materialize a vec_dup with an existing constant. */
5033 193455936 : rtx src_elt;
5034 5586023 : if ((!src_eqv_here || CONSTANT_P (src_eqv_here))
5035 193455936 : && const_vec_duplicate_p (src, &src_elt))
5036 : {
5037 649559 : machine_mode const_mode = GET_MODE_INNER (GET_MODE (src));
5038 649559 : struct table_elt *related_elt
5039 649559 : = lookup (src_elt, HASH (src_elt, const_mode), const_mode);
5040 649559 : if (related_elt)
5041 : {
5042 269581 : for (related_elt = related_elt->first_same_value;
5043 1772895 : related_elt; related_elt = related_elt->next_same_value)
5044 1538140 : if (REG_P (related_elt->exp))
5045 : {
5046 : /* We don't need to compare costs with an existing (constant)
5047 : src_eqv_here, since any such src_eqv_here should already be
5048 : available in src_const. */
5049 34826 : src_eqv_here
5050 34826 : = gen_rtx_VEC_DUPLICATE (GET_MODE (src),
5051 : related_elt->exp);
5052 34826 : break;
5053 : }
5054 : }
5055 : }
5056 :
5057 193455936 : if (src == src_folded)
5058 189140005 : src_folded = 0;
5059 :
5060 : /* At this point, ELT, if nonzero, points to a class of expressions
5061 : equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5062 : and SRC_RELATED, if nonzero, each contain additional equivalent
5063 : expressions. Prune these latter expressions by deleting expressions
5064 : already in the equivalence class.
5065 :
5066 : Check for an equivalent identical to the destination. If found,
5067 : this is the preferred equivalent since it will likely lead to
5068 : elimination of the insn. Indicate this by placing it in
5069 : `src_related'. */
5070 :
5071 193455936 : if (elt)
5072 33929952 : elt = elt->first_same_value;
5073 290691892 : for (p = elt; p; p = p->next_same_value)
5074 : {
5075 97235956 : enum rtx_code code = GET_CODE (p->exp);
5076 :
5077 : /* If the expression is not valid, ignore it. Then we do not
5078 : have to check for validity below. In most cases, we can use
5079 : `rtx_equal_p', since canonicalization has already been done. */
5080 97235956 : if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5081 4017 : continue;
5082 :
5083 : /* Also skip paradoxical subregs, unless that's what we're
5084 : looking for. */
5085 97231939 : if (paradoxical_subreg_p (p->exp)
5086 2379168 : && ! (src != 0
5087 3296 : && GET_CODE (src) == SUBREG
5088 3296 : && GET_MODE (src) == GET_MODE (p->exp)
5089 3296 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5090 : GET_MODE (SUBREG_REG (p->exp)))))
5091 3500 : continue;
5092 :
5093 97228439 : if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5094 : src = 0;
5095 2167848 : else if (src_folded && GET_CODE (src_folded) == code
5096 64289319 : && rtx_equal_p (src_folded, p->exp))
5097 : src_folded = 0;
5098 727200 : else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5099 63498163 : && rtx_equal_p (src_eqv_here, p->exp))
5100 : src_eqv_here = 0;
5101 929698 : else if (src_related && GET_CODE (src_related) == code
5102 62966949 : && rtx_equal_p (src_related, p->exp))
5103 : src_related = 0;
5104 :
5105 : /* This is the same as the destination of the insns, we want
5106 : to prefer it. The code below will then give it a negative
5107 : cost. */
5108 97228439 : if (!dest_related
5109 97228439 : && GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5110 213378 : dest_related = p->exp;
5111 : }
5112 :
5113 : /* Find the cheapest valid equivalent, trying all the available
5114 : possibilities. Prefer items not in the hash table to ones
5115 : that are when they are equal cost. Note that we can never
5116 : worsen an insn as the current contents will also succeed.
5117 : If we find an equivalent identical to the destination, use it as best,
5118 : since this insn will probably be eliminated in that case. */
5119 193455936 : if (src)
5120 : {
5121 159974539 : if (rtx_equal_p (src, dest))
5122 : src_cost = src_regcost = -1;
5123 : else
5124 : {
5125 159974533 : src_cost = COST (src, mode);
5126 159974533 : src_regcost = approx_reg_cost (src);
5127 : }
5128 : }
5129 :
5130 193455936 : if (src_eqv_here)
5131 : {
5132 5328505 : if (rtx_equal_p (src_eqv_here, dest))
5133 : src_eqv_cost = src_eqv_regcost = -1;
5134 : else
5135 : {
5136 5328505 : src_eqv_cost = COST (src_eqv_here, mode);
5137 5328505 : src_eqv_regcost = approx_reg_cost (src_eqv_here);
5138 : }
5139 : }
5140 :
5141 193455936 : if (src_folded)
5142 : {
5143 3774367 : if (rtx_equal_p (src_folded, dest))
5144 : src_folded_cost = src_folded_regcost = -1;
5145 : else
5146 : {
5147 3762835 : src_folded_cost = COST (src_folded, mode);
5148 3762835 : src_folded_regcost = approx_reg_cost (src_folded);
5149 : }
5150 : }
5151 :
5152 193455936 : if (dest_related)
5153 : {
5154 : src_related_cost = src_related_regcost = -1;
5155 : /* Handle it as src_related. */
5156 : src_related = dest_related;
5157 : }
5158 193242558 : else if (src_related)
5159 : {
5160 455912 : src_related_cost = COST (src_related, mode);
5161 455912 : src_related_regcost = approx_reg_cost (src_related);
5162 :
5163 : /* If a const-anchor is used to synthesize a constant that
5164 : normally requires multiple instructions then slightly prefer
5165 : it over the original sequence. These instructions are likely
5166 : to become redundant now. We can't compare against the cost
5167 : of src_eqv_here because, on MIPS for example, multi-insn
5168 : constants have zero cost; they are assumed to be hoisted from
5169 : loops. */
5170 455912 : if (src_related_is_const_anchor
5171 455912 : && src_related_cost == src_cost
5172 0 : && src_eqv_here)
5173 0 : src_related_cost--;
5174 : }
5175 :
5176 : /* If this was an indirect jump insn, a known label will really be
5177 : cheaper even though it looks more expensive. */
5178 193455936 : if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5179 193455936 : src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5180 :
5181 : /* Terminate loop when replacement made. This must terminate since
5182 : the current contents will be tested and will always be valid. */
5183 198680605 : while (!is_fake_set)
5184 : {
5185 : rtx trial;
5186 :
5187 : /* Skip invalid entries. */
5188 34873792 : while (elt && !REG_P (elt->exp)
5189 206654302 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5190 20 : elt = elt->next_same_value;
5191 :
5192 : /* A paradoxical subreg would be bad here: it'll be the right
5193 : size, but later may be adjusted so that the upper bits aren't
5194 : what we want. So reject it. */
5195 198036353 : if (elt != 0
5196 34873772 : && paradoxical_subreg_p (elt->exp)
5197 : /* It is okay, though, if the rtx we're trying to match
5198 : will ignore any of the bits we can't predict. */
5199 198037753 : && ! (src != 0
5200 1400 : && GET_CODE (src) == SUBREG
5201 1400 : && GET_MODE (src) == GET_MODE (elt->exp)
5202 1400 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5203 : GET_MODE (SUBREG_REG (elt->exp)))))
5204 : {
5205 1400 : elt = elt->next_same_value;
5206 1400 : continue;
5207 : }
5208 :
5209 198033553 : if (elt)
5210 : {
5211 34872372 : src_elt_cost = elt->cost;
5212 34872372 : src_elt_regcost = elt->regcost;
5213 : }
5214 :
5215 : /* Find cheapest and skip it for the next time. For items
5216 : of equal cost, use this order:
5217 : src_folded, src, src_eqv, src_related and hash table entry. */
5218 198033553 : if (src_folded
5219 7936202 : && preferable (src_folded_cost, src_folded_regcost,
5220 : src_cost, src_regcost) <= 0
5221 6057023 : && preferable (src_folded_cost, src_folded_regcost,
5222 : src_eqv_cost, src_eqv_regcost) <= 0
5223 5200933 : && preferable (src_folded_cost, src_folded_regcost,
5224 : src_related_cost, src_related_regcost) <= 0
5225 203231578 : && preferable (src_folded_cost, src_folded_regcost,
5226 : src_elt_cost, src_elt_regcost) <= 0)
5227 : trial = src_folded, src_folded_cost = MAX_COST;
5228 193292621 : else if (src
5229 158905000 : && preferable (src_cost, src_regcost,
5230 : src_eqv_cost, src_eqv_regcost) <= 0
5231 157384930 : && preferable (src_cost, src_regcost,
5232 : src_related_cost, src_related_regcost) <= 0
5233 350651773 : && preferable (src_cost, src_regcost,
5234 : src_elt_cost, src_elt_regcost) <= 0)
5235 : trial = src, src_cost = MAX_COST;
5236 36003082 : else if (src_eqv_here
5237 1722286 : && preferable (src_eqv_cost, src_eqv_regcost,
5238 : src_related_cost, src_related_regcost) <= 0
5239 37724623 : && preferable (src_eqv_cost, src_eqv_regcost,
5240 : src_elt_cost, src_elt_regcost) <= 0)
5241 : trial = src_eqv_here, src_eqv_cost = MAX_COST;
5242 34486620 : else if (src_related
5243 34486620 : && preferable (src_related_cost, src_related_regcost,
5244 : src_elt_cost, src_elt_regcost) <= 0)
5245 : trial = src_related, src_related_cost = MAX_COST;
5246 : else
5247 : {
5248 34256069 : trial = elt->exp;
5249 34256069 : elt = elt->next_same_value;
5250 34256069 : src_elt_cost = MAX_COST;
5251 : }
5252 :
5253 : /* Try to optimize
5254 : (set (reg:M N) (const_int A))
5255 : (set (reg:M2 O) (const_int B))
5256 : (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5257 : (reg:M2 O)). */
5258 198033553 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5259 3893 : && CONST_INT_P (trial)
5260 720 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5261 720 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5262 569 : && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5263 105 : && (known_ge
5264 : (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))),
5265 : INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))))
5266 198033553 : && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5267 105 : + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5268 : <= HOST_BITS_PER_WIDE_INT))
5269 : {
5270 105 : rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5271 105 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5272 105 : rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5273 105 : unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5274 105 : struct table_elt *dest_elt
5275 105 : = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5276 105 : rtx dest_cst = NULL;
5277 :
5278 105 : if (dest_elt)
5279 153 : for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5280 104 : if (p->is_const && CONST_INT_P (p->exp))
5281 : {
5282 : dest_cst = p->exp;
5283 : break;
5284 : }
5285 57 : if (dest_cst)
5286 : {
5287 8 : HOST_WIDE_INT val = INTVAL (dest_cst);
5288 8 : HOST_WIDE_INT mask;
5289 8 : unsigned int shift;
5290 : /* This is the mode of DEST_CST as well. */
5291 8 : scalar_int_mode dest_mode
5292 8 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
5293 8 : if (BITS_BIG_ENDIAN)
5294 : shift = GET_MODE_PRECISION (dest_mode)
5295 : - INTVAL (pos) - INTVAL (width);
5296 : else
5297 8 : shift = INTVAL (pos);
5298 8 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5299 : mask = HOST_WIDE_INT_M1;
5300 : else
5301 8 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
5302 8 : val &= ~(mask << shift);
5303 8 : val |= (INTVAL (trial) & mask) << shift;
5304 8 : val = trunc_int_for_mode (val, dest_mode);
5305 8 : validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5306 : dest_reg, 1);
5307 8 : validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5308 : GEN_INT (val), 1);
5309 8 : if (apply_change_group ())
5310 : {
5311 8 : rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5312 8 : if (note)
5313 : {
5314 0 : remove_note (insn, note);
5315 0 : df_notes_rescan (insn);
5316 : }
5317 8 : src_eqv = NULL_RTX;
5318 8 : src_eqv_elt = NULL;
5319 8 : src_eqv_volatile = 0;
5320 8 : src_eqv_in_memory = 0;
5321 8 : src_eqv_hash = 0;
5322 8 : repeat = true;
5323 8 : break;
5324 : }
5325 : }
5326 : }
5327 :
5328 : /* We don't normally have an insn matching (set (pc) (pc)), so
5329 : check for this separately here. We will delete such an
5330 : insn below.
5331 :
5332 : For other cases such as a table jump or conditional jump
5333 : where we know the ultimate target, go ahead and replace the
5334 : operand. While that may not make a valid insn, we will
5335 : reemit the jump below (and also insert any necessary
5336 : barriers). */
5337 195493156 : if (n_sets == 1 && dest == pc_rtx
5338 218215051 : && (trial == pc_rtx
5339 20170162 : || (GET_CODE (trial) == LABEL_REF
5340 5263 : && ! condjump_p (insn))))
5341 : {
5342 : /* Don't substitute non-local labels, this confuses CFG. */
5343 13961 : if (GET_CODE (trial) == LABEL_REF
5344 12653 : && LABEL_REF_NONLOCAL_P (trial))
5345 1308 : continue;
5346 :
5347 11345 : SET_SRC (sets[i].rtl) = trial;
5348 11345 : cse_jumps_altered = true;
5349 11345 : break;
5350 : }
5351 :
5352 : /* Similarly, lots of targets don't allow no-op
5353 : (set (mem x) (mem x)) moves. Even (set (reg x) (reg x))
5354 : might be impossible for certain registers (like CC registers). */
5355 198020892 : else if (n_sets == 1
5356 195480503 : && !CALL_P (insn)
5357 194991526 : && (MEM_P (trial) || REG_P (trial))
5358 78811190 : && rtx_equal_p (trial, dest)
5359 202253 : && !side_effects_p (dest)
5360 202249 : && (cfun->can_delete_dead_exceptions
5361 46637 : || insn_nothrow_p (insn))
5362 : /* We can only remove the later store if the earlier aliases
5363 : at least all accesses the later one. */
5364 198212580 : && (!MEM_P (trial)
5365 22485 : || ((MEM_ALIAS_SET (dest) == MEM_ALIAS_SET (trial)
5366 8592 : || alias_set_subset_of (MEM_ALIAS_SET (dest),
5367 8592 : MEM_ALIAS_SET (trial)))
5368 14200 : && (!MEM_EXPR (trial)
5369 13297 : || refs_same_for_tbaa_p (MEM_EXPR (trial),
5370 13297 : MEM_EXPR (dest))))))
5371 : {
5372 182239 : SET_SRC (sets[i].rtl) = trial;
5373 182239 : noop_insn = true;
5374 182239 : break;
5375 : }
5376 :
5377 : /* Reject certain invalid forms of CONST that we create. */
5378 197838653 : else if (CONSTANT_P (trial)
5379 32389195 : && GET_CODE (trial) == CONST
5380 : /* Reject cases that will cause decode_rtx_const to
5381 : die. On the alpha when simplifying a switch, we
5382 : get (const (truncate (minus (label_ref)
5383 : (label_ref)))). */
5384 565956 : && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5385 : /* Likewise on IA-64, except without the
5386 : truncate. */
5387 565956 : || (GET_CODE (XEXP (trial, 0)) == MINUS
5388 0 : && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5389 0 : && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5390 : /* Do nothing for this case. */
5391 : ;
5392 :
5393 : /* Do not replace anything with a MEM, except the replacement
5394 : is a no-op. This allows this loop to terminate. */
5395 197838653 : else if (MEM_P (trial) && !rtx_equal_p (trial, SET_SRC(sets[i].rtl)))
5396 : /* Do nothing for this case. */
5397 : ;
5398 :
5399 : /* Look for a substitution that makes a valid insn. */
5400 197740567 : else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5401 : trial, 0))
5402 : {
5403 192616692 : rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5404 :
5405 : /* The result of apply_change_group can be ignored; see
5406 : canon_reg. */
5407 :
5408 192616692 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5409 192616692 : apply_change_group ();
5410 :
5411 192616692 : break;
5412 : }
5413 :
5414 : /* If the current function uses a constant pool and this is a
5415 : constant, try making a pool entry. Put it in src_folded
5416 : unless we already have done this since that is where it
5417 : likely came from. */
5418 :
5419 5123875 : else if (crtl->uses_const_pool
5420 3747181 : && CONSTANT_P (trial)
5421 2750437 : && !CONST_INT_P (trial)
5422 2732074 : && (src_folded == 0 || !MEM_P (src_folded))
5423 1887325 : && GET_MODE_CLASS (mode) != MODE_CC
5424 1887325 : && mode != VOIDmode)
5425 : {
5426 1887325 : src_folded = force_const_mem (mode, trial);
5427 1887325 : if (src_folded)
5428 : {
5429 1886678 : src_folded_cost = COST (src_folded, mode);
5430 1886678 : src_folded_regcost = approx_reg_cost (src_folded);
5431 : }
5432 : }
5433 : }
5434 :
5435 : /* If we changed the insn too much, handle this set from scratch. */
5436 192810276 : if (repeat)
5437 : {
5438 8 : i--;
5439 8 : continue;
5440 : }
5441 :
5442 193455928 : src = SET_SRC (sets[i].rtl);
5443 :
5444 : /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5445 : However, there is an important exception: If both are registers
5446 : that are not the head of their equivalence class, replace SET_SRC
5447 : with the head of the class. If we do not do this, we will have
5448 : both registers live over a portion of the basic block. This way,
5449 : their lifetimes will likely abut instead of overlapping. */
5450 193455928 : if (!is_fake_set
5451 192810276 : && REG_P (dest)
5452 336698679 : && REGNO_QTY_VALID_P (REGNO (dest)))
5453 : {
5454 7983291 : int dest_q = REG_QTY (REGNO (dest));
5455 7983291 : struct qty_table_elem *dest_ent = &qty_table[dest_q];
5456 :
5457 7983291 : if (dest_ent->mode == GET_MODE (dest)
5458 6154161 : && dest_ent->first_reg != REGNO (dest)
5459 110903 : && REG_P (src) && REGNO (src) == REGNO (dest)
5460 : /* Don't do this if the original insn had a hard reg as
5461 : SET_SRC or SET_DEST. */
5462 5685 : && (!REG_P (sets[i].src)
5463 4218 : || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5464 7988964 : && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5465 : /* We can't call canon_reg here because it won't do anything if
5466 : SRC is a hard register. */
5467 : {
5468 5673 : int src_q = REG_QTY (REGNO (src));
5469 5673 : struct qty_table_elem *src_ent = &qty_table[src_q];
5470 5673 : int first = src_ent->first_reg;
5471 5673 : rtx new_src
5472 : = (first >= FIRST_PSEUDO_REGISTER
5473 5673 : ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5474 :
5475 : /* We must use validate-change even for this, because this
5476 : might be a special no-op instruction, suitable only to
5477 : tag notes onto. */
5478 5673 : if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5479 : {
5480 5673 : src = new_src;
5481 : /* If we had a constant that is cheaper than what we are now
5482 : setting SRC to, use that constant. We ignored it when we
5483 : thought we could make this into a no-op. */
5484 2066 : if (src_const && COST (src_const, mode) < COST (src, mode)
5485 5673 : && validate_change (insn, &SET_SRC (sets[i].rtl),
5486 : src_const, 0))
5487 : src = src_const;
5488 : }
5489 : }
5490 : }
5491 :
5492 : /* If we made a change, recompute SRC values. */
5493 193455928 : if (src != sets[i].src)
5494 : {
5495 3199384 : do_not_record = 0;
5496 3199384 : hash_arg_in_memory = 0;
5497 3199384 : sets[i].src = src;
5498 3199384 : sets[i].src_hash = HASH (src, mode);
5499 3199384 : sets[i].src_volatile = do_not_record;
5500 3199384 : sets[i].src_in_memory = hash_arg_in_memory;
5501 3199384 : sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5502 : }
5503 :
5504 : /* If this is a single SET, we are setting a register, and we have an
5505 : equivalent constant, we want to add a REG_EQUAL note if the constant
5506 : is different from the source. We don't want to do it for a constant
5507 : pseudo since verifying that this pseudo hasn't been eliminated is a
5508 : pain; moreover such a note won't help anything.
5509 :
5510 : Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5511 : which can be created for a reference to a compile time computable
5512 : entry in a jump table. */
5513 193455928 : if (n_sets == 1
5514 190676373 : && REG_P (dest)
5515 141402366 : && src_const
5516 28728855 : && !REG_P (src_const)
5517 28702873 : && !(GET_CODE (src_const) == SUBREG
5518 0 : && REG_P (SUBREG_REG (src_const)))
5519 28702873 : && !(GET_CODE (src_const) == CONST
5520 379152 : && GET_CODE (XEXP (src_const, 0)) == MINUS
5521 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5522 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)
5523 222158801 : && !rtx_equal_p (src, src_const))
5524 : {
5525 : /* Make sure that the rtx is not shared. */
5526 7332299 : src_const = copy_rtx (src_const);
5527 :
5528 : /* Record the actual constant value in a REG_EQUAL note,
5529 : making a new one if one does not already exist. */
5530 7332299 : set_unique_reg_note (insn, REG_EQUAL, src_const);
5531 7332299 : df_notes_rescan (insn);
5532 : }
5533 :
5534 : /* Now deal with the destination. */
5535 193455928 : do_not_record = 0;
5536 :
5537 : /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5538 193455928 : while (GET_CODE (dest) == SUBREG
5539 193477444 : || GET_CODE (dest) == ZERO_EXTRACT
5540 388493804 : || GET_CODE (dest) == STRICT_LOW_PART)
5541 1564317 : dest = XEXP (dest, 0);
5542 :
5543 193455928 : sets[i].inner_dest = dest;
5544 :
5545 193455928 : if (MEM_P (dest))
5546 : {
5547 : #ifdef PUSH_ROUNDING
5548 : /* Stack pushes invalidate the stack pointer. */
5549 28498591 : rtx addr = XEXP (dest, 0);
5550 28498591 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5551 5509079 : && XEXP (addr, 0) == stack_pointer_rtx)
5552 5509079 : invalidate (stack_pointer_rtx, VOIDmode);
5553 : #endif
5554 28498591 : dest = fold_rtx (dest, insn);
5555 : }
5556 :
5557 : /* Compute the hash code of the destination now,
5558 : before the effects of this instruction are recorded,
5559 : since the register values used in the address computation
5560 : are those before this instruction. */
5561 193455928 : sets[i].dest_hash = HASH (dest, mode);
5562 :
5563 : /* Don't enter a bit-field in the hash table
5564 : because the value in it after the store
5565 : may not equal what was stored, due to truncation. */
5566 :
5567 193455928 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5568 : {
5569 3885 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5570 :
5571 3885 : if (src_const != 0 && CONST_INT_P (src_const)
5572 712 : && CONST_INT_P (width)
5573 712 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5574 712 : && ! (INTVAL (src_const)
5575 712 : & (HOST_WIDE_INT_M1U << INTVAL (width))))
5576 : /* Exception: if the value is constant,
5577 : and it won't be truncated, record it. */
5578 : ;
5579 : else
5580 : {
5581 : /* This is chosen so that the destination will be invalidated
5582 : but no new value will be recorded.
5583 : We must invalidate because sometimes constant
5584 : values can be recorded for bitfields. */
5585 3174 : sets[i].src_elt = 0;
5586 3174 : sets[i].src_volatile = 1;
5587 3174 : src_eqv = 0;
5588 3174 : src_eqv_elt = 0;
5589 : }
5590 : }
5591 :
5592 : /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5593 : the insn. */
5594 193452043 : else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5595 : {
5596 : /* One less use of the label this insn used to jump to. */
5597 11344 : cse_cfg_altered |= delete_insn_and_edges (insn);
5598 11344 : cse_jumps_altered = true;
5599 : /* No more processing for this set. */
5600 11344 : sets[i].rtl = 0;
5601 : }
5602 :
5603 : /* Similarly for no-op moves. */
5604 193440699 : else if (noop_insn)
5605 : {
5606 182239 : if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
5607 0 : cse_cfg_altered = true;
5608 182239 : cse_cfg_altered |= delete_insn_and_edges (insn);
5609 : /* No more processing for this set. */
5610 182239 : sets[i].rtl = 0;
5611 : }
5612 :
5613 : /* If this SET is now setting PC to a label, we know it used to
5614 : be a conditional or computed branch. */
5615 20158451 : else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5616 193262415 : && !LABEL_REF_NONLOCAL_P (src))
5617 : {
5618 : /* We reemit the jump in as many cases as possible just in
5619 : case the form of an unconditional jump is significantly
5620 : different than a computed jump or conditional jump.
5621 :
5622 : If this insn has multiple sets, then reemitting the
5623 : jump is nontrivial. So instead we just force rerecognition
5624 : and hope for the best. */
5625 3955 : if (n_sets == 1)
5626 : {
5627 3955 : rtx_jump_insn *new_rtx;
5628 3955 : rtx note;
5629 :
5630 3955 : rtx_insn *seq = targetm.gen_jump (XEXP (src, 0));
5631 3955 : new_rtx = emit_jump_insn_before (seq, insn);
5632 3955 : JUMP_LABEL (new_rtx) = XEXP (src, 0);
5633 3955 : LABEL_NUSES (XEXP (src, 0))++;
5634 :
5635 : /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5636 3955 : note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5637 3955 : if (note)
5638 : {
5639 0 : XEXP (note, 1) = NULL_RTX;
5640 0 : REG_NOTES (new_rtx) = note;
5641 : }
5642 :
5643 3955 : cse_cfg_altered |= delete_insn_and_edges (insn);
5644 3955 : insn = new_rtx;
5645 : }
5646 : else
5647 0 : INSN_CODE (insn) = -1;
5648 :
5649 : /* Do not bother deleting any unreachable code, let jump do it. */
5650 3955 : cse_jumps_altered = true;
5651 3955 : sets[i].rtl = 0;
5652 : }
5653 :
5654 : /* If destination is volatile, invalidate it and then do no further
5655 : processing for this assignment. */
5656 :
5657 193254505 : else if (do_not_record)
5658 : {
5659 54732781 : invalidate_dest (dest);
5660 54732781 : sets[i].rtl = 0;
5661 : }
5662 :
5663 193455928 : if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5664 : {
5665 1626428 : do_not_record = 0;
5666 1626428 : sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5667 1626428 : if (do_not_record)
5668 : {
5669 979 : invalidate_dest (SET_DEST (sets[i].rtl));
5670 979 : sets[i].rtl = 0;
5671 : }
5672 : }
5673 : }
5674 :
5675 : /* Now enter all non-volatile source expressions in the hash table
5676 : if they are not already present.
5677 : Record their equivalence classes in src_elt.
5678 : This way we can insert the corresponding destinations into
5679 : the same classes even if the actual sources are no longer in them
5680 : (having been invalidated). */
5681 :
5682 5217528 : if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5683 394587834 : && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5684 : {
5685 4318585 : struct table_elt *elt;
5686 4318585 : struct table_elt *classp = sets[0].src_elt;
5687 4318585 : rtx dest = SET_DEST (sets[0].rtl);
5688 4318585 : machine_mode eqvmode = GET_MODE (dest);
5689 :
5690 4318585 : if (GET_CODE (dest) == STRICT_LOW_PART)
5691 : {
5692 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5693 0 : classp = 0;
5694 : }
5695 4318585 : if (insert_regs (src_eqv, classp, false))
5696 : {
5697 157628 : rehash_using_reg (src_eqv);
5698 157628 : src_eqv_hash = HASH (src_eqv, eqvmode);
5699 : }
5700 4318585 : elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5701 4318585 : elt->in_memory = src_eqv_in_memory;
5702 4318585 : src_eqv_elt = elt;
5703 :
5704 : /* Check to see if src_eqv_elt is the same as a set source which
5705 : does not yet have an elt, and if so set the elt of the set source
5706 : to src_eqv_elt. */
5707 8637170 : for (i = 0; i < n_sets; i++)
5708 8637170 : if (sets[i].rtl && sets[i].src_elt == 0
5709 8505444 : && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5710 97091 : sets[i].src_elt = src_eqv_elt;
5711 : }
5712 :
5713 583725177 : for (i = 0; i < n_sets; i++)
5714 331980558 : if (sets[i].rtl && ! sets[i].src_volatile
5715 318494415 : && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5716 : {
5717 125033453 : if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5718 : {
5719 : /* REG_EQUAL in setting a STRICT_LOW_PART
5720 : gives an equivalent for the entire destination register,
5721 : not just for the subreg being stored in now.
5722 : This is a more interesting equivalence, so we arrange later
5723 : to treat the entire reg as the destination. */
5724 17631 : sets[i].src_elt = src_eqv_elt;
5725 17631 : sets[i].src_hash = src_eqv_hash;
5726 : }
5727 : else
5728 : {
5729 : /* Insert source and constant equivalent into hash table, if not
5730 : already present. */
5731 125015822 : struct table_elt *classp = src_eqv_elt;
5732 125015822 : rtx src = sets[i].src;
5733 125015822 : rtx dest = SET_DEST (sets[i].rtl);
5734 261248187 : machine_mode mode
5735 125015822 : = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5736 :
5737 : /* It's possible that we have a source value known to be
5738 : constant but don't have a REG_EQUAL note on the insn.
5739 : Lack of a note will mean src_eqv_elt will be NULL. This
5740 : can happen where we've generated a SUBREG to access a
5741 : CONST_INT that is already in a register in a wider mode.
5742 : Ensure that the source expression is put in the proper
5743 : constant class. */
5744 125015822 : if (!classp)
5745 119777353 : classp = sets[i].src_const_elt;
5746 :
5747 125015822 : if (sets[i].src_elt == 0)
5748 : {
5749 103310711 : struct table_elt *elt;
5750 :
5751 : /* Note that these insert_regs calls cannot remove
5752 : any of the src_elt's, because they would have failed to
5753 : match if not still valid. */
5754 103310711 : if (insert_regs (src, classp, false))
5755 : {
5756 17162421 : rehash_using_reg (src);
5757 17162421 : sets[i].src_hash = HASH (src, mode);
5758 : }
5759 103310711 : elt = insert (src, classp, sets[i].src_hash, mode);
5760 103310711 : elt->in_memory = sets[i].src_in_memory;
5761 : /* If inline asm has any clobbers, ensure we only reuse
5762 : existing inline asms and never try to put the ASM_OPERANDS
5763 : into an insn that isn't inline asm. */
5764 103310711 : if (GET_CODE (src) == ASM_OPERANDS
5765 20447 : && GET_CODE (x) == PARALLEL)
5766 20429 : elt->cost = MAX_COST;
5767 103310711 : sets[i].src_elt = classp = elt;
5768 : }
5769 149426026 : if (sets[i].src_const && sets[i].src_const_elt == 0
5770 14581793 : && src != sets[i].src_const
5771 127177909 : && ! rtx_equal_p (sets[i].src_const, src))
5772 2162085 : sets[i].src_elt = insert (sets[i].src_const, classp,
5773 2162085 : sets[i].src_const_hash, mode);
5774 : }
5775 : }
5776 68422475 : else if (sets[i].src_elt == 0)
5777 : /* If we did not insert the source into the hash table (e.g., it was
5778 : volatile), note the equivalence class for the REG_EQUAL value, if any,
5779 : so that the destination goes into that class. */
5780 56318919 : sets[i].src_elt = src_eqv_elt;
5781 :
5782 : /* Record destination addresses in the hash table. This allows us to
5783 : check if they are invalidated by other sets. */
5784 583725177 : for (i = 0; i < n_sets; i++)
5785 : {
5786 193455928 : if (sets[i].rtl)
5787 : {
5788 138524630 : rtx x = sets[i].inner_dest;
5789 138524630 : struct table_elt *elt;
5790 138524630 : machine_mode mode;
5791 138524630 : unsigned hash;
5792 :
5793 138524630 : if (MEM_P (x))
5794 : {
5795 21912692 : x = XEXP (x, 0);
5796 21912692 : mode = GET_MODE (x);
5797 21912692 : hash = HASH (x, mode);
5798 21912692 : elt = lookup (x, hash, mode);
5799 21912692 : if (!elt)
5800 : {
5801 19146737 : if (insert_regs (x, NULL, false))
5802 : {
5803 2173166 : rtx dest = SET_DEST (sets[i].rtl);
5804 :
5805 2173166 : rehash_using_reg (x);
5806 2173166 : hash = HASH (x, mode);
5807 2173166 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5808 : }
5809 19146737 : elt = insert (x, NULL, hash, mode);
5810 : }
5811 :
5812 21912692 : sets[i].dest_addr_elt = elt;
5813 : }
5814 : else
5815 116611938 : sets[i].dest_addr_elt = NULL;
5816 : }
5817 : }
5818 :
5819 390269249 : invalidate_from_clobbers (insn);
5820 :
5821 : /* Some registers are invalidated by subroutine calls. Memory is
5822 : invalidated by non-constant calls. */
5823 :
5824 390269249 : if (CALL_P (insn))
5825 : {
5826 15269755 : if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5827 13135860 : invalidate_memory ();
5828 : else
5829 : /* For const/pure calls, invalidate any argument slots, because
5830 : those are owned by the callee. */
5831 6234197 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
5832 4100302 : if (GET_CODE (XEXP (tem, 0)) == USE
5833 4100164 : && MEM_P (XEXP (XEXP (tem, 0), 0)))
5834 68981 : invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode);
5835 15269755 : invalidate_for_call (insn);
5836 : }
5837 :
5838 : /* Now invalidate everything set by this instruction.
5839 : If a SUBREG or other funny destination is being set,
5840 : sets[i].rtl is still nonzero, so here we invalidate the reg
5841 : a part of which is being set. */
5842 :
5843 583725177 : for (i = 0; i < n_sets; i++)
5844 193455928 : if (sets[i].rtl)
5845 : {
5846 : /* We can't use the inner dest, because the mode associated with
5847 : a ZERO_EXTRACT is significant. */
5848 138524630 : rtx dest = SET_DEST (sets[i].rtl);
5849 :
5850 : /* Needed for registers to remove the register from its
5851 : previous quantity's chain.
5852 : Needed for memory if this is a nonvarying address, unless
5853 : we have just done an invalidate_memory that covers even those. */
5854 138524630 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5855 116591260 : invalidate (dest, VOIDmode);
5856 21933370 : else if (MEM_P (dest))
5857 21912692 : invalidate (dest, VOIDmode);
5858 20678 : else if (GET_CODE (dest) == STRICT_LOW_PART
5859 3047 : || GET_CODE (dest) == ZERO_EXTRACT)
5860 20556 : invalidate (XEXP (dest, 0), GET_MODE (dest));
5861 : }
5862 :
5863 : /* Don't cse over a call to setjmp; on some machines (eg VAX)
5864 : the regs restored by the longjmp come from a later time
5865 : than the setjmp. */
5866 390269249 : if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5867 : {
5868 2146 : flush_hash_table ();
5869 2146 : goto done;
5870 : }
5871 :
5872 : /* Make sure registers mentioned in destinations
5873 : are safe for use in an expression to be inserted.
5874 : This removes from the hash table
5875 : any invalid entry that refers to one of these registers.
5876 :
5877 : We don't care about the return value from mention_regs because
5878 : we are going to hash the SET_DEST values unconditionally. */
5879 :
5880 583723031 : for (i = 0; i < n_sets; i++)
5881 : {
5882 193455928 : if (sets[i].rtl)
5883 : {
5884 138524630 : rtx x = SET_DEST (sets[i].rtl);
5885 :
5886 138524630 : if (!REG_P (x))
5887 23457114 : mention_regs (x);
5888 : else
5889 : {
5890 : /* We used to rely on all references to a register becoming
5891 : inaccessible when a register changes to a new quantity,
5892 : since that changes the hash code. However, that is not
5893 : safe, since after HASH_SIZE new quantities we get a
5894 : hash 'collision' of a register with its own invalid
5895 : entries. And since SUBREGs have been changed not to
5896 : change their hash code with the hash code of the register,
5897 : it wouldn't work any longer at all. So we have to check
5898 : for any invalid references lying around now.
5899 : This code is similar to the REG case in mention_regs,
5900 : but it knows that reg_tick has been incremented, and
5901 : it leaves reg_in_table as -1 . */
5902 115067516 : unsigned int regno = REGNO (x);
5903 115067516 : unsigned int endregno = END_REGNO (x);
5904 115067516 : unsigned int i;
5905 :
5906 230135032 : for (i = regno; i < endregno; i++)
5907 : {
5908 115067516 : if (REG_IN_TABLE (i) >= 0)
5909 : {
5910 12640185 : remove_invalid_refs (i);
5911 12640185 : REG_IN_TABLE (i) = -1;
5912 : }
5913 : }
5914 : }
5915 : }
5916 : }
5917 :
5918 : /* We may have just removed some of the src_elt's from the hash table.
5919 : So replace each one with the current head of the same class.
5920 : Also check if destination addresses have been removed. */
5921 :
5922 583723031 : for (i = 0; i < n_sets; i++)
5923 193455928 : if (sets[i].rtl)
5924 : {
5925 138524630 : if (sets[i].dest_addr_elt
5926 138524630 : && sets[i].dest_addr_elt->first_same_value == 0)
5927 : {
5928 : /* The elt was removed, which means this destination is not
5929 : valid after this instruction. */
5930 0 : sets[i].rtl = NULL_RTX;
5931 : }
5932 138524630 : else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5933 : /* If elt was removed, find current head of same class,
5934 : or 0 if nothing remains of that class. */
5935 : {
5936 10641974 : struct table_elt *elt = sets[i].src_elt;
5937 :
5938 10641974 : while (elt && elt->prev_same_value)
5939 : elt = elt->prev_same_value;
5940 :
5941 21192340 : while (elt && elt->first_same_value == 0)
5942 10591366 : elt = elt->next_same_value;
5943 10600974 : sets[i].src_elt = elt ? elt->first_same_value : 0;
5944 : }
5945 : }
5946 :
5947 : /* Now insert the destinations into their equivalence classes. */
5948 :
5949 583723031 : for (i = 0; i < n_sets; i++)
5950 193455928 : if (sets[i].rtl)
5951 : {
5952 138524630 : rtx dest = SET_DEST (sets[i].rtl);
5953 138524630 : struct table_elt *elt;
5954 :
5955 : /* Don't record value if we are not supposed to risk allocating
5956 : floating-point values in registers that might be wider than
5957 : memory. */
5958 162578013 : if ((flag_float_store
5959 12310 : && MEM_P (dest)
5960 4216 : && FLOAT_MODE_P (GET_MODE (dest)))
5961 : /* Don't record BLKmode values, because we don't know the
5962 : size of it, and can't be sure that other BLKmode values
5963 : have the same or smaller size. */
5964 138522113 : || GET_MODE (dest) == BLKmode
5965 : /* If we didn't put a REG_EQUAL value or a source into the hash
5966 : table, there is no point is recording DEST. */
5967 277046743 : || sets[i].src_elt == 0)
5968 24053383 : continue;
5969 :
5970 : /* STRICT_LOW_PART isn't part of the value BEING set,
5971 : and neither is the SUBREG inside it.
5972 : Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5973 114471247 : if (GET_CODE (dest) == STRICT_LOW_PART)
5974 0 : dest = SUBREG_REG (XEXP (dest, 0));
5975 :
5976 114471247 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5977 : /* Registers must also be inserted into chains for quantities. */
5978 92906977 : if (insert_regs (dest, sets[i].src_elt, true))
5979 : {
5980 : /* If `insert_regs' changes something, the hash code must be
5981 : recalculated. */
5982 92342803 : rehash_using_reg (dest);
5983 92342803 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5984 : }
5985 :
5986 : /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
5987 : outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
5988 114471247 : if (paradoxical_subreg_p (dest))
5989 63338 : continue;
5990 :
5991 343223727 : elt = insert (dest, sets[i].src_elt,
5992 114407909 : sets[i].dest_hash, GET_MODE (dest));
5993 :
5994 : /* If this is a constant, insert the constant anchors with the
5995 : equivalent register-offset expressions using register DEST. */
5996 114407909 : if (targetm.const_anchor
5997 0 : && REG_P (dest)
5998 0 : && SCALAR_INT_MODE_P (GET_MODE (dest))
5999 114407909 : && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
6000 0 : insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
6001 :
6002 114407909 : elt->in_memory = (MEM_P (sets[i].inner_dest)
6003 114407909 : && !MEM_READONLY_P (sets[i].inner_dest));
6004 :
6005 : /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6006 : narrower than M2, and both M1 and M2 are the same number of words,
6007 : we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6008 : make that equivalence as well.
6009 :
6010 : However, BAR may have equivalences for which gen_lowpart
6011 : will produce a simpler value than gen_lowpart applied to
6012 : BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6013 : BAR's equivalences. If we don't get a simplified form, make
6014 : the SUBREG. It will not be used in an equivalence, but will
6015 : cause two similar assignments to be detected.
6016 :
6017 : Note the loop below will find SUBREG_REG (DEST) since we have
6018 : already entered SRC and DEST of the SET in the table. */
6019 :
6020 114407909 : if (GET_CODE (dest) == SUBREG
6021 : && (known_equal_after_align_down
6022 194923642 : (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1,
6023 2867024 : GET_MODE_SIZE (GET_MODE (dest)) - 1,
6024 1433512 : UNITS_PER_WORD))
6025 85359 : && !partial_subreg_p (dest)
6026 114442111 : && sets[i].src_elt != 0)
6027 : {
6028 34202 : machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6029 34202 : struct table_elt *elt, *classp = 0;
6030 :
6031 154577 : for (elt = sets[i].src_elt->first_same_value; elt;
6032 120375 : elt = elt->next_same_value)
6033 : {
6034 120375 : rtx new_src = 0;
6035 120375 : unsigned src_hash;
6036 120375 : struct table_elt *src_elt;
6037 :
6038 : /* Ignore invalid entries. */
6039 120375 : if (!REG_P (elt->exp)
6040 120375 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6041 0 : continue;
6042 :
6043 : /* We may have already been playing subreg games. If the
6044 : mode is already correct for the destination, use it. */
6045 120375 : if (GET_MODE (elt->exp) == new_mode)
6046 : new_src = elt->exp;
6047 : else
6048 : {
6049 120375 : poly_uint64 byte
6050 120375 : = subreg_lowpart_offset (new_mode, GET_MODE (dest));
6051 120375 : new_src = simplify_gen_subreg (new_mode, elt->exp,
6052 120375 : GET_MODE (dest), byte);
6053 : }
6054 :
6055 : /* The call to simplify_gen_subreg fails if the value
6056 : is VOIDmode, yet we can't do any simplification, e.g.
6057 : for EXPR_LISTs denoting function call results.
6058 : It is invalid to construct a SUBREG with a VOIDmode
6059 : SUBREG_REG, hence a zero new_src means we can't do
6060 : this substitution. */
6061 120375 : if (! new_src)
6062 6 : continue;
6063 :
6064 120369 : src_hash = HASH (new_src, new_mode);
6065 120369 : src_elt = lookup (new_src, src_hash, new_mode);
6066 :
6067 : /* Put the new source in the hash table is if isn't
6068 : already. */
6069 120369 : if (src_elt == 0)
6070 : {
6071 40797 : if (insert_regs (new_src, classp, false))
6072 : {
6073 0 : rehash_using_reg (new_src);
6074 0 : src_hash = HASH (new_src, new_mode);
6075 : }
6076 40797 : src_elt = insert (new_src, classp, src_hash, new_mode);
6077 40797 : src_elt->in_memory = elt->in_memory;
6078 40797 : if (GET_CODE (new_src) == ASM_OPERANDS
6079 0 : && elt->cost == MAX_COST)
6080 0 : src_elt->cost = MAX_COST;
6081 : }
6082 79572 : else if (classp && classp != src_elt->first_same_value)
6083 : /* Show that two things that we've seen before are
6084 : actually the same. */
6085 113 : merge_equiv_classes (src_elt, classp);
6086 :
6087 120369 : classp = src_elt->first_same_value;
6088 : /* Ignore invalid entries. */
6089 120369 : while (classp
6090 120369 : && !REG_P (classp->exp)
6091 203652 : && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6092 0 : classp = classp->next_same_value;
6093 : }
6094 : }
6095 : }
6096 :
6097 : /* Special handling for (set REG0 REG1) where REG0 is the
6098 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
6099 : be used in the sequel, so (if easily done) change this insn to
6100 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6101 : that computed their value. Then REG1 will become a dead store
6102 : and won't cloud the situation for later optimizations.
6103 :
6104 : Do not make this change if REG1 is a hard register, because it will
6105 : then be used in the sequel and we may be changing a two-operand insn
6106 : into a three-operand insn.
6107 :
6108 : Also do not do this if we are operating on a copy of INSN. */
6109 :
6110 580943476 : if (n_sets == 1 && sets[0].rtl)
6111 135959522 : try_back_substitute_reg (sets[0].rtl, insn);
6112 :
6113 390269249 : done:;
6114 390269249 : }
6115 :
6116 : /* Remove from the hash table all expressions that reference memory. */
6117 :
6118 : static void
6119 13135860 : invalidate_memory (void)
6120 : {
6121 13135860 : int i;
6122 13135860 : struct table_elt *p, *next;
6123 :
6124 433483380 : for (i = 0; i < HASH_SIZE; i++)
6125 606210768 : for (p = table[i]; p; p = next)
6126 : {
6127 185863248 : next = p->next_same_hash;
6128 185863248 : if (p->in_memory)
6129 19267820 : remove_from_table (p, i);
6130 : }
6131 13135860 : }
6132 :
6133 : /* Perform invalidation on the basis of everything about INSN,
6134 : except for invalidating the actual places that are SET in it.
6135 : This includes the places CLOBBERed, and anything that might
6136 : alias with something that is SET or CLOBBERed. */
6137 :
6138 : static void
6139 390269249 : invalidate_from_clobbers (rtx_insn *insn)
6140 : {
6141 390269249 : rtx x = PATTERN (insn);
6142 :
6143 390269249 : if (GET_CODE (x) == CLOBBER)
6144 : {
6145 64353 : rtx ref = XEXP (x, 0);
6146 64353 : if (ref)
6147 : {
6148 64353 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6149 12970 : || MEM_P (ref))
6150 64353 : invalidate (ref, VOIDmode);
6151 0 : else if (GET_CODE (ref) == STRICT_LOW_PART
6152 0 : || GET_CODE (ref) == ZERO_EXTRACT)
6153 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6154 : }
6155 : }
6156 390204896 : else if (GET_CODE (x) == PARALLEL)
6157 : {
6158 30152316 : int i;
6159 91647802 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6160 : {
6161 61495486 : rtx y = XVECEXP (x, 0, i);
6162 61495486 : if (GET_CODE (y) == CLOBBER)
6163 : {
6164 29763302 : rtx ref = XEXP (y, 0);
6165 29763302 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6166 256006 : || MEM_P (ref))
6167 29569498 : invalidate (ref, VOIDmode);
6168 193804 : else if (GET_CODE (ref) == STRICT_LOW_PART
6169 193804 : || GET_CODE (ref) == ZERO_EXTRACT)
6170 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6171 : }
6172 : }
6173 : }
6174 390269249 : }
6175 :
6176 : /* Perform invalidation on the basis of everything about INSN.
6177 : This includes the places CLOBBERed, and anything that might
6178 : alias with something that is SET or CLOBBERed. */
6179 :
6180 : static void
6181 390269249 : invalidate_from_sets_and_clobbers (rtx_insn *insn)
6182 : {
6183 390269249 : rtx tem;
6184 390269249 : rtx x = PATTERN (insn);
6185 :
6186 390269249 : if (CALL_P (insn))
6187 : {
6188 45967805 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6189 : {
6190 30698050 : rtx temx = XEXP (tem, 0);
6191 30698050 : if (GET_CODE (temx) == CLOBBER)
6192 865348 : invalidate (SET_DEST (temx), VOIDmode);
6193 : }
6194 : }
6195 :
6196 : /* Ensure we invalidate the destination register of a CALL insn.
6197 : This is necessary for machines where this register is a fixed_reg,
6198 : because no other code would invalidate it. */
6199 390269249 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
6200 7080020 : invalidate (SET_DEST (x), VOIDmode);
6201 :
6202 383189229 : else if (GET_CODE (x) == PARALLEL)
6203 : {
6204 30860139 : int i;
6205 :
6206 93776396 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6207 : {
6208 62916257 : rtx y = XVECEXP (x, 0, i);
6209 62916257 : if (GET_CODE (y) == CLOBBER)
6210 : {
6211 30476250 : rtx clobbered = XEXP (y, 0);
6212 :
6213 30476250 : if (REG_P (clobbered)
6214 261127 : || GET_CODE (clobbered) == SUBREG)
6215 30215123 : invalidate (clobbered, VOIDmode);
6216 261127 : else if (GET_CODE (clobbered) == STRICT_LOW_PART
6217 261127 : || GET_CODE (clobbered) == ZERO_EXTRACT)
6218 0 : invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6219 : }
6220 32440007 : else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
6221 10193 : invalidate (SET_DEST (y), VOIDmode);
6222 : }
6223 : }
6224 :
6225 : /* Any single register constraint may introduce a conflict, if the associated
6226 : hard register is live. For example:
6227 :
6228 : r100=%1
6229 : r101=42
6230 : r102=exp(r101)
6231 :
6232 : If the first operand r101 of exp is constrained to hard register %1, then
6233 : r100 cannot be trivially substituted by %1 in the following since %1 got
6234 : clobbered. Such conflicts may stem from single register classes as well
6235 : as hard register constraints. Since prior RA we do not know which
6236 : alternative will be chosen, be conservative and consider any such hard
6237 : register from any alternative as a potential clobber. */
6238 390269249 : extract_insn (insn);
6239 849802078 : for (int nop = recog_data.n_operands - 1; nop >= 0; --nop)
6240 : {
6241 459532829 : int c;
6242 459532829 : const char *p = recog_data.constraints[nop];
6243 15109903886 : for (; (c = *p); p += CONSTRAINT_LEN (c, p))
6244 14650371057 : if (c == ',')
6245 : ;
6246 9607327615 : else if (c == '{')
6247 : {
6248 190 : int regno = decode_hard_reg_constraint (p);
6249 190 : machine_mode mode = recog_data.operand_mode[nop];
6250 190 : invalidate_reg (gen_rtx_REG (mode, regno));
6251 : }
6252 : }
6253 390269249 : }
6254 :
6255 : static rtx cse_process_note (rtx);
6256 :
6257 : /* A simplify_replace_fn_rtx callback for cse_process_note. Process X,
6258 : part of the REG_NOTES of an insn. Replace any registers with either
6259 : an equivalent constant or the canonical form of the register.
6260 : Only replace addresses if the containing MEM remains valid.
6261 :
6262 : Return the replacement for X, or null if it should be simplified
6263 : recursively. */
6264 :
6265 : static rtx
6266 28067594 : cse_process_note_1 (rtx x, const_rtx, void *)
6267 : {
6268 28067594 : if (MEM_P (x))
6269 : {
6270 1961414 : validate_change (x, &XEXP (x, 0), cse_process_note (XEXP (x, 0)), false);
6271 980707 : return x;
6272 : }
6273 :
6274 27086887 : if (REG_P (x))
6275 : {
6276 5917181 : int i = REG_QTY (REGNO (x));
6277 :
6278 : /* Return a constant or a constant register. */
6279 5917181 : if (REGNO_QTY_VALID_P (REGNO (x)))
6280 : {
6281 1591277 : struct qty_table_elem *ent = &qty_table[i];
6282 :
6283 1591277 : if (ent->const_rtx != NULL_RTX
6284 24252 : && (CONSTANT_P (ent->const_rtx)
6285 19122 : || REG_P (ent->const_rtx)))
6286 : {
6287 5130 : rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6288 5130 : if (new_rtx)
6289 5130 : return copy_rtx (new_rtx);
6290 : }
6291 : }
6292 :
6293 : /* Otherwise, canonicalize this register. */
6294 5912051 : return canon_reg (x, NULL);
6295 : }
6296 :
6297 : return NULL_RTX;
6298 : }
6299 :
6300 : /* Process X, part of the REG_NOTES of an insn. Replace any registers in it
6301 : with either an equivalent constant or the canonical form of the register.
6302 : Only replace addresses if the containing MEM remains valid. */
6303 :
6304 : static rtx
6305 9588715 : cse_process_note (rtx x)
6306 : {
6307 980707 : return simplify_replace_fn_rtx (x, NULL_RTX, cse_process_note_1, NULL);
6308 : }
6309 :
6310 :
6311 : /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6312 :
6313 : DATA is a pointer to a struct cse_basic_block_data, that is used to
6314 : describe the path.
6315 : It is filled with a queue of basic blocks, starting with FIRST_BB
6316 : and following a trace through the CFG.
6317 :
6318 : If all paths starting at FIRST_BB have been followed, or no new path
6319 : starting at FIRST_BB can be constructed, this function returns FALSE.
6320 : Otherwise, DATA->path is filled and the function returns TRUE indicating
6321 : that a path to follow was found.
6322 :
6323 : If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6324 : block in the path will be FIRST_BB. */
6325 :
6326 : static bool
6327 39402436 : cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6328 : bool follow_jumps)
6329 : {
6330 39402436 : basic_block bb;
6331 39402436 : edge e;
6332 39402436 : int path_size;
6333 :
6334 39402436 : bitmap_set_bit (cse_visited_basic_blocks, first_bb->index);
6335 :
6336 : /* See if there is a previous path. */
6337 39402436 : path_size = data->path_size;
6338 :
6339 : /* There is a previous path. Make sure it started with FIRST_BB. */
6340 39402436 : if (path_size)
6341 21197538 : gcc_assert (data->path[0].bb == first_bb);
6342 :
6343 : /* There was only one basic block in the last path. Clear the path and
6344 : return, so that paths starting at another basic block can be tried. */
6345 21197538 : if (path_size == 1)
6346 : {
6347 14207145 : path_size = 0;
6348 14207145 : goto done;
6349 : }
6350 :
6351 : /* If the path was empty from the beginning, construct a new path. */
6352 25195291 : if (path_size == 0)
6353 18204898 : data->path[path_size++].bb = first_bb;
6354 : else
6355 : {
6356 : /* Otherwise, path_size must be equal to or greater than 2, because
6357 : a previous path exists that is at least two basic blocks long.
6358 :
6359 : Update the previous branch path, if any. If the last branch was
6360 : previously along the branch edge, take the fallthrough edge now. */
6361 15452320 : while (path_size >= 2)
6362 : {
6363 11454567 : basic_block last_bb_in_path, previous_bb_in_path;
6364 11454567 : edge e;
6365 :
6366 11454567 : --path_size;
6367 11454567 : last_bb_in_path = data->path[path_size].bb;
6368 11454567 : previous_bb_in_path = data->path[path_size - 1].bb;
6369 :
6370 : /* If we previously followed a path along the branch edge, try
6371 : the fallthru edge now. */
6372 19916494 : if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6373 11149603 : && any_condjump_p (BB_END (previous_bb_in_path))
6374 11149603 : && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6375 22604170 : && e == BRANCH_EDGE (previous_bb_in_path))
6376 : {
6377 3978557 : bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6378 3978557 : if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun)
6379 3978557 : && single_pred_p (bb)
6380 : /* We used to assert here that we would only see blocks
6381 : that we have not visited yet. But we may end up
6382 : visiting basic blocks twice if the CFG has changed
6383 : in this run of cse_main, because when the CFG changes
6384 : the topological sort of the CFG also changes. A basic
6385 : blocks that previously had more than two predecessors
6386 : may now have a single predecessor, and become part of
6387 : a path that starts at another basic block.
6388 :
6389 : We still want to visit each basic block only once, so
6390 : halt the path here if we have already visited BB. */
6391 6971197 : && !bitmap_bit_p (cse_visited_basic_blocks, bb->index))
6392 : {
6393 2992640 : bitmap_set_bit (cse_visited_basic_blocks, bb->index);
6394 2992640 : data->path[path_size++].bb = bb;
6395 2992640 : break;
6396 : }
6397 : }
6398 :
6399 8461927 : data->path[path_size].bb = NULL;
6400 : }
6401 :
6402 : /* If only one block remains in the path, bail. */
6403 6990393 : if (path_size == 1)
6404 : {
6405 3997753 : path_size = 0;
6406 3997753 : goto done;
6407 : }
6408 : }
6409 :
6410 : /* Extend the path if possible. */
6411 21197538 : if (follow_jumps)
6412 : {
6413 12077032 : bb = data->path[path_size - 1].bb;
6414 20542463 : while (bb && path_size < param_max_cse_path_length)
6415 : {
6416 20380241 : if (single_succ_p (bb))
6417 8936071 : e = single_succ_edge (bb);
6418 11444170 : else if (EDGE_COUNT (bb->succs) == 2
6419 11432554 : && any_condjump_p (BB_END (bb)))
6420 : {
6421 : /* First try to follow the branch. If that doesn't lead
6422 : to a useful path, follow the fallthru edge. */
6423 9105718 : e = BRANCH_EDGE (bb);
6424 9105718 : if (!single_pred_p (e->dest))
6425 5122234 : e = FALLTHRU_EDGE (bb);
6426 : }
6427 : else
6428 : e = NULL;
6429 :
6430 18041789 : if (e
6431 18041789 : && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6432 18040744 : && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
6433 15894097 : && single_pred_p (e->dest)
6434 : /* Avoid visiting basic blocks twice. The large comment
6435 : above explains why this can happen. */
6436 26507229 : && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index))
6437 : {
6438 8465431 : basic_block bb2 = e->dest;
6439 8465431 : bitmap_set_bit (cse_visited_basic_blocks, bb2->index);
6440 8465431 : data->path[path_size++].bb = bb2;
6441 8465431 : bb = bb2;
6442 : }
6443 : else
6444 : bb = NULL;
6445 : }
6446 : }
6447 :
6448 9120506 : done:
6449 39402436 : data->path_size = path_size;
6450 39402436 : return path_size != 0;
6451 : }
6452 :
6453 : /* Dump the path in DATA to file F. NSETS is the number of sets
6454 : in the path. */
6455 :
6456 : static void
6457 317 : cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6458 : {
6459 317 : int path_entry;
6460 :
6461 317 : fprintf (f, ";; Following path with %d sets: ", nsets);
6462 1119 : for (path_entry = 0; path_entry < data->path_size; path_entry++)
6463 485 : fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6464 317 : fputc ('\n', f);
6465 317 : fflush (f);
6466 317 : }
6467 :
6468 :
6469 : /* Return true if BB has exception handling successor edges. */
6470 :
6471 : static bool
6472 9079365 : have_eh_succ_edges (basic_block bb)
6473 : {
6474 9079365 : edge e;
6475 9079365 : edge_iterator ei;
6476 :
6477 21381510 : FOR_EACH_EDGE (e, ei, bb->succs)
6478 13301459 : if (e->flags & EDGE_EH)
6479 : return true;
6480 :
6481 : return false;
6482 : }
6483 :
6484 :
6485 : /* Scan to the end of the path described by DATA. Return an estimate of
6486 : the total number of SETs of all insns in the path. */
6487 :
6488 : static void
6489 21197538 : cse_prescan_path (struct cse_basic_block_data *data)
6490 : {
6491 21197538 : int nsets = 0;
6492 21197538 : int path_size = data->path_size;
6493 21197538 : int path_entry;
6494 :
6495 : /* Scan to end of each basic block in the path. */
6496 57469682 : for (path_entry = 0; path_entry < path_size; path_entry++)
6497 : {
6498 36272144 : basic_block bb;
6499 36272144 : rtx_insn *insn;
6500 :
6501 36272144 : bb = data->path[path_entry].bb;
6502 :
6503 484535217 : FOR_BB_INSNS (bb, insn)
6504 : {
6505 448263073 : if (!INSN_P (insn))
6506 57978994 : continue;
6507 :
6508 : /* A PARALLEL can have lots of SETs in it,
6509 : especially if it is really an ASM_OPERANDS. */
6510 390284079 : if (GET_CODE (PATTERN (insn)) == PARALLEL)
6511 30864782 : nsets += XVECLEN (PATTERN (insn), 0);
6512 : else
6513 359419297 : nsets += 1;
6514 : }
6515 : }
6516 :
6517 21197538 : data->nsets = nsets;
6518 21197538 : }
6519 :
6520 : /* Return true if the pattern of INSN uses a LABEL_REF for which
6521 : there isn't a REG_LABEL_OPERAND note. */
6522 :
6523 : static bool
6524 390098556 : check_for_label_ref (rtx_insn *insn)
6525 : {
6526 : /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6527 : note for it, we must rerun jump since it needs to place the note. If
6528 : this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6529 : don't do this since no REG_LABEL_OPERAND will be added. */
6530 390098556 : subrtx_iterator::array_type array;
6531 1956342446 : FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
6532 : {
6533 1566245211 : const_rtx x = *iter;
6534 1566245211 : if (GET_CODE (x) == LABEL_REF
6535 20197379 : && !LABEL_REF_NONLOCAL_P (x)
6536 20196552 : && (!JUMP_P (insn)
6537 20152611 : || !label_is_jump_target_p (label_ref_label (x), insn))
6538 43942 : && LABEL_P (label_ref_label (x))
6539 43585 : && INSN_UID (label_ref_label (x)) != 0
6540 1566288796 : && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x)))
6541 1321 : return true;
6542 : }
6543 390097235 : return false;
6544 390098556 : }
6545 :
6546 : /* Process a single extended basic block described by EBB_DATA. */
6547 :
6548 : static void
6549 20671616 : cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6550 : {
6551 20671616 : int path_size = ebb_data->path_size;
6552 20671616 : int path_entry;
6553 20671616 : int num_insns = 0;
6554 :
6555 : /* Allocate the space needed by qty_table. */
6556 20671616 : qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6557 :
6558 20671616 : new_basic_block ();
6559 20671616 : cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6560 20671616 : cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6561 56414209 : for (path_entry = 0; path_entry < path_size; path_entry++)
6562 : {
6563 35742593 : basic_block bb;
6564 35742593 : rtx_insn *insn;
6565 :
6566 35742593 : bb = ebb_data->path[path_entry].bb;
6567 :
6568 : /* Invalidate recorded information for eh regs if there is an EH
6569 : edge pointing to that bb. */
6570 35742593 : if (bb_has_eh_pred (bb))
6571 : {
6572 494149 : df_ref def;
6573 :
6574 1976596 : FOR_EACH_ARTIFICIAL_DEF (def, bb->index)
6575 988298 : if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6576 988298 : invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6577 : }
6578 :
6579 35742593 : optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6580 483064087 : FOR_BB_INSNS (bb, insn)
6581 : {
6582 : /* If we have processed 1,000 insns, flush the hash table to
6583 : avoid extreme quadratic behavior. We must not include NOTEs
6584 : in the count since there may be more of them when generating
6585 : debugging information. If we clear the table at different
6586 : times, code generated with -g -O might be different than code
6587 : generated with -O but not -g.
6588 :
6589 : FIXME: This is a real kludge and needs to be done some other
6590 : way. */
6591 447321494 : if (NONDEBUG_INSN_P (insn)
6592 447321494 : && num_insns++ > param_max_cse_insns)
6593 : {
6594 5798 : flush_hash_table ();
6595 5798 : num_insns = 0;
6596 : }
6597 :
6598 447321494 : if (INSN_P (insn))
6599 : {
6600 : /* Process notes first so we have all notes in canonical forms
6601 : when looking for duplicate operations. */
6602 390269249 : bool changed = false;
6603 622527372 : for (rtx note = REG_NOTES (insn); note; note = XEXP (note, 1))
6604 232258123 : if (REG_NOTE_KIND (note) == REG_EQUAL)
6605 : {
6606 8608008 : rtx newval = cse_process_note (XEXP (note, 0));
6607 8608008 : if (newval != XEXP (note, 0))
6608 : {
6609 37370 : XEXP (note, 0) = newval;
6610 37370 : changed = true;
6611 : }
6612 : }
6613 390269249 : if (changed)
6614 37370 : df_notes_rescan (insn);
6615 :
6616 390269249 : cse_insn (insn);
6617 :
6618 : /* If we haven't already found an insn where we added a LABEL_REF,
6619 : check this one. */
6620 390269249 : if (INSN_P (insn) && !recorded_label_ref
6621 780367805 : && check_for_label_ref (insn))
6622 1321 : recorded_label_ref = true;
6623 : }
6624 : }
6625 :
6626 : /* With non-call exceptions, we are not always able to update
6627 : the CFG properly inside cse_insn. So clean up possibly
6628 : redundant EH edges here. */
6629 35742593 : if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6630 999314 : cse_cfg_altered |= purge_dead_edges (bb);
6631 :
6632 : /* If we changed a conditional jump, we may have terminated
6633 : the path we are following. Check that by verifying that
6634 : the edge we would take still exists. If the edge does
6635 : not exist anymore, purge the remainder of the path.
6636 : Note that this will cause us to return to the caller. */
6637 35742593 : if (path_entry < path_size - 1)
6638 : {
6639 15074037 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6640 15074037 : if (!find_edge (bb, next_bb))
6641 : {
6642 3504 : do
6643 : {
6644 3504 : path_size--;
6645 :
6646 : /* If we truncate the path, we must also reset the
6647 : visited bit on the remaining blocks in the path,
6648 : or we will never visit them at all. */
6649 3504 : bitmap_clear_bit (cse_visited_basic_blocks,
6650 3504 : ebb_data->path[path_size].bb->index);
6651 3504 : ebb_data->path[path_size].bb = NULL;
6652 : }
6653 3504 : while (path_size - 1 != path_entry);
6654 3060 : ebb_data->path_size = path_size;
6655 : }
6656 : }
6657 :
6658 : /* If this is a conditional jump insn, record any known
6659 : equivalences due to the condition being tested. */
6660 35742593 : insn = BB_END (bb);
6661 35742593 : if (path_entry < path_size - 1
6662 50496278 : && EDGE_COUNT (bb->succs) == 2
6663 14753685 : && JUMP_P (insn)
6664 14753685 : && single_set (insn)
6665 14753685 : && any_condjump_p (insn)
6666 : /* single_set may return non-NULL even for multiple sets
6667 : if there are REG_UNUSED notes. record_jump_equiv only
6668 : looks at pc_set and doesn't consider other sets that
6669 : could affect the value, and the recorded equivalence
6670 : can extend the lifetime of the compared REG, so use
6671 : also !multiple_sets check to verify it is exactly one
6672 : set. */
6673 50496278 : && !multiple_sets (insn))
6674 : {
6675 14753685 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6676 14753685 : bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6677 14753685 : record_jump_equiv (insn, taken);
6678 : }
6679 : }
6680 :
6681 20671616 : gcc_assert (next_qty <= max_qty);
6682 :
6683 20671616 : free (qty_table);
6684 20671616 : }
6685 :
6686 :
6687 : /* Perform cse on the instructions of a function.
6688 : F is the first instruction.
6689 : NREGS is one plus the highest pseudo-reg number used in the instruction.
6690 :
6691 : Return 2 if jump optimizations should be redone due to simplifications
6692 : in conditional jump instructions.
6693 : Return 1 if the CFG should be cleaned up because it has been modified.
6694 : Return 0 otherwise. */
6695 :
6696 : static int
6697 2291532 : cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
6698 : {
6699 2291532 : struct cse_basic_block_data ebb_data;
6700 2291532 : basic_block bb;
6701 2291532 : int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
6702 2291532 : int i, n_blocks;
6703 :
6704 : /* CSE doesn't use dominane info but can invalidate it in different ways.
6705 : For simplicity free dominance info here. */
6706 2291532 : free_dominance_info (CDI_DOMINATORS);
6707 :
6708 2291532 : df_set_flags (DF_LR_RUN_DCE);
6709 2291532 : df_note_add_problem ();
6710 2291532 : df_analyze ();
6711 2291532 : df_set_flags (DF_DEFER_INSN_RESCAN);
6712 :
6713 2291532 : reg_scan (get_insns (), max_reg_num ());
6714 2291532 : init_cse_reg_info (nregs);
6715 :
6716 2291532 : ebb_data.path = XNEWVEC (struct branch_path,
6717 : param_max_cse_path_length);
6718 :
6719 2291532 : cse_cfg_altered = false;
6720 2291532 : cse_jumps_altered = false;
6721 2291532 : recorded_label_ref = false;
6722 2291532 : ebb_data.path_size = 0;
6723 2291532 : ebb_data.nsets = 0;
6724 2291532 : rtl_hooks = cse_rtl_hooks;
6725 :
6726 2291532 : init_recog ();
6727 2291532 : init_alias_analysis ();
6728 :
6729 2291532 : reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6730 :
6731 : /* Set up the table of already visited basic blocks. */
6732 2291532 : cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
6733 2291532 : bitmap_clear (cse_visited_basic_blocks);
6734 :
6735 : /* Loop over basic blocks in reverse completion order (RPO),
6736 : excluding the ENTRY and EXIT blocks. */
6737 2291532 : n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6738 2291532 : i = 0;
6739 22787962 : while (i < n_blocks)
6740 : {
6741 : /* Find the first block in the RPO queue that we have not yet
6742 : processed before. */
6743 29252001 : do
6744 : {
6745 29252001 : bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]);
6746 : }
6747 29252001 : while (bitmap_bit_p (cse_visited_basic_blocks, bb->index)
6748 47456899 : && i < n_blocks);
6749 :
6750 : /* Find all paths starting with BB, and process them. */
6751 39402436 : while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6752 : {
6753 : /* Pre-scan the path. */
6754 21197538 : cse_prescan_path (&ebb_data);
6755 :
6756 : /* If this basic block has no sets, skip it. */
6757 21197538 : if (ebb_data.nsets == 0)
6758 525922 : continue;
6759 :
6760 : /* Get a reasonable estimate for the maximum number of qty's
6761 : needed for this path. For this, we take the number of sets
6762 : and multiply that by MAX_RECOG_OPERANDS. */
6763 20671616 : max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6764 :
6765 : /* Dump the path we're about to process. */
6766 20671616 : if (dump_file)
6767 317 : cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6768 :
6769 20671616 : cse_extended_basic_block (&ebb_data);
6770 : }
6771 : }
6772 :
6773 : /* Clean up. */
6774 2291532 : end_alias_analysis ();
6775 2291532 : free (reg_eqv_table);
6776 2291532 : free (ebb_data.path);
6777 2291532 : sbitmap_free (cse_visited_basic_blocks);
6778 2291532 : free (rc_order);
6779 2291532 : rtl_hooks = general_rtl_hooks;
6780 :
6781 2291532 : if (cse_jumps_altered || recorded_label_ref)
6782 : return 2;
6783 2284031 : else if (cse_cfg_altered)
6784 : return 1;
6785 : else
6786 2274358 : return 0;
6787 : }
6788 :
6789 : /* Count the number of times registers are used (not set) in X.
6790 : COUNTS is an array in which we accumulate the count, INCR is how much
6791 : we count each register usage.
6792 :
6793 : Don't count a usage of DEST, which is the SET_DEST of a SET which
6794 : contains X in its SET_SRC. This is because such a SET does not
6795 : modify the liveness of DEST.
6796 : DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6797 : We must then count uses of a SET_DEST regardless, because the insn can't be
6798 : deleted here.
6799 : Also count uses of a SET_DEST if it has been used by an earlier insn,
6800 : but in that case only when incrementing and not when decrementing, effectively
6801 : making setters of such a pseudo non-eliminable. This is for cases like
6802 : (set (reg x) (expr))
6803 : ...
6804 : (set (reg y) (expr (reg (x))))
6805 : ...
6806 : (set (reg x) (expr (reg (x))))
6807 : where we can't eliminate the last insn because x is is still used, if y
6808 : is unused we can eliminate the middle insn and when considering the first insn
6809 : we used to eliminate it despite it being used in the last insn. */
6810 :
6811 : static void
6812 2431319978 : count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6813 : {
6814 2909362462 : enum rtx_code code;
6815 2909362462 : rtx note;
6816 2909362462 : const char *fmt;
6817 2909362462 : int i, j;
6818 :
6819 2909362462 : if (x == 0)
6820 : return;
6821 :
6822 2880032551 : switch (code = GET_CODE (x))
6823 : {
6824 547352035 : case REG:
6825 547352035 : if (x != dest || (incr > 0 && counts[REGNO (x)]))
6826 543589319 : counts[REGNO (x)] += incr;
6827 : return;
6828 :
6829 : case PC:
6830 : case CONST:
6831 : CASE_CONST_ANY:
6832 : case SYMBOL_REF:
6833 : case LABEL_REF:
6834 : return;
6835 :
6836 167566973 : case CLOBBER:
6837 : /* If we are clobbering a MEM, mark any registers inside the address
6838 : as being used. */
6839 167566973 : if (MEM_P (XEXP (x, 0)))
6840 215701 : count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6841 : return;
6842 :
6843 394299456 : case SET:
6844 : /* Unless we are setting a REG, count everything in SET_DEST. */
6845 394299456 : if (!REG_P (SET_DEST (x)))
6846 96394122 : count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6847 394299456 : count_reg_usage (SET_SRC (x), counts,
6848 : dest ? dest : SET_DEST (x),
6849 : incr);
6850 394299456 : return;
6851 :
6852 : case DEBUG_INSN:
6853 : return;
6854 :
6855 414745569 : case CALL_INSN:
6856 414745569 : case INSN:
6857 414745569 : case JUMP_INSN:
6858 : /* We expect dest to be NULL_RTX here. If the insn may throw,
6859 : or if it cannot be deleted due to side-effects, mark this fact
6860 : by setting DEST to pc_rtx. */
6861 159698494 : if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x))
6862 556262469 : || side_effects_p (PATTERN (x)))
6863 54279327 : dest = pc_rtx;
6864 414745569 : if (code == CALL_INSN)
6865 29329911 : count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6866 414745569 : count_reg_usage (PATTERN (x), counts, dest, incr);
6867 :
6868 : /* Things used in a REG_EQUAL note aren't dead since loop may try to
6869 : use them. */
6870 :
6871 414745569 : note = find_reg_equal_equiv_note (x);
6872 414745569 : if (note)
6873 : {
6874 21652551 : rtx eqv = XEXP (note, 0);
6875 :
6876 21652551 : if (GET_CODE (eqv) == EXPR_LIST)
6877 : /* This REG_EQUAL note describes the result of a function call.
6878 : Process all the arguments. */
6879 0 : do
6880 : {
6881 0 : count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6882 0 : eqv = XEXP (eqv, 1);
6883 : }
6884 0 : while (eqv && GET_CODE (eqv) == EXPR_LIST);
6885 : else
6886 : count_reg_usage (eqv, counts, dest, incr);
6887 : }
6888 : return;
6889 :
6890 61874776 : case EXPR_LIST:
6891 61874776 : if (REG_NOTE_KIND (x) == REG_EQUAL
6892 61874776 : || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6893 : /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6894 : involving registers in the address. */
6895 3534149 : || GET_CODE (XEXP (x, 0)) == CLOBBER)
6896 61224697 : count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6897 :
6898 61874776 : count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6899 61874776 : return;
6900 :
6901 708127 : case ASM_OPERANDS:
6902 : /* Iterate over just the inputs, not the constraints as well. */
6903 1359298 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6904 651171 : count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6905 : return;
6906 :
6907 0 : case INSN_LIST:
6908 0 : case INT_LIST:
6909 0 : gcc_unreachable ();
6910 :
6911 723042673 : default:
6912 723042673 : break;
6913 : }
6914 :
6915 723042673 : fmt = GET_RTX_FORMAT (code);
6916 2005915980 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6917 : {
6918 1282873307 : if (fmt[i] == 'e')
6919 978470466 : count_reg_usage (XEXP (x, i), counts, dest, incr);
6920 304402841 : else if (fmt[i] == 'E')
6921 206762210 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6922 138443831 : count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6923 : }
6924 : }
6925 :
6926 : /* Return true if X is a dead register. */
6927 :
6928 : static inline bool
6929 782872902 : is_dead_reg (const_rtx x, int *counts)
6930 : {
6931 782872902 : return (REG_P (x)
6932 346794904 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
6933 217069300 : && counts[REGNO (x)] == 0);
6934 : }
6935 :
6936 : /* Return true if set is live. */
6937 : static bool
6938 372467990 : set_live_p (rtx set, int *counts)
6939 : {
6940 372467990 : if (set_noop_p (set))
6941 : return false;
6942 :
6943 372447122 : if (!is_dead_reg (SET_DEST (set), counts)
6944 8409608 : || side_effects_p (SET_SRC (set)))
6945 364101006 : return true;
6946 :
6947 : return false;
6948 : }
6949 :
6950 : /* Return true if insn is live. */
6951 :
6952 : static bool
6953 703554511 : insn_live_p (rtx_insn *insn, int *counts)
6954 : {
6955 703554511 : int i;
6956 703554511 : if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
6957 : return true;
6958 685056235 : else if (GET_CODE (PATTERN (insn)) == SET)
6959 313486147 : return set_live_p (PATTERN (insn), counts);
6960 371570088 : else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6961 : {
6962 119441996 : for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6963 : {
6964 118949895 : rtx elt = XVECEXP (PATTERN (insn), 0, i);
6965 :
6966 118949895 : if (GET_CODE (elt) == SET)
6967 : {
6968 58981843 : if (set_live_p (elt, counts))
6969 : return true;
6970 : }
6971 59968052 : else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6972 : return true;
6973 : }
6974 : return false;
6975 : }
6976 312462828 : else if (DEBUG_INSN_P (insn))
6977 : {
6978 296594781 : if (DEBUG_MARKER_INSN_P (insn))
6979 : return true;
6980 :
6981 228916457 : if (DEBUG_BIND_INSN_P (insn)
6982 228916457 : && TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
6983 : return false;
6984 :
6985 : return true;
6986 : }
6987 : else
6988 : return true;
6989 : }
6990 :
6991 : /* Count the number of stores into pseudo. Callback for note_stores. */
6992 :
6993 : static void
6994 257455368 : count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6995 : {
6996 257455368 : int *counts = (int *) data;
6997 257455368 : if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6998 96638259 : counts[REGNO (x)]++;
6999 257455368 : }
7000 :
7001 : /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
7002 : pseudo doesn't have a replacement. COUNTS[X] is zero if register X
7003 : is dead and REPLACEMENTS[X] is null if it has no replacemenet.
7004 : Set *SEEN_REPL to true if we see a dead register that does have
7005 : a replacement. */
7006 :
7007 : static bool
7008 228862822 : is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements,
7009 : bool *seen_repl)
7010 : {
7011 228862822 : subrtx_iterator::array_type array;
7012 635303768 : FOR_EACH_SUBRTX (iter, array, pat, NONCONST)
7013 : {
7014 406466422 : const_rtx x = *iter;
7015 470856041 : if (is_dead_reg (x, counts))
7016 : {
7017 49377 : if (replacements && replacements[REGNO (x)] != NULL_RTX)
7018 23901 : *seen_repl = true;
7019 : else
7020 25476 : return true;
7021 : }
7022 : }
7023 228837346 : return false;
7024 228862822 : }
7025 :
7026 : /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
7027 : Callback for simplify_replace_fn_rtx. */
7028 :
7029 : static rtx
7030 36860 : replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
7031 : {
7032 36860 : rtx *replacements = (rtx *) data;
7033 :
7034 36860 : if (REG_P (x)
7035 24700 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
7036 61537 : && replacements[REGNO (x)] != NULL_RTX)
7037 : {
7038 23901 : if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
7039 : return replacements[REGNO (x)];
7040 0 : return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
7041 0 : GET_MODE (replacements[REGNO (x)]));
7042 : }
7043 : return NULL_RTX;
7044 : }
7045 :
7046 : /* Scan all the insns and delete any that are dead; i.e., they store a register
7047 : that is never used or they copy a register to itself.
7048 :
7049 : This is used to remove insns made obviously dead by cse, loop or other
7050 : optimizations. It improves the heuristics in loop since it won't try to
7051 : move dead invariants out of loops or make givs for dead quantities. The
7052 : remaining passes of the compilation are also sped up. */
7053 :
7054 : int
7055 6369544 : delete_trivially_dead_insns (rtx_insn *insns, int nreg)
7056 : {
7057 6369544 : int *counts;
7058 6369544 : rtx_insn *insn, *prev;
7059 6369544 : rtx *replacements = NULL;
7060 6369544 : int ndead = 0;
7061 :
7062 6369544 : timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7063 : /* First count the number of times each register is used. */
7064 6369544 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7065 : {
7066 2652954 : counts = XCNEWVEC (int, nreg * 3);
7067 606745236 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7068 604092282 : if (DEBUG_BIND_INSN_P (insn))
7069 : {
7070 229233139 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7071 : NULL_RTX, 1);
7072 229233139 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 0;
7073 : }
7074 374859143 : else if (INSN_P (insn))
7075 : {
7076 301499155 : count_reg_usage (insn, counts, NULL_RTX, 1);
7077 301499155 : note_stores (insn, count_stores, counts + nreg * 2);
7078 : }
7079 : /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7080 : First one counts how many times each pseudo is used outside
7081 : of debug insns, second counts how many times each pseudo is
7082 : used in debug insns and third counts how many times a pseudo
7083 : is stored. */
7084 : }
7085 : else
7086 : {
7087 3716590 : counts = XCNEWVEC (int, nreg);
7088 227641408 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7089 220208228 : if (INSN_P (insn))
7090 172822217 : count_reg_usage (insn, counts, NULL_RTX, 1);
7091 : /* If no debug insns can be present, COUNTS is just an array
7092 : which counts how many times each pseudo is used. */
7093 : }
7094 : /* Pseudo PIC register should be considered as used due to possible
7095 : new usages generated. */
7096 6369544 : if (!reload_completed
7097 6369544 : && pic_offset_table_rtx
7098 6586841 : && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
7099 217297 : counts[REGNO (pic_offset_table_rtx)]++;
7100 : /* Go from the last insn to the first and delete insns that only set unused
7101 : registers or copy a register to itself. As we delete an insn, remove
7102 : usage counts for registers it uses.
7103 :
7104 : The first jump optimization pass may leave a real insn as the last
7105 : insn in the function. We must not skip that insn or we may end
7106 : up deleting code that is not really dead.
7107 :
7108 : If some otherwise unused register is only used in DEBUG_INSNs,
7109 : try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7110 : the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7111 : has been created for the unused register, replace it with
7112 : the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7113 6369544 : auto_vec<tree, 32> later_debug_set_vars;
7114 830670054 : for (insn = get_last_insn (); insn; insn = prev)
7115 : {
7116 824300510 : int live_insn = 0;
7117 :
7118 824300510 : prev = PREV_INSN (insn);
7119 824300510 : if (!INSN_P (insn))
7120 120745999 : continue;
7121 :
7122 703554511 : live_insn = insn_live_p (insn, counts);
7123 :
7124 : /* If this is a dead insn, delete it and show registers in it aren't
7125 : being used. */
7126 :
7127 703554511 : if (! live_insn && dbg_cnt (delete_trivial_dead))
7128 : {
7129 8489269 : if (DEBUG_INSN_P (insn))
7130 : {
7131 386748 : if (DEBUG_BIND_INSN_P (insn))
7132 386748 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7133 : NULL_RTX, -1);
7134 : }
7135 : else
7136 : {
7137 8102521 : rtx set;
7138 8102521 : if (MAY_HAVE_DEBUG_BIND_INSNS
7139 3959358 : && (set = single_set (insn)) != NULL_RTX
7140 3959358 : && is_dead_reg (SET_DEST (set), counts)
7141 : /* Used at least once in some DEBUG_INSN. */
7142 3953592 : && counts[REGNO (SET_DEST (set)) + nreg] > 0
7143 : /* And set exactly once. */
7144 17431 : && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
7145 16432 : && !side_effects_p (SET_SRC (set))
7146 8118953 : && asm_noperands (PATTERN (insn)) < 0)
7147 : {
7148 16431 : rtx dval, bind_var_loc;
7149 16431 : rtx_insn *bind;
7150 :
7151 : /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7152 16431 : dval = make_debug_expr_from_rtl (SET_DEST (set));
7153 :
7154 : /* Emit a debug bind insn before the insn in which
7155 : reg dies. */
7156 16431 : bind_var_loc =
7157 16431 : gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
7158 : DEBUG_EXPR_TREE_DECL (dval),
7159 : SET_SRC (set),
7160 : VAR_INIT_STATUS_INITIALIZED);
7161 16431 : count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
7162 :
7163 16431 : bind = emit_debug_insn_before (bind_var_loc, insn);
7164 16431 : df_insn_rescan (bind);
7165 :
7166 16431 : if (replacements == NULL)
7167 8865 : replacements = XCNEWVEC (rtx, nreg);
7168 16431 : replacements[REGNO (SET_DEST (set))] = dval;
7169 : }
7170 :
7171 8102521 : count_reg_usage (insn, counts, NULL_RTX, -1);
7172 8102521 : ndead++;
7173 : }
7174 8489269 : cse_cfg_altered |= delete_insn_and_edges (insn);
7175 : }
7176 : else
7177 : {
7178 695065242 : if (!DEBUG_INSN_P (insn) || DEBUG_MARKER_INSN_P (insn))
7179 : {
7180 1627204407 : for (tree var : later_debug_set_vars)
7181 228547854 : TREE_VISITED (var) = 0;
7182 466218851 : later_debug_set_vars.truncate (0);
7183 : }
7184 228846391 : else if (DEBUG_BIND_INSN_P (insn)
7185 228846391 : && !TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
7186 : {
7187 228840252 : later_debug_set_vars.safe_push (INSN_VAR_LOCATION_DECL (insn));
7188 228840252 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 1;
7189 : }
7190 : }
7191 : }
7192 :
7193 6369544 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7194 : {
7195 602415561 : for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
7196 599762607 : if (DEBUG_BIND_INSN_P (insn))
7197 : {
7198 : /* If this debug insn references a dead register that wasn't replaced
7199 : with an DEBUG_EXPR, reset the DEBUG_INSN. */
7200 228862822 : bool seen_repl = false;
7201 228862822 : if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn),
7202 : counts, replacements, &seen_repl))
7203 : {
7204 25476 : INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
7205 25476 : df_insn_rescan (insn);
7206 : }
7207 228837346 : else if (seen_repl)
7208 : {
7209 23811 : INSN_VAR_LOCATION_LOC (insn)
7210 23811 : = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
7211 : NULL_RTX, replace_dead_reg,
7212 : replacements);
7213 23811 : df_insn_rescan (insn);
7214 : }
7215 : }
7216 2652954 : free (replacements);
7217 : }
7218 :
7219 6369544 : if (dump_file && ndead)
7220 26 : fprintf (dump_file, "Deleted %i trivially dead insns\n",
7221 : ndead);
7222 : /* Clean up. */
7223 6369544 : free (counts);
7224 6369544 : timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7225 6369544 : return ndead;
7226 6369544 : }
7227 :
7228 : /* If LOC contains references to NEWREG in a different mode, change them
7229 : to use NEWREG instead. */
7230 :
7231 : static void
7232 56416 : cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
7233 : rtx *loc, rtx_insn *insn, rtx newreg)
7234 : {
7235 351495 : FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
7236 : {
7237 295079 : rtx *loc = *iter;
7238 295079 : rtx x = *loc;
7239 295079 : if (x
7240 266871 : && REG_P (x)
7241 65791 : && REGNO (x) == REGNO (newreg)
7242 343528 : && GET_MODE (x) != GET_MODE (newreg))
7243 : {
7244 48449 : validate_change (insn, loc, newreg, 1);
7245 48449 : iter.skip_subrtxes ();
7246 : }
7247 : }
7248 56416 : }
7249 :
7250 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7251 : GET_MODE (NEWREG) in INSN. */
7252 :
7253 : static void
7254 28208 : cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
7255 : {
7256 28208 : int success;
7257 :
7258 28208 : if (!INSN_P (insn))
7259 0 : return;
7260 :
7261 28208 : subrtx_ptr_iterator::array_type array;
7262 28208 : cse_change_cc_mode (array, &PATTERN (insn), insn, newreg);
7263 28208 : cse_change_cc_mode (array, ®_NOTES (insn), insn, newreg);
7264 :
7265 : /* If the following assertion was triggered, there is most probably
7266 : something wrong with the cc_modes_compatible back end function.
7267 : CC modes only can be considered compatible if the insn - with the mode
7268 : replaced by any of the compatible modes - can still be recognized. */
7269 28208 : success = apply_change_group ();
7270 28208 : gcc_assert (success);
7271 28208 : }
7272 :
7273 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7274 : GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7275 : any instruction which modifies NEWREG. */
7276 :
7277 : static void
7278 19409 : cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
7279 : {
7280 19409 : rtx_insn *insn;
7281 :
7282 39237 : for (insn = start; insn != end; insn = NEXT_INSN (insn))
7283 : {
7284 21308 : if (! INSN_P (insn))
7285 0 : continue;
7286 :
7287 21308 : if (reg_set_p (newreg, insn))
7288 : return;
7289 :
7290 19828 : cse_change_cc_mode_insn (insn, newreg);
7291 : }
7292 : }
7293 :
7294 : /* BB is a basic block which finishes with CC_REG as a condition code
7295 : register which is set to CC_SRC. Look through the successors of BB
7296 : to find blocks which have a single predecessor (i.e., this one),
7297 : and look through those blocks for an assignment to CC_REG which is
7298 : equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7299 : permitted to change the mode of CC_SRC to a compatible mode. This
7300 : returns VOIDmode if no equivalent assignments were found.
7301 : Otherwise it returns the mode which CC_SRC should wind up with.
7302 : ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7303 : but is passed unmodified down to recursive calls in order to prevent
7304 : endless recursion.
7305 :
7306 : The main complexity in this function is handling the mode issues.
7307 : We may have more than one duplicate which we can eliminate, and we
7308 : try to find a mode which will work for multiple duplicates. */
7309 :
7310 : static machine_mode
7311 5588162 : cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7312 : bool can_change_mode)
7313 : {
7314 5588162 : bool found_equiv;
7315 5588162 : machine_mode mode;
7316 5588162 : unsigned int insn_count;
7317 5588162 : edge e;
7318 5588162 : rtx_insn *insns[2];
7319 5588162 : machine_mode modes[2];
7320 5588162 : rtx_insn *last_insns[2];
7321 5588162 : unsigned int i;
7322 5588162 : rtx newreg;
7323 5588162 : edge_iterator ei;
7324 :
7325 : /* We expect to have two successors. Look at both before picking
7326 : the final mode for the comparison. If we have more successors
7327 : (i.e., some sort of table jump, although that seems unlikely),
7328 : then we require all beyond the first two to use the same
7329 : mode. */
7330 :
7331 5588162 : found_equiv = false;
7332 5588162 : mode = GET_MODE (cc_src);
7333 5588162 : insn_count = 0;
7334 15798865 : FOR_EACH_EDGE (e, ei, bb->succs)
7335 : {
7336 10210703 : rtx_insn *insn;
7337 10210703 : rtx_insn *end;
7338 :
7339 10210703 : if (e->flags & EDGE_COMPLEX)
7340 32867 : continue;
7341 :
7342 10177836 : if (EDGE_COUNT (e->dest->preds) != 1
7343 5660895 : || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
7344 : /* Avoid endless recursion on unreachable blocks. */
7345 15743725 : || e->dest == orig_bb)
7346 4611947 : continue;
7347 :
7348 5565889 : end = NEXT_INSN (BB_END (e->dest));
7349 34646439 : for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7350 : {
7351 33496218 : rtx set;
7352 :
7353 33496218 : if (! INSN_P (insn))
7354 7535694 : continue;
7355 :
7356 : /* If CC_SRC is modified, we have to stop looking for
7357 : something which uses it. */
7358 25960524 : if (modified_in_p (cc_src, insn))
7359 : break;
7360 :
7361 : /* Check whether INSN sets CC_REG to CC_SRC. */
7362 25480062 : set = single_set (insn);
7363 25480062 : if (set
7364 11303190 : && REG_P (SET_DEST (set))
7365 35335526 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7366 : {
7367 1367334 : bool found;
7368 1367334 : machine_mode set_mode;
7369 1367334 : machine_mode comp_mode;
7370 :
7371 1367334 : found = false;
7372 1367334 : set_mode = GET_MODE (SET_SRC (set));
7373 1367334 : comp_mode = set_mode;
7374 1367334 : if (rtx_equal_p (cc_src, SET_SRC (set)))
7375 : found = true;
7376 1361056 : else if (GET_CODE (cc_src) == COMPARE
7377 1291365 : && GET_CODE (SET_SRC (set)) == COMPARE
7378 1241706 : && mode != set_mode
7379 348651 : && rtx_equal_p (XEXP (cc_src, 0),
7380 348651 : XEXP (SET_SRC (set), 0))
7381 1421803 : && rtx_equal_p (XEXP (cc_src, 1),
7382 60747 : XEXP (SET_SRC (set), 1)))
7383 :
7384 : {
7385 19413 : comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7386 19413 : if (comp_mode != VOIDmode
7387 19413 : && (can_change_mode || comp_mode == mode))
7388 : found = true;
7389 : }
7390 :
7391 25687 : if (found)
7392 : {
7393 25687 : found_equiv = true;
7394 25687 : if (insn_count < ARRAY_SIZE (insns))
7395 : {
7396 25687 : insns[insn_count] = insn;
7397 25687 : modes[insn_count] = set_mode;
7398 25687 : last_insns[insn_count] = end;
7399 25687 : ++insn_count;
7400 :
7401 25687 : if (mode != comp_mode)
7402 : {
7403 8380 : gcc_assert (can_change_mode);
7404 8380 : mode = comp_mode;
7405 :
7406 : /* The modified insn will be re-recognized later. */
7407 8380 : PUT_MODE (cc_src, mode);
7408 : }
7409 : }
7410 : else
7411 : {
7412 0 : if (set_mode != mode)
7413 : {
7414 : /* We found a matching expression in the
7415 : wrong mode, but we don't have room to
7416 : store it in the array. Punt. This case
7417 : should be rare. */
7418 : break;
7419 : }
7420 : /* INSN sets CC_REG to a value equal to CC_SRC
7421 : with the right mode. We can simply delete
7422 : it. */
7423 0 : delete_insn (insn);
7424 : }
7425 :
7426 : /* We found an instruction to delete. Keep looking,
7427 : in the hopes of finding a three-way jump. */
7428 25687 : continue;
7429 : }
7430 :
7431 : /* We found an instruction which sets the condition
7432 : code, so don't look any farther. */
7433 : break;
7434 : }
7435 :
7436 : /* If INSN sets CC_REG in some other way, don't look any
7437 : farther. */
7438 24112728 : if (reg_set_p (cc_reg, insn))
7439 : break;
7440 : }
7441 :
7442 : /* If we fell off the bottom of the block, we can keep looking
7443 : through successors. We pass CAN_CHANGE_MODE as false because
7444 : we aren't prepared to handle compatibility between the
7445 : further blocks and this block. */
7446 5565889 : if (insn == end)
7447 : {
7448 1150221 : machine_mode submode;
7449 :
7450 1150221 : submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7451 1150221 : if (submode != VOIDmode)
7452 : {
7453 295 : gcc_assert (submode == mode);
7454 : found_equiv = true;
7455 : can_change_mode = false;
7456 : }
7457 : }
7458 : }
7459 :
7460 5588162 : if (! found_equiv)
7461 : return VOIDmode;
7462 :
7463 : /* Now INSN_COUNT is the number of instructions we found which set
7464 : CC_REG to a value equivalent to CC_SRC. The instructions are in
7465 : INSNS. The modes used by those instructions are in MODES. */
7466 :
7467 : newreg = NULL_RTX;
7468 51400 : for (i = 0; i < insn_count; ++i)
7469 : {
7470 25687 : if (modes[i] != mode)
7471 : {
7472 : /* We need to change the mode of CC_REG in INSNS[i] and
7473 : subsequent instructions. */
7474 11029 : if (! newreg)
7475 : {
7476 10766 : if (GET_MODE (cc_reg) == mode)
7477 : newreg = cc_reg;
7478 : else
7479 7487 : newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7480 : }
7481 11029 : cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7482 : newreg);
7483 : }
7484 :
7485 25687 : cse_cfg_altered |= delete_insn_and_edges (insns[i]);
7486 : }
7487 :
7488 : return mode;
7489 : }
7490 :
7491 : /* If we have a fixed condition code register (or two), walk through
7492 : the instructions and try to eliminate duplicate assignments. */
7493 :
7494 : static void
7495 960351 : cse_condition_code_reg (void)
7496 : {
7497 960351 : unsigned int cc_regno_1;
7498 960351 : unsigned int cc_regno_2;
7499 960351 : rtx cc_reg_1;
7500 960351 : rtx cc_reg_2;
7501 960351 : basic_block bb;
7502 :
7503 960351 : if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7504 0 : return;
7505 :
7506 960351 : cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7507 960351 : if (cc_regno_2 != INVALID_REGNUM)
7508 0 : cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7509 : else
7510 : cc_reg_2 = NULL_RTX;
7511 :
7512 10776178 : FOR_EACH_BB_FN (bb, cfun)
7513 : {
7514 9815827 : rtx_insn *last_insn;
7515 9815827 : rtx cc_reg;
7516 9815827 : rtx_insn *insn;
7517 9815827 : rtx_insn *cc_src_insn;
7518 9815827 : rtx cc_src;
7519 9815827 : machine_mode mode;
7520 9815827 : machine_mode orig_mode;
7521 :
7522 : /* Look for blocks which end with a conditional jump based on a
7523 : condition code register. Then look for the instruction which
7524 : sets the condition code register. Then look through the
7525 : successor blocks for instructions which set the condition
7526 : code register to the same value. There are other possible
7527 : uses of the condition code register, but these are by far the
7528 : most common and the ones which we are most likely to be able
7529 : to optimize. */
7530 :
7531 9815827 : last_insn = BB_END (bb);
7532 9815827 : if (!JUMP_P (last_insn))
7533 5233509 : continue;
7534 :
7535 4582318 : if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7536 : cc_reg = cc_reg_1;
7537 9934 : else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7538 : cc_reg = cc_reg_2;
7539 : else
7540 9934 : continue;
7541 :
7542 4572384 : cc_src_insn = NULL;
7543 4572384 : cc_src = NULL_RTX;
7544 4747390 : for (insn = PREV_INSN (last_insn);
7545 4747390 : insn && insn != PREV_INSN (BB_HEAD (bb));
7546 175006 : insn = PREV_INSN (insn))
7547 : {
7548 4630065 : rtx set;
7549 :
7550 4630065 : if (! INSN_P (insn))
7551 126042 : continue;
7552 4504023 : set = single_set (insn);
7553 4504023 : if (set
7554 4446052 : && REG_P (SET_DEST (set))
7555 8949240 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7556 : {
7557 4437958 : cc_src_insn = insn;
7558 4437958 : cc_src = SET_SRC (set);
7559 4437958 : break;
7560 : }
7561 66065 : else if (reg_set_p (cc_reg, insn))
7562 : break;
7563 : }
7564 :
7565 4572384 : if (! cc_src_insn)
7566 134426 : continue;
7567 :
7568 4437958 : if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7569 17 : continue;
7570 :
7571 : /* Now CC_REG is a condition code register used for a
7572 : conditional jump at the end of the block, and CC_SRC, in
7573 : CC_SRC_INSN, is the value to which that condition code
7574 : register is set, and CC_SRC is still meaningful at the end of
7575 : the basic block. */
7576 :
7577 4437941 : orig_mode = GET_MODE (cc_src);
7578 4437941 : mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7579 4437941 : if (mode != VOIDmode)
7580 : {
7581 25418 : gcc_assert (mode == GET_MODE (cc_src));
7582 25418 : if (mode != orig_mode)
7583 : {
7584 8380 : rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7585 :
7586 8380 : cse_change_cc_mode_insn (cc_src_insn, newreg);
7587 :
7588 : /* Do the same in the following insns that use the
7589 : current value of CC_REG within BB. */
7590 8380 : cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7591 : NEXT_INSN (last_insn),
7592 : newreg);
7593 : }
7594 : }
7595 : }
7596 : }
7597 :
7598 :
7599 : /* Perform common subexpression elimination. Nonzero value from
7600 : `cse_main' means that jumps were simplified and some code may now
7601 : be unreachable, so do jump optimization again. */
7602 : static unsigned int
7603 1040227 : rest_of_handle_cse (void)
7604 : {
7605 1040227 : int tem;
7606 :
7607 1040227 : if (dump_file)
7608 32 : dump_flow_info (dump_file, dump_flags);
7609 :
7610 1040227 : tem = cse_main (get_insns (), max_reg_num ());
7611 :
7612 : /* If we are not running more CSE passes, then we are no longer
7613 : expecting CSE to be run. But always rerun it in a cheap mode. */
7614 1040227 : cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7615 :
7616 1040227 : if (tem == 2)
7617 : {
7618 5395 : timevar_push (TV_JUMP);
7619 5395 : rebuild_jump_labels (get_insns ());
7620 5395 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7621 5395 : timevar_pop (TV_JUMP);
7622 : }
7623 1034832 : else if (tem == 1 || optimize > 1)
7624 955309 : cse_cfg_altered |= cleanup_cfg (0);
7625 :
7626 1040227 : return 0;
7627 : }
7628 :
7629 : namespace {
7630 :
7631 : const pass_data pass_data_cse =
7632 : {
7633 : RTL_PASS, /* type */
7634 : "cse1", /* name */
7635 : OPTGROUP_NONE, /* optinfo_flags */
7636 : TV_CSE, /* tv_id */
7637 : 0, /* properties_required */
7638 : 0, /* properties_provided */
7639 : 0, /* properties_destroyed */
7640 : 0, /* todo_flags_start */
7641 : TODO_df_finish, /* todo_flags_finish */
7642 : };
7643 :
7644 : class pass_cse : public rtl_opt_pass
7645 : {
7646 : public:
7647 287872 : pass_cse (gcc::context *ctxt)
7648 575744 : : rtl_opt_pass (pass_data_cse, ctxt)
7649 : {}
7650 :
7651 : /* opt_pass methods: */
7652 1480955 : bool gate (function *) final override { return optimize > 0; }
7653 1040227 : unsigned int execute (function *) final override
7654 : {
7655 1040227 : return rest_of_handle_cse ();
7656 : }
7657 :
7658 : }; // class pass_cse
7659 :
7660 : } // anon namespace
7661 :
7662 : rtl_opt_pass *
7663 287872 : make_pass_cse (gcc::context *ctxt)
7664 : {
7665 287872 : return new pass_cse (ctxt);
7666 : }
7667 :
7668 :
7669 : /* Run second CSE pass after loop optimizations. */
7670 : static unsigned int
7671 960351 : rest_of_handle_cse2 (void)
7672 : {
7673 960351 : int tem;
7674 :
7675 960351 : if (dump_file)
7676 22 : dump_flow_info (dump_file, dump_flags);
7677 :
7678 960351 : tem = cse_main (get_insns (), max_reg_num ());
7679 :
7680 : /* Run a pass to eliminate duplicated assignments to condition code
7681 : registers. We have to run this after bypass_jumps, because it
7682 : makes it harder for that pass to determine whether a jump can be
7683 : bypassed safely. */
7684 960351 : cse_condition_code_reg ();
7685 :
7686 960351 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7687 :
7688 960351 : if (tem == 2)
7689 : {
7690 1810 : timevar_push (TV_JUMP);
7691 1810 : rebuild_jump_labels (get_insns ());
7692 1810 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7693 1810 : timevar_pop (TV_JUMP);
7694 : }
7695 958541 : else if (tem == 1 || cse_cfg_altered)
7696 108 : cse_cfg_altered |= cleanup_cfg (0);
7697 :
7698 960351 : cse_not_expected = 1;
7699 960351 : return 0;
7700 : }
7701 :
7702 :
7703 : namespace {
7704 :
7705 : const pass_data pass_data_cse2 =
7706 : {
7707 : RTL_PASS, /* type */
7708 : "cse2", /* name */
7709 : OPTGROUP_NONE, /* optinfo_flags */
7710 : TV_CSE2, /* tv_id */
7711 : 0, /* properties_required */
7712 : 0, /* properties_provided */
7713 : 0, /* properties_destroyed */
7714 : 0, /* todo_flags_start */
7715 : TODO_df_finish, /* todo_flags_finish */
7716 : };
7717 :
7718 : class pass_cse2 : public rtl_opt_pass
7719 : {
7720 : public:
7721 287872 : pass_cse2 (gcc::context *ctxt)
7722 575744 : : rtl_opt_pass (pass_data_cse2, ctxt)
7723 : {}
7724 :
7725 : /* opt_pass methods: */
7726 1480955 : bool gate (function *) final override
7727 : {
7728 1480955 : return optimize > 0 && flag_rerun_cse_after_loop;
7729 : }
7730 :
7731 960351 : unsigned int execute (function *) final override
7732 : {
7733 960351 : return rest_of_handle_cse2 ();
7734 : }
7735 :
7736 : }; // class pass_cse2
7737 :
7738 : } // anon namespace
7739 :
7740 : rtl_opt_pass *
7741 287872 : make_pass_cse2 (gcc::context *ctxt)
7742 : {
7743 287872 : return new pass_cse2 (ctxt);
7744 : }
7745 :
7746 : /* Run second CSE pass after loop optimizations. */
7747 : static unsigned int
7748 290954 : rest_of_handle_cse_after_global_opts (void)
7749 : {
7750 290954 : int save_cfj;
7751 290954 : int tem;
7752 :
7753 : /* We only want to do local CSE, so don't follow jumps. */
7754 290954 : save_cfj = flag_cse_follow_jumps;
7755 290954 : flag_cse_follow_jumps = 0;
7756 :
7757 290954 : rebuild_jump_labels (get_insns ());
7758 290954 : tem = cse_main (get_insns (), max_reg_num ());
7759 290954 : cse_cfg_altered |= purge_all_dead_edges ();
7760 290954 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7761 :
7762 290954 : cse_not_expected = !flag_rerun_cse_after_loop;
7763 :
7764 : /* If cse altered any jumps, rerun jump opts to clean things up. */
7765 290954 : if (tem == 2)
7766 : {
7767 296 : timevar_push (TV_JUMP);
7768 296 : rebuild_jump_labels (get_insns ());
7769 296 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7770 296 : timevar_pop (TV_JUMP);
7771 : }
7772 290658 : else if (tem == 1 || cse_cfg_altered)
7773 4785 : cse_cfg_altered |= cleanup_cfg (0);
7774 :
7775 290954 : flag_cse_follow_jumps = save_cfj;
7776 290954 : return 0;
7777 : }
7778 :
7779 : namespace {
7780 :
7781 : const pass_data pass_data_cse_after_global_opts =
7782 : {
7783 : RTL_PASS, /* type */
7784 : "cse_local", /* name */
7785 : OPTGROUP_NONE, /* optinfo_flags */
7786 : TV_CSE, /* tv_id */
7787 : 0, /* properties_required */
7788 : 0, /* properties_provided */
7789 : 0, /* properties_destroyed */
7790 : 0, /* todo_flags_start */
7791 : TODO_df_finish, /* todo_flags_finish */
7792 : };
7793 :
7794 : class pass_cse_after_global_opts : public rtl_opt_pass
7795 : {
7796 : public:
7797 287872 : pass_cse_after_global_opts (gcc::context *ctxt)
7798 575744 : : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt)
7799 : {}
7800 :
7801 : /* opt_pass methods: */
7802 1480955 : bool gate (function *) final override
7803 : {
7804 1480955 : return optimize > 0 && flag_rerun_cse_after_global_opts;
7805 : }
7806 :
7807 290954 : unsigned int execute (function *) final override
7808 : {
7809 290954 : return rest_of_handle_cse_after_global_opts ();
7810 : }
7811 :
7812 : }; // class pass_cse_after_global_opts
7813 :
7814 : } // anon namespace
7815 :
7816 : rtl_opt_pass *
7817 287872 : make_pass_cse_after_global_opts (gcc::context *ctxt)
7818 : {
7819 287872 : return new pass_cse_after_global_opts (ctxt);
7820 : }
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