Line data Source code
1 : /* Common subexpression elimination for GNU compiler.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : #include "config.h"
21 : #include "system.h"
22 : #include "coretypes.h"
23 : #include "backend.h"
24 : #include "target.h"
25 : #include "rtl.h"
26 : #include "stmt.h"
27 : #include "tree.h"
28 : #include "cfghooks.h"
29 : #include "df.h"
30 : #include "memmodel.h"
31 : #include "tm_p.h"
32 : #include "insn-config.h"
33 : #include "regs.h"
34 : #include "emit-rtl.h"
35 : #include "recog.h"
36 : #include "cfgrtl.h"
37 : #include "cfganal.h"
38 : #include "cfgcleanup.h"
39 : #include "alias.h"
40 : #include "toplev.h"
41 : #include "rtlhooks-def.h"
42 : #include "tree-pass.h"
43 : #include "dbgcnt.h"
44 : #include "rtl-iter.h"
45 : #include "function-abi.h"
46 : #include "rtlanal.h"
47 : #include "expr.h"
48 :
49 : /* The basic idea of common subexpression elimination is to go
50 : through the code, keeping a record of expressions that would
51 : have the same value at the current scan point, and replacing
52 : expressions encountered with the cheapest equivalent expression.
53 :
54 : It is too complicated to keep track of the different possibilities
55 : when control paths merge in this code; so, at each label, we forget all
56 : that is known and start fresh. This can be described as processing each
57 : extended basic block separately. We have a separate pass to perform
58 : global CSE.
59 :
60 : Note CSE can turn a conditional or computed jump into a nop or
61 : an unconditional jump. When this occurs we arrange to run the jump
62 : optimizer after CSE to delete the unreachable code.
63 :
64 : We use two data structures to record the equivalent expressions:
65 : a hash table for most expressions, and a vector of "quantity
66 : numbers" to record equivalent (pseudo) registers.
67 :
68 : The use of the special data structure for registers is desirable
69 : because it is faster. It is possible because registers references
70 : contain a fairly small number, the register number, taken from
71 : a contiguously allocated series, and two register references are
72 : identical if they have the same number. General expressions
73 : do not have any such thing, so the only way to retrieve the
74 : information recorded on an expression other than a register
75 : is to keep it in a hash table.
76 :
77 : Registers and "quantity numbers":
78 :
79 : At the start of each basic block, all of the (hardware and pseudo)
80 : registers used in the function are given distinct quantity
81 : numbers to indicate their contents. During scan, when the code
82 : copies one register into another, we copy the quantity number.
83 : When a register is loaded in any other way, we allocate a new
84 : quantity number to describe the value generated by this operation.
85 : `REG_QTY (N)' records what quantity register N is currently thought
86 : of as containing.
87 :
88 : All real quantity numbers are greater than or equal to zero.
89 : If register N has not been assigned a quantity, `REG_QTY (N)' will
90 : equal -N - 1, which is always negative.
91 :
92 : Quantity numbers below zero do not exist and none of the `qty_table'
93 : entries should be referenced with a negative index.
94 :
95 : We also maintain a bidirectional chain of registers for each
96 : quantity number. The `qty_table` members `first_reg' and `last_reg',
97 : and `reg_eqv_table' members `next' and `prev' hold these chains.
98 :
99 : The first register in a chain is the one whose lifespan is least local.
100 : Among equals, it is the one that was seen first.
101 : We replace any equivalent register with that one.
102 :
103 : If two registers have the same quantity number, it must be true that
104 : REG expressions with qty_table `mode' must be in the hash table for both
105 : registers and must be in the same class.
106 :
107 : The converse is not true. Since hard registers may be referenced in
108 : any mode, two REG expressions might be equivalent in the hash table
109 : but not have the same quantity number if the quantity number of one
110 : of the registers is not the same mode as those expressions.
111 :
112 : Constants and quantity numbers
113 :
114 : When a quantity has a known constant value, that value is stored
115 : in the appropriate qty_table `const_rtx'. This is in addition to
116 : putting the constant in the hash table as is usual for non-regs.
117 :
118 : Whether a reg or a constant is preferred is determined by the configuration
119 : macro CONST_COSTS and will often depend on the constant value. In any
120 : event, expressions containing constants can be simplified, by fold_rtx.
121 :
122 : When a quantity has a known nearly constant value (such as an address
123 : of a stack slot), that value is stored in the appropriate qty_table
124 : `const_rtx'.
125 :
126 : Integer constants don't have a machine mode. However, cse
127 : determines the intended machine mode from the destination
128 : of the instruction that moves the constant. The machine mode
129 : is recorded in the hash table along with the actual RTL
130 : constant expression so that different modes are kept separate.
131 :
132 : Other expressions:
133 :
134 : To record known equivalences among expressions in general
135 : we use a hash table called `table'. It has a fixed number of buckets
136 : that contain chains of `struct table_elt' elements for expressions.
137 : These chains connect the elements whose expressions have the same
138 : hash codes.
139 :
140 : Other chains through the same elements connect the elements which
141 : currently have equivalent values.
142 :
143 : Register references in an expression are canonicalized before hashing
144 : the expression. This is done using `reg_qty' and qty_table `first_reg'.
145 : The hash code of a register reference is computed using the quantity
146 : number, not the register number.
147 :
148 : When the value of an expression changes, it is necessary to remove from the
149 : hash table not just that expression but all expressions whose values
150 : could be different as a result.
151 :
152 : 1. If the value changing is in memory, except in special cases
153 : ANYTHING referring to memory could be changed. That is because
154 : nobody knows where a pointer does not point.
155 : The function `invalidate_memory' removes what is necessary.
156 :
157 : The special cases are when the address is constant or is
158 : a constant plus a fixed register such as the frame pointer
159 : or a static chain pointer. When such addresses are stored in,
160 : we can tell exactly which other such addresses must be invalidated
161 : due to overlap. `invalidate' does this.
162 : All expressions that refer to non-constant
163 : memory addresses are also invalidated. `invalidate_memory' does this.
164 :
165 : 2. If the value changing is a register, all expressions
166 : containing references to that register, and only those,
167 : must be removed.
168 :
169 : Because searching the entire hash table for expressions that contain
170 : a register is very slow, we try to figure out when it isn't necessary.
171 : Precisely, this is necessary only when expressions have been
172 : entered in the hash table using this register, and then the value has
173 : changed, and then another expression wants to be added to refer to
174 : the register's new value. This sequence of circumstances is rare
175 : within any one basic block.
176 :
177 : `REG_TICK' and `REG_IN_TABLE', accessors for members of
178 : cse_reg_info, are used to detect this case. REG_TICK (i) is
179 : incremented whenever a value is stored in register i.
180 : REG_IN_TABLE (i) holds -1 if no references to register i have been
181 : entered in the table; otherwise, it contains the value REG_TICK (i)
182 : had when the references were entered. If we want to enter a
183 : reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
184 : remove old references. Until we want to enter a new entry, the
185 : mere fact that the two vectors don't match makes the entries be
186 : ignored if anyone tries to match them.
187 :
188 : Registers themselves are entered in the hash table as well as in
189 : the equivalent-register chains. However, `REG_TICK' and
190 : `REG_IN_TABLE' do not apply to expressions which are simple
191 : register references. These expressions are removed from the table
192 : immediately when they become invalid, and this can be done even if
193 : we do not immediately search for all the expressions that refer to
194 : the register.
195 :
196 : A CLOBBER rtx in an instruction invalidates its operand for further
197 : reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
198 : invalidates everything that resides in memory.
199 :
200 : Related expressions:
201 :
202 : Constant expressions that differ only by an additive integer
203 : are called related. When a constant expression is put in
204 : the table, the related expression with no constant term
205 : is also entered. These are made to point at each other
206 : so that it is possible to find out if there exists any
207 : register equivalent to an expression related to a given expression. */
208 :
209 : /* Length of qty_table vector. We know in advance we will not need
210 : a quantity number this big. */
211 :
212 : static int max_qty;
213 :
214 : /* Next quantity number to be allocated.
215 : This is 1 + the largest number needed so far. */
216 :
217 : static int next_qty;
218 :
219 : /* Per-qty information tracking.
220 :
221 : `first_reg' and `last_reg' track the head and tail of the
222 : chain of registers which currently contain this quantity.
223 :
224 : `mode' contains the machine mode of this quantity.
225 :
226 : `const_rtx' holds the rtx of the constant value of this
227 : quantity, if known. A summations of the frame/arg pointer
228 : and a constant can also be entered here. When this holds
229 : a known value, `const_insn' is the insn which stored the
230 : constant value.
231 :
232 : `comparison_{code,const,qty}' are used to track when a
233 : comparison between a quantity and some constant or register has
234 : been passed. In such a case, we know the results of the comparison
235 : in case we see it again. These members record a comparison that
236 : is known to be true. `comparison_code' holds the rtx code of such
237 : a comparison, else it is set to UNKNOWN and the other two
238 : comparison members are undefined. `comparison_const' holds
239 : the constant being compared against, or zero if the comparison
240 : is not against a constant. `comparison_qty' holds the quantity
241 : being compared against when the result is known. If the comparison
242 : is not with a register, `comparison_qty' is INT_MIN. */
243 :
244 : struct qty_table_elem
245 : {
246 : rtx const_rtx;
247 : rtx_insn *const_insn;
248 : rtx comparison_const;
249 : int comparison_qty;
250 : unsigned int first_reg, last_reg;
251 : machine_mode mode : MACHINE_MODE_BITSIZE;
252 : enum rtx_code comparison_code : RTX_CODE_BITSIZE;
253 : };
254 :
255 : /* The table of all qtys, indexed by qty number. */
256 : static struct qty_table_elem *qty_table;
257 :
258 : /* Insn being scanned. */
259 :
260 : static rtx_insn *this_insn;
261 : static bool optimize_this_for_speed_p;
262 :
263 : /* Index by register number, gives the number of the next (or
264 : previous) register in the chain of registers sharing the same
265 : value.
266 :
267 : Or -1 if this register is at the end of the chain.
268 :
269 : If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
270 :
271 : /* Per-register equivalence chain. */
272 : struct reg_eqv_elem
273 : {
274 : int next, prev;
275 : };
276 :
277 : /* The table of all register equivalence chains. */
278 : static struct reg_eqv_elem *reg_eqv_table;
279 :
280 : struct cse_reg_info
281 : {
282 : /* The timestamp at which this register is initialized. */
283 : unsigned int timestamp;
284 :
285 : /* The quantity number of the register's current contents. */
286 : int reg_qty;
287 :
288 : /* The number of times the register has been altered in the current
289 : basic block. */
290 : int reg_tick;
291 :
292 : /* The REG_TICK value at which rtx's containing this register are
293 : valid in the hash table. If this does not equal the current
294 : reg_tick value, such expressions existing in the hash table are
295 : invalid. */
296 : int reg_in_table;
297 :
298 : /* The SUBREG that was set when REG_TICK was last incremented. Set
299 : to -1 if the last store was to the whole register, not a subreg. */
300 : unsigned int subreg_ticked;
301 : };
302 :
303 : /* A table of cse_reg_info indexed by register numbers. */
304 : static struct cse_reg_info *cse_reg_info_table;
305 :
306 : /* The size of the above table. */
307 : static unsigned int cse_reg_info_table_size;
308 :
309 : /* The index of the first entry that has not been initialized. */
310 : static unsigned int cse_reg_info_table_first_uninitialized;
311 :
312 : /* The timestamp at the beginning of the current run of
313 : cse_extended_basic_block. We increment this variable at the beginning of
314 : the current run of cse_extended_basic_block. The timestamp field of a
315 : cse_reg_info entry matches the value of this variable if and only
316 : if the entry has been initialized during the current run of
317 : cse_extended_basic_block. */
318 : static unsigned int cse_reg_info_timestamp;
319 :
320 : /* A HARD_REG_SET containing all the hard registers for which there is
321 : currently a REG expression in the hash table. Note the difference
322 : from the above variables, which indicate if the REG is mentioned in some
323 : expression in the table. */
324 :
325 : static HARD_REG_SET hard_regs_in_table;
326 :
327 : /* True if CSE has altered the CFG. */
328 : static bool cse_cfg_altered;
329 :
330 : /* True if CSE has altered conditional jump insns in such a way
331 : that jump optimization should be redone. */
332 : static bool cse_jumps_altered;
333 :
334 : /* True if we put a LABEL_REF into the hash table for an INSN
335 : without a REG_LABEL_OPERAND, we have to rerun jump after CSE
336 : to put in the note. */
337 : static bool recorded_label_ref;
338 :
339 : /* canon_hash stores 1 in do_not_record if it notices a reference to PC or
340 : some other volatile subexpression. */
341 :
342 : static int do_not_record;
343 :
344 : /* canon_hash stores 1 in hash_arg_in_memory
345 : if it notices a reference to memory within the expression being hashed. */
346 :
347 : static int hash_arg_in_memory;
348 :
349 : /* The hash table contains buckets which are chains of `struct table_elt's,
350 : each recording one expression's information.
351 : That expression is in the `exp' field.
352 :
353 : The canon_exp field contains a canonical (from the point of view of
354 : alias analysis) version of the `exp' field.
355 :
356 : Those elements with the same hash code are chained in both directions
357 : through the `next_same_hash' and `prev_same_hash' fields.
358 :
359 : Each set of expressions with equivalent values
360 : are on a two-way chain through the `next_same_value'
361 : and `prev_same_value' fields, and all point with
362 : the `first_same_value' field at the first element in
363 : that chain. The chain is in order of increasing cost.
364 : Each element's cost value is in its `cost' field.
365 :
366 : The `in_memory' field is nonzero for elements that
367 : involve any reference to memory. These elements are removed
368 : whenever a write is done to an unidentified location in memory.
369 : To be safe, we assume that a memory address is unidentified unless
370 : the address is either a symbol constant or a constant plus
371 : the frame pointer or argument pointer.
372 :
373 : The `related_value' field is used to connect related expressions
374 : (that differ by adding an integer).
375 : The related expressions are chained in a circular fashion.
376 : `related_value' is zero for expressions for which this
377 : chain is not useful.
378 :
379 : The `cost' field stores the cost of this element's expression.
380 : The `regcost' field stores the value returned by approx_reg_cost for
381 : this element's expression.
382 :
383 : The `is_const' flag is set if the element is a constant (including
384 : a fixed address).
385 :
386 : The `flag' field is used as a temporary during some search routines.
387 :
388 : The `mode' field is usually the same as GET_MODE (`exp'), but
389 : if `exp' is a CONST_INT and has no machine mode then the `mode'
390 : field is the mode it was being used as. Each constant is
391 : recorded separately for each mode it is used with. */
392 :
393 : struct table_elt
394 : {
395 : rtx exp;
396 : rtx canon_exp;
397 : struct table_elt *next_same_hash;
398 : struct table_elt *prev_same_hash;
399 : struct table_elt *next_same_value;
400 : struct table_elt *prev_same_value;
401 : struct table_elt *first_same_value;
402 : struct table_elt *related_value;
403 : int cost;
404 : int regcost;
405 : machine_mode mode : MACHINE_MODE_BITSIZE;
406 : char in_memory;
407 : char is_const;
408 : char flag;
409 : };
410 :
411 : /* We don't want a lot of buckets, because we rarely have very many
412 : things stored in the hash table, and a lot of buckets slows
413 : down a lot of loops that happen frequently. */
414 : #define HASH_SHIFT 5
415 : #define HASH_SIZE (1 << HASH_SHIFT)
416 : #define HASH_MASK (HASH_SIZE - 1)
417 :
418 : /* Determine whether register number N is considered a fixed register for the
419 : purpose of approximating register costs.
420 : It is desirable to replace other regs with fixed regs, to reduce need for
421 : non-fixed hard regs.
422 : A reg wins if it is either the frame pointer or designated as fixed. */
423 : #define FIXED_REGNO_P(N) \
424 : ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
425 : || fixed_regs[N] || global_regs[N])
426 :
427 : /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
428 : hard registers and pointers into the frame are the cheapest with a cost
429 : of 0. Next come pseudos with a cost of one and other hard registers with
430 : a cost of 2. Aside from these special cases, call `rtx_cost'. */
431 :
432 : #define CHEAP_REGNO(N) \
433 : (REGNO_PTR_FRAME_P (N) \
434 : || (HARD_REGISTER_NUM_P (N) \
435 : && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
436 :
437 : #define COST(X, MODE) \
438 : (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
439 : #define COST_IN(X, MODE, OUTER, OPNO) \
440 : (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
441 :
442 : /* Get the number of times this register has been updated in this
443 : basic block. */
444 :
445 : #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
446 :
447 : /* Get the point at which REG was recorded in the table. */
448 :
449 : #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
450 :
451 : /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
452 : SUBREG). */
453 :
454 : #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
455 :
456 : /* Get the quantity number for REG. */
457 :
458 : #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
459 :
460 : /* Determine if the quantity number for register X represents a valid index
461 : into the qty_table. */
462 :
463 : #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
464 :
465 : /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
466 :
467 : #define CHEAPER(X, Y) \
468 : (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
469 :
470 : static struct table_elt *table[HASH_SIZE];
471 :
472 : /* Chain of `struct table_elt's made so far for this function
473 : but currently removed from the table. */
474 :
475 : static struct table_elt *free_element_chain;
476 :
477 : /* Trace a patch through the CFG. */
478 :
479 : struct branch_path
480 : {
481 : /* The basic block for this path entry. */
482 : basic_block bb;
483 : };
484 :
485 : /* This data describes a pair of vec_duplicates in the same BB, which duplicate
486 : the same pseudo to different vector lengths. The same structure is also
487 : used while prescanning a basic block as a temporary cache entry. */
488 :
489 341569 : struct cse_vec_duplicate_match
490 : {
491 : basic_block bb;
492 : machine_mode widest_mode;
493 : rtx scalar;
494 : rtx_insn *first_insn;
495 : rtx_insn *widest_insn;
496 : auto_vec<rtx_insn *> related_dups;
497 :
498 341507 : cse_vec_duplicate_match (basic_block bb_, machine_mode widest_mode_,
499 : rtx scalar_, rtx_insn *first_insn_,
500 : rtx_insn *widest_insn_)
501 341507 : : bb (bb_), widest_mode (widest_mode_), scalar (scalar_),
502 341507 : first_insn (first_insn_), widest_insn (widest_insn_)
503 : {}
504 :
505 345481 : cse_vec_duplicate_match (const cse_vec_duplicate_match &other)
506 345481 : : bb (other.bb), widest_mode (other.widest_mode), scalar (other.scalar),
507 345481 : first_insn (other.first_insn), widest_insn (other.widest_insn)
508 : {
509 690962 : related_dups.reserve(other.related_dups.length ());
510 345481 : related_dups.splice(other.related_dups);
511 345481 : }
512 : };
513 :
514 : /* This data describes a block that will be processed by
515 : cse_extended_basic_block. */
516 :
517 2357654 : struct cse_basic_block_data
518 : {
519 : /* Total number of SETs in block. */
520 : int nsets;
521 : /* Size of current branch path, if any. */
522 : int path_size;
523 : /* Current path, indicating which basic_blocks will be processed. */
524 : struct branch_path *path;
525 : /* vec_duplicate sources seen in the current BB while prescanning. */
526 : auto_vec<cse_vec_duplicate_match, 8> vec_duplicate_cache;
527 : /* Syntactic vec_duplicate matches found in the same BB while prescanning. */
528 : auto_vec<cse_vec_duplicate_match, 8> vec_duplicate_matches;
529 : };
530 :
531 :
532 : /* Pointers to the live in/live out bitmaps for the boundaries of the
533 : current EBB. */
534 : static bitmap cse_ebb_live_in, cse_ebb_live_out;
535 :
536 : /* A simple bitmap to track which basic blocks have been visited
537 : already as part of an already processed extended basic block. */
538 : static sbitmap cse_visited_basic_blocks;
539 :
540 : static bool fixed_base_plus_p (rtx x);
541 : static int notreg_cost (rtx, machine_mode, enum rtx_code, int);
542 : static int preferable (int, int, int, int);
543 : static void new_basic_block (void);
544 : static void make_new_qty (unsigned int, machine_mode);
545 : static void make_regs_eqv (unsigned int, unsigned int);
546 : static void delete_reg_equiv (unsigned int);
547 : static bool mention_regs (rtx);
548 : static bool insert_regs (rtx, struct table_elt *, bool);
549 : static void remove_from_table (struct table_elt *, unsigned);
550 : static void remove_pseudo_from_table (rtx, unsigned);
551 : static struct table_elt *lookup (rtx, unsigned, machine_mode);
552 : static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode);
553 : static rtx lookup_as_function (rtx, enum rtx_code);
554 : static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
555 : machine_mode, int, int);
556 : static struct table_elt *insert (rtx, struct table_elt *, unsigned,
557 : machine_mode);
558 : static void merge_equiv_classes (struct table_elt *, struct table_elt *);
559 : static void invalidate (rtx, machine_mode);
560 : static void remove_invalid_refs (unsigned int);
561 : static void remove_invalid_subreg_refs (unsigned int, poly_uint64,
562 : machine_mode);
563 : static void rehash_using_reg (rtx);
564 : static void invalidate_memory (void);
565 : static rtx use_related_value (rtx, struct table_elt *);
566 :
567 : static inline unsigned canon_hash (rtx, machine_mode);
568 : static inline unsigned safe_hash (rtx, machine_mode);
569 : static inline unsigned hash_rtx_string (const char *);
570 :
571 : static rtx canon_reg (rtx, rtx_insn *);
572 : static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
573 : machine_mode *,
574 : machine_mode *);
575 : static rtx fold_rtx (rtx, rtx_insn *);
576 : static rtx equiv_constant (rtx);
577 : static void record_jump_equiv (rtx_insn *, bool);
578 : static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx);
579 : static void cse_insn (rtx_insn *);
580 : static void cse_prescan_cache_vec_dup (struct cse_basic_block_data *,
581 : basic_block, rtx_insn *, rtx);
582 : static void cse_prescan_path (struct cse_basic_block_data *);
583 : static void invalidate_from_clobbers (rtx_insn *);
584 : static void invalidate_from_sets_and_clobbers (rtx_insn *);
585 : static void cse_extended_basic_block (struct cse_basic_block_data *);
586 : extern void dump_class (struct table_elt*);
587 : static void get_cse_reg_info_1 (unsigned int regno);
588 : static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
589 :
590 : static void flush_hash_table (void);
591 : static bool insn_live_p (rtx_insn *, int *);
592 : static bool set_live_p (rtx, int *);
593 : static void cse_change_cc_mode_insn (rtx_insn *, rtx);
594 : static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
595 : static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
596 : bool);
597 :
598 :
599 : #undef RTL_HOOKS_GEN_LOWPART
600 : #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
601 :
602 : static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
603 :
604 : /* Compute hash code of X in mode M. Special-case case where X is a pseudo
605 : register (hard registers may require `do_not_record' to be set). */
606 :
607 : static inline unsigned
608 862526032 : HASH (rtx x, machine_mode mode)
609 : {
610 560611276 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
611 1196501901 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
612 862526032 : : canon_hash (x, mode));
613 862526032 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
614 : }
615 :
616 : /* Like HASH, but without side-effects. */
617 :
618 : static inline unsigned
619 238123554 : SAFE_HASH (rtx x, machine_mode mode)
620 : {
621 119718103 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
622 305676633 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
623 238123554 : : safe_hash (x, mode));
624 238123554 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
625 : }
626 :
627 : /* Nonzero if X has the form (PLUS frame-pointer integer). */
628 :
629 : static bool
630 244532183 : fixed_base_plus_p (rtx x)
631 : {
632 277507362 : switch (GET_CODE (x))
633 : {
634 144682727 : case REG:
635 144682727 : if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
636 : return true;
637 129937443 : if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
638 118459 : return true;
639 : return false;
640 :
641 39391404 : case PLUS:
642 39391404 : if (!CONST_INT_P (XEXP (x, 1)))
643 : return false;
644 32975179 : return fixed_base_plus_p (XEXP (x, 0));
645 :
646 : default:
647 : return false;
648 : }
649 : }
650 :
651 : /* Dump the expressions in the equivalence class indicated by CLASSP.
652 : This function is used only for debugging. */
653 : DEBUG_FUNCTION void
654 0 : dump_class (struct table_elt *classp)
655 : {
656 0 : struct table_elt *elt;
657 :
658 0 : fprintf (stderr, "Equivalence chain for ");
659 0 : print_rtl (stderr, classp->exp);
660 0 : fprintf (stderr, ": \n");
661 :
662 0 : for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
663 : {
664 0 : print_rtl (stderr, elt->exp);
665 0 : fprintf (stderr, "\n");
666 : }
667 0 : }
668 :
669 : /* Return an estimate of the cost of the registers used in an rtx.
670 : This is mostly the number of different REG expressions in the rtx;
671 : however for some exceptions like fixed registers we use a cost of
672 : 0. If any other hard register reference occurs, return MAX_COST. */
673 :
674 : static int
675 446915400 : approx_reg_cost (const_rtx x)
676 : {
677 446915400 : int cost = 0;
678 446915400 : subrtx_iterator::array_type array;
679 1410222301 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
680 : {
681 1021186303 : const_rtx x = *iter;
682 1021186303 : if (REG_P (x))
683 : {
684 423087128 : unsigned int regno = REGNO (x);
685 423087128 : if (!CHEAP_REGNO (regno))
686 : {
687 57879402 : if (regno < FIRST_PSEUDO_REGISTER)
688 : {
689 57879402 : if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
690 57879402 : return MAX_COST;
691 0 : cost += 2;
692 : }
693 : else
694 300547906 : cost += 1;
695 : }
696 : }
697 : }
698 389035998 : return cost;
699 446915400 : }
700 :
701 : /* Return a negative value if an rtx A, whose costs are given by COST_A
702 : and REGCOST_A, is more desirable than an rtx B.
703 : Return a positive value if A is less desirable, or 0 if the two are
704 : equally good. */
705 : static int
706 678942298 : preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
707 : {
708 : /* First, get rid of cases involving expressions that are entirely
709 : unwanted. */
710 678942298 : if (cost_a != cost_b)
711 : {
712 635097762 : if (cost_a == MAX_COST)
713 : return 1;
714 633687215 : if (cost_b == MAX_COST)
715 : return -1;
716 : }
717 :
718 : /* Avoid extending lifetimes of hardregs. */
719 178297993 : if (regcost_a != regcost_b)
720 : {
721 97479982 : if (regcost_a == MAX_COST)
722 : return 1;
723 75611453 : if (regcost_b == MAX_COST)
724 : return -1;
725 : }
726 :
727 : /* Normal operation costs take precedence. */
728 154353995 : if (cost_a != cost_b)
729 110632948 : return cost_a - cost_b;
730 : /* Only if these are identical consider effects on register pressure. */
731 43721047 : if (regcost_a != regcost_b)
732 43721047 : return regcost_a - regcost_b;
733 : return 0;
734 : }
735 :
736 : /* Internal function, to compute cost when X is not a register; called
737 : from COST macro to keep it simple. */
738 :
739 : static int
740 314814990 : notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno)
741 : {
742 314814990 : scalar_int_mode int_mode, inner_mode;
743 314814990 : return ((GET_CODE (x) == SUBREG
744 5548630 : && REG_P (SUBREG_REG (x))
745 316998263 : && is_int_mode (mode, &int_mode)
746 316113572 : && is_int_mode (GET_MODE (SUBREG_REG (x)), &inner_mode)
747 7811070 : && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
748 3853086 : && subreg_lowpart_p (x)
749 2606953 : && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode))
750 314814990 : ? 0
751 312208037 : : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2);
752 : }
753 :
754 :
755 : /* Initialize CSE_REG_INFO_TABLE. */
756 :
757 : static void
758 2357654 : init_cse_reg_info (unsigned int nregs)
759 : {
760 : /* Do we need to grow the table? */
761 2357654 : if (nregs > cse_reg_info_table_size)
762 : {
763 181752 : unsigned int new_size;
764 :
765 181752 : if (cse_reg_info_table_size < 2048)
766 : {
767 : /* Compute a new size that is a power of 2 and no smaller
768 : than the large of NREGS and 64. */
769 181409 : new_size = (cse_reg_info_table_size
770 181409 : ? cse_reg_info_table_size : 64);
771 :
772 404136 : while (new_size < nregs)
773 222727 : new_size *= 2;
774 : }
775 : else
776 : {
777 : /* If we need a big table, allocate just enough to hold
778 : NREGS registers. */
779 : new_size = nregs;
780 : }
781 :
782 : /* Reallocate the table with NEW_SIZE entries. */
783 181752 : free (cse_reg_info_table);
784 181752 : cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
785 181752 : cse_reg_info_table_size = new_size;
786 181752 : cse_reg_info_table_first_uninitialized = 0;
787 : }
788 :
789 : /* Do we have all of the first NREGS entries initialized? */
790 2357654 : if (cse_reg_info_table_first_uninitialized < nregs)
791 : {
792 332687 : unsigned int old_timestamp = cse_reg_info_timestamp - 1;
793 332687 : unsigned int i;
794 :
795 : /* Put the old timestamp on newly allocated entries so that they
796 : will all be considered out of date. We do not touch those
797 : entries beyond the first NREGS entries to be nice to the
798 : virtual memory. */
799 34480074 : for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
800 34147387 : cse_reg_info_table[i].timestamp = old_timestamp;
801 :
802 332687 : cse_reg_info_table_first_uninitialized = nregs;
803 : }
804 2357654 : }
805 :
806 : /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
807 :
808 : static void
809 910266224 : get_cse_reg_info_1 (unsigned int regno)
810 : {
811 : /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
812 : entry will be considered to have been initialized. */
813 910266224 : cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
814 :
815 : /* Initialize the rest of the entry. */
816 910266224 : cse_reg_info_table[regno].reg_tick = 1;
817 910266224 : cse_reg_info_table[regno].reg_in_table = -1;
818 910266224 : cse_reg_info_table[regno].subreg_ticked = -1;
819 910266224 : cse_reg_info_table[regno].reg_qty = -regno - 1;
820 910266224 : }
821 :
822 : /* Find a cse_reg_info entry for REGNO. */
823 :
824 : static inline struct cse_reg_info *
825 11704290261 : get_cse_reg_info (unsigned int regno)
826 : {
827 11704290261 : struct cse_reg_info *p = &cse_reg_info_table[regno];
828 :
829 : /* If this entry has not been initialized, go ahead and initialize
830 : it. */
831 11704290261 : if (p->timestamp != cse_reg_info_timestamp)
832 910266224 : get_cse_reg_info_1 (regno);
833 :
834 11704290261 : return p;
835 : }
836 :
837 : /* Clear the hash table and initialize each register with its own quantity,
838 : for a new basic block. */
839 :
840 : static void
841 21439534 : new_basic_block (void)
842 : {
843 21439534 : int i;
844 :
845 21439534 : next_qty = 0;
846 :
847 : /* Invalidate cse_reg_info_table. */
848 21439534 : cse_reg_info_timestamp++;
849 :
850 : /* Clear out hash table state for this pass. */
851 21439534 : CLEAR_HARD_REG_SET (hard_regs_in_table);
852 :
853 : /* The per-quantity values used to be initialized here, but it is
854 : much faster to initialize each as it is made in `make_new_qty'. */
855 :
856 707504622 : for (i = 0; i < HASH_SIZE; i++)
857 : {
858 686065088 : struct table_elt *first;
859 :
860 686065088 : first = table[i];
861 686065088 : if (first != NULL)
862 : {
863 140344792 : struct table_elt *last = first;
864 :
865 140344792 : table[i] = NULL;
866 :
867 199208331 : while (last->next_same_hash != NULL)
868 : last = last->next_same_hash;
869 :
870 : /* Now relink this hash entire chain into
871 : the free element list. */
872 :
873 140344792 : last->next_same_hash = free_element_chain;
874 140344792 : free_element_chain = first;
875 : }
876 : }
877 21439534 : }
878 :
879 : /* Say that register REG contains a quantity in mode MODE not in any
880 : register before and initialize that quantity. */
881 :
882 : static void
883 107333114 : make_new_qty (unsigned int reg, machine_mode mode)
884 : {
885 107333114 : int q;
886 107333114 : struct qty_table_elem *ent;
887 107333114 : struct reg_eqv_elem *eqv;
888 :
889 107333114 : gcc_assert (next_qty < max_qty);
890 :
891 107333114 : q = REG_QTY (reg) = next_qty++;
892 107333114 : ent = &qty_table[q];
893 107333114 : ent->first_reg = reg;
894 107333114 : ent->last_reg = reg;
895 107333114 : ent->mode = mode;
896 107333114 : ent->const_rtx = ent->const_insn = NULL;
897 107333114 : ent->comparison_code = UNKNOWN;
898 :
899 107333114 : eqv = ®_eqv_table[reg];
900 107333114 : eqv->next = eqv->prev = -1;
901 107333114 : }
902 :
903 : /* Make reg NEW equivalent to reg OLD.
904 : OLD is not changing; NEW is. */
905 :
906 : static void
907 11920856 : make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
908 : {
909 11920856 : unsigned int lastr, firstr;
910 11920856 : int q = REG_QTY (old_reg);
911 11920856 : struct qty_table_elem *ent;
912 :
913 11920856 : ent = &qty_table[q];
914 :
915 : /* Nothing should become eqv until it has a "non-invalid" qty number. */
916 11920856 : gcc_assert (REGNO_QTY_VALID_P (old_reg));
917 :
918 11920856 : REG_QTY (new_reg) = q;
919 11920856 : firstr = ent->first_reg;
920 11920856 : lastr = ent->last_reg;
921 :
922 : /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
923 : hard regs. Among pseudos, if NEW will live longer than any other reg
924 : of the same qty, and that is beyond the current basic block,
925 : make it the new canonical replacement for this qty. */
926 317409 : if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
927 : /* Certain fixed registers might be of the class NO_REGS. This means
928 : that not only can they not be allocated by the compiler, but
929 : they cannot be used in substitutions or canonicalizations
930 : either. */
931 11603447 : && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
932 11925901 : && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
933 11598402 : || (new_reg >= FIRST_PSEUDO_REGISTER
934 11598402 : && (firstr < FIRST_PSEUDO_REGISTER
935 11598402 : || (bitmap_bit_p (cse_ebb_live_out, new_reg)
936 3782815 : && !bitmap_bit_p (cse_ebb_live_out, firstr))
937 9496793 : || (bitmap_bit_p (cse_ebb_live_in, new_reg)
938 514312 : && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
939 : {
940 2208237 : reg_eqv_table[firstr].prev = new_reg;
941 2208237 : reg_eqv_table[new_reg].next = firstr;
942 2208237 : reg_eqv_table[new_reg].prev = -1;
943 2208237 : ent->first_reg = new_reg;
944 : }
945 : else
946 : {
947 : /* If NEW is a hard reg (known to be non-fixed), insert at end.
948 : Otherwise, insert before any non-fixed hard regs that are at the
949 : end. Registers of class NO_REGS cannot be used as an
950 : equivalent for anything. */
951 298600 : while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
952 0 : && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
953 9712619 : && new_reg >= FIRST_PSEUDO_REGISTER)
954 0 : lastr = reg_eqv_table[lastr].prev;
955 9712619 : reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
956 9712619 : if (reg_eqv_table[lastr].next >= 0)
957 0 : reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
958 : else
959 9712619 : qty_table[q].last_reg = new_reg;
960 9712619 : reg_eqv_table[lastr].next = new_reg;
961 9712619 : reg_eqv_table[new_reg].prev = lastr;
962 : }
963 11920856 : }
964 :
965 : /* Remove REG from its equivalence class. */
966 :
967 : static void
968 1572104708 : delete_reg_equiv (unsigned int reg)
969 : {
970 1572104708 : struct qty_table_elem *ent;
971 1572104708 : int q = REG_QTY (reg);
972 1572104708 : int p, n;
973 :
974 : /* If invalid, do nothing. */
975 1572104708 : if (! REGNO_QTY_VALID_P (reg))
976 : return;
977 :
978 19160451 : ent = &qty_table[q];
979 :
980 19160451 : p = reg_eqv_table[reg].prev;
981 19160451 : n = reg_eqv_table[reg].next;
982 :
983 19160451 : if (n != -1)
984 678914 : reg_eqv_table[n].prev = p;
985 : else
986 18481537 : ent->last_reg = p;
987 19160451 : if (p != -1)
988 633462 : reg_eqv_table[p].next = n;
989 : else
990 18526989 : ent->first_reg = n;
991 :
992 19160451 : REG_QTY (reg) = -reg - 1;
993 : }
994 :
995 : /* Remove any invalid expressions from the hash table
996 : that refer to any of the registers contained in expression X.
997 :
998 : Make sure that newly inserted references to those registers
999 : as subexpressions will be considered valid.
1000 :
1001 : mention_regs is not called when a register itself
1002 : is being stored in the table.
1003 :
1004 : Return true if we have done something that may have changed
1005 : the hash code of X. */
1006 :
1007 : static bool
1008 480035197 : mention_regs (rtx x)
1009 : {
1010 480035197 : enum rtx_code code;
1011 480035197 : int i, j;
1012 480035197 : const char *fmt;
1013 480035197 : bool changed = false;
1014 :
1015 480035197 : if (x == 0)
1016 : return false;
1017 :
1018 480035197 : code = GET_CODE (x);
1019 480035197 : if (code == REG)
1020 : {
1021 144477391 : unsigned int regno = REGNO (x);
1022 144477391 : unsigned int endregno = END_REGNO (x);
1023 144477391 : unsigned int i;
1024 :
1025 288954782 : for (i = regno; i < endregno; i++)
1026 : {
1027 144477391 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1028 168978 : remove_invalid_refs (i);
1029 :
1030 144477391 : REG_IN_TABLE (i) = REG_TICK (i);
1031 144477391 : SUBREG_TICKED (i) = -1;
1032 : }
1033 :
1034 : return false;
1035 : }
1036 :
1037 : /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1038 : pseudo if they don't use overlapping words. We handle only pseudos
1039 : here for simplicity. */
1040 8038594 : if (code == SUBREG && REG_P (SUBREG_REG (x))
1041 343578183 : && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1042 : {
1043 8020264 : unsigned int i = REGNO (SUBREG_REG (x));
1044 :
1045 8020264 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1046 : {
1047 : /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1048 : the last store to this register really stored into this
1049 : subreg, then remove the memory of this subreg.
1050 : Otherwise, remove any memory of the entire register and
1051 : all its subregs from the table. */
1052 343914 : if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1053 343914 : || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1054 343914 : remove_invalid_refs (i);
1055 : else
1056 0 : remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1057 : }
1058 :
1059 8020264 : REG_IN_TABLE (i) = REG_TICK (i);
1060 8020264 : SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1061 8020264 : return false;
1062 : }
1063 :
1064 : /* If X is a comparison or a COMPARE and either operand is a register
1065 : that does not have a quantity, give it one. This is so that a later
1066 : call to record_jump_equiv won't cause X to be assigned a different
1067 : hash code and not found in the table after that call.
1068 :
1069 : It is not necessary to do this here, since rehash_using_reg can
1070 : fix up the table later, but doing this here eliminates the need to
1071 : call that expensive function in the most common case where the only
1072 : use of the register is in the comparison. */
1073 :
1074 327537542 : if (code == COMPARE || COMPARISON_P (x))
1075 : {
1076 24173547 : if (REG_P (XEXP (x, 0))
1077 24173547 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1078 9067216 : if (insert_regs (XEXP (x, 0), NULL, false))
1079 : {
1080 9067216 : rehash_using_reg (XEXP (x, 0));
1081 9067216 : changed = true;
1082 : }
1083 :
1084 24173547 : if (REG_P (XEXP (x, 1))
1085 24173547 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1086 2495419 : if (insert_regs (XEXP (x, 1), NULL, false))
1087 : {
1088 2495419 : rehash_using_reg (XEXP (x, 1));
1089 2495419 : changed = true;
1090 : }
1091 : }
1092 :
1093 327537542 : fmt = GET_RTX_FORMAT (code);
1094 850788540 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1095 523250998 : if (fmt[i] == 'e')
1096 : {
1097 308648424 : if (mention_regs (XEXP (x, i)))
1098 523250998 : changed = true;
1099 : }
1100 214602574 : else if (fmt[i] == 'E')
1101 18977457 : for (j = 0; j < XVECLEN (x, i); j++)
1102 14396107 : if (mention_regs (XVECEXP (x, i, j)))
1103 358587 : changed = true;
1104 :
1105 : return changed;
1106 : }
1107 :
1108 : /* Update the register quantities for inserting X into the hash table
1109 : with a value equivalent to CLASSP.
1110 : (If the class does not contain a REG, it is irrelevant.)
1111 : If MODIFIED is true, X is a destination; it is being modified.
1112 : Note that delete_reg_equiv should be called on a register
1113 : before insert_regs is done on that register with MODIFIED != 0.
1114 :
1115 : True value means that elements of reg_qty have changed
1116 : so X's hash code may be different. */
1117 :
1118 : static bool
1119 258662133 : insert_regs (rtx x, struct table_elt *classp, bool modified)
1120 : {
1121 258662133 : if (REG_P (x))
1122 : {
1123 125875852 : unsigned int regno = REGNO (x);
1124 125875852 : int qty_valid;
1125 :
1126 : /* If REGNO is in the equivalence table already but is of the
1127 : wrong mode for that equivalence, don't do anything here. */
1128 :
1129 125875852 : qty_valid = REGNO_QTY_VALID_P (regno);
1130 125875852 : if (qty_valid)
1131 : {
1132 6621882 : struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1133 :
1134 6621882 : if (ent->mode != GET_MODE (x))
1135 : return false;
1136 : }
1137 :
1138 125875852 : if (modified || ! qty_valid)
1139 : {
1140 119253970 : if (classp)
1141 96438865 : for (classp = classp->first_same_value;
1142 190250876 : classp != 0;
1143 93812011 : classp = classp->next_same_value)
1144 105732867 : if (REG_P (classp->exp)
1145 11920856 : && GET_MODE (classp->exp) == GET_MODE (x))
1146 : {
1147 11920856 : unsigned c_regno = REGNO (classp->exp);
1148 :
1149 11920856 : gcc_assert (REGNO_QTY_VALID_P (c_regno));
1150 :
1151 : /* Suppose that 5 is hard reg and 100 and 101 are
1152 : pseudos. Consider
1153 :
1154 : (set (reg:si 100) (reg:si 5))
1155 : (set (reg:si 5) (reg:si 100))
1156 : (set (reg:di 101) (reg:di 5))
1157 :
1158 : We would now set REG_QTY (101) = REG_QTY (5), but the
1159 : entry for 5 is in SImode. When we use this later in
1160 : copy propagation, we get the register in wrong mode. */
1161 11920856 : if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1162 0 : continue;
1163 :
1164 11920856 : make_regs_eqv (regno, c_regno);
1165 11920856 : return true;
1166 : }
1167 :
1168 : /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1169 : than REG_IN_TABLE to find out if there was only a single preceding
1170 : invalidation - for the SUBREG - or another one, which would be
1171 : for the full register. However, if we find here that REG_TICK
1172 : indicates that the register is invalid, it means that it has
1173 : been invalidated in a separate operation. The SUBREG might be used
1174 : now (then this is a recursive call), or we might use the full REG
1175 : now and a SUBREG of it later. So bump up REG_TICK so that
1176 : mention_regs will do the right thing. */
1177 107333114 : if (! modified
1178 23034358 : && REG_IN_TABLE (regno) >= 0
1179 109495134 : && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1180 498 : REG_TICK (regno)++;
1181 107333114 : make_new_qty (regno, GET_MODE (x));
1182 107333114 : return true;
1183 : }
1184 :
1185 : return false;
1186 : }
1187 :
1188 : /* If X is a SUBREG, we will likely be inserting the inner register in the
1189 : table. If that register doesn't have an assigned quantity number at
1190 : this point but does later, the insertion that we will be doing now will
1191 : not be accessible because its hash code will have changed. So assign
1192 : a quantity number now. */
1193 :
1194 3501849 : else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1195 136272765 : && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1196 : {
1197 1686938 : insert_regs (SUBREG_REG (x), NULL, false);
1198 1686938 : mention_regs (x);
1199 1686938 : return true;
1200 : }
1201 : else
1202 131099343 : return mention_regs (x);
1203 : }
1204 :
1205 :
1206 : /* Compute upper and lower anchors for CST. Also compute the offset of CST
1207 : from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1208 : CST is equal to an anchor. */
1209 :
1210 : static bool
1211 0 : compute_const_anchors (rtx cst,
1212 : HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1213 : HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1214 : {
1215 0 : unsigned HOST_WIDE_INT n = UINTVAL (cst);
1216 :
1217 0 : *lower_base = n & ~(targetm.const_anchor - 1);
1218 0 : if ((unsigned HOST_WIDE_INT) *lower_base == n)
1219 : return false;
1220 :
1221 0 : *upper_base = ((n + (targetm.const_anchor - 1))
1222 0 : & ~(targetm.const_anchor - 1));
1223 0 : *upper_offs = n - *upper_base;
1224 0 : *lower_offs = n - *lower_base;
1225 0 : return true;
1226 : }
1227 :
1228 : /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1229 :
1230 : static void
1231 0 : insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1232 : machine_mode mode)
1233 : {
1234 0 : struct table_elt *elt;
1235 0 : unsigned hash;
1236 0 : rtx anchor_exp;
1237 0 : rtx exp;
1238 :
1239 0 : anchor_exp = gen_int_mode (anchor, mode);
1240 0 : hash = HASH (anchor_exp, mode);
1241 0 : elt = lookup (anchor_exp, hash, mode);
1242 0 : if (!elt)
1243 0 : elt = insert (anchor_exp, NULL, hash, mode);
1244 :
1245 0 : exp = plus_constant (mode, reg, offs);
1246 : /* REG has just been inserted and the hash codes recomputed. */
1247 0 : mention_regs (exp);
1248 0 : hash = HASH (exp, mode);
1249 :
1250 : /* Use the cost of the register rather than the whole expression. When
1251 : looking up constant anchors we will further offset the corresponding
1252 : expression therefore it does not make sense to prefer REGs over
1253 : reg-immediate additions. Prefer instead the oldest expression. Also
1254 : don't prefer pseudos over hard regs so that we derive constants in
1255 : argument registers from other argument registers rather than from the
1256 : original pseudo that was used to synthesize the constant. */
1257 0 : insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1);
1258 0 : }
1259 :
1260 : /* The constant CST is equivalent to the register REG. Create
1261 : equivalences between the two anchors of CST and the corresponding
1262 : register-offset expressions using REG. */
1263 :
1264 : static void
1265 0 : insert_const_anchors (rtx reg, rtx cst, machine_mode mode)
1266 : {
1267 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1268 :
1269 0 : if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1270 : &upper_base, &upper_offs))
1271 0 : return;
1272 :
1273 : /* Ignore anchors of value 0. Constants accessible from zero are
1274 : simple. */
1275 0 : if (lower_base != 0)
1276 0 : insert_const_anchor (lower_base, reg, -lower_offs, mode);
1277 :
1278 0 : if (upper_base != 0)
1279 0 : insert_const_anchor (upper_base, reg, -upper_offs, mode);
1280 : }
1281 :
1282 : /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1283 : ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1284 : valid expression. Return the cheapest and oldest of such expressions. In
1285 : *OLD, return how old the resulting expression is compared to the other
1286 : equivalent expressions. */
1287 :
1288 : static rtx
1289 0 : find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1290 : unsigned *old)
1291 : {
1292 0 : struct table_elt *elt;
1293 0 : unsigned idx;
1294 0 : struct table_elt *match_elt;
1295 0 : rtx match;
1296 :
1297 : /* Find the cheapest and *oldest* expression to maximize the chance of
1298 : reusing the same pseudo. */
1299 :
1300 0 : match_elt = NULL;
1301 0 : match = NULL_RTX;
1302 0 : for (elt = anchor_elt->first_same_value, idx = 0;
1303 0 : elt;
1304 0 : elt = elt->next_same_value, idx++)
1305 : {
1306 0 : if (match_elt && CHEAPER (match_elt, elt))
1307 : return match;
1308 :
1309 0 : if (REG_P (elt->exp)
1310 0 : || (GET_CODE (elt->exp) == PLUS
1311 0 : && REG_P (XEXP (elt->exp, 0))
1312 0 : && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1313 : {
1314 0 : rtx x;
1315 :
1316 : /* Ignore expressions that are no longer valid. */
1317 0 : if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1318 0 : continue;
1319 :
1320 0 : x = plus_constant (GET_MODE (elt->exp), elt->exp, offs);
1321 0 : if (REG_P (x)
1322 0 : || (GET_CODE (x) == PLUS
1323 0 : && IN_RANGE (INTVAL (XEXP (x, 1)),
1324 : -targetm.const_anchor,
1325 : targetm.const_anchor - 1)))
1326 : {
1327 0 : match = x;
1328 0 : match_elt = elt;
1329 0 : *old = idx;
1330 : }
1331 : }
1332 : }
1333 :
1334 : return match;
1335 : }
1336 :
1337 : /* Try to express the constant SRC_CONST using a register+offset expression
1338 : derived from a constant anchor. Return it if successful or NULL_RTX,
1339 : otherwise. */
1340 :
1341 : static rtx
1342 0 : try_const_anchors (rtx src_const, machine_mode mode)
1343 : {
1344 0 : struct table_elt *lower_elt, *upper_elt;
1345 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1346 0 : rtx lower_anchor_rtx, upper_anchor_rtx;
1347 0 : rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1348 0 : unsigned lower_old, upper_old;
1349 :
1350 : /* CONST_INT may be in various modes, avoid non-scalar-int mode. */
1351 0 : if (!SCALAR_INT_MODE_P (mode))
1352 : return NULL_RTX;
1353 :
1354 0 : if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1355 : &upper_base, &upper_offs))
1356 : return NULL_RTX;
1357 :
1358 0 : lower_anchor_rtx = GEN_INT (lower_base);
1359 0 : upper_anchor_rtx = GEN_INT (upper_base);
1360 0 : lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1361 0 : upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1362 :
1363 0 : if (lower_elt)
1364 0 : lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1365 0 : if (upper_elt)
1366 0 : upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1367 :
1368 0 : if (!lower_exp)
1369 : return upper_exp;
1370 0 : if (!upper_exp)
1371 : return lower_exp;
1372 :
1373 : /* Return the older expression. */
1374 0 : return (upper_old > lower_old ? upper_exp : lower_exp);
1375 : }
1376 :
1377 : /* Look in or update the hash table. */
1378 :
1379 : /* Remove table element ELT from use in the table.
1380 : HASH is its hash code, made using the HASH macro.
1381 : It's an argument because often that is known in advance
1382 : and we save much time not recomputing it. */
1383 :
1384 : static void
1385 70352211 : remove_from_table (struct table_elt *elt, unsigned int hash)
1386 : {
1387 70352211 : if (elt == 0)
1388 : return;
1389 :
1390 : /* Mark this element as removed. See cse_insn. */
1391 70352211 : elt->first_same_value = 0;
1392 :
1393 : /* Remove the table element from its equivalence class. */
1394 :
1395 70352211 : {
1396 70352211 : struct table_elt *prev = elt->prev_same_value;
1397 70352211 : struct table_elt *next = elt->next_same_value;
1398 :
1399 70352211 : if (next)
1400 7887226 : next->prev_same_value = prev;
1401 :
1402 70352211 : if (prev)
1403 45413601 : prev->next_same_value = next;
1404 : else
1405 : {
1406 : struct table_elt *newfirst = next;
1407 33010952 : while (next)
1408 : {
1409 8072342 : next->first_same_value = newfirst;
1410 8072342 : next = next->next_same_value;
1411 : }
1412 : }
1413 : }
1414 :
1415 : /* Remove the table element from its hash bucket. */
1416 :
1417 70352211 : {
1418 70352211 : struct table_elt *prev = elt->prev_same_hash;
1419 70352211 : struct table_elt *next = elt->next_same_hash;
1420 :
1421 70352211 : if (next)
1422 20539719 : next->prev_same_hash = prev;
1423 :
1424 70352211 : if (prev)
1425 8877164 : prev->next_same_hash = next;
1426 61475047 : else if (table[hash] == elt)
1427 61475041 : table[hash] = next;
1428 : else
1429 : {
1430 : /* This entry is not in the proper hash bucket. This can happen
1431 : when two classes were merged by `merge_equiv_classes'. Search
1432 : for the hash bucket that it heads. This happens only very
1433 : rarely, so the cost is acceptable. */
1434 198 : for (hash = 0; hash < HASH_SIZE; hash++)
1435 192 : if (table[hash] == elt)
1436 6 : table[hash] = next;
1437 : }
1438 : }
1439 :
1440 : /* Remove the table element from its related-value circular chain. */
1441 :
1442 70352211 : if (elt->related_value != 0 && elt->related_value != elt)
1443 : {
1444 : struct table_elt *p = elt->related_value;
1445 :
1446 116540 : while (p->related_value != elt)
1447 : p = p->related_value;
1448 31514 : p->related_value = elt->related_value;
1449 31514 : if (p->related_value == p)
1450 25658 : p->related_value = 0;
1451 : }
1452 :
1453 : /* Now add it to the free element chain. */
1454 70352211 : elt->next_same_hash = free_element_chain;
1455 70352211 : free_element_chain = elt;
1456 : }
1457 :
1458 : /* Same as above, but X is a pseudo-register. */
1459 :
1460 : static void
1461 94523137 : remove_pseudo_from_table (rtx x, unsigned int hash)
1462 : {
1463 94523137 : struct table_elt *elt;
1464 :
1465 : /* Because a pseudo-register can be referenced in more than one
1466 : mode, we might have to remove more than one table entry. */
1467 98977660 : while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1468 4454523 : remove_from_table (elt, hash);
1469 94523137 : }
1470 :
1471 : /* Look up X in the hash table and return its table element,
1472 : or 0 if X is not in the table.
1473 :
1474 : MODE is the machine-mode of X, or if X is an integer constant
1475 : with VOIDmode then MODE is the mode with which X will be used.
1476 :
1477 : Here we are satisfied to find an expression whose tree structure
1478 : looks like X. */
1479 :
1480 : static struct table_elt *
1481 508281478 : lookup (rtx x, unsigned int hash, machine_mode mode)
1482 : {
1483 508281478 : struct table_elt *p;
1484 :
1485 757912754 : for (p = table[hash]; p; p = p->next_same_hash)
1486 383641285 : if (mode == p->mode && ((x == p->exp && REG_P (x))
1487 149453460 : || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1488 : return p;
1489 :
1490 : return 0;
1491 : }
1492 :
1493 : /* Like `lookup' but don't care whether the table element uses invalid regs.
1494 : Also ignore discrepancies in the machine mode of a register. */
1495 :
1496 : static struct table_elt *
1497 98977660 : lookup_for_remove (rtx x, unsigned int hash, machine_mode mode)
1498 : {
1499 98977660 : struct table_elt *p;
1500 :
1501 98977660 : if (REG_P (x))
1502 : {
1503 98977660 : unsigned int regno = REGNO (x);
1504 :
1505 : /* Don't check the machine mode when comparing registers;
1506 : invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1507 179843070 : for (p = table[hash]; p; p = p->next_same_hash)
1508 85319933 : if (REG_P (p->exp)
1509 85319933 : && REGNO (p->exp) == regno)
1510 : return p;
1511 : }
1512 : else
1513 : {
1514 0 : for (p = table[hash]; p; p = p->next_same_hash)
1515 0 : if (mode == p->mode
1516 0 : && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1517 : return p;
1518 : }
1519 :
1520 : return 0;
1521 : }
1522 :
1523 : /* Look for an expression equivalent to X and with code CODE.
1524 : If one is found, return that expression. */
1525 :
1526 : static rtx
1527 63013783 : lookup_as_function (rtx x, enum rtx_code code)
1528 : {
1529 63013783 : struct table_elt *p
1530 63013783 : = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1531 :
1532 63013783 : if (p == 0)
1533 : return 0;
1534 :
1535 39649466 : for (p = p->first_same_value; p; p = p->next_same_value)
1536 27559056 : if (GET_CODE (p->exp) == code
1537 : /* Make sure this is a valid entry in the table. */
1538 27559056 : && exp_equiv_p (p->exp, p->exp, 1, false))
1539 847490 : return p->exp;
1540 :
1541 : return 0;
1542 : }
1543 :
1544 : /* Insert X in the hash table, assuming HASH is its hash code and
1545 : CLASSP is an element of the class it should go in (or 0 if a new
1546 : class should be made). COST is the code of X and reg_cost is the
1547 : cost of registers in X. It is inserted at the proper position to
1548 : keep the class in the order cheapest first.
1549 :
1550 : MODE is the machine-mode of X, or if X is an integer constant
1551 : with VOIDmode then MODE is the mode with which X will be used.
1552 :
1553 : For elements of equal cheapness, the most recent one
1554 : goes in front, except that the first element in the list
1555 : remains first unless a cheaper element is added. The order of
1556 : pseudo-registers does not matter, as canon_reg will be called to
1557 : find the cheapest when a register is retrieved from the table.
1558 :
1559 : The in_memory field in the hash table element is set to 0.
1560 : The caller must set it nonzero if appropriate.
1561 :
1562 : You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1563 : and if insert_regs returns a nonzero value
1564 : you must then recompute its hash code before calling here.
1565 :
1566 : If necessary, update table showing constant values of quantities. */
1567 :
1568 : static struct table_elt *
1569 270147706 : insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1570 : machine_mode mode, int cost, int reg_cost)
1571 : {
1572 270147706 : struct table_elt *elt;
1573 :
1574 : /* If X is a register and we haven't made a quantity for it,
1575 : something is wrong. */
1576 270147706 : gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1577 :
1578 : /* If X is a hard register, show it is being put in the table. */
1579 270147706 : if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1580 22453923 : add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1581 :
1582 : /* Put an element for X into the right hash bucket. */
1583 :
1584 270147706 : elt = free_element_chain;
1585 270147706 : if (elt)
1586 264926298 : free_element_chain = elt->next_same_hash;
1587 : else
1588 5221408 : elt = XNEW (struct table_elt);
1589 :
1590 270147706 : elt->exp = x;
1591 270147706 : elt->canon_exp = NULL_RTX;
1592 270147706 : elt->cost = cost;
1593 270147706 : elt->regcost = reg_cost;
1594 270147706 : elt->next_same_value = 0;
1595 270147706 : elt->prev_same_value = 0;
1596 270147706 : elt->next_same_hash = table[hash];
1597 270147706 : elt->prev_same_hash = 0;
1598 270147706 : elt->related_value = 0;
1599 270147706 : elt->in_memory = 0;
1600 270147706 : elt->mode = mode;
1601 270147706 : elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1602 :
1603 270147706 : if (table[hash])
1604 85145155 : table[hash]->prev_same_hash = elt;
1605 270147706 : table[hash] = elt;
1606 :
1607 : /* Put it into the proper value-class. */
1608 270147706 : if (classp)
1609 : {
1610 132094441 : classp = classp->first_same_value;
1611 132094441 : if (CHEAPER (elt, classp))
1612 : /* Insert at the head of the class. */
1613 : {
1614 62005078 : struct table_elt *p;
1615 62005078 : elt->next_same_value = classp;
1616 62005078 : classp->prev_same_value = elt;
1617 62005078 : elt->first_same_value = elt;
1618 :
1619 131015014 : for (p = classp; p; p = p->next_same_value)
1620 69009936 : p->first_same_value = elt;
1621 : }
1622 : else
1623 : {
1624 : /* Insert not at head of the class. */
1625 : /* Put it after the last element cheaper than X. */
1626 : struct table_elt *p, *next;
1627 :
1628 : for (p = classp;
1629 153150728 : (next = p->next_same_value) && CHEAPER (next, elt);
1630 : p = next)
1631 : ;
1632 :
1633 : /* Put it after P and before NEXT. */
1634 70089363 : elt->next_same_value = next;
1635 70089363 : if (next)
1636 17086760 : next->prev_same_value = elt;
1637 :
1638 70089363 : elt->prev_same_value = p;
1639 70089363 : p->next_same_value = elt;
1640 70089363 : elt->first_same_value = classp;
1641 : }
1642 : }
1643 : else
1644 138053265 : elt->first_same_value = elt;
1645 :
1646 : /* If this is a constant being set equivalent to a register or a register
1647 : being set equivalent to a constant, note the constant equivalence.
1648 :
1649 : If this is a constant, it cannot be equivalent to a different constant,
1650 : and a constant is the only thing that can be cheaper than a register. So
1651 : we know the register is the head of the class (before the constant was
1652 : inserted).
1653 :
1654 : If this is a register that is not already known equivalent to a
1655 : constant, we must check the entire class.
1656 :
1657 : If this is a register that is already known equivalent to an insn,
1658 : update the qtys `const_insn' to show that `this_insn' is the latest
1659 : insn making that quantity equivalent to the constant. */
1660 :
1661 270147706 : if (elt->is_const && classp && REG_P (classp->exp)
1662 3390502 : && !REG_P (x))
1663 : {
1664 3387735 : int exp_q = REG_QTY (REGNO (classp->exp));
1665 3387735 : struct qty_table_elem *exp_ent = &qty_table[exp_q];
1666 :
1667 3387735 : exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1668 3387735 : exp_ent->const_insn = this_insn;
1669 3387735 : }
1670 :
1671 266759971 : else if (REG_P (x)
1672 112626279 : && classp
1673 96448239 : && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1674 358519867 : && ! elt->is_const)
1675 : {
1676 : struct table_elt *p;
1677 :
1678 207104963 : for (p = classp; p != 0; p = p->next_same_value)
1679 : {
1680 130051414 : if (p->is_const && !REG_P (p->exp))
1681 : {
1682 14703519 : int x_q = REG_QTY (REGNO (x));
1683 14703519 : struct qty_table_elem *x_ent = &qty_table[x_q];
1684 :
1685 14703519 : x_ent->const_rtx
1686 14703519 : = gen_lowpart (GET_MODE (x), p->exp);
1687 14703519 : x_ent->const_insn = this_insn;
1688 14703519 : break;
1689 : }
1690 : }
1691 : }
1692 :
1693 175002903 : else if (REG_P (x)
1694 20869211 : && qty_table[REG_QTY (REGNO (x))].const_rtx
1695 179691247 : && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1696 4688344 : qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1697 :
1698 : /* If this is a constant with symbolic value,
1699 : and it has a term with an explicit integer value,
1700 : link it up with related expressions. */
1701 270147706 : if (GET_CODE (x) == CONST)
1702 : {
1703 867685 : rtx subexp = get_related_value (x);
1704 867685 : unsigned subhash;
1705 867685 : struct table_elt *subelt, *subelt_prev;
1706 :
1707 867685 : if (subexp != 0)
1708 : {
1709 : /* Get the integer-free subexpression in the hash table. */
1710 853932 : subhash = SAFE_HASH (subexp, mode);
1711 853932 : subelt = lookup (subexp, subhash, mode);
1712 853932 : if (subelt == 0)
1713 392934 : subelt = insert (subexp, NULL, subhash, mode);
1714 : /* Initialize SUBELT's circular chain if it has none. */
1715 853932 : if (subelt->related_value == 0)
1716 566672 : subelt->related_value = subelt;
1717 : /* Find the element in the circular chain that precedes SUBELT. */
1718 853932 : subelt_prev = subelt;
1719 2697340 : while (subelt_prev->related_value != subelt)
1720 : subelt_prev = subelt_prev->related_value;
1721 : /* Put new ELT into SUBELT's circular chain just before SUBELT.
1722 : This way the element that follows SUBELT is the oldest one. */
1723 853932 : elt->related_value = subelt_prev->related_value;
1724 853932 : subelt_prev->related_value = elt;
1725 : }
1726 : }
1727 :
1728 270147706 : return elt;
1729 : }
1730 :
1731 : /* Wrap insert_with_costs by passing the default costs. */
1732 :
1733 : static struct table_elt *
1734 270147706 : insert (rtx x, struct table_elt *classp, unsigned int hash,
1735 : machine_mode mode)
1736 : {
1737 540295412 : return insert_with_costs (x, classp, hash, mode,
1738 270147706 : COST (x, mode), approx_reg_cost (x));
1739 : }
1740 :
1741 :
1742 : /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1743 : CLASS2 into CLASS1. This is done when we have reached an insn which makes
1744 : the two classes equivalent.
1745 :
1746 : CLASS1 will be the surviving class; CLASS2 should not be used after this
1747 : call.
1748 :
1749 : Any invalid entries in CLASS2 will not be copied. */
1750 :
1751 : static void
1752 5373670 : merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1753 : {
1754 5373670 : struct table_elt *elt, *next, *new_elt;
1755 :
1756 : /* Ensure we start with the head of the classes. */
1757 5373670 : class1 = class1->first_same_value;
1758 5373670 : class2 = class2->first_same_value;
1759 :
1760 : /* If they were already equal, forget it. */
1761 5373670 : if (class1 == class2)
1762 : return;
1763 :
1764 12792092 : for (elt = class2; elt; elt = next)
1765 : {
1766 7418422 : unsigned int hash;
1767 7418422 : rtx exp = elt->exp;
1768 7418422 : machine_mode mode = elt->mode;
1769 :
1770 7418422 : next = elt->next_same_value;
1771 :
1772 : /* Remove old entry, make a new one in CLASS1's class.
1773 : Don't do this for invalid entries as we cannot find their
1774 : hash code (it also isn't necessary). */
1775 7418422 : if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1776 : {
1777 7418398 : bool need_rehash = false;
1778 :
1779 7418398 : hash_arg_in_memory = 0;
1780 7418398 : hash = HASH (exp, mode);
1781 :
1782 7418398 : if (REG_P (exp))
1783 : {
1784 2014805 : need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1785 2014805 : delete_reg_equiv (REGNO (exp));
1786 : }
1787 :
1788 7418398 : if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1789 2013661 : remove_pseudo_from_table (exp, hash);
1790 : else
1791 5404737 : remove_from_table (elt, hash);
1792 :
1793 7418398 : if (insert_regs (exp, class1, false) || need_rehash)
1794 : {
1795 2014805 : rehash_using_reg (exp);
1796 2014805 : hash = HASH (exp, mode);
1797 : }
1798 7418398 : new_elt = insert (exp, class1, hash, mode);
1799 7418398 : new_elt->in_memory = hash_arg_in_memory;
1800 7418398 : if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST)
1801 0 : new_elt->cost = MAX_COST;
1802 : }
1803 : }
1804 : }
1805 :
1806 : /* Flush the entire hash table. */
1807 :
1808 : static void
1809 8030 : flush_hash_table (void)
1810 : {
1811 8030 : int i;
1812 8030 : struct table_elt *p;
1813 :
1814 264990 : for (i = 0; i < HASH_SIZE; i++)
1815 1029243 : for (p = table[i]; p; p = table[i])
1816 : {
1817 : /* Note that invalidate can remove elements
1818 : after P in the current hash chain. */
1819 772283 : if (REG_P (p->exp))
1820 336070 : invalidate (p->exp, VOIDmode);
1821 : else
1822 436213 : remove_from_table (p, i);
1823 : }
1824 8030 : }
1825 :
1826 : /* Check whether an anti dependence exists between X and EXP. MODE and
1827 : ADDR are as for canon_anti_dependence. */
1828 :
1829 : static bool
1830 188326985 : check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr)
1831 : {
1832 188326985 : subrtx_iterator::array_type array;
1833 888843607 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
1834 : {
1835 709002382 : const_rtx x = *iter;
1836 709002382 : if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr))
1837 8485760 : return true;
1838 : }
1839 179841225 : return false;
1840 188326985 : }
1841 :
1842 : /* Remove from the hash table, or mark as invalid, all expressions whose
1843 : values could be altered by storing in register X. */
1844 :
1845 : static void
1846 225705645 : invalidate_reg (rtx x)
1847 : {
1848 225705645 : gcc_assert (GET_CODE (x) == REG);
1849 :
1850 : /* If X is a register, dependencies on its contents are recorded
1851 : through the qty number mechanism. Just change the qty number of
1852 : the register, mark it as invalid for expressions that refer to it,
1853 : and remove it itself. */
1854 225705645 : unsigned int regno = REGNO (x);
1855 225705645 : unsigned int hash = HASH (x, GET_MODE (x));
1856 :
1857 : /* Remove REGNO from any quantity list it might be on and indicate
1858 : that its value might have changed. If it is a pseudo, remove its
1859 : entry from the hash table.
1860 :
1861 : For a hard register, we do the first two actions above for any
1862 : additional hard registers corresponding to X. Then, if any of these
1863 : registers are in the table, we must remove any REG entries that
1864 : overlap these registers. */
1865 :
1866 225705645 : delete_reg_equiv (regno);
1867 225705645 : REG_TICK (regno)++;
1868 225705645 : SUBREG_TICKED (regno) = -1;
1869 :
1870 225705645 : if (regno >= FIRST_PSEUDO_REGISTER)
1871 92509476 : remove_pseudo_from_table (x, hash);
1872 : else
1873 : {
1874 133196169 : HOST_WIDE_INT in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1875 133196169 : unsigned int endregno = END_REGNO (x);
1876 133196169 : unsigned int rn;
1877 133196169 : struct table_elt *p, *next;
1878 :
1879 133196169 : CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1880 :
1881 133798815 : for (rn = regno + 1; rn < endregno; rn++)
1882 : {
1883 602646 : in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1884 602646 : CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1885 602646 : delete_reg_equiv (rn);
1886 602646 : REG_TICK (rn)++;
1887 602646 : SUBREG_TICKED (rn) = -1;
1888 : }
1889 :
1890 133196169 : if (in_table)
1891 416406870 : for (hash = 0; hash < HASH_SIZE; hash++)
1892 647952370 : for (p = table[hash]; p; p = next)
1893 : {
1894 244163890 : next = p->next_same_hash;
1895 :
1896 244163890 : if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1897 233179885 : continue;
1898 :
1899 10984005 : unsigned int tregno = REGNO (p->exp);
1900 10984005 : unsigned int tendregno = END_REGNO (p->exp);
1901 10984005 : if (tendregno > regno && tregno < endregno)
1902 10910125 : remove_from_table (p, hash);
1903 : }
1904 : }
1905 225705645 : }
1906 :
1907 : /* Remove from the hash table, or mark as invalid, all expressions whose
1908 : values could be altered by storing in X. X is a register, a subreg, or
1909 : a memory reference with nonvarying address (because, when a memory
1910 : reference with a varying address is stored in, all memory references are
1911 : removed by invalidate_memory so specific invalidation is superfluous).
1912 : FULL_MODE, if not VOIDmode, indicates that this much should be
1913 : invalidated instead of just the amount indicated by the mode of X. This
1914 : is only used for bitfield stores into memory.
1915 :
1916 : A nonvarying address may be just a register or just a symbol reference,
1917 : or it may be either of those plus a numeric offset. */
1918 :
1919 : static void
1920 255056519 : invalidate (rtx x, machine_mode full_mode)
1921 : {
1922 256757892 : int i;
1923 256757892 : struct table_elt *p;
1924 256757892 : rtx addr;
1925 :
1926 256757892 : switch (GET_CODE (x))
1927 : {
1928 225705455 : case REG:
1929 225705455 : invalidate_reg (x);
1930 225705455 : return;
1931 :
1932 1655562 : case SUBREG:
1933 1655562 : invalidate (SUBREG_REG (x), VOIDmode);
1934 1655562 : return;
1935 :
1936 26442 : case PARALLEL:
1937 72253 : for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1938 45811 : invalidate (XVECEXP (x, 0, i), VOIDmode);
1939 : return;
1940 :
1941 45811 : case EXPR_LIST:
1942 : /* This is part of a disjoint return value; extract the location in
1943 : question ignoring the offset. */
1944 45811 : invalidate (XEXP (x, 0), VOIDmode);
1945 45811 : return;
1946 :
1947 29324622 : case MEM:
1948 29324622 : addr = canon_rtx (get_addr (XEXP (x, 0)));
1949 : /* Calculate the canonical version of X here so that
1950 : true_dependence doesn't generate new RTL for X on each call. */
1951 29324622 : x = canon_rtx (x);
1952 :
1953 : /* Remove all hash table elements that refer to overlapping pieces of
1954 : memory. */
1955 29324622 : if (full_mode == VOIDmode)
1956 29323670 : full_mode = GET_MODE (x);
1957 :
1958 967712526 : for (i = 0; i < HASH_SIZE; i++)
1959 : {
1960 938387904 : struct table_elt *next;
1961 :
1962 1904807820 : for (p = table[i]; p; p = next)
1963 : {
1964 966419916 : next = p->next_same_hash;
1965 966419916 : if (p->in_memory)
1966 : {
1967 : /* Just canonicalize the expression once;
1968 : otherwise each time we call invalidate
1969 : true_dependence will canonicalize the
1970 : expression again. */
1971 188326985 : if (!p->canon_exp)
1972 27649446 : p->canon_exp = canon_rtx (p->exp);
1973 188326985 : if (check_dependence (p->canon_exp, x, full_mode, addr))
1974 8485760 : remove_from_table (p, i);
1975 : }
1976 : }
1977 : }
1978 : return;
1979 :
1980 0 : default:
1981 0 : gcc_unreachable ();
1982 : }
1983 : }
1984 :
1985 : /* Invalidate DEST. Used when DEST is not going to be added
1986 : into the hash table for some reason, e.g. do_not_record
1987 : flagged on it. */
1988 :
1989 : static void
1990 56730157 : invalidate_dest (rtx dest)
1991 : {
1992 56730157 : if (REG_P (dest)
1993 27154871 : || GET_CODE (dest) == SUBREG
1994 27154871 : || MEM_P (dest))
1995 36204191 : invalidate (dest, VOIDmode);
1996 20525966 : else if (GET_CODE (dest) == STRICT_LOW_PART
1997 20525966 : || GET_CODE (dest) == ZERO_EXTRACT)
1998 960 : invalidate (XEXP (dest, 0), GET_MODE (dest));
1999 56730157 : }
2000 :
2001 : /* Remove all expressions that refer to register REGNO,
2002 : since they are already invalid, and we are about to
2003 : mark that register valid again and don't want the old
2004 : expressions to reappear as valid. */
2005 :
2006 : static void
2007 13502969 : remove_invalid_refs (unsigned int regno)
2008 : {
2009 13502969 : unsigned int i;
2010 13502969 : struct table_elt *p, *next;
2011 :
2012 445597977 : for (i = 0; i < HASH_SIZE; i++)
2013 685383110 : for (p = table[i]; p; p = next)
2014 : {
2015 253288102 : next = p->next_same_hash;
2016 253288102 : if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp))
2017 17522692 : remove_from_table (p, i);
2018 : }
2019 13502969 : }
2020 :
2021 : /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2022 : and mode MODE. */
2023 : static void
2024 0 : remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset,
2025 : machine_mode mode)
2026 : {
2027 0 : unsigned int i;
2028 0 : struct table_elt *p, *next;
2029 :
2030 0 : for (i = 0; i < HASH_SIZE; i++)
2031 0 : for (p = table[i]; p; p = next)
2032 : {
2033 0 : rtx exp = p->exp;
2034 0 : next = p->next_same_hash;
2035 :
2036 0 : if (!REG_P (exp)
2037 0 : && (GET_CODE (exp) != SUBREG
2038 0 : || !REG_P (SUBREG_REG (exp))
2039 0 : || REGNO (SUBREG_REG (exp)) != regno
2040 0 : || ranges_maybe_overlap_p (SUBREG_BYTE (exp),
2041 0 : GET_MODE_SIZE (GET_MODE (exp)),
2042 0 : offset, GET_MODE_SIZE (mode)))
2043 0 : && refers_to_regno_p (regno, p->exp))
2044 0 : remove_from_table (p, i);
2045 : }
2046 0 : }
2047 :
2048 : /* Recompute the hash codes of any valid entries in the hash table that
2049 : reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2050 :
2051 : This is called when we make a jump equivalence. */
2052 :
2053 : static void
2054 129115655 : rehash_using_reg (rtx x)
2055 : {
2056 129115655 : unsigned int i;
2057 129115655 : struct table_elt *p, *next;
2058 129115655 : unsigned hash;
2059 :
2060 129115655 : if (GET_CODE (x) == SUBREG)
2061 1686938 : x = SUBREG_REG (x);
2062 :
2063 : /* If X is not a register or if the register is known not to be in any
2064 : valid entries in the table, we have no work to do. */
2065 :
2066 129115655 : if (!REG_P (x)
2067 119253970 : || REG_IN_TABLE (REGNO (x)) < 0
2068 134217358 : || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2069 : return;
2070 :
2071 : /* Scan all hash chains looking for valid entries that mention X.
2072 : If we find one and it is in the wrong hash chain, move it. */
2073 :
2074 168337422 : for (i = 0; i < HASH_SIZE; i++)
2075 277929704 : for (p = table[i]; p; p = next)
2076 : {
2077 114693416 : next = p->next_same_hash;
2078 114693416 : if (reg_mentioned_p (x, p->exp)
2079 4934842 : && exp_equiv_p (p->exp, p->exp, 1, false)
2080 119628077 : && i != (hash = SAFE_HASH (p->exp, p->mode)))
2081 : {
2082 3506737 : if (p->next_same_hash)
2083 1105027 : p->next_same_hash->prev_same_hash = p->prev_same_hash;
2084 :
2085 3506737 : if (p->prev_same_hash)
2086 640453 : p->prev_same_hash->next_same_hash = p->next_same_hash;
2087 : else
2088 2866284 : table[i] = p->next_same_hash;
2089 :
2090 3506737 : p->next_same_hash = table[hash];
2091 3506737 : p->prev_same_hash = 0;
2092 3506737 : if (table[hash])
2093 1671670 : table[hash]->prev_same_hash = p;
2094 3506737 : table[hash] = p;
2095 : }
2096 : }
2097 : }
2098 :
2099 : /* Remove from the hash table any expression that is a call-clobbered
2100 : register in INSN. Also update their TICK values. */
2101 :
2102 : static void
2103 16036403 : invalidate_for_call (rtx_insn *insn)
2104 : {
2105 16036403 : unsigned int regno;
2106 16036403 : unsigned hash;
2107 16036403 : struct table_elt *p, *next;
2108 16036403 : int in_table = 0;
2109 16036403 : hard_reg_set_iterator hrsi;
2110 :
2111 : /* Go through all the hard registers. For each that might be clobbered
2112 : in call insn INSN, remove the register from quantity chains and update
2113 : reg_tick if defined. Also see if any of these registers is currently
2114 : in the table.
2115 :
2116 : ??? We could be more precise for partially-clobbered registers,
2117 : and only invalidate values that actually occupy the clobbered part
2118 : of the registers. It doesn't seem worth the effort though, since
2119 : we shouldn't see this situation much before RA. Whatever choice
2120 : we make here has to be consistent with the table walk below,
2121 : so any change to this test will require a change there too. */
2122 16036403 : HARD_REG_SET callee_clobbers
2123 16036403 : = insn_callee_abi (insn).full_and_partial_reg_clobbers ();
2124 1359818015 : EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi)
2125 : {
2126 1343781612 : delete_reg_equiv (regno);
2127 1343781612 : if (REG_TICK (regno) >= 0)
2128 : {
2129 1343781612 : REG_TICK (regno)++;
2130 1343781612 : SUBREG_TICKED (regno) = -1;
2131 : }
2132 1343781612 : in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2133 : }
2134 :
2135 : /* In the case where we have no call-clobbered hard registers in the
2136 : table, we are done. Otherwise, scan the table and remove any
2137 : entry that overlaps a call-clobbered register. */
2138 :
2139 16036403 : if (in_table)
2140 120990375 : for (hash = 0; hash < HASH_SIZE; hash++)
2141 175393765 : for (p = table[hash]; p; p = next)
2142 : {
2143 58069765 : next = p->next_same_hash;
2144 :
2145 113002304 : if (!REG_P (p->exp)
2146 58069765 : || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2147 54932539 : continue;
2148 :
2149 : /* This must use the same test as above rather than the
2150 : more accurate clobbers_reg_p. */
2151 3137226 : if (overlaps_hard_reg_set_p (callee_clobbers, GET_MODE (p->exp),
2152 3137226 : REGNO (p->exp)))
2153 3116272 : remove_from_table (p, hash);
2154 : }
2155 16036403 : }
2156 :
2157 : /* Given an expression X of type CONST,
2158 : and ELT which is its table entry (or 0 if it
2159 : is not in the hash table),
2160 : return an alternate expression for X as a register plus integer.
2161 : If none can be found, return 0. */
2162 :
2163 : static rtx
2164 757681 : use_related_value (rtx x, struct table_elt *elt)
2165 : {
2166 757681 : struct table_elt *relt = 0;
2167 757681 : struct table_elt *p, *q;
2168 757681 : HOST_WIDE_INT offset;
2169 :
2170 : /* First, is there anything related known?
2171 : If we have a table element, we can tell from that.
2172 : Otherwise, must look it up. */
2173 :
2174 757681 : if (elt != 0 && elt->related_value != 0)
2175 : relt = elt;
2176 581477 : else if (elt == 0 && GET_CODE (x) == CONST)
2177 : {
2178 581477 : rtx subexp = get_related_value (x);
2179 581477 : if (subexp != 0)
2180 567724 : relt = lookup (subexp,
2181 : SAFE_HASH (subexp, GET_MODE (subexp)),
2182 567724 : GET_MODE (subexp));
2183 : }
2184 :
2185 698743 : if (relt == 0)
2186 : return 0;
2187 :
2188 : /* Search all related table entries for one that has an
2189 : equivalent register. */
2190 :
2191 : p = relt;
2192 895079 : while (1)
2193 : {
2194 : /* This loop is strange in that it is executed in two different cases.
2195 : The first is when X is already in the table. Then it is searching
2196 : the RELATED_VALUE list of X's class (RELT). The second case is when
2197 : X is not in the table. Then RELT points to a class for the related
2198 : value.
2199 :
2200 : Ensure that, whatever case we are in, that we ignore classes that have
2201 : the same value as X. */
2202 :
2203 895079 : if (rtx_equal_p (x, p->exp))
2204 : q = 0;
2205 : else
2206 1754638 : for (q = p->first_same_value; q; q = q->next_same_value)
2207 1216784 : if (REG_P (q->exp))
2208 : break;
2209 :
2210 764060 : if (q)
2211 : break;
2212 :
2213 668873 : p = p->related_value;
2214 :
2215 : /* We went all the way around, so there is nothing to be found.
2216 : Alternatively, perhaps RELT was in the table for some other reason
2217 : and it has no related values recorded. */
2218 668873 : if (p == relt || p == 0)
2219 : break;
2220 : }
2221 :
2222 336790 : if (q == 0)
2223 : return 0;
2224 :
2225 226206 : offset = (get_integer_term (x) - get_integer_term (p->exp));
2226 : /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2227 226206 : return plus_constant (q->mode, q->exp, offset);
2228 : }
2229 :
2230 :
2231 : /* Hash a string. Just add its bytes up. */
2232 : static inline unsigned
2233 131456 : hash_rtx_string (const char *ps)
2234 : {
2235 131456 : unsigned hash = 0;
2236 131456 : const unsigned char *p = (const unsigned char *) ps;
2237 :
2238 131456 : if (p)
2239 746069 : while (*p)
2240 614613 : hash += *p++;
2241 :
2242 131456 : return hash;
2243 : }
2244 :
2245 : /* Hash an rtx. We are careful to make sure the value is never negative.
2246 : Equivalent registers hash identically.
2247 : MODE is used in hashing for CONST_INTs only;
2248 : otherwise the mode of X is used.
2249 :
2250 : Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2251 :
2252 : If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2253 : a MEM rtx which does not have the MEM_READONLY_P flag set.
2254 :
2255 : Note that cse_insn knows that the hash code of a MEM expression
2256 : is just (int) MEM plus the hash code of the address.
2257 :
2258 : Call CB on each rtx if CB is not NULL.
2259 : When the callback returns true, we continue with the new rtx. */
2260 :
2261 : unsigned
2262 1318122180 : hash_rtx (const_rtx x, machine_mode mode,
2263 : int *do_not_record_p, int *hash_arg_in_memory_p,
2264 : bool have_reg_qty, hash_rtx_callback_function cb)
2265 : {
2266 1318122180 : int i, j;
2267 1318122180 : unsigned hash = 0;
2268 1945692512 : enum rtx_code code;
2269 1945692512 : const char *fmt;
2270 1945692512 : machine_mode newmode;
2271 1945692512 : rtx newx;
2272 :
2273 : /* Used to turn recursion into iteration. We can't rely on GCC's
2274 : tail-recursion elimination since we need to keep accumulating values
2275 : in HASH. */
2276 627570332 : repeat:
2277 1945692512 : if (x == 0)
2278 : return hash;
2279 :
2280 : /* Invoke the callback first. */
2281 1945692512 : if (cb != NULL
2282 1945692512 : && ((*cb) (x, mode, &newx, &newmode)))
2283 : {
2284 0 : hash += hash_rtx (newx, newmode, do_not_record_p,
2285 : hash_arg_in_memory_p, have_reg_qty, cb);
2286 0 : return hash;
2287 : }
2288 :
2289 1945692512 : code = GET_CODE (x);
2290 1945692512 : switch (code)
2291 : {
2292 676479446 : case REG:
2293 676479446 : {
2294 676479446 : unsigned int regno = REGNO (x);
2295 :
2296 676479446 : if (do_not_record_p && !reload_completed)
2297 : {
2298 : /* On some machines, we can't record any non-fixed hard register,
2299 : because extending its life will cause reload problems. We
2300 : consider ap, fp, sp, gp to be fixed for this purpose.
2301 :
2302 : We also consider CCmode registers to be fixed for this purpose;
2303 : failure to do so leads to failure to simplify 0<100 type of
2304 : conditionals.
2305 :
2306 : On all machines, we can't record any global registers.
2307 : Nor should we record any register that is in a small
2308 : class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2309 672902958 : bool record;
2310 :
2311 672902958 : if (regno >= FIRST_PSEUDO_REGISTER)
2312 : record = true;
2313 447276571 : else if (x == frame_pointer_rtx
2314 310760444 : || x == hard_frame_pointer_rtx
2315 310643444 : || x == arg_pointer_rtx
2316 302900140 : || x == stack_pointer_rtx
2317 267445345 : || x == pic_offset_table_rtx)
2318 : record = true;
2319 267445345 : else if (global_regs[regno])
2320 : record = false;
2321 267444968 : else if (fixed_regs[regno])
2322 : record = true;
2323 79751577 : else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2324 : record = true;
2325 79751577 : else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2326 : record = false;
2327 0 : else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2328 : record = false;
2329 : else
2330 : record = true;
2331 :
2332 : if (!record)
2333 : {
2334 79751954 : *do_not_record_p = 1;
2335 79751954 : return 0;
2336 : }
2337 : }
2338 :
2339 596727492 : hash += ((unsigned int) REG << 7);
2340 596727492 : hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2341 596727492 : return hash;
2342 : }
2343 :
2344 : /* We handle SUBREG of a REG specially because the underlying
2345 : reg changes its hash value with every value change; we don't
2346 : want to have to forget unrelated subregs when one subreg changes. */
2347 37832119 : case SUBREG:
2348 37832119 : {
2349 37832119 : if (REG_P (SUBREG_REG (x)))
2350 : {
2351 75535610 : hash += (((unsigned int) SUBREG << 7)
2352 37767805 : + REGNO (SUBREG_REG (x))
2353 37767805 : + (constant_lower_bound (SUBREG_BYTE (x))
2354 37767805 : / UNITS_PER_WORD));
2355 37767805 : return hash;
2356 : }
2357 : break;
2358 : }
2359 :
2360 351706744 : case CONST_INT:
2361 351706744 : hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2362 351706744 : + (unsigned int) INTVAL (x));
2363 351706744 : return hash;
2364 :
2365 : case CONST_WIDE_INT:
2366 3077961 : for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
2367 2052138 : hash += CONST_WIDE_INT_ELT (x, i);
2368 : return hash;
2369 :
2370 0 : case CONST_POLY_INT:
2371 0 : {
2372 0 : inchash::hash h;
2373 0 : h.add_int (hash);
2374 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2375 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
2376 0 : return h.end ();
2377 : }
2378 :
2379 4431592 : case CONST_DOUBLE:
2380 : /* This is like the general case, except that it only counts
2381 : the integers representing the constant. */
2382 4431592 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2383 4431592 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
2384 : hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2385 : + (unsigned int) CONST_DOUBLE_HIGH (x));
2386 : else
2387 4431592 : hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2388 4431592 : return hash;
2389 :
2390 0 : case CONST_FIXED:
2391 0 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2392 0 : hash += fixed_hash (CONST_FIXED_VALUE (x));
2393 0 : return hash;
2394 :
2395 3918382 : case CONST_VECTOR:
2396 3918382 : {
2397 3918382 : int units;
2398 3918382 : rtx elt;
2399 :
2400 3918382 : units = const_vector_encoded_nelts (x);
2401 :
2402 10602088 : for (i = 0; i < units; ++i)
2403 : {
2404 6683706 : elt = CONST_VECTOR_ENCODED_ELT (x, i);
2405 6683706 : hash += hash_rtx (elt, GET_MODE (elt),
2406 : do_not_record_p, hash_arg_in_memory_p,
2407 : have_reg_qty, cb);
2408 : }
2409 :
2410 : return hash;
2411 : }
2412 :
2413 : /* Assume there is only one rtx object for any given label. */
2414 20761137 : case LABEL_REF:
2415 : /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2416 : differences and differences between each stage's debugging dumps. */
2417 20761137 : hash += (((unsigned int) LABEL_REF << 7)
2418 20761137 : + CODE_LABEL_NUMBER (label_ref_label (x)));
2419 20761137 : return hash;
2420 :
2421 157394436 : case SYMBOL_REF:
2422 157394436 : {
2423 : /* Don't hash on the symbol's address to avoid bootstrap differences.
2424 : Different hash values may cause expressions to be recorded in
2425 : different orders and thus different registers to be used in the
2426 : final assembler. This also avoids differences in the dump files
2427 : between various stages. */
2428 157394436 : unsigned int h = 0;
2429 157394436 : const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2430 :
2431 3592118475 : while (*p)
2432 3434724039 : h += (h << 7) + *p++; /* ??? revisit */
2433 :
2434 157394436 : hash += ((unsigned int) SYMBOL_REF << 7) + h;
2435 157394436 : return hash;
2436 : }
2437 :
2438 274001573 : case MEM:
2439 : /* We don't record if marked volatile or if BLKmode since we don't
2440 : know the size of the move. */
2441 274001573 : if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2442 : {
2443 5235019 : *do_not_record_p = 1;
2444 5235019 : return 0;
2445 : }
2446 268766554 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2447 61084287 : *hash_arg_in_memory_p = 1;
2448 :
2449 : /* Now that we have already found this special case,
2450 : might as well speed it up as much as possible. */
2451 268766554 : hash += (unsigned) MEM;
2452 268766554 : x = XEXP (x, 0);
2453 268766554 : goto repeat;
2454 :
2455 73 : case USE:
2456 : /* A USE that mentions non-volatile memory needs special
2457 : handling since the MEM may be BLKmode which normally
2458 : prevents an entry from being made. Pure calls are
2459 : marked by a USE which mentions BLKmode memory.
2460 : See calls.cc:emit_call_1. */
2461 73 : if (MEM_P (XEXP (x, 0))
2462 73 : && ! MEM_VOLATILE_P (XEXP (x, 0)))
2463 : {
2464 0 : hash += (unsigned) USE;
2465 0 : x = XEXP (x, 0);
2466 :
2467 0 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2468 0 : *hash_arg_in_memory_p = 1;
2469 :
2470 : /* Now that we have already found this special case,
2471 : might as well speed it up as much as possible. */
2472 0 : hash += (unsigned) MEM;
2473 0 : x = XEXP (x, 0);
2474 0 : goto repeat;
2475 : }
2476 : break;
2477 :
2478 52742834 : case PRE_DEC:
2479 52742834 : case PRE_INC:
2480 52742834 : case POST_DEC:
2481 52742834 : case POST_INC:
2482 52742834 : case PRE_MODIFY:
2483 52742834 : case POST_MODIFY:
2484 52742834 : case PC:
2485 52742834 : case CALL:
2486 52742834 : case UNSPEC_VOLATILE:
2487 52742834 : if (do_not_record_p) {
2488 52741457 : *do_not_record_p = 1;
2489 52741457 : return 0;
2490 : }
2491 : else
2492 : return hash;
2493 210910 : break;
2494 :
2495 210910 : case ASM_OPERANDS:
2496 210910 : if (do_not_record_p && MEM_VOLATILE_P (x))
2497 : {
2498 173627 : *do_not_record_p = 1;
2499 173627 : return 0;
2500 : }
2501 : else
2502 : {
2503 : /* We don't want to take the filename and line into account. */
2504 74566 : hash += (unsigned) code + (unsigned) GET_MODE (x)
2505 37283 : + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2506 37283 : + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2507 37283 : + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2508 :
2509 37283 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2510 : {
2511 56890 : for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2512 : {
2513 48840 : hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2514 24420 : GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2515 : do_not_record_p, hash_arg_in_memory_p,
2516 : have_reg_qty, cb)
2517 24420 : + hash_rtx_string
2518 48840 : (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2519 : }
2520 :
2521 32470 : hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2522 32470 : x = ASM_OPERANDS_INPUT (x, 0);
2523 32470 : mode = GET_MODE (x);
2524 32470 : goto repeat;
2525 : }
2526 :
2527 : return hash;
2528 : }
2529 : break;
2530 :
2531 : default:
2532 : break;
2533 : }
2534 :
2535 365251830 : i = GET_RTX_LENGTH (code) - 1;
2536 365251830 : hash += (unsigned) code + (unsigned) GET_MODE (x);
2537 365251830 : fmt = GET_RTX_FORMAT (code);
2538 739025457 : for (; i >= 0; i--)
2539 : {
2540 732544935 : switch (fmt[i])
2541 : {
2542 720723353 : case 'e':
2543 : /* If we are about to do the last recursive call
2544 : needed at this level, change it into iteration.
2545 : This function is called enough to be worth it. */
2546 720723353 : if (i == 0)
2547 : {
2548 358771308 : x = XEXP (x, i);
2549 358771308 : goto repeat;
2550 : }
2551 :
2552 361952045 : hash += hash_rtx (XEXP (x, i), VOIDmode, do_not_record_p,
2553 : hash_arg_in_memory_p,
2554 : have_reg_qty, cb);
2555 361952045 : break;
2556 :
2557 : case 'E':
2558 16672542 : for (j = 0; j < XVECLEN (x, i); j++)
2559 10192268 : hash += hash_rtx (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2560 : hash_arg_in_memory_p,
2561 : have_reg_qty, cb);
2562 : break;
2563 :
2564 0 : case 's':
2565 0 : hash += hash_rtx_string (XSTR (x, i));
2566 0 : break;
2567 :
2568 5276942 : case 'i':
2569 5276942 : hash += (unsigned int) XINT (x, i);
2570 5276942 : break;
2571 :
2572 0 : case 'L':
2573 0 : hash += (unsigned int) XLOC (x, i);
2574 0 : break;
2575 :
2576 64314 : case 'p':
2577 64314 : hash += constant_lower_bound (SUBREG_BYTE (x));
2578 64314 : break;
2579 :
2580 : case '0': case 't':
2581 : /* Unused. */
2582 : break;
2583 :
2584 0 : default:
2585 0 : gcc_unreachable ();
2586 : }
2587 : }
2588 :
2589 : return hash;
2590 : }
2591 :
2592 : /* Hash an rtx X for cse via hash_rtx.
2593 : Stores 1 in do_not_record if any subexpression is volatile.
2594 : Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2595 : does not have the MEM_READONLY_P flag set. */
2596 :
2597 : static inline unsigned
2598 528550163 : canon_hash (rtx x, machine_mode mode)
2599 : {
2600 528550163 : return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2601 : }
2602 :
2603 : /* Like canon_hash but with no side effects, i.e. do_not_record
2604 : and hash_arg_in_memory are not changed. */
2605 :
2606 : static inline unsigned
2607 170570475 : safe_hash (rtx x, machine_mode mode)
2608 : {
2609 170570475 : int dummy_do_not_record;
2610 170570475 : return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2611 : }
2612 :
2613 : /* Return true iff X and Y would canonicalize into the same thing,
2614 : without actually constructing the canonicalization of either one.
2615 : If VALIDATE is nonzero,
2616 : we assume X is an expression being processed from the rtl
2617 : and Y was found in the hash table. We check register refs
2618 : in Y for being marked as valid.
2619 :
2620 : If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2621 :
2622 : bool
2623 791405086 : exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2624 : {
2625 791405086 : int i, j;
2626 791405086 : enum rtx_code code;
2627 791405086 : const char *fmt;
2628 :
2629 : /* Note: it is incorrect to assume an expression is equivalent to itself
2630 : if VALIDATE is nonzero. */
2631 791405086 : if (x == y && !validate)
2632 : return true;
2633 :
2634 767657596 : if (x == 0 || y == 0)
2635 : return x == y;
2636 :
2637 767657596 : code = GET_CODE (x);
2638 767657596 : if (code != GET_CODE (y))
2639 : return false;
2640 :
2641 : /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2642 657764436 : if (GET_MODE (x) != GET_MODE (y))
2643 : return false;
2644 :
2645 : /* MEMs referring to different address space are not equivalent. */
2646 686804105 : if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2647 : return false;
2648 :
2649 579236522 : switch (code)
2650 : {
2651 : case PC:
2652 : CASE_CONST_UNIQUE:
2653 : return x == y;
2654 :
2655 : case CONST_VECTOR:
2656 : if (!same_vector_encodings_p (x, y))
2657 : return false;
2658 : break;
2659 :
2660 23597 : case LABEL_REF:
2661 23597 : return label_ref_label (x) == label_ref_label (y);
2662 :
2663 17616556 : case SYMBOL_REF:
2664 17616556 : return XSTR (x, 0) == XSTR (y, 0);
2665 :
2666 169975147 : case REG:
2667 169975147 : if (for_gcse)
2668 1324662 : return REGNO (x) == REGNO (y);
2669 : else
2670 : {
2671 168650485 : unsigned int regno = REGNO (y);
2672 168650485 : unsigned int i;
2673 168650485 : unsigned int endregno = END_REGNO (y);
2674 :
2675 : /* If the quantities are not the same, the expressions are not
2676 : equivalent. If there are and we are not to validate, they
2677 : are equivalent. Otherwise, ensure all regs are up-to-date. */
2678 :
2679 168650485 : if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2680 : return false;
2681 :
2682 154813117 : if (! validate)
2683 : return true;
2684 :
2685 286078161 : for (i = regno; i < endregno; i++)
2686 144230436 : if (REG_IN_TABLE (i) != REG_TICK (i))
2687 : return false;
2688 :
2689 : return true;
2690 : }
2691 :
2692 106081949 : case MEM:
2693 106081949 : if (for_gcse)
2694 : {
2695 : /* A volatile mem should not be considered equivalent to any
2696 : other. */
2697 59872867 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2698 : return false;
2699 :
2700 : /* Can't merge two expressions in different alias sets, since we
2701 : can decide that the expression is transparent in a block when
2702 : it isn't, due to it being set with the different alias set.
2703 :
2704 : Also, can't merge two expressions with different MEM_ATTRS.
2705 : They could e.g. be two different entities allocated into the
2706 : same space on the stack (see e.g. PR25130). In that case, the
2707 : MEM addresses can be the same, even though the two MEMs are
2708 : absolutely not equivalent.
2709 :
2710 : But because really all MEM attributes should be the same for
2711 : equivalent MEMs, we just use the invariant that MEMs that have
2712 : the same attributes share the same mem_attrs data structure. */
2713 59761821 : if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y)))
2714 : return false;
2715 :
2716 : /* If we are handling exceptions, we cannot consider two expressions
2717 : with different trapping status as equivalent, because simple_mem
2718 : might accept one and reject the other. */
2719 9296891 : if (cfun->can_throw_non_call_exceptions
2720 9296891 : && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y)))
2721 : return false;
2722 : }
2723 : break;
2724 :
2725 : /* For commutative operations, check both orders. */
2726 72768275 : case PLUS:
2727 72768275 : case MULT:
2728 72768275 : case AND:
2729 72768275 : case IOR:
2730 72768275 : case XOR:
2731 72768275 : case NE:
2732 72768275 : case EQ:
2733 72768275 : return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2734 : validate, for_gcse)
2735 67038362 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2736 : validate, for_gcse))
2737 79636054 : || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2738 : validate, for_gcse)
2739 18674 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2740 : validate, for_gcse)));
2741 :
2742 13099 : case ASM_OPERANDS:
2743 : /* We don't use the generic code below because we want to
2744 : disregard filename and line numbers. */
2745 :
2746 : /* A volatile asm isn't equivalent to any other. */
2747 13099 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2748 : return false;
2749 :
2750 13099 : if (GET_MODE (x) != GET_MODE (y)
2751 13099 : || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2752 13099 : || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2753 13099 : ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2754 13089 : || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2755 13089 : || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2756 : return false;
2757 :
2758 13089 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2759 : {
2760 17769 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2761 9000 : if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2762 9000 : ASM_OPERANDS_INPUT (y, i),
2763 : validate, for_gcse)
2764 9000 : || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2765 8887 : ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2766 : return false;
2767 : }
2768 :
2769 : return true;
2770 :
2771 : default:
2772 : break;
2773 : }
2774 :
2775 : /* Compare the elements. If any pair of corresponding elements
2776 : fail to match, return 0 for the whole thing. */
2777 :
2778 125494765 : fmt = GET_RTX_FORMAT (code);
2779 350944417 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2780 : {
2781 237847047 : switch (fmt[i])
2782 : {
2783 160518032 : case 'e':
2784 160518032 : if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2785 : validate, for_gcse))
2786 : return false;
2787 : break;
2788 :
2789 9757537 : case 'E':
2790 9757537 : if (XVECLEN (x, i) != XVECLEN (y, i))
2791 : return 0;
2792 46976382 : for (j = 0; j < XVECLEN (x, i); j++)
2793 38118633 : if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2794 : validate, for_gcse))
2795 : return false;
2796 : break;
2797 :
2798 0 : case 's':
2799 0 : if (strcmp (XSTR (x, i), XSTR (y, i)))
2800 : return false;
2801 : break;
2802 :
2803 3551218 : case 'i':
2804 3551218 : if (XINT (x, i) != XINT (y, i))
2805 : return false;
2806 : break;
2807 :
2808 0 : case 'L':
2809 0 : if (XLOC (x, i) != XLOC (y, i))
2810 : return false;
2811 : break;
2812 :
2813 0 : case 'w':
2814 0 : if (XWINT (x, i) != XWINT (y, i))
2815 : return false;
2816 : break;
2817 :
2818 8523946 : case 'p':
2819 8523946 : if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2820 : return false;
2821 : break;
2822 :
2823 : case '0':
2824 : case 't':
2825 : break;
2826 :
2827 0 : default:
2828 0 : gcc_unreachable ();
2829 : }
2830 : }
2831 :
2832 : return true;
2833 : }
2834 :
2835 : /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2836 : the result if necessary. INSN is as for canon_reg. */
2837 :
2838 : static void
2839 1074312557 : validate_canon_reg (rtx *xloc, rtx_insn *insn)
2840 : {
2841 1074312557 : if (*xloc)
2842 : {
2843 1074312557 : rtx new_rtx = canon_reg (*xloc, insn);
2844 :
2845 : /* If replacing pseudo with hard reg or vice versa, ensure the
2846 : insn remains valid. Likewise if the insn has MATCH_DUPs. */
2847 1074312557 : gcc_assert (insn && new_rtx);
2848 1074312557 : validate_change (insn, xloc, new_rtx, 1);
2849 : }
2850 1074312557 : }
2851 :
2852 : /* Canonicalize an expression:
2853 : replace each register reference inside it
2854 : with the "oldest" equivalent register.
2855 :
2856 : If INSN is nonzero validate_change is used to ensure that INSN remains valid
2857 : after we make our substitution. The calls are made with IN_GROUP nonzero
2858 : so apply_change_group must be called upon the outermost return from this
2859 : function (unless INSN is zero). The result of apply_change_group can
2860 : generally be discarded since the changes we are making are optional. */
2861 :
2862 : static rtx
2863 1780086220 : canon_reg (rtx x, rtx_insn *insn)
2864 : {
2865 1780086220 : int i;
2866 1780086220 : enum rtx_code code;
2867 1780086220 : const char *fmt;
2868 :
2869 1780086220 : if (x == 0)
2870 : return x;
2871 :
2872 1780086220 : code = GET_CODE (x);
2873 1780086220 : switch (code)
2874 : {
2875 : case PC:
2876 : case CONST:
2877 : CASE_CONST_ANY:
2878 : case SYMBOL_REF:
2879 : case LABEL_REF:
2880 : case ADDR_VEC:
2881 : case ADDR_DIFF_VEC:
2882 : return x;
2883 :
2884 10314890 : case SUBREG:
2885 10314890 : {
2886 10314890 : rtx inner = canon_reg (SUBREG_REG (x), insn);
2887 10314890 : if (inner != SUBREG_REG (x))
2888 : {
2889 262854 : rtx newx = simplify_subreg (GET_MODE (x), inner,
2890 131427 : GET_MODE (SUBREG_REG (x)),
2891 131427 : SUBREG_BYTE (x));
2892 131427 : if (newx)
2893 : return newx;
2894 :
2895 131427 : if (validate_subreg (GET_MODE (x), GET_MODE (inner),
2896 131427 : inner, SUBREG_BYTE (x)))
2897 131427 : validate_change (insn, &SUBREG_REG (x), inner, 1);
2898 : }
2899 : return x;
2900 : }
2901 :
2902 487769119 : case REG:
2903 487769119 : {
2904 487769119 : int first;
2905 487769119 : int q;
2906 487769119 : struct qty_table_elem *ent;
2907 :
2908 : /* Never replace a hard reg, because hard regs can appear
2909 : in more than one machine mode, and we must preserve the mode
2910 : of each occurrence. Also, some hard regs appear in
2911 : MEMs that are shared and mustn't be altered. Don't try to
2912 : replace any reg that maps to a reg of class NO_REGS. */
2913 487769119 : if (REGNO (x) < FIRST_PSEUDO_REGISTER
2914 487769119 : || ! REGNO_QTY_VALID_P (REGNO (x)))
2915 : return x;
2916 :
2917 171777173 : q = REG_QTY (REGNO (x));
2918 171777173 : ent = &qty_table[q];
2919 171777173 : first = ent->first_reg;
2920 171777173 : return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2921 405496 : : REGNO_REG_CLASS (first) == NO_REGS ? x
2922 171777173 : : gen_rtx_REG (ent->mode, first));
2923 : }
2924 :
2925 792406447 : default:
2926 792406447 : break;
2927 : }
2928 :
2929 792406447 : fmt = GET_RTX_FORMAT (code);
2930 2173710191 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2931 : {
2932 1381303744 : int j;
2933 :
2934 1381303744 : if (fmt[i] == 'e')
2935 1060893328 : validate_canon_reg (&XEXP (x, i), insn);
2936 320410416 : else if (fmt[i] == 'E')
2937 20196431 : for (j = 0; j < XVECLEN (x, i); j++)
2938 13419229 : validate_canon_reg (&XVECEXP (x, i, j), insn);
2939 : }
2940 :
2941 : return x;
2942 : }
2943 :
2944 : /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2945 : operation (EQ, NE, GT, etc.), follow it back through the hash table and
2946 : what values are being compared.
2947 :
2948 : *PARG1 and *PARG2 are updated to contain the rtx representing the values
2949 : actually being compared. For example, if *PARG1 was (reg:CC CC_REG) and
2950 : *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that
2951 : were compared to produce (reg:CC CC_REG).
2952 :
2953 : The return value is the comparison operator and is either the code of
2954 : A or the code corresponding to the inverse of the comparison. */
2955 :
2956 : static enum rtx_code
2957 37640457 : find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2958 : machine_mode *pmode1, machine_mode *pmode2)
2959 : {
2960 37640457 : rtx arg1, arg2;
2961 37640457 : hash_set<rtx> *visited = NULL;
2962 : /* Set nonzero when we find something of interest. */
2963 37640457 : rtx x = NULL;
2964 :
2965 37640457 : arg1 = *parg1, arg2 = *parg2;
2966 :
2967 : /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2968 :
2969 73364513 : while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2970 : {
2971 54759398 : int reverse_code = 0;
2972 54759398 : struct table_elt *p = 0;
2973 :
2974 : /* Remember state from previous iteration. */
2975 54759398 : if (x)
2976 : {
2977 17195239 : if (!visited)
2978 17190579 : visited = new hash_set<rtx>;
2979 17195239 : visited->add (x);
2980 17195239 : x = 0;
2981 : }
2982 :
2983 : /* If arg1 is a COMPARE, extract the comparison arguments from it. */
2984 :
2985 54759398 : if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2986 0 : x = arg1;
2987 :
2988 : /* If ARG1 is a comparison operator and CODE is testing for
2989 : STORE_FLAG_VALUE, get the inner arguments. */
2990 :
2991 54759398 : else if (COMPARISON_P (arg1))
2992 : {
2993 : #ifdef FLOAT_STORE_FLAG_VALUE
2994 : REAL_VALUE_TYPE fsfv;
2995 : #endif
2996 :
2997 0 : if (code == NE
2998 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2999 : && code == LT && STORE_FLAG_VALUE == -1)
3000 : #ifdef FLOAT_STORE_FLAG_VALUE
3001 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3002 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3003 : REAL_VALUE_NEGATIVE (fsfv)))
3004 : #endif
3005 : )
3006 0 : x = arg1;
3007 0 : else if (code == EQ
3008 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3009 : && code == GE && STORE_FLAG_VALUE == -1)
3010 : #ifdef FLOAT_STORE_FLAG_VALUE
3011 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3012 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3013 : REAL_VALUE_NEGATIVE (fsfv)))
3014 : #endif
3015 : )
3016 0 : x = arg1, reverse_code = 1;
3017 : }
3018 :
3019 : /* ??? We could also check for
3020 :
3021 : (ne (and (eq (...) (const_int 1))) (const_int 0))
3022 :
3023 : and related forms, but let's wait until we see them occurring. */
3024 :
3025 54759398 : if (x == 0)
3026 : /* Look up ARG1 in the hash table and see if it has an equivalence
3027 : that lets us see what is being compared. */
3028 54759398 : p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3029 54759398 : if (p)
3030 : {
3031 43740950 : p = p->first_same_value;
3032 :
3033 : /* If what we compare is already known to be constant, that is as
3034 : good as it gets.
3035 : We need to break the loop in this case, because otherwise we
3036 : can have an infinite loop when looking at a reg that is known
3037 : to be a constant which is the same as a comparison of a reg
3038 : against zero which appears later in the insn stream, which in
3039 : turn is constant and the same as the comparison of the first reg
3040 : against zero... */
3041 43740950 : if (p->is_const)
3042 : break;
3043 : }
3044 :
3045 70141936 : for (; p; p = p->next_same_value)
3046 : {
3047 51112103 : machine_mode inner_mode = GET_MODE (p->exp);
3048 : #ifdef FLOAT_STORE_FLAG_VALUE
3049 : REAL_VALUE_TYPE fsfv;
3050 : #endif
3051 :
3052 : /* If the entry isn't valid, skip it. */
3053 51112103 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3054 1847986 : continue;
3055 :
3056 : /* If it's a comparison we've used before, skip it. */
3057 49264117 : if (visited && visited->contains (p->exp))
3058 0 : continue;
3059 :
3060 49264117 : if (GET_CODE (p->exp) == COMPARE
3061 : /* Another possibility is that this machine has a compare insn
3062 : that includes the comparison code. In that case, ARG1 would
3063 : be equivalent to a comparison operation that would set ARG1 to
3064 : either STORE_FLAG_VALUE or zero. If this is an NE operation,
3065 : ORIG_CODE is the actual comparison being done; if it is an EQ,
3066 : we must reverse ORIG_CODE. On machine with a negative value
3067 : for STORE_FLAG_VALUE, also look at LT and GE operations. */
3068 49264117 : || ((code == NE
3069 9182188 : || (code == LT
3070 259539 : && val_signbit_known_set_p (inner_mode,
3071 : STORE_FLAG_VALUE))
3072 : #ifdef FLOAT_STORE_FLAG_VALUE
3073 : || (code == LT
3074 : && SCALAR_FLOAT_MODE_P (inner_mode)
3075 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3076 : REAL_VALUE_NEGATIVE (fsfv)))
3077 : #endif
3078 : )
3079 4465116 : && COMPARISON_P (p->exp)))
3080 : {
3081 35620181 : x = p->exp;
3082 35620181 : break;
3083 : }
3084 13643936 : else if ((code == EQ
3085 7643209 : || (code == GE
3086 227704 : && val_signbit_known_set_p (inner_mode,
3087 : STORE_FLAG_VALUE))
3088 : #ifdef FLOAT_STORE_FLAG_VALUE
3089 : || (code == GE
3090 : && SCALAR_FLOAT_MODE_P (inner_mode)
3091 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3092 : REAL_VALUE_NEGATIVE (fsfv)))
3093 : #endif
3094 : )
3095 13643936 : && COMPARISON_P (p->exp))
3096 : {
3097 103875 : reverse_code = 1;
3098 103875 : x = p->exp;
3099 103875 : break;
3100 : }
3101 :
3102 : /* If this non-trapping address, e.g. fp + constant, the
3103 : equivalent is a better operand since it may let us predict
3104 : the value of the comparison. */
3105 13540061 : else if (!rtx_addr_can_trap_p (p->exp))
3106 : {
3107 0 : arg1 = p->exp;
3108 0 : continue;
3109 : }
3110 : }
3111 :
3112 : /* If we didn't find a useful equivalence for ARG1, we are done.
3113 : Otherwise, set up for the next iteration. */
3114 54753889 : if (x == 0)
3115 : break;
3116 :
3117 : /* If we need to reverse the comparison, make sure that is
3118 : possible -- we can't necessarily infer the value of GE from LT
3119 : with floating-point operands. */
3120 35724056 : if (reverse_code)
3121 : {
3122 103875 : enum rtx_code reversed = reversed_comparison_code (x, NULL);
3123 103875 : if (reversed == UNKNOWN)
3124 : break;
3125 : else
3126 : code = reversed;
3127 : }
3128 35620181 : else if (COMPARISON_P (x))
3129 3368 : code = GET_CODE (x);
3130 35724056 : arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3131 : }
3132 :
3133 : /* Return our results. Return the modes from before fold_rtx
3134 : because fold_rtx might produce const_int, and then it's too late. */
3135 37640457 : *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3136 37640457 : *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3137 :
3138 37640457 : if (visited)
3139 17190579 : delete visited;
3140 37640457 : return code;
3141 : }
3142 :
3143 : /* If X is a nontrivial arithmetic operation on an argument for which
3144 : a constant value can be determined, return the result of operating
3145 : on that value, as a constant. Otherwise, return X, possibly with
3146 : one or more operands changed to a forward-propagated constant.
3147 :
3148 : If X is a register whose contents are known, we do NOT return
3149 : those contents here; equiv_constant is called to perform that task.
3150 : For SUBREGs and MEMs, we do that both here and in equiv_constant.
3151 :
3152 : INSN is the insn that we may be modifying. If it is 0, make a copy
3153 : of X before modifying it. */
3154 :
3155 : static rtx
3156 407168558 : fold_rtx (rtx x, rtx_insn *insn)
3157 : {
3158 407170397 : enum rtx_code code;
3159 407170397 : machine_mode mode;
3160 407170397 : const char *fmt;
3161 407170397 : int i;
3162 407170397 : rtx new_rtx = 0;
3163 407170397 : bool changed = false;
3164 407170397 : poly_int64 xval;
3165 :
3166 : /* Operands of X. */
3167 : /* Workaround -Wmaybe-uninitialized false positive during
3168 : profiledbootstrap by initializing them. */
3169 407170397 : rtx folded_arg0 = NULL_RTX;
3170 407170397 : rtx folded_arg1 = NULL_RTX;
3171 :
3172 : /* Constant equivalents of first three operands of X;
3173 : 0 when no such equivalent is known. */
3174 407170397 : rtx const_arg0;
3175 407170397 : rtx const_arg1;
3176 407170397 : rtx const_arg2;
3177 :
3178 : /* The mode of the first operand of X. We need this for sign and zero
3179 : extends. */
3180 407170397 : machine_mode mode_arg0;
3181 :
3182 407170397 : if (x == 0)
3183 : return x;
3184 :
3185 : /* Try to perform some initial simplifications on X. */
3186 407170397 : code = GET_CODE (x);
3187 407170397 : switch (code)
3188 : {
3189 63430056 : case MEM:
3190 63430056 : case SUBREG:
3191 : /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3192 : than it would in other contexts. Basically its mode does not
3193 : signify the size of the object read. That information is carried
3194 : by size operand. If we happen to have a MEM of the appropriate
3195 : mode in our tables with a constant value we could simplify the
3196 : extraction incorrectly if we allowed substitution of that value
3197 : for the MEM. */
3198 63430056 : case ZERO_EXTRACT:
3199 63430056 : case SIGN_EXTRACT:
3200 63430056 : if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3201 2326371 : return new_rtx;
3202 : return x;
3203 :
3204 : case CONST:
3205 : CASE_CONST_ANY:
3206 : case SYMBOL_REF:
3207 : case LABEL_REF:
3208 : case REG:
3209 : case PC:
3210 : /* No use simplifying an EXPR_LIST
3211 : since they are used only for lists of args
3212 : in a function call's REG_EQUAL note. */
3213 : case EXPR_LIST:
3214 : return x;
3215 :
3216 209976 : case ASM_OPERANDS:
3217 209976 : if (insn)
3218 : {
3219 0 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3220 0 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3221 0 : fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3222 : }
3223 : return x;
3224 :
3225 16036403 : case CALL:
3226 16036403 : if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3227 : return x;
3228 : break;
3229 959578 : case VEC_SELECT:
3230 959578 : {
3231 959578 : rtx trueop0 = XEXP (x, 0);
3232 959578 : mode = GET_MODE (trueop0);
3233 959578 : rtx trueop1 = XEXP (x, 1);
3234 : /* If we select a low-part subreg, return that. */
3235 959578 : if (vec_series_lowpart_p (GET_MODE (x), mode, trueop1))
3236 : {
3237 219 : rtx new_rtx = lowpart_subreg (GET_MODE (x), trueop0, mode);
3238 219 : if (new_rtx != NULL_RTX)
3239 : return new_rtx;
3240 : }
3241 : }
3242 :
3243 : /* Anything else goes through the loop below. */
3244 : default:
3245 : break;
3246 : }
3247 :
3248 118956387 : mode = GET_MODE (x);
3249 118956387 : const_arg0 = 0;
3250 118956387 : const_arg1 = 0;
3251 118956387 : const_arg2 = 0;
3252 118956387 : mode_arg0 = VOIDmode;
3253 :
3254 : /* Try folding our operands.
3255 : Then see which ones have constant values known. */
3256 :
3257 118956387 : fmt = GET_RTX_FORMAT (code);
3258 371083882 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3259 252127495 : if (fmt[i] == 'e')
3260 : {
3261 247535890 : rtx folded_arg = XEXP (x, i), const_arg;
3262 247535890 : machine_mode mode_arg = GET_MODE (folded_arg);
3263 :
3264 247535890 : switch (GET_CODE (folded_arg))
3265 : {
3266 110729145 : case MEM:
3267 110729145 : case REG:
3268 110729145 : case SUBREG:
3269 110729145 : const_arg = equiv_constant (folded_arg);
3270 110729145 : break;
3271 :
3272 : case CONST:
3273 : CASE_CONST_ANY:
3274 : case SYMBOL_REF:
3275 : case LABEL_REF:
3276 : const_arg = folded_arg;
3277 : break;
3278 :
3279 46592259 : default:
3280 46592259 : folded_arg = fold_rtx (folded_arg, insn);
3281 46592259 : const_arg = equiv_constant (folded_arg);
3282 46592259 : break;
3283 : }
3284 :
3285 : /* For the first three operands, see if the operand
3286 : is constant or equivalent to a constant. */
3287 247535890 : switch (i)
3288 : {
3289 116180905 : case 0:
3290 116180905 : folded_arg0 = folded_arg;
3291 116180905 : const_arg0 = const_arg;
3292 116180905 : mode_arg0 = mode_arg;
3293 116180905 : break;
3294 109989915 : case 1:
3295 109989915 : folded_arg1 = folded_arg;
3296 109989915 : const_arg1 = const_arg;
3297 109989915 : break;
3298 21365070 : case 2:
3299 21365070 : const_arg2 = const_arg;
3300 21365070 : break;
3301 : }
3302 :
3303 : /* Pick the least expensive of the argument and an equivalent constant
3304 : argument. */
3305 247535890 : if (const_arg != 0
3306 247535890 : && const_arg != folded_arg
3307 6141290 : && (COST_IN (const_arg, mode_arg, code, i)
3308 3070645 : <= COST_IN (folded_arg, mode_arg, code, i))
3309 :
3310 : /* It's not safe to substitute the operand of a conversion
3311 : operator with a constant, as the conversion's identity
3312 : depends upon the mode of its operand. This optimization
3313 : is handled by the call to simplify_unary_operation. */
3314 249154270 : && (GET_RTX_CLASS (code) != RTX_UNARY
3315 422061 : || GET_MODE (const_arg) == mode_arg0
3316 338246 : || (code != ZERO_EXTEND
3317 : && code != SIGN_EXTEND
3318 338246 : && code != TRUNCATE
3319 338246 : && code != FLOAT_TRUNCATE
3320 265134 : && code != FLOAT_EXTEND
3321 265134 : && code != FLOAT
3322 : && code != FIX
3323 264944 : && code != UNSIGNED_FLOAT
3324 264944 : && code != UNSIGNED_FIX)))
3325 : folded_arg = const_arg;
3326 :
3327 247535890 : if (folded_arg == XEXP (x, i))
3328 245449548 : continue;
3329 :
3330 2086342 : if (insn == NULL_RTX && !changed)
3331 1893653 : x = copy_rtx (x);
3332 2086342 : changed = true;
3333 2086342 : validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3334 : }
3335 :
3336 118956387 : if (changed)
3337 : {
3338 : /* Canonicalize X if necessary, and keep const_argN and folded_argN
3339 : consistent with the order in X. */
3340 1894152 : if (canonicalize_change_group (insn, x))
3341 : {
3342 103553 : std::swap (const_arg0, const_arg1);
3343 103553 : std::swap (folded_arg0, folded_arg1);
3344 : }
3345 :
3346 1894152 : apply_change_group ();
3347 : }
3348 :
3349 : /* If X is an arithmetic operation, see if we can simplify it. */
3350 :
3351 118956387 : switch (GET_RTX_CLASS (code))
3352 : {
3353 6190990 : case RTX_UNARY:
3354 6190990 : {
3355 : /* We can't simplify extension ops unless we know the
3356 : original mode. */
3357 6190990 : if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3358 4342307 : && mode_arg0 == VOIDmode)
3359 : break;
3360 :
3361 6190990 : new_rtx = simplify_unary_operation (code, mode,
3362 : const_arg0 ? const_arg0 : folded_arg0,
3363 : mode_arg0);
3364 : }
3365 6190990 : break;
3366 :
3367 22754554 : case RTX_COMPARE:
3368 22754554 : case RTX_COMM_COMPARE:
3369 : /* See what items are actually being compared and set FOLDED_ARG[01]
3370 : to those values and CODE to the actual comparison code. If any are
3371 : constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3372 : do anything if both operands are already known to be constant. */
3373 :
3374 : /* ??? Vector mode comparisons are not supported yet. */
3375 22754554 : if (VECTOR_MODE_P (mode))
3376 : break;
3377 :
3378 22616225 : if (const_arg0 == 0 || const_arg1 == 0)
3379 : {
3380 22615080 : struct table_elt *p0, *p1;
3381 22615080 : rtx true_rtx, false_rtx;
3382 22615080 : machine_mode mode_arg1;
3383 :
3384 22615080 : if (SCALAR_FLOAT_MODE_P (mode))
3385 : {
3386 : #ifdef FLOAT_STORE_FLAG_VALUE
3387 : true_rtx = (const_double_from_real_value
3388 : (FLOAT_STORE_FLAG_VALUE (mode), mode));
3389 : #else
3390 2539 : true_rtx = NULL_RTX;
3391 : #endif
3392 2539 : false_rtx = CONST0_RTX (mode);
3393 : }
3394 : else
3395 : {
3396 22612541 : true_rtx = const_true_rtx;
3397 22612541 : false_rtx = const0_rtx;
3398 : }
3399 :
3400 22615080 : code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3401 : &mode_arg0, &mode_arg1);
3402 :
3403 : /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3404 : what kinds of things are being compared, so we can't do
3405 : anything with this comparison. */
3406 :
3407 22615080 : if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3408 : break;
3409 :
3410 21266787 : const_arg0 = equiv_constant (folded_arg0);
3411 21266787 : const_arg1 = equiv_constant (folded_arg1);
3412 :
3413 : /* If we do not now have two constants being compared, see
3414 : if we can nevertheless deduce some things about the
3415 : comparison. */
3416 21266787 : if (const_arg0 == 0 || const_arg1 == 0)
3417 : {
3418 21058058 : if (const_arg1 != NULL)
3419 : {
3420 15710918 : rtx cheapest_simplification;
3421 15710918 : int cheapest_cost;
3422 15710918 : rtx simp_result;
3423 15710918 : struct table_elt *p;
3424 :
3425 : /* See if we can find an equivalent of folded_arg0
3426 : that gets us a cheaper expression, possibly a
3427 : constant through simplifications. */
3428 15710918 : p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3429 : mode_arg0);
3430 :
3431 15710918 : if (p != NULL)
3432 : {
3433 6482102 : cheapest_simplification = x;
3434 6482102 : cheapest_cost = COST (x, mode);
3435 :
3436 18811690 : for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3437 : {
3438 12329588 : int cost;
3439 :
3440 : /* If the entry isn't valid, skip it. */
3441 12329588 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3442 528584 : continue;
3443 :
3444 : /* Try to simplify using this equivalence. */
3445 11801004 : simp_result
3446 11801004 : = simplify_relational_operation (code, mode,
3447 : mode_arg0,
3448 : p->exp,
3449 : const_arg1);
3450 :
3451 11801004 : if (simp_result == NULL)
3452 11655519 : continue;
3453 :
3454 145485 : cost = COST (simp_result, mode);
3455 145485 : if (cost < cheapest_cost)
3456 : {
3457 12329588 : cheapest_cost = cost;
3458 12329588 : cheapest_simplification = simp_result;
3459 : }
3460 : }
3461 :
3462 : /* If we have a cheaper expression now, use that
3463 : and try folding it further, from the top. */
3464 6482102 : if (cheapest_simplification != x)
3465 1804 : return fold_rtx (copy_rtx (cheapest_simplification),
3466 11280 : insn);
3467 : }
3468 : }
3469 :
3470 : /* See if the two operands are the same. */
3471 :
3472 21253828 : if ((REG_P (folded_arg0)
3473 17797510 : && REG_P (folded_arg1)
3474 4687957 : && (REG_QTY (REGNO (folded_arg0))
3475 4687957 : == REG_QTY (REGNO (folded_arg1))))
3476 39039400 : || ((p0 = lookup (folded_arg0,
3477 : SAFE_HASH (folded_arg0, mode_arg0),
3478 : mode_arg0))
3479 9089382 : && (p1 = lookup (folded_arg1,
3480 : SAFE_HASH (folded_arg1, mode_arg0),
3481 : mode_arg0))
3482 2544462 : && p0->first_same_value == p1->first_same_value))
3483 12949 : folded_arg1 = folded_arg0;
3484 :
3485 : /* If FOLDED_ARG0 is a register, see if the comparison we are
3486 : doing now is either the same as we did before or the reverse
3487 : (we only check the reverse if not floating-point). */
3488 21240879 : else if (REG_P (folded_arg0))
3489 : {
3490 17785180 : int qty = REG_QTY (REGNO (folded_arg0));
3491 :
3492 17785180 : if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3493 : {
3494 17774385 : struct qty_table_elem *ent = &qty_table[qty];
3495 :
3496 17774385 : if ((comparison_dominates_p (ent->comparison_code, code)
3497 17291702 : || (! FLOAT_MODE_P (mode_arg0)
3498 17058186 : && comparison_dominates_p (ent->comparison_code,
3499 : reverse_condition (code))))
3500 18226701 : && (rtx_equal_p (ent->comparison_const, folded_arg1)
3501 927377 : || (const_arg1
3502 788568 : && rtx_equal_p (ent->comparison_const,
3503 : const_arg1))
3504 927377 : || (REG_P (folded_arg1)
3505 130005 : && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3506 : {
3507 9476 : if (comparison_dominates_p (ent->comparison_code, code))
3508 : {
3509 6759 : if (true_rtx)
3510 : return true_rtx;
3511 : else
3512 : break;
3513 : }
3514 : else
3515 : return false_rtx;
3516 : }
3517 : }
3518 : }
3519 : }
3520 : }
3521 :
3522 : /* If we are comparing against zero, see if the first operand is
3523 : equivalent to an IOR with a constant. If so, we may be able to
3524 : determine the result of this comparison. */
3525 21256652 : if (const_arg1 == const0_rtx && !const_arg0)
3526 : {
3527 9999011 : rtx y = lookup_as_function (folded_arg0, IOR);
3528 9999011 : rtx inner_const;
3529 :
3530 9999011 : if (y != 0
3531 77585 : && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3532 53 : && CONST_INT_P (inner_const)
3533 9999064 : && INTVAL (inner_const) != 0)
3534 53 : folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3535 : }
3536 :
3537 21249171 : {
3538 21249171 : rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0);
3539 21256652 : rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1);
3540 21256652 : new_rtx = simplify_relational_operation (code, mode, mode_arg0,
3541 : op0, op1);
3542 : }
3543 21256652 : break;
3544 :
3545 65347670 : case RTX_BIN_ARITH:
3546 65347670 : case RTX_COMM_ARITH:
3547 65347670 : switch (code)
3548 : {
3549 27992782 : case PLUS:
3550 : /* If the second operand is a LABEL_REF, see if the first is a MINUS
3551 : with that LABEL_REF as its second operand. If so, the result is
3552 : the first operand of that MINUS. This handles switches with an
3553 : ADDR_DIFF_VEC table. */
3554 27992782 : if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3555 : {
3556 2920 : rtx y
3557 2920 : = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3558 2920 : : lookup_as_function (folded_arg0, MINUS);
3559 :
3560 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3561 2920 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg1))
3562 0 : return XEXP (y, 0);
3563 :
3564 : /* Now try for a CONST of a MINUS like the above. */
3565 2920 : if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3566 2920 : : lookup_as_function (folded_arg0, CONST))) != 0
3567 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3568 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3569 2920 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg1))
3570 0 : return XEXP (XEXP (y, 0), 0);
3571 : }
3572 :
3573 : /* Likewise if the operands are in the other order. */
3574 27992782 : if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3575 : {
3576 23 : rtx y
3577 23 : = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3578 23 : : lookup_as_function (folded_arg1, MINUS);
3579 :
3580 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3581 23 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg0))
3582 0 : return XEXP (y, 0);
3583 :
3584 : /* Now try for a CONST of a MINUS like the above. */
3585 23 : if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3586 23 : : lookup_as_function (folded_arg1, CONST))) != 0
3587 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3588 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3589 23 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg0))
3590 0 : return XEXP (XEXP (y, 0), 0);
3591 : }
3592 :
3593 : /* If second operand is a register equivalent to a negative
3594 : CONST_INT, see if we can find a register equivalent to the
3595 : positive constant. Make a MINUS if so. Don't do this for
3596 : a non-negative constant since we might then alternate between
3597 : choosing positive and negative constants. Having the positive
3598 : constant previously-used is the more common case. Be sure
3599 : the resulting constant is non-negative; if const_arg1 were
3600 : the smallest negative number this would overflow: depending
3601 : on the mode, this would either just be the same value (and
3602 : hence not save anything) or be incorrect. */
3603 27992782 : if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3604 22385431 : && INTVAL (const_arg1) < 0
3605 : /* This used to test
3606 :
3607 : -INTVAL (const_arg1) >= 0
3608 :
3609 : But The Sun V5.0 compilers mis-compiled that test. So
3610 : instead we test for the problematic value in a more direct
3611 : manner and hope the Sun compilers get it correct. */
3612 12687240 : && INTVAL (const_arg1) !=
3613 : (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1))
3614 12668012 : && REG_P (folded_arg1))
3615 : {
3616 32578 : rtx new_const = GEN_INT (-INTVAL (const_arg1));
3617 32578 : struct table_elt *p
3618 32578 : = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3619 :
3620 32578 : if (p)
3621 5133 : for (p = p->first_same_value; p; p = p->next_same_value)
3622 5129 : if (REG_P (p->exp))
3623 2712 : return simplify_gen_binary (MINUS, mode, folded_arg0,
3624 2712 : canon_reg (p->exp, NULL));
3625 : }
3626 27990070 : goto from_plus;
3627 :
3628 2321224 : case MINUS:
3629 : /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3630 : If so, produce (PLUS Z C2-C). */
3631 2321224 : if (const_arg1 != 0 && poly_int_rtx_p (const_arg1, &xval))
3632 : {
3633 43245 : rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3634 43245 : if (y && poly_int_rtx_p (XEXP (y, 1)))
3635 35 : return fold_rtx (plus_constant (mode, copy_rtx (y), -xval),
3636 35 : NULL);
3637 : }
3638 :
3639 : /* Fall through. */
3640 :
3641 40863847 : from_plus:
3642 40863847 : case SMIN: case SMAX: case UMIN: case UMAX:
3643 40863847 : case IOR: case AND: case XOR:
3644 40863847 : case MULT:
3645 40863847 : case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3646 : /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3647 : is known to be of similar form, we may be able to replace the
3648 : operation with a combined operation. This may eliminate the
3649 : intermediate operation if every use is simplified in this way.
3650 : Note that the similar optimization done by combine.cc only works
3651 : if the intermediate operation's result has only one reference. */
3652 :
3653 40863847 : if (REG_P (folded_arg0)
3654 37467962 : && const_arg1 && CONST_INT_P (const_arg1))
3655 : {
3656 27306248 : int is_shift
3657 27306248 : = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3658 : rtx y, inner_const, new_const;
3659 : rtx canon_const_arg1 = const_arg1;
3660 : enum rtx_code associate_code;
3661 :
3662 : if (is_shift
3663 6740970 : && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode)
3664 3370318 : || INTVAL (const_arg1) < 0))
3665 : {
3666 : if (SHIFT_COUNT_TRUNCATED)
3667 : canon_const_arg1 = gen_int_shift_amount
3668 : (mode, (INTVAL (const_arg1)
3669 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3670 : else
3671 : break;
3672 : }
3673 :
3674 27306079 : y = lookup_as_function (folded_arg0, code);
3675 27306079 : if (y == 0)
3676 : break;
3677 :
3678 : /* If we have compiled a statement like
3679 : "if (x == (x & mask1))", and now are looking at
3680 : "x & mask2", we will have a case where the first operand
3681 : of Y is the same as our first operand. Unless we detect
3682 : this case, an infinite loop will result. */
3683 752619 : if (XEXP (y, 0) == folded_arg0)
3684 : break;
3685 :
3686 752318 : inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3687 752318 : if (!inner_const || !CONST_INT_P (inner_const))
3688 : break;
3689 :
3690 : /* Don't associate these operations if they are a PLUS with the
3691 : same constant and it is a power of two. These might be doable
3692 : with a pre- or post-increment. Similarly for two subtracts of
3693 : identical powers of two with post decrement. */
3694 :
3695 553635 : if (code == PLUS && const_arg1 == inner_const
3696 : && ((HAVE_PRE_INCREMENT
3697 : && pow2p_hwi (INTVAL (const_arg1)))
3698 : || (HAVE_POST_INCREMENT
3699 : && pow2p_hwi (INTVAL (const_arg1)))
3700 : || (HAVE_PRE_DECREMENT
3701 : && pow2p_hwi (- INTVAL (const_arg1)))
3702 : || (HAVE_POST_DECREMENT
3703 : && pow2p_hwi (- INTVAL (const_arg1)))))
3704 : break;
3705 :
3706 : /* ??? Vector mode shifts by scalar
3707 : shift operand are not supported yet. */
3708 553635 : if (is_shift && VECTOR_MODE_P (mode))
3709 : break;
3710 :
3711 4128 : if (is_shift
3712 8256 : && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode)
3713 4128 : || INTVAL (inner_const) < 0))
3714 : {
3715 : if (SHIFT_COUNT_TRUNCATED)
3716 : inner_const = gen_int_shift_amount
3717 : (mode, (INTVAL (inner_const)
3718 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3719 : else
3720 : break;
3721 : }
3722 :
3723 : /* Compute the code used to compose the constants. For example,
3724 : A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3725 :
3726 553370 : associate_code = (is_shift || code == MINUS ? PLUS : code);
3727 :
3728 553370 : new_const = simplify_binary_operation (associate_code, mode,
3729 : canon_const_arg1,
3730 : inner_const);
3731 :
3732 553370 : if (new_const == 0)
3733 : break;
3734 :
3735 : /* If we are associating shift operations, don't let this
3736 : produce a shift of the size of the object or larger.
3737 : This could occur when we follow a sign-extend by a right
3738 : shift on a machine that does a sign-extend as a pair
3739 : of shifts. */
3740 :
3741 553370 : if (is_shift
3742 4128 : && CONST_INT_P (new_const)
3743 561626 : && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode))
3744 : {
3745 : /* As an exception, we can turn an ASHIFTRT of this
3746 : form into a shift of the number of bits - 1. */
3747 1557 : if (code == ASHIFTRT)
3748 1534 : new_const = gen_int_shift_amount
3749 1534 : (mode, GET_MODE_UNIT_BITSIZE (mode) - 1);
3750 23 : else if (!side_effects_p (XEXP (y, 0)))
3751 23 : return CONST0_RTX (mode);
3752 : else
3753 : break;
3754 : }
3755 :
3756 553347 : y = copy_rtx (XEXP (y, 0));
3757 :
3758 : /* If Y contains our first operand (the most common way this
3759 : can happen is if Y is a MEM), we would do into an infinite
3760 : loop if we tried to fold it. So don't in that case. */
3761 :
3762 553347 : if (! reg_mentioned_p (folded_arg0, y))
3763 553347 : y = fold_rtx (y, insn);
3764 :
3765 553347 : return simplify_gen_binary (code, mode, y, new_const);
3766 : }
3767 : break;
3768 :
3769 : case DIV: case UDIV:
3770 : /* ??? The associative optimization performed immediately above is
3771 : also possible for DIV and UDIV using associate_code of MULT.
3772 : However, we would need extra code to verify that the
3773 : multiplication does not overflow, that is, there is no overflow
3774 : in the calculation of new_const. */
3775 : break;
3776 :
3777 : default:
3778 : break;
3779 : }
3780 :
3781 64791553 : new_rtx = simplify_binary_operation (code, mode,
3782 : const_arg0 ? const_arg0 : folded_arg0,
3783 : const_arg1 ? const_arg1 : folded_arg1);
3784 64791553 : break;
3785 :
3786 0 : case RTX_OBJ:
3787 : /* (lo_sum (high X) X) is simply X. */
3788 0 : if (code == LO_SUM && const_arg0 != 0
3789 0 : && GET_CODE (const_arg0) == HIGH
3790 0 : && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3791 : return const_arg1;
3792 : break;
3793 :
3794 21365070 : case RTX_TERNARY:
3795 21365070 : case RTX_BITFIELD_OPS:
3796 21365070 : new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3797 : const_arg0 ? const_arg0 : folded_arg0,
3798 : const_arg1 ? const_arg1 : folded_arg1,
3799 : const_arg2 ? const_arg2 : XEXP (x, 2));
3800 21365070 : break;
3801 :
3802 : default:
3803 : break;
3804 : }
3805 :
3806 114952558 : return new_rtx ? new_rtx : x;
3807 : }
3808 :
3809 : /* Return a constant value currently equivalent to X.
3810 : Return 0 if we don't know one. */
3811 :
3812 : static rtx
3813 277966853 : equiv_constant (rtx x)
3814 : {
3815 277966853 : if (REG_P (x)
3816 277966853 : && REGNO_QTY_VALID_P (REGNO (x)))
3817 : {
3818 88531663 : int x_q = REG_QTY (REGNO (x));
3819 88531663 : struct qty_table_elem *x_ent = &qty_table[x_q];
3820 :
3821 88531663 : if (x_ent->const_rtx)
3822 4582498 : x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3823 : }
3824 :
3825 277966853 : if (x == 0 || CONSTANT_P (x))
3826 : return x;
3827 :
3828 250715756 : if (GET_CODE (x) == SUBREG)
3829 : {
3830 6417528 : machine_mode mode = GET_MODE (x);
3831 6417528 : machine_mode imode = GET_MODE (SUBREG_REG (x));
3832 6417528 : rtx new_rtx;
3833 :
3834 : /* See if we previously assigned a constant value to this SUBREG. */
3835 6417528 : if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3836 6407015 : || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
3837 6407015 : || (NUM_POLY_INT_COEFFS > 1
3838 : && (new_rtx = lookup_as_function (x, CONST_POLY_INT)) != 0)
3839 6401099 : || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3840 12818437 : || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3841 : return new_rtx;
3842 :
3843 : /* If we didn't and if doing so makes sense, see if we previously
3844 : assigned a constant value to the enclosing word mode SUBREG. */
3845 13682658 : if (known_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD)
3846 10065696 : && known_lt (UNITS_PER_WORD, GET_MODE_SIZE (imode)))
3847 : {
3848 33011 : poly_int64 byte = (SUBREG_BYTE (x)
3849 33011 : - subreg_lowpart_offset (mode, word_mode));
3850 66022 : if (known_ge (byte, 0) && multiple_p (byte, UNITS_PER_WORD))
3851 : {
3852 33011 : rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3853 33011 : new_rtx = lookup_as_function (y, CONST_INT);
3854 33011 : if (new_rtx)
3855 0 : return gen_lowpart (mode, new_rtx);
3856 : }
3857 : }
3858 :
3859 : /* Otherwise see if we already have a constant for the inner REG,
3860 : and if that is enough to calculate an equivalent constant for
3861 : the subreg. Note that the upper bits of paradoxical subregs
3862 : are undefined, so they cannot be said to equal anything. */
3863 6400909 : if (REG_P (SUBREG_REG (x))
3864 6391611 : && !paradoxical_subreg_p (x)
3865 12601789 : && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3866 108191 : return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3867 :
3868 : return 0;
3869 : }
3870 :
3871 : /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3872 : the hash table in case its value was seen before. */
3873 :
3874 244298228 : if (MEM_P (x))
3875 : {
3876 70093770 : struct table_elt *elt;
3877 :
3878 70093770 : x = avoid_constant_pool_reference (x);
3879 70093770 : if (CONSTANT_P (x))
3880 : return x;
3881 :
3882 67919288 : elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3883 67919288 : if (elt == 0)
3884 : return 0;
3885 :
3886 5983088 : for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3887 4231814 : if (elt->is_const && CONSTANT_P (elt->exp))
3888 : return elt->exp;
3889 : }
3890 :
3891 : return 0;
3892 : }
3893 :
3894 : /* Given INSN, a jump insn, TAKEN indicates if we are following the
3895 : "taken" branch.
3896 :
3897 : In certain cases, this can cause us to add an equivalence. For example,
3898 : if we are following the taken case of
3899 : if (i == 2)
3900 : we can add the fact that `i' and '2' are now equivalent.
3901 :
3902 : In any case, we can record that this comparison was passed. If the same
3903 : comparison is seen later, we will know its value. */
3904 :
3905 : static void
3906 15025377 : record_jump_equiv (rtx_insn *insn, bool taken)
3907 : {
3908 15025377 : int cond_known_true;
3909 15025377 : rtx op0, op1;
3910 15025377 : rtx set;
3911 15025377 : machine_mode mode, mode0, mode1;
3912 15025377 : enum rtx_code code;
3913 :
3914 : /* Ensure this is the right kind of insn. */
3915 15025377 : gcc_assert (any_condjump_p (insn));
3916 :
3917 15025377 : set = pc_set (insn);
3918 :
3919 : /* See if this jump condition is known true or false. */
3920 15025377 : if (taken)
3921 5998310 : cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3922 : else
3923 9027067 : cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3924 :
3925 : /* Get the type of comparison being done and the operands being compared.
3926 : If we had to reverse a non-equality condition, record that fact so we
3927 : know that it isn't valid for floating-point. */
3928 15025377 : code = GET_CODE (XEXP (SET_SRC (set), 0));
3929 15025377 : op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3930 15025377 : op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3931 :
3932 : /* If fold_rtx returns NULL_RTX, there's nothing to record. */
3933 15025377 : if (op0 == NULL_RTX || op1 == NULL_RTX)
3934 92412 : return;
3935 :
3936 15025377 : code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3937 15025377 : if (! cond_known_true)
3938 : {
3939 9027067 : code = reversed_comparison_code_parts (code, op0, op1, insn);
3940 :
3941 : /* Don't remember if we can't find the inverse. */
3942 9027067 : if (code == UNKNOWN)
3943 : return;
3944 : }
3945 :
3946 : /* The mode is the mode of the non-constant. */
3947 14932965 : mode = mode0;
3948 14932965 : if (mode1 != VOIDmode)
3949 3789293 : mode = mode1;
3950 :
3951 14932965 : record_jump_cond (code, mode, op0, op1);
3952 : }
3953 :
3954 : /* Yet another form of subreg creation. In this case, we want something in
3955 : MODE, and we should assume OP has MODE iff it is naturally modeless. */
3956 :
3957 : static rtx
3958 58592 : record_jump_cond_subreg (machine_mode mode, rtx op)
3959 : {
3960 58592 : machine_mode op_mode = GET_MODE (op);
3961 58592 : if (op_mode == mode || op_mode == VOIDmode)
3962 : return op;
3963 6096 : return lowpart_subreg (mode, op, op_mode);
3964 : }
3965 :
3966 : /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3967 : Make any useful entries we can with that information. Called from
3968 : above function and called recursively. */
3969 :
3970 : static void
3971 14991553 : record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, rtx op1)
3972 : {
3973 14991553 : unsigned op0_hash, op1_hash;
3974 14991553 : int op0_in_memory, op1_in_memory;
3975 14991553 : struct table_elt *op0_elt, *op1_elt;
3976 :
3977 : /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3978 : we know that they are also equal in the smaller mode (this is also
3979 : true for all smaller modes whether or not there is a SUBREG, but
3980 : is not worth testing for with no SUBREG). */
3981 :
3982 : /* Note that GET_MODE (op0) may not equal MODE. */
3983 15038650 : if (code == EQ && paradoxical_subreg_p (op0))
3984 : {
3985 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3986 0 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3987 0 : if (tem)
3988 0 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3989 : }
3990 :
3991 15004672 : if (code == EQ && paradoxical_subreg_p (op1))
3992 : {
3993 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3994 0 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3995 0 : if (tem)
3996 0 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3997 : }
3998 :
3999 : /* Similarly, if this is an NE comparison, and either is a SUBREG
4000 : making a smaller mode, we know the whole thing is also NE. */
4001 :
4002 : /* Note that GET_MODE (op0) may not equal MODE;
4003 : if we test MODE instead, we can get an infinite recursion
4004 : alternating between two modes each wider than MODE. */
4005 :
4006 14991553 : if (code == NE
4007 53693 : && partial_subreg_p (op0)
4008 15044990 : && subreg_lowpart_p (op0))
4009 : {
4010 53074 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4011 53074 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
4012 53074 : if (tem)
4013 53074 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
4014 : }
4015 :
4016 14991553 : if (code == NE
4017 11718 : && partial_subreg_p (op1)
4018 14997127 : && subreg_lowpart_p (op1))
4019 : {
4020 5518 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4021 5518 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
4022 5518 : if (tem)
4023 5514 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
4024 : }
4025 :
4026 : /* Hash both operands. */
4027 :
4028 14991553 : do_not_record = 0;
4029 14991553 : hash_arg_in_memory = 0;
4030 14991553 : op0_hash = HASH (op0, mode);
4031 14991553 : op0_in_memory = hash_arg_in_memory;
4032 :
4033 14991553 : if (do_not_record)
4034 : return;
4035 :
4036 14991553 : do_not_record = 0;
4037 14991553 : hash_arg_in_memory = 0;
4038 14991553 : op1_hash = HASH (op1, mode);
4039 14991553 : op1_in_memory = hash_arg_in_memory;
4040 :
4041 14991553 : if (do_not_record)
4042 : return;
4043 :
4044 : /* Look up both operands. */
4045 14991553 : op0_elt = lookup (op0, op0_hash, mode);
4046 14991553 : op1_elt = lookup (op1, op1_hash, mode);
4047 :
4048 : /* If both operands are already equivalent or if they are not in the
4049 : table but are identical, do nothing. */
4050 14991553 : if ((op0_elt != 0 && op1_elt != 0
4051 1898718 : && op0_elt->first_same_value == op1_elt->first_same_value)
4052 16890186 : || op0 == op1 || rtx_equal_p (op0, op1))
4053 : return;
4054 :
4055 : /* If we aren't setting two things equal all we can do is save this
4056 : comparison. Similarly if this is floating-point. In the latter
4057 : case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4058 : If we record the equality, we might inadvertently delete code
4059 : whose intent was to change -0 to +0. */
4060 :
4061 14990706 : if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4062 : {
4063 9628099 : struct qty_table_elem *ent;
4064 9628099 : int qty;
4065 :
4066 : /* If OP0 is not a register, or if OP1 is neither a register
4067 : or constant, we can't do anything. */
4068 :
4069 9628099 : if (!REG_P (op1))
4070 7651036 : op1 = equiv_constant (op1);
4071 :
4072 9628099 : if (!REG_P (op0) || op1 == 0)
4073 : return;
4074 :
4075 : /* Put OP0 in the hash table if it isn't already. This gives it a
4076 : new quantity number. */
4077 8208907 : if (op0_elt == 0)
4078 : {
4079 3359071 : if (insert_regs (op0, NULL, false))
4080 : {
4081 57776 : rehash_using_reg (op0);
4082 57776 : op0_hash = HASH (op0, mode);
4083 :
4084 : /* If OP0 is contained in OP1, this changes its hash code
4085 : as well. Faster to rehash than to check, except
4086 : for the simple case of a constant. */
4087 57776 : if (! CONSTANT_P (op1))
4088 230 : op1_hash = HASH (op1,mode);
4089 : }
4090 :
4091 3359071 : op0_elt = insert (op0, NULL, op0_hash, mode);
4092 3359071 : op0_elt->in_memory = op0_in_memory;
4093 : }
4094 :
4095 8208907 : qty = REG_QTY (REGNO (op0));
4096 8208907 : ent = &qty_table[qty];
4097 :
4098 8208907 : ent->comparison_code = code;
4099 8208907 : if (REG_P (op1))
4100 : {
4101 : /* Look it up again--in case op0 and op1 are the same. */
4102 1887168 : op1_elt = lookup (op1, op1_hash, mode);
4103 :
4104 : /* Put OP1 in the hash table so it gets a new quantity number. */
4105 1887168 : if (op1_elt == 0)
4106 : {
4107 701377 : if (insert_regs (op1, NULL, false))
4108 : {
4109 218 : rehash_using_reg (op1);
4110 218 : op1_hash = HASH (op1, mode);
4111 : }
4112 :
4113 701377 : op1_elt = insert (op1, NULL, op1_hash, mode);
4114 701377 : op1_elt->in_memory = op1_in_memory;
4115 : }
4116 :
4117 1887168 : ent->comparison_const = NULL_RTX;
4118 1887168 : ent->comparison_qty = REG_QTY (REGNO (op1));
4119 : }
4120 : else
4121 : {
4122 6321739 : ent->comparison_const = op1;
4123 6321739 : ent->comparison_qty = INT_MIN;
4124 : }
4125 :
4126 : return;
4127 : }
4128 :
4129 : /* If either side is still missing an equivalence, make it now,
4130 : then merge the equivalences. */
4131 :
4132 5362607 : if (op0_elt == 0)
4133 : {
4134 3319204 : if (insert_regs (op0, NULL, false))
4135 : {
4136 19268 : rehash_using_reg (op0);
4137 19268 : op0_hash = HASH (op0, mode);
4138 : }
4139 :
4140 3319204 : op0_elt = insert (op0, NULL, op0_hash, mode);
4141 3319204 : op0_elt->in_memory = op0_in_memory;
4142 : }
4143 :
4144 5362607 : if (op1_elt == 0)
4145 : {
4146 4049400 : if (insert_regs (op1, NULL, false))
4147 : {
4148 7538 : rehash_using_reg (op1);
4149 7538 : op1_hash = HASH (op1, mode);
4150 : }
4151 :
4152 4049400 : op1_elt = insert (op1, NULL, op1_hash, mode);
4153 4049400 : op1_elt->in_memory = op1_in_memory;
4154 : }
4155 :
4156 5362607 : merge_equiv_classes (op0_elt, op1_elt);
4157 : }
4158 :
4159 : /* CSE processing for one instruction.
4160 :
4161 : Most "true" common subexpressions are mostly optimized away in GIMPLE,
4162 : but the few that "leak through" are cleaned up by cse_insn, and complex
4163 : addressing modes are often formed here.
4164 :
4165 : The main function is cse_insn, and between here and that function
4166 : a couple of helper functions is defined to keep the size of cse_insn
4167 : within reasonable proportions.
4168 :
4169 : Data is shared between the main and helper functions via STRUCT SET,
4170 : that contains all data related for every set in the instruction that
4171 : is being processed.
4172 :
4173 : Note that cse_main processes all sets in the instruction. Most
4174 : passes in GCC only process simple SET insns or single_set insns, but
4175 : CSE processes insns with multiple sets as well. */
4176 :
4177 : /* Data on one SET contained in the instruction. */
4178 :
4179 : struct set
4180 : {
4181 : /* The SET rtx itself. */
4182 : rtx rtl;
4183 : /* The SET_SRC of the rtx (the original value, if it is changing). */
4184 : rtx src;
4185 : /* The hash-table element for the SET_SRC of the SET. */
4186 : struct table_elt *src_elt;
4187 : /* Hash value for the SET_SRC. */
4188 : unsigned src_hash;
4189 : /* Hash value for the SET_DEST. */
4190 : unsigned dest_hash;
4191 : /* The SET_DEST, with SUBREG, etc., stripped. */
4192 : rtx inner_dest;
4193 : /* Original machine mode, in case it becomes a CONST_INT. */
4194 : machine_mode mode : MACHINE_MODE_BITSIZE;
4195 : /* Nonzero if the SET_SRC is in memory. */
4196 : unsigned int src_in_memory : 1;
4197 : /* Nonzero if the SET_SRC contains something
4198 : whose value cannot be predicted and understood. */
4199 : unsigned int src_volatile : 1;
4200 : /* Nonzero if RTL is an artificial set that has been created to describe
4201 : part of an insn's effect. Zero means that RTL appears directly in
4202 : the insn pattern. */
4203 : unsigned int is_fake_set : 1;
4204 : /* Hash value of constant equivalent for SET_SRC. */
4205 : unsigned src_const_hash;
4206 : /* A constant equivalent for SET_SRC, if any. */
4207 : rtx src_const;
4208 : /* Table entry for constant equivalent for SET_SRC, if any. */
4209 : struct table_elt *src_const_elt;
4210 : /* Table entry for the destination address. */
4211 : struct table_elt *dest_addr_elt;
4212 : };
4213 :
4214 : /* Special handling for (set REG0 REG1) where REG0 is the
4215 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
4216 : be used in the sequel, so (if easily done) change this insn to
4217 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4218 : that computed their value. Then REG1 will become a dead store
4219 : and won't cloud the situation for later optimizations.
4220 :
4221 : Do not make this change if REG1 is a hard register, because it will
4222 : then be used in the sequel and we may be changing a two-operand insn
4223 : into a three-operand insn.
4224 :
4225 : This is the last transformation that cse_insn will try to do. */
4226 :
4227 : static void
4228 139822213 : try_back_substitute_reg (rtx set, rtx_insn *insn)
4229 : {
4230 139822213 : rtx dest = SET_DEST (set);
4231 139822213 : rtx src = SET_SRC (set);
4232 :
4233 139822213 : if (REG_P (dest)
4234 116380414 : && REG_P (src) && ! HARD_REGISTER_P (src)
4235 147386673 : && REGNO_QTY_VALID_P (REGNO (src)))
4236 : {
4237 7564427 : int src_q = REG_QTY (REGNO (src));
4238 7564427 : struct qty_table_elem *src_ent = &qty_table[src_q];
4239 :
4240 7564427 : if (src_ent->first_reg == REGNO (dest))
4241 : {
4242 : /* Scan for the previous nonnote insn, but stop at a basic
4243 : block boundary. */
4244 1861056 : rtx_insn *prev = insn;
4245 1861056 : rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
4246 4639606 : do
4247 : {
4248 4639606 : prev = PREV_INSN (prev);
4249 : }
4250 4639606 : while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
4251 :
4252 : /* Do not swap the registers around if the previous instruction
4253 : attaches a REG_EQUIV note to REG1.
4254 :
4255 : ??? It's not entirely clear whether we can transfer a REG_EQUIV
4256 : from the pseudo that originally shadowed an incoming argument
4257 : to another register. Some uses of REG_EQUIV might rely on it
4258 : being attached to REG1 rather than REG2.
4259 :
4260 : This section previously turned the REG_EQUIV into a REG_EQUAL
4261 : note. We cannot do that because REG_EQUIV may provide an
4262 : uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4263 1861056 : if (NONJUMP_INSN_P (prev)
4264 1112433 : && GET_CODE (PATTERN (prev)) == SET
4265 811677 : && SET_DEST (PATTERN (prev)) == src
4266 2102614 : && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
4267 : {
4268 241430 : rtx note;
4269 :
4270 241430 : validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
4271 241430 : validate_change (insn, &SET_DEST (set), src, 1);
4272 241430 : validate_change (insn, &SET_SRC (set), dest, 1);
4273 241430 : apply_change_group ();
4274 :
4275 : /* If INSN has a REG_EQUAL note, and this note mentions
4276 : REG0, then we must delete it, because the value in
4277 : REG0 has changed. If the note's value is REG1, we must
4278 : also delete it because that is now this insn's dest. */
4279 241430 : note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4280 241430 : if (note != 0
4281 241430 : && (reg_mentioned_p (dest, XEXP (note, 0))
4282 1480 : || rtx_equal_p (src, XEXP (note, 0))))
4283 10 : remove_note (insn, note);
4284 :
4285 : /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4286 241430 : note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4287 241430 : if (note != 0)
4288 : {
4289 0 : remove_note (insn, note);
4290 0 : gcc_assert (!find_reg_note (prev, REG_ARGS_SIZE, NULL_RTX));
4291 0 : set_unique_reg_note (prev, REG_ARGS_SIZE, XEXP (note, 0));
4292 : }
4293 : }
4294 : }
4295 : }
4296 139822213 : }
4297 :
4298 : /* Add an entry containing RTL X into SETS. IS_FAKE_SET is true if X is
4299 : an artificial set that has been created to describe part of an insn's
4300 : effect. */
4301 : static inline void
4302 199719234 : add_to_set (vec<struct set> *sets, rtx x, bool is_fake_set)
4303 : {
4304 199719234 : struct set entry = {};
4305 199719234 : entry.rtl = x;
4306 199719234 : entry.is_fake_set = is_fake_set;
4307 199719234 : sets->safe_push (entry);
4308 199719234 : }
4309 :
4310 : /* Record all the SETs in this instruction into SETS_PTR,
4311 : and return the number of recorded sets. */
4312 : static int
4313 420512124 : find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
4314 : {
4315 420512124 : rtx x = PATTERN (insn);
4316 :
4317 420512124 : if (GET_CODE (x) == SET)
4318 : {
4319 : /* Ignore SETs that are unconditional jumps.
4320 : They never need cse processing, so this does not hurt.
4321 : The reason is not efficiency but rather
4322 : so that we can test at the end for instructions
4323 : that have been simplified to unconditional jumps
4324 : and not be misled by unchanged instructions
4325 : that were unconditional jumps to begin with. */
4326 173771975 : if (SET_DEST (x) == pc_rtx
4327 20526123 : && GET_CODE (SET_SRC (x)) == LABEL_REF)
4328 : ;
4329 : /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4330 : The hard function value register is used only once, to copy to
4331 : someplace else, so it isn't worth cse'ing. */
4332 173771748 : else if (GET_CODE (SET_SRC (x)) == CALL)
4333 : ;
4334 166389004 : else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR
4335 678213 : && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL
4336 : /* Prevent duplicates from being generated if the type is a V1
4337 : type and a subreg. Folding this will result in the same
4338 : element as folding x itself. */
4339 167067217 : && !(SUBREG_P (SET_DEST (x))
4340 70 : && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1)))
4341 : {
4342 : /* First register the vector itself. */
4343 678212 : add_to_set (psets, x, false);
4344 678212 : rtx src = SET_SRC (x);
4345 : /* Go over the constants of the CONST_VECTOR in forward order, to
4346 : put them in the same order in the SETS array. */
4347 1356574 : for (unsigned i = 0; i < const_vector_encoded_nelts (src) ; i++)
4348 : {
4349 : /* These are templates and don't actually get emitted but are
4350 : used to tell CSE how to get to a particular constant. */
4351 678362 : rtx y = simplify_gen_vec_select (SET_DEST (x), i);
4352 678362 : gcc_assert (y);
4353 678362 : if (!REG_P (y))
4354 : {
4355 676659 : rtx set = gen_rtx_SET (y, CONST_VECTOR_ELT (src, i));
4356 676659 : add_to_set (psets, set, true);
4357 : }
4358 : }
4359 : }
4360 : else
4361 165710792 : add_to_set (psets, x, false);
4362 : }
4363 246740149 : else if (GET_CODE (x) == PARALLEL)
4364 : {
4365 31724118 : int i, lim = XVECLEN (x, 0);
4366 :
4367 : /* Go over the expressions of the PARALLEL in forward order, to
4368 : put them in the same order in the SETS array. */
4369 96557469 : for (i = 0; i < lim; i++)
4370 : {
4371 64833351 : rtx y = XVECEXP (x, 0, i);
4372 64833351 : if (GET_CODE (y) == SET)
4373 : {
4374 : /* As above, we ignore unconditional jumps and call-insns and
4375 : ignore the result of apply_change_group. */
4376 32663730 : if (SET_DEST (y) == pc_rtx
4377 20676 : && GET_CODE (SET_SRC (y)) == LABEL_REF)
4378 : ;
4379 32663730 : else if (GET_CODE (SET_SRC (y)) == CALL)
4380 : ;
4381 : else
4382 32653571 : add_to_set (psets, y, false);
4383 : }
4384 : }
4385 : }
4386 :
4387 420512124 : return psets->length ();
4388 : }
4389 :
4390 : /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4391 :
4392 : static void
4393 85428 : canon_asm_operands (rtx x, rtx_insn *insn)
4394 : {
4395 115048 : for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4396 : {
4397 29620 : rtx input = ASM_OPERANDS_INPUT (x, i);
4398 29620 : if (!(REG_P (input) && HARD_REGISTER_P (input)))
4399 : {
4400 29234 : input = canon_reg (input, insn);
4401 29234 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4402 : }
4403 : }
4404 85428 : }
4405 :
4406 : /* Where possible, substitute every register reference in the N_SETS
4407 : number of SETS in INSN with the canonical register.
4408 :
4409 : Register canonicalization propagatest the earliest register (i.e.
4410 : one that is set before INSN) with the same value. This is a very
4411 : useful, simple form of CSE, to clean up warts from expanding GIMPLE
4412 : to RTL. For instance, a CONST for an address is usually expanded
4413 : multiple times to loads into different registers, thus creating many
4414 : subexpressions of the form:
4415 :
4416 : (set (reg1) (some_const))
4417 : (set (mem (... reg1 ...) (thing)))
4418 : (set (reg2) (some_const))
4419 : (set (mem (... reg2 ...) (thing)))
4420 :
4421 : After canonicalizing, the code takes the following form:
4422 :
4423 : (set (reg1) (some_const))
4424 : (set (mem (... reg1 ...) (thing)))
4425 : (set (reg2) (some_const))
4426 : (set (mem (... reg1 ...) (thing)))
4427 :
4428 : The set to reg2 is now trivially dead, and the memory reference (or
4429 : address, or whatever) may be a candidate for further CSEing.
4430 :
4431 : In this function, the result of apply_change_group can be ignored;
4432 : see canon_reg. */
4433 :
4434 : static void
4435 420512124 : canonicalize_insn (rtx_insn *insn, vec<struct set> *psets)
4436 : {
4437 420512124 : vec<struct set> sets = *psets;
4438 420512124 : int n_sets = sets.length ();
4439 420512124 : rtx tem;
4440 420512124 : rtx x = PATTERN (insn);
4441 420512124 : int i;
4442 :
4443 420512124 : if (CALL_P (insn))
4444 : {
4445 47434461 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4446 31398058 : if (GET_CODE (XEXP (tem, 0)) != SET)
4447 31180054 : XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4448 : }
4449 :
4450 420512124 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
4451 : {
4452 7382744 : canon_reg (SET_SRC (x), insn);
4453 7382744 : apply_change_group ();
4454 7382744 : fold_rtx (SET_SRC (x), insn);
4455 : }
4456 413129380 : else if (GET_CODE (x) == CLOBBER)
4457 : {
4458 : /* If we clobber memory, canon the address.
4459 : This does nothing when a register is clobbered
4460 : because we have already invalidated the reg. */
4461 69374 : if (MEM_P (XEXP (x, 0)))
4462 13038 : canon_reg (XEXP (x, 0), insn);
4463 : }
4464 413060006 : else if (GET_CODE (x) == USE
4465 413060006 : && ! (REG_P (XEXP (x, 0))
4466 1296336 : && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4467 : /* Canonicalize a USE of a pseudo register or memory location. */
4468 0 : canon_reg (x, insn);
4469 413060006 : else if (GET_CODE (x) == ASM_OPERANDS)
4470 18 : canon_asm_operands (x, insn);
4471 413059988 : else if (GET_CODE (x) == CALL)
4472 : {
4473 8153542 : canon_reg (x, insn);
4474 8153542 : apply_change_group ();
4475 8153542 : fold_rtx (x, insn);
4476 : }
4477 404906446 : else if (DEBUG_INSN_P (insn))
4478 204788815 : canon_reg (PATTERN (insn), insn);
4479 200117631 : else if (GET_CODE (x) == PARALLEL)
4480 : {
4481 96557469 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4482 : {
4483 64833351 : rtx y = XVECEXP (x, 0, i);
4484 64833351 : if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
4485 : {
4486 10159 : canon_reg (SET_SRC (y), insn);
4487 10159 : apply_change_group ();
4488 10159 : fold_rtx (SET_SRC (y), insn);
4489 : }
4490 64823192 : else if (GET_CODE (y) == CLOBBER)
4491 : {
4492 31322654 : if (MEM_P (XEXP (y, 0)))
4493 63257 : canon_reg (XEXP (y, 0), insn);
4494 : }
4495 33500538 : else if (GET_CODE (y) == USE
4496 33500538 : && ! (REG_P (XEXP (y, 0))
4497 195550 : && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4498 233534 : canon_reg (y, insn);
4499 33267004 : else if (GET_CODE (y) == ASM_OPERANDS)
4500 85410 : canon_asm_operands (y, insn);
4501 33181594 : else if (GET_CODE (y) == CALL)
4502 : {
4503 489958 : canon_reg (y, insn);
4504 489958 : apply_change_group ();
4505 489958 : fold_rtx (y, insn);
4506 : }
4507 : }
4508 : }
4509 :
4510 196540545 : if (n_sets == 1 && REG_NOTES (insn) != 0
4511 547258140 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4512 : {
4513 : /* We potentially will process this insn many times. Therefore,
4514 : drop the REG_EQUAL note if it is equal to the SET_SRC of the
4515 : unique set in INSN.
4516 :
4517 : Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4518 : because cse_insn handles those specially. */
4519 9174282 : if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART
4520 9174282 : && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
4521 181839 : remove_note (insn, tem);
4522 : else
4523 : {
4524 8992443 : canon_reg (XEXP (tem, 0), insn);
4525 8992443 : apply_change_group ();
4526 8992443 : XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn);
4527 8992443 : df_notes_rescan (insn);
4528 : }
4529 : }
4530 :
4531 : /* Canonicalize sources and addresses of destinations.
4532 : We do this in a separate pass to avoid problems when a MATCH_DUP is
4533 : present in the insn pattern. In that case, we want to ensure that
4534 : we don't break the duplicate nature of the pattern. So we will replace
4535 : both operands at the same time. Otherwise, we would fail to find an
4536 : equivalent substitution in the loop calling validate_change below.
4537 :
4538 : We used to suppress canonicalization of DEST if it appears in SRC,
4539 : but we don't do this any more. */
4540 :
4541 620231358 : for (i = 0; i < n_sets; i++)
4542 : {
4543 199719234 : rtx dest = SET_DEST (sets[i].rtl);
4544 199719234 : rtx src = SET_SRC (sets[i].rtl);
4545 199719234 : rtx new_rtx = canon_reg (src, insn);
4546 :
4547 199719234 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4548 :
4549 199719234 : if (GET_CODE (dest) == ZERO_EXTRACT)
4550 : {
4551 4037 : validate_change (insn, &XEXP (dest, 1),
4552 : canon_reg (XEXP (dest, 1), insn), 1);
4553 4037 : validate_change (insn, &XEXP (dest, 2),
4554 : canon_reg (XEXP (dest, 2), insn), 1);
4555 : }
4556 :
4557 201392800 : while (GET_CODE (dest) == SUBREG
4558 199737144 : || GET_CODE (dest) == ZERO_EXTRACT
4559 401125907 : || GET_CODE (dest) == STRICT_LOW_PART)
4560 1673566 : dest = XEXP (dest, 0);
4561 :
4562 199719234 : if (MEM_P (dest))
4563 29190878 : canon_reg (dest, insn);
4564 : }
4565 :
4566 : /* Now that we have done all the replacements, we can apply the change
4567 : group and see if they all work. Note that this will cause some
4568 : canonicalizations that would have worked individually not to be applied
4569 : because some other canonicalization didn't work, but this should not
4570 : occur often.
4571 :
4572 : The result of apply_change_group can be ignored; see canon_reg. */
4573 :
4574 420512124 : apply_change_group ();
4575 420512124 : }
4576 :
4577 : /* Main function of CSE.
4578 : First simplify sources and addresses of all assignments
4579 : in the instruction, using previously-computed equivalents values.
4580 : Then install the new sources and destinations in the table
4581 : of available values. */
4582 :
4583 : static void
4584 420512124 : cse_insn (rtx_insn *insn)
4585 : {
4586 420512124 : rtx x = PATTERN (insn);
4587 420512124 : int i;
4588 420512124 : rtx tem;
4589 420512124 : int n_sets = 0;
4590 :
4591 420512124 : rtx src_eqv = 0;
4592 420512124 : struct table_elt *src_eqv_elt = 0;
4593 420512124 : int src_eqv_volatile = 0;
4594 420512124 : int src_eqv_in_memory = 0;
4595 420512124 : unsigned src_eqv_hash = 0;
4596 :
4597 420512124 : this_insn = insn;
4598 :
4599 : /* Find all regs explicitly clobbered in this insn,
4600 : to ensure they are not replaced with any other regs
4601 : elsewhere in this insn. */
4602 420512124 : invalidate_from_sets_and_clobbers (insn);
4603 :
4604 : /* Record all the SETs in this instruction. */
4605 420512124 : auto_vec<struct set, 8> sets;
4606 420512124 : n_sets = find_sets_in_insn (insn, (vec<struct set>*)&sets);
4607 :
4608 : /* Substitute the canonical register where possible. */
4609 420512124 : canonicalize_insn (insn, (vec<struct set>*)&sets);
4610 :
4611 : /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4612 : if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4613 : latter condition is necessary because SRC_EQV is handled specially for
4614 : this case, and if it isn't set, then there will be no equivalence
4615 : for the destination. */
4616 196540545 : if (n_sets == 1 && REG_NOTES (insn) != 0
4617 547115159 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4618 : {
4619 :
4620 8992443 : if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT
4621 8992443 : && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4622 16383 : || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4623 8976060 : src_eqv = copy_rtx (XEXP (tem, 0));
4624 : /* If DEST is of the form ZERO_EXTACT, as in:
4625 : (set (zero_extract:SI (reg:SI 119)
4626 : (const_int 16 [0x10])
4627 : (const_int 16 [0x10]))
4628 : (const_int 51154 [0xc7d2]))
4629 : REG_EQUAL note will specify the value of register (reg:SI 119) at this
4630 : point. Note that this is different from SRC_EQV. We can however
4631 : calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4632 16383 : else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
4633 0 : && CONST_INT_P (XEXP (tem, 0))
4634 0 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
4635 16383 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
4636 : {
4637 0 : rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
4638 : /* This is the mode of XEXP (tem, 0) as well. */
4639 0 : scalar_int_mode dest_mode
4640 0 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
4641 0 : rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
4642 0 : rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
4643 0 : HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
4644 0 : HOST_WIDE_INT mask;
4645 0 : unsigned int shift;
4646 0 : if (BITS_BIG_ENDIAN)
4647 : shift = (GET_MODE_PRECISION (dest_mode)
4648 : - INTVAL (pos) - INTVAL (width));
4649 : else
4650 0 : shift = INTVAL (pos);
4651 0 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
4652 : mask = HOST_WIDE_INT_M1;
4653 : else
4654 0 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
4655 0 : val = (val >> shift) & mask;
4656 0 : src_eqv = GEN_INT (val);
4657 : }
4658 : }
4659 :
4660 : /* Set sets[i].src_elt to the class each source belongs to.
4661 : Detect assignments from or to volatile things
4662 : and set set[i] to zero so they will be ignored
4663 : in the rest of this function.
4664 :
4665 : Nothing in this loop changes the hash table or the register chains. */
4666 :
4667 620231366 : for (i = 0; i < n_sets; i++)
4668 : {
4669 199719242 : bool repeat = false;
4670 199719242 : bool noop_insn = false;
4671 199719242 : rtx src, dest;
4672 199719242 : rtx src_folded;
4673 199719242 : struct table_elt *elt = 0, *p;
4674 199719242 : machine_mode mode;
4675 199719242 : rtx src_eqv_here;
4676 199719242 : rtx src_const = 0;
4677 199719242 : rtx src_related = 0;
4678 199719242 : rtx dest_related = 0;
4679 199719242 : bool src_related_is_const_anchor = false;
4680 199719242 : struct table_elt *src_const_elt = 0;
4681 199719242 : int src_cost = MAX_COST;
4682 199719242 : int src_eqv_cost = MAX_COST;
4683 199719242 : int src_folded_cost = MAX_COST;
4684 199719242 : int src_related_cost = MAX_COST;
4685 199719242 : int src_elt_cost = MAX_COST;
4686 199719242 : int src_regcost = MAX_COST;
4687 199719242 : int src_eqv_regcost = MAX_COST;
4688 199719242 : int src_folded_regcost = MAX_COST;
4689 199719242 : int src_related_regcost = MAX_COST;
4690 199719242 : int src_elt_regcost = MAX_COST;
4691 199719242 : scalar_int_mode int_mode;
4692 199719242 : bool is_fake_set = sets[i].is_fake_set;
4693 :
4694 199719242 : dest = SET_DEST (sets[i].rtl);
4695 199719242 : src = SET_SRC (sets[i].rtl);
4696 :
4697 : /* If SRC is a constant that has no machine mode,
4698 : hash it with the destination's machine mode.
4699 : This way we can keep different modes separate. */
4700 :
4701 199719242 : mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4702 199719242 : sets[i].mode = mode;
4703 :
4704 199719242 : if (!is_fake_set && src_eqv)
4705 : {
4706 8976060 : machine_mode eqvmode = mode;
4707 8976060 : if (GET_CODE (dest) == STRICT_LOW_PART)
4708 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4709 8976060 : do_not_record = 0;
4710 8976060 : hash_arg_in_memory = 0;
4711 8976060 : src_eqv_hash = HASH (src_eqv, eqvmode);
4712 :
4713 : /* Find the equivalence class for the equivalent expression. */
4714 :
4715 8976060 : if (!do_not_record)
4716 8973820 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4717 :
4718 8976060 : src_eqv_volatile = do_not_record;
4719 8976060 : src_eqv_in_memory = hash_arg_in_memory;
4720 : }
4721 :
4722 : /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4723 : value of the INNER register, not the destination. So it is not
4724 : a valid substitution for the source. But save it for later. */
4725 199719242 : if (is_fake_set || GET_CODE (dest) == STRICT_LOW_PART)
4726 : src_eqv_here = 0;
4727 : else
4728 199719242 : src_eqv_here = src_eqv;
4729 :
4730 : /* Simplify and foldable subexpressions in SRC. Then get the fully-
4731 : simplified result, which may not necessarily be valid. */
4732 199719242 : src_folded = fold_rtx (src, NULL);
4733 :
4734 : #if 0
4735 : /* ??? This caused bad code to be generated for the m68k port with -O2.
4736 : Suppose src is (CONST_INT -1), and that after truncation src_folded
4737 : is (CONST_INT 3). Suppose src_folded is then used for src_const.
4738 : At the end we will add src and src_const to the same equivalence
4739 : class. We now have 3 and -1 on the same equivalence class. This
4740 : causes later instructions to be mis-optimized. */
4741 : /* If storing a constant in a bitfield, pre-truncate the constant
4742 : so we will be able to record it later. */
4743 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4744 : {
4745 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4746 :
4747 : if (CONST_INT_P (src)
4748 : && CONST_INT_P (width)
4749 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4750 : && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4751 : src_folded
4752 : = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1
4753 : << INTVAL (width)) - 1));
4754 : }
4755 : #endif
4756 :
4757 : /* Compute SRC's hash code, and also notice if it
4758 : should not be recorded at all. In that case,
4759 : prevent any further processing of this assignment.
4760 :
4761 : We set DO_NOT_RECORD if the destination has a REG_UNUSED note.
4762 : This avoids getting the source register into the tables, where it
4763 : may be invalidated later (via REG_QTY), then trigger an ICE upon
4764 : re-insertion.
4765 :
4766 : This is only a problem in multi-set insns. If it were a single
4767 : set the dead copy would have been removed. If the RHS were anything
4768 : but a simple REG, then we won't call insert_regs and thus there's
4769 : no potential for triggering the ICE. */
4770 399438484 : do_not_record = (REG_P (dest)
4771 148323940 : && REG_P (src)
4772 235375135 : && find_reg_note (insn, REG_UNUSED, dest));
4773 199719242 : hash_arg_in_memory = 0;
4774 :
4775 199719242 : sets[i].src = src;
4776 199719242 : sets[i].src_hash = HASH (src, mode);
4777 199719242 : sets[i].src_volatile = do_not_record;
4778 199719242 : sets[i].src_in_memory = hash_arg_in_memory;
4779 :
4780 : /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4781 : a pseudo, do not record SRC. Using SRC as a replacement for
4782 : anything else will be incorrect in that situation. Note that
4783 : this usually occurs only for stack slots, in which case all the
4784 : RTL would be referring to SRC, so we don't lose any optimization
4785 : opportunities by not having SRC in the hash table. */
4786 :
4787 199719242 : if (MEM_P (src)
4788 25548190 : && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4789 927429 : && REG_P (dest)
4790 200646671 : && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4791 927429 : sets[i].src_volatile = 1;
4792 :
4793 198791813 : else if (GET_CODE (src) == ASM_OPERANDS
4794 209976 : && GET_CODE (x) == PARALLEL)
4795 : {
4796 : /* Do not record result of a non-volatile inline asm with
4797 : more than one result. */
4798 209952 : if (n_sets > 1)
4799 166626 : sets[i].src_volatile = 1;
4800 :
4801 209952 : int j, lim = XVECLEN (x, 0);
4802 1072471 : for (j = 0; j < lim; j++)
4803 : {
4804 864310 : rtx y = XVECEXP (x, 0, j);
4805 : /* And do not record result of a non-volatile inline asm
4806 : with "memory" clobber. */
4807 864310 : if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0)))
4808 : {
4809 1791 : sets[i].src_volatile = 1;
4810 1791 : break;
4811 : }
4812 : }
4813 : }
4814 :
4815 : #if 0
4816 : /* It is no longer clear why we used to do this, but it doesn't
4817 : appear to still be needed. So let's try without it since this
4818 : code hurts cse'ing widened ops. */
4819 : /* If source is a paradoxical subreg (such as QI treated as an SI),
4820 : treat it as volatile. It may do the work of an SI in one context
4821 : where the extra bits are not being used, but cannot replace an SI
4822 : in general. */
4823 : if (paradoxical_subreg_p (src))
4824 : sets[i].src_volatile = 1;
4825 : #endif
4826 :
4827 : /* Locate all possible equivalent forms for SRC. Try to replace
4828 : SRC in the insn with each cheaper equivalent.
4829 :
4830 : We have the following types of equivalents: SRC itself, a folded
4831 : version, a value given in a REG_EQUAL note, or a value related
4832 : to a constant.
4833 :
4834 : Each of these equivalents may be part of an additional class
4835 : of equivalents (if more than one is in the table, they must be in
4836 : the same class; we check for this).
4837 :
4838 : If the source is volatile, we don't do any table lookups.
4839 :
4840 : We note any constant equivalent for possible later use in a
4841 : REG_NOTE. */
4842 :
4843 199719242 : if (!sets[i].src_volatile)
4844 164794343 : elt = lookup (src, sets[i].src_hash, mode);
4845 :
4846 199719242 : sets[i].src_elt = elt;
4847 :
4848 199719242 : if (elt && src_eqv_here && src_eqv_elt)
4849 : {
4850 3037192 : if (elt->first_same_value != src_eqv_elt->first_same_value)
4851 : {
4852 : /* The REG_EQUAL is indicating that two formerly distinct
4853 : classes are now equivalent. So merge them. */
4854 9983 : merge_equiv_classes (elt, src_eqv_elt);
4855 9983 : src_eqv_hash = HASH (src_eqv, elt->mode);
4856 9983 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4857 : }
4858 :
4859 : src_eqv_here = 0;
4860 : }
4861 :
4862 196480720 : else if (src_eqv_elt)
4863 : elt = src_eqv_elt;
4864 :
4865 : /* Try to find a constant somewhere and record it in `src_const'.
4866 : Record its table element, if any, in `src_const_elt'. Look in
4867 : any known equivalences first. (If the constant is not in the
4868 : table, also set `sets[i].src_const_hash'). */
4869 196305070 : if (elt)
4870 95238507 : for (p = elt->first_same_value; p; p = p->next_same_value)
4871 76579632 : if (p->is_const)
4872 : {
4873 16682370 : src_const = p->exp;
4874 16682370 : src_const_elt = elt;
4875 16682370 : break;
4876 : }
4877 :
4878 35341245 : if (src_const == 0
4879 183036872 : && (CONSTANT_P (src_folded)
4880 : /* Consider (minus (label_ref L1) (label_ref L2)) as
4881 : "constant" here so we will record it. This allows us
4882 : to fold switch statements when an ADDR_DIFF_VEC is used. */
4883 156029928 : || (GET_CODE (src_folded) == MINUS
4884 1897775 : && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4885 95 : && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4886 : src_const = src_folded, src_const_elt = elt;
4887 172712212 : else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4888 423995 : src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4889 :
4890 : /* If we don't know if the constant is in the table, get its
4891 : hash code and look it up. */
4892 199719242 : if (src_const && src_const_elt == 0)
4893 : {
4894 27429981 : sets[i].src_const_hash = HASH (src_const, mode);
4895 27429981 : src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4896 : }
4897 :
4898 199719242 : sets[i].src_const = src_const;
4899 199719242 : sets[i].src_const_elt = src_const_elt;
4900 :
4901 : /* If the constant and our source are both in the table, mark them as
4902 : equivalent. Otherwise, if a constant is in the table but the source
4903 : isn't, set ELT to it. */
4904 199719242 : if (src_const_elt && elt
4905 16683414 : && src_const_elt->first_same_value != elt->first_same_value)
4906 0 : merge_equiv_classes (elt, src_const_elt);
4907 199719242 : else if (src_const_elt && elt == 0)
4908 199719242 : elt = src_const_elt;
4909 :
4910 : /* See if there is a register linearly related to a constant
4911 : equivalent of SRC. */
4912 199719242 : if (src_const
4913 44113395 : && (GET_CODE (src_const) == CONST
4914 43448198 : || (src_const_elt && src_const_elt->related_value != 0)))
4915 : {
4916 757681 : src_related = use_related_value (src_const, src_const_elt);
4917 757681 : if (src_related)
4918 : {
4919 226206 : struct table_elt *src_related_elt
4920 226206 : = lookup (src_related, HASH (src_related, mode), mode);
4921 226206 : if (src_related_elt && elt)
4922 : {
4923 1925 : if (elt->first_same_value
4924 1925 : != src_related_elt->first_same_value)
4925 : /* This can occur when we previously saw a CONST
4926 : involving a SYMBOL_REF and then see the SYMBOL_REF
4927 : twice. Merge the involved classes. */
4928 919 : merge_equiv_classes (elt, src_related_elt);
4929 :
4930 : src_related = 0;
4931 199719242 : src_related_elt = 0;
4932 : }
4933 224281 : else if (src_related_elt && elt == 0)
4934 7006 : elt = src_related_elt;
4935 : }
4936 : }
4937 :
4938 : /* See if we have a CONST_INT that is already in a register in a
4939 : wider mode. */
4940 :
4941 43889114 : if (src_const && src_related == 0 && CONST_INT_P (src_const)
4942 19008735 : && is_int_mode (mode, &int_mode)
4943 220758587 : && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD)
4944 : {
4945 8159393 : opt_scalar_int_mode wider_mode_iter;
4946 21003185 : FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode)
4947 : {
4948 21003185 : scalar_int_mode wider_mode = wider_mode_iter.require ();
4949 21754026 : if (GET_MODE_PRECISION (wider_mode) > BITS_PER_WORD)
4950 : break;
4951 :
4952 13087907 : struct table_elt *const_elt
4953 13087907 : = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4954 :
4955 13087907 : if (const_elt == 0)
4956 12405913 : continue;
4957 :
4958 681994 : for (const_elt = const_elt->first_same_value;
4959 2074807 : const_elt; const_elt = const_elt->next_same_value)
4960 1636928 : if (REG_P (const_elt->exp))
4961 : {
4962 244115 : src_related = gen_lowpart (int_mode, const_elt->exp);
4963 244115 : break;
4964 : }
4965 :
4966 681994 : if (src_related != 0)
4967 : break;
4968 : }
4969 : }
4970 :
4971 : /* Another possibility is that we have an AND with a constant in
4972 : a mode narrower than a word. If so, it might have been generated
4973 : as part of an "if" which would narrow the AND. If we already
4974 : have done the AND in a wider mode, we can use a SUBREG of that
4975 : value. */
4976 :
4977 195398343 : if (flag_expensive_optimizations && ! src_related
4978 334083769 : && is_a <scalar_int_mode> (mode, &int_mode)
4979 134364527 : && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4980 201028623 : && GET_MODE_SIZE (int_mode) < UNITS_PER_WORD)
4981 : {
4982 778527 : opt_scalar_int_mode tmode_iter;
4983 778527 : rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4984 :
4985 2294945 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4986 : {
4987 2294945 : scalar_int_mode tmode = tmode_iter.require ();
4988 4743626 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4989 : break;
4990 :
4991 1516482 : rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4992 1516482 : struct table_elt *larger_elt;
4993 :
4994 1516482 : if (inner)
4995 : {
4996 1506768 : PUT_MODE (new_and, tmode);
4997 1506768 : XEXP (new_and, 0) = inner;
4998 1506768 : larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4999 1506768 : if (larger_elt == 0)
5000 1506704 : continue;
5001 :
5002 64 : for (larger_elt = larger_elt->first_same_value;
5003 64 : larger_elt; larger_elt = larger_elt->next_same_value)
5004 64 : if (REG_P (larger_elt->exp))
5005 : {
5006 64 : src_related
5007 64 : = gen_lowpart (int_mode, larger_elt->exp);
5008 64 : break;
5009 : }
5010 :
5011 64 : if (src_related)
5012 : break;
5013 : }
5014 : }
5015 : }
5016 :
5017 : /* If SRC_EQV is a CONST_INT, try looking up some related
5018 : constants (logical and arithmetic negation). Those may
5019 : ultimately be cheaper to re-use. */
5020 199719242 : if (GET_CODE (src) != CONST_INT
5021 : && GET_CODE (src) != REG
5022 : && GET_CODE (src) != SUBREG
5023 123639585 : && src_const
5024 16439038 : && GET_CODE (src_const) == CONST_INT)
5025 : {
5026 68574 : rtx trial_rtx = GEN_INT (~UINTVAL (src_const));
5027 68574 : struct table_elt *tmp = lookup (trial_rtx, HASH (trial_rtx, mode), mode);
5028 68574 : rtx_code code = NOT;
5029 68574 : if (!tmp)
5030 : {
5031 67418 : trial_rtx = GEN_INT (-UINTVAL (src_const));
5032 67418 : tmp = lookup (trial_rtx, HASH (trial_rtx, mode), mode);
5033 67418 : code = NEG;
5034 : }
5035 :
5036 67418 : if (tmp)
5037 : {
5038 11151 : src_related = gen_rtx_fmt_e (code, mode, tmp->first_same_value->exp);
5039 11151 : src_eqv_here = src_related;
5040 11151 : src_related_is_const_anchor = true;
5041 : }
5042 :
5043 : }
5044 :
5045 : /* See if a MEM has already been loaded with a widening operation;
5046 : if it has, we can use a subreg of that. Many CISC machines
5047 : also have such operations, but this is only likely to be
5048 : beneficial on these machines. */
5049 :
5050 199719242 : rtx_code extend_op;
5051 199719242 : if (flag_expensive_optimizations && src_related == 0
5052 : && MEM_P (src) && ! do_not_record
5053 : && is_a <scalar_int_mode> (mode, &int_mode)
5054 : && (extend_op = load_extend_op (int_mode)) != UNKNOWN)
5055 : {
5056 : #if GCC_VERSION >= 5000
5057 : struct rtx_def memory_extend_buf;
5058 : rtx memory_extend_rtx = &memory_extend_buf;
5059 : #else
5060 : /* Workaround GCC < 5 bug, fixed in r5-3834 as part of PR63362
5061 : fix. */
5062 : alignas (rtx_def) unsigned char memory_extended_buf[sizeof (rtx_def)];
5063 : rtx memory_extend_rtx = (rtx) &memory_extended_buf[0];
5064 : #endif
5065 :
5066 : /* Set what we are trying to extend and the operation it might
5067 : have been extended with. */
5068 : memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
5069 : PUT_CODE (memory_extend_rtx, extend_op);
5070 : XEXP (memory_extend_rtx, 0) = src;
5071 :
5072 : opt_scalar_int_mode tmode_iter;
5073 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
5074 : {
5075 : struct table_elt *larger_elt;
5076 :
5077 : scalar_int_mode tmode = tmode_iter.require ();
5078 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
5079 : break;
5080 :
5081 : PUT_MODE (memory_extend_rtx, tmode);
5082 : larger_elt = lookup (memory_extend_rtx,
5083 : HASH (memory_extend_rtx, tmode), tmode);
5084 : if (larger_elt == 0)
5085 : continue;
5086 :
5087 : for (larger_elt = larger_elt->first_same_value;
5088 : larger_elt; larger_elt = larger_elt->next_same_value)
5089 : if (REG_P (larger_elt->exp))
5090 : {
5091 : src_related = gen_lowpart (int_mode, larger_elt->exp);
5092 : break;
5093 : }
5094 :
5095 : if (src_related)
5096 : break;
5097 : }
5098 : }
5099 :
5100 : /* Try to express the constant using a register+offset expression
5101 : derived from a constant anchor. */
5102 :
5103 199719242 : if (targetm.const_anchor
5104 0 : && !src_related
5105 0 : && src_const
5106 0 : && GET_CODE (src_const) == CONST_INT)
5107 : {
5108 0 : src_related = try_const_anchors (src_const, mode);
5109 0 : src_related_is_const_anchor = src_related != NULL_RTX;
5110 : }
5111 :
5112 : /* Try to re-materialize a vec_dup with an existing constant. */
5113 199719242 : rtx src_elt;
5114 5949987 : if ((!src_eqv_here || CONSTANT_P (src_eqv_here))
5115 199719242 : && const_vec_duplicate_p (src, &src_elt))
5116 : {
5117 681525 : machine_mode const_mode = GET_MODE_INNER (GET_MODE (src));
5118 681525 : struct table_elt *related_elt
5119 681525 : = lookup (src_elt, HASH (src_elt, const_mode), const_mode);
5120 681525 : if (related_elt)
5121 : {
5122 272736 : for (related_elt = related_elt->first_same_value;
5123 2093156 : related_elt; related_elt = related_elt->next_same_value)
5124 1852208 : if (REG_P (related_elt->exp))
5125 : {
5126 : /* We don't need to compare costs with an existing (constant)
5127 : src_eqv_here, since any such src_eqv_here should already be
5128 : available in src_const. */
5129 31788 : src_eqv_here
5130 31788 : = gen_rtx_VEC_DUPLICATE (GET_MODE (src),
5131 : related_elt->exp);
5132 31788 : break;
5133 : }
5134 : }
5135 : }
5136 :
5137 199719242 : if (src == src_folded)
5138 195271971 : src_folded = 0;
5139 :
5140 : /* At this point, ELT, if nonzero, points to a class of expressions
5141 : equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5142 : and SRC_RELATED, if nonzero, each contain additional equivalent
5143 : expressions. Prune these latter expressions by deleting expressions
5144 : already in the equivalence class.
5145 :
5146 : Check for an equivalent identical to the destination. If found,
5147 : this is the preferred equivalent since it will likely lead to
5148 : elimination of the insn. Indicate this by placing it in
5149 : `src_related'. */
5150 :
5151 199719242 : if (elt)
5152 35410336 : elt = elt->first_same_value;
5153 303746365 : for (p = elt; p; p = p->next_same_value)
5154 : {
5155 104027123 : enum rtx_code code = GET_CODE (p->exp);
5156 :
5157 : /* If the expression is not valid, ignore it. Then we do not
5158 : have to check for validity below. In most cases, we can use
5159 : `rtx_equal_p', since canonicalization has already been done. */
5160 104027123 : if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5161 4208 : continue;
5162 :
5163 : /* Also skip paradoxical subregs, unless that's what we're
5164 : looking for. */
5165 104022915 : if (paradoxical_subreg_p (p->exp)
5166 2810631 : && ! (src != 0
5167 3356 : && GET_CODE (src) == SUBREG
5168 3356 : && GET_MODE (src) == GET_MODE (p->exp)
5169 3356 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5170 : GET_MODE (SUBREG_REG (p->exp)))))
5171 3608 : continue;
5172 :
5173 104019307 : if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5174 : src = 0;
5175 2253178 : else if (src_folded && GET_CODE (src_folded) == code
5176 69642344 : && rtx_equal_p (src_folded, p->exp))
5177 : src_folded = 0;
5178 788198 : else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5179 68823798 : && rtx_equal_p (src_eqv_here, p->exp))
5180 : src_eqv_here = 0;
5181 737922 : else if (src_related && GET_CODE (src_related) == code
5182 68257478 : && rtx_equal_p (src_related, p->exp))
5183 : src_related = 0;
5184 :
5185 : /* This is the same as the destination of the insns, we want
5186 : to prefer it. The code below will then give it a negative
5187 : cost. */
5188 104019307 : if (!dest_related
5189 104019307 : && GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5190 224653 : dest_related = p->exp;
5191 : }
5192 :
5193 : /* Find the cheapest valid equivalent, trying all the available
5194 : possibilities. Prefer items not in the hash table to ones
5195 : that are when they are equal cost. Note that we can never
5196 : worsen an insn as the current contents will also succeed.
5197 : If we find an equivalent identical to the destination, use it as best,
5198 : since this insn will probably be eliminated in that case. */
5199 199719242 : if (src)
5200 : {
5201 164777526 : if (rtx_equal_p (src, dest))
5202 : src_cost = src_regcost = -1;
5203 : else
5204 : {
5205 164777520 : src_cost = COST (src, mode);
5206 164777520 : src_regcost = approx_reg_cost (src);
5207 : }
5208 : }
5209 :
5210 199719242 : if (src_eqv_here)
5211 : {
5212 5671815 : if (rtx_equal_p (src_eqv_here, dest))
5213 : src_eqv_cost = src_eqv_regcost = -1;
5214 : else
5215 : {
5216 5671815 : src_eqv_cost = COST (src_eqv_here, mode);
5217 5671815 : src_eqv_regcost = approx_reg_cost (src_eqv_here);
5218 : }
5219 : }
5220 :
5221 199719242 : if (src_folded)
5222 : {
5223 3883155 : if (rtx_equal_p (src_folded, dest))
5224 : src_folded_cost = src_folded_regcost = -1;
5225 : else
5226 : {
5227 3870373 : src_folded_cost = COST (src_folded, mode);
5228 3870373 : src_folded_regcost = approx_reg_cost (src_folded);
5229 : }
5230 : }
5231 :
5232 199719242 : if (dest_related)
5233 : {
5234 : src_related_cost = src_related_regcost = -1;
5235 : /* Handle it as src_related. */
5236 : src_related = dest_related;
5237 : }
5238 199494589 : else if (src_related)
5239 : {
5240 474282 : src_related_cost = COST (src_related, mode);
5241 474282 : src_related_regcost = approx_reg_cost (src_related);
5242 :
5243 : /* If a const-anchor is used to synthesize a constant that
5244 : normally requires multiple instructions then slightly prefer
5245 : it over the original sequence. These instructions are likely
5246 : to become redundant now. We can't compare against the cost
5247 : of src_eqv_here because, on MIPS for example, multi-insn
5248 : constants have zero cost; they are assumed to be hoisted from
5249 : loops. */
5250 474282 : if (src_related_is_const_anchor
5251 474282 : && src_related_cost == src_cost
5252 6061 : && src_eqv_here)
5253 6059 : src_related_cost--;
5254 : }
5255 :
5256 : /* If this was an indirect jump insn, a known label will really be
5257 : cheaper even though it looks more expensive. */
5258 199719242 : if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5259 199719242 : src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5260 :
5261 : /* Terminate loop when replacement made. This must terminate since
5262 : the current contents will be tested and will always be valid. */
5263 205099324 : while (!is_fake_set)
5264 : {
5265 : rtx trial;
5266 :
5267 : /* Skip invalid entries. */
5268 36433138 : while (elt && !REG_P (elt->exp)
5269 213390116 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5270 12 : elt = elt->next_same_value;
5271 :
5272 : /* A paradoxical subreg would be bad here: it'll be the right
5273 : size, but later may be adjusted so that the upper bits aren't
5274 : what we want. So reject it. */
5275 204423839 : if (elt != 0
5276 36433126 : && paradoxical_subreg_p (elt->exp)
5277 : /* It is okay, though, if the rtx we're trying to match
5278 : will ignore any of the bits we can't predict. */
5279 204425013 : && ! (src != 0
5280 1174 : && GET_CODE (src) == SUBREG
5281 1174 : && GET_MODE (src) == GET_MODE (elt->exp)
5282 1174 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5283 : GET_MODE (SUBREG_REG (elt->exp)))))
5284 : {
5285 1174 : elt = elt->next_same_value;
5286 1174 : continue;
5287 : }
5288 :
5289 204421491 : if (elt)
5290 : {
5291 36431952 : src_elt_cost = elt->cost;
5292 36431952 : src_elt_regcost = elt->regcost;
5293 : }
5294 :
5295 : /* Find cheapest and skip it for the next time. For items
5296 : of equal cost, use this order:
5297 : src_folded, src, src_eqv, src_related and hash table entry. */
5298 204421491 : if (src_folded
5299 8147302 : && preferable (src_folded_cost, src_folded_regcost,
5300 : src_cost, src_regcost) <= 0
5301 6262812 : && preferable (src_folded_cost, src_folded_regcost,
5302 : src_eqv_cost, src_eqv_regcost) <= 0
5303 5381706 : && preferable (src_folded_cost, src_folded_regcost,
5304 : src_related_cost, src_related_regcost) <= 0
5305 209799312 : && preferable (src_folded_cost, src_folded_regcost,
5306 : src_elt_cost, src_elt_regcost) <= 0)
5307 : trial = src_folded, src_folded_cost = MAX_COST;
5308 199540433 : else if (src
5309 163612930 : && preferable (src_cost, src_regcost,
5310 : src_eqv_cost, src_eqv_regcost) <= 0
5311 162067512 : && preferable (src_cost, src_regcost,
5312 : src_related_cost, src_related_regcost) <= 0
5313 361581732 : && preferable (src_cost, src_regcost,
5314 : src_elt_cost, src_elt_regcost) <= 0)
5315 : trial = src, src_cost = MAX_COST;
5316 37569457 : else if (src_eqv_here
5317 1757643 : && preferable (src_eqv_cost, src_eqv_regcost,
5318 : src_related_cost, src_related_regcost) <= 0
5319 39321452 : && preferable (src_eqv_cost, src_eqv_regcost,
5320 : src_elt_cost, src_elt_regcost) <= 0)
5321 : trial = src_eqv_here, src_eqv_cost = MAX_COST;
5322 36033525 : else if (src_related
5323 36033525 : && preferable (src_related_cost, src_related_regcost,
5324 : src_elt_cost, src_elt_regcost) <= 0)
5325 : trial = src_related, src_related_cost = MAX_COST;
5326 : else
5327 : {
5328 35789200 : trial = elt->exp;
5329 35789200 : elt = elt->next_same_value;
5330 35789200 : src_elt_cost = MAX_COST;
5331 : }
5332 :
5333 : /* Try to optimize
5334 : (set (reg:M N) (const_int A))
5335 : (set (reg:M2 O) (const_int B))
5336 : (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5337 : (reg:M2 O)). */
5338 204421491 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5339 4037 : && CONST_INT_P (trial)
5340 721 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5341 721 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5342 570 : && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5343 106 : && (known_ge
5344 : (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))),
5345 : INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))))
5346 204421597 : && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5347 106 : + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5348 : <= HOST_BITS_PER_WIDE_INT))
5349 : {
5350 106 : rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5351 106 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5352 106 : rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5353 106 : unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5354 106 : struct table_elt *dest_elt
5355 106 : = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5356 106 : rtx dest_cst = NULL;
5357 :
5358 106 : if (dest_elt)
5359 153 : for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5360 104 : if (p->is_const && CONST_INT_P (p->exp))
5361 : {
5362 : dest_cst = p->exp;
5363 : break;
5364 : }
5365 57 : if (dest_cst)
5366 : {
5367 8 : HOST_WIDE_INT val = INTVAL (dest_cst);
5368 8 : HOST_WIDE_INT mask;
5369 8 : unsigned int shift;
5370 : /* This is the mode of DEST_CST as well. */
5371 8 : scalar_int_mode dest_mode
5372 8 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
5373 8 : if (BITS_BIG_ENDIAN)
5374 : shift = GET_MODE_PRECISION (dest_mode)
5375 : - INTVAL (pos) - INTVAL (width);
5376 : else
5377 8 : shift = INTVAL (pos);
5378 8 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5379 : mask = HOST_WIDE_INT_M1;
5380 : else
5381 8 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
5382 8 : val &= ~(mask << shift);
5383 8 : val |= (INTVAL (trial) & mask) << shift;
5384 8 : val = trunc_int_for_mode (val, dest_mode);
5385 8 : validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5386 : dest_reg, 1);
5387 8 : validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5388 : GEN_INT (val), 1);
5389 8 : if (apply_change_group ())
5390 : {
5391 8 : rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5392 8 : if (note)
5393 : {
5394 0 : remove_note (insn, note);
5395 0 : df_notes_rescan (insn);
5396 : }
5397 8 : src_eqv = NULL_RTX;
5398 8 : src_eqv_elt = NULL;
5399 8 : src_eqv_volatile = 0;
5400 8 : src_eqv_in_memory = 0;
5401 8 : src_eqv_hash = 0;
5402 8 : repeat = true;
5403 8 : break;
5404 : }
5405 : }
5406 : }
5407 :
5408 : /* We don't normally have an insn matching (set (pc) (pc)), so
5409 : check for this separately here. We will delete such an
5410 : insn below.
5411 :
5412 : For other cases such as a table jump or conditional jump
5413 : where we know the ultimate target, go ahead and replace the
5414 : operand. While that may not make a valid insn, we will
5415 : reemit the jump below (and also insert any necessary
5416 : barriers). */
5417 201494783 : if (n_sets == 1 && dest == pc_rtx
5418 224981857 : && (trial == pc_rtx
5419 20547808 : || (GET_CODE (trial) == LABEL_REF
5420 10868 : && ! condjump_p (insn))))
5421 : {
5422 : /* Don't substitute non-local labels, this confuses CFG. */
5423 15183 : if (GET_CODE (trial) == LABEL_REF
5424 13875 : && LABEL_REF_NONLOCAL_P (trial))
5425 1308 : continue;
5426 :
5427 12567 : SET_SRC (sets[i].rtl) = trial;
5428 12567 : cse_jumps_altered = true;
5429 12567 : break;
5430 : }
5431 :
5432 : /* Similarly, lots of targets don't allow no-op
5433 : (set (mem x) (mem x)) moves. Even (set (reg x) (reg x))
5434 : might be impossible for certain registers (like CC registers). */
5435 204407608 : else if (n_sets == 1
5436 201480908 : && !CALL_P (insn)
5437 200991014 : && (MEM_P (trial) || REG_P (trial))
5438 81717979 : && rtx_equal_p (trial, dest)
5439 214710 : && !side_effects_p (dest)
5440 214706 : && (cfun->can_delete_dead_exceptions
5441 49064 : || insn_nothrow_p (insn))
5442 : /* We can only remove the later store if the earlier aliases
5443 : at least all accesses the later one. */
5444 204611853 : && (!MEM_P (trial)
5445 25093 : || ((MEM_ALIAS_SET (dest) == MEM_ALIAS_SET (trial)
5446 8560 : || alias_set_subset_of (MEM_ALIAS_SET (dest),
5447 8560 : MEM_ALIAS_SET (trial)))
5448 16991 : && (!MEM_EXPR (trial)
5449 16010 : || refs_same_for_tbaa_p (MEM_EXPR (trial),
5450 16010 : MEM_EXPR (dest))))))
5451 : {
5452 193213 : SET_SRC (sets[i].rtl) = trial;
5453 193213 : noop_insn = true;
5454 193213 : break;
5455 : }
5456 :
5457 : /* Reject certain invalid forms of CONST that we create. */
5458 204214395 : else if (CONSTANT_P (trial)
5459 33437539 : && GET_CODE (trial) == CONST
5460 : /* Reject cases that will cause decode_rtx_const to
5461 : die. On the alpha when simplifying a switch, we
5462 : get (const (truncate (minus (label_ref)
5463 : (label_ref)))). */
5464 592807 : && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5465 : /* Likewise on IA-64, except without the
5466 : truncate. */
5467 592807 : || (GET_CODE (XEXP (trial, 0)) == MINUS
5468 0 : && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5469 0 : && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5470 : /* Do nothing for this case. */
5471 : ;
5472 :
5473 : /* Do not replace anything with a MEM, except the replacement
5474 : is a no-op. This allows this loop to terminate. */
5475 204214395 : else if (MEM_P (trial) && !rtx_equal_p (trial, SET_SRC(sets[i].rtl)))
5476 : /* Do nothing for this case. */
5477 : ;
5478 :
5479 : /* Look for a substitution that makes a valid insn. */
5480 204114196 : else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5481 : trial, 0))
5482 : {
5483 198836795 : rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5484 :
5485 : /* The result of apply_change_group can be ignored; see
5486 : canon_reg. */
5487 :
5488 198836795 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5489 198836795 : apply_change_group ();
5490 :
5491 198836795 : break;
5492 : }
5493 :
5494 : /* If the current function uses a constant pool and this is a
5495 : constant, try making a pool entry. Put it in src_folded
5496 : unless we already have done this since that is where it
5497 : likely came from. */
5498 :
5499 5277401 : else if (crtl->uses_const_pool
5500 3873706 : && CONSTANT_P (trial)
5501 2861441 : && !CONST_INT_P (trial)
5502 2842798 : && (src_folded == 0 || !MEM_P (src_folded))
5503 1974351 : && GET_MODE_CLASS (mode) != MODE_CC
5504 1974351 : && mode != VOIDmode)
5505 : {
5506 1974351 : src_folded = force_const_mem (mode, trial);
5507 1974351 : if (src_folded)
5508 : {
5509 1973704 : src_folded_cost = COST (src_folded, mode);
5510 1973704 : src_folded_regcost = approx_reg_cost (src_folded);
5511 : }
5512 : }
5513 : }
5514 :
5515 : /* If we changed the insn too much, handle this set from scratch. */
5516 199042575 : if (repeat)
5517 : {
5518 8 : i--;
5519 8 : continue;
5520 : }
5521 :
5522 199719234 : src = SET_SRC (sets[i].rtl);
5523 :
5524 : /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5525 : However, there is an important exception: If both are registers
5526 : that are not the head of their equivalence class, replace SET_SRC
5527 : with the head of the class. If we do not do this, we will have
5528 : both registers live over a portion of the basic block. This way,
5529 : their lifetimes will likely abut instead of overlapping. */
5530 199719234 : if (!is_fake_set
5531 199042575 : && REG_P (dest)
5532 348043174 : && REGNO_QTY_VALID_P (REGNO (dest)))
5533 : {
5534 8378200 : int dest_q = REG_QTY (REGNO (dest));
5535 8378200 : struct qty_table_elem *dest_ent = &qty_table[dest_q];
5536 :
5537 8378200 : if (dest_ent->mode == GET_MODE (dest)
5538 6519154 : && dest_ent->first_reg != REGNO (dest)
5539 121006 : && REG_P (src) && REGNO (src) == REGNO (dest)
5540 : /* Don't do this if the original insn had a hard reg as
5541 : SET_SRC or SET_DEST. */
5542 4539 : && (!REG_P (sets[i].src)
5543 3513 : || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5544 8382725 : && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5545 : /* We can't call canon_reg here because it won't do anything if
5546 : SRC is a hard register. */
5547 : {
5548 4525 : int src_q = REG_QTY (REGNO (src));
5549 4525 : struct qty_table_elem *src_ent = &qty_table[src_q];
5550 4525 : int first = src_ent->first_reg;
5551 4525 : rtx new_src
5552 : = (first >= FIRST_PSEUDO_REGISTER
5553 4525 : ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5554 :
5555 : /* We must use validate-change even for this, because this
5556 : might be a special no-op instruction, suitable only to
5557 : tag notes onto. */
5558 4525 : if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5559 : {
5560 4525 : src = new_src;
5561 : /* If we had a constant that is cheaper than what we are now
5562 : setting SRC to, use that constant. We ignored it when we
5563 : thought we could make this into a no-op. */
5564 1572 : if (src_const && COST (src_const, mode) < COST (src, mode)
5565 4525 : && validate_change (insn, &SET_SRC (sets[i].rtl),
5566 : src_const, 0))
5567 : src = src_const;
5568 : }
5569 : }
5570 : }
5571 :
5572 : /* If we made a change, recompute SRC values. */
5573 199719234 : if (src != sets[i].src)
5574 : {
5575 3400236 : do_not_record = 0;
5576 3400236 : hash_arg_in_memory = 0;
5577 3400236 : sets[i].src = src;
5578 3400236 : sets[i].src_hash = HASH (src, mode);
5579 3400236 : sets[i].src_volatile = do_not_record;
5580 3400236 : sets[i].src_in_memory = hash_arg_in_memory;
5581 3400236 : sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5582 : }
5583 :
5584 : /* If this is a single SET, we are setting a register, and we have an
5585 : equivalent constant, we want to add a REG_EQUAL note if the constant
5586 : is different from the source. We don't want to do it for a constant
5587 : pseudo since verifying that this pseudo hasn't been eliminated is a
5588 : pain; moreover such a note won't help anything.
5589 :
5590 : Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5591 : which can be created for a reference to a compile time computable
5592 : entry in a jump table. */
5593 199719234 : if (n_sets == 1
5594 196540545 : && REG_P (dest)
5595 146129886 : && src_const
5596 30000940 : && !REG_P (src_const)
5597 29974271 : && !(GET_CODE (src_const) == SUBREG
5598 0 : && REG_P (SUBREG_REG (src_const)))
5599 29974271 : && !(GET_CODE (src_const) == CONST
5600 386781 : && GET_CODE (XEXP (src_const, 0)) == MINUS
5601 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5602 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)
5603 229693505 : && !rtx_equal_p (src, src_const))
5604 : {
5605 : /* Make sure that the rtx is not shared. */
5606 7937657 : src_const = copy_rtx (src_const);
5607 :
5608 : /* Record the actual constant value in a REG_EQUAL note,
5609 : making a new one if one does not already exist. */
5610 7937657 : set_unique_reg_note (insn, REG_EQUAL, src_const);
5611 7937657 : df_notes_rescan (insn);
5612 : }
5613 :
5614 : /* Now deal with the destination. */
5615 199719234 : do_not_record = 0;
5616 :
5617 : /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5618 199719234 : while (GET_CODE (dest) == SUBREG
5619 199737136 : || GET_CODE (dest) == ZERO_EXTRACT
5620 401125899 : || GET_CODE (dest) == STRICT_LOW_PART)
5621 1673558 : dest = XEXP (dest, 0);
5622 :
5623 199719234 : sets[i].inner_dest = dest;
5624 :
5625 199719234 : if (MEM_P (dest))
5626 : {
5627 : #ifdef PUSH_ROUNDING
5628 : /* Stack pushes invalidate the stack pointer. */
5629 29190878 : rtx addr = XEXP (dest, 0);
5630 29190878 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5631 5547935 : && XEXP (addr, 0) == stack_pointer_rtx)
5632 5547935 : invalidate (stack_pointer_rtx, VOIDmode);
5633 : #endif
5634 29190878 : dest = fold_rtx (dest, insn);
5635 : }
5636 :
5637 : /* Compute the hash code of the destination now,
5638 : before the effects of this instruction are recorded,
5639 : since the register values used in the address computation
5640 : are those before this instruction. */
5641 199719234 : sets[i].dest_hash = HASH (dest, mode);
5642 :
5643 : /* Don't enter a bit-field in the hash table
5644 : because the value in it after the store
5645 : may not equal what was stored, due to truncation. */
5646 :
5647 199719234 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5648 : {
5649 4029 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5650 :
5651 4029 : if (src_const != 0 && CONST_INT_P (src_const)
5652 713 : && CONST_INT_P (width)
5653 713 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5654 713 : && ! (INTVAL (src_const)
5655 713 : & (HOST_WIDE_INT_M1U << INTVAL (width))))
5656 : /* Exception: if the value is constant,
5657 : and it won't be truncated, record it. */
5658 : ;
5659 : else
5660 : {
5661 : /* This is chosen so that the destination will be invalidated
5662 : but no new value will be recorded.
5663 : We must invalidate because sometimes constant
5664 : values can be recorded for bitfields. */
5665 3317 : sets[i].src_elt = 0;
5666 3317 : sets[i].src_volatile = 1;
5667 3317 : src_eqv = 0;
5668 3317 : src_eqv_elt = 0;
5669 : }
5670 : }
5671 :
5672 : /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5673 : the insn. */
5674 199715205 : else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5675 : {
5676 : /* One less use of the label this insn used to jump to. */
5677 12566 : cse_cfg_altered |= delete_insn_and_edges (insn);
5678 12566 : cse_jumps_altered = true;
5679 : /* No more processing for this set. */
5680 12566 : sets[i].rtl = 0;
5681 : }
5682 :
5683 : /* Similarly for no-op moves. */
5684 199702639 : else if (noop_insn)
5685 : {
5686 193213 : if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
5687 0 : cse_cfg_altered = true;
5688 193213 : cse_cfg_altered |= delete_insn_and_edges (insn);
5689 : /* No more processing for this set. */
5690 193213 : sets[i].rtl = 0;
5691 : }
5692 :
5693 : /* If this SET is now setting PC to a label, we know it used to
5694 : be a conditional or computed branch. */
5695 20534006 : else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5696 199518986 : && !LABEL_REF_NONLOCAL_P (src))
5697 : {
5698 : /* We reemit the jump in as many cases as possible just in
5699 : case the form of an unconditional jump is significantly
5700 : different than a computed jump or conditional jump.
5701 :
5702 : If this insn has multiple sets, then reemitting the
5703 : jump is nontrivial. So instead we just force rerecognition
5704 : and hope for the best. */
5705 9560 : if (n_sets == 1)
5706 : {
5707 9560 : rtx_jump_insn *new_rtx;
5708 9560 : rtx note;
5709 :
5710 9560 : rtx_insn *seq = targetm.gen_jump (XEXP (src, 0));
5711 9560 : new_rtx = emit_jump_insn_before (seq, insn);
5712 9560 : JUMP_LABEL (new_rtx) = XEXP (src, 0);
5713 9560 : LABEL_NUSES (XEXP (src, 0))++;
5714 :
5715 : /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5716 9560 : note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5717 9560 : if (note)
5718 : {
5719 0 : XEXP (note, 1) = NULL_RTX;
5720 0 : REG_NOTES (new_rtx) = note;
5721 : }
5722 :
5723 9560 : cse_cfg_altered |= delete_insn_and_edges (insn);
5724 9560 : insn = new_rtx;
5725 : }
5726 : else
5727 0 : INSN_CODE (insn) = -1;
5728 :
5729 : /* Do not bother deleting any unreachable code, let jump do it. */
5730 9560 : cse_jumps_altered = true;
5731 9560 : sets[i].rtl = 0;
5732 : }
5733 :
5734 : /* If destination is volatile, invalidate it and then do no further
5735 : processing for this assignment. */
5736 :
5737 199499866 : else if (do_not_record)
5738 : {
5739 56729179 : invalidate_dest (dest);
5740 56729179 : sets[i].rtl = 0;
5741 : }
5742 :
5743 199719234 : if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5744 : {
5745 1743390 : do_not_record = 0;
5746 1743390 : sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5747 1743390 : if (do_not_record)
5748 : {
5749 978 : invalidate_dest (SET_DEST (sets[i].rtl));
5750 978 : sets[i].rtl = 0;
5751 : }
5752 : }
5753 : }
5754 :
5755 : /* Now enter all non-volatile source expressions in the hash table
5756 : if they are not already present.
5757 : Record their equivalence classes in src_elt.
5758 : This way we can insert the corresponding destinations into
5759 : the same classes even if the actual sources are no longer in them
5760 : (having been invalidated). */
5761 :
5762 5551905 : if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5763 425037602 : && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5764 : {
5765 4525478 : struct table_elt *elt;
5766 4525478 : struct table_elt *classp = sets[0].src_elt;
5767 4525478 : rtx dest = SET_DEST (sets[0].rtl);
5768 4525478 : machine_mode eqvmode = GET_MODE (dest);
5769 :
5770 4525478 : if (GET_CODE (dest) == STRICT_LOW_PART)
5771 : {
5772 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5773 0 : classp = 0;
5774 : }
5775 4525478 : if (insert_regs (src_eqv, classp, false))
5776 : {
5777 156480 : rehash_using_reg (src_eqv);
5778 156480 : src_eqv_hash = HASH (src_eqv, eqvmode);
5779 : }
5780 4525478 : elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5781 4525478 : elt->in_memory = src_eqv_in_memory;
5782 4525478 : src_eqv_elt = elt;
5783 :
5784 : /* Check to see if src_eqv_elt is the same as a set source which
5785 : does not yet have an elt, and if so set the elt of the set source
5786 : to src_eqv_elt. */
5787 9050956 : for (i = 0; i < n_sets; i++)
5788 9050956 : if (sets[i].rtl && sets[i].src_elt == 0
5789 8917511 : && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5790 98499 : sets[i].src_elt = src_eqv_elt;
5791 : }
5792 :
5793 620231358 : for (i = 0; i < n_sets; i++)
5794 342492972 : if (sets[i].rtl && ! sets[i].src_volatile
5795 328594431 : && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5796 : {
5797 128870178 : if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5798 : {
5799 : /* REG_EQUAL in setting a STRICT_LOW_PART
5800 : gives an equivalent for the entire destination register,
5801 : not just for the subreg being stored in now.
5802 : This is a more interesting equivalence, so we arrange later
5803 : to treat the entire reg as the destination. */
5804 13873 : sets[i].src_elt = src_eqv_elt;
5805 13873 : sets[i].src_hash = src_eqv_hash;
5806 : }
5807 : else
5808 : {
5809 : /* Insert source and constant equivalent into hash table, if not
5810 : already present. */
5811 128856305 : struct table_elt *classp = src_eqv_elt;
5812 128856305 : rtx src = sets[i].src;
5813 128856305 : rtx dest = SET_DEST (sets[i].rtl);
5814 269190528 : machine_mode mode
5815 128856305 : = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5816 :
5817 : /* It's possible that we have a source value known to be
5818 : constant but don't have a REG_EQUAL note on the insn.
5819 : Lack of a note will mean src_eqv_elt will be NULL. This
5820 : can happen where we've generated a SUBREG to access a
5821 : CONST_INT that is already in a register in a wider mode.
5822 : Ensure that the source expression is put in the proper
5823 : constant class. */
5824 128856305 : if (!classp)
5825 123368462 : classp = sets[i].src_const_elt;
5826 :
5827 128856305 : if (sets[i].src_elt == 0)
5828 : {
5829 106425245 : struct table_elt *elt;
5830 :
5831 : /* Note that these insert_regs calls cannot remove
5832 : any of the src_elt's, because they would have failed to
5833 : match if not still valid. */
5834 106425245 : if (insert_regs (src, classp, false))
5835 : {
5836 17723986 : rehash_using_reg (src);
5837 17723986 : sets[i].src_hash = HASH (src, mode);
5838 : }
5839 106425245 : elt = insert (src, classp, sets[i].src_hash, mode);
5840 106425245 : elt->in_memory = sets[i].src_in_memory;
5841 : /* If inline asm has any clobbers, ensure we only reuse
5842 : existing inline asms and never try to put the ASM_OPERANDS
5843 : into an insn that isn't inline asm. */
5844 106425245 : if (GET_CODE (src) == ASM_OPERANDS
5845 20698 : && GET_CODE (x) == PARALLEL)
5846 20680 : elt->cost = MAX_COST;
5847 106425245 : sets[i].src_elt = classp = elt;
5848 : }
5849 154189837 : if (sets[i].src_const && sets[i].src_const_elt == 0
5850 15033078 : && src != sets[i].src_const
5851 131089359 : && ! rtx_equal_p (sets[i].src_const, src))
5852 2233054 : sets[i].src_elt = insert (sets[i].src_const, classp,
5853 2233054 : sets[i].src_const_hash, mode);
5854 : }
5855 : }
5856 70849056 : else if (sets[i].src_elt == 0)
5857 : /* If we did not insert the source into the hash table (e.g., it was
5858 : volatile), note the equivalence class for the REG_EQUAL value, if any,
5859 : so that the destination goes into that class. */
5860 58002379 : sets[i].src_elt = src_eqv_elt;
5861 :
5862 : /* Record destination addresses in the hash table. This allows us to
5863 : check if they are invalidated by other sets. */
5864 620231358 : for (i = 0; i < n_sets; i++)
5865 : {
5866 199719234 : if (sets[i].rtl)
5867 : {
5868 142773738 : rtx x = sets[i].inner_dest;
5869 142773738 : struct table_elt *elt;
5870 142773738 : machine_mode mode;
5871 142773738 : unsigned hash;
5872 :
5873 142773738 : if (MEM_P (x))
5874 : {
5875 22547109 : x = XEXP (x, 0);
5876 22547109 : mode = GET_MODE (x);
5877 22547109 : hash = HASH (x, mode);
5878 22547109 : elt = lookup (x, hash, mode);
5879 22547109 : if (!elt)
5880 : {
5881 19643231 : if (insert_regs (x, NULL, false))
5882 : {
5883 2253559 : rtx dest = SET_DEST (sets[i].rtl);
5884 :
5885 2253559 : rehash_using_reg (x);
5886 2253559 : hash = HASH (x, mode);
5887 2253559 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5888 : }
5889 19643231 : elt = insert (x, NULL, hash, mode);
5890 : }
5891 :
5892 22547109 : sets[i].dest_addr_elt = elt;
5893 : }
5894 : else
5895 120226629 : sets[i].dest_addr_elt = NULL;
5896 : }
5897 : }
5898 :
5899 420512124 : invalidate_from_clobbers (insn);
5900 :
5901 : /* Some registers are invalidated by subroutine calls. Memory is
5902 : invalidated by non-constant calls. */
5903 :
5904 420512124 : if (CALL_P (insn))
5905 : {
5906 16036403 : if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5907 13871095 : invalidate_memory ();
5908 : else
5909 : /* For const/pure calls, invalidate any argument slots, because
5910 : those are owned by the callee. */
5911 6428175 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
5912 4262867 : if (GET_CODE (XEXP (tem, 0)) == USE
5913 4262866 : && MEM_P (XEXP (XEXP (tem, 0), 0)))
5914 71361 : invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode);
5915 16036403 : invalidate_for_call (insn);
5916 : }
5917 :
5918 : /* Now invalidate everything set by this instruction.
5919 : If a SUBREG or other funny destination is being set,
5920 : sets[i].rtl is still nonzero, so here we invalidate the reg
5921 : a part of which is being set. */
5922 :
5923 620231358 : for (i = 0; i < n_sets; i++)
5924 199719234 : if (sets[i].rtl)
5925 : {
5926 : /* We can't use the inner dest, because the mode associated with
5927 : a ZERO_EXTRACT is significant. */
5928 142773738 : rtx dest = SET_DEST (sets[i].rtl);
5929 :
5930 : /* Needed for registers to remove the register from its
5931 : previous quantity's chain.
5932 : Needed for memory if this is a nonvarying address, unless
5933 : we have just done an invalidate_memory that covers even those. */
5934 142773738 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5935 120209565 : invalidate (dest, VOIDmode);
5936 22564173 : else if (MEM_P (dest))
5937 22547109 : invalidate (dest, VOIDmode);
5938 17064 : else if (GET_CODE (dest) == STRICT_LOW_PART
5939 3191 : || GET_CODE (dest) == ZERO_EXTRACT)
5940 16942 : invalidate (XEXP (dest, 0), GET_MODE (dest));
5941 : }
5942 :
5943 : /* Don't cse over a call to setjmp; on some machines (eg VAX)
5944 : the regs restored by the longjmp come from a later time
5945 : than the setjmp. */
5946 420512124 : if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5947 : {
5948 2228 : flush_hash_table ();
5949 2228 : goto done;
5950 : }
5951 :
5952 : /* Make sure registers mentioned in destinations
5953 : are safe for use in an expression to be inserted.
5954 : This removes from the hash table
5955 : any invalid entry that refers to one of these registers.
5956 :
5957 : We don't care about the return value from mention_regs because
5958 : we are going to hash the SET_DEST values unconditionally. */
5959 :
5960 620229130 : for (i = 0; i < n_sets; i++)
5961 : {
5962 199719234 : if (sets[i].rtl)
5963 : {
5964 142773738 : rtx x = SET_DEST (sets[i].rtl);
5965 :
5966 142773738 : if (!REG_P (x))
5967 24204385 : mention_regs (x);
5968 : else
5969 : {
5970 : /* We used to rely on all references to a register becoming
5971 : inaccessible when a register changes to a new quantity,
5972 : since that changes the hash code. However, that is not
5973 : safe, since after HASH_SIZE new quantities we get a
5974 : hash 'collision' of a register with its own invalid
5975 : entries. And since SUBREGs have been changed not to
5976 : change their hash code with the hash code of the register,
5977 : it wouldn't work any longer at all. So we have to check
5978 : for any invalid references lying around now.
5979 : This code is similar to the REG case in mention_regs,
5980 : but it knows that reg_tick has been incremented, and
5981 : it leaves reg_in_table as -1 . */
5982 118569353 : unsigned int regno = REGNO (x);
5983 118569353 : unsigned int endregno = END_REGNO (x);
5984 118569353 : unsigned int i;
5985 :
5986 237138706 : for (i = regno; i < endregno; i++)
5987 : {
5988 118569353 : if (REG_IN_TABLE (i) >= 0)
5989 : {
5990 12990077 : remove_invalid_refs (i);
5991 12990077 : REG_IN_TABLE (i) = -1;
5992 : }
5993 : }
5994 : }
5995 : }
5996 : }
5997 :
5998 : /* We may have just removed some of the src_elt's from the hash table.
5999 : So replace each one with the current head of the same class.
6000 : Also check if destination addresses have been removed. */
6001 :
6002 620229130 : for (i = 0; i < n_sets; i++)
6003 199719234 : if (sets[i].rtl)
6004 : {
6005 142773738 : if (sets[i].dest_addr_elt
6006 142773738 : && sets[i].dest_addr_elt->first_same_value == 0)
6007 : {
6008 : /* The elt was removed, which means this destination is not
6009 : valid after this instruction. */
6010 0 : sets[i].rtl = NULL_RTX;
6011 : }
6012 142773738 : else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6013 : /* If elt was removed, find current head of same class,
6014 : or 0 if nothing remains of that class. */
6015 : {
6016 10864238 : struct table_elt *elt = sets[i].src_elt;
6017 :
6018 10864238 : while (elt && elt->prev_same_value)
6019 : elt = elt->prev_same_value;
6020 :
6021 21656511 : while (elt && elt->first_same_value == 0)
6022 10827904 : elt = elt->next_same_value;
6023 10828607 : sets[i].src_elt = elt ? elt->first_same_value : 0;
6024 : }
6025 : }
6026 :
6027 : /* Now insert the destinations into their equivalence classes. */
6028 :
6029 620229130 : for (i = 0; i < n_sets; i++)
6030 199719234 : if (sets[i].rtl)
6031 : {
6032 142773738 : rtx dest = SET_DEST (sets[i].rtl);
6033 142773738 : struct table_elt *elt;
6034 :
6035 : /* Don't record value if we are not supposed to risk allocating
6036 : floating-point values in registers that might be wider than
6037 : memory. */
6038 167455955 : if ((flag_float_store
6039 12898 : && MEM_P (dest)
6040 4396 : && FLOAT_MODE_P (GET_MODE (dest)))
6041 : /* Don't record BLKmode values, because we don't know the
6042 : size of it, and can't be sure that other BLKmode values
6043 : have the same or smaller size. */
6044 142771042 : || GET_MODE (dest) == BLKmode
6045 : /* If we didn't put a REG_EQUAL value or a source into the hash
6046 : table, there is no point is recording DEST. */
6047 285544780 : || sets[i].src_elt == 0)
6048 24682217 : continue;
6049 :
6050 : /* STRICT_LOW_PART isn't part of the value BEING set,
6051 : and neither is the SUBREG inside it.
6052 : Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6053 118091521 : if (GET_CODE (dest) == STRICT_LOW_PART)
6054 0 : dest = SUBREG_REG (XEXP (dest, 0));
6055 :
6056 118091521 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
6057 : /* Registers must also be inserted into chains for quantities. */
6058 95916235 : if (insert_regs (dest, sets[i].src_elt, true))
6059 : {
6060 : /* If `insert_regs' changes something, the hash code must be
6061 : recalculated. */
6062 95319390 : rehash_using_reg (dest);
6063 95319390 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6064 : }
6065 :
6066 : /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
6067 : outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
6068 118091521 : if (paradoxical_subreg_p (dest))
6069 66128 : continue;
6070 :
6071 354076179 : elt = insert (dest, sets[i].src_elt,
6072 118025393 : sets[i].dest_hash, GET_MODE (dest));
6073 :
6074 : /* If this is a constant, insert the constant anchors with the
6075 : equivalent register-offset expressions using register DEST. */
6076 118025393 : if (targetm.const_anchor
6077 0 : && REG_P (dest)
6078 0 : && SCALAR_INT_MODE_P (GET_MODE (dest))
6079 118025393 : && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
6080 0 : insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
6081 :
6082 118025393 : elt->in_memory = (MEM_P (sets[i].inner_dest)
6083 118025393 : && !MEM_READONLY_P (sets[i].inner_dest));
6084 :
6085 : /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6086 : narrower than M2, and both M1 and M2 are the same number of words,
6087 : we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6088 : make that equivalence as well.
6089 :
6090 : However, BAR may have equivalences for which gen_lowpart
6091 : will produce a simpler value than gen_lowpart applied to
6092 : BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6093 : BAR's equivalences. If we don't get a simplified form, make
6094 : the SUBREG. It will not be used in an equivalence, but will
6095 : cause two similar assignments to be detected.
6096 :
6097 : Note the loop below will find SUBREG_REG (DEST) since we have
6098 : already entered SRC and DEST of the SET in the table. */
6099 :
6100 118025393 : if (GET_CODE (dest) == SUBREG
6101 : && (known_equal_after_align_down
6102 201268885 : (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1,
6103 3014644 : GET_MODE_SIZE (GET_MODE (dest)) - 1,
6104 1507322 : UNITS_PER_WORD))
6105 94609 : && !partial_subreg_p (dest)
6106 118067722 : && sets[i].src_elt != 0)
6107 : {
6108 42329 : machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6109 42329 : struct table_elt *elt, *classp = 0;
6110 :
6111 470670 : for (elt = sets[i].src_elt->first_same_value; elt;
6112 428341 : elt = elt->next_same_value)
6113 : {
6114 428341 : rtx new_src = 0;
6115 428341 : unsigned src_hash;
6116 428341 : struct table_elt *src_elt;
6117 :
6118 : /* Ignore invalid entries. */
6119 428341 : if (!REG_P (elt->exp)
6120 428341 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6121 0 : continue;
6122 :
6123 : /* We may have already been playing subreg games. If the
6124 : mode is already correct for the destination, use it. */
6125 428341 : if (GET_MODE (elt->exp) == new_mode)
6126 : new_src = elt->exp;
6127 : else
6128 : {
6129 428341 : poly_uint64 byte
6130 428341 : = subreg_lowpart_offset (new_mode, GET_MODE (dest));
6131 428341 : new_src = simplify_gen_subreg (new_mode, elt->exp,
6132 428341 : GET_MODE (dest), byte);
6133 : }
6134 :
6135 : /* The call to simplify_gen_subreg fails if the value
6136 : is VOIDmode, yet we can't do any simplification, e.g.
6137 : for EXPR_LISTs denoting function call results.
6138 : It is invalid to construct a SUBREG with a VOIDmode
6139 : SUBREG_REG, hence a zero new_src means we can't do
6140 : this substitution. */
6141 428341 : if (! new_src)
6142 6 : continue;
6143 :
6144 428335 : src_hash = HASH (new_src, new_mode);
6145 428335 : src_elt = lookup (new_src, src_hash, new_mode);
6146 :
6147 : /* Put the new source in the hash table is if isn't
6148 : already. */
6149 428335 : if (src_elt == 0)
6150 : {
6151 54921 : if (insert_regs (new_src, classp, false))
6152 : {
6153 0 : rehash_using_reg (new_src);
6154 0 : src_hash = HASH (new_src, new_mode);
6155 : }
6156 54921 : src_elt = insert (new_src, classp, src_hash, new_mode);
6157 54921 : src_elt->in_memory = elt->in_memory;
6158 54921 : if (GET_CODE (new_src) == ASM_OPERANDS
6159 0 : && elt->cost == MAX_COST)
6160 0 : src_elt->cost = MAX_COST;
6161 : }
6162 373414 : else if (classp && classp != src_elt->first_same_value)
6163 : /* Show that two things that we've seen before are
6164 : actually the same. */
6165 161 : merge_equiv_classes (src_elt, classp);
6166 :
6167 428335 : classp = src_elt->first_same_value;
6168 : /* Ignore invalid entries. */
6169 428335 : while (classp
6170 428335 : && !REG_P (classp->exp)
6171 805827 : && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6172 0 : classp = classp->next_same_value;
6173 : }
6174 : }
6175 : }
6176 :
6177 : /* Special handling for (set REG0 REG1) where REG0 is the
6178 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
6179 : be used in the sequel, so (if easily done) change this insn to
6180 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6181 : that computed their value. Then REG1 will become a dead store
6182 : and won't cloud the situation for later optimizations.
6183 :
6184 : Do not make this change if REG1 is a hard register, because it will
6185 : then be used in the sequel and we may be changing a two-operand insn
6186 : into a three-operand insn.
6187 :
6188 : Also do not do this if we are operating on a copy of INSN. */
6189 :
6190 617050441 : if (n_sets == 1 && sets[0].rtl)
6191 139822213 : try_back_substitute_reg (sets[0].rtl, insn);
6192 :
6193 420512124 : done:;
6194 420512124 : }
6195 :
6196 : /* Remove from the hash table all expressions that reference memory. */
6197 :
6198 : static void
6199 13871095 : invalidate_memory (void)
6200 : {
6201 13871095 : int i;
6202 13871095 : struct table_elt *p, *next;
6203 :
6204 457746135 : for (i = 0; i < HASH_SIZE; i++)
6205 637257068 : for (p = table[i]; p; p = next)
6206 : {
6207 193382028 : next = p->next_same_hash;
6208 193382028 : if (p->in_memory)
6209 20021889 : remove_from_table (p, i);
6210 : }
6211 13871095 : }
6212 :
6213 : /* Perform invalidation on the basis of everything about INSN,
6214 : except for invalidating the actual places that are SET in it.
6215 : This includes the places CLOBBERed, and anything that might
6216 : alias with something that is SET or CLOBBERed. */
6217 :
6218 : static void
6219 420512124 : invalidate_from_clobbers (rtx_insn *insn)
6220 : {
6221 420512124 : rtx x = PATTERN (insn);
6222 :
6223 420512124 : if (GET_CODE (x) == CLOBBER)
6224 : {
6225 69374 : rtx ref = XEXP (x, 0);
6226 69374 : if (ref)
6227 : {
6228 69374 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6229 13038 : || MEM_P (ref))
6230 69374 : invalidate (ref, VOIDmode);
6231 0 : else if (GET_CODE (ref) == STRICT_LOW_PART
6232 0 : || GET_CODE (ref) == ZERO_EXTRACT)
6233 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6234 : }
6235 : }
6236 420442750 : else if (GET_CODE (x) == PARALLEL)
6237 : {
6238 31000571 : int i;
6239 94382015 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6240 : {
6241 63381444 : rtx y = XVECEXP (x, 0, i);
6242 63381444 : if (GET_CODE (y) == CLOBBER)
6243 : {
6244 30594294 : rtx ref = XEXP (y, 0);
6245 30594294 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6246 255848 : || MEM_P (ref))
6247 30401703 : invalidate (ref, VOIDmode);
6248 192591 : else if (GET_CODE (ref) == STRICT_LOW_PART
6249 192591 : || GET_CODE (ref) == ZERO_EXTRACT)
6250 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6251 : }
6252 : }
6253 : }
6254 420512124 : }
6255 :
6256 : /* Perform invalidation on the basis of everything about INSN.
6257 : This includes the places CLOBBERed, and anything that might
6258 : alias with something that is SET or CLOBBERed. */
6259 :
6260 : static void
6261 420512124 : invalidate_from_sets_and_clobbers (rtx_insn *insn)
6262 : {
6263 420512124 : rtx tem;
6264 420512124 : rtx x = PATTERN (insn);
6265 :
6266 420512124 : if (CALL_P (insn))
6267 : {
6268 47434461 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6269 : {
6270 31398058 : rtx temx = XEXP (tem, 0);
6271 31398058 : if (GET_CODE (temx) == CLOBBER)
6272 0 : invalidate (SET_DEST (temx), VOIDmode);
6273 : }
6274 : }
6275 :
6276 : /* Ensure we invalidate the destination register of a CALL insn.
6277 : This is necessary for machines where this register is a fixed_reg,
6278 : because no other code would invalidate it. */
6279 420512124 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
6280 7382744 : invalidate (SET_DEST (x), VOIDmode);
6281 :
6282 413129380 : else if (GET_CODE (x) == PARALLEL)
6283 : {
6284 31724118 : int i;
6285 :
6286 96557469 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6287 : {
6288 64833351 : rtx y = XVECEXP (x, 0, i);
6289 64833351 : if (GET_CODE (y) == CLOBBER)
6290 : {
6291 31322654 : rtx clobbered = XEXP (y, 0);
6292 :
6293 31322654 : if (REG_P (clobbered)
6294 260657 : || GET_CODE (clobbered) == SUBREG)
6295 31061997 : invalidate (clobbered, VOIDmode);
6296 260657 : else if (GET_CODE (clobbered) == STRICT_LOW_PART
6297 260657 : || GET_CODE (clobbered) == ZERO_EXTRACT)
6298 0 : invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6299 : }
6300 33510697 : else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
6301 10159 : invalidate (SET_DEST (y), VOIDmode);
6302 : }
6303 : }
6304 :
6305 : /* Any single register constraint may introduce a conflict, if the associated
6306 : hard register is live. For example:
6307 :
6308 : r100=%1
6309 : r101=42
6310 : r102=exp(r101)
6311 :
6312 : If the first operand r101 of exp is constrained to hard register %1, then
6313 : r100 cannot be trivially substituted by %1 in the following since %1 got
6314 : clobbered. Such conflicts may stem from single register classes as well
6315 : as hard register constraints. Since prior RA we do not know which
6316 : alternative will be chosen, be conservative and consider any such hard
6317 : register from any alternative as a potential clobber. */
6318 420512124 : extract_insn (insn);
6319 895486657 : for (int nop = recog_data.n_operands - 1; nop >= 0; --nop)
6320 : {
6321 474974533 : int c;
6322 474974533 : const char *p = recog_data.constraints[nop];
6323 15916099550 : for (; (c = *p); p += CONSTRAINT_LEN (c, p))
6324 15441125017 : if (c == ',')
6325 : ;
6326 10091728327 : else if (c == '{')
6327 : {
6328 190 : int regno = decode_hard_reg_constraint (p);
6329 190 : machine_mode mode = recog_data.operand_mode[nop];
6330 190 : invalidate_reg (gen_rtx_REG (mode, regno));
6331 : }
6332 : }
6333 420512124 : }
6334 :
6335 : static rtx cse_process_note (rtx);
6336 :
6337 : /* A simplify_replace_fn_rtx callback for cse_process_note. Process X,
6338 : part of the REG_NOTES of an insn. Replace any registers with either
6339 : an equivalent constant or the canonical form of the register.
6340 : Only replace addresses if the containing MEM remains valid.
6341 :
6342 : Return the replacement for X, or null if it should be simplified
6343 : recursively. */
6344 :
6345 : static rtx
6346 30156726 : cse_process_note_1 (rtx x, const_rtx, void *)
6347 : {
6348 30156726 : if (MEM_P (x))
6349 : {
6350 2146680 : validate_change (x, &XEXP (x, 0), cse_process_note (XEXP (x, 0)), false);
6351 1073340 : return x;
6352 : }
6353 :
6354 29083386 : if (REG_P (x))
6355 : {
6356 6370030 : int i = REG_QTY (REGNO (x));
6357 :
6358 : /* Return a constant or a constant register. */
6359 6370030 : if (REGNO_QTY_VALID_P (REGNO (x)))
6360 : {
6361 1665939 : struct qty_table_elem *ent = &qty_table[i];
6362 :
6363 1665939 : if (ent->const_rtx != NULL_RTX
6364 22106 : && (CONSTANT_P (ent->const_rtx)
6365 16378 : || REG_P (ent->const_rtx)))
6366 : {
6367 5728 : rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6368 5728 : if (new_rtx)
6369 5728 : return copy_rtx (new_rtx);
6370 : }
6371 : }
6372 :
6373 : /* Otherwise, canonicalize this register. */
6374 6364302 : return canon_reg (x, NULL);
6375 : }
6376 :
6377 : return NULL_RTX;
6378 : }
6379 :
6380 : /* Process X, part of the REG_NOTES of an insn. Replace any registers in it
6381 : with either an equivalent constant or the canonical form of the register.
6382 : Only replace addresses if the containing MEM remains valid. */
6383 :
6384 : static rtx
6385 10247763 : cse_process_note (rtx x)
6386 : {
6387 1073340 : return simplify_replace_fn_rtx (x, NULL_RTX, cse_process_note_1, NULL);
6388 : }
6389 :
6390 :
6391 : /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6392 :
6393 : DATA is a pointer to a struct cse_basic_block_data, that is used to
6394 : describe the path.
6395 : It is filled with a queue of basic blocks, starting with FIRST_BB
6396 : and following a trace through the CFG.
6397 :
6398 : If all paths starting at FIRST_BB have been followed, or no new path
6399 : starting at FIRST_BB can be constructed, this function returns FALSE.
6400 : Otherwise, DATA->path is filled and the function returns TRUE indicating
6401 : that a path to follow was found.
6402 :
6403 : If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6404 : block in the path will be FIRST_BB. */
6405 :
6406 : static bool
6407 40829524 : cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6408 : bool follow_jumps)
6409 : {
6410 40829524 : basic_block bb;
6411 40829524 : edge e;
6412 40829524 : int path_size;
6413 :
6414 40829524 : bitmap_set_bit (cse_visited_basic_blocks, first_bb->index);
6415 :
6416 : /* See if there is a previous path. */
6417 40829524 : path_size = data->path_size;
6418 :
6419 : /* There is a previous path. Make sure it started with FIRST_BB. */
6420 40829524 : if (path_size)
6421 21948444 : gcc_assert (data->path[0].bb == first_bb);
6422 :
6423 : /* There was only one basic block in the last path. Clear the path and
6424 : return, so that paths starting at another basic block can be tried. */
6425 21948444 : if (path_size == 1)
6426 : {
6427 14711977 : path_size = 0;
6428 14711977 : goto done;
6429 : }
6430 :
6431 : /* If the path was empty from the beginning, construct a new path. */
6432 26117547 : if (path_size == 0)
6433 18881080 : data->path[path_size++].bb = first_bb;
6434 : else
6435 : {
6436 : /* Otherwise, path_size must be equal to or greater than 2, because
6437 : a previous path exists that is at least two basic blocks long.
6438 :
6439 : Update the previous branch path, if any. If the last branch was
6440 : previously along the branch edge, take the fallthrough edge now. */
6441 15960124 : while (path_size >= 2)
6442 : {
6443 11791021 : basic_block last_bb_in_path, previous_bb_in_path;
6444 11791021 : edge e;
6445 :
6446 11791021 : --path_size;
6447 11791021 : last_bb_in_path = data->path[path_size].bb;
6448 11791021 : previous_bb_in_path = data->path[path_size - 1].bb;
6449 :
6450 : /* If we previously followed a path along the branch edge, try
6451 : the fallthru edge now. */
6452 20514678 : if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6453 11437426 : && any_condjump_p (BB_END (previous_bb_in_path))
6454 11437426 : && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6455 23228447 : && e == BRANCH_EDGE (previous_bb_in_path))
6456 : {
6457 4087871 : bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6458 4087871 : if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun)
6459 4087871 : && single_pred_p (bb)
6460 : /* We used to assert here that we would only see blocks
6461 : that we have not visited yet. But we may end up
6462 : visiting basic blocks twice if the CFG has changed
6463 : in this run of cse_main, because when the CFG changes
6464 : the topological sort of the CFG also changes. A basic
6465 : blocks that previously had more than two predecessors
6466 : may now have a single predecessor, and become part of
6467 : a path that starts at another basic block.
6468 :
6469 : We still want to visit each basic block only once, so
6470 : halt the path here if we have already visited BB. */
6471 7155235 : && !bitmap_bit_p (cse_visited_basic_blocks, bb->index))
6472 : {
6473 3067364 : bitmap_set_bit (cse_visited_basic_blocks, bb->index);
6474 3067364 : data->path[path_size++].bb = bb;
6475 3067364 : break;
6476 : }
6477 : }
6478 :
6479 8723657 : data->path[path_size].bb = NULL;
6480 : }
6481 :
6482 : /* If only one block remains in the path, bail. */
6483 7236467 : if (path_size == 1)
6484 : {
6485 4169103 : path_size = 0;
6486 4169103 : goto done;
6487 : }
6488 : }
6489 :
6490 : /* Extend the path if possible. */
6491 21948444 : if (follow_jumps)
6492 : {
6493 12540474 : bb = data->path[path_size - 1].bb;
6494 21267841 : while (bb && path_size < param_max_cse_path_length)
6495 : {
6496 21109847 : if (single_succ_p (bb))
6497 9259709 : e = single_succ_edge (bb);
6498 11850138 : else if (EDGE_COUNT (bb->succs) == 2
6499 11833596 : && any_condjump_p (BB_END (bb)))
6500 : {
6501 : /* First try to follow the branch. If that doesn't lead
6502 : to a useful path, follow the fallthru edge. */
6503 9327154 : e = BRANCH_EDGE (bb);
6504 9327154 : if (!single_pred_p (e->dest))
6505 5228927 : e = FALLTHRU_EDGE (bb);
6506 : }
6507 : else
6508 : e = NULL;
6509 :
6510 18586863 : if (e
6511 18586863 : && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6512 18585818 : && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
6513 16384905 : && single_pred_p (e->dest)
6514 : /* Avoid visiting basic blocks twice. The large comment
6515 : above explains why this can happen. */
6516 27314242 : && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index))
6517 : {
6518 8727367 : basic_block bb2 = e->dest;
6519 8727367 : bitmap_set_bit (cse_visited_basic_blocks, bb2->index);
6520 8727367 : data->path[path_size++].bb = bb2;
6521 8727367 : bb = bb2;
6522 : }
6523 : else
6524 : bb = NULL;
6525 : }
6526 : }
6527 :
6528 9407970 : done:
6529 40829524 : data->path_size = path_size;
6530 40829524 : return path_size != 0;
6531 : }
6532 :
6533 : /* Dump the path in DATA to file F. NSETS is the number of sets
6534 : in the path. */
6535 :
6536 : static void
6537 317 : cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6538 : {
6539 317 : int path_entry;
6540 :
6541 317 : fprintf (f, ";; Following path with %d sets: ", nsets);
6542 1119 : for (path_entry = 0; path_entry < data->path_size; path_entry++)
6543 485 : fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6544 317 : fputc ('\n', f);
6545 317 : fflush (f);
6546 317 : }
6547 :
6548 :
6549 : /* Return true if BB has exception handling successor edges. */
6550 :
6551 : static bool
6552 9070769 : have_eh_succ_edges (basic_block bb)
6553 : {
6554 9070769 : edge e;
6555 9070769 : edge_iterator ei;
6556 :
6557 21357084 : FOR_EACH_EDGE (e, ei, bb->succs)
6558 13285328 : if (e->flags & EDGE_EH)
6559 : return true;
6560 :
6561 : return false;
6562 : }
6563 :
6564 : /* Record vec_duplicate match for SET in the same basic block, if any. */
6565 : static void
6566 206448832 : cse_prescan_cache_vec_dup (struct cse_basic_block_data *data, basic_block bb,
6567 : rtx_insn *insn, rtx set)
6568 : {
6569 206448832 : rtx src = SET_SRC (set);
6570 206448832 : rtx dest = SET_DEST (set);
6571 206448832 : machine_mode mode = GET_MODE (src);
6572 206448832 : rtx scalar;
6573 :
6574 : /* Limit matching to duplicates of the same pseudo register, or an exact
6575 : SUBREG of such a pseudo. */
6576 206448832 : if (!vec_duplicate_p (src, &scalar))
6577 206107325 : return;
6578 1053535 : if (REG_P (scalar))
6579 : {
6580 341242 : if (HARD_REGISTER_P (scalar))
6581 : return;
6582 : }
6583 712293 : else if (SUBREG_P (scalar))
6584 : {
6585 754 : if (!REG_P (SUBREG_REG (scalar))
6586 754 : || HARD_REGISTER_P (SUBREG_REG (scalar)))
6587 : return;
6588 : }
6589 : else
6590 : return;
6591 :
6592 : /* Check for matching cached vec_duplicates and save the match if found. */
6593 1274476 : for (auto &entry : data->vec_duplicate_cache)
6594 : {
6595 : /* Create a match with existing cache entry if both scalar register
6596 : pseudos are matching and the new vec_duplicate mode is wider. */
6597 248977 : if (REG_P (dest) && rtx_equal_p (entry.scalar, scalar)
6598 1467 : && known_gt (GET_MODE_SIZE (mode), GET_MODE_SIZE (entry.widest_mode))
6599 249115 : && GET_MODE_INNER (mode) == GET_MODE_INNER (entry.widest_mode))
6600 : {
6601 69 : entry.widest_mode = mode;
6602 69 : entry.widest_insn = insn;
6603 69 : entry.related_dups.safe_push (insn);
6604 69 : return;
6605 : }
6606 497816 : else if (GET_MODE_INNER (mode) == GET_MODE_INNER (entry.widest_mode)
6607 240121 : && rtx_equal_p (entry.scalar, scalar)
6608 249748 : && known_le (GET_MODE_SIZE (mode),
6609 : GET_MODE_SIZE (entry.widest_mode)))
6610 : {
6611 420 : entry.related_dups.safe_push (insn);
6612 420 : return;
6613 : }
6614 : }
6615 :
6616 : /* Cache vec_duplicate as a new entry if no match was found. */
6617 341507 : cse_vec_duplicate_match new_entry (bb, mode, scalar, insn, NULL);
6618 341507 : new_entry.related_dups.safe_push (insn);
6619 341507 : data->vec_duplicate_cache.safe_push (new_entry);
6620 341507 : }
6621 :
6622 :
6623 : /* Scan to the end of the path described by DATA. Return an estimate of
6624 : the total number of SETs of all insns in the path. Also record any
6625 : matching vec_duplicate SETs of the same scalar value for different modes. */
6626 :
6627 : static void
6628 21948444 : cse_prescan_path (struct cse_basic_block_data *data)
6629 : {
6630 21948444 : int nsets = 0;
6631 21948444 : int path_size = data->path_size;
6632 21948444 : int path_entry;
6633 :
6634 21948444 : data->vec_duplicate_matches.truncate (0);
6635 :
6636 : /* Scan to end of each basic block in the path. */
6637 81242137 : for (path_entry = 0; path_entry < path_size; path_entry++)
6638 : {
6639 37345249 : basic_block bb;
6640 37345249 : rtx_insn *insn;
6641 :
6642 37345249 : bb = data->path[path_entry].bb;
6643 37345249 : data->vec_duplicate_cache.truncate (0);
6644 :
6645 517532913 : FOR_BB_INSNS (bb, insn)
6646 : {
6647 480187664 : if (!INSN_P (insn))
6648 59659434 : continue;
6649 :
6650 420528230 : rtx pattern = PATTERN (insn);
6651 :
6652 : /* A PARALLEL can have lots of SETs in it,
6653 : especially if it is really an ASM_OPERANDS. */
6654 420528230 : if (GET_CODE (pattern) == PARALLEL)
6655 : {
6656 31728966 : int len = XVECLEN (pattern, 0);
6657 :
6658 31728966 : nsets += len;
6659 96572013 : for (int i = 0; i < len; i++)
6660 : {
6661 64843047 : rtx elt = XVECEXP (pattern, 0, i);
6662 64843047 : if (GET_CODE (elt) == SET)
6663 32668578 : cse_prescan_cache_vec_dup (data, bb, insn, elt);
6664 : }
6665 : }
6666 : else
6667 : {
6668 388799264 : if (GET_CODE (pattern) == SET)
6669 173780254 : cse_prescan_cache_vec_dup (data, bb, insn, pattern);
6670 388799264 : nsets += 1;
6671 : }
6672 : }
6673 :
6674 : /* Record any vec_duplicate matches from this basic block. */
6675 112377254 : for (auto &entry : data->vec_duplicate_cache)
6676 : {
6677 : /* If we recorded no wider vec_duplicate match then skip. */
6678 341507 : if (entry.widest_insn == NULL_RTX)
6679 341445 : continue;
6680 :
6681 62 : data->vec_duplicate_matches.safe_push (entry);
6682 : }
6683 : }
6684 :
6685 21948444 : data->nsets = nsets;
6686 21948444 : }
6687 :
6688 : /* Return true if the pattern of INSN uses a LABEL_REF for which
6689 : there isn't a REG_LABEL_OPERAND note. */
6690 :
6691 : static bool
6692 420345421 : check_for_label_ref (rtx_insn *insn)
6693 : {
6694 : /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6695 : note for it, we must rerun jump since it needs to place the note. If
6696 : this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6697 : don't do this since no REG_LABEL_OPERAND will be added. */
6698 420345421 : subrtx_iterator::array_type array;
6699 2079278197 : FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
6700 : {
6701 1658934074 : const_rtx x = *iter;
6702 1658934074 : if (GET_CODE (x) == LABEL_REF
6703 20570472 : && !LABEL_REF_NONLOCAL_P (x)
6704 20569645 : && (!JUMP_P (insn)
6705 20528172 : || !label_is_jump_target_p (label_ref_label (x), insn))
6706 41474 : && LABEL_P (label_ref_label (x))
6707 41128 : && INSN_UID (label_ref_label (x)) != 0
6708 1658975202 : && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x)))
6709 1298 : return true;
6710 : }
6711 420344123 : return false;
6712 420345421 : }
6713 :
6714 : /* Process a single extended basic block described by EBB_DATA. */
6715 :
6716 : static void
6717 21439534 : cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6718 : {
6719 21439534 : int path_size = ebb_data->path_size;
6720 21439534 : int path_entry;
6721 21439534 : int num_insns = 0;
6722 :
6723 : /* Allocate the space needed by qty_table. */
6724 21439534 : qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6725 :
6726 21439534 : new_basic_block ();
6727 21439534 : cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6728 21439534 : cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6729 58272018 : for (path_entry = 0; path_entry < path_size; path_entry++)
6730 : {
6731 36832484 : basic_block bb;
6732 36832484 : rtx_insn *insn;
6733 :
6734 36832484 : bb = ebb_data->path[path_entry].bb;
6735 :
6736 : /* Invalidate recorded information for eh regs if there is an EH
6737 : edge pointing to that bb. */
6738 36832484 : if (bb_has_eh_pred (bb))
6739 : {
6740 575299 : df_ref def;
6741 :
6742 2301196 : FOR_EACH_ARTIFICIAL_DEF (def, bb->index)
6743 1150598 : if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6744 1150598 : invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6745 : }
6746 :
6747 36832484 : optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6748 516091737 : FOR_BB_INSNS (bb, insn)
6749 : {
6750 : /* If we have processed 1,000 insns, flush the hash table to
6751 : avoid extreme quadratic behavior. We must not include NOTEs
6752 : in the count since there may be more of them when generating
6753 : debugging information. If we clear the table at different
6754 : times, code generated with -g -O might be different than code
6755 : generated with -O but not -g.
6756 :
6757 : FIXME: This is a real kludge and needs to be done some other
6758 : way. */
6759 479259253 : if (NONDEBUG_INSN_P (insn)
6760 479259253 : && num_insns++ > param_max_cse_insns)
6761 : {
6762 5802 : flush_hash_table ();
6763 5802 : num_insns = 0;
6764 : }
6765 :
6766 479259253 : if (INSN_P (insn))
6767 : {
6768 : /* Process notes first so we have all notes in canonical forms
6769 : when looking for duplicate operations. */
6770 420512124 : bool changed = false;
6771 661429773 : for (rtx note = REG_NOTES (insn); note; note = XEXP (note, 1))
6772 240917649 : if (REG_NOTE_KIND (note) == REG_EQUAL)
6773 : {
6774 9174423 : rtx newval = cse_process_note (XEXP (note, 0));
6775 9174423 : if (newval != XEXP (note, 0))
6776 : {
6777 43545 : XEXP (note, 0) = newval;
6778 43545 : changed = true;
6779 : }
6780 : }
6781 420512124 : if (changed)
6782 43545 : df_notes_rescan (insn);
6783 :
6784 420512124 : cse_insn (insn);
6785 :
6786 : /* If we haven't already found an insn where we added a LABEL_REF,
6787 : check this one. */
6788 420512124 : if (INSN_P (insn) && !recorded_label_ref
6789 840857545 : && check_for_label_ref (insn))
6790 1298 : recorded_label_ref = true;
6791 : }
6792 : }
6793 :
6794 : /* With non-call exceptions, we are not always able to update
6795 : the CFG properly inside cse_insn. So clean up possibly
6796 : redundant EH edges here. */
6797 36832484 : if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6798 999013 : cse_cfg_altered |= purge_dead_edges (bb);
6799 :
6800 : /* If we changed a conditional jump, we may have terminated
6801 : the path we are following. Check that by verifying that
6802 : the edge we would take still exists. If the edge does
6803 : not exist anymore, purge the remainder of the path.
6804 : Note that this will cause us to return to the caller. */
6805 36832484 : if (path_entry < path_size - 1)
6806 : {
6807 15395870 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6808 15395870 : if (!find_edge (bb, next_bb))
6809 : {
6810 3710 : do
6811 : {
6812 3710 : path_size--;
6813 :
6814 : /* If we truncate the path, we must also reset the
6815 : visited bit on the remaining blocks in the path,
6816 : or we will never visit them at all. */
6817 3710 : bitmap_clear_bit (cse_visited_basic_blocks,
6818 3710 : ebb_data->path[path_size].bb->index);
6819 3710 : ebb_data->path[path_size].bb = NULL;
6820 : }
6821 3710 : while (path_size - 1 != path_entry);
6822 2920 : ebb_data->path_size = path_size;
6823 : }
6824 : }
6825 :
6826 : /* If this is a conditional jump insn, record any known
6827 : equivalences due to the condition being tested. */
6828 36832484 : insn = BB_END (bb);
6829 36832484 : if (path_entry < path_size - 1
6830 51857861 : && EDGE_COUNT (bb->succs) == 2
6831 15025377 : && JUMP_P (insn)
6832 15025377 : && single_set (insn)
6833 15025377 : && any_condjump_p (insn)
6834 : /* single_set may return non-NULL even for multiple sets
6835 : if there are REG_UNUSED notes. record_jump_equiv only
6836 : looks at pc_set and doesn't consider other sets that
6837 : could affect the value, and the recorded equivalence
6838 : can extend the lifetime of the compared REG, so use
6839 : also !multiple_sets check to verify it is exactly one
6840 : set. */
6841 51857861 : && !multiple_sets (insn))
6842 : {
6843 15025377 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6844 15025377 : bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6845 15025377 : record_jump_equiv (insn, taken);
6846 : }
6847 : }
6848 :
6849 21439534 : gcc_assert (next_qty <= max_qty);
6850 :
6851 21439534 : free (qty_table);
6852 21439534 : }
6853 :
6854 :
6855 : /* Perform cse on the instructions of a function.
6856 : F is the first instruction.
6857 : NREGS is one plus the highest pseudo-reg number used in the instruction.
6858 :
6859 : Return 2 if jump optimizations should be redone due to simplifications
6860 : in conditional jump instructions.
6861 : Return 1 if the CFG should be cleaned up because it has been modified.
6862 : Return 0 otherwise. */
6863 :
6864 : static int
6865 2357654 : cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
6866 : {
6867 2357654 : struct cse_basic_block_data ebb_data;
6868 2357654 : basic_block bb;
6869 2357654 : int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
6870 2357654 : int i, n_blocks;
6871 :
6872 : /* CSE doesn't use dominane info but can invalidate it in different ways.
6873 : For simplicity free dominance info here. */
6874 2357654 : free_dominance_info (CDI_DOMINATORS);
6875 :
6876 2357654 : df_set_flags (DF_LR_RUN_DCE);
6877 2357654 : df_note_add_problem ();
6878 2357654 : df_analyze ();
6879 2357654 : df_set_flags (DF_DEFER_INSN_RESCAN);
6880 :
6881 2357654 : reg_scan (get_insns (), max_reg_num ());
6882 2357654 : init_cse_reg_info (nregs);
6883 :
6884 2357654 : ebb_data.path = XNEWVEC (struct branch_path,
6885 : param_max_cse_path_length);
6886 :
6887 2357654 : cse_cfg_altered = false;
6888 2357654 : cse_jumps_altered = false;
6889 2357654 : recorded_label_ref = false;
6890 2357654 : ebb_data.path_size = 0;
6891 2357654 : ebb_data.nsets = 0;
6892 2357654 : rtl_hooks = cse_rtl_hooks;
6893 :
6894 2357654 : init_recog ();
6895 2357654 : init_alias_analysis ();
6896 :
6897 2357654 : reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6898 :
6899 : /* Set up the table of already visited basic blocks. */
6900 2357654 : cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
6901 2357654 : bitmap_clear (cse_visited_basic_blocks);
6902 :
6903 : /* Loop over basic blocks in reverse completion order (RPO),
6904 : excluding the ENTRY and EXIT blocks. */
6905 2357654 : n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6906 2357654 : i = 0;
6907 23596388 : while (i < n_blocks)
6908 : {
6909 : /* Find the first block in the RPO queue that we have not yet
6910 : processed before. */
6911 30251660 : do
6912 : {
6913 30251660 : bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]);
6914 : }
6915 30251660 : while (bitmap_bit_p (cse_visited_basic_blocks, bb->index)
6916 49132740 : && i < n_blocks);
6917 :
6918 : /* Find all paths starting with BB, and process them. */
6919 40829524 : while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6920 : {
6921 : /* Pre-scan the path. */
6922 21948444 : cse_prescan_path (&ebb_data);
6923 :
6924 : /* If this basic block has no sets, skip it. */
6925 21948444 : if (ebb_data.nsets == 0)
6926 508910 : continue;
6927 :
6928 : /* If prescan discovers any vec_duplicate pairs where a wider duplicate
6929 : appears after a narrow duplicate of the same scalar, move the
6930 : widest duplicate before the first vec_duplicate of this scalar and
6931 : rewrite all related duplicates to reuse it. */
6932 64318664 : for (auto &match : ebb_data.vec_duplicate_matches)
6933 : {
6934 62 : rtx wide_set = single_set (match.widest_insn);
6935 62 : if (!wide_set)
6936 0 : continue;
6937 62 : rtx wide_reg = SET_DEST (wide_set);
6938 62 : rtx_insn *insert_after = PREV_INSN (match.first_insn);
6939 62 : if (!REG_P (wide_reg) || !insert_after)
6940 0 : continue;
6941 :
6942 : /* Safety check that WIDE_REG is not otherwise used or redefined
6943 : before its original defining insn. */
6944 62 : if (reg_used_between_p (wide_reg, match.first_insn,
6945 62 : match.widest_insn)
6946 124 : || reg_set_between_p (wide_reg, match.first_insn,
6947 62 : match.widest_insn))
6948 0 : continue;
6949 :
6950 : /* Rewrite all related duplicates as a group so we either keep the
6951 : whole transformation or none of it. */
6952 62 : int prev_changes = num_changes_pending ();
6953 62 : bool abort_changes = false;
6954 :
6955 319 : for (auto &dup_insn : match.related_dups)
6956 : {
6957 133 : rtx dup_set;
6958 133 : rtx dup_src;
6959 133 : machine_mode dup_mode;
6960 :
6961 133 : if (dup_insn == match.widest_insn)
6962 62 : continue;
6963 :
6964 : /* The earlier safety check already covered the range from
6965 : FIRST_INSN up to WIDEST_INSN. Only check the remaining
6966 : suffix for duplicates that come later in the block. This
6967 : also covers call-clobbered hard registers via
6968 : reg_set_between_p. */
6969 71 : bool reg_set = false;
6970 71 : bool reg_set_with_widest_after = false;
6971 735 : for (rtx_insn *scan = NEXT_INSN (match.widest_insn);
6972 735 : scan != NEXT_INSN (BB_END (match.bb)) && scan != NULL_RTX;
6973 664 : scan = NEXT_INSN (scan))
6974 : {
6975 666 : if (scan == dup_insn)
6976 : {
6977 : reg_set_with_widest_after = reg_set;
6978 : break;
6979 : }
6980 664 : if (!reg_set && INSN_P (scan) && reg_set_p (wide_reg, scan))
6981 : reg_set = true;
6982 : }
6983 :
6984 71 : if (reg_set_with_widest_after)
6985 0 : continue;
6986 :
6987 71 : dup_set = single_set (dup_insn);
6988 71 : if (!dup_set)
6989 : {
6990 : abort_changes = true;
6991 : break;
6992 : }
6993 :
6994 71 : dup_mode = GET_MODE (SET_DEST (dup_set));
6995 71 : if (dup_mode == GET_MODE (wide_reg))
6996 : dup_src = wide_reg;
6997 : else
6998 : {
6999 71 : dup_src = gen_lowpart (dup_mode, wide_reg);
7000 71 : if (!dup_src)
7001 : {
7002 : abort_changes = true;
7003 : break;
7004 : }
7005 : }
7006 :
7007 71 : if (rtx_equal_p (dup_src, SET_DEST (dup_set)))
7008 0 : continue;
7009 :
7010 71 : if (!validate_change (dup_insn, &SET_SRC (dup_set), dup_src, 1))
7011 : {
7012 : abort_changes = true;
7013 : break;
7014 : }
7015 : }
7016 :
7017 62 : if (abort_changes)
7018 : {
7019 0 : cancel_changes (prev_changes);
7020 0 : continue;
7021 : }
7022 :
7023 62 : if (num_changes_pending () == prev_changes)
7024 0 : continue;
7025 :
7026 62 : if (!apply_change_group ())
7027 0 : continue;
7028 :
7029 62 : reorder_insns (match.widest_insn, match.widest_insn, insert_after);
7030 :
7031 62 : if (match.related_dups.contains (match.widest_insn))
7032 62 : df_insn_rescan (match.widest_insn);
7033 : }
7034 :
7035 : /* Get a reasonable estimate for the maximum number of qty's
7036 : needed for this path. For this, we take the number of sets
7037 : and multiply that by MAX_RECOG_OPERANDS. */
7038 21439534 : max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
7039 :
7040 : /* Dump the path we're about to process. */
7041 21439534 : if (dump_file)
7042 317 : cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
7043 :
7044 21439534 : cse_extended_basic_block (&ebb_data);
7045 : }
7046 : }
7047 :
7048 : /* Clean up. */
7049 2357654 : end_alias_analysis ();
7050 2357654 : free (reg_eqv_table);
7051 2357654 : free (ebb_data.path);
7052 2357654 : sbitmap_free (cse_visited_basic_blocks);
7053 2357654 : free (rc_order);
7054 2357654 : rtl_hooks = general_rtl_hooks;
7055 :
7056 2357654 : if (cse_jumps_altered || recorded_label_ref)
7057 : return 2;
7058 2349590 : else if (cse_cfg_altered)
7059 : return 1;
7060 : else
7061 2339910 : return 0;
7062 2357654 : }
7063 :
7064 : /* Count the number of times registers are used (not set) in X.
7065 : COUNTS is an array in which we accumulate the count, INCR is how much
7066 : we count each register usage.
7067 :
7068 : Don't count a usage of DEST, which is the SET_DEST of a SET which
7069 : contains X in its SET_SRC. This is because such a SET does not
7070 : modify the liveness of DEST.
7071 : DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
7072 : We must then count uses of a SET_DEST regardless, because the insn can't be
7073 : deleted here.
7074 : Also count uses of a SET_DEST if it has been used by an earlier insn,
7075 : but in that case only when incrementing and not when decrementing, effectively
7076 : making setters of such a pseudo non-eliminable. This is for cases like
7077 : (set (reg x) (expr))
7078 : ...
7079 : (set (reg y) (expr (reg (x))))
7080 : ...
7081 : (set (reg x) (expr (reg (x))))
7082 : where we can't eliminate the last insn because x is is still used, if y
7083 : is unused we can eliminate the middle insn and when considering the first insn
7084 : we used to eliminate it despite it being used in the last insn. */
7085 :
7086 : static void
7087 2522649758 : count_reg_usage (rtx x, int *counts, rtx dest, int incr)
7088 : {
7089 3011976705 : enum rtx_code code;
7090 3011976705 : rtx note;
7091 3011976705 : const char *fmt;
7092 3011976705 : int i, j;
7093 :
7094 3011976705 : if (x == 0)
7095 : return;
7096 :
7097 2981335935 : switch (code = GET_CODE (x))
7098 : {
7099 565481277 : case REG:
7100 565481277 : if (x != dest || (incr > 0 && counts[REGNO (x)]))
7101 561611528 : counts[REGNO (x)] += incr;
7102 : return;
7103 :
7104 : case PC:
7105 : case CONST:
7106 : CASE_CONST_ANY:
7107 : case SYMBOL_REF:
7108 : case LABEL_REF:
7109 : return;
7110 :
7111 177225796 : case CLOBBER:
7112 : /* If we are clobbering a MEM, mark any registers inside the address
7113 : as being used. */
7114 177225796 : if (MEM_P (XEXP (x, 0)))
7115 217537 : count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7116 : return;
7117 :
7118 404236992 : case SET:
7119 : /* Unless we are setting a REG, count everything in SET_DEST. */
7120 404236992 : if (!REG_P (SET_DEST (x)))
7121 97981857 : count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7122 404236992 : count_reg_usage (SET_SRC (x), counts,
7123 : dest ? dest : SET_DEST (x),
7124 : incr);
7125 404236992 : return;
7126 :
7127 : case DEBUG_INSN:
7128 : return;
7129 :
7130 425385750 : case CALL_INSN:
7131 425385750 : case INSN:
7132 425385750 : case JUMP_INSN:
7133 : /* We expect dest to be NULL_RTX here. If the insn may throw,
7134 : or if it cannot be deleted due to side-effects, mark this fact
7135 : by setting DEST to pc_rtx. */
7136 163222963 : if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x))
7137 570471427 : || side_effects_p (PATTERN (x)))
7138 55618325 : dest = pc_rtx;
7139 425385750 : if (code == CALL_INSN)
7140 30640770 : count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
7141 425385750 : count_reg_usage (PATTERN (x), counts, dest, incr);
7142 :
7143 : /* Things used in a REG_EQUAL note aren't dead since loop may try to
7144 : use them. */
7145 :
7146 425385750 : note = find_reg_equal_equiv_note (x);
7147 425385750 : if (note)
7148 : {
7149 23178202 : rtx eqv = XEXP (note, 0);
7150 :
7151 23178202 : if (GET_CODE (eqv) == EXPR_LIST)
7152 : /* This REG_EQUAL note describes the result of a function call.
7153 : Process all the arguments. */
7154 0 : do
7155 : {
7156 0 : count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
7157 0 : eqv = XEXP (eqv, 1);
7158 : }
7159 0 : while (eqv && GET_CODE (eqv) == EXPR_LIST);
7160 : else
7161 : count_reg_usage (eqv, counts, dest, incr);
7162 : }
7163 : return;
7164 :
7165 61694216 : case EXPR_LIST:
7166 61694216 : if (REG_NOTE_KIND (x) == REG_EQUAL
7167 61694216 : || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7168 : /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7169 : involving registers in the address. */
7170 691771 : || GET_CODE (XEXP (x, 0)) == CLOBBER)
7171 61002445 : count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7172 :
7173 61694216 : count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7174 61694216 : return;
7175 :
7176 673163 : case ASM_OPERANDS:
7177 : /* Iterate over just the inputs, not the constraints as well. */
7178 1354490 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7179 681327 : count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
7180 : return;
7181 :
7182 0 : case INSN_LIST:
7183 0 : case INT_LIST:
7184 0 : gcc_unreachable ();
7185 :
7186 749688828 : default:
7187 749688828 : break;
7188 : }
7189 :
7190 749688828 : fmt = GET_RTX_FORMAT (code);
7191 2075629772 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7192 : {
7193 1325940944 : if (fmt[i] == 'e')
7194 1008881570 : count_reg_usage (XEXP (x, i), counts, dest, incr);
7195 317059374 : else if (fmt[i] == 'E')
7196 210113174 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7197 140765972 : count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7198 : }
7199 : }
7200 :
7201 : /* Return true if X is a dead register. */
7202 :
7203 : static inline bool
7204 841606241 : is_dead_reg (const_rtx x, int *counts)
7205 : {
7206 841606241 : return (REG_P (x)
7207 360168247 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
7208 223896898 : && counts[REGNO (x)] == 0);
7209 : }
7210 :
7211 : /* Return true if set is live. */
7212 : static bool
7213 381808660 : set_live_p (rtx set, int *counts)
7214 : {
7215 381808660 : if (set_noop_p (set))
7216 : return false;
7217 :
7218 381787077 : if (!is_dead_reg (SET_DEST (set), counts)
7219 8964129 : || side_effects_p (SET_SRC (set)))
7220 372887999 : return true;
7221 :
7222 : return false;
7223 : }
7224 :
7225 : /* Return true if insn is live. */
7226 :
7227 : static bool
7228 748218020 : insn_live_p (rtx_insn *insn, int *counts)
7229 : {
7230 748218020 : int i;
7231 748218020 : if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
7232 : return true;
7233 729764848 : else if (GET_CODE (PATTERN (insn)) == SET)
7234 321905447 : return set_live_p (PATTERN (insn), counts);
7235 407859401 : else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7236 : {
7237 121208792 : for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7238 : {
7239 120688219 : rtx elt = XVECEXP (PATTERN (insn), 0, i);
7240 :
7241 120688219 : if (GET_CODE (elt) == SET)
7242 : {
7243 59903213 : if (set_live_p (elt, counts))
7244 : return true;
7245 : }
7246 60785006 : else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7247 : return true;
7248 : }
7249 : return false;
7250 : }
7251 347918704 : else if (DEBUG_INSN_P (insn))
7252 : {
7253 331138934 : if (DEBUG_MARKER_INSN_P (insn))
7254 : return true;
7255 :
7256 256613804 : if (DEBUG_BIND_INSN_P (insn)
7257 256613804 : && TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
7258 451519 : return false;
7259 :
7260 : return true;
7261 : }
7262 : else
7263 : return true;
7264 : }
7265 :
7266 : /* Count the number of stores into pseudo. Callback for note_stores. */
7267 :
7268 : static void
7269 264340040 : count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
7270 : {
7271 264340040 : int *counts = (int *) data;
7272 264340040 : if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
7273 98957738 : counts[REGNO (x)]++;
7274 264340040 : }
7275 :
7276 : /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
7277 : pseudo doesn't have a replacement. COUNTS[X] is zero if register X
7278 : is dead and REPLACEMENTS[X] is null if it has no replacement.
7279 : Set *SEEN_REPL to true if we see a dead register that does have
7280 : a replacement. */
7281 :
7282 : static bool
7283 256496149 : is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements,
7284 : bool *seen_repl)
7285 : {
7286 256496149 : subrtx_iterator::array_type array;
7287 712017791 : FOR_EACH_SUBRTX (iter, array, pat, NONCONST)
7288 : {
7289 455545245 : const_rtx x = *iter;
7290 525247004 : if (is_dead_reg (x, counts))
7291 : {
7292 49716 : if (replacements && replacements[REGNO (x)] != NULL_RTX)
7293 26113 : *seen_repl = true;
7294 : else
7295 23603 : return true;
7296 : }
7297 : }
7298 256472546 : return false;
7299 256496149 : }
7300 :
7301 : /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
7302 : Callback for simplify_replace_fn_rtx. */
7303 :
7304 : static rtx
7305 41591 : replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
7306 : {
7307 41591 : rtx *replacements = (rtx *) data;
7308 :
7309 41591 : if (REG_P (x)
7310 27165 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
7311 68717 : && replacements[REGNO (x)] != NULL_RTX)
7312 : {
7313 26113 : if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
7314 : return replacements[REGNO (x)];
7315 0 : return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
7316 0 : GET_MODE (replacements[REGNO (x)]));
7317 : }
7318 : return NULL_RTX;
7319 : }
7320 :
7321 : /* Scan all the insns and delete any that are dead; i.e., they store a register
7322 : that is never used or they copy a register to itself.
7323 :
7324 : This is used to remove insns made obviously dead by cse, loop or other
7325 : optimizations. It improves the heuristics in loop since it won't try to
7326 : move dead invariants out of loops or make givs for dead quantities. The
7327 : remaining passes of the compilation are also sped up. */
7328 :
7329 : int
7330 6507157 : delete_trivially_dead_insns (rtx_insn *insns, int nreg)
7331 : {
7332 6507157 : int *counts;
7333 6507157 : rtx_insn *insn, *prev;
7334 6507157 : rtx *replacements = NULL;
7335 6507157 : int ndead = 0;
7336 :
7337 6507157 : timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7338 : /* First count the number of times each register is used. */
7339 6507157 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7340 : {
7341 2741940 : counts = XCNEWVEC (int, nreg * 3);
7342 653439280 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7343 647955400 : if (DEBUG_BIND_INSN_P (insn))
7344 : {
7345 256929690 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7346 : NULL_RTX, 1);
7347 256929690 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 0;
7348 : }
7349 391025710 : else if (INSN_P (insn))
7350 : {
7351 315363854 : count_reg_usage (insn, counts, NULL_RTX, 1);
7352 315363854 : note_stores (insn, count_stores, counts + nreg * 2);
7353 : }
7354 : /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7355 : First one counts how many times each pseudo is used outside
7356 : of debug insns, second counts how many times each pseudo is
7357 : used in debug insns and third counts how many times a pseudo
7358 : is stored. */
7359 : }
7360 : else
7361 : {
7362 3765217 : counts = XCNEWVEC (int, nreg);
7363 231286859 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7364 223756425 : if (INSN_P (insn))
7365 175924476 : count_reg_usage (insn, counts, NULL_RTX, 1);
7366 : /* If no debug insns can be present, COUNTS is just an array
7367 : which counts how many times each pseudo is used. */
7368 : }
7369 : /* Pseudo PIC register should be considered as used due to possible
7370 : new usages generated. */
7371 6507157 : if (!reload_completed
7372 6507157 : && pic_offset_table_rtx
7373 6726078 : && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
7374 218921 : counts[REGNO (pic_offset_table_rtx)]++;
7375 : /* Go from the last insn to the first and delete insns that only set unused
7376 : registers or copy a register to itself. As we delete an insn, remove
7377 : usage counts for registers it uses.
7378 :
7379 : The first jump optimization pass may leave a real insn as the last
7380 : insn in the function. We must not skip that insn or we may end
7381 : up deleting code that is not really dead.
7382 :
7383 : If some otherwise unused register is only used in DEBUG_INSNs,
7384 : try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7385 : the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7386 : has been created for the unused register, replace it with
7387 : the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7388 6507157 : auto_vec<tree, 32> later_debug_set_vars;
7389 878218982 : for (insn = get_last_insn (); insn; insn = prev)
7390 : {
7391 871711825 : int live_insn = 0;
7392 :
7393 871711825 : prev = PREV_INSN (insn);
7394 871711825 : if (!INSN_P (insn))
7395 123493805 : continue;
7396 :
7397 748218020 : live_insn = insn_live_p (insn, counts);
7398 :
7399 : /* If this is a dead insn, delete it and show registers in it aren't
7400 : being used. */
7401 :
7402 748218020 : if (! live_insn && dbg_cnt (delete_trivial_dead))
7403 : {
7404 9074069 : if (DEBUG_INSN_P (insn))
7405 : {
7406 451519 : if (DEBUG_BIND_INSN_P (insn))
7407 451519 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7408 : NULL_RTX, -1);
7409 : }
7410 : else
7411 : {
7412 8622550 : rtx set;
7413 8622550 : if (MAY_HAVE_DEBUG_BIND_INSNS
7414 4273919 : && (set = single_set (insn)) != NULL_RTX
7415 4273919 : && is_dead_reg (SET_DEST (set), counts)
7416 : /* Used at least once in some DEBUG_INSN. */
7417 4268026 : && counts[REGNO (SET_DEST (set)) + nreg] > 0
7418 : /* And set exactly once. */
7419 18775 : && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
7420 17979 : && !side_effects_p (SET_SRC (set))
7421 8640529 : && asm_noperands (PATTERN (insn)) < 0)
7422 : {
7423 17978 : rtx dval, bind_var_loc;
7424 17978 : rtx_insn *bind;
7425 :
7426 : /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7427 17978 : dval = make_debug_expr_from_rtl (SET_DEST (set));
7428 :
7429 : /* Emit a debug bind insn before the insn in which
7430 : reg dies. */
7431 17978 : bind_var_loc =
7432 17978 : gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
7433 : DEBUG_EXPR_TREE_DECL (dval),
7434 : SET_SRC (set),
7435 : VAR_INIT_STATUS_INITIALIZED);
7436 17978 : count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
7437 :
7438 17978 : bind = emit_debug_insn_before (bind_var_loc, insn);
7439 17978 : df_insn_rescan (bind);
7440 :
7441 17978 : if (replacements == NULL)
7442 9569 : replacements = XCNEWVEC (rtx, nreg);
7443 17978 : replacements[REGNO (SET_DEST (set))] = dval;
7444 : }
7445 :
7446 8622550 : count_reg_usage (insn, counts, NULL_RTX, -1);
7447 8622550 : ndead++;
7448 : }
7449 9074069 : cse_cfg_altered |= delete_insn_and_edges (insn);
7450 : }
7451 : else
7452 : {
7453 739143951 : if (!DEBUG_INSN_P (insn) || DEBUG_MARKER_INSN_P (insn))
7454 : {
7455 1704171419 : for (tree var : later_debug_set_vars)
7456 256174079 : TREE_VISITED (var) = 0;
7457 482665780 : later_debug_set_vars.truncate (0);
7458 : }
7459 256478171 : else if (DEBUG_BIND_INSN_P (insn)
7460 256478171 : && !TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
7461 : {
7462 256472155 : later_debug_set_vars.safe_push (INSN_VAR_LOCATION_DECL (insn));
7463 256472155 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 1;
7464 : }
7465 : }
7466 : }
7467 :
7468 6507157 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7469 : {
7470 645989880 : for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
7471 643247940 : if (DEBUG_BIND_INSN_P (insn))
7472 : {
7473 : /* If this debug insn references a dead register that wasn't replaced
7474 : with an DEBUG_EXPR, reset the DEBUG_INSN. */
7475 256496149 : bool seen_repl = false;
7476 256496149 : if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn),
7477 : counts, replacements, &seen_repl))
7478 : {
7479 23603 : INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
7480 23603 : df_insn_rescan (insn);
7481 : }
7482 256472546 : else if (seen_repl)
7483 : {
7484 26094 : INSN_VAR_LOCATION_LOC (insn)
7485 26094 : = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
7486 : NULL_RTX, replace_dead_reg,
7487 : replacements);
7488 26094 : df_insn_rescan (insn);
7489 : }
7490 : }
7491 2741940 : free (replacements);
7492 : }
7493 :
7494 6507157 : if (dump_file && ndead)
7495 26 : fprintf (dump_file, "Deleted %i trivially dead insns\n",
7496 : ndead);
7497 : /* Clean up. */
7498 6507157 : free (counts);
7499 6507157 : timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7500 6507157 : return ndead;
7501 6507157 : }
7502 :
7503 : /* If LOC contains references to NEWREG in a different mode, change them
7504 : to use NEWREG instead. */
7505 :
7506 : static void
7507 59774 : cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
7508 : rtx *loc, rtx_insn *insn, rtx newreg)
7509 : {
7510 369743 : FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
7511 : {
7512 309969 : rtx *loc = *iter;
7513 309969 : rtx x = *loc;
7514 309969 : if (x
7515 280082 : && REG_P (x)
7516 69199 : && REGNO (x) == REGNO (newreg)
7517 360953 : && GET_MODE (x) != GET_MODE (newreg))
7518 : {
7519 50984 : validate_change (insn, loc, newreg, 1);
7520 50984 : iter.skip_subrtxes ();
7521 : }
7522 : }
7523 59774 : }
7524 :
7525 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7526 : GET_MODE (NEWREG) in INSN. */
7527 :
7528 : static void
7529 29887 : cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
7530 : {
7531 29887 : int success;
7532 :
7533 29887 : if (!INSN_P (insn))
7534 0 : return;
7535 :
7536 29887 : subrtx_ptr_iterator::array_type array;
7537 29887 : cse_change_cc_mode (array, &PATTERN (insn), insn, newreg);
7538 29887 : cse_change_cc_mode (array, ®_NOTES (insn), insn, newreg);
7539 :
7540 : /* If the following assertion was triggered, there is most probably
7541 : something wrong with the cc_modes_compatible back end function.
7542 : CC modes only can be considered compatible if the insn - with the mode
7543 : replaced by any of the compatible modes - can still be recognized. */
7544 29887 : success = apply_change_group ();
7545 29887 : gcc_assert (success);
7546 29887 : }
7547 :
7548 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7549 : GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7550 : any instruction which modifies NEWREG. */
7551 :
7552 : static void
7553 20219 : cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
7554 : {
7555 20219 : rtx_insn *insn;
7556 :
7557 40815 : for (insn = start; insn != end; insn = NEXT_INSN (insn))
7558 : {
7559 22096 : if (! INSN_P (insn))
7560 0 : continue;
7561 :
7562 22096 : if (reg_set_p (newreg, insn))
7563 : return;
7564 :
7565 20596 : cse_change_cc_mode_insn (insn, newreg);
7566 : }
7567 : }
7568 :
7569 : /* BB is a basic block which finishes with CC_REG as a condition code
7570 : register which is set to CC_SRC. Look through the successors of BB
7571 : to find blocks which have a single predecessor (i.e., this one),
7572 : and look through those blocks for an assignment to CC_REG which is
7573 : equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7574 : permitted to change the mode of CC_SRC to a compatible mode. This
7575 : returns VOIDmode if no equivalent assignments were found.
7576 : Otherwise it returns the mode which CC_SRC should wind up with.
7577 : ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7578 : but is passed unmodified down to recursive calls in order to prevent
7579 : endless recursion.
7580 :
7581 : The main complexity in this function is handling the mode issues.
7582 : We may have more than one duplicate which we can eliminate, and we
7583 : try to find a mode which will work for multiple duplicates. */
7584 :
7585 : static machine_mode
7586 5702888 : cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7587 : bool can_change_mode)
7588 : {
7589 5702888 : bool found_equiv;
7590 5702888 : machine_mode mode;
7591 5702888 : unsigned int insn_count;
7592 5702888 : edge e;
7593 5702888 : rtx_insn *insns[2];
7594 5702888 : machine_mode modes[2];
7595 5702888 : rtx_insn *last_insns[2];
7596 5702888 : unsigned int i;
7597 5702888 : rtx newreg;
7598 5702888 : edge_iterator ei;
7599 :
7600 : /* We expect to have two successors. Look at both before picking
7601 : the final mode for the comparison. If we have more successors
7602 : (i.e., some sort of table jump, although that seems unlikely),
7603 : then we require all beyond the first two to use the same
7604 : mode. */
7605 :
7606 5702888 : found_equiv = false;
7607 5702888 : mode = GET_MODE (cc_src);
7608 5702888 : insn_count = 0;
7609 16146802 : FOR_EACH_EDGE (e, ei, bb->succs)
7610 : {
7611 10443914 : rtx_insn *insn;
7612 10443914 : rtx_insn *end;
7613 :
7614 10443914 : if (e->flags & EDGE_COMPLEX)
7615 32683 : continue;
7616 :
7617 10411231 : if (EDGE_COUNT (e->dest->preds) != 1
7618 5812969 : || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
7619 : /* Avoid endless recursion on unreachable blocks. */
7620 16126020 : || e->dest == orig_bb)
7621 4696442 : continue;
7622 :
7623 5714789 : end = NEXT_INSN (BB_END (e->dest));
7624 37130484 : for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7625 : {
7626 35962462 : rtx set;
7627 :
7628 35962462 : if (! INSN_P (insn))
7629 7750849 : continue;
7630 :
7631 : /* If CC_SRC is modified, we have to stop looking for
7632 : something which uses it. */
7633 28211613 : if (modified_in_p (cc_src, insn))
7634 : break;
7635 :
7636 : /* Check whether INSN sets CC_REG to CC_SRC. */
7637 27718613 : set = single_set (insn);
7638 27718613 : if (set
7639 11623661 : && REG_P (SET_DEST (set))
7640 37869615 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7641 : {
7642 1420634 : bool found;
7643 1420634 : machine_mode set_mode;
7644 1420634 : machine_mode comp_mode;
7645 :
7646 1420634 : found = false;
7647 1420634 : set_mode = GET_MODE (SET_SRC (set));
7648 1420634 : comp_mode = set_mode;
7649 1420634 : if (rtx_equal_p (cc_src, SET_SRC (set)))
7650 : found = true;
7651 1414542 : else if (GET_CODE (cc_src) == COMPARE
7652 1345755 : && GET_CODE (SET_SRC (set)) == COMPARE
7653 1295102 : && mode != set_mode
7654 356593 : && rtx_equal_p (XEXP (cc_src, 0),
7655 356593 : XEXP (SET_SRC (set), 0))
7656 1478401 : && rtx_equal_p (XEXP (cc_src, 1),
7657 63859 : XEXP (SET_SRC (set), 1)))
7658 :
7659 : {
7660 20223 : comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7661 20223 : if (comp_mode != VOIDmode
7662 20223 : && (can_change_mode || comp_mode == mode))
7663 : found = true;
7664 : }
7665 :
7666 26311 : if (found)
7667 : {
7668 26311 : found_equiv = true;
7669 26311 : if (insn_count < ARRAY_SIZE (insns))
7670 : {
7671 26311 : insns[insn_count] = insn;
7672 26311 : modes[insn_count] = set_mode;
7673 26311 : last_insns[insn_count] = end;
7674 26311 : ++insn_count;
7675 :
7676 26311 : if (mode != comp_mode)
7677 : {
7678 9291 : gcc_assert (can_change_mode);
7679 9291 : mode = comp_mode;
7680 :
7681 : /* The modified insn will be re-recognized later. */
7682 9291 : PUT_MODE (cc_src, mode);
7683 : }
7684 : }
7685 : else
7686 : {
7687 0 : if (set_mode != mode)
7688 : {
7689 : /* We found a matching expression in the
7690 : wrong mode, but we don't have room to
7691 : store it in the array. Punt. This case
7692 : should be rare. */
7693 : break;
7694 : }
7695 : /* INSN sets CC_REG to a value equal to CC_SRC
7696 : with the right mode. We can simply delete
7697 : it. */
7698 0 : delete_insn (insn);
7699 : }
7700 :
7701 : /* We found an instruction to delete. Keep looking,
7702 : in the hopes of finding a three-way jump. */
7703 26311 : continue;
7704 : }
7705 :
7706 : /* We found an instruction which sets the condition
7707 : code, so don't look any farther. */
7708 : break;
7709 : }
7710 :
7711 : /* If INSN sets CC_REG in some other way, don't look any
7712 : farther. */
7713 26297979 : if (reg_set_p (cc_reg, insn))
7714 : break;
7715 : }
7716 :
7717 : /* If we fell off the bottom of the block, we can keep looking
7718 : through successors. We pass CAN_CHANGE_MODE as false because
7719 : we aren't prepared to handle compatibility between the
7720 : further blocks and this block. */
7721 5714789 : if (insn == end)
7722 : {
7723 1168022 : machine_mode submode;
7724 :
7725 1168022 : submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7726 1168022 : if (submode != VOIDmode)
7727 : {
7728 52 : gcc_assert (submode == mode);
7729 : found_equiv = true;
7730 : can_change_mode = false;
7731 : }
7732 : }
7733 : }
7734 :
7735 5702888 : if (! found_equiv)
7736 : return VOIDmode;
7737 :
7738 : /* Now INSN_COUNT is the number of instructions we found which set
7739 : CC_REG to a value equivalent to CC_SRC. The instructions are in
7740 : INSNS. The modes used by those instructions are in MODES. */
7741 :
7742 : newreg = NULL_RTX;
7743 52667 : for (i = 0; i < insn_count; ++i)
7744 : {
7745 26311 : if (modes[i] != mode)
7746 : {
7747 : /* We need to change the mode of CC_REG in INSNS[i] and
7748 : subsequent instructions. */
7749 10928 : if (! newreg)
7750 : {
7751 10928 : if (GET_MODE (cc_reg) == mode)
7752 : newreg = cc_reg;
7753 : else
7754 7853 : newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7755 : }
7756 10928 : cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7757 : newreg);
7758 : }
7759 :
7760 26311 : cse_cfg_altered |= delete_insn_and_edges (insns[i]);
7761 : }
7762 :
7763 : return mode;
7764 : }
7765 :
7766 : /* If we have a fixed condition code register (or two), walk through
7767 : the instructions and try to eliminate duplicate assignments. */
7768 :
7769 : static void
7770 988534 : cse_condition_code_reg (void)
7771 : {
7772 988534 : unsigned int cc_regno_1;
7773 988534 : unsigned int cc_regno_2;
7774 988534 : rtx cc_reg_1;
7775 988534 : rtx cc_reg_2;
7776 988534 : basic_block bb;
7777 :
7778 988534 : if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7779 0 : return;
7780 :
7781 988534 : cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7782 988534 : if (cc_regno_2 != INVALID_REGNUM)
7783 0 : cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7784 : else
7785 : cc_reg_2 = NULL_RTX;
7786 :
7787 11143383 : FOR_EACH_BB_FN (bb, cfun)
7788 : {
7789 10154849 : rtx_insn *last_insn;
7790 10154849 : rtx cc_reg;
7791 10154849 : rtx_insn *insn;
7792 10154849 : rtx_insn *cc_src_insn;
7793 10154849 : rtx cc_src;
7794 10154849 : machine_mode mode;
7795 10154849 : machine_mode orig_mode;
7796 :
7797 : /* Look for blocks which end with a conditional jump based on a
7798 : condition code register. Then look for the instruction which
7799 : sets the condition code register. Then look through the
7800 : successor blocks for instructions which set the condition
7801 : code register to the same value. There are other possible
7802 : uses of the condition code register, but these are by far the
7803 : most common and the ones which we are most likely to be able
7804 : to optimize. */
7805 :
7806 10154849 : last_insn = BB_END (bb);
7807 10154849 : if (!JUMP_P (last_insn))
7808 5468769 : continue;
7809 :
7810 4686080 : if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7811 : cc_reg = cc_reg_1;
7812 14586 : else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7813 : cc_reg = cc_reg_2;
7814 : else
7815 14586 : continue;
7816 :
7817 4671494 : cc_src_insn = NULL;
7818 4671494 : cc_src = NULL_RTX;
7819 4852059 : for (insn = PREV_INSN (last_insn);
7820 4852059 : insn && insn != PREV_INSN (BB_HEAD (bb));
7821 180565 : insn = PREV_INSN (insn))
7822 : {
7823 4732436 : rtx set;
7824 :
7825 4732436 : if (! INSN_P (insn))
7826 128501 : continue;
7827 4603935 : set = single_set (insn);
7828 4603935 : if (set
7829 4542555 : && REG_P (SET_DEST (set))
7830 9145574 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7831 : {
7832 4534880 : cc_src_insn = insn;
7833 4534880 : cc_src = SET_SRC (set);
7834 4534880 : break;
7835 : }
7836 69055 : else if (reg_set_p (cc_reg, insn))
7837 : break;
7838 : }
7839 :
7840 4671494 : if (! cc_src_insn)
7841 136614 : continue;
7842 :
7843 4534880 : if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7844 14 : continue;
7845 :
7846 : /* Now CC_REG is a condition code register used for a
7847 : conditional jump at the end of the block, and CC_SRC, in
7848 : CC_SRC_INSN, is the value to which that condition code
7849 : register is set, and CC_SRC is still meaningful at the end of
7850 : the basic block. */
7851 :
7852 4534866 : orig_mode = GET_MODE (cc_src);
7853 4534866 : mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7854 4534866 : if (mode != VOIDmode)
7855 : {
7856 26304 : gcc_assert (mode == GET_MODE (cc_src));
7857 26304 : if (mode != orig_mode)
7858 : {
7859 9291 : rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7860 :
7861 9291 : cse_change_cc_mode_insn (cc_src_insn, newreg);
7862 :
7863 : /* Do the same in the following insns that use the
7864 : current value of CC_REG within BB. */
7865 9291 : cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7866 : NEXT_INSN (last_insn),
7867 : newreg);
7868 : }
7869 : }
7870 : }
7871 : }
7872 :
7873 :
7874 : /* Perform common subexpression elimination. Nonzero value from
7875 : `cse_main' means that jumps were simplified and some code may now
7876 : be unreachable, so do jump optimization again. */
7877 : static unsigned int
7878 1070191 : rest_of_handle_cse (void)
7879 : {
7880 1070191 : int tem;
7881 :
7882 1070191 : if (dump_file)
7883 32 : dump_flow_info (dump_file, dump_flags);
7884 :
7885 1070191 : tem = cse_main (get_insns (), max_reg_num ());
7886 :
7887 : /* If we are not running more CSE passes, then we are no longer
7888 : expecting CSE to be run. But always rerun it in a cheap mode. */
7889 1070191 : cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7890 :
7891 1070191 : if (tem == 2)
7892 : {
7893 5636 : timevar_push (TV_JUMP);
7894 5636 : rebuild_jump_labels (get_insns ());
7895 5636 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7896 5636 : timevar_pop (TV_JUMP);
7897 : }
7898 1064555 : else if (tem == 1 || optimize > 1)
7899 983241 : cse_cfg_altered |= cleanup_cfg (0);
7900 :
7901 1070191 : return 0;
7902 : }
7903 :
7904 : namespace {
7905 :
7906 : const pass_data pass_data_cse =
7907 : {
7908 : RTL_PASS, /* type */
7909 : "cse1", /* name */
7910 : OPTGROUP_NONE, /* optinfo_flags */
7911 : TV_CSE, /* tv_id */
7912 : 0, /* properties_required */
7913 : 0, /* properties_provided */
7914 : 0, /* properties_destroyed */
7915 : 0, /* todo_flags_start */
7916 : TODO_df_finish, /* todo_flags_finish */
7917 : };
7918 :
7919 : class pass_cse : public rtl_opt_pass
7920 : {
7921 : public:
7922 294536 : pass_cse (gcc::context *ctxt)
7923 589072 : : rtl_opt_pass (pass_data_cse, ctxt)
7924 : {}
7925 :
7926 : /* opt_pass methods: */
7927 1515929 : bool gate (function *) final override { return optimize > 0; }
7928 1070191 : unsigned int execute (function *) final override
7929 : {
7930 1070191 : return rest_of_handle_cse ();
7931 : }
7932 :
7933 : }; // class pass_cse
7934 :
7935 : } // anon namespace
7936 :
7937 : rtl_opt_pass *
7938 294536 : make_pass_cse (gcc::context *ctxt)
7939 : {
7940 294536 : return new pass_cse (ctxt);
7941 : }
7942 :
7943 :
7944 : /* Run second CSE pass after loop optimizations. */
7945 : static unsigned int
7946 988534 : rest_of_handle_cse2 (void)
7947 : {
7948 988534 : int tem;
7949 :
7950 988534 : if (dump_file)
7951 22 : dump_flow_info (dump_file, dump_flags);
7952 :
7953 988534 : tem = cse_main (get_insns (), max_reg_num ());
7954 :
7955 : /* Run a pass to eliminate duplicated assignments to condition code
7956 : registers. We have to run this after bypass_jumps, because it
7957 : makes it harder for that pass to determine whether a jump can be
7958 : bypassed safely. */
7959 988534 : cse_condition_code_reg ();
7960 :
7961 988534 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7962 :
7963 988534 : if (tem == 2)
7964 : {
7965 2176 : timevar_push (TV_JUMP);
7966 2176 : rebuild_jump_labels (get_insns ());
7967 2176 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7968 2176 : timevar_pop (TV_JUMP);
7969 : }
7970 986358 : else if (tem == 1 || cse_cfg_altered)
7971 108 : cse_cfg_altered |= cleanup_cfg (0);
7972 :
7973 988534 : cse_not_expected = 1;
7974 988534 : return 0;
7975 : }
7976 :
7977 :
7978 : namespace {
7979 :
7980 : const pass_data pass_data_cse2 =
7981 : {
7982 : RTL_PASS, /* type */
7983 : "cse2", /* name */
7984 : OPTGROUP_NONE, /* optinfo_flags */
7985 : TV_CSE2, /* tv_id */
7986 : 0, /* properties_required */
7987 : 0, /* properties_provided */
7988 : 0, /* properties_destroyed */
7989 : 0, /* todo_flags_start */
7990 : TODO_df_finish, /* todo_flags_finish */
7991 : };
7992 :
7993 : class pass_cse2 : public rtl_opt_pass
7994 : {
7995 : public:
7996 294536 : pass_cse2 (gcc::context *ctxt)
7997 589072 : : rtl_opt_pass (pass_data_cse2, ctxt)
7998 : {}
7999 :
8000 : /* opt_pass methods: */
8001 1515929 : bool gate (function *) final override
8002 : {
8003 1515929 : return optimize > 0 && flag_rerun_cse_after_loop;
8004 : }
8005 :
8006 988534 : unsigned int execute (function *) final override
8007 : {
8008 988534 : return rest_of_handle_cse2 ();
8009 : }
8010 :
8011 : }; // class pass_cse2
8012 :
8013 : } // anon namespace
8014 :
8015 : rtl_opt_pass *
8016 294536 : make_pass_cse2 (gcc::context *ctxt)
8017 : {
8018 294536 : return new pass_cse2 (ctxt);
8019 : }
8020 :
8021 : /* Run second CSE pass after loop optimizations. */
8022 : static unsigned int
8023 298929 : rest_of_handle_cse_after_global_opts (void)
8024 : {
8025 298929 : int save_cfj;
8026 298929 : int tem;
8027 :
8028 : /* We only want to do local CSE, so don't follow jumps. */
8029 298929 : save_cfj = flag_cse_follow_jumps;
8030 298929 : flag_cse_follow_jumps = 0;
8031 :
8032 298929 : rebuild_jump_labels (get_insns ());
8033 298929 : tem = cse_main (get_insns (), max_reg_num ());
8034 298929 : cse_cfg_altered |= purge_all_dead_edges ();
8035 298929 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
8036 :
8037 298929 : cse_not_expected = !flag_rerun_cse_after_loop;
8038 :
8039 : /* If cse altered any jumps, rerun jump opts to clean things up. */
8040 298929 : if (tem == 2)
8041 : {
8042 252 : timevar_push (TV_JUMP);
8043 252 : rebuild_jump_labels (get_insns ());
8044 252 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
8045 252 : timevar_pop (TV_JUMP);
8046 : }
8047 298677 : else if (tem == 1 || cse_cfg_altered)
8048 4786 : cse_cfg_altered |= cleanup_cfg (0);
8049 :
8050 298929 : flag_cse_follow_jumps = save_cfj;
8051 298929 : return 0;
8052 : }
8053 :
8054 : namespace {
8055 :
8056 : const pass_data pass_data_cse_after_global_opts =
8057 : {
8058 : RTL_PASS, /* type */
8059 : "cse_local", /* name */
8060 : OPTGROUP_NONE, /* optinfo_flags */
8061 : TV_CSE, /* tv_id */
8062 : 0, /* properties_required */
8063 : 0, /* properties_provided */
8064 : 0, /* properties_destroyed */
8065 : 0, /* todo_flags_start */
8066 : TODO_df_finish, /* todo_flags_finish */
8067 : };
8068 :
8069 : class pass_cse_after_global_opts : public rtl_opt_pass
8070 : {
8071 : public:
8072 294536 : pass_cse_after_global_opts (gcc::context *ctxt)
8073 589072 : : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt)
8074 : {}
8075 :
8076 : /* opt_pass methods: */
8077 1515929 : bool gate (function *) final override
8078 : {
8079 1515929 : return optimize > 0 && flag_rerun_cse_after_global_opts;
8080 : }
8081 :
8082 298929 : unsigned int execute (function *) final override
8083 : {
8084 298929 : return rest_of_handle_cse_after_global_opts ();
8085 : }
8086 :
8087 : }; // class pass_cse_after_global_opts
8088 :
8089 : } // anon namespace
8090 :
8091 : rtl_opt_pass *
8092 294536 : make_pass_cse_after_global_opts (gcc::context *ctxt)
8093 : {
8094 294536 : return new pass_cse_after_global_opts (ctxt);
8095 : }
|
