Line data Source code
1 : /* Common subexpression elimination for GNU compiler.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : #include "config.h"
21 : #include "system.h"
22 : #include "coretypes.h"
23 : #include "backend.h"
24 : #include "target.h"
25 : #include "rtl.h"
26 : #include "stmt.h"
27 : #include "tree.h"
28 : #include "cfghooks.h"
29 : #include "df.h"
30 : #include "memmodel.h"
31 : #include "tm_p.h"
32 : #include "insn-config.h"
33 : #include "regs.h"
34 : #include "emit-rtl.h"
35 : #include "recog.h"
36 : #include "cfgrtl.h"
37 : #include "cfganal.h"
38 : #include "cfgcleanup.h"
39 : #include "alias.h"
40 : #include "toplev.h"
41 : #include "rtlhooks-def.h"
42 : #include "tree-pass.h"
43 : #include "dbgcnt.h"
44 : #include "rtl-iter.h"
45 : #include "regs.h"
46 : #include "function-abi.h"
47 : #include "rtlanal.h"
48 : #include "expr.h"
49 :
50 : /* The basic idea of common subexpression elimination is to go
51 : through the code, keeping a record of expressions that would
52 : have the same value at the current scan point, and replacing
53 : expressions encountered with the cheapest equivalent expression.
54 :
55 : It is too complicated to keep track of the different possibilities
56 : when control paths merge in this code; so, at each label, we forget all
57 : that is known and start fresh. This can be described as processing each
58 : extended basic block separately. We have a separate pass to perform
59 : global CSE.
60 :
61 : Note CSE can turn a conditional or computed jump into a nop or
62 : an unconditional jump. When this occurs we arrange to run the jump
63 : optimizer after CSE to delete the unreachable code.
64 :
65 : We use two data structures to record the equivalent expressions:
66 : a hash table for most expressions, and a vector of "quantity
67 : numbers" to record equivalent (pseudo) registers.
68 :
69 : The use of the special data structure for registers is desirable
70 : because it is faster. It is possible because registers references
71 : contain a fairly small number, the register number, taken from
72 : a contiguously allocated series, and two register references are
73 : identical if they have the same number. General expressions
74 : do not have any such thing, so the only way to retrieve the
75 : information recorded on an expression other than a register
76 : is to keep it in a hash table.
77 :
78 : Registers and "quantity numbers":
79 :
80 : At the start of each basic block, all of the (hardware and pseudo)
81 : registers used in the function are given distinct quantity
82 : numbers to indicate their contents. During scan, when the code
83 : copies one register into another, we copy the quantity number.
84 : When a register is loaded in any other way, we allocate a new
85 : quantity number to describe the value generated by this operation.
86 : `REG_QTY (N)' records what quantity register N is currently thought
87 : of as containing.
88 :
89 : All real quantity numbers are greater than or equal to zero.
90 : If register N has not been assigned a quantity, `REG_QTY (N)' will
91 : equal -N - 1, which is always negative.
92 :
93 : Quantity numbers below zero do not exist and none of the `qty_table'
94 : entries should be referenced with a negative index.
95 :
96 : We also maintain a bidirectional chain of registers for each
97 : quantity number. The `qty_table` members `first_reg' and `last_reg',
98 : and `reg_eqv_table' members `next' and `prev' hold these chains.
99 :
100 : The first register in a chain is the one whose lifespan is least local.
101 : Among equals, it is the one that was seen first.
102 : We replace any equivalent register with that one.
103 :
104 : If two registers have the same quantity number, it must be true that
105 : REG expressions with qty_table `mode' must be in the hash table for both
106 : registers and must be in the same class.
107 :
108 : The converse is not true. Since hard registers may be referenced in
109 : any mode, two REG expressions might be equivalent in the hash table
110 : but not have the same quantity number if the quantity number of one
111 : of the registers is not the same mode as those expressions.
112 :
113 : Constants and quantity numbers
114 :
115 : When a quantity has a known constant value, that value is stored
116 : in the appropriate qty_table `const_rtx'. This is in addition to
117 : putting the constant in the hash table as is usual for non-regs.
118 :
119 : Whether a reg or a constant is preferred is determined by the configuration
120 : macro CONST_COSTS and will often depend on the constant value. In any
121 : event, expressions containing constants can be simplified, by fold_rtx.
122 :
123 : When a quantity has a known nearly constant value (such as an address
124 : of a stack slot), that value is stored in the appropriate qty_table
125 : `const_rtx'.
126 :
127 : Integer constants don't have a machine mode. However, cse
128 : determines the intended machine mode from the destination
129 : of the instruction that moves the constant. The machine mode
130 : is recorded in the hash table along with the actual RTL
131 : constant expression so that different modes are kept separate.
132 :
133 : Other expressions:
134 :
135 : To record known equivalences among expressions in general
136 : we use a hash table called `table'. It has a fixed number of buckets
137 : that contain chains of `struct table_elt' elements for expressions.
138 : These chains connect the elements whose expressions have the same
139 : hash codes.
140 :
141 : Other chains through the same elements connect the elements which
142 : currently have equivalent values.
143 :
144 : Register references in an expression are canonicalized before hashing
145 : the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 : The hash code of a register reference is computed using the quantity
147 : number, not the register number.
148 :
149 : When the value of an expression changes, it is necessary to remove from the
150 : hash table not just that expression but all expressions whose values
151 : could be different as a result.
152 :
153 : 1. If the value changing is in memory, except in special cases
154 : ANYTHING referring to memory could be changed. That is because
155 : nobody knows where a pointer does not point.
156 : The function `invalidate_memory' removes what is necessary.
157 :
158 : The special cases are when the address is constant or is
159 : a constant plus a fixed register such as the frame pointer
160 : or a static chain pointer. When such addresses are stored in,
161 : we can tell exactly which other such addresses must be invalidated
162 : due to overlap. `invalidate' does this.
163 : All expressions that refer to non-constant
164 : memory addresses are also invalidated. `invalidate_memory' does this.
165 :
166 : 2. If the value changing is a register, all expressions
167 : containing references to that register, and only those,
168 : must be removed.
169 :
170 : Because searching the entire hash table for expressions that contain
171 : a register is very slow, we try to figure out when it isn't necessary.
172 : Precisely, this is necessary only when expressions have been
173 : entered in the hash table using this register, and then the value has
174 : changed, and then another expression wants to be added to refer to
175 : the register's new value. This sequence of circumstances is rare
176 : within any one basic block.
177 :
178 : `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 : cse_reg_info, are used to detect this case. REG_TICK (i) is
180 : incremented whenever a value is stored in register i.
181 : REG_IN_TABLE (i) holds -1 if no references to register i have been
182 : entered in the table; otherwise, it contains the value REG_TICK (i)
183 : had when the references were entered. If we want to enter a
184 : reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 : remove old references. Until we want to enter a new entry, the
186 : mere fact that the two vectors don't match makes the entries be
187 : ignored if anyone tries to match them.
188 :
189 : Registers themselves are entered in the hash table as well as in
190 : the equivalent-register chains. However, `REG_TICK' and
191 : `REG_IN_TABLE' do not apply to expressions which are simple
192 : register references. These expressions are removed from the table
193 : immediately when they become invalid, and this can be done even if
194 : we do not immediately search for all the expressions that refer to
195 : the register.
196 :
197 : A CLOBBER rtx in an instruction invalidates its operand for further
198 : reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 : invalidates everything that resides in memory.
200 :
201 : Related expressions:
202 :
203 : Constant expressions that differ only by an additive integer
204 : are called related. When a constant expression is put in
205 : the table, the related expression with no constant term
206 : is also entered. These are made to point at each other
207 : so that it is possible to find out if there exists any
208 : register equivalent to an expression related to a given expression. */
209 :
210 : /* Length of qty_table vector. We know in advance we will not need
211 : a quantity number this big. */
212 :
213 : static int max_qty;
214 :
215 : /* Next quantity number to be allocated.
216 : This is 1 + the largest number needed so far. */
217 :
218 : static int next_qty;
219 :
220 : /* Per-qty information tracking.
221 :
222 : `first_reg' and `last_reg' track the head and tail of the
223 : chain of registers which currently contain this quantity.
224 :
225 : `mode' contains the machine mode of this quantity.
226 :
227 : `const_rtx' holds the rtx of the constant value of this
228 : quantity, if known. A summations of the frame/arg pointer
229 : and a constant can also be entered here. When this holds
230 : a known value, `const_insn' is the insn which stored the
231 : constant value.
232 :
233 : `comparison_{code,const,qty}' are used to track when a
234 : comparison between a quantity and some constant or register has
235 : been passed. In such a case, we know the results of the comparison
236 : in case we see it again. These members record a comparison that
237 : is known to be true. `comparison_code' holds the rtx code of such
238 : a comparison, else it is set to UNKNOWN and the other two
239 : comparison members are undefined. `comparison_const' holds
240 : the constant being compared against, or zero if the comparison
241 : is not against a constant. `comparison_qty' holds the quantity
242 : being compared against when the result is known. If the comparison
243 : is not with a register, `comparison_qty' is INT_MIN. */
244 :
245 : struct qty_table_elem
246 : {
247 : rtx const_rtx;
248 : rtx_insn *const_insn;
249 : rtx comparison_const;
250 : int comparison_qty;
251 : unsigned int first_reg, last_reg;
252 : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
253 : ENUM_BITFIELD(rtx_code) comparison_code : RTX_CODE_BITSIZE;
254 : };
255 :
256 : /* The table of all qtys, indexed by qty number. */
257 : static struct qty_table_elem *qty_table;
258 :
259 : /* Insn being scanned. */
260 :
261 : static rtx_insn *this_insn;
262 : static bool optimize_this_for_speed_p;
263 :
264 : /* Index by register number, gives the number of the next (or
265 : previous) register in the chain of registers sharing the same
266 : value.
267 :
268 : Or -1 if this register is at the end of the chain.
269 :
270 : If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
271 :
272 : /* Per-register equivalence chain. */
273 : struct reg_eqv_elem
274 : {
275 : int next, prev;
276 : };
277 :
278 : /* The table of all register equivalence chains. */
279 : static struct reg_eqv_elem *reg_eqv_table;
280 :
281 : struct cse_reg_info
282 : {
283 : /* The timestamp at which this register is initialized. */
284 : unsigned int timestamp;
285 :
286 : /* The quantity number of the register's current contents. */
287 : int reg_qty;
288 :
289 : /* The number of times the register has been altered in the current
290 : basic block. */
291 : int reg_tick;
292 :
293 : /* The REG_TICK value at which rtx's containing this register are
294 : valid in the hash table. If this does not equal the current
295 : reg_tick value, such expressions existing in the hash table are
296 : invalid. */
297 : int reg_in_table;
298 :
299 : /* The SUBREG that was set when REG_TICK was last incremented. Set
300 : to -1 if the last store was to the whole register, not a subreg. */
301 : unsigned int subreg_ticked;
302 : };
303 :
304 : /* A table of cse_reg_info indexed by register numbers. */
305 : static struct cse_reg_info *cse_reg_info_table;
306 :
307 : /* The size of the above table. */
308 : static unsigned int cse_reg_info_table_size;
309 :
310 : /* The index of the first entry that has not been initialized. */
311 : static unsigned int cse_reg_info_table_first_uninitialized;
312 :
313 : /* The timestamp at the beginning of the current run of
314 : cse_extended_basic_block. We increment this variable at the beginning of
315 : the current run of cse_extended_basic_block. The timestamp field of a
316 : cse_reg_info entry matches the value of this variable if and only
317 : if the entry has been initialized during the current run of
318 : cse_extended_basic_block. */
319 : static unsigned int cse_reg_info_timestamp;
320 :
321 : /* A HARD_REG_SET containing all the hard registers for which there is
322 : currently a REG expression in the hash table. Note the difference
323 : from the above variables, which indicate if the REG is mentioned in some
324 : expression in the table. */
325 :
326 : static HARD_REG_SET hard_regs_in_table;
327 :
328 : /* True if CSE has altered the CFG. */
329 : static bool cse_cfg_altered;
330 :
331 : /* True if CSE has altered conditional jump insns in such a way
332 : that jump optimization should be redone. */
333 : static bool cse_jumps_altered;
334 :
335 : /* True if we put a LABEL_REF into the hash table for an INSN
336 : without a REG_LABEL_OPERAND, we have to rerun jump after CSE
337 : to put in the note. */
338 : static bool recorded_label_ref;
339 :
340 : /* canon_hash stores 1 in do_not_record if it notices a reference to PC or
341 : some other volatile subexpression. */
342 :
343 : static int do_not_record;
344 :
345 : /* canon_hash stores 1 in hash_arg_in_memory
346 : if it notices a reference to memory within the expression being hashed. */
347 :
348 : static int hash_arg_in_memory;
349 :
350 : /* The hash table contains buckets which are chains of `struct table_elt's,
351 : each recording one expression's information.
352 : That expression is in the `exp' field.
353 :
354 : The canon_exp field contains a canonical (from the point of view of
355 : alias analysis) version of the `exp' field.
356 :
357 : Those elements with the same hash code are chained in both directions
358 : through the `next_same_hash' and `prev_same_hash' fields.
359 :
360 : Each set of expressions with equivalent values
361 : are on a two-way chain through the `next_same_value'
362 : and `prev_same_value' fields, and all point with
363 : the `first_same_value' field at the first element in
364 : that chain. The chain is in order of increasing cost.
365 : Each element's cost value is in its `cost' field.
366 :
367 : The `in_memory' field is nonzero for elements that
368 : involve any reference to memory. These elements are removed
369 : whenever a write is done to an unidentified location in memory.
370 : To be safe, we assume that a memory address is unidentified unless
371 : the address is either a symbol constant or a constant plus
372 : the frame pointer or argument pointer.
373 :
374 : The `related_value' field is used to connect related expressions
375 : (that differ by adding an integer).
376 : The related expressions are chained in a circular fashion.
377 : `related_value' is zero for expressions for which this
378 : chain is not useful.
379 :
380 : The `cost' field stores the cost of this element's expression.
381 : The `regcost' field stores the value returned by approx_reg_cost for
382 : this element's expression.
383 :
384 : The `is_const' flag is set if the element is a constant (including
385 : a fixed address).
386 :
387 : The `flag' field is used as a temporary during some search routines.
388 :
389 : The `mode' field is usually the same as GET_MODE (`exp'), but
390 : if `exp' is a CONST_INT and has no machine mode then the `mode'
391 : field is the mode it was being used as. Each constant is
392 : recorded separately for each mode it is used with. */
393 :
394 : struct table_elt
395 : {
396 : rtx exp;
397 : rtx canon_exp;
398 : struct table_elt *next_same_hash;
399 : struct table_elt *prev_same_hash;
400 : struct table_elt *next_same_value;
401 : struct table_elt *prev_same_value;
402 : struct table_elt *first_same_value;
403 : struct table_elt *related_value;
404 : int cost;
405 : int regcost;
406 : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
407 : char in_memory;
408 : char is_const;
409 : char flag;
410 : };
411 :
412 : /* We don't want a lot of buckets, because we rarely have very many
413 : things stored in the hash table, and a lot of buckets slows
414 : down a lot of loops that happen frequently. */
415 : #define HASH_SHIFT 5
416 : #define HASH_SIZE (1 << HASH_SHIFT)
417 : #define HASH_MASK (HASH_SIZE - 1)
418 :
419 : /* Determine whether register number N is considered a fixed register for the
420 : purpose of approximating register costs.
421 : It is desirable to replace other regs with fixed regs, to reduce need for
422 : non-fixed hard regs.
423 : A reg wins if it is either the frame pointer or designated as fixed. */
424 : #define FIXED_REGNO_P(N) \
425 : ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
426 : || fixed_regs[N] || global_regs[N])
427 :
428 : /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
429 : hard registers and pointers into the frame are the cheapest with a cost
430 : of 0. Next come pseudos with a cost of one and other hard registers with
431 : a cost of 2. Aside from these special cases, call `rtx_cost'. */
432 :
433 : #define CHEAP_REGNO(N) \
434 : (REGNO_PTR_FRAME_P (N) \
435 : || (HARD_REGISTER_NUM_P (N) \
436 : && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
437 :
438 : #define COST(X, MODE) \
439 : (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
440 : #define COST_IN(X, MODE, OUTER, OPNO) \
441 : (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
442 :
443 : /* Get the number of times this register has been updated in this
444 : basic block. */
445 :
446 : #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
447 :
448 : /* Get the point at which REG was recorded in the table. */
449 :
450 : #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
451 :
452 : /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
453 : SUBREG). */
454 :
455 : #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
456 :
457 : /* Get the quantity number for REG. */
458 :
459 : #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
460 :
461 : /* Determine if the quantity number for register X represents a valid index
462 : into the qty_table. */
463 :
464 : #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
465 :
466 : /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
467 :
468 : #define CHEAPER(X, Y) \
469 : (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
470 :
471 : static struct table_elt *table[HASH_SIZE];
472 :
473 : /* Chain of `struct table_elt's made so far for this function
474 : but currently removed from the table. */
475 :
476 : static struct table_elt *free_element_chain;
477 :
478 : /* Trace a patch through the CFG. */
479 :
480 : struct branch_path
481 : {
482 : /* The basic block for this path entry. */
483 : basic_block bb;
484 : };
485 :
486 : /* This data describes a block that will be processed by
487 : cse_extended_basic_block. */
488 :
489 : struct cse_basic_block_data
490 : {
491 : /* Total number of SETs in block. */
492 : int nsets;
493 : /* Size of current branch path, if any. */
494 : int path_size;
495 : /* Current path, indicating which basic_blocks will be processed. */
496 : struct branch_path *path;
497 : };
498 :
499 :
500 : /* Pointers to the live in/live out bitmaps for the boundaries of the
501 : current EBB. */
502 : static bitmap cse_ebb_live_in, cse_ebb_live_out;
503 :
504 : /* A simple bitmap to track which basic blocks have been visited
505 : already as part of an already processed extended basic block. */
506 : static sbitmap cse_visited_basic_blocks;
507 :
508 : static bool fixed_base_plus_p (rtx x);
509 : static int notreg_cost (rtx, machine_mode, enum rtx_code, int);
510 : static int preferable (int, int, int, int);
511 : static void new_basic_block (void);
512 : static void make_new_qty (unsigned int, machine_mode);
513 : static void make_regs_eqv (unsigned int, unsigned int);
514 : static void delete_reg_equiv (unsigned int);
515 : static bool mention_regs (rtx);
516 : static bool insert_regs (rtx, struct table_elt *, bool);
517 : static void remove_from_table (struct table_elt *, unsigned);
518 : static void remove_pseudo_from_table (rtx, unsigned);
519 : static struct table_elt *lookup (rtx, unsigned, machine_mode);
520 : static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode);
521 : static rtx lookup_as_function (rtx, enum rtx_code);
522 : static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
523 : machine_mode, int, int);
524 : static struct table_elt *insert (rtx, struct table_elt *, unsigned,
525 : machine_mode);
526 : static void merge_equiv_classes (struct table_elt *, struct table_elt *);
527 : static void invalidate (rtx, machine_mode);
528 : static void remove_invalid_refs (unsigned int);
529 : static void remove_invalid_subreg_refs (unsigned int, poly_uint64,
530 : machine_mode);
531 : static void rehash_using_reg (rtx);
532 : static void invalidate_memory (void);
533 : static rtx use_related_value (rtx, struct table_elt *);
534 :
535 : static inline unsigned canon_hash (rtx, machine_mode);
536 : static inline unsigned safe_hash (rtx, machine_mode);
537 : static inline unsigned hash_rtx_string (const char *);
538 :
539 : static rtx canon_reg (rtx, rtx_insn *);
540 : static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
541 : machine_mode *,
542 : machine_mode *);
543 : static rtx fold_rtx (rtx, rtx_insn *);
544 : static rtx equiv_constant (rtx);
545 : static void record_jump_equiv (rtx_insn *, bool);
546 : static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx);
547 : static void cse_insn (rtx_insn *);
548 : static void cse_prescan_path (struct cse_basic_block_data *);
549 : static void invalidate_from_clobbers (rtx_insn *);
550 : static void invalidate_from_sets_and_clobbers (rtx_insn *);
551 : static void cse_extended_basic_block (struct cse_basic_block_data *);
552 : extern void dump_class (struct table_elt*);
553 : static void get_cse_reg_info_1 (unsigned int regno);
554 : static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
555 :
556 : static void flush_hash_table (void);
557 : static bool insn_live_p (rtx_insn *, int *);
558 : static bool set_live_p (rtx, int *);
559 : static void cse_change_cc_mode_insn (rtx_insn *, rtx);
560 : static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
561 : static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
562 : bool);
563 :
564 :
565 : #undef RTL_HOOKS_GEN_LOWPART
566 : #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
567 :
568 : static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
569 :
570 : /* Compute hash code of X in mode M. Special-case case where X is a pseudo
571 : register (hard registers may require `do_not_record' to be set). */
572 :
573 : static inline unsigned
574 835316906 : HASH (rtx x, machine_mode mode)
575 : {
576 542313688 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
577 1157507594 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
578 835316906 : : canon_hash (x, mode));
579 835316906 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
580 : }
581 :
582 : /* Like HASH, but without side-effects. */
583 :
584 : static inline unsigned
585 229089080 : SAFE_HASH (rtx x, machine_mode mode)
586 : {
587 117444445 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
588 295782115 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
589 229089080 : : safe_hash (x, mode));
590 229089080 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
591 : }
592 :
593 : /* Nonzero if X has the form (PLUS frame-pointer integer). */
594 :
595 : static bool
596 237064449 : fixed_base_plus_p (rtx x)
597 : {
598 269210972 : switch (GET_CODE (x))
599 : {
600 140220361 : case REG:
601 140220361 : if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
602 : return true;
603 126126126 : if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
604 117226 : return true;
605 : return false;
606 :
607 38370554 : case PLUS:
608 38370554 : if (!CONST_INT_P (XEXP (x, 1)))
609 : return false;
610 32146523 : return fixed_base_plus_p (XEXP (x, 0));
611 :
612 : default:
613 : return false;
614 : }
615 : }
616 :
617 : /* Dump the expressions in the equivalence class indicated by CLASSP.
618 : This function is used only for debugging. */
619 : DEBUG_FUNCTION void
620 0 : dump_class (struct table_elt *classp)
621 : {
622 0 : struct table_elt *elt;
623 :
624 0 : fprintf (stderr, "Equivalence chain for ");
625 0 : print_rtl (stderr, classp->exp);
626 0 : fprintf (stderr, ": \n");
627 :
628 0 : for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
629 : {
630 0 : print_rtl (stderr, elt->exp);
631 0 : fprintf (stderr, "\n");
632 : }
633 0 : }
634 :
635 : /* Return an estimate of the cost of the registers used in an rtx.
636 : This is mostly the number of different REG expressions in the rtx;
637 : however for some exceptions like fixed registers we use a cost of
638 : 0. If any other hard register reference occurs, return MAX_COST. */
639 :
640 : static int
641 433188238 : approx_reg_cost (const_rtx x)
642 : {
643 433188238 : int cost = 0;
644 433188238 : subrtx_iterator::array_type array;
645 1366511398 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
646 : {
647 989674798 : const_rtx x = *iter;
648 989674798 : if (REG_P (x))
649 : {
650 410235812 : unsigned int regno = REGNO (x);
651 410235812 : if (!CHEAP_REGNO (regno))
652 : {
653 56351638 : if (regno < FIRST_PSEUDO_REGISTER)
654 : {
655 56351638 : if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
656 56351638 : return MAX_COST;
657 0 : cost += 2;
658 : }
659 : else
660 291247914 : cost += 1;
661 : }
662 : }
663 : }
664 376836600 : return cost;
665 433188238 : }
666 :
667 : /* Return a negative value if an rtx A, whose costs are given by COST_A
668 : and REGCOST_A, is more desirable than an rtx B.
669 : Return a positive value if A is less desirable, or 0 if the two are
670 : equally good. */
671 : static int
672 658403874 : preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
673 : {
674 : /* First, get rid of cases involving expressions that are entirely
675 : unwanted. */
676 658403874 : if (cost_a != cost_b)
677 : {
678 615665433 : if (cost_a == MAX_COST)
679 : return 1;
680 614260564 : if (cost_b == MAX_COST)
681 : return -1;
682 : }
683 :
684 : /* Avoid extending lifetimes of hardregs. */
685 172580320 : if (regcost_a != regcost_b)
686 : {
687 93816922 : if (regcost_a == MAX_COST)
688 : return 1;
689 72469030 : if (regcost_b == MAX_COST)
690 : return -1;
691 : }
692 :
693 : /* Normal operation costs take precedence. */
694 149308558 : if (cost_a != cost_b)
695 106692445 : return cost_a - cost_b;
696 : /* Only if these are identical consider effects on register pressure. */
697 42616113 : if (regcost_a != regcost_b)
698 42616113 : return regcost_a - regcost_b;
699 : return 0;
700 : }
701 :
702 : /* Internal function, to compute cost when X is not a register; called
703 : from COST macro to keep it simple. */
704 :
705 : static int
706 305698104 : notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno)
707 : {
708 305698104 : scalar_int_mode int_mode, inner_mode;
709 305698104 : return ((GET_CODE (x) == SUBREG
710 5243529 : && REG_P (SUBREG_REG (x))
711 307733993 : && is_int_mode (mode, &int_mode)
712 306965085 : && is_int_mode (GET_MODE (SUBREG_REG (x)), &inner_mode)
713 7661106 : && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
714 3776074 : && subreg_lowpart_p (x)
715 2563572 : && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode))
716 305698104 : ? 0
717 303134532 : : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2);
718 : }
719 :
720 :
721 : /* Initialize CSE_REG_INFO_TABLE. */
722 :
723 : static void
724 2299323 : init_cse_reg_info (unsigned int nregs)
725 : {
726 : /* Do we need to grow the table? */
727 2299323 : if (nregs > cse_reg_info_table_size)
728 : {
729 175265 : unsigned int new_size;
730 :
731 175265 : if (cse_reg_info_table_size < 2048)
732 : {
733 : /* Compute a new size that is a power of 2 and no smaller
734 : than the large of NREGS and 64. */
735 31550 : new_size = (cse_reg_info_table_size
736 174961 : ? cse_reg_info_table_size : 64);
737 :
738 388061 : while (new_size < nregs)
739 213100 : new_size *= 2;
740 : }
741 : else
742 : {
743 : /* If we need a big table, allocate just enough to hold
744 : NREGS registers. */
745 : new_size = nregs;
746 : }
747 :
748 : /* Reallocate the table with NEW_SIZE entries. */
749 175265 : free (cse_reg_info_table);
750 175265 : cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
751 175265 : cse_reg_info_table_size = new_size;
752 175265 : cse_reg_info_table_first_uninitialized = 0;
753 : }
754 :
755 : /* Do we have all of the first NREGS entries initialized? */
756 2299323 : if (cse_reg_info_table_first_uninitialized < nregs)
757 : {
758 316208 : unsigned int old_timestamp = cse_reg_info_timestamp - 1;
759 316208 : unsigned int i;
760 :
761 : /* Put the old timestamp on newly allocated entries so that they
762 : will all be considered out of date. We do not touch those
763 : entries beyond the first NREGS entries to be nice to the
764 : virtual memory. */
765 32947155 : for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
766 32630947 : cse_reg_info_table[i].timestamp = old_timestamp;
767 :
768 316208 : cse_reg_info_table_first_uninitialized = nregs;
769 : }
770 2299323 : }
771 :
772 : /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
773 :
774 : static void
775 849073660 : get_cse_reg_info_1 (unsigned int regno)
776 : {
777 : /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
778 : entry will be considered to have been initialized. */
779 849073660 : cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
780 :
781 : /* Initialize the rest of the entry. */
782 849073660 : cse_reg_info_table[regno].reg_tick = 1;
783 849073660 : cse_reg_info_table[regno].reg_in_table = -1;
784 849073660 : cse_reg_info_table[regno].subreg_ticked = -1;
785 849073660 : cse_reg_info_table[regno].reg_qty = -regno - 1;
786 849073660 : }
787 :
788 : /* Find a cse_reg_info entry for REGNO. */
789 :
790 : static inline struct cse_reg_info *
791 11081891750 : get_cse_reg_info (unsigned int regno)
792 : {
793 11081891750 : struct cse_reg_info *p = &cse_reg_info_table[regno];
794 :
795 : /* If this entry has not been initialized, go ahead and initialize
796 : it. */
797 11081891750 : if (p->timestamp != cse_reg_info_timestamp)
798 849073660 : get_cse_reg_info_1 (regno);
799 :
800 11081891750 : return p;
801 : }
802 :
803 : /* Clear the hash table and initialize each register with its own quantity,
804 : for a new basic block. */
805 :
806 : static void
807 20728154 : new_basic_block (void)
808 : {
809 20728154 : int i;
810 :
811 20728154 : next_qty = 0;
812 :
813 : /* Invalidate cse_reg_info_table. */
814 20728154 : cse_reg_info_timestamp++;
815 :
816 : /* Clear out hash table state for this pass. */
817 20728154 : CLEAR_HARD_REG_SET (hard_regs_in_table);
818 :
819 : /* The per-quantity values used to be initialized here, but it is
820 : much faster to initialize each as it is made in `make_new_qty'. */
821 :
822 684029082 : for (i = 0; i < HASH_SIZE; i++)
823 : {
824 663300928 : struct table_elt *first;
825 :
826 663300928 : first = table[i];
827 663300928 : if (first != NULL)
828 : {
829 136391568 : struct table_elt *last = first;
830 :
831 136391568 : table[i] = NULL;
832 :
833 192586493 : while (last->next_same_hash != NULL)
834 : last = last->next_same_hash;
835 :
836 : /* Now relink this hash entire chain into
837 : the free element list. */
838 :
839 136391568 : last->next_same_hash = free_element_chain;
840 136391568 : free_element_chain = first;
841 : }
842 : }
843 20728154 : }
844 :
845 : /* Say that register REG contains a quantity in mode MODE not in any
846 : register before and initialize that quantity. */
847 :
848 : static void
849 104004320 : make_new_qty (unsigned int reg, machine_mode mode)
850 : {
851 104004320 : int q;
852 104004320 : struct qty_table_elem *ent;
853 104004320 : struct reg_eqv_elem *eqv;
854 :
855 104004320 : gcc_assert (next_qty < max_qty);
856 :
857 104004320 : q = REG_QTY (reg) = next_qty++;
858 104004320 : ent = &qty_table[q];
859 104004320 : ent->first_reg = reg;
860 104004320 : ent->last_reg = reg;
861 104004320 : ent->mode = mode;
862 104004320 : ent->const_rtx = ent->const_insn = NULL;
863 104004320 : ent->comparison_code = UNKNOWN;
864 :
865 104004320 : eqv = ®_eqv_table[reg];
866 104004320 : eqv->next = eqv->prev = -1;
867 104004320 : }
868 :
869 : /* Make reg NEW equivalent to reg OLD.
870 : OLD is not changing; NEW is. */
871 :
872 : static void
873 11475312 : make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
874 : {
875 11475312 : unsigned int lastr, firstr;
876 11475312 : int q = REG_QTY (old_reg);
877 11475312 : struct qty_table_elem *ent;
878 :
879 11475312 : ent = &qty_table[q];
880 :
881 : /* Nothing should become eqv until it has a "non-invalid" qty number. */
882 11475312 : gcc_assert (REGNO_QTY_VALID_P (old_reg));
883 :
884 11475312 : REG_QTY (new_reg) = q;
885 11475312 : firstr = ent->first_reg;
886 11475312 : lastr = ent->last_reg;
887 :
888 : /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
889 : hard regs. Among pseudos, if NEW will live longer than any other reg
890 : of the same qty, and that is beyond the current basic block,
891 : make it the new canonical replacement for this qty. */
892 314958 : if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
893 : /* Certain fixed registers might be of the class NO_REGS. This means
894 : that not only can they not be allocated by the compiler, but
895 : they cannot be used in substitutions or canonicalizations
896 : either. */
897 11160354 : && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
898 11479866 : && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
899 11155800 : || (new_reg >= FIRST_PSEUDO_REGISTER
900 11155800 : && (firstr < FIRST_PSEUDO_REGISTER
901 11155800 : || (bitmap_bit_p (cse_ebb_live_out, new_reg)
902 3619476 : && !bitmap_bit_p (cse_ebb_live_out, firstr))
903 9124296 : || (bitmap_bit_p (cse_ebb_live_in, new_reg)
904 468290 : && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
905 : {
906 2133522 : reg_eqv_table[firstr].prev = new_reg;
907 2133522 : reg_eqv_table[new_reg].next = firstr;
908 2133522 : reg_eqv_table[new_reg].prev = -1;
909 2133522 : ent->first_reg = new_reg;
910 : }
911 : else
912 : {
913 : /* If NEW is a hard reg (known to be non-fixed), insert at end.
914 : Otherwise, insert before any non-fixed hard regs that are at the
915 : end. Registers of class NO_REGS cannot be used as an
916 : equivalent for anything. */
917 297114 : while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
918 0 : && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
919 9341790 : && new_reg >= FIRST_PSEUDO_REGISTER)
920 0 : lastr = reg_eqv_table[lastr].prev;
921 9341790 : reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
922 9341790 : if (reg_eqv_table[lastr].next >= 0)
923 0 : reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
924 : else
925 9341790 : qty_table[q].last_reg = new_reg;
926 9341790 : reg_eqv_table[lastr].next = new_reg;
927 9341790 : reg_eqv_table[new_reg].prev = lastr;
928 : }
929 11475312 : }
930 :
931 : /* Remove REG from its equivalence class. */
932 :
933 : static void
934 1472072665 : delete_reg_equiv (unsigned int reg)
935 : {
936 1472072665 : struct qty_table_elem *ent;
937 1472072665 : int q = REG_QTY (reg);
938 1472072665 : int p, n;
939 :
940 : /* If invalid, do nothing. */
941 1472072665 : if (! REGNO_QTY_VALID_P (reg))
942 : return;
943 :
944 18679384 : ent = &qty_table[q];
945 :
946 18679384 : p = reg_eqv_table[reg].prev;
947 18679384 : n = reg_eqv_table[reg].next;
948 :
949 18679384 : if (n != -1)
950 658111 : reg_eqv_table[n].prev = p;
951 : else
952 18021273 : ent->last_reg = p;
953 18679384 : if (p != -1)
954 646539 : reg_eqv_table[p].next = n;
955 : else
956 18032845 : ent->first_reg = n;
957 :
958 18679384 : REG_QTY (reg) = -reg - 1;
959 : }
960 :
961 : /* Remove any invalid expressions from the hash table
962 : that refer to any of the registers contained in expression X.
963 :
964 : Make sure that newly inserted references to those registers
965 : as subexpressions will be considered valid.
966 :
967 : mention_regs is not called when a register itself
968 : is being stored in the table.
969 :
970 : Return true if we have done something that may have changed
971 : the hash code of X. */
972 :
973 : static bool
974 464637344 : mention_regs (rtx x)
975 : {
976 464637344 : enum rtx_code code;
977 464637344 : int i, j;
978 464637344 : const char *fmt;
979 464637344 : bool changed = false;
980 :
981 464637344 : if (x == 0)
982 : return false;
983 :
984 464637344 : code = GET_CODE (x);
985 464637344 : if (code == REG)
986 : {
987 140523662 : unsigned int regno = REGNO (x);
988 140523662 : unsigned int endregno = END_REGNO (x);
989 140523662 : unsigned int i;
990 :
991 281047324 : for (i = regno; i < endregno; i++)
992 : {
993 140523662 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
994 169959 : remove_invalid_refs (i);
995 :
996 140523662 : REG_IN_TABLE (i) = REG_TICK (i);
997 140523662 : SUBREG_TICKED (i) = -1;
998 : }
999 :
1000 : return false;
1001 : }
1002 :
1003 : /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1004 : pseudo if they don't use overlapping words. We handle only pseudos
1005 : here for simplicity. */
1006 7537262 : if (code == SUBREG && REG_P (SUBREG_REG (x))
1007 331640419 : && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1008 : {
1009 7526624 : unsigned int i = REGNO (SUBREG_REG (x));
1010 :
1011 7526624 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1012 : {
1013 : /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1014 : the last store to this register really stored into this
1015 : subreg, then remove the memory of this subreg.
1016 : Otherwise, remove any memory of the entire register and
1017 : all its subregs from the table. */
1018 327759 : if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1019 327759 : || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1020 327759 : remove_invalid_refs (i);
1021 : else
1022 0 : remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1023 : }
1024 :
1025 7526624 : REG_IN_TABLE (i) = REG_TICK (i);
1026 7526624 : SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1027 7526624 : return false;
1028 : }
1029 :
1030 : /* If X is a comparison or a COMPARE and either operand is a register
1031 : that does not have a quantity, give it one. This is so that a later
1032 : call to record_jump_equiv won't cause X to be assigned a different
1033 : hash code and not found in the table after that call.
1034 :
1035 : It is not necessary to do this here, since rehash_using_reg can
1036 : fix up the table later, but doing this here eliminates the need to
1037 : call that expensive function in the most common case where the only
1038 : use of the register is in the comparison. */
1039 :
1040 316587058 : if (code == COMPARE || COMPARISON_P (x))
1041 : {
1042 23529689 : if (REG_P (XEXP (x, 0))
1043 23529689 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1044 8853016 : if (insert_regs (XEXP (x, 0), NULL, false))
1045 : {
1046 8853016 : rehash_using_reg (XEXP (x, 0));
1047 8853016 : changed = true;
1048 : }
1049 :
1050 23529689 : if (REG_P (XEXP (x, 1))
1051 23529689 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1052 2453464 : if (insert_regs (XEXP (x, 1), NULL, false))
1053 : {
1054 2453464 : rehash_using_reg (XEXP (x, 1));
1055 2453464 : changed = true;
1056 : }
1057 : }
1058 :
1059 316587058 : fmt = GET_RTX_FORMAT (code);
1060 822682537 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1061 506095479 : if (fmt[i] == 'e')
1062 : {
1063 299474649 : if (mention_regs (XEXP (x, i)))
1064 506095479 : changed = true;
1065 : }
1066 206620830 : else if (fmt[i] == 'E')
1067 17026643 : for (j = 0; j < XVECLEN (x, i); j++)
1068 12807990 : if (mention_regs (XVECEXP (x, i, j)))
1069 360412 : changed = true;
1070 :
1071 : return changed;
1072 : }
1073 :
1074 : /* Update the register quantities for inserting X into the hash table
1075 : with a value equivalent to CLASSP.
1076 : (If the class does not contain a REG, it is irrelevant.)
1077 : If MODIFIED is true, X is a destination; it is being modified.
1078 : Note that delete_reg_equiv should be called on a register
1079 : before insert_regs is done on that register with MODIFIED != 0.
1080 :
1081 : True value means that elements of reg_qty have changed
1082 : so X's hash code may be different. */
1083 :
1084 : static bool
1085 250928547 : insert_regs (rtx x, struct table_elt *classp, bool modified)
1086 : {
1087 250928547 : if (REG_P (x))
1088 : {
1089 121949031 : unsigned int regno = REGNO (x);
1090 121949031 : int qty_valid;
1091 :
1092 : /* If REGNO is in the equivalence table already but is of the
1093 : wrong mode for that equivalence, don't do anything here. */
1094 :
1095 121949031 : qty_valid = REGNO_QTY_VALID_P (regno);
1096 121949031 : if (qty_valid)
1097 : {
1098 6469399 : struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1099 :
1100 6469399 : if (ent->mode != GET_MODE (x))
1101 : return false;
1102 : }
1103 :
1104 121949031 : if (modified || ! qty_valid)
1105 : {
1106 115479632 : if (classp)
1107 93367142 : for (classp = classp->first_same_value;
1108 184323767 : classp != 0;
1109 90956625 : classp = classp->next_same_value)
1110 102431937 : if (REG_P (classp->exp)
1111 11475312 : && GET_MODE (classp->exp) == GET_MODE (x))
1112 : {
1113 11475312 : unsigned c_regno = REGNO (classp->exp);
1114 :
1115 11475312 : gcc_assert (REGNO_QTY_VALID_P (c_regno));
1116 :
1117 : /* Suppose that 5 is hard reg and 100 and 101 are
1118 : pseudos. Consider
1119 :
1120 : (set (reg:si 100) (reg:si 5))
1121 : (set (reg:si 5) (reg:si 100))
1122 : (set (reg:di 101) (reg:di 5))
1123 :
1124 : We would now set REG_QTY (101) = REG_QTY (5), but the
1125 : entry for 5 is in SImode. When we use this later in
1126 : copy propagation, we get the register in wrong mode. */
1127 11475312 : if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1128 0 : continue;
1129 :
1130 11475312 : make_regs_eqv (regno, c_regno);
1131 11475312 : return true;
1132 : }
1133 :
1134 : /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1135 : than REG_IN_TABLE to find out if there was only a single preceding
1136 : invalidation - for the SUBREG - or another one, which would be
1137 : for the full register. However, if we find here that REG_TICK
1138 : indicates that the register is invalid, it means that it has
1139 : been invalidated in a separate operation. The SUBREG might be used
1140 : now (then this is a recursive call), or we might use the full REG
1141 : now and a SUBREG of it later. So bump up REG_TICK so that
1142 : mention_regs will do the right thing. */
1143 104004320 : if (! modified
1144 22322498 : && REG_IN_TABLE (regno) >= 0
1145 106058753 : && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1146 447 : REG_TICK (regno)++;
1147 104004320 : make_new_qty (regno, GET_MODE (x));
1148 104004320 : return true;
1149 : }
1150 :
1151 : return false;
1152 : }
1153 :
1154 : /* If X is a SUBREG, we will likely be inserting the inner register in the
1155 : table. If that register doesn't have an assigned quantity number at
1156 : this point but does later, the insertion that we will be doing now will
1157 : not be accessible because its hash code will have changed. So assign
1158 : a quantity number now. */
1159 :
1160 3317508 : else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1161 132288917 : && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1162 : {
1163 1607388 : insert_regs (SUBREG_REG (x), NULL, false);
1164 1607388 : mention_regs (x);
1165 1607388 : return true;
1166 : }
1167 : else
1168 127372128 : return mention_regs (x);
1169 : }
1170 :
1171 :
1172 : /* Compute upper and lower anchors for CST. Also compute the offset of CST
1173 : from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1174 : CST is equal to an anchor. */
1175 :
1176 : static bool
1177 0 : compute_const_anchors (rtx cst,
1178 : HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1179 : HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1180 : {
1181 0 : unsigned HOST_WIDE_INT n = UINTVAL (cst);
1182 :
1183 0 : *lower_base = n & ~(targetm.const_anchor - 1);
1184 0 : if ((unsigned HOST_WIDE_INT) *lower_base == n)
1185 : return false;
1186 :
1187 0 : *upper_base = ((n + (targetm.const_anchor - 1))
1188 0 : & ~(targetm.const_anchor - 1));
1189 0 : *upper_offs = n - *upper_base;
1190 0 : *lower_offs = n - *lower_base;
1191 0 : return true;
1192 : }
1193 :
1194 : /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1195 :
1196 : static void
1197 0 : insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1198 : machine_mode mode)
1199 : {
1200 0 : struct table_elt *elt;
1201 0 : unsigned hash;
1202 0 : rtx anchor_exp;
1203 0 : rtx exp;
1204 :
1205 0 : anchor_exp = gen_int_mode (anchor, mode);
1206 0 : hash = HASH (anchor_exp, mode);
1207 0 : elt = lookup (anchor_exp, hash, mode);
1208 0 : if (!elt)
1209 0 : elt = insert (anchor_exp, NULL, hash, mode);
1210 :
1211 0 : exp = plus_constant (mode, reg, offs);
1212 : /* REG has just been inserted and the hash codes recomputed. */
1213 0 : mention_regs (exp);
1214 0 : hash = HASH (exp, mode);
1215 :
1216 : /* Use the cost of the register rather than the whole expression. When
1217 : looking up constant anchors we will further offset the corresponding
1218 : expression therefore it does not make sense to prefer REGs over
1219 : reg-immediate additions. Prefer instead the oldest expression. Also
1220 : don't prefer pseudos over hard regs so that we derive constants in
1221 : argument registers from other argument registers rather than from the
1222 : original pseudo that was used to synthesize the constant. */
1223 0 : insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1);
1224 0 : }
1225 :
1226 : /* The constant CST is equivalent to the register REG. Create
1227 : equivalences between the two anchors of CST and the corresponding
1228 : register-offset expressions using REG. */
1229 :
1230 : static void
1231 0 : insert_const_anchors (rtx reg, rtx cst, machine_mode mode)
1232 : {
1233 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1234 :
1235 0 : if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1236 : &upper_base, &upper_offs))
1237 0 : return;
1238 :
1239 : /* Ignore anchors of value 0. Constants accessible from zero are
1240 : simple. */
1241 0 : if (lower_base != 0)
1242 0 : insert_const_anchor (lower_base, reg, -lower_offs, mode);
1243 :
1244 0 : if (upper_base != 0)
1245 0 : insert_const_anchor (upper_base, reg, -upper_offs, mode);
1246 : }
1247 :
1248 : /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1249 : ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1250 : valid expression. Return the cheapest and oldest of such expressions. In
1251 : *OLD, return how old the resulting expression is compared to the other
1252 : equivalent expressions. */
1253 :
1254 : static rtx
1255 0 : find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1256 : unsigned *old)
1257 : {
1258 0 : struct table_elt *elt;
1259 0 : unsigned idx;
1260 0 : struct table_elt *match_elt;
1261 0 : rtx match;
1262 :
1263 : /* Find the cheapest and *oldest* expression to maximize the chance of
1264 : reusing the same pseudo. */
1265 :
1266 0 : match_elt = NULL;
1267 0 : match = NULL_RTX;
1268 0 : for (elt = anchor_elt->first_same_value, idx = 0;
1269 0 : elt;
1270 0 : elt = elt->next_same_value, idx++)
1271 : {
1272 0 : if (match_elt && CHEAPER (match_elt, elt))
1273 : return match;
1274 :
1275 0 : if (REG_P (elt->exp)
1276 0 : || (GET_CODE (elt->exp) == PLUS
1277 0 : && REG_P (XEXP (elt->exp, 0))
1278 0 : && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1279 : {
1280 0 : rtx x;
1281 :
1282 : /* Ignore expressions that are no longer valid. */
1283 0 : if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1284 0 : continue;
1285 :
1286 0 : x = plus_constant (GET_MODE (elt->exp), elt->exp, offs);
1287 0 : if (REG_P (x)
1288 0 : || (GET_CODE (x) == PLUS
1289 0 : && IN_RANGE (INTVAL (XEXP (x, 1)),
1290 : -targetm.const_anchor,
1291 : targetm.const_anchor - 1)))
1292 : {
1293 0 : match = x;
1294 0 : match_elt = elt;
1295 0 : *old = idx;
1296 : }
1297 : }
1298 : }
1299 :
1300 : return match;
1301 : }
1302 :
1303 : /* Try to express the constant SRC_CONST using a register+offset expression
1304 : derived from a constant anchor. Return it if successful or NULL_RTX,
1305 : otherwise. */
1306 :
1307 : static rtx
1308 0 : try_const_anchors (rtx src_const, machine_mode mode)
1309 : {
1310 0 : struct table_elt *lower_elt, *upper_elt;
1311 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1312 0 : rtx lower_anchor_rtx, upper_anchor_rtx;
1313 0 : rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1314 0 : unsigned lower_old, upper_old;
1315 :
1316 : /* CONST_INT may be in various modes, avoid non-scalar-int mode. */
1317 0 : if (!SCALAR_INT_MODE_P (mode))
1318 : return NULL_RTX;
1319 :
1320 0 : if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1321 : &upper_base, &upper_offs))
1322 : return NULL_RTX;
1323 :
1324 0 : lower_anchor_rtx = GEN_INT (lower_base);
1325 0 : upper_anchor_rtx = GEN_INT (upper_base);
1326 0 : lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1327 0 : upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1328 :
1329 0 : if (lower_elt)
1330 0 : lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1331 0 : if (upper_elt)
1332 0 : upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1333 :
1334 0 : if (!lower_exp)
1335 : return upper_exp;
1336 0 : if (!upper_exp)
1337 : return lower_exp;
1338 :
1339 : /* Return the older expression. */
1340 0 : return (upper_old > lower_old ? upper_exp : lower_exp);
1341 : }
1342 :
1343 : /* Look in or update the hash table. */
1344 :
1345 : /* Remove table element ELT from use in the table.
1346 : HASH is its hash code, made using the HASH macro.
1347 : It's an argument because often that is known in advance
1348 : and we save much time not recomputing it. */
1349 :
1350 : static void
1351 68873866 : remove_from_table (struct table_elt *elt, unsigned int hash)
1352 : {
1353 68873866 : if (elt == 0)
1354 : return;
1355 :
1356 : /* Mark this element as removed. See cse_insn. */
1357 68873866 : elt->first_same_value = 0;
1358 :
1359 : /* Remove the table element from its equivalence class. */
1360 :
1361 68873866 : {
1362 68873866 : struct table_elt *prev = elt->prev_same_value;
1363 68873866 : struct table_elt *next = elt->next_same_value;
1364 :
1365 68873866 : if (next)
1366 7786278 : next->prev_same_value = prev;
1367 :
1368 68873866 : if (prev)
1369 44186300 : prev->next_same_value = next;
1370 : else
1371 : {
1372 : struct table_elt *newfirst = next;
1373 32370086 : while (next)
1374 : {
1375 7682520 : next->first_same_value = newfirst;
1376 7682520 : next = next->next_same_value;
1377 : }
1378 : }
1379 : }
1380 :
1381 : /* Remove the table element from its hash bucket. */
1382 :
1383 68873866 : {
1384 68873866 : struct table_elt *prev = elt->prev_same_hash;
1385 68873866 : struct table_elt *next = elt->next_same_hash;
1386 :
1387 68873866 : if (next)
1388 20220882 : next->prev_same_hash = prev;
1389 :
1390 68873866 : if (prev)
1391 8739510 : prev->next_same_hash = next;
1392 60134356 : else if (table[hash] == elt)
1393 60134344 : table[hash] = next;
1394 : else
1395 : {
1396 : /* This entry is not in the proper hash bucket. This can happen
1397 : when two classes were merged by `merge_equiv_classes'. Search
1398 : for the hash bucket that it heads. This happens only very
1399 : rarely, so the cost is acceptable. */
1400 396 : for (hash = 0; hash < HASH_SIZE; hash++)
1401 384 : if (table[hash] == elt)
1402 12 : table[hash] = next;
1403 : }
1404 : }
1405 :
1406 : /* Remove the table element from its related-value circular chain. */
1407 :
1408 68873866 : if (elt->related_value != 0 && elt->related_value != elt)
1409 : {
1410 : struct table_elt *p = elt->related_value;
1411 :
1412 113908 : while (p->related_value != elt)
1413 : p = p->related_value;
1414 30011 : p->related_value = elt->related_value;
1415 30011 : if (p->related_value == p)
1416 24432 : p->related_value = 0;
1417 : }
1418 :
1419 : /* Now add it to the free element chain. */
1420 68873866 : elt->next_same_hash = free_element_chain;
1421 68873866 : free_element_chain = elt;
1422 : }
1423 :
1424 : /* Same as above, but X is a pseudo-register. */
1425 :
1426 : static void
1427 91326804 : remove_pseudo_from_table (rtx x, unsigned int hash)
1428 : {
1429 91326804 : struct table_elt *elt;
1430 :
1431 : /* Because a pseudo-register can be referenced in more than one
1432 : mode, we might have to remove more than one table entry. */
1433 95739207 : while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1434 4412403 : remove_from_table (elt, hash);
1435 91326804 : }
1436 :
1437 : /* Look up X in the hash table and return its table element,
1438 : or 0 if X is not in the table.
1439 :
1440 : MODE is the machine-mode of X, or if X is an integer constant
1441 : with VOIDmode then MODE is the mode with which X will be used.
1442 :
1443 : Here we are satisfied to find an expression whose tree structure
1444 : looks like X. */
1445 :
1446 : static struct table_elt *
1447 490008174 : lookup (rtx x, unsigned int hash, machine_mode mode)
1448 : {
1449 490008174 : struct table_elt *p;
1450 :
1451 725186314 : for (p = table[hash]; p; p = p->next_same_hash)
1452 366374353 : if (mode == p->mode && ((x == p->exp && REG_P (x))
1453 143459296 : || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1454 131196213 : return p;
1455 :
1456 : return 0;
1457 : }
1458 :
1459 : /* Like `lookup' but don't care whether the table element uses invalid regs.
1460 : Also ignore discrepancies in the machine mode of a register. */
1461 :
1462 : static struct table_elt *
1463 95739207 : lookup_for_remove (rtx x, unsigned int hash, machine_mode mode)
1464 : {
1465 95739207 : struct table_elt *p;
1466 :
1467 95739207 : if (REG_P (x))
1468 : {
1469 95739207 : unsigned int regno = REGNO (x);
1470 :
1471 : /* Don't check the machine mode when comparing registers;
1472 : invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1473 173952718 : for (p = table[hash]; p; p = p->next_same_hash)
1474 82625914 : if (REG_P (p->exp)
1475 82625914 : && REGNO (p->exp) == regno)
1476 : return p;
1477 : }
1478 : else
1479 : {
1480 0 : for (p = table[hash]; p; p = p->next_same_hash)
1481 0 : if (mode == p->mode
1482 0 : && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1483 0 : return p;
1484 : }
1485 :
1486 : return 0;
1487 : }
1488 :
1489 : /* Look for an expression equivalent to X and with code CODE.
1490 : If one is found, return that expression. */
1491 :
1492 : static rtx
1493 58170488 : lookup_as_function (rtx x, enum rtx_code code)
1494 : {
1495 58170488 : struct table_elt *p
1496 58170488 : = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1497 :
1498 58170488 : if (p == 0)
1499 : return 0;
1500 :
1501 39440275 : for (p = p->first_same_value; p; p = p->next_same_value)
1502 27400914 : if (GET_CODE (p->exp) == code
1503 : /* Make sure this is a valid entry in the table. */
1504 27400914 : && exp_equiv_p (p->exp, p->exp, 1, false))
1505 929046 : return p->exp;
1506 :
1507 : return 0;
1508 : }
1509 :
1510 : /* Insert X in the hash table, assuming HASH is its hash code and
1511 : CLASSP is an element of the class it should go in (or 0 if a new
1512 : class should be made). COST is the code of X and reg_cost is the
1513 : cost of registers in X. It is inserted at the proper position to
1514 : keep the class in the order cheapest first.
1515 :
1516 : MODE is the machine-mode of X, or if X is an integer constant
1517 : with VOIDmode then MODE is the mode with which X will be used.
1518 :
1519 : For elements of equal cheapness, the most recent one
1520 : goes in front, except that the first element in the list
1521 : remains first unless a cheaper element is added. The order of
1522 : pseudo-registers does not matter, as canon_reg will be called to
1523 : find the cheapest when a register is retrieved from the table.
1524 :
1525 : The in_memory field in the hash table element is set to 0.
1526 : The caller must set it nonzero if appropriate.
1527 :
1528 : You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1529 : and if insert_regs returns a nonzero value
1530 : you must then recompute its hash code before calling here.
1531 :
1532 : If necessary, update table showing constant values of quantities. */
1533 :
1534 : static struct table_elt *
1535 261962955 : insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1536 : machine_mode mode, int cost, int reg_cost)
1537 : {
1538 261962955 : struct table_elt *elt;
1539 :
1540 : /* If X is a register and we haven't made a quantity for it,
1541 : something is wrong. */
1542 261962955 : gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1543 :
1544 : /* If X is a hard register, show it is being put in the table. */
1545 261962955 : if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1546 21950836 : add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1547 :
1548 : /* Put an element for X into the right hash bucket. */
1549 :
1550 261962955 : elt = free_element_chain;
1551 261962955 : if (elt)
1552 257015724 : free_element_chain = elt->next_same_hash;
1553 : else
1554 4947231 : elt = XNEW (struct table_elt);
1555 :
1556 261962955 : elt->exp = x;
1557 261962955 : elt->canon_exp = NULL_RTX;
1558 261962955 : elt->cost = cost;
1559 261962955 : elt->regcost = reg_cost;
1560 261962955 : elt->next_same_value = 0;
1561 261962955 : elt->prev_same_value = 0;
1562 261962955 : elt->next_same_hash = table[hash];
1563 261962955 : elt->prev_same_hash = 0;
1564 261962955 : elt->related_value = 0;
1565 261962955 : elt->in_memory = 0;
1566 261962955 : elt->mode = mode;
1567 261962955 : elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1568 :
1569 261962955 : if (table[hash])
1570 82056948 : table[hash]->prev_same_hash = elt;
1571 261962955 : table[hash] = elt;
1572 :
1573 : /* Put it into the proper value-class. */
1574 261962955 : if (classp)
1575 : {
1576 128059355 : classp = classp->first_same_value;
1577 128059355 : if (CHEAPER (elt, classp))
1578 : /* Insert at the head of the class. */
1579 : {
1580 59813237 : struct table_elt *p;
1581 59813237 : elt->next_same_value = classp;
1582 59813237 : classp->prev_same_value = elt;
1583 59813237 : elt->first_same_value = elt;
1584 :
1585 126455270 : for (p = classp; p; p = p->next_same_value)
1586 66642033 : p->first_same_value = elt;
1587 : }
1588 : else
1589 : {
1590 : /* Insert not at head of the class. */
1591 : /* Put it after the last element cheaper than X. */
1592 : struct table_elt *p, *next;
1593 :
1594 : for (p = classp;
1595 148990167 : (next = p->next_same_value) && CHEAPER (next, elt);
1596 : p = next)
1597 : ;
1598 :
1599 : /* Put it after P and before NEXT. */
1600 68246118 : elt->next_same_value = next;
1601 68246118 : if (next)
1602 16583867 : next->prev_same_value = elt;
1603 :
1604 68246118 : elt->prev_same_value = p;
1605 68246118 : p->next_same_value = elt;
1606 68246118 : elt->first_same_value = classp;
1607 : }
1608 : }
1609 : else
1610 133903600 : elt->first_same_value = elt;
1611 :
1612 : /* If this is a constant being set equivalent to a register or a register
1613 : being set equivalent to a constant, note the constant equivalence.
1614 :
1615 : If this is a constant, it cannot be equivalent to a different constant,
1616 : and a constant is the only thing that can be cheaper than a register. So
1617 : we know the register is the head of the class (before the constant was
1618 : inserted).
1619 :
1620 : If this is a register that is not already known equivalent to a
1621 : constant, we must check the entire class.
1622 :
1623 : If this is a register that is already known equivalent to an insn,
1624 : update the qtys `const_insn' to show that `this_insn' is the latest
1625 : insn making that quantity equivalent to the constant. */
1626 :
1627 261962955 : if (elt->is_const && classp && REG_P (classp->exp)
1628 3405015 : && !REG_P (x))
1629 : {
1630 3402754 : int exp_q = REG_QTY (REGNO (classp->exp));
1631 3402754 : struct qty_table_elem *exp_ent = &qty_table[exp_q];
1632 :
1633 3402754 : exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1634 3402754 : exp_ent->const_insn = this_insn;
1635 3402754 : }
1636 :
1637 258560201 : else if (REG_P (x)
1638 109035163 : && classp
1639 93376136 : && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1640 347346784 : && ! elt->is_const)
1641 : {
1642 : struct table_elt *p;
1643 :
1644 200450609 : for (p = classp; p != 0; p = p->next_same_value)
1645 : {
1646 125751207 : if (p->is_const && !REG_P (p->exp))
1647 : {
1648 14084901 : int x_q = REG_QTY (REGNO (x));
1649 14084901 : struct qty_table_elem *x_ent = &qty_table[x_q];
1650 :
1651 14084901 : x_ent->const_rtx
1652 14084901 : = gen_lowpart (GET_MODE (x), p->exp);
1653 14084901 : x_ent->const_insn = this_insn;
1654 14084901 : break;
1655 : }
1656 : }
1657 : }
1658 :
1659 169775898 : else if (REG_P (x)
1660 20250860 : && qty_table[REG_QTY (REGNO (x))].const_rtx
1661 174365453 : && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1662 4589555 : qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1663 :
1664 : /* If this is a constant with symbolic value,
1665 : and it has a term with an explicit integer value,
1666 : link it up with related expressions. */
1667 261962955 : if (GET_CODE (x) == CONST)
1668 : {
1669 819897 : rtx subexp = get_related_value (x);
1670 819897 : unsigned subhash;
1671 819897 : struct table_elt *subelt, *subelt_prev;
1672 :
1673 819897 : if (subexp != 0)
1674 : {
1675 : /* Get the integer-free subexpression in the hash table. */
1676 806170 : subhash = SAFE_HASH (subexp, mode);
1677 806170 : subelt = lookup (subexp, subhash, mode);
1678 806170 : if (subelt == 0)
1679 362909 : subelt = insert (subexp, NULL, subhash, mode);
1680 : /* Initialize SUBELT's circular chain if it has none. */
1681 806170 : if (subelt->related_value == 0)
1682 527431 : subelt->related_value = subelt;
1683 : /* Find the element in the circular chain that precedes SUBELT. */
1684 806170 : subelt_prev = subelt;
1685 2954015 : while (subelt_prev->related_value != subelt)
1686 : subelt_prev = subelt_prev->related_value;
1687 : /* Put new ELT into SUBELT's circular chain just before SUBELT.
1688 : This way the element that follows SUBELT is the oldest one. */
1689 806170 : elt->related_value = subelt_prev->related_value;
1690 806170 : subelt_prev->related_value = elt;
1691 : }
1692 : }
1693 :
1694 261962955 : return elt;
1695 : }
1696 :
1697 : /* Wrap insert_with_costs by passing the default costs. */
1698 :
1699 : static struct table_elt *
1700 261962955 : insert (rtx x, struct table_elt *classp, unsigned int hash,
1701 : machine_mode mode)
1702 : {
1703 523925910 : return insert_with_costs (x, classp, hash, mode,
1704 261962955 : COST (x, mode), approx_reg_cost (x));
1705 : }
1706 :
1707 :
1708 : /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1709 : CLASS2 into CLASS1. This is done when we have reached an insn which makes
1710 : the two classes equivalent.
1711 :
1712 : CLASS1 will be the surviving class; CLASS2 should not be used after this
1713 : call.
1714 :
1715 : Any invalid entries in CLASS2 will not be copied. */
1716 :
1717 : static void
1718 5310202 : merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1719 : {
1720 5310202 : struct table_elt *elt, *next, *new_elt;
1721 :
1722 : /* Ensure we start with the head of the classes. */
1723 5310202 : class1 = class1->first_same_value;
1724 5310202 : class2 = class2->first_same_value;
1725 :
1726 : /* If they were already equal, forget it. */
1727 5310202 : if (class1 == class2)
1728 : return;
1729 :
1730 12843301 : for (elt = class2; elt; elt = next)
1731 : {
1732 7533099 : unsigned int hash;
1733 7533099 : rtx exp = elt->exp;
1734 7533099 : machine_mode mode = elt->mode;
1735 :
1736 7533099 : next = elt->next_same_value;
1737 :
1738 : /* Remove old entry, make a new one in CLASS1's class.
1739 : Don't do this for invalid entries as we cannot find their
1740 : hash code (it also isn't necessary). */
1741 7533099 : if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1742 : {
1743 7533075 : bool need_rehash = false;
1744 :
1745 7533075 : hash_arg_in_memory = 0;
1746 7533075 : hash = HASH (exp, mode);
1747 :
1748 7533075 : if (REG_P (exp))
1749 : {
1750 2054959 : need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1751 2054959 : delete_reg_equiv (REGNO (exp));
1752 : }
1753 :
1754 7533075 : if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1755 2054317 : remove_pseudo_from_table (exp, hash);
1756 : else
1757 5478758 : remove_from_table (elt, hash);
1758 :
1759 7533075 : if (insert_regs (exp, class1, false) || need_rehash)
1760 : {
1761 2054959 : rehash_using_reg (exp);
1762 2054959 : hash = HASH (exp, mode);
1763 : }
1764 7533075 : new_elt = insert (exp, class1, hash, mode);
1765 7533075 : new_elt->in_memory = hash_arg_in_memory;
1766 7533075 : if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST)
1767 0 : new_elt->cost = MAX_COST;
1768 : }
1769 : }
1770 : }
1771 :
1772 : /* Flush the entire hash table. */
1773 :
1774 : static void
1775 7944 : flush_hash_table (void)
1776 : {
1777 7944 : int i;
1778 7944 : struct table_elt *p;
1779 :
1780 262152 : for (i = 0; i < HASH_SIZE; i++)
1781 1051047 : for (p = table[i]; p; p = table[i])
1782 : {
1783 : /* Note that invalidate can remove elements
1784 : after P in the current hash chain. */
1785 796839 : if (REG_P (p->exp))
1786 350339 : invalidate (p->exp, VOIDmode);
1787 : else
1788 446500 : remove_from_table (p, i);
1789 : }
1790 7944 : }
1791 :
1792 : /* Check whether an anti dependence exists between X and EXP. MODE and
1793 : ADDR are as for canon_anti_dependence. */
1794 :
1795 : static bool
1796 179799225 : check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr)
1797 : {
1798 179799225 : subrtx_iterator::array_type array;
1799 845349057 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
1800 : {
1801 673944990 : const_rtx x = *iter;
1802 673944990 : if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr))
1803 8395158 : return true;
1804 : }
1805 171404067 : return false;
1806 179799225 : }
1807 :
1808 : /* Remove from the hash table, or mark as invalid, all expressions whose
1809 : values could be altered by storing in register X. */
1810 :
1811 : static void
1812 218954620 : invalidate_reg (rtx x)
1813 : {
1814 218954620 : gcc_assert (GET_CODE (x) == REG);
1815 :
1816 : /* If X is a register, dependencies on its contents are recorded
1817 : through the qty number mechanism. Just change the qty number of
1818 : the register, mark it as invalid for expressions that refer to it,
1819 : and remove it itself. */
1820 218954620 : unsigned int regno = REGNO (x);
1821 218954620 : unsigned int hash = HASH (x, GET_MODE (x));
1822 :
1823 : /* Remove REGNO from any quantity list it might be on and indicate
1824 : that its value might have changed. If it is a pseudo, remove its
1825 : entry from the hash table.
1826 :
1827 : For a hard register, we do the first two actions above for any
1828 : additional hard registers corresponding to X. Then, if any of these
1829 : registers are in the table, we must remove any REG entries that
1830 : overlap these registers. */
1831 :
1832 218954620 : delete_reg_equiv (regno);
1833 218954620 : REG_TICK (regno)++;
1834 218954620 : SUBREG_TICKED (regno) = -1;
1835 :
1836 218954620 : if (regno >= FIRST_PSEUDO_REGISTER)
1837 89272487 : remove_pseudo_from_table (x, hash);
1838 : else
1839 : {
1840 129682133 : HOST_WIDE_INT in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1841 129682133 : unsigned int endregno = END_REGNO (x);
1842 129682133 : unsigned int rn;
1843 129682133 : struct table_elt *p, *next;
1844 :
1845 129682133 : CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1846 :
1847 130274330 : for (rn = regno + 1; rn < endregno; rn++)
1848 : {
1849 592197 : in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1850 592197 : CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1851 592197 : delete_reg_equiv (rn);
1852 592197 : REG_TICK (rn)++;
1853 592197 : SUBREG_TICKED (rn) = -1;
1854 : }
1855 :
1856 129682133 : if (in_table)
1857 405634812 : for (hash = 0; hash < HASH_SIZE; hash++)
1858 628941592 : for (p = table[hash]; p; p = next)
1859 : {
1860 235598744 : next = p->next_same_hash;
1861 :
1862 235598744 : if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1863 224915014 : continue;
1864 :
1865 10683730 : unsigned int tregno = REGNO (p->exp);
1866 10683730 : unsigned int tendregno = END_REGNO (p->exp);
1867 10683730 : if (tendregno > regno && tregno < endregno)
1868 10613115 : remove_from_table (p, hash);
1869 : }
1870 : }
1871 218954620 : }
1872 :
1873 : /* Remove from the hash table, or mark as invalid, all expressions whose
1874 : values could be altered by storing in X. X is a register, a subreg, or
1875 : a memory reference with nonvarying address (because, when a memory
1876 : reference with a varying address is stored in, all memory references are
1877 : removed by invalidate_memory so specific invalidation is superfluous).
1878 : FULL_MODE, if not VOIDmode, indicates that this much should be
1879 : invalidated instead of just the amount indicated by the mode of X. This
1880 : is only used for bitfield stores into memory.
1881 :
1882 : A nonvarying address may be just a register or just a symbol reference,
1883 : or it may be either of those plus a numeric offset. */
1884 :
1885 : static void
1886 247534440 : invalidate (rtx x, machine_mode full_mode)
1887 : {
1888 249112084 : int i;
1889 249112084 : struct table_elt *p;
1890 249112084 : rtx addr;
1891 :
1892 249112084 : switch (GET_CODE (x))
1893 : {
1894 218954430 : case REG:
1895 218954430 : invalidate_reg (x);
1896 218954430 : return;
1897 :
1898 1532421 : case SUBREG:
1899 1532421 : invalidate (SUBREG_REG (x), VOIDmode);
1900 1532421 : return;
1901 :
1902 26088 : case PARALLEL:
1903 71311 : for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1904 45223 : invalidate (XVECEXP (x, 0, i), VOIDmode);
1905 : return;
1906 :
1907 45223 : case EXPR_LIST:
1908 : /* This is part of a disjoint return value; extract the location in
1909 : question ignoring the offset. */
1910 45223 : invalidate (XEXP (x, 0), VOIDmode);
1911 45223 : return;
1912 :
1913 28553922 : case MEM:
1914 28553922 : addr = canon_rtx (get_addr (XEXP (x, 0)));
1915 : /* Calculate the canonical version of X here so that
1916 : true_dependence doesn't generate new RTL for X on each call. */
1917 28553922 : x = canon_rtx (x);
1918 :
1919 : /* Remove all hash table elements that refer to overlapping pieces of
1920 : memory. */
1921 28553922 : if (full_mode == VOIDmode)
1922 28552970 : full_mode = GET_MODE (x);
1923 :
1924 942279426 : for (i = 0; i < HASH_SIZE; i++)
1925 : {
1926 913725504 : struct table_elt *next;
1927 :
1928 1846888894 : for (p = table[i]; p; p = next)
1929 : {
1930 933163390 : next = p->next_same_hash;
1931 933163390 : if (p->in_memory)
1932 : {
1933 : /* Just canonicalize the expression once;
1934 : otherwise each time we call invalidate
1935 : true_dependence will canonicalize the
1936 : expression again. */
1937 179799225 : if (!p->canon_exp)
1938 26952230 : p->canon_exp = canon_rtx (p->exp);
1939 179799225 : if (check_dependence (p->canon_exp, x, full_mode, addr))
1940 8395158 : remove_from_table (p, i);
1941 : }
1942 : }
1943 : }
1944 : return;
1945 :
1946 0 : default:
1947 0 : gcc_unreachable ();
1948 : }
1949 : }
1950 :
1951 : /* Invalidate DEST. Used when DEST is not going to be added
1952 : into the hash table for some reason, e.g. do_not_record
1953 : flagged on it. */
1954 :
1955 : static void
1956 54727874 : invalidate_dest (rtx dest)
1957 : {
1958 54727874 : if (REG_P (dest)
1959 26731137 : || GET_CODE (dest) == SUBREG
1960 26731137 : || MEM_P (dest))
1961 34564397 : invalidate (dest, VOIDmode);
1962 20163477 : else if (GET_CODE (dest) == STRICT_LOW_PART
1963 20163477 : || GET_CODE (dest) == ZERO_EXTRACT)
1964 960 : invalidate (XEXP (dest, 0), GET_MODE (dest));
1965 54727874 : }
1966 :
1967 : /* Remove all expressions that refer to register REGNO,
1968 : since they are already invalid, and we are about to
1969 : mark that register valid again and don't want the old
1970 : expressions to reappear as valid. */
1971 :
1972 : static void
1973 13133727 : remove_invalid_refs (unsigned int regno)
1974 : {
1975 13133727 : unsigned int i;
1976 13133727 : struct table_elt *p, *next;
1977 :
1978 433412991 : for (i = 0; i < HASH_SIZE; i++)
1979 663535293 : for (p = table[i]; p; p = next)
1980 : {
1981 243256029 : next = p->next_same_hash;
1982 243256029 : if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp))
1983 17227775 : remove_from_table (p, i);
1984 : }
1985 13133727 : }
1986 :
1987 : /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1988 : and mode MODE. */
1989 : static void
1990 0 : remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset,
1991 : machine_mode mode)
1992 : {
1993 0 : unsigned int i;
1994 0 : struct table_elt *p, *next;
1995 :
1996 0 : for (i = 0; i < HASH_SIZE; i++)
1997 0 : for (p = table[i]; p; p = next)
1998 : {
1999 0 : rtx exp = p->exp;
2000 0 : next = p->next_same_hash;
2001 :
2002 0 : if (!REG_P (exp)
2003 0 : && (GET_CODE (exp) != SUBREG
2004 0 : || !REG_P (SUBREG_REG (exp))
2005 0 : || REGNO (SUBREG_REG (exp)) != regno
2006 0 : || ranges_maybe_overlap_p (SUBREG_BYTE (exp),
2007 0 : GET_MODE_SIZE (GET_MODE (exp)),
2008 0 : offset, GET_MODE_SIZE (mode)))
2009 0 : && refers_to_regno_p (regno, p->exp))
2010 0 : remove_from_table (p, i);
2011 : }
2012 0 : }
2013 :
2014 : /* Recompute the hash codes of any valid entries in the hash table that
2015 : reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2016 :
2017 : This is called when we make a jump equivalence. */
2018 :
2019 : static void
2020 125121467 : rehash_using_reg (rtx x)
2021 : {
2022 125121467 : unsigned int i;
2023 125121467 : struct table_elt *p, *next;
2024 125121467 : unsigned hash;
2025 :
2026 125121467 : if (GET_CODE (x) == SUBREG)
2027 1607388 : x = SUBREG_REG (x);
2028 :
2029 : /* If X is not a register or if the register is known not to be in any
2030 : valid entries in the table, we have no work to do. */
2031 :
2032 125121467 : if (!REG_P (x)
2033 115479632 : || REG_IN_TABLE (REGNO (x)) < 0
2034 130131161 : || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2035 120112293 : return;
2036 :
2037 : /* Scan all hash chains looking for valid entries that mention X.
2038 : If we find one and it is in the wrong hash chain, move it. */
2039 :
2040 165302742 : for (i = 0; i < HASH_SIZE; i++)
2041 269443421 : for (p = table[i]; p; p = next)
2042 : {
2043 109149853 : next = p->next_same_hash;
2044 109149853 : if (reg_mentioned_p (x, p->exp)
2045 4896228 : && exp_equiv_p (p->exp, p->exp, 1, false)
2046 114045920 : && i != (hash = SAFE_HASH (p->exp, p->mode)))
2047 : {
2048 3498242 : if (p->next_same_hash)
2049 1135451 : p->next_same_hash->prev_same_hash = p->prev_same_hash;
2050 :
2051 3498242 : if (p->prev_same_hash)
2052 645450 : p->prev_same_hash->next_same_hash = p->next_same_hash;
2053 : else
2054 2852792 : table[i] = p->next_same_hash;
2055 :
2056 3498242 : p->next_same_hash = table[hash];
2057 3498242 : p->prev_same_hash = 0;
2058 3498242 : if (table[hash])
2059 1719113 : table[hash]->prev_same_hash = p;
2060 3498242 : table[hash] = p;
2061 : }
2062 : }
2063 : }
2064 :
2065 : /* Remove from the hash table any expression that is a call-clobbered
2066 : register in INSN. Also update their TICK values. */
2067 :
2068 : static void
2069 15302813 : invalidate_for_call (rtx_insn *insn)
2070 : {
2071 15302813 : unsigned int regno;
2072 15302813 : unsigned hash;
2073 15302813 : struct table_elt *p, *next;
2074 15302813 : int in_table = 0;
2075 15302813 : hard_reg_set_iterator hrsi;
2076 :
2077 : /* Go through all the hard registers. For each that might be clobbered
2078 : in call insn INSN, remove the register from quantity chains and update
2079 : reg_tick if defined. Also see if any of these registers is currently
2080 : in the table.
2081 :
2082 : ??? We could be more precise for partially-clobbered registers,
2083 : and only invalidate values that actually occupy the clobbered part
2084 : of the registers. It doesn't seem worth the effort though, since
2085 : we shouldn't see this situation much before RA. Whatever choice
2086 : we make here has to be consistent with the table walk below,
2087 : so any change to this test will require a change there too. */
2088 15302813 : HARD_REG_SET callee_clobbers
2089 15302813 : = insn_callee_abi (insn).full_and_partial_reg_clobbers ();
2090 1265773702 : EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi)
2091 : {
2092 1250470889 : delete_reg_equiv (regno);
2093 1250470889 : if (REG_TICK (regno) >= 0)
2094 : {
2095 1250470889 : REG_TICK (regno)++;
2096 1250470889 : SUBREG_TICKED (regno) = -1;
2097 : }
2098 1250470889 : in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2099 : }
2100 :
2101 : /* In the case where we have no call-clobbered hard registers in the
2102 : table, we are done. Otherwise, scan the table and remove any
2103 : entry that overlaps a call-clobbered register. */
2104 :
2105 15302813 : if (in_table)
2106 116369352 : for (hash = 0; hash < HASH_SIZE; hash++)
2107 168047778 : for (p = table[hash]; p; p = next)
2108 : {
2109 55204770 : next = p->next_same_hash;
2110 :
2111 107385017 : if (!REG_P (p->exp)
2112 55204770 : || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2113 52180247 : continue;
2114 :
2115 : /* This must use the same test as above rather than the
2116 : more accurate clobbers_reg_p. */
2117 3024523 : if (overlaps_hard_reg_set_p (callee_clobbers, GET_MODE (p->exp),
2118 3024523 : REGNO (p->exp)))
2119 3004717 : remove_from_table (p, hash);
2120 : }
2121 15302813 : }
2122 :
2123 : /* Given an expression X of type CONST,
2124 : and ELT which is its table entry (or 0 if it
2125 : is not in the hash table),
2126 : return an alternate expression for X as a register plus integer.
2127 : If none can be found, return 0. */
2128 :
2129 : static rtx
2130 727557 : use_related_value (rtx x, struct table_elt *elt)
2131 : {
2132 727557 : struct table_elt *relt = 0;
2133 727557 : struct table_elt *p, *q;
2134 727557 : HOST_WIDE_INT offset;
2135 :
2136 : /* First, is there anything related known?
2137 : If we have a table element, we can tell from that.
2138 : Otherwise, must look it up. */
2139 :
2140 727557 : if (elt != 0 && elt->related_value != 0)
2141 : relt = elt;
2142 550528 : else if (elt == 0 && GET_CODE (x) == CONST)
2143 : {
2144 550528 : rtx subexp = get_related_value (x);
2145 550528 : if (subexp != 0)
2146 536802 : relt = lookup (subexp,
2147 : SAFE_HASH (subexp, GET_MODE (subexp)),
2148 536802 : GET_MODE (subexp));
2149 : }
2150 :
2151 670251 : if (relt == 0)
2152 392078 : return 0;
2153 :
2154 : /* Search all related table entries for one that has an
2155 : equivalent register. */
2156 :
2157 : p = relt;
2158 980034 : while (1)
2159 : {
2160 : /* This loop is strange in that it is executed in two different cases.
2161 : The first is when X is already in the table. Then it is searching
2162 : the RELATED_VALUE list of X's class (RELT). The second case is when
2163 : X is not in the table. Then RELT points to a class for the related
2164 : value.
2165 :
2166 : Ensure that, whatever case we are in, that we ignore classes that have
2167 : the same value as X. */
2168 :
2169 980034 : if (rtx_equal_p (x, p->exp))
2170 : q = 0;
2171 : else
2172 1960952 : for (q = p->first_same_value; q; q = q->next_same_value)
2173 1344799 : if (REG_P (q->exp))
2174 : break;
2175 :
2176 846585 : if (q)
2177 : break;
2178 :
2179 749602 : p = p->related_value;
2180 :
2181 : /* We went all the way around, so there is nothing to be found.
2182 : Alternatively, perhaps RELT was in the table for some other reason
2183 : and it has no related values recorded. */
2184 749602 : if (p == relt || p == 0)
2185 : break;
2186 : }
2187 :
2188 335479 : if (q == 0)
2189 : return 0;
2190 :
2191 230432 : offset = (get_integer_term (x) - get_integer_term (p->exp));
2192 : /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2193 230432 : return plus_constant (q->mode, q->exp, offset);
2194 : }
2195 :
2196 :
2197 : /* Hash a string. Just add its bytes up. */
2198 : static inline unsigned
2199 130625 : hash_rtx_string (const char *ps)
2200 : {
2201 130625 : unsigned hash = 0;
2202 130625 : const unsigned char *p = (const unsigned char *) ps;
2203 :
2204 130625 : if (p)
2205 743605 : while (*p)
2206 612980 : hash += *p++;
2207 :
2208 130625 : return hash;
2209 : }
2210 :
2211 : /* Hash an rtx. We are careful to make sure the value is never negative.
2212 : Equivalent registers hash identically.
2213 : MODE is used in hashing for CONST_INTs only;
2214 : otherwise the mode of X is used.
2215 :
2216 : Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2217 :
2218 : If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2219 : a MEM rtx which does not have the MEM_READONLY_P flag set.
2220 :
2221 : Note that cse_insn knows that the hash code of a MEM expression
2222 : is just (int) MEM plus the hash code of the address.
2223 :
2224 : Call CB on each rtx if CB is not NULL.
2225 : When the callback returns true, we continue with the new rtx. */
2226 :
2227 : unsigned
2228 1273248018 : hash_rtx (const_rtx x, machine_mode mode,
2229 : int *do_not_record_p, int *hash_arg_in_memory_p,
2230 : bool have_reg_qty, hash_rtx_callback_function cb)
2231 : {
2232 1273248018 : int i, j;
2233 1273248018 : unsigned hash = 0;
2234 1880061587 : enum rtx_code code;
2235 1880061587 : const char *fmt;
2236 1880061587 : machine_mode newmode;
2237 1880061587 : rtx newx;
2238 :
2239 : /* Used to turn recursion into iteration. We can't rely on GCC's
2240 : tail-recursion elimination since we need to keep accumulating values
2241 : in HASH. */
2242 1880061587 : repeat:
2243 1880061587 : if (x == 0)
2244 : return hash;
2245 :
2246 : /* Invoke the callback first. */
2247 1880061587 : if (cb != NULL
2248 1880061587 : && ((*cb) (x, mode, &newx, &newmode)))
2249 : {
2250 0 : hash += hash_rtx (newx, newmode, do_not_record_p,
2251 : hash_arg_in_memory_p, have_reg_qty, cb);
2252 0 : return hash;
2253 : }
2254 :
2255 1880061587 : code = GET_CODE (x);
2256 1880061587 : switch (code)
2257 : {
2258 657344318 : case REG:
2259 657344318 : {
2260 657344318 : unsigned int regno = REGNO (x);
2261 :
2262 657344318 : if (do_not_record_p && !reload_completed)
2263 : {
2264 : /* On some machines, we can't record any non-fixed hard register,
2265 : because extending its life will cause reload problems. We
2266 : consider ap, fp, sp, gp to be fixed for this purpose.
2267 :
2268 : We also consider CCmode registers to be fixed for this purpose;
2269 : failure to do so leads to failure to simplify 0<100 type of
2270 : conditionals.
2271 :
2272 : On all machines, we can't record any global registers.
2273 : Nor should we record any register that is in a small
2274 : class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2275 653891665 : bool record;
2276 :
2277 653891665 : if (regno >= FIRST_PSEUDO_REGISTER)
2278 : record = true;
2279 433238556 : else if (x == frame_pointer_rtx
2280 302696138 : || x == hard_frame_pointer_rtx
2281 302579237 : || x == arg_pointer_rtx
2282 294961464 : || x == stack_pointer_rtx
2283 259672954 : || x == pic_offset_table_rtx)
2284 : record = true;
2285 259672954 : else if (global_regs[regno])
2286 : record = false;
2287 259672583 : else if (fixed_regs[regno])
2288 : record = true;
2289 76675422 : else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2290 : record = true;
2291 76675422 : else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2292 : record = false;
2293 0 : else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2294 : record = false;
2295 : else
2296 : record = true;
2297 :
2298 : if (!record)
2299 : {
2300 76675793 : *do_not_record_p = 1;
2301 76675793 : return 0;
2302 : }
2303 : }
2304 :
2305 580668525 : hash += ((unsigned int) REG << 7);
2306 580668525 : hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2307 580668525 : return hash;
2308 : }
2309 :
2310 : /* We handle SUBREG of a REG specially because the underlying
2311 : reg changes its hash value with every value change; we don't
2312 : want to have to forget unrelated subregs when one subreg changes. */
2313 32988711 : case SUBREG:
2314 32988711 : {
2315 32988711 : if (REG_P (SUBREG_REG (x)))
2316 : {
2317 65867598 : hash += (((unsigned int) SUBREG << 7)
2318 32933799 : + REGNO (SUBREG_REG (x))
2319 32933799 : + (constant_lower_bound (SUBREG_BYTE (x))
2320 32933799 : / UNITS_PER_WORD));
2321 32933799 : return hash;
2322 : }
2323 : break;
2324 : }
2325 :
2326 339837818 : case CONST_INT:
2327 339837818 : hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2328 339837818 : + (unsigned int) INTVAL (x));
2329 339837818 : return hash;
2330 :
2331 : case CONST_WIDE_INT:
2332 2994084 : for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
2333 1996220 : hash += CONST_WIDE_INT_ELT (x, i);
2334 : return hash;
2335 :
2336 0 : case CONST_POLY_INT:
2337 0 : {
2338 0 : inchash::hash h;
2339 0 : h.add_int (hash);
2340 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2341 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
2342 0 : return h.end ();
2343 : }
2344 :
2345 4289455 : case CONST_DOUBLE:
2346 : /* This is like the general case, except that it only counts
2347 : the integers representing the constant. */
2348 4289455 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2349 4289455 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
2350 : hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2351 : + (unsigned int) CONST_DOUBLE_HIGH (x));
2352 : else
2353 4289455 : hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2354 4289455 : return hash;
2355 :
2356 0 : case CONST_FIXED:
2357 0 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2358 0 : hash += fixed_hash (CONST_FIXED_VALUE (x));
2359 0 : return hash;
2360 :
2361 3536720 : case CONST_VECTOR:
2362 3536720 : {
2363 3536720 : int units;
2364 3536720 : rtx elt;
2365 :
2366 3536720 : units = const_vector_encoded_nelts (x);
2367 :
2368 9734681 : for (i = 0; i < units; ++i)
2369 : {
2370 6197961 : elt = CONST_VECTOR_ENCODED_ELT (x, i);
2371 6197961 : hash += hash_rtx (elt, GET_MODE (elt),
2372 : do_not_record_p, hash_arg_in_memory_p,
2373 : have_reg_qty, cb);
2374 : }
2375 :
2376 : return hash;
2377 : }
2378 :
2379 : /* Assume there is only one rtx object for any given label. */
2380 20409763 : case LABEL_REF:
2381 : /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2382 : differences and differences between each stage's debugging dumps. */
2383 20409763 : hash += (((unsigned int) LABEL_REF << 7)
2384 20409763 : + CODE_LABEL_NUMBER (label_ref_label (x)));
2385 20409763 : return hash;
2386 :
2387 150333473 : case SYMBOL_REF:
2388 150333473 : {
2389 : /* Don't hash on the symbol's address to avoid bootstrap differences.
2390 : Different hash values may cause expressions to be recorded in
2391 : different orders and thus different registers to be used in the
2392 : final assembler. This also avoids differences in the dump files
2393 : between various stages. */
2394 150333473 : unsigned int h = 0;
2395 150333473 : const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2396 :
2397 3275614670 : while (*p)
2398 3125281197 : h += (h << 7) + *p++; /* ??? revisit */
2399 :
2400 150333473 : hash += ((unsigned int) SYMBOL_REF << 7) + h;
2401 150333473 : return hash;
2402 : }
2403 :
2404 264079546 : case MEM:
2405 : /* We don't record if marked volatile or if BLKmode since we don't
2406 : know the size of the move. */
2407 264079546 : if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2408 : {
2409 5159434 : *do_not_record_p = 1;
2410 5159434 : return 0;
2411 : }
2412 258920112 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2413 59261344 : *hash_arg_in_memory_p = 1;
2414 :
2415 : /* Now that we have already found this special case,
2416 : might as well speed it up as much as possible. */
2417 258920112 : hash += (unsigned) MEM;
2418 258920112 : x = XEXP (x, 0);
2419 258920112 : goto repeat;
2420 :
2421 70 : case USE:
2422 : /* A USE that mentions non-volatile memory needs special
2423 : handling since the MEM may be BLKmode which normally
2424 : prevents an entry from being made. Pure calls are
2425 : marked by a USE which mentions BLKmode memory.
2426 : See calls.cc:emit_call_1. */
2427 70 : if (MEM_P (XEXP (x, 0))
2428 70 : && ! MEM_VOLATILE_P (XEXP (x, 0)))
2429 : {
2430 0 : hash += (unsigned) USE;
2431 0 : x = XEXP (x, 0);
2432 :
2433 0 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2434 0 : *hash_arg_in_memory_p = 1;
2435 :
2436 : /* Now that we have already found this special case,
2437 : might as well speed it up as much as possible. */
2438 0 : hash += (unsigned) MEM;
2439 0 : x = XEXP (x, 0);
2440 0 : goto repeat;
2441 : }
2442 : break;
2443 :
2444 51927641 : case PRE_DEC:
2445 51927641 : case PRE_INC:
2446 51927641 : case POST_DEC:
2447 51927641 : case POST_INC:
2448 51927641 : case PRE_MODIFY:
2449 51927641 : case POST_MODIFY:
2450 51927641 : case PC:
2451 51927641 : case CALL:
2452 51927641 : case UNSPEC_VOLATILE:
2453 51927641 : if (do_not_record_p) {
2454 51926176 : *do_not_record_p = 1;
2455 51926176 : return 0;
2456 : }
2457 : else
2458 : return hash;
2459 196344 : break;
2460 :
2461 196344 : case ASM_OPERANDS:
2462 196344 : if (do_not_record_p && MEM_VOLATILE_P (x))
2463 : {
2464 159415 : *do_not_record_p = 1;
2465 159415 : return 0;
2466 : }
2467 : else
2468 : {
2469 : /* We don't want to take the filename and line into account. */
2470 73858 : hash += (unsigned) code + (unsigned) GET_MODE (x)
2471 36929 : + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2472 36929 : + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2473 36929 : + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2474 :
2475 36929 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2476 : {
2477 56767 : for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2478 : {
2479 49292 : hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2480 24646 : GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2481 : do_not_record_p, hash_arg_in_memory_p,
2482 : have_reg_qty, cb)
2483 24646 : + hash_rtx_string
2484 49292 : (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2485 : }
2486 :
2487 32121 : hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2488 32121 : x = ASM_OPERANDS_INPUT (x, 0);
2489 32121 : mode = GET_MODE (x);
2490 32121 : goto repeat;
2491 : }
2492 :
2493 : return hash;
2494 : }
2495 : break;
2496 :
2497 : default:
2498 : break;
2499 : }
2500 :
2501 354174846 : i = GET_RTX_LENGTH (code) - 1;
2502 354174846 : hash += (unsigned) code + (unsigned) GET_MODE (x);
2503 354174846 : fmt = GET_RTX_FORMAT (code);
2504 717011086 : for (; i >= 0; i--)
2505 : {
2506 710697576 : switch (fmt[i])
2507 : {
2508 699129563 : case 'e':
2509 : /* If we are about to do the last recursive call
2510 : needed at this level, change it into iteration.
2511 : This function is called enough to be worth it. */
2512 699129563 : if (i == 0)
2513 : {
2514 347861336 : x = XEXP (x, i);
2515 347861336 : goto repeat;
2516 : }
2517 :
2518 351268227 : hash += hash_rtx (XEXP (x, i), VOIDmode, do_not_record_p,
2519 : hash_arg_in_memory_p,
2520 : have_reg_qty, cb);
2521 351268227 : break;
2522 :
2523 : case 'E':
2524 16117552 : for (j = 0; j < XVECLEN (x, i); j++)
2525 9804304 : hash += hash_rtx (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2526 : hash_arg_in_memory_p,
2527 : have_reg_qty, cb);
2528 : break;
2529 :
2530 0 : case 's':
2531 0 : hash += hash_rtx_string (XSTR (x, i));
2532 0 : break;
2533 :
2534 5199798 : case 'i':
2535 5199798 : hash += (unsigned int) XINT (x, i);
2536 5199798 : break;
2537 :
2538 0 : case 'L':
2539 0 : hash += (unsigned int) XLOC (x, i);
2540 0 : break;
2541 :
2542 54912 : case 'p':
2543 54912 : hash += constant_lower_bound (SUBREG_BYTE (x));
2544 54912 : break;
2545 :
2546 : case '0': case 't':
2547 : /* Unused. */
2548 : break;
2549 :
2550 0 : default:
2551 0 : gcc_unreachable ();
2552 : }
2553 : }
2554 :
2555 : return hash;
2556 : }
2557 :
2558 : /* Hash an rtx X for cse via hash_rtx.
2559 : Stores 1 in do_not_record if any subexpression is volatile.
2560 : Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2561 : does not have the MEM_READONLY_P flag set. */
2562 :
2563 : static inline unsigned
2564 513126218 : canon_hash (rtx x, machine_mode mode)
2565 : {
2566 513126218 : return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2567 : }
2568 :
2569 : /* Like canon_hash but with no side effects, i.e. do_not_record
2570 : and hash_arg_in_memory are not changed. */
2571 :
2572 : static inline unsigned
2573 162396045 : safe_hash (rtx x, machine_mode mode)
2574 : {
2575 162396045 : int dummy_do_not_record;
2576 162396045 : return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2577 : }
2578 :
2579 : /* Return true iff X and Y would canonicalize into the same thing,
2580 : without actually constructing the canonicalization of either one.
2581 : If VALIDATE is nonzero,
2582 : we assume X is an expression being processed from the rtl
2583 : and Y was found in the hash table. We check register refs
2584 : in Y for being marked as valid.
2585 :
2586 : If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2587 :
2588 : bool
2589 754407715 : exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2590 : {
2591 754407715 : int i, j;
2592 754407715 : enum rtx_code code;
2593 754407715 : const char *fmt;
2594 :
2595 : /* Note: it is incorrect to assume an expression is equivalent to itself
2596 : if VALIDATE is nonzero. */
2597 754407715 : if (x == y && !validate)
2598 : return true;
2599 :
2600 731779913 : if (x == 0 || y == 0)
2601 : return x == y;
2602 :
2603 731779913 : code = GET_CODE (x);
2604 731779913 : if (code != GET_CODE (y))
2605 : return false;
2606 :
2607 : /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2608 625677317 : if (GET_MODE (x) != GET_MODE (y))
2609 : return false;
2610 :
2611 : /* MEMs referring to different address space are not equivalent. */
2612 651505521 : if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2613 : return false;
2614 :
2615 550162786 : switch (code)
2616 : {
2617 : case PC:
2618 : CASE_CONST_UNIQUE:
2619 : return x == y;
2620 :
2621 : case CONST_VECTOR:
2622 : if (!same_vector_encodings_p (x, y))
2623 : return false;
2624 : break;
2625 :
2626 24870 : case LABEL_REF:
2627 24870 : return label_ref_label (x) == label_ref_label (y);
2628 :
2629 16953421 : case SYMBOL_REF:
2630 16953421 : return XSTR (x, 0) == XSTR (y, 0);
2631 :
2632 163689511 : case REG:
2633 163689511 : if (for_gcse)
2634 1486066 : return REGNO (x) == REGNO (y);
2635 : else
2636 : {
2637 162203445 : unsigned int regno = REGNO (y);
2638 162203445 : unsigned int i;
2639 162203445 : unsigned int endregno = END_REGNO (y);
2640 :
2641 : /* If the quantities are not the same, the expressions are not
2642 : equivalent. If there are and we are not to validate, they
2643 : are equivalent. Otherwise, ensure all regs are up-to-date. */
2644 :
2645 162203445 : if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2646 : return false;
2647 :
2648 148879793 : if (! validate)
2649 : return true;
2650 :
2651 275951399 : for (i = regno; i < endregno; i++)
2652 139133399 : if (REG_IN_TABLE (i) != REG_TICK (i))
2653 : return false;
2654 :
2655 : return true;
2656 : }
2657 :
2658 99466930 : case MEM:
2659 99466930 : if (for_gcse)
2660 : {
2661 : /* A volatile mem should not be considered equivalent to any
2662 : other. */
2663 56616490 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2664 : return false;
2665 :
2666 : /* Can't merge two expressions in different alias sets, since we
2667 : can decide that the expression is transparent in a block when
2668 : it isn't, due to it being set with the different alias set.
2669 :
2670 : Also, can't merge two expressions with different MEM_ATTRS.
2671 : They could e.g. be two different entities allocated into the
2672 : same space on the stack (see e.g. PR25130). In that case, the
2673 : MEM addresses can be the same, even though the two MEMs are
2674 : absolutely not equivalent.
2675 :
2676 : But because really all MEM attributes should be the same for
2677 : equivalent MEMs, we just use the invariant that MEMs that have
2678 : the same attributes share the same mem_attrs data structure. */
2679 56506810 : if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y)))
2680 : return false;
2681 :
2682 : /* If we are handling exceptions, we cannot consider two expressions
2683 : with different trapping status as equivalent, because simple_mem
2684 : might accept one and reject the other. */
2685 9027611 : if (cfun->can_throw_non_call_exceptions
2686 9027611 : && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y)))
2687 : return false;
2688 : }
2689 : break;
2690 :
2691 : /* For commutative operations, check both orders. */
2692 69033662 : case PLUS:
2693 69033662 : case MULT:
2694 69033662 : case AND:
2695 69033662 : case IOR:
2696 69033662 : case XOR:
2697 69033662 : case NE:
2698 69033662 : case EQ:
2699 69033662 : return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2700 : validate, for_gcse)
2701 63154326 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2702 : validate, for_gcse))
2703 75688064 : || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2704 : validate, for_gcse)
2705 17740 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2706 : validate, for_gcse)));
2707 :
2708 12820 : case ASM_OPERANDS:
2709 : /* We don't use the generic code below because we want to
2710 : disregard filename and line numbers. */
2711 :
2712 : /* A volatile asm isn't equivalent to any other. */
2713 12820 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2714 : return false;
2715 :
2716 12820 : if (GET_MODE (x) != GET_MODE (y)
2717 12820 : || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2718 12820 : || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2719 12820 : ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2720 12810 : || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2721 12810 : || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2722 : return false;
2723 :
2724 12810 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2725 : {
2726 17234 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2727 8716 : if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2728 8716 : ASM_OPERANDS_INPUT (y, i),
2729 : validate, for_gcse)
2730 8716 : || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2731 8636 : ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2732 : return false;
2733 : }
2734 :
2735 : return true;
2736 :
2737 : default:
2738 : break;
2739 : }
2740 :
2741 : /* Compare the elements. If any pair of corresponding elements
2742 : fail to match, return 0 for the whole thing. */
2743 :
2744 118956688 : fmt = GET_RTX_FORMAT (code);
2745 332668780 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2746 : {
2747 225810218 : switch (fmt[i])
2748 : {
2749 153802880 : case 'e':
2750 153802880 : if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2751 : validate, for_gcse))
2752 : return false;
2753 : break;
2754 :
2755 8965045 : case 'E':
2756 8965045 : if (XVECLEN (x, i) != XVECLEN (y, i))
2757 : return 0;
2758 41973278 : for (j = 0; j < XVECLEN (x, i); j++)
2759 33855389 : if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2760 : validate, for_gcse))
2761 : return false;
2762 : break;
2763 :
2764 0 : case 's':
2765 0 : if (strcmp (XSTR (x, i), XSTR (y, i)))
2766 : return false;
2767 : break;
2768 :
2769 3476663 : case 'i':
2770 3476663 : if (XINT (x, i) != XINT (y, i))
2771 : return false;
2772 : break;
2773 :
2774 0 : case 'L':
2775 0 : if (XLOC (x, i) != XLOC (y, i))
2776 : return false;
2777 : break;
2778 :
2779 0 : case 'w':
2780 0 : if (XWINT (x, i) != XWINT (y, i))
2781 : return false;
2782 : break;
2783 :
2784 7697492 : case 'p':
2785 7697492 : if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2786 : return false;
2787 : break;
2788 :
2789 : case '0':
2790 : case 't':
2791 : break;
2792 :
2793 0 : default:
2794 0 : gcc_unreachable ();
2795 : }
2796 : }
2797 :
2798 : return true;
2799 : }
2800 :
2801 : /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2802 : the result if necessary. INSN is as for canon_reg. */
2803 :
2804 : static void
2805 1028482214 : validate_canon_reg (rtx *xloc, rtx_insn *insn)
2806 : {
2807 1028482214 : if (*xloc)
2808 : {
2809 1028482214 : rtx new_rtx = canon_reg (*xloc, insn);
2810 :
2811 : /* If replacing pseudo with hard reg or vice versa, ensure the
2812 : insn remains valid. Likewise if the insn has MATCH_DUPs. */
2813 1028482214 : gcc_assert (insn && new_rtx);
2814 1028482214 : validate_change (insn, xloc, new_rtx, 1);
2815 : }
2816 1028482214 : }
2817 :
2818 : /* Canonicalize an expression:
2819 : replace each register reference inside it
2820 : with the "oldest" equivalent register.
2821 :
2822 : If INSN is nonzero validate_change is used to ensure that INSN remains valid
2823 : after we make our substitution. The calls are made with IN_GROUP nonzero
2824 : so apply_change_group must be called upon the outermost return from this
2825 : function (unless INSN is zero). The result of apply_change_group can
2826 : generally be discarded since the changes we are making are optional. */
2827 :
2828 : static rtx
2829 1685091584 : canon_reg (rtx x, rtx_insn *insn)
2830 : {
2831 1685091584 : int i;
2832 1685091584 : enum rtx_code code;
2833 1685091584 : const char *fmt;
2834 :
2835 1685091584 : if (x == 0)
2836 : return x;
2837 :
2838 1685091584 : code = GET_CODE (x);
2839 1685091584 : switch (code)
2840 : {
2841 : case PC:
2842 : case CONST:
2843 : CASE_CONST_ANY:
2844 : case SYMBOL_REF:
2845 : case LABEL_REF:
2846 : case ADDR_VEC:
2847 : case ADDR_DIFF_VEC:
2848 : return x;
2849 :
2850 469951722 : case REG:
2851 469951722 : {
2852 469951722 : int first;
2853 469951722 : int q;
2854 469951722 : struct qty_table_elem *ent;
2855 :
2856 : /* Never replace a hard reg, because hard regs can appear
2857 : in more than one machine mode, and we must preserve the mode
2858 : of each occurrence. Also, some hard regs appear in
2859 : MEMs that are shared and mustn't be altered. Don't try to
2860 : replace any reg that maps to a reg of class NO_REGS. */
2861 469951722 : if (REGNO (x) < FIRST_PSEUDO_REGISTER
2862 469951722 : || ! REGNO_QTY_VALID_P (REGNO (x)))
2863 304563804 : return x;
2864 :
2865 165387918 : q = REG_QTY (REGNO (x));
2866 165387918 : ent = &qty_table[q];
2867 165387918 : first = ent->first_reg;
2868 165387918 : return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2869 402309 : : REGNO_REG_CLASS (first) == NO_REGS ? x
2870 165387918 : : gen_rtx_REG (ent->mode, first));
2871 : }
2872 :
2873 750818129 : default:
2874 750818129 : break;
2875 : }
2876 :
2877 750818129 : fmt = GET_RTX_FORMAT (code);
2878 2069970175 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2879 : {
2880 1319152046 : int j;
2881 :
2882 1319152046 : if (fmt[i] == 'e')
2883 1016007424 : validate_canon_reg (&XEXP (x, i), insn);
2884 303144622 : else if (fmt[i] == 'E')
2885 18885731 : for (j = 0; j < XVECLEN (x, i); j++)
2886 12474790 : validate_canon_reg (&XVECEXP (x, i, j), insn);
2887 : }
2888 :
2889 : return x;
2890 : }
2891 :
2892 : /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2893 : operation (EQ, NE, GT, etc.), follow it back through the hash table and
2894 : what values are being compared.
2895 :
2896 : *PARG1 and *PARG2 are updated to contain the rtx representing the values
2897 : actually being compared. For example, if *PARG1 was (reg:CC CC_REG) and
2898 : *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that
2899 : were compared to produce (reg:CC CC_REG).
2900 :
2901 : The return value is the comparison operator and is either the code of
2902 : A or the code corresponding to the inverse of the comparison. */
2903 :
2904 : static enum rtx_code
2905 36836911 : find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2906 : machine_mode *pmode1, machine_mode *pmode2)
2907 : {
2908 36836911 : rtx arg1, arg2;
2909 36836911 : hash_set<rtx> *visited = NULL;
2910 : /* Set nonzero when we find something of interest. */
2911 36836911 : rtx x = NULL;
2912 :
2913 36836911 : arg1 = *parg1, arg2 = *parg2;
2914 :
2915 : /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2916 :
2917 71779357 : while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2918 : {
2919 53716911 : int reverse_code = 0;
2920 53716911 : struct table_elt *p = 0;
2921 :
2922 : /* Remember state from previous iteration. */
2923 53716911 : if (x)
2924 : {
2925 16955396 : if (!visited)
2926 16951103 : visited = new hash_set<rtx>;
2927 16955396 : visited->add (x);
2928 16955396 : x = 0;
2929 : }
2930 :
2931 : /* If arg1 is a COMPARE, extract the comparison arguments from it. */
2932 :
2933 53716911 : if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2934 0 : x = arg1;
2935 :
2936 : /* If ARG1 is a comparison operator and CODE is testing for
2937 : STORE_FLAG_VALUE, get the inner arguments. */
2938 :
2939 53716911 : else if (COMPARISON_P (arg1))
2940 : {
2941 : #ifdef FLOAT_STORE_FLAG_VALUE
2942 : REAL_VALUE_TYPE fsfv;
2943 : #endif
2944 :
2945 0 : if (code == NE
2946 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2947 : && code == LT && STORE_FLAG_VALUE == -1)
2948 : #ifdef FLOAT_STORE_FLAG_VALUE
2949 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2950 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2951 : REAL_VALUE_NEGATIVE (fsfv)))
2952 : #endif
2953 : )
2954 0 : x = arg1;
2955 0 : else if (code == EQ
2956 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2957 : && code == GE && STORE_FLAG_VALUE == -1)
2958 : #ifdef FLOAT_STORE_FLAG_VALUE
2959 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2960 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2961 : REAL_VALUE_NEGATIVE (fsfv)))
2962 : #endif
2963 : )
2964 0 : x = arg1, reverse_code = 1;
2965 : }
2966 :
2967 : /* ??? We could also check for
2968 :
2969 : (ne (and (eq (...) (const_int 1))) (const_int 0))
2970 :
2971 : and related forms, but let's wait until we see them occurring. */
2972 :
2973 53716911 : if (x == 0)
2974 : /* Look up ARG1 in the hash table and see if it has an equivalence
2975 : that lets us see what is being compared. */
2976 53716911 : p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2977 53716911 : if (p)
2978 : {
2979 43051365 : p = p->first_same_value;
2980 :
2981 : /* If what we compare is already known to be constant, that is as
2982 : good as it gets.
2983 : We need to break the loop in this case, because otherwise we
2984 : can have an infinite loop when looking at a reg that is known
2985 : to be a constant which is the same as a comparison of a reg
2986 : against zero which appears later in the insn stream, which in
2987 : turn is constant and the same as the comparison of the first reg
2988 : against zero... */
2989 43051365 : if (p->is_const)
2990 : break;
2991 : }
2992 :
2993 69444346 : for (; p; p = p->next_same_value)
2994 : {
2995 50675176 : machine_mode inner_mode = GET_MODE (p->exp);
2996 : #ifdef FLOAT_STORE_FLAG_VALUE
2997 : REAL_VALUE_TYPE fsfv;
2998 : #endif
2999 :
3000 : /* If the entry isn't valid, skip it. */
3001 50675176 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3002 1809029 : continue;
3003 :
3004 : /* If it's a comparison we've used before, skip it. */
3005 48866147 : if (visited && visited->contains (p->exp))
3006 0 : continue;
3007 :
3008 48866147 : if (GET_CODE (p->exp) == COMPARE
3009 : /* Another possibility is that this machine has a compare insn
3010 : that includes the comparison code. In that case, ARG1 would
3011 : be equivalent to a comparison operation that would set ARG1 to
3012 : either STORE_FLAG_VALUE or zero. If this is an NE operation,
3013 : ORIG_CODE is the actual comparison being done; if it is an EQ,
3014 : we must reverse ORIG_CODE. On machine with a negative value
3015 : for STORE_FLAG_VALUE, also look at LT and GE operations. */
3016 48866147 : || ((code == NE
3017 9801064 : || (code == LT
3018 275135 : && val_signbit_known_set_p (inner_mode,
3019 : STORE_FLAG_VALUE))
3020 : #ifdef FLOAT_STORE_FLAG_VALUE
3021 : || (code == LT
3022 : && SCALAR_FLOAT_MODE_P (inner_mode)
3023 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3024 : REAL_VALUE_NEGATIVE (fsfv)))
3025 : #endif
3026 : )
3027 4227774 : && COMPARISON_P (p->exp)))
3028 : {
3029 34840648 : x = p->exp;
3030 34840648 : break;
3031 : }
3032 14025499 : else if ((code == EQ
3033 7361708 : || (code == GE
3034 222441 : && val_signbit_known_set_p (inner_mode,
3035 : STORE_FLAG_VALUE))
3036 : #ifdef FLOAT_STORE_FLAG_VALUE
3037 : || (code == GE
3038 : && SCALAR_FLOAT_MODE_P (inner_mode)
3039 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3040 : REAL_VALUE_NEGATIVE (fsfv)))
3041 : #endif
3042 : )
3043 14025499 : && COMPARISON_P (p->exp))
3044 : {
3045 101798 : reverse_code = 1;
3046 101798 : x = p->exp;
3047 101798 : break;
3048 : }
3049 :
3050 : /* If this non-trapping address, e.g. fp + constant, the
3051 : equivalent is a better operand since it may let us predict
3052 : the value of the comparison. */
3053 13923701 : else if (!rtx_addr_can_trap_p (p->exp))
3054 : {
3055 0 : arg1 = p->exp;
3056 0 : continue;
3057 : }
3058 : }
3059 :
3060 : /* If we didn't find a useful equivalence for ARG1, we are done.
3061 : Otherwise, set up for the next iteration. */
3062 53711616 : if (x == 0)
3063 : break;
3064 :
3065 : /* If we need to reverse the comparison, make sure that is
3066 : possible -- we can't necessarily infer the value of GE from LT
3067 : with floating-point operands. */
3068 34942446 : if (reverse_code)
3069 : {
3070 101798 : enum rtx_code reversed = reversed_comparison_code (x, NULL);
3071 101798 : if (reversed == UNKNOWN)
3072 : break;
3073 : else
3074 : code = reversed;
3075 : }
3076 34840648 : else if (COMPARISON_P (x))
3077 3339 : code = GET_CODE (x);
3078 34942446 : arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3079 : }
3080 :
3081 : /* Return our results. Return the modes from before fold_rtx
3082 : because fold_rtx might produce const_int, and then it's too late. */
3083 36836911 : *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3084 36836911 : *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3085 :
3086 36836911 : if (visited)
3087 16951103 : delete visited;
3088 36836911 : return code;
3089 : }
3090 :
3091 : /* If X is a nontrivial arithmetic operation on an argument for which
3092 : a constant value can be determined, return the result of operating
3093 : on that value, as a constant. Otherwise, return X, possibly with
3094 : one or more operands changed to a forward-propagated constant.
3095 :
3096 : If X is a register whose contents are known, we do NOT return
3097 : those contents here; equiv_constant is called to perform that task.
3098 : For SUBREGs and MEMs, we do that both here and in equiv_constant.
3099 :
3100 : INSN is the insn that we may be modifying. If it is 0, make a copy
3101 : of X before modifying it. */
3102 :
3103 : static rtx
3104 395321066 : fold_rtx (rtx x, rtx_insn *insn)
3105 : {
3106 395322835 : enum rtx_code code;
3107 395322835 : machine_mode mode;
3108 395322835 : const char *fmt;
3109 395322835 : int i;
3110 395322835 : rtx new_rtx = 0;
3111 395322835 : bool changed = false;
3112 395322835 : poly_int64 xval;
3113 :
3114 : /* Operands of X. */
3115 : /* Workaround -Wmaybe-uninitialized false positive during
3116 : profiledbootstrap by initializing them. */
3117 395322835 : rtx folded_arg0 = NULL_RTX;
3118 395322835 : rtx folded_arg1 = NULL_RTX;
3119 :
3120 : /* Constant equivalents of first three operands of X;
3121 : 0 when no such equivalent is known. */
3122 395322835 : rtx const_arg0;
3123 395322835 : rtx const_arg1;
3124 395322835 : rtx const_arg2;
3125 :
3126 : /* The mode of the first operand of X. We need this for sign and zero
3127 : extends. */
3128 395322835 : machine_mode mode_arg0;
3129 :
3130 395322835 : if (x == 0)
3131 : return x;
3132 :
3133 : /* Try to perform some initial simplifications on X. */
3134 395322835 : code = GET_CODE (x);
3135 395322835 : switch (code)
3136 : {
3137 61390715 : case MEM:
3138 61390715 : case SUBREG:
3139 : /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3140 : than it would in other contexts. Basically its mode does not
3141 : signify the size of the object read. That information is carried
3142 : by size operand. If we happen to have a MEM of the appropriate
3143 : mode in our tables with a constant value we could simplify the
3144 : extraction incorrectly if we allowed substitution of that value
3145 : for the MEM. */
3146 61390715 : case ZERO_EXTRACT:
3147 61390715 : case SIGN_EXTRACT:
3148 61390715 : if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3149 : return new_rtx;
3150 : return x;
3151 :
3152 : case CONST:
3153 : CASE_CONST_ANY:
3154 : case SYMBOL_REF:
3155 : case LABEL_REF:
3156 : case REG:
3157 : case PC:
3158 : /* No use simplifying an EXPR_LIST
3159 : since they are used only for lists of args
3160 : in a function call's REG_EQUAL note. */
3161 : case EXPR_LIST:
3162 : return x;
3163 :
3164 195535 : case ASM_OPERANDS:
3165 195535 : if (insn)
3166 : {
3167 0 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3168 0 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3169 0 : fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3170 : }
3171 : return x;
3172 :
3173 15302813 : case CALL:
3174 15302813 : if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3175 : return x;
3176 : break;
3177 888244 : case VEC_SELECT:
3178 888244 : {
3179 888244 : rtx trueop0 = XEXP (x, 0);
3180 888244 : mode = GET_MODE (trueop0);
3181 888244 : rtx trueop1 = XEXP (x, 1);
3182 : /* If we select a low-part subreg, return that. */
3183 888244 : if (vec_series_lowpart_p (GET_MODE (x), mode, trueop1))
3184 : {
3185 205 : rtx new_rtx = lowpart_subreg (GET_MODE (x), trueop0, mode);
3186 205 : if (new_rtx != NULL_RTX)
3187 : return new_rtx;
3188 : }
3189 : }
3190 :
3191 : /* Anything else goes through the loop below. */
3192 : default:
3193 : break;
3194 : }
3195 :
3196 115300027 : mode = GET_MODE (x);
3197 115300027 : const_arg0 = 0;
3198 115300027 : const_arg1 = 0;
3199 115300027 : const_arg2 = 0;
3200 115300027 : mode_arg0 = VOIDmode;
3201 :
3202 : /* Try folding our operands.
3203 : Then see which ones have constant values known. */
3204 :
3205 115300027 : fmt = GET_RTX_FORMAT (code);
3206 359954928 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3207 244654901 : if (fmt[i] == 'e')
3208 : {
3209 240213492 : rtx folded_arg = XEXP (x, i), const_arg;
3210 240213492 : machine_mode mode_arg = GET_MODE (folded_arg);
3211 :
3212 240213492 : switch (GET_CODE (folded_arg))
3213 : {
3214 106980766 : case MEM:
3215 106980766 : case REG:
3216 106980766 : case SUBREG:
3217 106980766 : const_arg = equiv_constant (folded_arg);
3218 106980766 : break;
3219 :
3220 : case CONST:
3221 : CASE_CONST_ANY:
3222 : case SYMBOL_REF:
3223 : case LABEL_REF:
3224 : const_arg = folded_arg;
3225 : break;
3226 :
3227 45443188 : default:
3228 45443188 : folded_arg = fold_rtx (folded_arg, insn);
3229 45443188 : const_arg = equiv_constant (folded_arg);
3230 45443188 : break;
3231 : }
3232 :
3233 : /* For the first three operands, see if the operand
3234 : is constant or equivalent to a constant. */
3235 240213492 : switch (i)
3236 : {
3237 112635303 : case 0:
3238 112635303 : folded_arg0 = folded_arg;
3239 112635303 : const_arg0 = const_arg;
3240 112635303 : mode_arg0 = mode_arg;
3241 112635303 : break;
3242 106712039 : case 1:
3243 106712039 : folded_arg1 = folded_arg;
3244 106712039 : const_arg1 = const_arg;
3245 106712039 : break;
3246 20866150 : case 2:
3247 20866150 : const_arg2 = const_arg;
3248 20866150 : break;
3249 : }
3250 :
3251 : /* Pick the least expensive of the argument and an equivalent constant
3252 : argument. */
3253 240213492 : if (const_arg != 0
3254 240213492 : && const_arg != folded_arg
3255 6078282 : && (COST_IN (const_arg, mode_arg, code, i)
3256 3039141 : <= COST_IN (folded_arg, mode_arg, code, i))
3257 :
3258 : /* It's not safe to substitute the operand of a conversion
3259 : operator with a constant, as the conversion's identity
3260 : depends upon the mode of its operand. This optimization
3261 : is handled by the call to simplify_unary_operation. */
3262 241848960 : && (GET_RTX_CLASS (code) != RTX_UNARY
3263 414973 : || GET_MODE (const_arg) == mode_arg0
3264 336176 : || (code != ZERO_EXTEND
3265 : && code != SIGN_EXTEND
3266 336176 : && code != TRUNCATE
3267 336176 : && code != FLOAT_TRUNCATE
3268 255203 : && code != FLOAT_EXTEND
3269 255203 : && code != FLOAT
3270 : && code != FIX
3271 255008 : && code != UNSIGNED_FLOAT
3272 255008 : && code != UNSIGNED_FIX)))
3273 : folded_arg = const_arg;
3274 :
3275 240213492 : if (folded_arg == XEXP (x, i))
3276 238161193 : continue;
3277 :
3278 2052299 : if (insn == NULL_RTX && !changed)
3279 1834208 : x = copy_rtx (x);
3280 2052299 : changed = true;
3281 2052299 : validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3282 : }
3283 :
3284 115300027 : if (changed)
3285 : {
3286 : /* Canonicalize X if necessary, and keep const_argN and folded_argN
3287 : consistent with the order in X. */
3288 1834932 : if (canonicalize_change_group (insn, x))
3289 : {
3290 88917 : std::swap (const_arg0, const_arg1);
3291 88917 : std::swap (folded_arg0, folded_arg1);
3292 : }
3293 :
3294 1834932 : apply_change_group ();
3295 : }
3296 :
3297 : /* If X is an arithmetic operation, see if we can simplify it. */
3298 :
3299 115300027 : switch (GET_RTX_CLASS (code))
3300 : {
3301 5923264 : case RTX_UNARY:
3302 5923264 : {
3303 : /* We can't simplify extension ops unless we know the
3304 : original mode. */
3305 5923264 : if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3306 4266662 : && mode_arg0 == VOIDmode)
3307 : break;
3308 :
3309 5923264 : new_rtx = simplify_unary_operation (code, mode,
3310 : const_arg0 ? const_arg0 : folded_arg0,
3311 : mode_arg0);
3312 : }
3313 5923264 : break;
3314 :
3315 22213455 : case RTX_COMPARE:
3316 22213455 : case RTX_COMM_COMPARE:
3317 : /* See what items are actually being compared and set FOLDED_ARG[01]
3318 : to those values and CODE to the actual comparison code. If any are
3319 : constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3320 : do anything if both operands are already known to be constant. */
3321 :
3322 : /* ??? Vector mode comparisons are not supported yet. */
3323 22213455 : if (VECTOR_MODE_P (mode))
3324 : break;
3325 :
3326 22092306 : if (const_arg0 == 0 || const_arg1 == 0)
3327 : {
3328 22091231 : struct table_elt *p0, *p1;
3329 22091231 : rtx true_rtx, false_rtx;
3330 22091231 : machine_mode mode_arg1;
3331 :
3332 22091231 : if (SCALAR_FLOAT_MODE_P (mode))
3333 : {
3334 : #ifdef FLOAT_STORE_FLAG_VALUE
3335 : true_rtx = (const_double_from_real_value
3336 : (FLOAT_STORE_FLAG_VALUE (mode), mode));
3337 : #else
3338 2401 : true_rtx = NULL_RTX;
3339 : #endif
3340 2401 : false_rtx = CONST0_RTX (mode);
3341 : }
3342 : else
3343 : {
3344 22088830 : true_rtx = const_true_rtx;
3345 22088830 : false_rtx = const0_rtx;
3346 : }
3347 :
3348 22091231 : code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3349 : &mode_arg0, &mode_arg1);
3350 :
3351 : /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3352 : what kinds of things are being compared, so we can't do
3353 : anything with this comparison. */
3354 :
3355 22091231 : if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3356 : break;
3357 :
3358 20750249 : const_arg0 = equiv_constant (folded_arg0);
3359 20750249 : const_arg1 = equiv_constant (folded_arg1);
3360 :
3361 : /* If we do not now have two constants being compared, see
3362 : if we can nevertheless deduce some things about the
3363 : comparison. */
3364 20750249 : if (const_arg0 == 0 || const_arg1 == 0)
3365 : {
3366 20522053 : if (const_arg1 != NULL)
3367 : {
3368 15203613 : rtx cheapest_simplification;
3369 15203613 : int cheapest_cost;
3370 15203613 : rtx simp_result;
3371 15203613 : struct table_elt *p;
3372 :
3373 : /* See if we can find an equivalent of folded_arg0
3374 : that gets us a cheaper expression, possibly a
3375 : constant through simplifications. */
3376 15203613 : p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3377 : mode_arg0);
3378 :
3379 15203613 : if (p != NULL)
3380 : {
3381 6459644 : cheapest_simplification = x;
3382 6459644 : cheapest_cost = COST (x, mode);
3383 :
3384 18832542 : for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3385 : {
3386 12372898 : int cost;
3387 :
3388 : /* If the entry isn't valid, skip it. */
3389 12372898 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3390 500276 : continue;
3391 :
3392 : /* Try to simplify using this equivalence. */
3393 11872622 : simp_result
3394 11872622 : = simplify_relational_operation (code, mode,
3395 : mode_arg0,
3396 : p->exp,
3397 : const_arg1);
3398 :
3399 11872622 : if (simp_result == NULL)
3400 11714766 : continue;
3401 :
3402 157856 : cost = COST (simp_result, mode);
3403 157856 : if (cost < cheapest_cost)
3404 : {
3405 12372898 : cheapest_cost = cost;
3406 12372898 : cheapest_simplification = simp_result;
3407 : }
3408 : }
3409 :
3410 : /* If we have a cheaper expression now, use that
3411 : and try folding it further, from the top. */
3412 6459644 : if (cheapest_simplification != x)
3413 1742 : return fold_rtx (copy_rtx (cheapest_simplification),
3414 4070 : insn);
3415 : }
3416 : }
3417 :
3418 : /* See if the two operands are the same. */
3419 :
3420 20736952 : if ((REG_P (folded_arg0)
3421 17572010 : && REG_P (folded_arg1)
3422 4743964 : && (REG_QTY (REGNO (folded_arg0))
3423 4743964 : == REG_QTY (REGNO (folded_arg1))))
3424 38297255 : || ((p0 = lookup (folded_arg0,
3425 : SAFE_HASH (folded_arg0, mode_arg0),
3426 : mode_arg0))
3427 9071913 : && (p1 = lookup (folded_arg1,
3428 : SAFE_HASH (folded_arg1, mode_arg0),
3429 : mode_arg0))
3430 2670529 : && p0->first_same_value == p1->first_same_value))
3431 12669 : folded_arg1 = folded_arg0;
3432 :
3433 : /* If FOLDED_ARG0 is a register, see if the comparison we are
3434 : doing now is either the same as we did before or the reverse
3435 : (we only check the reverse if not floating-point). */
3436 20724283 : else if (REG_P (folded_arg0))
3437 : {
3438 17559928 : int qty = REG_QTY (REGNO (folded_arg0));
3439 :
3440 17559928 : if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3441 : {
3442 17549102 : struct qty_table_elem *ent = &qty_table[qty];
3443 :
3444 17549102 : if ((comparison_dominates_p (ent->comparison_code, code)
3445 17068157 : || (! FLOAT_MODE_P (mode_arg0)
3446 16849411 : && comparison_dominates_p (ent->comparison_code,
3447 : reverse_condition (code))))
3448 17999457 : && (rtx_equal_p (ent->comparison_const, folded_arg1)
3449 930462 : || (const_arg1
3450 762118 : && rtx_equal_p (ent->comparison_const,
3451 : const_arg1))
3452 930462 : || (REG_P (folded_arg1)
3453 156892 : && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3454 : {
3455 2328 : if (comparison_dominates_p (ent->comparison_code, code))
3456 : {
3457 1290 : if (true_rtx)
3458 : return true_rtx;
3459 : else
3460 : break;
3461 : }
3462 : else
3463 : return false_rtx;
3464 : }
3465 : }
3466 : }
3467 : }
3468 : }
3469 :
3470 : /* If we are comparing against zero, see if the first operand is
3471 : equivalent to an IOR with a constant. If so, we may be able to
3472 : determine the result of this comparison. */
3473 20747254 : if (const_arg1 == const0_rtx && !const_arg0)
3474 : {
3475 9837168 : rtx y = lookup_as_function (folded_arg0, IOR);
3476 9837168 : rtx inner_const;
3477 :
3478 9837168 : if (y != 0
3479 69284 : && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3480 78 : && CONST_INT_P (inner_const)
3481 9837246 : && INTVAL (inner_const) != 0)
3482 78 : folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3483 : }
3484 :
3485 20739987 : {
3486 20739987 : rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0);
3487 20747254 : rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1);
3488 20747254 : new_rtx = simplify_relational_operation (code, mode, mode_arg0,
3489 : op0, op1);
3490 : }
3491 20747254 : break;
3492 :
3493 63108466 : case RTX_BIN_ARITH:
3494 63108466 : case RTX_COMM_ARITH:
3495 63108466 : switch (code)
3496 : {
3497 26954639 : case PLUS:
3498 : /* If the second operand is a LABEL_REF, see if the first is a MINUS
3499 : with that LABEL_REF as its second operand. If so, the result is
3500 : the first operand of that MINUS. This handles switches with an
3501 : ADDR_DIFF_VEC table. */
3502 26954639 : if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3503 : {
3504 2446 : rtx y
3505 2446 : = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3506 2446 : : lookup_as_function (folded_arg0, MINUS);
3507 :
3508 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3509 2446 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg1))
3510 0 : return XEXP (y, 0);
3511 :
3512 : /* Now try for a CONST of a MINUS like the above. */
3513 2446 : if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3514 2446 : : lookup_as_function (folded_arg0, CONST))) != 0
3515 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3516 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3517 2446 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg1))
3518 0 : return XEXP (XEXP (y, 0), 0);
3519 : }
3520 :
3521 : /* Likewise if the operands are in the other order. */
3522 26954639 : if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3523 : {
3524 23 : rtx y
3525 23 : = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3526 23 : : lookup_as_function (folded_arg1, MINUS);
3527 :
3528 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3529 23 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg0))
3530 0 : return XEXP (y, 0);
3531 :
3532 : /* Now try for a CONST of a MINUS like the above. */
3533 23 : if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3534 23 : : lookup_as_function (folded_arg1, CONST))) != 0
3535 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3536 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3537 23 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg0))
3538 0 : return XEXP (XEXP (y, 0), 0);
3539 : }
3540 :
3541 : /* If second operand is a register equivalent to a negative
3542 : CONST_INT, see if we can find a register equivalent to the
3543 : positive constant. Make a MINUS if so. Don't do this for
3544 : a non-negative constant since we might then alternate between
3545 : choosing positive and negative constants. Having the positive
3546 : constant previously-used is the more common case. Be sure
3547 : the resulting constant is non-negative; if const_arg1 were
3548 : the smallest negative number this would overflow: depending
3549 : on the mode, this would either just be the same value (and
3550 : hence not save anything) or be incorrect. */
3551 26954639 : if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3552 21617128 : && INTVAL (const_arg1) < 0
3553 : /* This used to test
3554 :
3555 : -INTVAL (const_arg1) >= 0
3556 :
3557 : But The Sun V5.0 compilers mis-compiled that test. So
3558 : instead we test for the problematic value in a more direct
3559 : manner and hope the Sun compilers get it correct. */
3560 12093675 : && INTVAL (const_arg1) !=
3561 : (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1))
3562 12074645 : && REG_P (folded_arg1))
3563 : {
3564 31775 : rtx new_const = GEN_INT (-INTVAL (const_arg1));
3565 31775 : struct table_elt *p
3566 31775 : = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3567 :
3568 31775 : if (p)
3569 5027 : for (p = p->first_same_value; p; p = p->next_same_value)
3570 5026 : if (REG_P (p->exp))
3571 2619 : return simplify_gen_binary (MINUS, mode, folded_arg0,
3572 2619 : canon_reg (p->exp, NULL));
3573 : }
3574 26952020 : goto from_plus;
3575 :
3576 2188099 : case MINUS:
3577 : /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3578 : If so, produce (PLUS Z C2-C). */
3579 2188099 : if (const_arg1 != 0 && poly_int_rtx_p (const_arg1, &xval))
3580 : {
3581 43669 : rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3582 43669 : if (y && poly_int_rtx_p (XEXP (y, 1)))
3583 27 : return fold_rtx (plus_constant (mode, copy_rtx (y), -xval),
3584 27 : NULL);
3585 : }
3586 :
3587 : /* Fall through. */
3588 :
3589 39488961 : from_plus:
3590 39488961 : case SMIN: case SMAX: case UMIN: case UMAX:
3591 39488961 : case IOR: case AND: case XOR:
3592 39488961 : case MULT:
3593 39488961 : case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3594 : /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3595 : is known to be of similar form, we may be able to replace the
3596 : operation with a combined operation. This may eliminate the
3597 : intermediate operation if every use is simplified in this way.
3598 : Note that the similar optimization done by combine.cc only works
3599 : if the intermediate operation's result has only one reference. */
3600 :
3601 39488961 : if (REG_P (folded_arg0)
3602 36124333 : && const_arg1 && CONST_INT_P (const_arg1))
3603 : {
3604 26506118 : int is_shift
3605 26506118 : = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3606 : rtx y, inner_const, new_const;
3607 : rtx canon_const_arg1 = const_arg1;
3608 : enum rtx_code associate_code;
3609 :
3610 : if (is_shift
3611 6415388 : && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode)
3612 3207635 : || INTVAL (const_arg1) < 0))
3613 : {
3614 : if (SHIFT_COUNT_TRUNCATED)
3615 : canon_const_arg1 = gen_int_shift_amount
3616 : (mode, (INTVAL (const_arg1)
3617 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3618 : else
3619 : break;
3620 : }
3621 :
3622 26506049 : y = lookup_as_function (folded_arg0, code);
3623 26506049 : if (y == 0)
3624 : break;
3625 :
3626 : /* If we have compiled a statement like
3627 : "if (x == (x & mask1))", and now are looking at
3628 : "x & mask2", we will have a case where the first operand
3629 : of Y is the same as our first operand. Unless we detect
3630 : this case, an infinite loop will result. */
3631 842320 : if (XEXP (y, 0) == folded_arg0)
3632 : break;
3633 :
3634 842039 : inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3635 842039 : if (!inner_const || !CONST_INT_P (inner_const))
3636 : break;
3637 :
3638 : /* Don't associate these operations if they are a PLUS with the
3639 : same constant and it is a power of two. These might be doable
3640 : with a pre- or post-increment. Similarly for two subtracts of
3641 : identical powers of two with post decrement. */
3642 :
3643 508372 : if (code == PLUS && const_arg1 == inner_const
3644 : && ((HAVE_PRE_INCREMENT
3645 : && pow2p_hwi (INTVAL (const_arg1)))
3646 : || (HAVE_POST_INCREMENT
3647 : && pow2p_hwi (INTVAL (const_arg1)))
3648 : || (HAVE_PRE_DECREMENT
3649 : && pow2p_hwi (- INTVAL (const_arg1)))
3650 : || (HAVE_POST_DECREMENT
3651 : && pow2p_hwi (- INTVAL (const_arg1)))))
3652 : break;
3653 :
3654 : /* ??? Vector mode shifts by scalar
3655 : shift operand are not supported yet. */
3656 508372 : if (is_shift && VECTOR_MODE_P (mode))
3657 : break;
3658 :
3659 4055 : if (is_shift
3660 8110 : && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode)
3661 4055 : || INTVAL (inner_const) < 0))
3662 : {
3663 : if (SHIFT_COUNT_TRUNCATED)
3664 : inner_const = gen_int_shift_amount
3665 : (mode, (INTVAL (inner_const)
3666 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3667 : else
3668 : break;
3669 : }
3670 :
3671 : /* Compute the code used to compose the constants. For example,
3672 : A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3673 :
3674 508099 : associate_code = (is_shift || code == MINUS ? PLUS : code);
3675 :
3676 508099 : new_const = simplify_binary_operation (associate_code, mode,
3677 : canon_const_arg1,
3678 : inner_const);
3679 :
3680 508099 : if (new_const == 0)
3681 : break;
3682 :
3683 : /* If we are associating shift operations, don't let this
3684 : produce a shift of the size of the object or larger.
3685 : This could occur when we follow a sign-extend by a right
3686 : shift on a machine that does a sign-extend as a pair
3687 : of shifts. */
3688 :
3689 508099 : if (is_shift
3690 4055 : && CONST_INT_P (new_const)
3691 516209 : && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode))
3692 : {
3693 : /* As an exception, we can turn an ASHIFTRT of this
3694 : form into a shift of the number of bits - 1. */
3695 1579 : if (code == ASHIFTRT)
3696 1555 : new_const = gen_int_shift_amount
3697 1555 : (mode, GET_MODE_UNIT_BITSIZE (mode) - 1);
3698 24 : else if (!side_effects_p (XEXP (y, 0)))
3699 24 : return CONST0_RTX (mode);
3700 : else
3701 : break;
3702 : }
3703 :
3704 508075 : y = copy_rtx (XEXP (y, 0));
3705 :
3706 : /* If Y contains our first operand (the most common way this
3707 : can happen is if Y is a MEM), we would do into an infinite
3708 : loop if we tried to fold it. So don't in that case. */
3709 :
3710 508075 : if (! reg_mentioned_p (folded_arg0, y))
3711 508075 : y = fold_rtx (y, insn);
3712 :
3713 508075 : return simplify_gen_binary (code, mode, y, new_const);
3714 : }
3715 : break;
3716 :
3717 : case DIV: case UDIV:
3718 : /* ??? The associative optimization performed immediately above is
3719 : also possible for DIV and UDIV using associate_code of MULT.
3720 : However, we would need extra code to verify that the
3721 : multiplication does not overflow, that is, there is no overflow
3722 : in the calculation of new_const. */
3723 : break;
3724 :
3725 : default:
3726 : break;
3727 : }
3728 :
3729 106622325 : new_rtx = simplify_binary_operation (code, mode,
3730 : const_arg0 ? const_arg0 : folded_arg0,
3731 : const_arg1 ? const_arg1 : folded_arg1);
3732 62597721 : break;
3733 :
3734 0 : case RTX_OBJ:
3735 : /* (lo_sum (high X) X) is simply X. */
3736 0 : if (code == LO_SUM && const_arg0 != 0
3737 0 : && GET_CODE (const_arg0) == HIGH
3738 0 : && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3739 : return const_arg1;
3740 : break;
3741 :
3742 20866150 : case RTX_TERNARY:
3743 20866150 : case RTX_BITFIELD_OPS:
3744 20866150 : new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3745 : const_arg0 ? const_arg0 : folded_arg0,
3746 : const_arg1 ? const_arg1 : folded_arg1,
3747 : const_arg2 ? const_arg2 : XEXP (x, 2));
3748 20866150 : break;
3749 :
3750 : default:
3751 : break;
3752 : }
3753 :
3754 111475371 : return new_rtx ? new_rtx : x;
3755 : }
3756 :
3757 : /* Return a constant value currently equivalent to X.
3758 : Return 0 if we don't know one. */
3759 :
3760 : static rtx
3761 268832464 : equiv_constant (rtx x)
3762 : {
3763 268832464 : if (REG_P (x)
3764 268832464 : && REGNO_QTY_VALID_P (REGNO (x)))
3765 : {
3766 85936707 : int x_q = REG_QTY (REGNO (x));
3767 85936707 : struct qty_table_elem *x_ent = &qty_table[x_q];
3768 :
3769 85936707 : if (x_ent->const_rtx)
3770 4454759 : x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3771 : }
3772 :
3773 268832464 : if (x == 0 || CONSTANT_P (x))
3774 26383799 : return x;
3775 :
3776 242448665 : if (GET_CODE (x) == SUBREG)
3777 : {
3778 5446990 : machine_mode mode = GET_MODE (x);
3779 5446990 : machine_mode imode = GET_MODE (SUBREG_REG (x));
3780 5446990 : rtx new_rtx;
3781 :
3782 : /* See if we previously assigned a constant value to this SUBREG. */
3783 5446990 : if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3784 5436304 : || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
3785 5436304 : || (NUM_POLY_INT_COEFFS > 1
3786 : && (new_rtx = lookup_as_function (x, CONST_POLY_INT)) != 0)
3787 5430388 : || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3788 10877190 : || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3789 16790 : return new_rtx;
3790 :
3791 : /* If we didn't and if doing so makes sense, see if we previously
3792 : assigned a constant value to the enclosing word mode SUBREG. */
3793 11699067 : if (known_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD)
3794 8342551 : && known_lt (UNITS_PER_WORD, GET_MODE_SIZE (imode)))
3795 : {
3796 34782 : poly_int64 byte = (SUBREG_BYTE (x)
3797 34782 : - subreg_lowpart_offset (mode, word_mode));
3798 69564 : if (known_ge (byte, 0) && multiple_p (byte, UNITS_PER_WORD))
3799 : {
3800 34782 : rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3801 34782 : new_rtx = lookup_as_function (y, CONST_INT);
3802 34782 : if (new_rtx)
3803 0 : return gen_lowpart (mode, new_rtx);
3804 : }
3805 : }
3806 :
3807 : /* Otherwise see if we already have a constant for the inner REG,
3808 : and if that is enough to calculate an equivalent constant for
3809 : the subreg. Note that the upper bits of paradoxical subregs
3810 : are undefined, so they cannot be said to equal anything. */
3811 5430200 : if (REG_P (SUBREG_REG (x))
3812 5421366 : && !paradoxical_subreg_p (x)
3813 10666102 : && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3814 80759 : return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3815 :
3816 5349441 : return 0;
3817 : }
3818 :
3819 : /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3820 : the hash table in case its value was seen before. */
3821 :
3822 237001675 : if (MEM_P (x))
3823 : {
3824 68026672 : struct table_elt *elt;
3825 :
3826 68026672 : x = avoid_constant_pool_reference (x);
3827 68026672 : if (CONSTANT_P (x))
3828 : return x;
3829 :
3830 65930096 : elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3831 65930096 : if (elt == 0)
3832 : return 0;
3833 :
3834 5635517 : for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3835 3986817 : if (elt->is_const && CONSTANT_P (elt->exp))
3836 : return elt->exp;
3837 : }
3838 :
3839 : return 0;
3840 : }
3841 :
3842 : /* Given INSN, a jump insn, TAKEN indicates if we are following the
3843 : "taken" branch.
3844 :
3845 : In certain cases, this can cause us to add an equivalence. For example,
3846 : if we are following the taken case of
3847 : if (i == 2)
3848 : we can add the fact that `i' and '2' are now equivalent.
3849 :
3850 : In any case, we can record that this comparison was passed. If the same
3851 : comparison is seen later, we will know its value. */
3852 :
3853 : static void
3854 14745680 : record_jump_equiv (rtx_insn *insn, bool taken)
3855 : {
3856 14745680 : int cond_known_true;
3857 14745680 : rtx op0, op1;
3858 14745680 : rtx set;
3859 14745680 : machine_mode mode, mode0, mode1;
3860 14745680 : enum rtx_code code;
3861 :
3862 : /* Ensure this is the right kind of insn. */
3863 14745680 : gcc_assert (any_condjump_p (insn));
3864 :
3865 14745680 : set = pc_set (insn);
3866 :
3867 : /* See if this jump condition is known true or false. */
3868 14745680 : if (taken)
3869 5911333 : cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3870 : else
3871 8834347 : cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3872 :
3873 : /* Get the type of comparison being done and the operands being compared.
3874 : If we had to reverse a non-equality condition, record that fact so we
3875 : know that it isn't valid for floating-point. */
3876 14745680 : code = GET_CODE (XEXP (SET_SRC (set), 0));
3877 14745680 : op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3878 14745680 : op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3879 :
3880 : /* If fold_rtx returns NULL_RTX, there's nothing to record. */
3881 14745680 : if (op0 == NULL_RTX || op1 == NULL_RTX)
3882 84533 : return;
3883 :
3884 14745680 : code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3885 14745680 : if (! cond_known_true)
3886 : {
3887 8834347 : code = reversed_comparison_code_parts (code, op0, op1, insn);
3888 :
3889 : /* Don't remember if we can't find the inverse. */
3890 8834347 : if (code == UNKNOWN)
3891 : return;
3892 : }
3893 :
3894 : /* The mode is the mode of the non-constant. */
3895 14661147 : mode = mode0;
3896 14661147 : if (mode1 != VOIDmode)
3897 3789626 : mode = mode1;
3898 :
3899 14661147 : record_jump_cond (code, mode, op0, op1);
3900 : }
3901 :
3902 : /* Yet another form of subreg creation. In this case, we want something in
3903 : MODE, and we should assume OP has MODE iff it is naturally modeless. */
3904 :
3905 : static rtx
3906 68818 : record_jump_cond_subreg (machine_mode mode, rtx op)
3907 : {
3908 68818 : machine_mode op_mode = GET_MODE (op);
3909 68818 : if (op_mode == mode || op_mode == VOIDmode)
3910 : return op;
3911 6760 : return lowpart_subreg (mode, op, op_mode);
3912 : }
3913 :
3914 : /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3915 : Make any useful entries we can with that information. Called from
3916 : above function and called recursively. */
3917 :
3918 : static void
3919 14729961 : record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, rtx op1)
3920 : {
3921 14729961 : unsigned op0_hash, op1_hash;
3922 14729961 : int op0_in_memory, op1_in_memory;
3923 14729961 : struct table_elt *op0_elt, *op1_elt;
3924 :
3925 : /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3926 : we know that they are also equal in the smaller mode (this is also
3927 : true for all smaller modes whether or not there is a SUBREG, but
3928 : is not worth testing for with no SUBREG). */
3929 :
3930 : /* Note that GET_MODE (op0) may not equal MODE. */
3931 14779428 : if (code == EQ && paradoxical_subreg_p (op0))
3932 : {
3933 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3934 0 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3935 0 : if (tem)
3936 0 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3937 : }
3938 :
3939 14744322 : if (code == EQ && paradoxical_subreg_p (op1))
3940 : {
3941 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3942 0 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3943 0 : if (tem)
3944 0 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3945 : }
3946 :
3947 : /* Similarly, if this is an NE comparison, and either is a SUBREG
3948 : making a smaller mode, we know the whole thing is also NE. */
3949 :
3950 : /* Note that GET_MODE (op0) may not equal MODE;
3951 : if we test MODE instead, we can get an infinite recursion
3952 : alternating between two modes each wider than MODE. */
3953 :
3954 14729961 : if (code == NE
3955 63463 : && partial_subreg_p (op0)
3956 14793322 : && subreg_lowpart_p (op0))
3957 : {
3958 63038 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3959 63038 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3960 63038 : if (tem)
3961 63038 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3962 : }
3963 :
3964 14729961 : if (code == NE
3965 11950 : && partial_subreg_p (op1)
3966 14735797 : && subreg_lowpart_p (op1))
3967 : {
3968 5780 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3969 5780 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3970 5780 : if (tem)
3971 5776 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3972 : }
3973 :
3974 : /* Hash both operands. */
3975 :
3976 14729961 : do_not_record = 0;
3977 14729961 : hash_arg_in_memory = 0;
3978 14729961 : op0_hash = HASH (op0, mode);
3979 14729961 : op0_in_memory = hash_arg_in_memory;
3980 :
3981 14729961 : if (do_not_record)
3982 : return;
3983 :
3984 14729961 : do_not_record = 0;
3985 14729961 : hash_arg_in_memory = 0;
3986 14729961 : op1_hash = HASH (op1, mode);
3987 14729961 : op1_in_memory = hash_arg_in_memory;
3988 :
3989 14729961 : if (do_not_record)
3990 : return;
3991 :
3992 : /* Look up both operands. */
3993 14729961 : op0_elt = lookup (op0, op0_hash, mode);
3994 14729961 : op1_elt = lookup (op1, op1_hash, mode);
3995 :
3996 : /* If both operands are already equivalent or if they are not in the
3997 : table but are identical, do nothing. */
3998 14729961 : if ((op0_elt != 0 && op1_elt != 0
3999 2055227 : && op0_elt->first_same_value == op1_elt->first_same_value)
4000 16785119 : || op0 == op1 || rtx_equal_p (op0, op1))
4001 771 : return;
4002 :
4003 : /* If we aren't setting two things equal all we can do is save this
4004 : comparison. Similarly if this is floating-point. In the latter
4005 : case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4006 : If we record the equality, we might inadvertently delete code
4007 : whose intent was to change -0 to +0. */
4008 :
4009 14729190 : if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4010 : {
4011 9429439 : struct qty_table_elem *ent;
4012 9429439 : int qty;
4013 :
4014 : /* If OP0 is not a register, or if OP1 is neither a register
4015 : or constant, we can't do anything. */
4016 :
4017 9429439 : if (!REG_P (op1))
4018 7370072 : op1 = equiv_constant (op1);
4019 :
4020 9429439 : if (!REG_P (op0) || op1 == 0)
4021 : return;
4022 :
4023 : /* Put OP0 in the hash table if it isn't already. This gives it a
4024 : new quantity number. */
4025 8205346 : if (op0_elt == 0)
4026 : {
4027 3322886 : if (insert_regs (op0, NULL, false))
4028 : {
4029 63809 : rehash_using_reg (op0);
4030 63809 : op0_hash = HASH (op0, mode);
4031 :
4032 : /* If OP0 is contained in OP1, this changes its hash code
4033 : as well. Faster to rehash than to check, except
4034 : for the simple case of a constant. */
4035 63809 : if (! CONSTANT_P (op1))
4036 497 : op1_hash = HASH (op1,mode);
4037 : }
4038 :
4039 3322886 : op0_elt = insert (op0, NULL, op0_hash, mode);
4040 3322886 : op0_elt->in_memory = op0_in_memory;
4041 : }
4042 :
4043 8205346 : qty = REG_QTY (REGNO (op0));
4044 8205346 : ent = &qty_table[qty];
4045 :
4046 8205346 : ent->comparison_code = code;
4047 8205346 : if (REG_P (op1))
4048 : {
4049 : /* Look it up again--in case op0 and op1 are the same. */
4050 1971221 : op1_elt = lookup (op1, op1_hash, mode);
4051 :
4052 : /* Put OP1 in the hash table so it gets a new quantity number. */
4053 1971221 : if (op1_elt == 0)
4054 : {
4055 704375 : if (insert_regs (op1, NULL, false))
4056 : {
4057 457 : rehash_using_reg (op1);
4058 457 : op1_hash = HASH (op1, mode);
4059 : }
4060 :
4061 704375 : op1_elt = insert (op1, NULL, op1_hash, mode);
4062 704375 : op1_elt->in_memory = op1_in_memory;
4063 : }
4064 :
4065 1971221 : ent->comparison_const = NULL_RTX;
4066 1971221 : ent->comparison_qty = REG_QTY (REGNO (op1));
4067 : }
4068 : else
4069 : {
4070 6234125 : ent->comparison_const = op1;
4071 6234125 : ent->comparison_qty = INT_MIN;
4072 : }
4073 :
4074 8205346 : return;
4075 : }
4076 :
4077 : /* If either side is still missing an equivalence, make it now,
4078 : then merge the equivalences. */
4079 :
4080 5299751 : if (op0_elt == 0)
4081 : {
4082 3206412 : if (insert_regs (op0, NULL, false))
4083 : {
4084 21268 : rehash_using_reg (op0);
4085 21268 : op0_hash = HASH (op0, mode);
4086 : }
4087 :
4088 3206412 : op0_elt = insert (op0, NULL, op0_hash, mode);
4089 3206412 : op0_elt->in_memory = op0_in_memory;
4090 : }
4091 :
4092 5299751 : if (op1_elt == 0)
4093 : {
4094 3953072 : if (insert_regs (op1, NULL, false))
4095 : {
4096 8392 : rehash_using_reg (op1);
4097 8392 : op1_hash = HASH (op1, mode);
4098 : }
4099 :
4100 3953072 : op1_elt = insert (op1, NULL, op1_hash, mode);
4101 3953072 : op1_elt->in_memory = op1_in_memory;
4102 : }
4103 :
4104 5299751 : merge_equiv_classes (op0_elt, op1_elt);
4105 : }
4106 :
4107 : /* CSE processing for one instruction.
4108 :
4109 : Most "true" common subexpressions are mostly optimized away in GIMPLE,
4110 : but the few that "leak through" are cleaned up by cse_insn, and complex
4111 : addressing modes are often formed here.
4112 :
4113 : The main function is cse_insn, and between here and that function
4114 : a couple of helper functions is defined to keep the size of cse_insn
4115 : within reasonable proportions.
4116 :
4117 : Data is shared between the main and helper functions via STRUCT SET,
4118 : that contains all data related for every set in the instruction that
4119 : is being processed.
4120 :
4121 : Note that cse_main processes all sets in the instruction. Most
4122 : passes in GCC only process simple SET insns or single_set insns, but
4123 : CSE processes insns with multiple sets as well. */
4124 :
4125 : /* Data on one SET contained in the instruction. */
4126 :
4127 : struct set
4128 : {
4129 : /* The SET rtx itself. */
4130 : rtx rtl;
4131 : /* The SET_SRC of the rtx (the original value, if it is changing). */
4132 : rtx src;
4133 : /* The hash-table element for the SET_SRC of the SET. */
4134 : struct table_elt *src_elt;
4135 : /* Hash value for the SET_SRC. */
4136 : unsigned src_hash;
4137 : /* Hash value for the SET_DEST. */
4138 : unsigned dest_hash;
4139 : /* The SET_DEST, with SUBREG, etc., stripped. */
4140 : rtx inner_dest;
4141 : /* Original machine mode, in case it becomes a CONST_INT. */
4142 : ENUM_BITFIELD(machine_mode) mode : MACHINE_MODE_BITSIZE;
4143 : /* Nonzero if the SET_SRC is in memory. */
4144 : unsigned int src_in_memory : 1;
4145 : /* Nonzero if the SET_SRC contains something
4146 : whose value cannot be predicted and understood. */
4147 : unsigned int src_volatile : 1;
4148 : /* Nonzero if RTL is an artifical set that has been created to describe
4149 : part of an insn's effect. Zero means that RTL appears directly in
4150 : the insn pattern. */
4151 : unsigned int is_fake_set : 1;
4152 : /* Hash value of constant equivalent for SET_SRC. */
4153 : unsigned src_const_hash;
4154 : /* A constant equivalent for SET_SRC, if any. */
4155 : rtx src_const;
4156 : /* Table entry for constant equivalent for SET_SRC, if any. */
4157 : struct table_elt *src_const_elt;
4158 : /* Table entry for the destination address. */
4159 : struct table_elt *dest_addr_elt;
4160 : };
4161 :
4162 : /* Special handling for (set REG0 REG1) where REG0 is the
4163 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
4164 : be used in the sequel, so (if easily done) change this insn to
4165 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4166 : that computed their value. Then REG1 will become a dead store
4167 : and won't cloud the situation for later optimizations.
4168 :
4169 : Do not make this change if REG1 is a hard register, because it will
4170 : then be used in the sequel and we may be changing a two-operand insn
4171 : into a three-operand insn.
4172 :
4173 : This is the last transformation that cse_insn will try to do. */
4174 :
4175 : static void
4176 135756566 : try_back_substitute_reg (rtx set, rtx_insn *insn)
4177 : {
4178 135756566 : rtx dest = SET_DEST (set);
4179 135756566 : rtx src = SET_SRC (set);
4180 :
4181 135756566 : if (REG_P (dest)
4182 113100540 : && REG_P (src) && ! HARD_REGISTER_P (src)
4183 142897117 : && REGNO_QTY_VALID_P (REGNO (src)))
4184 : {
4185 7140517 : int src_q = REG_QTY (REGNO (src));
4186 7140517 : struct qty_table_elem *src_ent = &qty_table[src_q];
4187 :
4188 7140517 : if (src_ent->first_reg == REGNO (dest))
4189 : {
4190 : /* Scan for the previous nonnote insn, but stop at a basic
4191 : block boundary. */
4192 1819680 : rtx_insn *prev = insn;
4193 1819680 : rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
4194 4422389 : do
4195 : {
4196 4422389 : prev = PREV_INSN (prev);
4197 : }
4198 4422389 : while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
4199 :
4200 : /* Do not swap the registers around if the previous instruction
4201 : attaches a REG_EQUIV note to REG1.
4202 :
4203 : ??? It's not entirely clear whether we can transfer a REG_EQUIV
4204 : from the pseudo that originally shadowed an incoming argument
4205 : to another register. Some uses of REG_EQUIV might rely on it
4206 : being attached to REG1 rather than REG2.
4207 :
4208 : This section previously turned the REG_EQUIV into a REG_EQUAL
4209 : note. We cannot do that because REG_EQUIV may provide an
4210 : uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4211 1819680 : if (NONJUMP_INSN_P (prev)
4212 1112790 : && GET_CODE (PATTERN (prev)) == SET
4213 798957 : && SET_DEST (PATTERN (prev)) == src
4214 2054507 : && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
4215 : {
4216 234709 : rtx note;
4217 :
4218 234709 : validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
4219 234709 : validate_change (insn, &SET_DEST (set), src, 1);
4220 234709 : validate_change (insn, &SET_SRC (set), dest, 1);
4221 234709 : apply_change_group ();
4222 :
4223 : /* If INSN has a REG_EQUAL note, and this note mentions
4224 : REG0, then we must delete it, because the value in
4225 : REG0 has changed. If the note's value is REG1, we must
4226 : also delete it because that is now this insn's dest. */
4227 234709 : note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4228 234709 : if (note != 0
4229 234709 : && (reg_mentioned_p (dest, XEXP (note, 0))
4230 1369 : || rtx_equal_p (src, XEXP (note, 0))))
4231 3 : remove_note (insn, note);
4232 :
4233 : /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4234 234709 : note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4235 234709 : if (note != 0)
4236 : {
4237 0 : remove_note (insn, note);
4238 0 : gcc_assert (!find_reg_note (prev, REG_ARGS_SIZE, NULL_RTX));
4239 0 : set_unique_reg_note (prev, REG_ARGS_SIZE, XEXP (note, 0));
4240 : }
4241 : }
4242 : }
4243 : }
4244 135756566 : }
4245 :
4246 : /* Add an entry containing RTL X into SETS. IS_FAKE_SET is true if X is
4247 : an artifical set that has been created to describe part of an insn's
4248 : effect. */
4249 : static inline void
4250 193216918 : add_to_set (vec<struct set> *sets, rtx x, bool is_fake_set)
4251 : {
4252 193216918 : struct set entry = {};
4253 193216918 : entry.rtl = x;
4254 193216918 : entry.is_fake_set = is_fake_set;
4255 193216918 : sets->safe_push (entry);
4256 193216918 : }
4257 :
4258 : /* Record all the SETs in this instruction into SETS_PTR,
4259 : and return the number of recorded sets. */
4260 : static int
4261 390838673 : find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
4262 : {
4263 390838673 : rtx x = PATTERN (insn);
4264 :
4265 390838673 : if (GET_CODE (x) == SET)
4266 : {
4267 : /* Ignore SETs that are unconditional jumps.
4268 : They never need cse processing, so this does not hurt.
4269 : The reason is not efficiency but rather
4270 : so that we can test at the end for instructions
4271 : that have been simplified to unconditional jumps
4272 : and not be misled by unchanged instructions
4273 : that were unconditional jumps to begin with. */
4274 168133810 : if (SET_DEST (x) == pc_rtx
4275 20155473 : && GET_CODE (SET_SRC (x)) == LABEL_REF)
4276 : ;
4277 : /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4278 : The hard function value register is used only once, to copy to
4279 : someplace else, so it isn't worth cse'ing. */
4280 168133486 : else if (GET_CODE (SET_SRC (x)) == CALL)
4281 : ;
4282 161052900 : else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR
4283 637295 : && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL
4284 : /* Prevent duplicates from being generated if the type is a V1
4285 : type and a subreg. Folding this will result in the same
4286 : element as folding x itself. */
4287 161690195 : && !(SUBREG_P (SET_DEST (x))
4288 68 : && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1)))
4289 : {
4290 : /* First register the vector itself. */
4291 637295 : add_to_set (psets, x, false);
4292 637295 : rtx src = SET_SRC (x);
4293 : /* Go over the constants of the CONST_VECTOR in forward order, to
4294 : put them in the same order in the SETS array. */
4295 1274740 : for (unsigned i = 0; i < const_vector_encoded_nelts (src) ; i++)
4296 : {
4297 : /* These are templates and don't actually get emitted but are
4298 : used to tell CSE how to get to a particular constant. */
4299 637445 : rtx y = simplify_gen_vec_select (SET_DEST (x), i);
4300 637445 : gcc_assert (y);
4301 637445 : rtx set = gen_rtx_SET (y, CONST_VECTOR_ELT (src, i));
4302 637445 : add_to_set (psets, set, true);
4303 : }
4304 : }
4305 : else
4306 160415605 : add_to_set (psets, x, false);
4307 : }
4308 222704863 : else if (GET_CODE (x) == PARALLEL)
4309 : {
4310 30802417 : int i, lim = XVECLEN (x, 0);
4311 :
4312 : /* Go over the expressions of the PARALLEL in forward order, to
4313 : put them in the same order in the SETS array. */
4314 93589875 : for (i = 0; i < lim; i++)
4315 : {
4316 62787458 : rtx y = XVECEXP (x, 0, i);
4317 62787458 : if (GET_CODE (y) == SET)
4318 : {
4319 : /* As above, we ignore unconditional jumps and call-insns and
4320 : ignore the result of apply_change_group. */
4321 31536765 : if (SET_DEST (y) == pc_rtx
4322 22457 : && GET_CODE (SET_SRC (y)) == LABEL_REF)
4323 : ;
4324 31536765 : else if (GET_CODE (SET_SRC (y)) == CALL)
4325 : ;
4326 : else
4327 31526573 : add_to_set (psets, y, false);
4328 : }
4329 : }
4330 : }
4331 :
4332 390838673 : return psets->length ();
4333 : }
4334 :
4335 : /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4336 :
4337 : static void
4338 99569 : canon_asm_operands (rtx x, rtx_insn *insn)
4339 : {
4340 128970 : for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4341 : {
4342 29401 : rtx input = ASM_OPERANDS_INPUT (x, i);
4343 29401 : if (!(REG_P (input) && HARD_REGISTER_P (input)))
4344 : {
4345 29015 : input = canon_reg (input, insn);
4346 29015 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4347 : }
4348 : }
4349 99569 : }
4350 :
4351 : /* Where possible, substitute every register reference in the N_SETS
4352 : number of SETS in INSN with the canonical register.
4353 :
4354 : Register canonicalization propagatest the earliest register (i.e.
4355 : one that is set before INSN) with the same value. This is a very
4356 : useful, simple form of CSE, to clean up warts from expanding GIMPLE
4357 : to RTL. For instance, a CONST for an address is usually expanded
4358 : multiple times to loads into different registers, thus creating many
4359 : subexpressions of the form:
4360 :
4361 : (set (reg1) (some_const))
4362 : (set (mem (... reg1 ...) (thing)))
4363 : (set (reg2) (some_const))
4364 : (set (mem (... reg2 ...) (thing)))
4365 :
4366 : After canonicalizing, the code takes the following form:
4367 :
4368 : (set (reg1) (some_const))
4369 : (set (mem (... reg1 ...) (thing)))
4370 : (set (reg2) (some_const))
4371 : (set (mem (... reg1 ...) (thing)))
4372 :
4373 : The set to reg2 is now trivially dead, and the memory reference (or
4374 : address, or whatever) may be a candidate for further CSEing.
4375 :
4376 : In this function, the result of apply_change_group can be ignored;
4377 : see canon_reg. */
4378 :
4379 : static void
4380 390838673 : canonicalize_insn (rtx_insn *insn, vec<struct set> *psets)
4381 : {
4382 390838673 : vec<struct set> sets = *psets;
4383 390838673 : int n_sets = sets.length ();
4384 390838673 : rtx tem;
4385 390838673 : rtx x = PATTERN (insn);
4386 390838673 : int i;
4387 :
4388 390838673 : if (CALL_P (insn))
4389 : {
4390 45997494 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4391 30694681 : if (GET_CODE (XEXP (tem, 0)) != SET)
4392 30490487 : XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4393 : }
4394 :
4395 390838673 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
4396 : {
4397 7080586 : canon_reg (SET_SRC (x), insn);
4398 7080586 : apply_change_group ();
4399 7080586 : fold_rtx (SET_SRC (x), insn);
4400 : }
4401 383758087 : else if (GET_CODE (x) == CLOBBER)
4402 : {
4403 : /* If we clobber memory, canon the address.
4404 : This does nothing when a register is clobbered
4405 : because we have already invalidated the reg. */
4406 62086 : if (MEM_P (XEXP (x, 0)))
4407 12970 : canon_reg (XEXP (x, 0), insn);
4408 : }
4409 383696001 : else if (GET_CODE (x) == USE
4410 383696001 : && ! (REG_P (XEXP (x, 0))
4411 1271285 : && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4412 : /* Canonicalize a USE of a pseudo register or memory location. */
4413 0 : canon_reg (x, insn);
4414 383696001 : else if (GET_CODE (x) == ASM_OPERANDS)
4415 18 : canon_asm_operands (x, insn);
4416 383695983 : else if (GET_CODE (x) == CALL)
4417 : {
4418 7723002 : canon_reg (x, insn);
4419 7723002 : apply_change_group ();
4420 7723002 : fold_rtx (x, insn);
4421 : }
4422 375972981 : else if (DEBUG_INSN_P (insn))
4423 182137889 : canon_reg (PATTERN (insn), insn);
4424 193835092 : else if (GET_CODE (x) == PARALLEL)
4425 : {
4426 93589875 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4427 : {
4428 62787458 : rtx y = XVECEXP (x, 0, i);
4429 62787458 : if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
4430 : {
4431 10192 : canon_reg (SET_SRC (y), insn);
4432 10192 : apply_change_group ();
4433 10192 : fold_rtx (SET_SRC (y), insn);
4434 : }
4435 62777266 : else if (GET_CODE (y) == CLOBBER)
4436 : {
4437 30423073 : if (MEM_P (XEXP (y, 0)))
4438 62294 : canon_reg (XEXP (y, 0), insn);
4439 : }
4440 32354193 : else if (GET_CODE (y) == USE
4441 32354193 : && ! (REG_P (XEXP (y, 0))
4442 159983 : && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4443 199698 : canon_reg (y, insn);
4444 32154495 : else if (GET_CODE (y) == ASM_OPERANDS)
4445 99551 : canon_asm_operands (y, insn);
4446 32054944 : else if (GET_CODE (y) == CALL)
4447 : {
4448 489033 : canon_reg (y, insn);
4449 489033 : apply_change_group ();
4450 489033 : fold_rtx (y, insn);
4451 : }
4452 : }
4453 : }
4454 :
4455 190471051 : if (n_sets == 1 && REG_NOTES (insn) != 0
4456 513839830 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4457 : {
4458 : /* We potentially will process this insn many times. Therefore,
4459 : drop the REG_EQUAL note if it is equal to the SET_SRC of the
4460 : unique set in INSN.
4461 :
4462 : Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4463 : because cse_insn handles those specially. */
4464 8601512 : if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART
4465 8601512 : && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
4466 181773 : remove_note (insn, tem);
4467 : else
4468 : {
4469 8419739 : canon_reg (XEXP (tem, 0), insn);
4470 8419739 : apply_change_group ();
4471 8419739 : XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn);
4472 8419739 : df_notes_rescan (insn);
4473 : }
4474 : }
4475 :
4476 : /* Canonicalize sources and addresses of destinations.
4477 : We do this in a separate pass to avoid problems when a MATCH_DUP is
4478 : present in the insn pattern. In that case, we want to ensure that
4479 : we don't break the duplicate nature of the pattern. So we will replace
4480 : both operands at the same time. Otherwise, we would fail to find an
4481 : equivalent substitution in the loop calling validate_change below.
4482 :
4483 : We used to suppress canonicalization of DEST if it appears in SRC,
4484 : but we don't do this any more. */
4485 :
4486 584055591 : for (i = 0; i < n_sets; i++)
4487 : {
4488 193216918 : rtx dest = SET_DEST (sets[i].rtl);
4489 193216918 : rtx src = SET_SRC (sets[i].rtl);
4490 193216918 : rtx new_rtx = canon_reg (src, insn);
4491 :
4492 193216918 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4493 :
4494 193216918 : if (GET_CODE (dest) == ZERO_EXTRACT)
4495 : {
4496 3803 : validate_change (insn, &XEXP (dest, 1),
4497 : canon_reg (XEXP (dest, 1), insn), 1);
4498 3803 : validate_change (insn, &XEXP (dest, 2),
4499 : canon_reg (XEXP (dest, 2), insn), 1);
4500 : }
4501 :
4502 194770689 : while (GET_CODE (dest) == SUBREG
4503 193238176 : || GET_CODE (dest) == ZERO_EXTRACT
4504 388005062 : || GET_CODE (dest) == STRICT_LOW_PART)
4505 1553771 : dest = XEXP (dest, 0);
4506 :
4507 193216918 : if (MEM_P (dest))
4508 28423104 : canon_reg (dest, insn);
4509 : }
4510 :
4511 : /* Now that we have done all the replacements, we can apply the change
4512 : group and see if they all work. Note that this will cause some
4513 : canonicalizations that would have worked individually not to be applied
4514 : because some other canonicalization didn't work, but this should not
4515 : occur often.
4516 :
4517 : The result of apply_change_group can be ignored; see canon_reg. */
4518 :
4519 390838673 : apply_change_group ();
4520 390838673 : }
4521 :
4522 : /* Main function of CSE.
4523 : First simplify sources and addresses of all assignments
4524 : in the instruction, using previously-computed equivalents values.
4525 : Then install the new sources and destinations in the table
4526 : of available values. */
4527 :
4528 : static void
4529 390838673 : cse_insn (rtx_insn *insn)
4530 : {
4531 390838673 : rtx x = PATTERN (insn);
4532 390838673 : int i;
4533 390838673 : rtx tem;
4534 390838673 : int n_sets = 0;
4535 :
4536 390838673 : rtx src_eqv = 0;
4537 390838673 : struct table_elt *src_eqv_elt = 0;
4538 390838673 : int src_eqv_volatile = 0;
4539 390838673 : int src_eqv_in_memory = 0;
4540 390838673 : unsigned src_eqv_hash = 0;
4541 :
4542 390838673 : this_insn = insn;
4543 :
4544 : /* Find all regs explicitly clobbered in this insn,
4545 : to ensure they are not replaced with any other regs
4546 : elsewhere in this insn. */
4547 390838673 : invalidate_from_sets_and_clobbers (insn);
4548 :
4549 : /* Record all the SETs in this instruction. */
4550 390838673 : auto_vec<struct set, 8> sets;
4551 390838673 : n_sets = find_sets_in_insn (insn, (vec<struct set>*)&sets);
4552 :
4553 : /* Substitute the canonical register where possible. */
4554 390838673 : canonicalize_insn (insn, (vec<struct set>*)&sets);
4555 :
4556 : /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4557 : if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4558 : latter condition is necessary because SRC_EQV is handled specially for
4559 : this case, and if it isn't set, then there will be no equivalence
4560 : for the destination. */
4561 190471051 : if (n_sets == 1 && REG_NOTES (insn) != 0
4562 513695280 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4563 : {
4564 :
4565 8419739 : if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT
4566 8419739 : && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4567 16844 : || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4568 8402895 : src_eqv = copy_rtx (XEXP (tem, 0));
4569 : /* If DEST is of the form ZERO_EXTACT, as in:
4570 : (set (zero_extract:SI (reg:SI 119)
4571 : (const_int 16 [0x10])
4572 : (const_int 16 [0x10]))
4573 : (const_int 51154 [0xc7d2]))
4574 : REG_EQUAL note will specify the value of register (reg:SI 119) at this
4575 : point. Note that this is different from SRC_EQV. We can however
4576 : calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4577 16844 : else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
4578 0 : && CONST_INT_P (XEXP (tem, 0))
4579 0 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
4580 16844 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
4581 : {
4582 0 : rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
4583 : /* This is the mode of XEXP (tem, 0) as well. */
4584 0 : scalar_int_mode dest_mode
4585 0 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
4586 0 : rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
4587 0 : rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
4588 0 : HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
4589 0 : HOST_WIDE_INT mask;
4590 0 : unsigned int shift;
4591 0 : if (BITS_BIG_ENDIAN)
4592 : shift = (GET_MODE_PRECISION (dest_mode)
4593 : - INTVAL (pos) - INTVAL (width));
4594 : else
4595 0 : shift = INTVAL (pos);
4596 0 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
4597 : mask = HOST_WIDE_INT_M1;
4598 : else
4599 0 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
4600 0 : val = (val >> shift) & mask;
4601 0 : src_eqv = GEN_INT (val);
4602 : }
4603 : }
4604 :
4605 : /* Set sets[i].src_elt to the class each source belongs to.
4606 : Detect assignments from or to volatile things
4607 : and set set[i] to zero so they will be ignored
4608 : in the rest of this function.
4609 :
4610 : Nothing in this loop changes the hash table or the register chains. */
4611 :
4612 584055599 : for (i = 0; i < n_sets; i++)
4613 : {
4614 193216926 : bool repeat = false;
4615 193216926 : bool noop_insn = false;
4616 193216926 : rtx src, dest;
4617 193216926 : rtx src_folded;
4618 193216926 : struct table_elt *elt = 0, *p;
4619 193216926 : machine_mode mode;
4620 193216926 : rtx src_eqv_here;
4621 193216926 : rtx src_const = 0;
4622 193216926 : rtx src_related = 0;
4623 193216926 : rtx dest_related = 0;
4624 193216926 : bool src_related_is_const_anchor = false;
4625 193216926 : struct table_elt *src_const_elt = 0;
4626 193216926 : int src_cost = MAX_COST;
4627 193216926 : int src_eqv_cost = MAX_COST;
4628 193216926 : int src_folded_cost = MAX_COST;
4629 193216926 : int src_related_cost = MAX_COST;
4630 193216926 : int src_elt_cost = MAX_COST;
4631 193216926 : int src_regcost = MAX_COST;
4632 193216926 : int src_eqv_regcost = MAX_COST;
4633 193216926 : int src_folded_regcost = MAX_COST;
4634 193216926 : int src_related_regcost = MAX_COST;
4635 193216926 : int src_elt_regcost = MAX_COST;
4636 193216926 : scalar_int_mode int_mode;
4637 193216926 : bool is_fake_set = sets[i].is_fake_set;
4638 :
4639 193216926 : dest = SET_DEST (sets[i].rtl);
4640 193216926 : src = SET_SRC (sets[i].rtl);
4641 :
4642 : /* If SRC is a constant that has no machine mode,
4643 : hash it with the destination's machine mode.
4644 : This way we can keep different modes separate. */
4645 :
4646 193216926 : mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4647 193216926 : sets[i].mode = mode;
4648 :
4649 193216926 : if (!is_fake_set && src_eqv)
4650 : {
4651 8402895 : machine_mode eqvmode = mode;
4652 8402895 : if (GET_CODE (dest) == STRICT_LOW_PART)
4653 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4654 8402895 : do_not_record = 0;
4655 8402895 : hash_arg_in_memory = 0;
4656 8402895 : src_eqv_hash = HASH (src_eqv, eqvmode);
4657 :
4658 : /* Find the equivalence class for the equivalent expression. */
4659 :
4660 8402895 : if (!do_not_record)
4661 8400661 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4662 :
4663 8402895 : src_eqv_volatile = do_not_record;
4664 8402895 : src_eqv_in_memory = hash_arg_in_memory;
4665 : }
4666 :
4667 : /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4668 : value of the INNER register, not the destination. So it is not
4669 : a valid substitution for the source. But save it for later. */
4670 193216926 : if (is_fake_set || GET_CODE (dest) == STRICT_LOW_PART)
4671 : src_eqv_here = 0;
4672 : else
4673 193216926 : src_eqv_here = src_eqv;
4674 :
4675 : /* Simplify and foldable subexpressions in SRC. Then get the fully-
4676 : simplified result, which may not necessarily be valid. */
4677 193216926 : src_folded = fold_rtx (src, NULL);
4678 :
4679 : #if 0
4680 : /* ??? This caused bad code to be generated for the m68k port with -O2.
4681 : Suppose src is (CONST_INT -1), and that after truncation src_folded
4682 : is (CONST_INT 3). Suppose src_folded is then used for src_const.
4683 : At the end we will add src and src_const to the same equivalence
4684 : class. We now have 3 and -1 on the same equivalence class. This
4685 : causes later instructions to be mis-optimized. */
4686 : /* If storing a constant in a bitfield, pre-truncate the constant
4687 : so we will be able to record it later. */
4688 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4689 : {
4690 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4691 :
4692 : if (CONST_INT_P (src)
4693 : && CONST_INT_P (width)
4694 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4695 : && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4696 : src_folded
4697 : = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1
4698 : << INTVAL (width)) - 1));
4699 : }
4700 : #endif
4701 :
4702 : /* Compute SRC's hash code, and also notice if it
4703 : should not be recorded at all. In that case,
4704 : prevent any further processing of this assignment.
4705 :
4706 : We set DO_NOT_RECORD if the destination has a REG_UNUSED note.
4707 : This avoids getting the source register into the tables, where it
4708 : may be invalidated later (via REG_QTY), then trigger an ICE upon
4709 : re-insertion.
4710 :
4711 : This is only a problem in multi-set insns. If it were a single
4712 : set the dead copy would have been removed. If the RHS were anything
4713 : but a simple REG, then we won't call insert_regs and thus there's
4714 : no potential for triggering the ICE. */
4715 386433852 : do_not_record = (REG_P (dest)
4716 143081974 : && REG_P (src)
4717 227110357 : && find_reg_note (insn, REG_UNUSED, dest));
4718 193216926 : hash_arg_in_memory = 0;
4719 :
4720 193216926 : sets[i].src = src;
4721 193216926 : sets[i].src_hash = HASH (src, mode);
4722 193216926 : sets[i].src_volatile = do_not_record;
4723 193216926 : sets[i].src_in_memory = hash_arg_in_memory;
4724 :
4725 : /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4726 : a pseudo, do not record SRC. Using SRC as a replacement for
4727 : anything else will be incorrect in that situation. Note that
4728 : this usually occurs only for stack slots, in which case all the
4729 : RTL would be referring to SRC, so we don't lose any optimization
4730 : opportunities by not having SRC in the hash table. */
4731 :
4732 193216926 : if (MEM_P (src)
4733 24992729 : && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4734 918394 : && REG_P (dest)
4735 194135320 : && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4736 918394 : sets[i].src_volatile = 1;
4737 :
4738 192298532 : else if (GET_CODE (src) == ASM_OPERANDS
4739 195535 : && GET_CODE (x) == PARALLEL)
4740 : {
4741 : /* Do not record result of a non-volatile inline asm with
4742 : more than one result. */
4743 195511 : if (n_sets > 1)
4744 152467 : sets[i].src_volatile = 1;
4745 :
4746 195511 : int j, lim = XVECLEN (x, 0);
4747 1006487 : for (j = 0; j < lim; j++)
4748 : {
4749 812762 : rtx y = XVECEXP (x, 0, j);
4750 : /* And do not record result of a non-volatile inline asm
4751 : with "memory" clobber. */
4752 812762 : if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0)))
4753 : {
4754 1786 : sets[i].src_volatile = 1;
4755 1786 : break;
4756 : }
4757 : }
4758 : }
4759 :
4760 : #if 0
4761 : /* It is no longer clear why we used to do this, but it doesn't
4762 : appear to still be needed. So let's try without it since this
4763 : code hurts cse'ing widened ops. */
4764 : /* If source is a paradoxical subreg (such as QI treated as an SI),
4765 : treat it as volatile. It may do the work of an SI in one context
4766 : where the extra bits are not being used, but cannot replace an SI
4767 : in general. */
4768 : if (paradoxical_subreg_p (src))
4769 : sets[i].src_volatile = 1;
4770 : #endif
4771 :
4772 : /* Locate all possible equivalent forms for SRC. Try to replace
4773 : SRC in the insn with each cheaper equivalent.
4774 :
4775 : We have the following types of equivalents: SRC itself, a folded
4776 : version, a value given in a REG_EQUAL note, or a value related
4777 : to a constant.
4778 :
4779 : Each of these equivalents may be part of an additional class
4780 : of equivalents (if more than one is in the table, they must be in
4781 : the same class; we check for this).
4782 :
4783 : If the source is volatile, we don't do any table lookups.
4784 :
4785 : We note any constant equivalent for possible later use in a
4786 : REG_NOTE. */
4787 :
4788 193216926 : if (!sets[i].src_volatile)
4789 159055394 : elt = lookup (src, sets[i].src_hash, mode);
4790 :
4791 193216926 : sets[i].src_elt = elt;
4792 :
4793 193216926 : if (elt && src_eqv_here && src_eqv_elt)
4794 : {
4795 2807335 : if (elt->first_same_value != src_eqv_elt->first_same_value)
4796 : {
4797 : /* The REG_EQUAL is indicating that two formerly distinct
4798 : classes are now equivalent. So merge them. */
4799 9524 : merge_equiv_classes (elt, src_eqv_elt);
4800 9524 : src_eqv_hash = HASH (src_eqv, elt->mode);
4801 9524 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4802 : }
4803 :
4804 9524 : src_eqv_here = 0;
4805 : }
4806 :
4807 190212623 : else if (src_eqv_elt)
4808 : elt = src_eqv_elt;
4809 :
4810 : /* Try to find a constant somewhere and record it in `src_const'.
4811 : Record its table element, if any, in `src_const_elt'. Look in
4812 : any known equivalences first. (If the constant is not in the
4813 : table, also set `sets[i].src_const_hash'). */
4814 190049274 : if (elt)
4815 90707358 : for (p = elt->first_same_value; p; p = p->next_same_value)
4816 72647190 : if (p->is_const)
4817 : {
4818 15728815 : src_const = p->exp;
4819 15728815 : src_const_elt = elt;
4820 15728815 : break;
4821 : }
4822 :
4823 33788983 : if (src_const == 0
4824 177488111 : && (CONSTANT_P (src_folded)
4825 : /* Consider (minus (label_ref L1) (label_ref L2)) as
4826 : "constant" here so we will record it. This allows us
4827 : to fold switch statements when an ADDR_DIFF_VEC is used. */
4828 151460888 : || (GET_CODE (src_folded) == MINUS
4829 1785223 : && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4830 95 : && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4831 : src_const = src_folded, src_const_elt = elt;
4832 167189617 : else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4833 410631 : src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4834 :
4835 : /* If we don't know if the constant is in the table, get its
4836 : hash code and look it up. */
4837 193216926 : if (src_const && src_const_elt == 0)
4838 : {
4839 26437728 : sets[i].src_const_hash = HASH (src_const, mode);
4840 26437728 : src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4841 : }
4842 :
4843 193216926 : sets[i].src_const = src_const;
4844 193216926 : sets[i].src_const_elt = src_const_elt;
4845 :
4846 : /* If the constant and our source are both in the table, mark them as
4847 : equivalent. Otherwise, if a constant is in the table but the source
4848 : isn't, set ELT to it. */
4849 193216926 : if (src_const_elt && elt
4850 15729027 : && src_const_elt->first_same_value != elt->first_same_value)
4851 0 : merge_equiv_classes (elt, src_const_elt);
4852 193216926 : else if (src_const_elt && elt == 0)
4853 193216926 : elt = src_const_elt;
4854 :
4855 : /* See if there is a register linearly related to a constant
4856 : equivalent of SRC. */
4857 193216926 : if (src_const
4858 42166755 : && (GET_CODE (src_const) == CONST
4859 41534231 : || (src_const_elt && src_const_elt->related_value != 0)))
4860 : {
4861 727557 : src_related = use_related_value (src_const, src_const_elt);
4862 727557 : if (src_related)
4863 : {
4864 230432 : struct table_elt *src_related_elt
4865 230432 : = lookup (src_related, HASH (src_related, mode), mode);
4866 230432 : if (src_related_elt && elt)
4867 : {
4868 1646 : if (elt->first_same_value
4869 1646 : != src_related_elt->first_same_value)
4870 : /* This can occur when we previously saw a CONST
4871 : involving a SYMBOL_REF and then see the SYMBOL_REF
4872 : twice. Merge the involved classes. */
4873 862 : merge_equiv_classes (elt, src_related_elt);
4874 :
4875 : src_related = 0;
4876 193216926 : src_related_elt = 0;
4877 : }
4878 228786 : else if (src_related_elt && elt == 0)
4879 7464 : elt = src_related_elt;
4880 : }
4881 : }
4882 :
4883 : /* See if we have a CONST_INT that is already in a register in a
4884 : wider mode. */
4885 :
4886 41937969 : if (src_const && src_related == 0 && CONST_INT_P (src_const)
4887 18421888 : && is_int_mode (mode, &int_mode)
4888 213634504 : && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD)
4889 : {
4890 7893433 : opt_scalar_int_mode wider_mode_iter;
4891 20327048 : FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode)
4892 : {
4893 20327048 : scalar_int_mode wider_mode = wider_mode_iter.require ();
4894 21056422 : if (GET_MODE_PRECISION (wider_mode) > BITS_PER_WORD)
4895 : break;
4896 :
4897 12660141 : struct table_elt *const_elt
4898 12660141 : = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4899 :
4900 12660141 : if (const_elt == 0)
4901 11995817 : continue;
4902 :
4903 664324 : for (const_elt = const_elt->first_same_value;
4904 2045160 : const_elt; const_elt = const_elt->next_same_value)
4905 1607362 : if (REG_P (const_elt->exp))
4906 : {
4907 226526 : src_related = gen_lowpart (int_mode, const_elt->exp);
4908 226526 : break;
4909 : }
4910 :
4911 664324 : if (src_related != 0)
4912 : break;
4913 : }
4914 : }
4915 :
4916 : /* Another possibility is that we have an AND with a constant in
4917 : a mode narrower than a word. If so, it might have been generated
4918 : as part of an "if" which would narrow the AND. If we already
4919 : have done the AND in a wider mode, we can use a SUBREG of that
4920 : value. */
4921 :
4922 189014270 : if (flag_expensive_optimizations && ! src_related
4923 322361472 : && is_a <scalar_int_mode> (mode, &int_mode)
4924 129144546 : && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4925 194758722 : && GET_MODE_SIZE (int_mode) < UNITS_PER_WORD)
4926 : {
4927 1030036 : opt_scalar_int_mode tmode_iter;
4928 1030036 : rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4929 :
4930 2831642 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4931 : {
4932 2831642 : scalar_int_mode tmode = tmode_iter.require ();
4933 5804583 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4934 : break;
4935 :
4936 1801663 : rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4937 1801663 : struct table_elt *larger_elt;
4938 :
4939 1801663 : if (inner)
4940 : {
4941 1798009 : PUT_MODE (new_and, tmode);
4942 1798009 : XEXP (new_and, 0) = inner;
4943 1798009 : larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4944 1798009 : if (larger_elt == 0)
4945 1797952 : continue;
4946 :
4947 57 : for (larger_elt = larger_elt->first_same_value;
4948 57 : larger_elt; larger_elt = larger_elt->next_same_value)
4949 57 : if (REG_P (larger_elt->exp))
4950 : {
4951 57 : src_related
4952 57 : = gen_lowpart (int_mode, larger_elt->exp);
4953 57 : break;
4954 : }
4955 :
4956 57 : if (src_related)
4957 : break;
4958 : }
4959 : }
4960 : }
4961 :
4962 : /* See if a MEM has already been loaded with a widening operation;
4963 : if it has, we can use a subreg of that. Many CISC machines
4964 : also have such operations, but this is only likely to be
4965 : beneficial on these machines. */
4966 :
4967 193216926 : rtx_code extend_op;
4968 193216926 : if (flag_expensive_optimizations && src_related == 0
4969 : && MEM_P (src) && ! do_not_record
4970 : && is_a <scalar_int_mode> (mode, &int_mode)
4971 : && (extend_op = load_extend_op (int_mode)) != UNKNOWN)
4972 : {
4973 : #if GCC_VERSION >= 5000
4974 : struct rtx_def memory_extend_buf;
4975 : rtx memory_extend_rtx = &memory_extend_buf;
4976 : #else
4977 : /* Workaround GCC < 5 bug, fixed in r5-3834 as part of PR63362
4978 : fix. */
4979 : alignas (rtx_def) unsigned char memory_extended_buf[sizeof (rtx_def)];
4980 : rtx memory_extend_rtx = (rtx) &memory_extended_buf[0];
4981 : #endif
4982 :
4983 : /* Set what we are trying to extend and the operation it might
4984 : have been extended with. */
4985 : memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
4986 : PUT_CODE (memory_extend_rtx, extend_op);
4987 : XEXP (memory_extend_rtx, 0) = src;
4988 :
4989 : opt_scalar_int_mode tmode_iter;
4990 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4991 : {
4992 : struct table_elt *larger_elt;
4993 :
4994 : scalar_int_mode tmode = tmode_iter.require ();
4995 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4996 : break;
4997 :
4998 : PUT_MODE (memory_extend_rtx, tmode);
4999 : larger_elt = lookup (memory_extend_rtx,
5000 : HASH (memory_extend_rtx, tmode), tmode);
5001 : if (larger_elt == 0)
5002 : continue;
5003 :
5004 : for (larger_elt = larger_elt->first_same_value;
5005 : larger_elt; larger_elt = larger_elt->next_same_value)
5006 : if (REG_P (larger_elt->exp))
5007 : {
5008 : src_related = gen_lowpart (int_mode, larger_elt->exp);
5009 : break;
5010 : }
5011 :
5012 : if (src_related)
5013 : break;
5014 : }
5015 : }
5016 :
5017 : /* Try to express the constant using a register+offset expression
5018 : derived from a constant anchor. */
5019 :
5020 193216926 : if (targetm.const_anchor
5021 0 : && !src_related
5022 0 : && src_const
5023 0 : && GET_CODE (src_const) == CONST_INT)
5024 : {
5025 0 : src_related = try_const_anchors (src_const, mode);
5026 0 : src_related_is_const_anchor = src_related != NULL_RTX;
5027 : }
5028 :
5029 : /* Try to re-materialize a vec_dup with an existing constant. */
5030 193216926 : rtx src_elt;
5031 5595560 : if ((!src_eqv_here || CONSTANT_P (src_eqv_here))
5032 193216926 : && const_vec_duplicate_p (src, &src_elt))
5033 : {
5034 641151 : machine_mode const_mode = GET_MODE_INNER (GET_MODE (src));
5035 641151 : struct table_elt *related_elt
5036 641151 : = lookup (src_elt, HASH (src_elt, const_mode), const_mode);
5037 641151 : if (related_elt)
5038 : {
5039 267560 : for (related_elt = related_elt->first_same_value;
5040 1764616 : related_elt; related_elt = related_elt->next_same_value)
5041 1532058 : if (REG_P (related_elt->exp))
5042 : {
5043 : /* We don't need to compare costs with an existing (constant)
5044 : src_eqv_here, since any such src_eqv_here should already be
5045 : available in src_const. */
5046 35002 : src_eqv_here
5047 35002 : = gen_rtx_VEC_DUPLICATE (GET_MODE (src),
5048 : related_elt->exp);
5049 35002 : break;
5050 : }
5051 : }
5052 : }
5053 :
5054 193216926 : if (src == src_folded)
5055 188919827 : src_folded = 0;
5056 :
5057 : /* At this point, ELT, if nonzero, points to a class of expressions
5058 : equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5059 : and SRC_RELATED, if nonzero, each contain additional equivalent
5060 : expressions. Prune these latter expressions by deleting expressions
5061 : already in the equivalence class.
5062 :
5063 : Check for an equivalent identical to the destination. If found,
5064 : this is the preferred equivalent since it will likely lead to
5065 : elimination of the insn. Indicate this by placing it in
5066 : `src_related'. */
5067 :
5068 193216926 : if (elt)
5069 33857499 : elt = elt->first_same_value;
5070 290235405 : for (p = elt; p; p = p->next_same_value)
5071 : {
5072 97018479 : enum rtx_code code = GET_CODE (p->exp);
5073 :
5074 : /* If the expression is not valid, ignore it. Then we do not
5075 : have to check for validity below. In most cases, we can use
5076 : `rtx_equal_p', since canonicalization has already been done. */
5077 97018479 : if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5078 4012 : continue;
5079 :
5080 : /* Also skip paradoxical subregs, unless that's what we're
5081 : looking for. */
5082 97014467 : if (paradoxical_subreg_p (p->exp)
5083 2361518 : && ! (src != 0
5084 3212 : && GET_CODE (src) == SUBREG
5085 3212 : && GET_MODE (src) == GET_MODE (p->exp)
5086 3212 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5087 : GET_MODE (SUBREG_REG (p->exp)))))
5088 3416 : continue;
5089 :
5090 97011051 : if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5091 : src = 0;
5092 2162983 : else if (src_folded && GET_CODE (src_folded) == code
5093 64144276 : && rtx_equal_p (src_folded, p->exp))
5094 : src_folded = 0;
5095 728784 : else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5096 63357483 : && rtx_equal_p (src_eqv_here, p->exp))
5097 : src_eqv_here = 0;
5098 902623 : else if (src_related && GET_CODE (src_related) == code
5099 62823038 : && rtx_equal_p (src_related, p->exp))
5100 : src_related = 0;
5101 :
5102 : /* This is the same as the destination of the insns, we want
5103 : to prefer it. The code below will then give it a negative
5104 : cost. */
5105 97011051 : if (!dest_related
5106 97011051 : && GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5107 213774 : dest_related = p->exp;
5108 : }
5109 :
5110 : /* Find the cheapest valid equivalent, trying all the available
5111 : possibilities. Prefer items not in the hash table to ones
5112 : that are when they are equal cost. Note that we can never
5113 : worsen an insn as the current contents will also succeed.
5114 : If we find an equivalent identical to the destination, use it as best,
5115 : since this insn will probably be eliminated in that case. */
5116 193216926 : if (src)
5117 : {
5118 159809395 : if (rtx_equal_p (src, dest))
5119 : src_cost = src_regcost = -1;
5120 : else
5121 : {
5122 159809305 : src_cost = COST (src, mode);
5123 159809305 : src_regcost = approx_reg_cost (src);
5124 : }
5125 : }
5126 :
5127 193216926 : if (src_eqv_here)
5128 : {
5129 5336871 : if (rtx_equal_p (src_eqv_here, dest))
5130 : src_eqv_cost = src_eqv_regcost = -1;
5131 : else
5132 : {
5133 5336871 : src_eqv_cost = COST (src_eqv_here, mode);
5134 5336871 : src_eqv_regcost = approx_reg_cost (src_eqv_here);
5135 : }
5136 : }
5137 :
5138 193216926 : if (src_folded)
5139 : {
5140 3757030 : if (rtx_equal_p (src_folded, dest))
5141 : src_folded_cost = src_folded_regcost = -1;
5142 : else
5143 : {
5144 3745592 : src_folded_cost = COST (src_folded, mode);
5145 3745592 : src_folded_regcost = approx_reg_cost (src_folded);
5146 : }
5147 : }
5148 :
5149 193216926 : if (dest_related)
5150 : {
5151 : src_related_cost = src_related_regcost = -1;
5152 : /* Handle it as src_related. */
5153 : src_related = dest_related;
5154 : }
5155 193003152 : else if (src_related)
5156 : {
5157 454276 : src_related_cost = COST (src_related, mode);
5158 454276 : src_related_regcost = approx_reg_cost (src_related);
5159 :
5160 : /* If a const-anchor is used to synthesize a constant that
5161 : normally requires multiple instructions then slightly prefer
5162 : it over the original sequence. These instructions are likely
5163 : to become redundant now. We can't compare against the cost
5164 : of src_eqv_here because, on MIPS for example, multi-insn
5165 : constants have zero cost; they are assumed to be hoisted from
5166 : loops. */
5167 454276 : if (src_related_is_const_anchor
5168 454276 : && src_related_cost == src_cost
5169 0 : && src_eqv_here)
5170 0 : src_related_cost--;
5171 : }
5172 :
5173 : /* If this was an indirect jump insn, a known label will really be
5174 : cheaper even though it looks more expensive. */
5175 193216926 : if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5176 193216926 : src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5177 :
5178 : /* Terminate loop when replacement made. This must terminate since
5179 : the current contents will be tested and will always be valid. */
5180 198409477 : while (!is_fake_set)
5181 : {
5182 : rtx trial;
5183 :
5184 : /* Skip invalid entries. */
5185 34793037 : while (elt && !REG_P (elt->exp)
5186 206352321 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5187 20 : elt = elt->next_same_value;
5188 :
5189 : /* A paradoxical subreg would be bad here: it'll be the right
5190 : size, but later may be adjusted so that the upper bits aren't
5191 : what we want. So reject it. */
5192 197773348 : if (elt != 0
5193 34793017 : && paradoxical_subreg_p (elt->exp)
5194 : /* It is okay, though, if the rtx we're trying to match
5195 : will ignore any of the bits we can't predict. */
5196 197774664 : && ! (src != 0
5197 1316 : && GET_CODE (src) == SUBREG
5198 1316 : && GET_MODE (src) == GET_MODE (elt->exp)
5199 1316 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5200 : GET_MODE (SUBREG_REG (elt->exp)))))
5201 : {
5202 1316 : elt = elt->next_same_value;
5203 1316 : continue;
5204 : }
5205 :
5206 197770716 : if (elt)
5207 : {
5208 34791701 : src_elt_cost = elt->cost;
5209 34791701 : src_elt_regcost = elt->regcost;
5210 : }
5211 :
5212 : /* Find cheapest and skip it for the next time. For items
5213 : of equal cost, use this order:
5214 : src_folded, src, src_eqv, src_related and hash table entry. */
5215 197770716 : if (src_folded
5216 7894937 : && preferable (src_folded_cost, src_folded_regcost,
5217 : src_cost, src_regcost) <= 0
5218 6034046 : && preferable (src_folded_cost, src_folded_regcost,
5219 : src_eqv_cost, src_eqv_regcost) <= 0
5220 5180787 : && preferable (src_folded_cost, src_folded_regcost,
5221 : src_related_cost, src_related_regcost) <= 0
5222 202948589 : && preferable (src_folded_cost, src_folded_regcost,
5223 : src_elt_cost, src_elt_regcost) <= 0)
5224 : trial = src_folded, src_folded_cost = MAX_COST;
5225 193047128 : else if (src
5226 158741318 : && preferable (src_cost, src_regcost,
5227 : src_eqv_cost, src_eqv_regcost) <= 0
5228 157227473 : && preferable (src_cost, src_regcost,
5229 : src_related_cost, src_related_regcost) <= 0
5230 350248875 : && preferable (src_cost, src_regcost,
5231 : src_elt_cost, src_elt_regcost) <= 0)
5232 : trial = src, src_cost = MAX_COST;
5233 35914970 : else if (src_eqv_here
5234 1716469 : && preferable (src_eqv_cost, src_eqv_regcost,
5235 : src_related_cost, src_related_regcost) <= 0
5236 37630694 : && preferable (src_eqv_cost, src_eqv_regcost,
5237 : src_elt_cost, src_elt_regcost) <= 0)
5238 : trial = src_eqv_here, src_eqv_cost = MAX_COST;
5239 34404733 : else if (src_related
5240 34404733 : && preferable (src_related_cost, src_related_regcost,
5241 : src_elt_cost, src_elt_regcost) <= 0)
5242 : trial = src_related, src_related_cost = MAX_COST;
5243 : else
5244 : {
5245 34174089 : trial = elt->exp;
5246 34174089 : elt = elt->next_same_value;
5247 34174089 : src_elt_cost = MAX_COST;
5248 : }
5249 :
5250 : /* Try to optimize
5251 : (set (reg:M N) (const_int A))
5252 : (set (reg:M2 O) (const_int B))
5253 : (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5254 : (reg:M2 O)). */
5255 197770716 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5256 3803 : && CONST_INT_P (trial)
5257 716 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5258 716 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5259 565 : && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5260 101 : && (known_ge
5261 : (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))),
5262 : INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))))
5263 197770716 : && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5264 101 : + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5265 : <= HOST_BITS_PER_WIDE_INT))
5266 : {
5267 101 : rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5268 101 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5269 101 : rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5270 101 : unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5271 101 : struct table_elt *dest_elt
5272 101 : = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5273 101 : rtx dest_cst = NULL;
5274 :
5275 101 : if (dest_elt)
5276 147 : for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5277 100 : if (p->is_const && CONST_INT_P (p->exp))
5278 : {
5279 : dest_cst = p->exp;
5280 : break;
5281 : }
5282 55 : if (dest_cst)
5283 : {
5284 8 : HOST_WIDE_INT val = INTVAL (dest_cst);
5285 8 : HOST_WIDE_INT mask;
5286 8 : unsigned int shift;
5287 : /* This is the mode of DEST_CST as well. */
5288 8 : scalar_int_mode dest_mode
5289 8 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
5290 8 : if (BITS_BIG_ENDIAN)
5291 : shift = GET_MODE_PRECISION (dest_mode)
5292 : - INTVAL (pos) - INTVAL (width);
5293 : else
5294 8 : shift = INTVAL (pos);
5295 8 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5296 : mask = HOST_WIDE_INT_M1;
5297 : else
5298 8 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
5299 8 : val &= ~(mask << shift);
5300 8 : val |= (INTVAL (trial) & mask) << shift;
5301 8 : val = trunc_int_for_mode (val, dest_mode);
5302 8 : validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5303 : dest_reg, 1);
5304 8 : validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5305 : GEN_INT (val), 1);
5306 8 : if (apply_change_group ())
5307 : {
5308 8 : rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5309 8 : if (note)
5310 : {
5311 0 : remove_note (insn, note);
5312 0 : df_notes_rescan (insn);
5313 : }
5314 8 : src_eqv = NULL_RTX;
5315 8 : src_eqv_elt = NULL;
5316 8 : src_eqv_volatile = 0;
5317 8 : src_eqv_in_memory = 0;
5318 8 : src_eqv_hash = 0;
5319 8 : repeat = true;
5320 8 : break;
5321 : }
5322 : }
5323 : }
5324 :
5325 : /* We don't normally have an insn matching (set (pc) (pc)), so
5326 : check for this separately here. We will delete such an
5327 : insn below.
5328 :
5329 : For other cases such as a table jump or conditional jump
5330 : where we know the ultimate target, go ahead and replace the
5331 : operand. While that may not make a valid insn, we will
5332 : reemit the jump below (and also insert any necessary
5333 : barriers). */
5334 195260920 : if (n_sets == 1 && dest == pc_rtx
5335 217960025 : && (trial == pc_rtx
5336 20178063 : || (GET_CODE (trial) == LABEL_REF
5337 5250 : && ! condjump_p (insn))))
5338 : {
5339 : /* Don't substitute non-local labels, this confuses CFG. */
5340 13871 : if (GET_CODE (trial) == LABEL_REF
5341 12563 : && LABEL_REF_NONLOCAL_P (trial))
5342 1308 : continue;
5343 :
5344 11255 : SET_SRC (sets[i].rtl) = trial;
5345 11255 : cse_jumps_altered = true;
5346 11255 : break;
5347 : }
5348 :
5349 : /* Similarly, lots of targets don't allow no-op
5350 : (set (mem x) (mem x)) moves. Even (set (reg x) (reg x))
5351 : might be impossible for certain registers (like CC registers). */
5352 197758145 : else if (n_sets == 1
5353 195248357 : && !CALL_P (insn)
5354 194759388 : && (MEM_P (trial) || REG_P (trial))
5355 78857306 : && rtx_equal_p (trial, dest)
5356 202847 : && !side_effects_p (dest)
5357 202843 : && (cfun->can_delete_dead_exceptions
5358 47635 : || insn_nothrow_p (insn))
5359 : /* We can only remove the later store if the earlier aliases
5360 : at least all accesses the later one. */
5361 197950427 : && (!MEM_P (trial)
5362 22949 : || ((MEM_ALIAS_SET (dest) == MEM_ALIAS_SET (trial)
5363 8717 : || alias_set_subset_of (MEM_ALIAS_SET (dest),
5364 8717 : MEM_ALIAS_SET (trial)))
5365 14797 : && (!MEM_EXPR (trial)
5366 14314 : || refs_same_for_tbaa_p (MEM_EXPR (trial),
5367 14314 : MEM_EXPR (dest))))))
5368 : {
5369 182821 : SET_SRC (sets[i].rtl) = trial;
5370 182821 : noop_insn = true;
5371 182821 : break;
5372 : }
5373 :
5374 : /* Reject certain invalid forms of CONST that we create. */
5375 197575324 : else if (CONSTANT_P (trial)
5376 32270880 : && GET_CODE (trial) == CONST
5377 : /* Reject cases that will cause decode_rtx_const to
5378 : die. On the alpha when simplifying a switch, we
5379 : get (const (truncate (minus (label_ref)
5380 : (label_ref)))). */
5381 567909 : && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5382 : /* Likewise on IA-64, except without the
5383 : truncate. */
5384 567909 : || (GET_CODE (XEXP (trial, 0)) == MINUS
5385 0 : && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5386 0 : && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5387 : /* Do nothing for this case. */
5388 : ;
5389 :
5390 : /* Do not replace anything with a MEM, except the replacement
5391 : is a no-op. This allows this loop to terminate. */
5392 197575324 : else if (MEM_P (trial) && !rtx_equal_p (trial, SET_SRC(sets[i].rtl)))
5393 : /* Do nothing for this case. */
5394 : ;
5395 :
5396 : /* Look for a substitution that makes a valid insn. */
5397 197477753 : else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5398 : trial, 0))
5399 : {
5400 192385397 : rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5401 :
5402 : /* The result of apply_change_group can be ignored; see
5403 : canon_reg. */
5404 :
5405 192385397 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5406 192385397 : apply_change_group ();
5407 :
5408 192385397 : break;
5409 : }
5410 :
5411 : /* If the current function uses a constant pool and this is a
5412 : constant, try making a pool entry. Put it in src_folded
5413 : unless we already have done this since that is where it
5414 : likely came from. */
5415 :
5416 5092356 : else if (crtl->uses_const_pool
5417 3728938 : && CONSTANT_P (trial)
5418 2740125 : && !CONST_INT_P (trial)
5419 2721762 : && (src_folded == 0 || !MEM_P (src_folded))
5420 1879889 : && GET_MODE_CLASS (mode) != MODE_CC
5421 1879889 : && mode != VOIDmode)
5422 : {
5423 1879889 : src_folded = force_const_mem (mode, trial);
5424 1879889 : if (src_folded)
5425 : {
5426 1879239 : src_folded_cost = COST (src_folded, mode);
5427 1879239 : src_folded_regcost = approx_reg_cost (src_folded);
5428 : }
5429 : }
5430 : }
5431 :
5432 : /* If we changed the insn too much, handle this set from scratch. */
5433 192579473 : if (repeat)
5434 : {
5435 8 : i--;
5436 8 : continue;
5437 : }
5438 :
5439 193216918 : src = SET_SRC (sets[i].rtl);
5440 :
5441 : /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5442 : However, there is an important exception: If both are registers
5443 : that are not the head of their equivalence class, replace SET_SRC
5444 : with the head of the class. If we do not do this, we will have
5445 : both registers live over a portion of the basic block. This way,
5446 : their lifetimes will likely abut instead of overlapping. */
5447 193216918 : if (!is_fake_set
5448 192579473 : && REG_P (dest)
5449 336298408 : && REGNO_QTY_VALID_P (REGNO (dest)))
5450 : {
5451 7971900 : int dest_q = REG_QTY (REGNO (dest));
5452 7971900 : struct qty_table_elem *dest_ent = &qty_table[dest_q];
5453 :
5454 7971900 : if (dest_ent->mode == GET_MODE (dest)
5455 6141126 : && dest_ent->first_reg != REGNO (dest)
5456 110527 : && REG_P (src) && REGNO (src) == REGNO (dest)
5457 : /* Don't do this if the original insn had a hard reg as
5458 : SET_SRC or SET_DEST. */
5459 5653 : && (!REG_P (sets[i].src)
5460 4180 : || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5461 7977541 : && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5462 : /* We can't call canon_reg here because it won't do anything if
5463 : SRC is a hard register. */
5464 : {
5465 5641 : int src_q = REG_QTY (REGNO (src));
5466 5641 : struct qty_table_elem *src_ent = &qty_table[src_q];
5467 5641 : int first = src_ent->first_reg;
5468 5641 : rtx new_src
5469 : = (first >= FIRST_PSEUDO_REGISTER
5470 5641 : ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5471 :
5472 : /* We must use validate-change even for this, because this
5473 : might be a special no-op instruction, suitable only to
5474 : tag notes onto. */
5475 5641 : if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5476 : {
5477 5641 : src = new_src;
5478 : /* If we had a constant that is cheaper than what we are now
5479 : setting SRC to, use that constant. We ignored it when we
5480 : thought we could make this into a no-op. */
5481 2061 : if (src_const && COST (src_const, mode) < COST (src, mode)
5482 5641 : && validate_change (insn, &SET_SRC (sets[i].rtl),
5483 : src_const, 0))
5484 : src = src_const;
5485 : }
5486 : }
5487 : }
5488 :
5489 : /* If we made a change, recompute SRC values. */
5490 193216918 : if (src != sets[i].src)
5491 : {
5492 3190804 : do_not_record = 0;
5493 3190804 : hash_arg_in_memory = 0;
5494 3190804 : sets[i].src = src;
5495 3190804 : sets[i].src_hash = HASH (src, mode);
5496 3190804 : sets[i].src_volatile = do_not_record;
5497 3190804 : sets[i].src_in_memory = hash_arg_in_memory;
5498 3190804 : sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5499 : }
5500 :
5501 : /* If this is a single SET, we are setting a register, and we have an
5502 : equivalent constant, we want to add a REG_EQUAL note if the constant
5503 : is different from the source. We don't want to do it for a constant
5504 : pseudo since verifying that this pseudo hasn't been eliminated is a
5505 : pain; moreover such a note won't help anything.
5506 :
5507 : Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5508 : which can be created for a reference to a compile time computable
5509 : entry in a jump table. */
5510 193216918 : if (n_sets == 1
5511 190471051 : && REG_P (dest)
5512 141260517 : && src_const
5513 28612927 : && !REG_P (src_const)
5514 28586935 : && !(GET_CODE (src_const) == SUBREG
5515 0 : && REG_P (SUBREG_REG (src_const)))
5516 28586935 : && !(GET_CODE (src_const) == CONST
5517 379108 : && GET_CODE (XEXP (src_const, 0)) == MINUS
5518 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5519 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)
5520 221803853 : && !rtx_equal_p (src, src_const))
5521 : {
5522 : /* Make sure that the rtx is not shared. */
5523 7305189 : src_const = copy_rtx (src_const);
5524 :
5525 : /* Record the actual constant value in a REG_EQUAL note,
5526 : making a new one if one does not already exist. */
5527 7305189 : set_unique_reg_note (insn, REG_EQUAL, src_const);
5528 7305189 : df_notes_rescan (insn);
5529 : }
5530 :
5531 : /* Now deal with the destination. */
5532 193216918 : do_not_record = 0;
5533 :
5534 : /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5535 193216918 : while (GET_CODE (dest) == SUBREG
5536 193238168 : || GET_CODE (dest) == ZERO_EXTRACT
5537 388005054 : || GET_CODE (dest) == STRICT_LOW_PART)
5538 1553763 : dest = XEXP (dest, 0);
5539 :
5540 193216918 : sets[i].inner_dest = dest;
5541 :
5542 193216918 : if (MEM_P (dest))
5543 : {
5544 : #ifdef PUSH_ROUNDING
5545 : /* Stack pushes invalidate the stack pointer. */
5546 28423104 : rtx addr = XEXP (dest, 0);
5547 28423104 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5548 5508814 : && XEXP (addr, 0) == stack_pointer_rtx)
5549 5508814 : invalidate (stack_pointer_rtx, VOIDmode);
5550 : #endif
5551 28423104 : dest = fold_rtx (dest, insn);
5552 : }
5553 :
5554 : /* Compute the hash code of the destination now,
5555 : before the effects of this instruction are recorded,
5556 : since the register values used in the address computation
5557 : are those before this instruction. */
5558 193216918 : sets[i].dest_hash = HASH (dest, mode);
5559 :
5560 : /* Don't enter a bit-field in the hash table
5561 : because the value in it after the store
5562 : may not equal what was stored, due to truncation. */
5563 :
5564 193216918 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5565 : {
5566 3795 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5567 :
5568 3795 : if (src_const != 0 && CONST_INT_P (src_const)
5569 708 : && CONST_INT_P (width)
5570 708 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5571 708 : && ! (INTVAL (src_const)
5572 708 : & (HOST_WIDE_INT_M1U << INTVAL (width))))
5573 : /* Exception: if the value is constant,
5574 : and it won't be truncated, record it. */
5575 : ;
5576 : else
5577 : {
5578 : /* This is chosen so that the destination will be invalidated
5579 : but no new value will be recorded.
5580 : We must invalidate because sometimes constant
5581 : values can be recorded for bitfields. */
5582 3088 : sets[i].src_elt = 0;
5583 3088 : sets[i].src_volatile = 1;
5584 3088 : src_eqv = 0;
5585 3088 : src_eqv_elt = 0;
5586 : }
5587 : }
5588 :
5589 : /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5590 : the insn. */
5591 193213123 : else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5592 : {
5593 : /* One less use of the label this insn used to jump to. */
5594 11254 : cse_cfg_altered |= delete_insn_and_edges (insn);
5595 11254 : cse_jumps_altered = true;
5596 : /* No more processing for this set. */
5597 11254 : sets[i].rtl = 0;
5598 : }
5599 :
5600 : /* Similarly for no-op moves. */
5601 193201869 : else if (noop_insn)
5602 : {
5603 182821 : if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
5604 0 : cse_cfg_altered = true;
5605 182821 : cse_cfg_altered |= delete_insn_and_edges (insn);
5606 : /* No more processing for this set. */
5607 182821 : sets[i].rtl = 0;
5608 : }
5609 :
5610 : /* If this SET is now setting PC to a label, we know it used to
5611 : be a conditional or computed branch. */
5612 20166352 : else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5613 193022990 : && !LABEL_REF_NONLOCAL_P (src))
5614 : {
5615 : /* We reemit the jump in as many cases as possible just in
5616 : case the form of an unconditional jump is significantly
5617 : different than a computed jump or conditional jump.
5618 :
5619 : If this insn has multiple sets, then reemitting the
5620 : jump is nontrivial. So instead we just force rerecognition
5621 : and hope for the best. */
5622 3942 : if (n_sets == 1)
5623 : {
5624 3942 : rtx_jump_insn *new_rtx;
5625 3942 : rtx note;
5626 :
5627 3942 : rtx_insn *seq = targetm.gen_jump (XEXP (src, 0));
5628 3942 : new_rtx = emit_jump_insn_before (seq, insn);
5629 3942 : JUMP_LABEL (new_rtx) = XEXP (src, 0);
5630 3942 : LABEL_NUSES (XEXP (src, 0))++;
5631 :
5632 : /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5633 3942 : note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5634 3942 : if (note)
5635 : {
5636 0 : XEXP (note, 1) = NULL_RTX;
5637 0 : REG_NOTES (new_rtx) = note;
5638 : }
5639 :
5640 3942 : cse_cfg_altered |= delete_insn_and_edges (insn);
5641 3942 : insn = new_rtx;
5642 : }
5643 : else
5644 0 : INSN_CODE (insn) = -1;
5645 :
5646 : /* Do not bother deleting any unreachable code, let jump do it. */
5647 3942 : cse_jumps_altered = true;
5648 3942 : sets[i].rtl = 0;
5649 : }
5650 :
5651 : /* If destination is volatile, invalidate it and then do no further
5652 : processing for this assignment. */
5653 :
5654 193015106 : else if (do_not_record)
5655 : {
5656 54726895 : invalidate_dest (dest);
5657 54726895 : sets[i].rtl = 0;
5658 : }
5659 :
5660 193216918 : if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5661 : {
5662 1614327 : do_not_record = 0;
5663 1614327 : sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5664 1614327 : if (do_not_record)
5665 : {
5666 979 : invalidate_dest (SET_DEST (sets[i].rtl));
5667 979 : sets[i].rtl = 0;
5668 : }
5669 : }
5670 : }
5671 :
5672 : /* Now enter all non-volatile source expressions in the hash table
5673 : if they are not already present.
5674 : Record their equivalence classes in src_elt.
5675 : This way we can insert the corresponding destinations into
5676 : the same classes even if the actual sources are no longer in them
5677 : (having been invalidated). */
5678 :
5679 5225719 : if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5680 395161255 : && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5681 : {
5682 4322582 : struct table_elt *elt;
5683 4322582 : struct table_elt *classp = sets[0].src_elt;
5684 4322582 : rtx dest = SET_DEST (sets[0].rtl);
5685 4322582 : machine_mode eqvmode = GET_MODE (dest);
5686 :
5687 4322582 : if (GET_CODE (dest) == STRICT_LOW_PART)
5688 : {
5689 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5690 0 : classp = 0;
5691 : }
5692 4322582 : if (insert_regs (src_eqv, classp, false))
5693 : {
5694 157245 : rehash_using_reg (src_eqv);
5695 157245 : src_eqv_hash = HASH (src_eqv, eqvmode);
5696 : }
5697 4322582 : elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5698 4322582 : elt->in_memory = src_eqv_in_memory;
5699 4322582 : src_eqv_elt = elt;
5700 :
5701 : /* Check to see if src_eqv_elt is the same as a set source which
5702 : does not yet have an elt, and if so set the elt of the set source
5703 : to src_eqv_elt. */
5704 8645164 : for (i = 0; i < n_sets; i++)
5705 8645164 : if (sets[i].rtl && sets[i].src_elt == 0
5706 8513351 : && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5707 97135 : sets[i].src_elt = src_eqv_elt;
5708 : }
5709 :
5710 584055591 : for (i = 0; i < n_sets; i++)
5711 331507945 : if (sets[i].rtl && ! sets[i].src_volatile
5712 317993429 : && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5713 : {
5714 124771477 : if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5715 : {
5716 : /* REG_EQUAL in setting a STRICT_LOW_PART
5717 : gives an equivalent for the entire destination register,
5718 : not just for the subreg being stored in now.
5719 : This is a more interesting equivalence, so we arrange later
5720 : to treat the entire reg as the destination. */
5721 17455 : sets[i].src_elt = src_eqv_elt;
5722 17455 : sets[i].src_hash = src_eqv_hash;
5723 : }
5724 : else
5725 : {
5726 : /* Insert source and constant equivalent into hash table, if not
5727 : already present. */
5728 124754022 : struct table_elt *classp = src_eqv_elt;
5729 124754022 : rtx src = sets[i].src;
5730 124754022 : rtx dest = SET_DEST (sets[i].rtl);
5731 260700246 : machine_mode mode
5732 124754022 : = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5733 :
5734 : /* It's possible that we have a source value known to be
5735 : constant but don't have a REG_EQUAL note on the insn.
5736 : Lack of a note will mean src_eqv_elt will be NULL. This
5737 : can happen where we've generated a SUBREG to access a
5738 : CONST_INT that is already in a register in a wider mode.
5739 : Ensure that the source expression is put in the proper
5740 : constant class. */
5741 124754022 : if (!classp)
5742 119516543 : classp = sets[i].src_const_elt;
5743 :
5744 124754022 : if (sets[i].src_elt == 0)
5745 : {
5746 103128020 : struct table_elt *elt;
5747 :
5748 : /* Note that these insert_regs calls cannot remove
5749 : any of the src_elt's, because they would have failed to
5750 : match if not still valid. */
5751 103128020 : if (insert_regs (src, classp, false))
5752 : {
5753 17168783 : rehash_using_reg (src);
5754 17168783 : sets[i].src_hash = HASH (src, mode);
5755 : }
5756 103128020 : elt = insert (src, classp, sets[i].src_hash, mode);
5757 103128020 : elt->in_memory = sets[i].src_in_memory;
5758 : /* If inline asm has any clobbers, ensure we only reuse
5759 : existing inline asms and never try to put the ASM_OPERANDS
5760 : into an insn that isn't inline asm. */
5761 103128020 : if (GET_CODE (src) == ASM_OPERANDS
5762 20447 : && GET_CODE (x) == PARALLEL)
5763 20429 : elt->cost = MAX_COST;
5764 103128020 : sets[i].src_elt = classp = elt;
5765 : }
5766 149081660 : if (sets[i].src_const && sets[i].src_const_elt == 0
5767 14528032 : && src != sets[i].src_const
5768 126907824 : && ! rtx_equal_p (sets[i].src_const, src))
5769 2153800 : sets[i].src_elt = insert (sets[i].src_const, classp,
5770 2153800 : sets[i].src_const_hash, mode);
5771 : }
5772 : }
5773 68445441 : else if (sets[i].src_elt == 0)
5774 : /* If we did not insert the source into the hash table (e.g., it was
5775 : volatile), note the equivalence class for the REG_EQUAL value, if any,
5776 : so that the destination goes into that class. */
5777 56336329 : sets[i].src_elt = src_eqv_elt;
5778 :
5779 : /* Record destination addresses in the hash table. This allows us to
5780 : check if they are invalidated by other sets. */
5781 584055591 : for (i = 0; i < n_sets; i++)
5782 : {
5783 193216918 : if (sets[i].rtl)
5784 : {
5785 138291027 : rtx x = sets[i].inner_dest;
5786 138291027 : struct table_elt *elt;
5787 138291027 : machine_mode mode;
5788 138291027 : unsigned hash;
5789 :
5790 138291027 : if (MEM_P (x))
5791 : {
5792 21841070 : x = XEXP (x, 0);
5793 21841070 : mode = GET_MODE (x);
5794 21841070 : hash = HASH (x, mode);
5795 21841070 : elt = lookup (x, hash, mode);
5796 21841070 : if (!elt)
5797 : {
5798 19083449 : if (insert_regs (x, NULL, false))
5799 : {
5800 2174776 : rtx dest = SET_DEST (sets[i].rtl);
5801 :
5802 2174776 : rehash_using_reg (x);
5803 2174776 : hash = HASH (x, mode);
5804 2174776 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5805 : }
5806 19083449 : elt = insert (x, NULL, hash, mode);
5807 : }
5808 :
5809 21841070 : sets[i].dest_addr_elt = elt;
5810 : }
5811 : else
5812 116449957 : sets[i].dest_addr_elt = NULL;
5813 : }
5814 : }
5815 :
5816 390838673 : invalidate_from_clobbers (insn);
5817 :
5818 : /* Some registers are invalidated by subroutine calls. Memory is
5819 : invalidated by non-constant calls. */
5820 :
5821 390838673 : if (CALL_P (insn))
5822 : {
5823 15302813 : if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5824 13162735 : invalidate_memory ();
5825 : else
5826 : /* For const/pure calls, invalidate any argument slots, because
5827 : those are owned by the callee. */
5828 6250214 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
5829 4110136 : if (GET_CODE (XEXP (tem, 0)) == USE
5830 4109998 : && MEM_P (XEXP (XEXP (tem, 0), 0)))
5831 68976 : invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode);
5832 15302813 : invalidate_for_call (insn);
5833 : }
5834 :
5835 : /* Now invalidate everything set by this instruction.
5836 : If a SUBREG or other funny destination is being set,
5837 : sets[i].rtl is still nonzero, so here we invalidate the reg
5838 : a part of which is being set. */
5839 :
5840 584055591 : for (i = 0; i < n_sets; i++)
5841 193216918 : if (sets[i].rtl)
5842 : {
5843 : /* We can't use the inner dest, because the mode associated with
5844 : a ZERO_EXTRACT is significant. */
5845 138291027 : rtx dest = SET_DEST (sets[i].rtl);
5846 :
5847 : /* Needed for registers to remove the register from its
5848 : previous quantity's chain.
5849 : Needed for memory if this is a nonvarying address, unless
5850 : we have just done an invalidate_memory that covers even those. */
5851 138291027 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5852 116429545 : invalidate (dest, VOIDmode);
5853 21861482 : else if (MEM_P (dest))
5854 21841070 : invalidate (dest, VOIDmode);
5855 20412 : else if (GET_CODE (dest) == STRICT_LOW_PART
5856 2957 : || GET_CODE (dest) == ZERO_EXTRACT)
5857 20290 : invalidate (XEXP (dest, 0), GET_MODE (dest));
5858 : }
5859 :
5860 : /* Don't cse over a call to setjmp; on some machines (eg VAX)
5861 : the regs restored by the longjmp come from a later time
5862 : than the setjmp. */
5863 390838673 : if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5864 : {
5865 2146 : flush_hash_table ();
5866 2146 : goto done;
5867 : }
5868 :
5869 : /* Make sure registers mentioned in destinations
5870 : are safe for use in an expression to be inserted.
5871 : This removes from the hash table
5872 : any invalid entry that refers to one of these registers.
5873 :
5874 : We don't care about the return value from mention_regs because
5875 : we are going to hash the SET_DEST values unconditionally. */
5876 :
5877 584053445 : for (i = 0; i < n_sets; i++)
5878 : {
5879 193216918 : if (sets[i].rtl)
5880 : {
5881 138291027 : rtx x = SET_DEST (sets[i].rtl);
5882 :
5883 138291027 : if (!REG_P (x))
5884 23375189 : mention_regs (x);
5885 : else
5886 : {
5887 : /* We used to rely on all references to a register becoming
5888 : inaccessible when a register changes to a new quantity,
5889 : since that changes the hash code. However, that is not
5890 : safe, since after HASH_SIZE new quantities we get a
5891 : hash 'collision' of a register with its own invalid
5892 : entries. And since SUBREGs have been changed not to
5893 : change their hash code with the hash code of the register,
5894 : it wouldn't work any longer at all. So we have to check
5895 : for any invalid references lying around now.
5896 : This code is similar to the REG case in mention_regs,
5897 : but it knows that reg_tick has been incremented, and
5898 : it leaves reg_in_table as -1 . */
5899 114915838 : unsigned int regno = REGNO (x);
5900 114915838 : unsigned int endregno = END_REGNO (x);
5901 114915838 : unsigned int i;
5902 :
5903 229831676 : for (i = regno; i < endregno; i++)
5904 : {
5905 114915838 : if (REG_IN_TABLE (i) >= 0)
5906 : {
5907 12636009 : remove_invalid_refs (i);
5908 12636009 : REG_IN_TABLE (i) = -1;
5909 : }
5910 : }
5911 : }
5912 : }
5913 : }
5914 :
5915 : /* We may have just removed some of the src_elt's from the hash table.
5916 : So replace each one with the current head of the same class.
5917 : Also check if destination addresses have been removed. */
5918 :
5919 584053445 : for (i = 0; i < n_sets; i++)
5920 193216918 : if (sets[i].rtl)
5921 : {
5922 138291027 : if (sets[i].dest_addr_elt
5923 138291027 : && sets[i].dest_addr_elt->first_same_value == 0)
5924 : {
5925 : /* The elt was removed, which means this destination is not
5926 : valid after this instruction. */
5927 0 : sets[i].rtl = NULL_RTX;
5928 : }
5929 138291027 : else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5930 : /* If elt was removed, find current head of same class,
5931 : or 0 if nothing remains of that class. */
5932 : {
5933 10635880 : struct table_elt *elt = sets[i].src_elt;
5934 :
5935 10635880 : while (elt && elt->prev_same_value)
5936 : elt = elt->prev_same_value;
5937 :
5938 21179422 : while (elt && elt->first_same_value == 0)
5939 10584914 : elt = elt->next_same_value;
5940 10594508 : sets[i].src_elt = elt ? elt->first_same_value : 0;
5941 : }
5942 : }
5943 :
5944 : /* Now insert the destinations into their equivalence classes. */
5945 :
5946 584053445 : for (i = 0; i < n_sets; i++)
5947 193216918 : if (sets[i].rtl)
5948 : {
5949 138291027 : rtx dest = SET_DEST (sets[i].rtl);
5950 138291027 : struct table_elt *elt;
5951 :
5952 : /* Don't record value if we are not supposed to risk allocating
5953 : floating-point values in registers that might be wider than
5954 : memory. */
5955 162366218 : if ((flag_float_store
5956 12380 : && MEM_P (dest)
5957 4246 : && FLOAT_MODE_P (GET_MODE (dest)))
5958 : /* Don't record BLKmode values, because we don't know the
5959 : size of it, and can't be sure that other BLKmode values
5960 : have the same or smaller size. */
5961 138288480 : || GET_MODE (dest) == BLKmode
5962 : /* If we didn't put a REG_EQUAL value or a source into the hash
5963 : table, there is no point is recording DEST. */
5964 276579507 : || sets[i].src_elt == 0)
5965 24075191 : continue;
5966 :
5967 : /* STRICT_LOW_PART isn't part of the value BEING set,
5968 : and neither is the SUBREG inside it.
5969 : Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5970 114215836 : if (GET_CODE (dest) == STRICT_LOW_PART)
5971 0 : dest = SUBREG_REG (XEXP (dest, 0));
5972 :
5973 114215836 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5974 : /* Registers must also be inserted into chains for quantities. */
5975 92720982 : if (insert_regs (dest, sets[i].src_elt, true))
5976 : {
5977 : /* If `insert_regs' changes something, the hash code must be
5978 : recalculated. */
5979 92165298 : rehash_using_reg (dest);
5980 92165298 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5981 : }
5982 :
5983 : /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
5984 : outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
5985 114215836 : if (paradoxical_subreg_p (dest))
5986 63287 : continue;
5987 :
5988 342457647 : elt = insert (dest, sets[i].src_elt,
5989 114152549 : sets[i].dest_hash, GET_MODE (dest));
5990 :
5991 : /* If this is a constant, insert the constant anchors with the
5992 : equivalent register-offset expressions using register DEST. */
5993 114152549 : if (targetm.const_anchor
5994 0 : && REG_P (dest)
5995 0 : && SCALAR_INT_MODE_P (GET_MODE (dest))
5996 114152549 : && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
5997 0 : insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
5998 :
5999 114152549 : elt->in_memory = (MEM_P (sets[i].inner_dest)
6000 114152549 : && !MEM_READONLY_P (sets[i].inner_dest));
6001 :
6002 : /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6003 : narrower than M2, and both M1 and M2 are the same number of words,
6004 : we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6005 : make that equivalence as well.
6006 :
6007 : However, BAR may have equivalences for which gen_lowpart
6008 : will produce a simpler value than gen_lowpart applied to
6009 : BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6010 : BAR's equivalences. If we don't get a simplified form, make
6011 : the SUBREG. It will not be used in an equivalence, but will
6012 : cause two similar assignments to be detected.
6013 :
6014 : Note the loop below will find SUBREG_REG (DEST) since we have
6015 : already entered SRC and DEST of the SET in the table. */
6016 :
6017 114152549 : if (GET_CODE (dest) == SUBREG
6018 : && (known_equal_after_align_down
6019 194674097 : (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1,
6020 2847096 : GET_MODE_SIZE (GET_MODE (dest)) - 1,
6021 1423548 : UNITS_PER_WORD))
6022 84501 : && !partial_subreg_p (dest)
6023 114186180 : && sets[i].src_elt != 0)
6024 : {
6025 33631 : machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6026 33631 : struct table_elt *elt, *classp = 0;
6027 :
6028 152640 : for (elt = sets[i].src_elt->first_same_value; elt;
6029 119009 : elt = elt->next_same_value)
6030 : {
6031 119009 : rtx new_src = 0;
6032 119009 : unsigned src_hash;
6033 119009 : struct table_elt *src_elt;
6034 :
6035 : /* Ignore invalid entries. */
6036 119009 : if (!REG_P (elt->exp)
6037 119009 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6038 0 : continue;
6039 :
6040 : /* We may have already been playing subreg games. If the
6041 : mode is already correct for the destination, use it. */
6042 119009 : if (GET_MODE (elt->exp) == new_mode)
6043 : new_src = elt->exp;
6044 : else
6045 : {
6046 119009 : poly_uint64 byte
6047 119009 : = subreg_lowpart_offset (new_mode, GET_MODE (dest));
6048 119009 : new_src = simplify_gen_subreg (new_mode, elt->exp,
6049 119009 : GET_MODE (dest), byte);
6050 : }
6051 :
6052 : /* The call to simplify_gen_subreg fails if the value
6053 : is VOIDmode, yet we can't do any simplification, e.g.
6054 : for EXPR_LISTs denoting function call results.
6055 : It is invalid to construct a SUBREG with a VOIDmode
6056 : SUBREG_REG, hence a zero new_src means we can't do
6057 : this substitution. */
6058 119009 : if (! new_src)
6059 6 : continue;
6060 :
6061 119003 : src_hash = HASH (new_src, new_mode);
6062 119003 : src_elt = lookup (new_src, src_hash, new_mode);
6063 :
6064 : /* Put the new source in the hash table is if isn't
6065 : already. */
6066 119003 : if (src_elt == 0)
6067 : {
6068 39826 : if (insert_regs (new_src, classp, false))
6069 : {
6070 0 : rehash_using_reg (new_src);
6071 0 : src_hash = HASH (new_src, new_mode);
6072 : }
6073 39826 : src_elt = insert (new_src, classp, src_hash, new_mode);
6074 39826 : src_elt->in_memory = elt->in_memory;
6075 39826 : if (GET_CODE (new_src) == ASM_OPERANDS
6076 0 : && elt->cost == MAX_COST)
6077 0 : src_elt->cost = MAX_COST;
6078 : }
6079 79177 : else if (classp && classp != src_elt->first_same_value)
6080 : /* Show that two things that we've seen before are
6081 : actually the same. */
6082 65 : merge_equiv_classes (src_elt, classp);
6083 :
6084 119003 : classp = src_elt->first_same_value;
6085 : /* Ignore invalid entries. */
6086 119003 : while (classp
6087 119003 : && !REG_P (classp->exp)
6088 201494 : && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6089 0 : classp = classp->next_same_value;
6090 : }
6091 : }
6092 : }
6093 :
6094 : /* Special handling for (set REG0 REG1) where REG0 is the
6095 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
6096 : be used in the sequel, so (if easily done) change this insn to
6097 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6098 : that computed their value. Then REG1 will become a dead store
6099 : and won't cloud the situation for later optimizations.
6100 :
6101 : Do not make this change if REG1 is a hard register, because it will
6102 : then be used in the sequel and we may be changing a two-operand insn
6103 : into a three-operand insn.
6104 :
6105 : Also do not do this if we are operating on a copy of INSN. */
6106 :
6107 581307578 : if (n_sets == 1 && sets[0].rtl)
6108 135756566 : try_back_substitute_reg (sets[0].rtl, insn);
6109 :
6110 390838673 : done:;
6111 390838673 : }
6112 :
6113 : /* Remove from the hash table all expressions that reference memory. */
6114 :
6115 : static void
6116 13162735 : invalidate_memory (void)
6117 : {
6118 13162735 : int i;
6119 13162735 : struct table_elt *p, *next;
6120 :
6121 434370255 : for (i = 0; i < HASH_SIZE; i++)
6122 606249810 : for (p = table[i]; p; p = next)
6123 : {
6124 185042290 : next = p->next_same_hash;
6125 185042290 : if (p->in_memory)
6126 19295440 : remove_from_table (p, i);
6127 : }
6128 13162735 : }
6129 :
6130 : /* Perform invalidation on the basis of everything about INSN,
6131 : except for invalidating the actual places that are SET in it.
6132 : This includes the places CLOBBERed, and anything that might
6133 : alias with something that is SET or CLOBBERed. */
6134 :
6135 : static void
6136 390838673 : invalidate_from_clobbers (rtx_insn *insn)
6137 : {
6138 390838673 : rtx x = PATTERN (insn);
6139 :
6140 390838673 : if (GET_CODE (x) == CLOBBER)
6141 : {
6142 62086 : rtx ref = XEXP (x, 0);
6143 62086 : if (ref)
6144 : {
6145 62086 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6146 12970 : || MEM_P (ref))
6147 62086 : invalidate (ref, VOIDmode);
6148 0 : else if (GET_CODE (ref) == STRICT_LOW_PART
6149 0 : || GET_CODE (ref) == ZERO_EXTRACT)
6150 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6151 : }
6152 : }
6153 390776587 : else if (GET_CODE (x) == PARALLEL)
6154 : {
6155 30095981 : int i;
6156 91465580 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6157 : {
6158 61369599 : rtx y = XVECEXP (x, 0, i);
6159 61369599 : if (GET_CODE (y) == CLOBBER)
6160 : {
6161 29711650 : rtx ref = XEXP (y, 0);
6162 29711650 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6163 255304 : || MEM_P (ref))
6164 29518640 : invalidate (ref, VOIDmode);
6165 193010 : else if (GET_CODE (ref) == STRICT_LOW_PART
6166 193010 : || GET_CODE (ref) == ZERO_EXTRACT)
6167 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6168 : }
6169 : }
6170 : }
6171 390838673 : }
6172 :
6173 : /* Perform invalidation on the basis of everything about INSN.
6174 : This includes the places CLOBBERed, and anything that might
6175 : alias with something that is SET or CLOBBERed. */
6176 :
6177 : static void
6178 390838673 : invalidate_from_sets_and_clobbers (rtx_insn *insn)
6179 : {
6180 390838673 : rtx tem;
6181 390838673 : rtx x = PATTERN (insn);
6182 :
6183 390838673 : if (CALL_P (insn))
6184 : {
6185 45997494 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6186 : {
6187 30694681 : rtx temx = XEXP (tem, 0);
6188 30694681 : if (GET_CODE (temx) == CLOBBER)
6189 865348 : invalidate (SET_DEST (temx), VOIDmode);
6190 : }
6191 : }
6192 :
6193 : /* Ensure we invalidate the destination register of a CALL insn.
6194 : This is necessary for machines where this register is a fixed_reg,
6195 : because no other code would invalidate it. */
6196 390838673 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
6197 7080586 : invalidate (SET_DEST (x), VOIDmode);
6198 :
6199 383758087 : else if (GET_CODE (x) == PARALLEL)
6200 : {
6201 30802417 : int i;
6202 :
6203 93589875 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6204 : {
6205 62787458 : rtx y = XVECEXP (x, 0, i);
6206 62787458 : if (GET_CODE (y) == CLOBBER)
6207 : {
6208 30423073 : rtx clobbered = XEXP (y, 0);
6209 :
6210 30423073 : if (REG_P (clobbered)
6211 260287 : || GET_CODE (clobbered) == SUBREG)
6212 30162786 : invalidate (clobbered, VOIDmode);
6213 260287 : else if (GET_CODE (clobbered) == STRICT_LOW_PART
6214 260287 : || GET_CODE (clobbered) == ZERO_EXTRACT)
6215 0 : invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6216 : }
6217 32364385 : else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
6218 10192 : invalidate (SET_DEST (y), VOIDmode);
6219 : }
6220 : }
6221 :
6222 : /* Any single register constraint may introduce a conflict, if the associated
6223 : hard register is live. For example:
6224 :
6225 : r100=%1
6226 : r101=42
6227 : r102=exp(r101)
6228 :
6229 : If the first operand r101 of exp is constrained to hard register %1, then
6230 : r100 cannot be trivially substituted by %1 in the following since %1 got
6231 : clobbered. Such conflicts may stem from single register classes as well
6232 : as hard register constraints. Since prior RA we do not know which
6233 : alternative will be chosen, be conservative and consider any such hard
6234 : register from any alternative as a potential clobber. */
6235 390838673 : extract_insn (insn);
6236 849853823 : for (int nop = recog_data.n_operands - 1; nop >= 0; --nop)
6237 : {
6238 459015150 : int c;
6239 459015150 : const char *p = recog_data.constraints[nop];
6240 15104634464 : for (; (c = *p); p += CONSTRAINT_LEN (c, p))
6241 14645619314 : if (c == ',')
6242 : ;
6243 9604398110 : else if (c == '{')
6244 : {
6245 190 : int regno = decode_hard_reg_constraint (p);
6246 190 : machine_mode mode = recog_data.operand_mode[nop];
6247 190 : invalidate_reg (gen_rtx_REG (mode, regno));
6248 : }
6249 : }
6250 390838673 : }
6251 :
6252 : static rtx cse_process_note (rtx);
6253 :
6254 : /* A simplify_replace_fn_rtx callback for cse_process_note. Process X,
6255 : part of the REG_NOTES of an insn. Replace any registers with either
6256 : an equivalent constant or the canonical form of the register.
6257 : Only replace addresses if the containing MEM remains valid.
6258 :
6259 : Return the replacement for X, or null if it should be simplified
6260 : recursively. */
6261 :
6262 : static rtx
6263 28060351 : cse_process_note_1 (rtx x, const_rtx, void *)
6264 : {
6265 28060351 : if (MEM_P (x))
6266 : {
6267 2011276 : validate_change (x, &XEXP (x, 0), cse_process_note (XEXP (x, 0)), false);
6268 1005638 : return x;
6269 : }
6270 :
6271 27054713 : if (REG_P (x))
6272 : {
6273 5923888 : int i = REG_QTY (REGNO (x));
6274 :
6275 : /* Return a constant or a constant register. */
6276 5923888 : if (REGNO_QTY_VALID_P (REGNO (x)))
6277 : {
6278 1586639 : struct qty_table_elem *ent = &qty_table[i];
6279 :
6280 1586639 : if (ent->const_rtx != NULL_RTX
6281 24304 : && (CONSTANT_P (ent->const_rtx)
6282 19237 : || REG_P (ent->const_rtx)))
6283 : {
6284 5067 : rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6285 5067 : if (new_rtx)
6286 5067 : return copy_rtx (new_rtx);
6287 : }
6288 : }
6289 :
6290 : /* Otherwise, canonicalize this register. */
6291 5918821 : return canon_reg (x, NULL);
6292 : }
6293 :
6294 : return NULL_RTX;
6295 : }
6296 :
6297 : /* Process X, part of the REG_NOTES of an insn. Replace any registers in it
6298 : with either an equivalent constant or the canonical form of the register.
6299 : Only replace addresses if the containing MEM remains valid. */
6300 :
6301 : static rtx
6302 9607302 : cse_process_note (rtx x)
6303 : {
6304 1005638 : return simplify_replace_fn_rtx (x, NULL_RTX, cse_process_note_1, NULL);
6305 : }
6306 :
6307 :
6308 : /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6309 :
6310 : DATA is a pointer to a struct cse_basic_block_data, that is used to
6311 : describe the path.
6312 : It is filled with a queue of basic blocks, starting with FIRST_BB
6313 : and following a trace through the CFG.
6314 :
6315 : If all paths starting at FIRST_BB have been followed, or no new path
6316 : starting at FIRST_BB can be constructed, this function returns FALSE.
6317 : Otherwise, DATA->path is filled and the function returns TRUE indicating
6318 : that a path to follow was found.
6319 :
6320 : If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6321 : block in the path will be FIRST_BB. */
6322 :
6323 : static bool
6324 39527810 : cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6325 : bool follow_jumps)
6326 : {
6327 39527810 : basic_block bb;
6328 39527810 : edge e;
6329 39527810 : int path_size;
6330 :
6331 39527810 : bitmap_set_bit (cse_visited_basic_blocks, first_bb->index);
6332 :
6333 : /* See if there is a previous path. */
6334 39527810 : path_size = data->path_size;
6335 :
6336 : /* There is a previous path. Make sure it started with FIRST_BB. */
6337 39527810 : if (path_size)
6338 21255816 : gcc_assert (data->path[0].bb == first_bb);
6339 :
6340 : /* There was only one basic block in the last path. Clear the path and
6341 : return, so that paths starting at another basic block can be tried. */
6342 21255816 : if (path_size == 1)
6343 : {
6344 14253418 : path_size = 0;
6345 14253418 : goto done;
6346 : }
6347 :
6348 : /* If the path was empty from the beginning, construct a new path. */
6349 25274392 : if (path_size == 0)
6350 18271994 : data->path[path_size++].bb = first_bb;
6351 : else
6352 : {
6353 : /* Otherwise, path_size must be equal to or greater than 2, because
6354 : a previous path exists that is at least two basic blocks long.
6355 :
6356 : Update the previous branch path, if any. If the last branch was
6357 : previously along the branch edge, take the fallthrough edge now. */
6358 15485791 : while (path_size >= 2)
6359 : {
6360 11467215 : basic_block last_bb_in_path, previous_bb_in_path;
6361 11467215 : edge e;
6362 :
6363 11467215 : --path_size;
6364 11467215 : last_bb_in_path = data->path[path_size].bb;
6365 11467215 : previous_bb_in_path = data->path[path_size - 1].bb;
6366 :
6367 : /* If we previously followed a path along the branch edge, try
6368 : the fallthru edge now. */
6369 19950608 : if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6370 11156408 : && any_condjump_p (BB_END (previous_bb_in_path))
6371 11156408 : && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6372 22623623 : && e == BRANCH_EDGE (previous_bb_in_path))
6373 : {
6374 3970941 : bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6375 3970941 : if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun)
6376 3970941 : && single_pred_p (bb)
6377 : /* We used to assert here that we would only see blocks
6378 : that we have not visited yet. But we may end up
6379 : visiting basic blocks twice if the CFG has changed
6380 : in this run of cse_main, because when the CFG changes
6381 : the topological sort of the CFG also changes. A basic
6382 : blocks that previously had more than two predecessors
6383 : may now have a single predecessor, and become part of
6384 : a path that starts at another basic block.
6385 :
6386 : We still want to visit each basic block only once, so
6387 : halt the path here if we have already visited BB. */
6388 6954763 : && !bitmap_bit_p (cse_visited_basic_blocks, bb->index))
6389 : {
6390 2983822 : bitmap_set_bit (cse_visited_basic_blocks, bb->index);
6391 2983822 : data->path[path_size++].bb = bb;
6392 2983822 : break;
6393 : }
6394 : }
6395 :
6396 8483393 : data->path[path_size].bb = NULL;
6397 : }
6398 :
6399 : /* If only one block remains in the path, bail. */
6400 7002398 : if (path_size == 1)
6401 : {
6402 4018576 : path_size = 0;
6403 4018576 : goto done;
6404 : }
6405 : }
6406 :
6407 : /* Extend the path if possible. */
6408 21255816 : if (follow_jumps)
6409 : {
6410 12111600 : bb = data->path[path_size - 1].bb;
6411 20598455 : while (bb && path_size < param_max_cse_path_length)
6412 : {
6413 20436558 : if (single_succ_p (bb))
6414 8954526 : e = single_succ_edge (bb);
6415 11482032 : else if (EDGE_COUNT (bb->succs) == 2
6416 11470964 : && any_condjump_p (BB_END (bb)))
6417 : {
6418 : /* First try to follow the branch. If that doesn't lead
6419 : to a useful path, follow the fallthru edge. */
6420 9128325 : e = BRANCH_EDGE (bb);
6421 9128325 : if (!single_pred_p (e->dest))
6422 5152510 : e = FALLTHRU_EDGE (bb);
6423 : }
6424 : else
6425 : e = NULL;
6426 :
6427 18082851 : if (e
6428 18082851 : && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6429 18081806 : && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
6430 15927352 : && single_pred_p (e->dest)
6431 : /* Avoid visiting basic blocks twice. The large comment
6432 : above explains why this can happen. */
6433 26569715 : && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index))
6434 : {
6435 8486855 : basic_block bb2 = e->dest;
6436 8486855 : bitmap_set_bit (cse_visited_basic_blocks, bb2->index);
6437 8486855 : data->path[path_size++].bb = bb2;
6438 8486855 : bb = bb2;
6439 : }
6440 : else
6441 : bb = NULL;
6442 : }
6443 : }
6444 :
6445 9144216 : done:
6446 39527810 : data->path_size = path_size;
6447 39527810 : return path_size != 0;
6448 : }
6449 :
6450 : /* Dump the path in DATA to file F. NSETS is the number of sets
6451 : in the path. */
6452 :
6453 : static void
6454 317 : cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6455 : {
6456 317 : int path_entry;
6457 :
6458 317 : fprintf (f, ";; Following path with %d sets: ", nsets);
6459 1119 : for (path_entry = 0; path_entry < data->path_size; path_entry++)
6460 485 : fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6461 317 : fputc ('\n', f);
6462 317 : fflush (f);
6463 317 : }
6464 :
6465 :
6466 : /* Return true if BB has exception handling successor edges. */
6467 :
6468 : static bool
6469 9079162 : have_eh_succ_edges (basic_block bb)
6470 : {
6471 9079162 : edge e;
6472 9079162 : edge_iterator ei;
6473 :
6474 21380929 : FOR_EACH_EDGE (e, ei, bb->succs)
6475 13301108 : if (e->flags & EDGE_EH)
6476 : return true;
6477 :
6478 : return false;
6479 : }
6480 :
6481 :
6482 : /* Scan to the end of the path described by DATA. Return an estimate of
6483 : the total number of SETs of all insns in the path. */
6484 :
6485 : static void
6486 21255816 : cse_prescan_path (struct cse_basic_block_data *data)
6487 : {
6488 21255816 : int nsets = 0;
6489 21255816 : int path_size = data->path_size;
6490 21255816 : int path_entry;
6491 :
6492 : /* Scan to end of each basic block in the path. */
6493 57583985 : for (path_entry = 0; path_entry < path_size; path_entry++)
6494 : {
6495 36328169 : basic_block bb;
6496 36328169 : rtx_insn *insn;
6497 :
6498 36328169 : bb = data->path[path_entry].bb;
6499 :
6500 485237702 : FOR_BB_INSNS (bb, insn)
6501 : {
6502 448909533 : if (!INSN_P (insn))
6503 58056312 : continue;
6504 :
6505 : /* A PARALLEL can have lots of SETs in it,
6506 : especially if it is really an ASM_OPERANDS. */
6507 390853221 : if (GET_CODE (PATTERN (insn)) == PARALLEL)
6508 30807006 : nsets += XVECLEN (PATTERN (insn), 0);
6509 : else
6510 360046215 : nsets += 1;
6511 : }
6512 : }
6513 :
6514 21255816 : data->nsets = nsets;
6515 21255816 : }
6516 :
6517 : /* Return true if the pattern of INSN uses a LABEL_REF for which
6518 : there isn't a REG_LABEL_OPERAND note. */
6519 :
6520 : static bool
6521 390667980 : check_for_label_ref (rtx_insn *insn)
6522 : {
6523 : /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6524 : note for it, we must rerun jump since it needs to place the note. If
6525 : this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6526 : don't do this since no REG_LABEL_OPERAND will be added. */
6527 390667980 : subrtx_iterator::array_type array;
6528 1957186231 : FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
6529 : {
6530 1566519572 : const_rtx x = *iter;
6531 1566519572 : if (GET_CODE (x) == LABEL_REF
6532 20204735 : && !LABEL_REF_NONLOCAL_P (x)
6533 20203908 : && (!JUMP_P (insn)
6534 20160523 : || !label_is_jump_target_p (label_ref_label (x), insn))
6535 43386 : && LABEL_P (label_ref_label (x))
6536 43029 : && INSN_UID (label_ref_label (x)) != 0
6537 1566562601 : && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x)))
6538 1321 : return true;
6539 : }
6540 390666659 : return false;
6541 390667980 : }
6542 :
6543 : /* Process a single extended basic block described by EBB_DATA. */
6544 :
6545 : static void
6546 20728154 : cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6547 : {
6548 20728154 : int path_size = ebb_data->path_size;
6549 20728154 : int path_entry;
6550 20728154 : int num_insns = 0;
6551 :
6552 : /* Allocate the space needed by qty_table. */
6553 20728154 : qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6554 :
6555 20728154 : new_basic_block ();
6556 20728154 : cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6557 20728154 : cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6558 56525074 : for (path_entry = 0; path_entry < path_size; path_entry++)
6559 : {
6560 35796920 : basic_block bb;
6561 35796920 : rtx_insn *insn;
6562 :
6563 35796920 : bb = ebb_data->path[path_entry].bb;
6564 :
6565 : /* Invalidate recorded information for eh regs if there is an EH
6566 : edge pointing to that bb. */
6567 35796920 : if (bb_has_eh_pred (bb))
6568 : {
6569 502594 : df_ref def;
6570 :
6571 2010376 : FOR_EACH_ARTIFICIAL_DEF (def, bb->index)
6572 1005188 : if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6573 1005188 : invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6574 : }
6575 :
6576 35796920 : optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6577 483761720 : FOR_BB_INSNS (bb, insn)
6578 : {
6579 : /* If we have processed 1,000 insns, flush the hash table to
6580 : avoid extreme quadratic behavior. We must not include NOTEs
6581 : in the count since there may be more of them when generating
6582 : debugging information. If we clear the table at different
6583 : times, code generated with -g -O might be different than code
6584 : generated with -O but not -g.
6585 :
6586 : FIXME: This is a real kludge and needs to be done some other
6587 : way. */
6588 447964800 : if (NONDEBUG_INSN_P (insn)
6589 447964800 : && num_insns++ > param_max_cse_insns)
6590 : {
6591 5798 : flush_hash_table ();
6592 5798 : num_insns = 0;
6593 : }
6594 :
6595 447964800 : if (INSN_P (insn))
6596 : {
6597 : /* Process notes first so we have all notes in canonical forms
6598 : when looking for duplicate operations. */
6599 390838673 : bool changed = false;
6600 623013859 : for (rtx note = REG_NOTES (insn); note; note = XEXP (note, 1))
6601 232175186 : if (REG_NOTE_KIND (note) == REG_EQUAL)
6602 : {
6603 8601664 : rtx newval = cse_process_note (XEXP (note, 0));
6604 8601664 : if (newval != XEXP (note, 0))
6605 : {
6606 37315 : XEXP (note, 0) = newval;
6607 37315 : changed = true;
6608 : }
6609 : }
6610 390838673 : if (changed)
6611 37315 : df_notes_rescan (insn);
6612 :
6613 390838673 : cse_insn (insn);
6614 :
6615 : /* If we haven't already found an insn where we added a LABEL_REF,
6616 : check this one. */
6617 390838673 : if (INSN_P (insn) && !recorded_label_ref
6618 781506653 : && check_for_label_ref (insn))
6619 1321 : recorded_label_ref = true;
6620 : }
6621 : }
6622 :
6623 : /* With non-call exceptions, we are not always able to update
6624 : the CFG properly inside cse_insn. So clean up possibly
6625 : redundant EH edges here. */
6626 35796920 : if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6627 999341 : cse_cfg_altered |= purge_dead_edges (bb);
6628 :
6629 : /* If we changed a conditional jump, we may have terminated
6630 : the path we are following. Check that by verifying that
6631 : the edge we would take still exists. If the edge does
6632 : not exist anymore, purge the remainder of the path.
6633 : Note that this will cause us to return to the caller. */
6634 35796920 : if (path_entry < path_size - 1)
6635 : {
6636 15071785 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6637 15071785 : if (!find_edge (bb, next_bb))
6638 : {
6639 3462 : do
6640 : {
6641 3462 : path_size--;
6642 :
6643 : /* If we truncate the path, we must also reset the
6644 : visited bit on the remaining blocks in the path,
6645 : or we will never visit them at all. */
6646 3462 : bitmap_clear_bit (cse_visited_basic_blocks,
6647 3462 : ebb_data->path[path_size].bb->index);
6648 3462 : ebb_data->path[path_size].bb = NULL;
6649 : }
6650 3462 : while (path_size - 1 != path_entry);
6651 3019 : ebb_data->path_size = path_size;
6652 : }
6653 : }
6654 :
6655 : /* If this is a conditional jump insn, record any known
6656 : equivalences due to the condition being tested. */
6657 35796920 : insn = BB_END (bb);
6658 35796920 : if (path_entry < path_size - 1
6659 50542600 : && EDGE_COUNT (bb->succs) == 2
6660 14745680 : && JUMP_P (insn)
6661 14745680 : && single_set (insn)
6662 14745680 : && any_condjump_p (insn)
6663 : /* single_set may return non-NULL even for multiple sets
6664 : if there are REG_UNUSED notes. record_jump_equiv only
6665 : looks at pc_set and doesn't consider other sets that
6666 : could affect the value, and the recorded equivalence
6667 : can extend the lifetime of the compared REG, so use
6668 : also !multiple_sets check to verify it is exactly one
6669 : set. */
6670 50542600 : && !multiple_sets (insn))
6671 : {
6672 14745680 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6673 14745680 : bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6674 14745680 : record_jump_equiv (insn, taken);
6675 : }
6676 : }
6677 :
6678 20728154 : gcc_assert (next_qty <= max_qty);
6679 :
6680 20728154 : free (qty_table);
6681 20728154 : }
6682 :
6683 :
6684 : /* Perform cse on the instructions of a function.
6685 : F is the first instruction.
6686 : NREGS is one plus the highest pseudo-reg number used in the instruction.
6687 :
6688 : Return 2 if jump optimizations should be redone due to simplifications
6689 : in conditional jump instructions.
6690 : Return 1 if the CFG should be cleaned up because it has been modified.
6691 : Return 0 otherwise. */
6692 :
6693 : static int
6694 2299323 : cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
6695 : {
6696 2299323 : struct cse_basic_block_data ebb_data;
6697 2299323 : basic_block bb;
6698 2299323 : int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
6699 2299323 : int i, n_blocks;
6700 :
6701 : /* CSE doesn't use dominane info but can invalidate it in different ways.
6702 : For simplicity free dominance info here. */
6703 2299323 : free_dominance_info (CDI_DOMINATORS);
6704 :
6705 2299323 : df_set_flags (DF_LR_RUN_DCE);
6706 2299323 : df_note_add_problem ();
6707 2299323 : df_analyze ();
6708 2299323 : df_set_flags (DF_DEFER_INSN_RESCAN);
6709 :
6710 2299323 : reg_scan (get_insns (), max_reg_num ());
6711 2299323 : init_cse_reg_info (nregs);
6712 :
6713 2299323 : ebb_data.path = XNEWVEC (struct branch_path,
6714 : param_max_cse_path_length);
6715 :
6716 2299323 : cse_cfg_altered = false;
6717 2299323 : cse_jumps_altered = false;
6718 2299323 : recorded_label_ref = false;
6719 2299323 : ebb_data.path_size = 0;
6720 2299323 : ebb_data.nsets = 0;
6721 2299323 : rtl_hooks = cse_rtl_hooks;
6722 :
6723 2299323 : init_recog ();
6724 2299323 : init_alias_analysis ();
6725 :
6726 2299323 : reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6727 :
6728 : /* Set up the table of already visited basic blocks. */
6729 2299323 : cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
6730 2299323 : bitmap_clear (cse_visited_basic_blocks);
6731 :
6732 : /* Loop over basic blocks in reverse completion order (RPO),
6733 : excluding the ENTRY and EXIT blocks. */
6734 2299323 : n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6735 2299323 : i = 0;
6736 22870640 : while (i < n_blocks)
6737 : {
6738 : /* Find the first block in the RPO queue that we have not yet
6739 : processed before. */
6740 29331561 : do
6741 : {
6742 29331561 : bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]);
6743 : }
6744 29331561 : while (bitmap_bit_p (cse_visited_basic_blocks, bb->index)
6745 47603555 : && i < n_blocks);
6746 :
6747 : /* Find all paths starting with BB, and process them. */
6748 39527810 : while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6749 : {
6750 : /* Pre-scan the path. */
6751 21255816 : cse_prescan_path (&ebb_data);
6752 :
6753 : /* If this basic block has no sets, skip it. */
6754 21255816 : if (ebb_data.nsets == 0)
6755 527662 : continue;
6756 :
6757 : /* Get a reasonable estimate for the maximum number of qty's
6758 : needed for this path. For this, we take the number of sets
6759 : and multiply that by MAX_RECOG_OPERANDS. */
6760 20728154 : max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6761 :
6762 : /* Dump the path we're about to process. */
6763 20728154 : if (dump_file)
6764 317 : cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6765 :
6766 20728154 : cse_extended_basic_block (&ebb_data);
6767 : }
6768 : }
6769 :
6770 : /* Clean up. */
6771 2299323 : end_alias_analysis ();
6772 2299323 : free (reg_eqv_table);
6773 2299323 : free (ebb_data.path);
6774 2299323 : sbitmap_free (cse_visited_basic_blocks);
6775 2299323 : free (rc_order);
6776 2299323 : rtl_hooks = general_rtl_hooks;
6777 :
6778 2299323 : if (cse_jumps_altered || recorded_label_ref)
6779 : return 2;
6780 2291846 : else if (cse_cfg_altered)
6781 : return 1;
6782 : else
6783 2282173 : return 0;
6784 : }
6785 :
6786 : /* Count the number of times registers are used (not set) in X.
6787 : COUNTS is an array in which we accumulate the count, INCR is how much
6788 : we count each register usage.
6789 :
6790 : Don't count a usage of DEST, which is the SET_DEST of a SET which
6791 : contains X in its SET_SRC. This is because such a SET does not
6792 : modify the liveness of DEST.
6793 : DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6794 : We must then count uses of a SET_DEST regardless, because the insn can't be
6795 : deleted here.
6796 : Also count uses of a SET_DEST if it has been used by an earlier insn,
6797 : but in that case only when incrementing and not when decrementing, effectively
6798 : making setters of such a pseudo non-eliminable. This is for cases like
6799 : (set (reg x) (expr))
6800 : ...
6801 : (set (reg y) (expr (reg (x))))
6802 : ...
6803 : (set (reg x) (expr (reg (x))))
6804 : where we can't eliminate the last insn because x is is still used, if y
6805 : is unused we can eliminate the middle insn and when considering the first insn
6806 : we used to eliminate it despite it being used in the last insn. */
6807 :
6808 : static void
6809 2433634425 : count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6810 : {
6811 2911173704 : enum rtx_code code;
6812 2911173704 : rtx note;
6813 2911173704 : const char *fmt;
6814 2911173704 : int i, j;
6815 :
6816 2911173704 : if (x == 0)
6817 : return;
6818 :
6819 2881788559 : switch (code = GET_CODE (x))
6820 : {
6821 547777303 : case REG:
6822 547777303 : if (x != dest || (incr > 0 && counts[REGNO (x)]))
6823 544028573 : counts[REGNO (x)] += incr;
6824 : return;
6825 :
6826 : case PC:
6827 : case CONST:
6828 : CASE_CONST_ANY:
6829 : case SYMBOL_REF:
6830 : case LABEL_REF:
6831 : return;
6832 :
6833 168770251 : case CLOBBER:
6834 : /* If we are clobbering a MEM, mark any registers inside the address
6835 : as being used. */
6836 168770251 : if (MEM_P (XEXP (x, 0)))
6837 215916 : count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6838 : return;
6839 :
6840 393842598 : case SET:
6841 : /* Unless we are setting a REG, count everything in SET_DEST. */
6842 393842598 : if (!REG_P (SET_DEST (x)))
6843 96260383 : count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6844 393842598 : count_reg_usage (SET_SRC (x), counts,
6845 : dest ? dest : SET_DEST (x),
6846 : incr);
6847 393842598 : return;
6848 :
6849 : case DEBUG_INSN:
6850 : return;
6851 :
6852 414329767 : case CALL_INSN:
6853 414329767 : case INSN:
6854 414329767 : case JUMP_INSN:
6855 : /* We expect dest to be NULL_RTX here. If the insn may throw,
6856 : or if it cannot be deleted due to side-effects, mark this fact
6857 : by setting DEST to pc_rtx. */
6858 159025587 : if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x))
6859 555218738 : || side_effects_p (PATTERN (x)))
6860 54327317 : dest = pc_rtx;
6861 414329767 : if (code == CALL_INSN)
6862 29385145 : count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6863 414329767 : count_reg_usage (PATTERN (x), counts, dest, incr);
6864 :
6865 : /* Things used in a REG_EQUAL note aren't dead since loop may try to
6866 : use them. */
6867 :
6868 414329767 : note = find_reg_equal_equiv_note (x);
6869 414329767 : if (note)
6870 : {
6871 21653980 : rtx eqv = XEXP (note, 0);
6872 :
6873 21653980 : if (GET_CODE (eqv) == EXPR_LIST)
6874 : /* This REG_EQUAL note describes the result of a function call.
6875 : Process all the arguments. */
6876 0 : do
6877 : {
6878 0 : count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6879 0 : eqv = XEXP (eqv, 1);
6880 : }
6881 0 : while (eqv && GET_CODE (eqv) == EXPR_LIST);
6882 : else
6883 : count_reg_usage (eqv, counts, dest, incr);
6884 : }
6885 : return;
6886 :
6887 61826785 : case EXPR_LIST:
6888 61826785 : if (REG_NOTE_KIND (x) == REG_EQUAL
6889 61826785 : || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6890 : /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6891 : involving registers in the address. */
6892 3545390 : || GET_CODE (XEXP (x, 0)) == CLOBBER)
6893 61165465 : count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6894 :
6895 61826785 : count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6896 61826785 : return;
6897 :
6898 702611 : case ASM_OPERANDS:
6899 : /* Iterate over just the inputs, not the constraints as well. */
6900 1341782 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6901 639171 : count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6902 : return;
6903 :
6904 0 : case INSN_LIST:
6905 0 : case INT_LIST:
6906 0 : gcc_unreachable ();
6907 :
6908 723524270 : default:
6909 723524270 : break;
6910 : }
6911 :
6912 723524270 : fmt = GET_RTX_FORMAT (code);
6913 2007220276 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6914 : {
6915 1283696006 : if (fmt[i] == 'e')
6916 978997491 : count_reg_usage (XEXP (x, i), counts, dest, incr);
6917 304698515 : else if (fmt[i] == 'E')
6918 206023212 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6919 137883309 : count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6920 : }
6921 : }
6922 :
6923 : /* Return true if X is a dead register. */
6924 :
6925 : static inline bool
6926 787051674 : is_dead_reg (const_rtx x, int *counts)
6927 : {
6928 787051674 : return (REG_P (x)
6929 347287335 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
6930 217405892 : && counts[REGNO (x)] == 0);
6931 : }
6932 :
6933 : /* Return true if set is live. */
6934 : static bool
6935 372057114 : set_live_p (rtx set, int *counts)
6936 : {
6937 372057114 : if (set_noop_p (set))
6938 : return false;
6939 :
6940 372036104 : if (!is_dead_reg (SET_DEST (set), counts)
6941 8393554 : || side_effects_p (SET_SRC (set)))
6942 363706088 : return true;
6943 :
6944 : return false;
6945 : }
6946 :
6947 : /* Return true if insn is live. */
6948 :
6949 : static bool
6950 706493378 : insn_live_p (rtx_insn *insn, int *counts)
6951 : {
6952 706493378 : int i;
6953 706493378 : if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
6954 : return true;
6955 688040291 : else if (GET_CODE (PATTERN (insn)) == SET)
6956 313177697 : return set_live_p (PATTERN (insn), counts);
6957 374862594 : else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6958 : {
6959 119235120 : for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6960 : {
6961 118740616 : rtx elt = XVECEXP (PATTERN (insn), 0, i);
6962 :
6963 118740616 : if (GET_CODE (elt) == SET)
6964 : {
6965 58879417 : if (set_live_p (elt, counts))
6966 : return true;
6967 : }
6968 59861199 : else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6969 : return true;
6970 : }
6971 : return false;
6972 : }
6973 315857194 : else if (DEBUG_INSN_P (insn))
6974 : {
6975 299934072 : if (DEBUG_MARKER_INSN_P (insn))
6976 : return true;
6977 :
6978 231466709 : if (DEBUG_BIND_INSN_P (insn)
6979 231466709 : && TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
6980 : return false;
6981 :
6982 : return true;
6983 : }
6984 : else
6985 : return true;
6986 : }
6987 :
6988 : /* Count the number of stores into pseudo. Callback for note_stores. */
6989 :
6990 : static void
6991 257717079 : count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6992 : {
6993 257717079 : int *counts = (int *) data;
6994 257717079 : if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6995 96676365 : counts[REGNO (x)]++;
6996 257717079 : }
6997 :
6998 : /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
6999 : pseudo doesn't have a replacement. COUNTS[X] is zero if register X
7000 : is dead and REPLACEMENTS[X] is null if it has no replacemenet.
7001 : Set *SEEN_REPL to true if we see a dead register that does have
7002 : a replacement. */
7003 :
7004 : static bool
7005 231423258 : is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements,
7006 : bool *seen_repl)
7007 : {
7008 231423258 : subrtx_iterator::array_type array;
7009 642463450 : FOR_EACH_SUBRTX (iter, array, pat, NONCONST)
7010 : {
7011 411065701 : const_rtx x = *iter;
7012 476234360 : if (is_dead_reg (x, counts))
7013 : {
7014 49756 : if (replacements && replacements[REGNO (x)] != NULL_RTX)
7015 24247 : *seen_repl = true;
7016 : else
7017 25509 : return true;
7018 : }
7019 : }
7020 231397749 : return false;
7021 231423258 : }
7022 :
7023 : /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
7024 : Callback for simplify_replace_fn_rtx. */
7025 :
7026 : static rtx
7027 37309 : replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
7028 : {
7029 37309 : rtx *replacements = (rtx *) data;
7030 :
7031 37309 : if (REG_P (x)
7032 25044 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
7033 62332 : && replacements[REGNO (x)] != NULL_RTX)
7034 : {
7035 24247 : if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
7036 : return replacements[REGNO (x)];
7037 0 : return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
7038 0 : GET_MODE (replacements[REGNO (x)]));
7039 : }
7040 : return NULL_RTX;
7041 : }
7042 :
7043 : /* Scan all the insns and delete any that are dead; i.e., they store a register
7044 : that is never used or they copy a register to itself.
7045 :
7046 : This is used to remove insns made obviously dead by cse, loop or other
7047 : optimizations. It improves the heuristics in loop since it won't try to
7048 : move dead invariants out of loops or make givs for dead quantities. The
7049 : remaining passes of the compilation are also sped up. */
7050 :
7051 : int
7052 6361615 : delete_trivially_dead_insns (rtx_insn *insns, int nreg)
7053 : {
7054 6361615 : int *counts;
7055 6361615 : rtx_insn *insn, *prev;
7056 6361615 : rtx *replacements = NULL;
7057 6361615 : int ndead = 0;
7058 :
7059 6361615 : timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7060 : /* First count the number of times each register is used. */
7061 6361615 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7062 : {
7063 2673232 : counts = XCNEWVEC (int, nreg * 3);
7064 610837066 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7065 608163834 : if (DEBUG_BIND_INSN_P (insn))
7066 : {
7067 231783180 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7068 : NULL_RTX, 1);
7069 231783180 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 0;
7070 : }
7071 376380654 : else if (INSN_P (insn))
7072 : {
7073 302667777 : count_reg_usage (insn, counts, NULL_RTX, 1);
7074 302667777 : note_stores (insn, count_stores, counts + nreg * 2);
7075 : }
7076 : /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7077 : First one counts how many times each pseudo is used outside
7078 : of debug insns, second counts how many times each pseudo is
7079 : used in debug insns and third counts how many times a pseudo
7080 : is stored. */
7081 : }
7082 : else
7083 : {
7084 3688383 : counts = XCNEWVEC (int, nreg);
7085 226601753 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7086 219224987 : if (INSN_P (insn))
7087 172042421 : count_reg_usage (insn, counts, NULL_RTX, 1);
7088 : /* If no debug insns can be present, COUNTS is just an array
7089 : which counts how many times each pseudo is used. */
7090 : }
7091 : /* Pseudo PIC register should be considered as used due to possible
7092 : new usages generated. */
7093 6361615 : if (!reload_completed
7094 6361615 : && pic_offset_table_rtx
7095 6578933 : && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
7096 217318 : counts[REGNO (pic_offset_table_rtx)]++;
7097 : /* Go from the last insn to the first and delete insns that only set unused
7098 : registers or copy a register to itself. As we delete an insn, remove
7099 : usage counts for registers it uses.
7100 :
7101 : The first jump optimization pass may leave a real insn as the last
7102 : insn in the function. We must not skip that insn or we may end
7103 : up deleting code that is not really dead.
7104 :
7105 : If some otherwise unused register is only used in DEBUG_INSNs,
7106 : try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7107 : the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7108 : has been created for the unused register, replace it with
7109 : the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7110 6361615 : auto_vec<tree, 32> later_debug_set_vars;
7111 833750436 : for (insn = get_last_insn (); insn; insn = prev)
7112 : {
7113 827388821 : int live_insn = 0;
7114 :
7115 827388821 : prev = PREV_INSN (insn);
7116 827388821 : if (!INSN_P (insn))
7117 120895443 : continue;
7118 :
7119 706493378 : live_insn = insn_live_p (insn, counts);
7120 :
7121 : /* If this is a dead insn, delete it and show registers in it aren't
7122 : being used. */
7123 :
7124 706493378 : if (! live_insn && dbg_cnt (delete_trivial_dead))
7125 : {
7126 8463585 : if (DEBUG_INSN_P (insn))
7127 : {
7128 376653 : if (DEBUG_BIND_INSN_P (insn))
7129 376653 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7130 : NULL_RTX, -1);
7131 : }
7132 : else
7133 : {
7134 8086932 : rtx set;
7135 8086932 : if (MAY_HAVE_DEBUG_BIND_INSNS
7136 3949869 : && (set = single_set (insn)) != NULL_RTX
7137 3949869 : && is_dead_reg (SET_DEST (set), counts)
7138 : /* Used at least once in some DEBUG_INSN. */
7139 3944119 : && counts[REGNO (SET_DEST (set)) + nreg] > 0
7140 : /* And set exactly once. */
7141 17895 : && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
7142 16732 : && !side_effects_p (SET_SRC (set))
7143 8103664 : && asm_noperands (PATTERN (insn)) < 0)
7144 : {
7145 16731 : rtx dval, bind_var_loc;
7146 16731 : rtx_insn *bind;
7147 :
7148 : /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7149 16731 : dval = make_debug_expr_from_rtl (SET_DEST (set));
7150 :
7151 : /* Emit a debug bind insn before the insn in which
7152 : reg dies. */
7153 16731 : bind_var_loc =
7154 16731 : gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
7155 : DEBUG_EXPR_TREE_DECL (dval),
7156 : SET_SRC (set),
7157 : VAR_INIT_STATUS_INITIALIZED);
7158 16731 : count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
7159 :
7160 16731 : bind = emit_debug_insn_before (bind_var_loc, insn);
7161 16731 : df_insn_rescan (bind);
7162 :
7163 16731 : if (replacements == NULL)
7164 9010 : replacements = XCNEWVEC (rtx, nreg);
7165 16731 : replacements[REGNO (SET_DEST (set))] = dval;
7166 : }
7167 :
7168 8086932 : count_reg_usage (insn, counts, NULL_RTX, -1);
7169 8086932 : ndead++;
7170 : }
7171 8463585 : cse_cfg_altered |= delete_insn_and_edges (insn);
7172 : }
7173 : else
7174 : {
7175 698029793 : if (!DEBUG_INSN_P (insn) || DEBUG_MARKER_INSN_P (insn))
7176 : {
7177 1630979674 : for (tree var : later_debug_set_vars)
7178 231109876 : TREE_VISITED (var) = 0;
7179 466623266 : later_debug_set_vars.truncate (0);
7180 : }
7181 231406527 : else if (DEBUG_BIND_INSN_P (insn)
7182 231406527 : && !TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
7183 : {
7184 231400391 : later_debug_set_vars.safe_push (INSN_VAR_LOCATION_DECL (insn));
7185 231400391 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 1;
7186 : }
7187 : }
7188 : }
7189 :
7190 6361615 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7191 : {
7192 606527275 : for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
7193 603854043 : if (DEBUG_BIND_INSN_P (insn))
7194 : {
7195 : /* If this debug insn references a dead register that wasn't replaced
7196 : with an DEBUG_EXPR, reset the DEBUG_INSN. */
7197 231423258 : bool seen_repl = false;
7198 231423258 : if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn),
7199 : counts, replacements, &seen_repl))
7200 : {
7201 25509 : INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
7202 25509 : df_insn_rescan (insn);
7203 : }
7204 231397749 : else if (seen_repl)
7205 : {
7206 24157 : INSN_VAR_LOCATION_LOC (insn)
7207 24157 : = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
7208 : NULL_RTX, replace_dead_reg,
7209 : replacements);
7210 24157 : df_insn_rescan (insn);
7211 : }
7212 : }
7213 2673232 : free (replacements);
7214 : }
7215 :
7216 6361615 : if (dump_file && ndead)
7217 26 : fprintf (dump_file, "Deleted %i trivially dead insns\n",
7218 : ndead);
7219 : /* Clean up. */
7220 6361615 : free (counts);
7221 6361615 : timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7222 6361615 : return ndead;
7223 6361615 : }
7224 :
7225 : /* If LOC contains references to NEWREG in a different mode, change them
7226 : to use NEWREG instead. */
7227 :
7228 : static void
7229 56778 : cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
7230 : rtx *loc, rtx_insn *insn, rtx newreg)
7231 : {
7232 353785 : FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
7233 : {
7234 297007 : rtx *loc = *iter;
7235 297007 : rtx x = *loc;
7236 297007 : if (x
7237 268618 : && REG_P (x)
7238 66145 : && REGNO (x) == REGNO (newreg)
7239 345778 : && GET_MODE (x) != GET_MODE (newreg))
7240 : {
7241 48771 : validate_change (insn, loc, newreg, 1);
7242 48771 : iter.skip_subrtxes ();
7243 : }
7244 : }
7245 56778 : }
7246 :
7247 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7248 : GET_MODE (NEWREG) in INSN. */
7249 :
7250 : static void
7251 28389 : cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
7252 : {
7253 28389 : int success;
7254 :
7255 28389 : if (!INSN_P (insn))
7256 0 : return;
7257 :
7258 28389 : subrtx_ptr_iterator::array_type array;
7259 28389 : cse_change_cc_mode (array, &PATTERN (insn), insn, newreg);
7260 28389 : cse_change_cc_mode (array, ®_NOTES (insn), insn, newreg);
7261 :
7262 : /* If the following assertion was triggered, there is most probably
7263 : something wrong with the cc_modes_compatible back end function.
7264 : CC modes only can be considered compatible if the insn - with the mode
7265 : replaced by any of the compatible modes - can still be recognized. */
7266 28389 : success = apply_change_group ();
7267 28389 : gcc_assert (success);
7268 28389 : }
7269 :
7270 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7271 : GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7272 : any instruction which modifies NEWREG. */
7273 :
7274 : static void
7275 19550 : cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
7276 : {
7277 19550 : rtx_insn *insn;
7278 :
7279 39519 : for (insn = start; insn != end; insn = NEXT_INSN (insn))
7280 : {
7281 21449 : if (! INSN_P (insn))
7282 0 : continue;
7283 :
7284 21449 : if (reg_set_p (newreg, insn))
7285 : return;
7286 :
7287 19969 : cse_change_cc_mode_insn (insn, newreg);
7288 : }
7289 : }
7290 :
7291 : /* BB is a basic block which finishes with CC_REG as a condition code
7292 : register which is set to CC_SRC. Look through the successors of BB
7293 : to find blocks which have a single predecessor (i.e., this one),
7294 : and look through those blocks for an assignment to CC_REG which is
7295 : equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7296 : permitted to change the mode of CC_SRC to a compatible mode. This
7297 : returns VOIDmode if no equivalent assignments were found.
7298 : Otherwise it returns the mode which CC_SRC should wind up with.
7299 : ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7300 : but is passed unmodified down to recursive calls in order to prevent
7301 : endless recursion.
7302 :
7303 : The main complexity in this function is handling the mode issues.
7304 : We may have more than one duplicate which we can eliminate, and we
7305 : try to find a mode which will work for multiple duplicates. */
7306 :
7307 : static machine_mode
7308 5599468 : cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7309 : bool can_change_mode)
7310 : {
7311 5599468 : bool found_equiv;
7312 5599468 : machine_mode mode;
7313 5599468 : unsigned int insn_count;
7314 5599468 : edge e;
7315 5599468 : rtx_insn *insns[2];
7316 5599468 : machine_mode modes[2];
7317 5599468 : rtx_insn *last_insns[2];
7318 5599468 : unsigned int i;
7319 5599468 : rtx newreg;
7320 5599468 : edge_iterator ei;
7321 :
7322 : /* We expect to have two successors. Look at both before picking
7323 : the final mode for the comparison. If we have more successors
7324 : (i.e., some sort of table jump, although that seems unlikely),
7325 : then we require all beyond the first two to use the same
7326 : mode. */
7327 :
7328 5599468 : found_equiv = false;
7329 5599468 : mode = GET_MODE (cc_src);
7330 5599468 : insn_count = 0;
7331 15831822 : FOR_EACH_EDGE (e, ei, bb->succs)
7332 : {
7333 10232354 : rtx_insn *insn;
7334 10232354 : rtx_insn *end;
7335 :
7336 10232354 : if (e->flags & EDGE_COMPLEX)
7337 32863 : continue;
7338 :
7339 10199491 : if (EDGE_COUNT (e->dest->preds) != 1
7340 5663434 : || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
7341 : /* Avoid endless recursion on unreachable blocks. */
7342 15767824 : || e->dest == orig_bb)
7343 4631158 : continue;
7344 :
7345 5568333 : end = NEXT_INSN (BB_END (e->dest));
7346 34731903 : for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7347 : {
7348 33582607 : rtx set;
7349 :
7350 33582607 : if (! INSN_P (insn))
7351 7533098 : continue;
7352 :
7353 : /* If CC_SRC is modified, we have to stop looking for
7354 : something which uses it. */
7355 26049509 : if (modified_in_p (cc_src, insn))
7356 : break;
7357 :
7358 : /* Check whether INSN sets CC_REG to CC_SRC. */
7359 25568385 : set = single_set (insn);
7360 25568385 : if (set
7361 11312446 : && REG_P (SET_DEST (set))
7362 35435438 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7363 : {
7364 1370774 : bool found;
7365 1370774 : machine_mode set_mode;
7366 1370774 : machine_mode comp_mode;
7367 :
7368 1370774 : found = false;
7369 1370774 : set_mode = GET_MODE (SET_SRC (set));
7370 1370774 : comp_mode = set_mode;
7371 1370774 : if (rtx_equal_p (cc_src, SET_SRC (set)))
7372 : found = true;
7373 1364496 : else if (GET_CODE (cc_src) == COMPARE
7374 1294799 : && GET_CODE (SET_SRC (set)) == COMPARE
7375 1245159 : && mode != set_mode
7376 349949 : && rtx_equal_p (XEXP (cc_src, 0),
7377 349949 : XEXP (SET_SRC (set), 0))
7378 1426950 : && rtx_equal_p (XEXP (cc_src, 1),
7379 62454 : XEXP (SET_SRC (set), 1)))
7380 :
7381 : {
7382 19554 : comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7383 19554 : if (comp_mode != VOIDmode
7384 19554 : && (can_change_mode || comp_mode == mode))
7385 : found = true;
7386 : }
7387 :
7388 25828 : if (found)
7389 : {
7390 25828 : found_equiv = true;
7391 25828 : if (insn_count < ARRAY_SIZE (insns))
7392 : {
7393 25828 : insns[insn_count] = insn;
7394 25828 : modes[insn_count] = set_mode;
7395 25828 : last_insns[insn_count] = end;
7396 25828 : ++insn_count;
7397 :
7398 25828 : if (mode != comp_mode)
7399 : {
7400 8420 : gcc_assert (can_change_mode);
7401 8420 : mode = comp_mode;
7402 :
7403 : /* The modified insn will be re-recognized later. */
7404 8420 : PUT_MODE (cc_src, mode);
7405 : }
7406 : }
7407 : else
7408 : {
7409 0 : if (set_mode != mode)
7410 : {
7411 : /* We found a matching expression in the
7412 : wrong mode, but we don't have room to
7413 : store it in the array. Punt. This case
7414 : should be rare. */
7415 : break;
7416 : }
7417 : /* INSN sets CC_REG to a value equal to CC_SRC
7418 : with the right mode. We can simply delete
7419 : it. */
7420 0 : delete_insn (insn);
7421 : }
7422 :
7423 : /* We found an instruction to delete. Keep looking,
7424 : in the hopes of finding a three-way jump. */
7425 25828 : continue;
7426 : }
7427 :
7428 : /* We found an instruction which sets the condition
7429 : code, so don't look any farther. */
7430 : break;
7431 : }
7432 :
7433 : /* If INSN sets CC_REG in some other way, don't look any
7434 : farther. */
7435 24197611 : if (reg_set_p (cc_reg, insn))
7436 : break;
7437 : }
7438 :
7439 : /* If we fell off the bottom of the block, we can keep looking
7440 : through successors. We pass CAN_CHANGE_MODE as false because
7441 : we aren't prepared to handle compatibility between the
7442 : further blocks and this block. */
7443 5568333 : if (insn == end)
7444 : {
7445 1149296 : machine_mode submode;
7446 :
7447 1149296 : submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7448 1149296 : if (submode != VOIDmode)
7449 : {
7450 295 : gcc_assert (submode == mode);
7451 : found_equiv = true;
7452 : can_change_mode = false;
7453 : }
7454 : }
7455 : }
7456 :
7457 5599468 : if (! found_equiv)
7458 : return VOIDmode;
7459 :
7460 : /* Now INSN_COUNT is the number of instructions we found which set
7461 : CC_REG to a value equivalent to CC_SRC. The instructions are in
7462 : INSNS. The modes used by those instructions are in MODES. */
7463 :
7464 : newreg = NULL_RTX;
7465 51680 : for (i = 0; i < insn_count; ++i)
7466 : {
7467 25828 : if (modes[i] != mode)
7468 : {
7469 : /* We need to change the mode of CC_REG in INSNS[i] and
7470 : subsequent instructions. */
7471 11130 : if (! newreg)
7472 : {
7473 10865 : if (GET_MODE (cc_reg) == mode)
7474 : newreg = cc_reg;
7475 : else
7476 7509 : newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7477 : }
7478 11130 : cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7479 : newreg);
7480 : }
7481 :
7482 25828 : cse_cfg_altered |= delete_insn_and_edges (insns[i]);
7483 : }
7484 :
7485 : return mode;
7486 : }
7487 :
7488 : /* If we have a fixed condition code register (or two), walk through
7489 : the instructions and try to eliminate duplicate assignments. */
7490 :
7491 : static void
7492 963980 : cse_condition_code_reg (void)
7493 : {
7494 963980 : unsigned int cc_regno_1;
7495 963980 : unsigned int cc_regno_2;
7496 963980 : rtx cc_reg_1;
7497 963980 : rtx cc_reg_2;
7498 963980 : basic_block bb;
7499 :
7500 963980 : if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7501 0 : return;
7502 :
7503 963980 : cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7504 963980 : if (cc_regno_2 != INVALID_REGNUM)
7505 0 : cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7506 : else
7507 : cc_reg_2 = NULL_RTX;
7508 :
7509 10807840 : FOR_EACH_BB_FN (bb, cfun)
7510 : {
7511 9843860 : rtx_insn *last_insn;
7512 9843860 : rtx cc_reg;
7513 9843860 : rtx_insn *insn;
7514 9843860 : rtx_insn *cc_src_insn;
7515 9843860 : rtx cc_src;
7516 9843860 : machine_mode mode;
7517 9843860 : machine_mode orig_mode;
7518 :
7519 : /* Look for blocks which end with a conditional jump based on a
7520 : condition code register. Then look for the instruction which
7521 : sets the condition code register. Then look through the
7522 : successor blocks for instructions which set the condition
7523 : code register to the same value. There are other possible
7524 : uses of the condition code register, but these are by far the
7525 : most common and the ones which we are most likely to be able
7526 : to optimize. */
7527 :
7528 9843860 : last_insn = BB_END (bb);
7529 9843860 : if (!JUMP_P (last_insn))
7530 5249478 : continue;
7531 :
7532 4594382 : if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7533 : cc_reg = cc_reg_1;
7534 9735 : else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7535 : cc_reg = cc_reg_2;
7536 : else
7537 9735 : continue;
7538 :
7539 4584647 : cc_src_insn = NULL;
7540 4584647 : cc_src = NULL_RTX;
7541 4762130 : for (insn = PREV_INSN (last_insn);
7542 4762130 : insn && insn != PREV_INSN (BB_HEAD (bb));
7543 177483 : insn = PREV_INSN (insn))
7544 : {
7545 4644751 : rtx set;
7546 :
7547 4644751 : if (! INSN_P (insn))
7548 126185 : continue;
7549 4518566 : set = single_set (insn);
7550 4518566 : if (set
7551 4458269 : && REG_P (SET_DEST (set))
7552 8976004 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7553 : {
7554 4450189 : cc_src_insn = insn;
7555 4450189 : cc_src = SET_SRC (set);
7556 4450189 : break;
7557 : }
7558 68377 : else if (reg_set_p (cc_reg, insn))
7559 : break;
7560 : }
7561 :
7562 4584647 : if (! cc_src_insn)
7563 134458 : continue;
7564 :
7565 4450189 : if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7566 17 : continue;
7567 :
7568 : /* Now CC_REG is a condition code register used for a
7569 : conditional jump at the end of the block, and CC_SRC, in
7570 : CC_SRC_INSN, is the value to which that condition code
7571 : register is set, and CC_SRC is still meaningful at the end of
7572 : the basic block. */
7573 :
7574 4450172 : orig_mode = GET_MODE (cc_src);
7575 4450172 : mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7576 4450172 : if (mode != VOIDmode)
7577 : {
7578 25557 : gcc_assert (mode == GET_MODE (cc_src));
7579 25557 : if (mode != orig_mode)
7580 : {
7581 8420 : rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7582 :
7583 8420 : cse_change_cc_mode_insn (cc_src_insn, newreg);
7584 :
7585 : /* Do the same in the following insns that use the
7586 : current value of CC_REG within BB. */
7587 8420 : cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7588 : NEXT_INSN (last_insn),
7589 : newreg);
7590 : }
7591 : }
7592 : }
7593 : }
7594 :
7595 :
7596 : /* Perform common subexpression elimination. Nonzero value from
7597 : `cse_main' means that jumps were simplified and some code may now
7598 : be unreachable, so do jump optimization again. */
7599 : static unsigned int
7600 1043684 : rest_of_handle_cse (void)
7601 : {
7602 1043684 : int tem;
7603 :
7604 1043684 : if (dump_file)
7605 32 : dump_flow_info (dump_file, dump_flags);
7606 :
7607 1043684 : tem = cse_main (get_insns (), max_reg_num ());
7608 :
7609 : /* If we are not running more CSE passes, then we are no longer
7610 : expecting CSE to be run. But always rerun it in a cheap mode. */
7611 1043684 : cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7612 :
7613 1043684 : if (tem == 2)
7614 : {
7615 5345 : timevar_push (TV_JUMP);
7616 5345 : rebuild_jump_labels (get_insns ());
7617 5345 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7618 5345 : timevar_pop (TV_JUMP);
7619 : }
7620 1038339 : else if (tem == 1 || optimize > 1)
7621 958986 : cse_cfg_altered |= cleanup_cfg (0);
7622 :
7623 1043684 : return 0;
7624 : }
7625 :
7626 : namespace {
7627 :
7628 : const pass_data pass_data_cse =
7629 : {
7630 : RTL_PASS, /* type */
7631 : "cse1", /* name */
7632 : OPTGROUP_NONE, /* optinfo_flags */
7633 : TV_CSE, /* tv_id */
7634 : 0, /* properties_required */
7635 : 0, /* properties_provided */
7636 : 0, /* properties_destroyed */
7637 : 0, /* todo_flags_start */
7638 : TODO_df_finish, /* todo_flags_finish */
7639 : };
7640 :
7641 : class pass_cse : public rtl_opt_pass
7642 : {
7643 : public:
7644 285722 : pass_cse (gcc::context *ctxt)
7645 571444 : : rtl_opt_pass (pass_data_cse, ctxt)
7646 : {}
7647 :
7648 : /* opt_pass methods: */
7649 1471370 : bool gate (function *) final override { return optimize > 0; }
7650 1043684 : unsigned int execute (function *) final override
7651 : {
7652 1043684 : return rest_of_handle_cse ();
7653 : }
7654 :
7655 : }; // class pass_cse
7656 :
7657 : } // anon namespace
7658 :
7659 : rtl_opt_pass *
7660 285722 : make_pass_cse (gcc::context *ctxt)
7661 : {
7662 285722 : return new pass_cse (ctxt);
7663 : }
7664 :
7665 :
7666 : /* Run second CSE pass after loop optimizations. */
7667 : static unsigned int
7668 963980 : rest_of_handle_cse2 (void)
7669 : {
7670 963980 : int tem;
7671 :
7672 963980 : if (dump_file)
7673 22 : dump_flow_info (dump_file, dump_flags);
7674 :
7675 963980 : tem = cse_main (get_insns (), max_reg_num ());
7676 :
7677 : /* Run a pass to eliminate duplicated assignments to condition code
7678 : registers. We have to run this after bypass_jumps, because it
7679 : makes it harder for that pass to determine whether a jump can be
7680 : bypassed safely. */
7681 963980 : cse_condition_code_reg ();
7682 :
7683 963980 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7684 :
7685 963980 : if (tem == 2)
7686 : {
7687 1836 : timevar_push (TV_JUMP);
7688 1836 : rebuild_jump_labels (get_insns ());
7689 1836 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7690 1836 : timevar_pop (TV_JUMP);
7691 : }
7692 962144 : else if (tem == 1 || cse_cfg_altered)
7693 108 : cse_cfg_altered |= cleanup_cfg (0);
7694 :
7695 963980 : cse_not_expected = 1;
7696 963980 : return 0;
7697 : }
7698 :
7699 :
7700 : namespace {
7701 :
7702 : const pass_data pass_data_cse2 =
7703 : {
7704 : RTL_PASS, /* type */
7705 : "cse2", /* name */
7706 : OPTGROUP_NONE, /* optinfo_flags */
7707 : TV_CSE2, /* tv_id */
7708 : 0, /* properties_required */
7709 : 0, /* properties_provided */
7710 : 0, /* properties_destroyed */
7711 : 0, /* todo_flags_start */
7712 : TODO_df_finish, /* todo_flags_finish */
7713 : };
7714 :
7715 : class pass_cse2 : public rtl_opt_pass
7716 : {
7717 : public:
7718 285722 : pass_cse2 (gcc::context *ctxt)
7719 571444 : : rtl_opt_pass (pass_data_cse2, ctxt)
7720 : {}
7721 :
7722 : /* opt_pass methods: */
7723 1471370 : bool gate (function *) final override
7724 : {
7725 1471370 : return optimize > 0 && flag_rerun_cse_after_loop;
7726 : }
7727 :
7728 963980 : unsigned int execute (function *) final override
7729 : {
7730 963980 : return rest_of_handle_cse2 ();
7731 : }
7732 :
7733 : }; // class pass_cse2
7734 :
7735 : } // anon namespace
7736 :
7737 : rtl_opt_pass *
7738 285722 : make_pass_cse2 (gcc::context *ctxt)
7739 : {
7740 285722 : return new pass_cse2 (ctxt);
7741 : }
7742 :
7743 : /* Run second CSE pass after loop optimizations. */
7744 : static unsigned int
7745 291659 : rest_of_handle_cse_after_global_opts (void)
7746 : {
7747 291659 : int save_cfj;
7748 291659 : int tem;
7749 :
7750 : /* We only want to do local CSE, so don't follow jumps. */
7751 291659 : save_cfj = flag_cse_follow_jumps;
7752 291659 : flag_cse_follow_jumps = 0;
7753 :
7754 291659 : rebuild_jump_labels (get_insns ());
7755 291659 : tem = cse_main (get_insns (), max_reg_num ());
7756 291659 : cse_cfg_altered |= purge_all_dead_edges ();
7757 291659 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7758 :
7759 291659 : cse_not_expected = !flag_rerun_cse_after_loop;
7760 :
7761 : /* If cse altered any jumps, rerun jump opts to clean things up. */
7762 291659 : if (tem == 2)
7763 : {
7764 296 : timevar_push (TV_JUMP);
7765 296 : rebuild_jump_labels (get_insns ());
7766 296 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7767 296 : timevar_pop (TV_JUMP);
7768 : }
7769 291363 : else if (tem == 1 || cse_cfg_altered)
7770 4785 : cse_cfg_altered |= cleanup_cfg (0);
7771 :
7772 291659 : flag_cse_follow_jumps = save_cfj;
7773 291659 : return 0;
7774 : }
7775 :
7776 : namespace {
7777 :
7778 : const pass_data pass_data_cse_after_global_opts =
7779 : {
7780 : RTL_PASS, /* type */
7781 : "cse_local", /* name */
7782 : OPTGROUP_NONE, /* optinfo_flags */
7783 : TV_CSE, /* tv_id */
7784 : 0, /* properties_required */
7785 : 0, /* properties_provided */
7786 : 0, /* properties_destroyed */
7787 : 0, /* todo_flags_start */
7788 : TODO_df_finish, /* todo_flags_finish */
7789 : };
7790 :
7791 : class pass_cse_after_global_opts : public rtl_opt_pass
7792 : {
7793 : public:
7794 285722 : pass_cse_after_global_opts (gcc::context *ctxt)
7795 571444 : : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt)
7796 : {}
7797 :
7798 : /* opt_pass methods: */
7799 1471370 : bool gate (function *) final override
7800 : {
7801 1471370 : return optimize > 0 && flag_rerun_cse_after_global_opts;
7802 : }
7803 :
7804 291659 : unsigned int execute (function *) final override
7805 : {
7806 291659 : return rest_of_handle_cse_after_global_opts ();
7807 : }
7808 :
7809 : }; // class pass_cse_after_global_opts
7810 :
7811 : } // anon namespace
7812 :
7813 : rtl_opt_pass *
7814 285722 : make_pass_cse_after_global_opts (gcc::context *ctxt)
7815 : {
7816 285722 : return new pass_cse_after_global_opts (ctxt);
7817 : }
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