Line data Source code
1 : /* Common subexpression elimination for GNU compiler.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : #include "config.h"
21 : #include "system.h"
22 : #include "coretypes.h"
23 : #include "backend.h"
24 : #include "target.h"
25 : #include "rtl.h"
26 : #include "stmt.h"
27 : #include "tree.h"
28 : #include "cfghooks.h"
29 : #include "df.h"
30 : #include "memmodel.h"
31 : #include "tm_p.h"
32 : #include "insn-config.h"
33 : #include "regs.h"
34 : #include "emit-rtl.h"
35 : #include "recog.h"
36 : #include "cfgrtl.h"
37 : #include "cfganal.h"
38 : #include "cfgcleanup.h"
39 : #include "alias.h"
40 : #include "toplev.h"
41 : #include "rtlhooks-def.h"
42 : #include "tree-pass.h"
43 : #include "dbgcnt.h"
44 : #include "rtl-iter.h"
45 : #include "regs.h"
46 : #include "function-abi.h"
47 : #include "rtlanal.h"
48 : #include "expr.h"
49 :
50 : /* The basic idea of common subexpression elimination is to go
51 : through the code, keeping a record of expressions that would
52 : have the same value at the current scan point, and replacing
53 : expressions encountered with the cheapest equivalent expression.
54 :
55 : It is too complicated to keep track of the different possibilities
56 : when control paths merge in this code; so, at each label, we forget all
57 : that is known and start fresh. This can be described as processing each
58 : extended basic block separately. We have a separate pass to perform
59 : global CSE.
60 :
61 : Note CSE can turn a conditional or computed jump into a nop or
62 : an unconditional jump. When this occurs we arrange to run the jump
63 : optimizer after CSE to delete the unreachable code.
64 :
65 : We use two data structures to record the equivalent expressions:
66 : a hash table for most expressions, and a vector of "quantity
67 : numbers" to record equivalent (pseudo) registers.
68 :
69 : The use of the special data structure for registers is desirable
70 : because it is faster. It is possible because registers references
71 : contain a fairly small number, the register number, taken from
72 : a contiguously allocated series, and two register references are
73 : identical if they have the same number. General expressions
74 : do not have any such thing, so the only way to retrieve the
75 : information recorded on an expression other than a register
76 : is to keep it in a hash table.
77 :
78 : Registers and "quantity numbers":
79 :
80 : At the start of each basic block, all of the (hardware and pseudo)
81 : registers used in the function are given distinct quantity
82 : numbers to indicate their contents. During scan, when the code
83 : copies one register into another, we copy the quantity number.
84 : When a register is loaded in any other way, we allocate a new
85 : quantity number to describe the value generated by this operation.
86 : `REG_QTY (N)' records what quantity register N is currently thought
87 : of as containing.
88 :
89 : All real quantity numbers are greater than or equal to zero.
90 : If register N has not been assigned a quantity, `REG_QTY (N)' will
91 : equal -N - 1, which is always negative.
92 :
93 : Quantity numbers below zero do not exist and none of the `qty_table'
94 : entries should be referenced with a negative index.
95 :
96 : We also maintain a bidirectional chain of registers for each
97 : quantity number. The `qty_table` members `first_reg' and `last_reg',
98 : and `reg_eqv_table' members `next' and `prev' hold these chains.
99 :
100 : The first register in a chain is the one whose lifespan is least local.
101 : Among equals, it is the one that was seen first.
102 : We replace any equivalent register with that one.
103 :
104 : If two registers have the same quantity number, it must be true that
105 : REG expressions with qty_table `mode' must be in the hash table for both
106 : registers and must be in the same class.
107 :
108 : The converse is not true. Since hard registers may be referenced in
109 : any mode, two REG expressions might be equivalent in the hash table
110 : but not have the same quantity number if the quantity number of one
111 : of the registers is not the same mode as those expressions.
112 :
113 : Constants and quantity numbers
114 :
115 : When a quantity has a known constant value, that value is stored
116 : in the appropriate qty_table `const_rtx'. This is in addition to
117 : putting the constant in the hash table as is usual for non-regs.
118 :
119 : Whether a reg or a constant is preferred is determined by the configuration
120 : macro CONST_COSTS and will often depend on the constant value. In any
121 : event, expressions containing constants can be simplified, by fold_rtx.
122 :
123 : When a quantity has a known nearly constant value (such as an address
124 : of a stack slot), that value is stored in the appropriate qty_table
125 : `const_rtx'.
126 :
127 : Integer constants don't have a machine mode. However, cse
128 : determines the intended machine mode from the destination
129 : of the instruction that moves the constant. The machine mode
130 : is recorded in the hash table along with the actual RTL
131 : constant expression so that different modes are kept separate.
132 :
133 : Other expressions:
134 :
135 : To record known equivalences among expressions in general
136 : we use a hash table called `table'. It has a fixed number of buckets
137 : that contain chains of `struct table_elt' elements for expressions.
138 : These chains connect the elements whose expressions have the same
139 : hash codes.
140 :
141 : Other chains through the same elements connect the elements which
142 : currently have equivalent values.
143 :
144 : Register references in an expression are canonicalized before hashing
145 : the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 : The hash code of a register reference is computed using the quantity
147 : number, not the register number.
148 :
149 : When the value of an expression changes, it is necessary to remove from the
150 : hash table not just that expression but all expressions whose values
151 : could be different as a result.
152 :
153 : 1. If the value changing is in memory, except in special cases
154 : ANYTHING referring to memory could be changed. That is because
155 : nobody knows where a pointer does not point.
156 : The function `invalidate_memory' removes what is necessary.
157 :
158 : The special cases are when the address is constant or is
159 : a constant plus a fixed register such as the frame pointer
160 : or a static chain pointer. When such addresses are stored in,
161 : we can tell exactly which other such addresses must be invalidated
162 : due to overlap. `invalidate' does this.
163 : All expressions that refer to non-constant
164 : memory addresses are also invalidated. `invalidate_memory' does this.
165 :
166 : 2. If the value changing is a register, all expressions
167 : containing references to that register, and only those,
168 : must be removed.
169 :
170 : Because searching the entire hash table for expressions that contain
171 : a register is very slow, we try to figure out when it isn't necessary.
172 : Precisely, this is necessary only when expressions have been
173 : entered in the hash table using this register, and then the value has
174 : changed, and then another expression wants to be added to refer to
175 : the register's new value. This sequence of circumstances is rare
176 : within any one basic block.
177 :
178 : `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 : cse_reg_info, are used to detect this case. REG_TICK (i) is
180 : incremented whenever a value is stored in register i.
181 : REG_IN_TABLE (i) holds -1 if no references to register i have been
182 : entered in the table; otherwise, it contains the value REG_TICK (i)
183 : had when the references were entered. If we want to enter a
184 : reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 : remove old references. Until we want to enter a new entry, the
186 : mere fact that the two vectors don't match makes the entries be
187 : ignored if anyone tries to match them.
188 :
189 : Registers themselves are entered in the hash table as well as in
190 : the equivalent-register chains. However, `REG_TICK' and
191 : `REG_IN_TABLE' do not apply to expressions which are simple
192 : register references. These expressions are removed from the table
193 : immediately when they become invalid, and this can be done even if
194 : we do not immediately search for all the expressions that refer to
195 : the register.
196 :
197 : A CLOBBER rtx in an instruction invalidates its operand for further
198 : reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 : invalidates everything that resides in memory.
200 :
201 : Related expressions:
202 :
203 : Constant expressions that differ only by an additive integer
204 : are called related. When a constant expression is put in
205 : the table, the related expression with no constant term
206 : is also entered. These are made to point at each other
207 : so that it is possible to find out if there exists any
208 : register equivalent to an expression related to a given expression. */
209 :
210 : /* Length of qty_table vector. We know in advance we will not need
211 : a quantity number this big. */
212 :
213 : static int max_qty;
214 :
215 : /* Next quantity number to be allocated.
216 : This is 1 + the largest number needed so far. */
217 :
218 : static int next_qty;
219 :
220 : /* Per-qty information tracking.
221 :
222 : `first_reg' and `last_reg' track the head and tail of the
223 : chain of registers which currently contain this quantity.
224 :
225 : `mode' contains the machine mode of this quantity.
226 :
227 : `const_rtx' holds the rtx of the constant value of this
228 : quantity, if known. A summations of the frame/arg pointer
229 : and a constant can also be entered here. When this holds
230 : a known value, `const_insn' is the insn which stored the
231 : constant value.
232 :
233 : `comparison_{code,const,qty}' are used to track when a
234 : comparison between a quantity and some constant or register has
235 : been passed. In such a case, we know the results of the comparison
236 : in case we see it again. These members record a comparison that
237 : is known to be true. `comparison_code' holds the rtx code of such
238 : a comparison, else it is set to UNKNOWN and the other two
239 : comparison members are undefined. `comparison_const' holds
240 : the constant being compared against, or zero if the comparison
241 : is not against a constant. `comparison_qty' holds the quantity
242 : being compared against when the result is known. If the comparison
243 : is not with a register, `comparison_qty' is INT_MIN. */
244 :
245 : struct qty_table_elem
246 : {
247 : rtx const_rtx;
248 : rtx_insn *const_insn;
249 : rtx comparison_const;
250 : int comparison_qty;
251 : unsigned int first_reg, last_reg;
252 : machine_mode mode : MACHINE_MODE_BITSIZE;
253 : enum rtx_code comparison_code : RTX_CODE_BITSIZE;
254 : };
255 :
256 : /* The table of all qtys, indexed by qty number. */
257 : static struct qty_table_elem *qty_table;
258 :
259 : /* Insn being scanned. */
260 :
261 : static rtx_insn *this_insn;
262 : static bool optimize_this_for_speed_p;
263 :
264 : /* Index by register number, gives the number of the next (or
265 : previous) register in the chain of registers sharing the same
266 : value.
267 :
268 : Or -1 if this register is at the end of the chain.
269 :
270 : If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
271 :
272 : /* Per-register equivalence chain. */
273 : struct reg_eqv_elem
274 : {
275 : int next, prev;
276 : };
277 :
278 : /* The table of all register equivalence chains. */
279 : static struct reg_eqv_elem *reg_eqv_table;
280 :
281 : struct cse_reg_info
282 : {
283 : /* The timestamp at which this register is initialized. */
284 : unsigned int timestamp;
285 :
286 : /* The quantity number of the register's current contents. */
287 : int reg_qty;
288 :
289 : /* The number of times the register has been altered in the current
290 : basic block. */
291 : int reg_tick;
292 :
293 : /* The REG_TICK value at which rtx's containing this register are
294 : valid in the hash table. If this does not equal the current
295 : reg_tick value, such expressions existing in the hash table are
296 : invalid. */
297 : int reg_in_table;
298 :
299 : /* The SUBREG that was set when REG_TICK was last incremented. Set
300 : to -1 if the last store was to the whole register, not a subreg. */
301 : unsigned int subreg_ticked;
302 : };
303 :
304 : /* A table of cse_reg_info indexed by register numbers. */
305 : static struct cse_reg_info *cse_reg_info_table;
306 :
307 : /* The size of the above table. */
308 : static unsigned int cse_reg_info_table_size;
309 :
310 : /* The index of the first entry that has not been initialized. */
311 : static unsigned int cse_reg_info_table_first_uninitialized;
312 :
313 : /* The timestamp at the beginning of the current run of
314 : cse_extended_basic_block. We increment this variable at the beginning of
315 : the current run of cse_extended_basic_block. The timestamp field of a
316 : cse_reg_info entry matches the value of this variable if and only
317 : if the entry has been initialized during the current run of
318 : cse_extended_basic_block. */
319 : static unsigned int cse_reg_info_timestamp;
320 :
321 : /* A HARD_REG_SET containing all the hard registers for which there is
322 : currently a REG expression in the hash table. Note the difference
323 : from the above variables, which indicate if the REG is mentioned in some
324 : expression in the table. */
325 :
326 : static HARD_REG_SET hard_regs_in_table;
327 :
328 : /* True if CSE has altered the CFG. */
329 : static bool cse_cfg_altered;
330 :
331 : /* True if CSE has altered conditional jump insns in such a way
332 : that jump optimization should be redone. */
333 : static bool cse_jumps_altered;
334 :
335 : /* True if we put a LABEL_REF into the hash table for an INSN
336 : without a REG_LABEL_OPERAND, we have to rerun jump after CSE
337 : to put in the note. */
338 : static bool recorded_label_ref;
339 :
340 : /* canon_hash stores 1 in do_not_record if it notices a reference to PC or
341 : some other volatile subexpression. */
342 :
343 : static int do_not_record;
344 :
345 : /* canon_hash stores 1 in hash_arg_in_memory
346 : if it notices a reference to memory within the expression being hashed. */
347 :
348 : static int hash_arg_in_memory;
349 :
350 : /* The hash table contains buckets which are chains of `struct table_elt's,
351 : each recording one expression's information.
352 : That expression is in the `exp' field.
353 :
354 : The canon_exp field contains a canonical (from the point of view of
355 : alias analysis) version of the `exp' field.
356 :
357 : Those elements with the same hash code are chained in both directions
358 : through the `next_same_hash' and `prev_same_hash' fields.
359 :
360 : Each set of expressions with equivalent values
361 : are on a two-way chain through the `next_same_value'
362 : and `prev_same_value' fields, and all point with
363 : the `first_same_value' field at the first element in
364 : that chain. The chain is in order of increasing cost.
365 : Each element's cost value is in its `cost' field.
366 :
367 : The `in_memory' field is nonzero for elements that
368 : involve any reference to memory. These elements are removed
369 : whenever a write is done to an unidentified location in memory.
370 : To be safe, we assume that a memory address is unidentified unless
371 : the address is either a symbol constant or a constant plus
372 : the frame pointer or argument pointer.
373 :
374 : The `related_value' field is used to connect related expressions
375 : (that differ by adding an integer).
376 : The related expressions are chained in a circular fashion.
377 : `related_value' is zero for expressions for which this
378 : chain is not useful.
379 :
380 : The `cost' field stores the cost of this element's expression.
381 : The `regcost' field stores the value returned by approx_reg_cost for
382 : this element's expression.
383 :
384 : The `is_const' flag is set if the element is a constant (including
385 : a fixed address).
386 :
387 : The `flag' field is used as a temporary during some search routines.
388 :
389 : The `mode' field is usually the same as GET_MODE (`exp'), but
390 : if `exp' is a CONST_INT and has no machine mode then the `mode'
391 : field is the mode it was being used as. Each constant is
392 : recorded separately for each mode it is used with. */
393 :
394 : struct table_elt
395 : {
396 : rtx exp;
397 : rtx canon_exp;
398 : struct table_elt *next_same_hash;
399 : struct table_elt *prev_same_hash;
400 : struct table_elt *next_same_value;
401 : struct table_elt *prev_same_value;
402 : struct table_elt *first_same_value;
403 : struct table_elt *related_value;
404 : int cost;
405 : int regcost;
406 : machine_mode mode : MACHINE_MODE_BITSIZE;
407 : char in_memory;
408 : char is_const;
409 : char flag;
410 : };
411 :
412 : /* We don't want a lot of buckets, because we rarely have very many
413 : things stored in the hash table, and a lot of buckets slows
414 : down a lot of loops that happen frequently. */
415 : #define HASH_SHIFT 5
416 : #define HASH_SIZE (1 << HASH_SHIFT)
417 : #define HASH_MASK (HASH_SIZE - 1)
418 :
419 : /* Determine whether register number N is considered a fixed register for the
420 : purpose of approximating register costs.
421 : It is desirable to replace other regs with fixed regs, to reduce need for
422 : non-fixed hard regs.
423 : A reg wins if it is either the frame pointer or designated as fixed. */
424 : #define FIXED_REGNO_P(N) \
425 : ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
426 : || fixed_regs[N] || global_regs[N])
427 :
428 : /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
429 : hard registers and pointers into the frame are the cheapest with a cost
430 : of 0. Next come pseudos with a cost of one and other hard registers with
431 : a cost of 2. Aside from these special cases, call `rtx_cost'. */
432 :
433 : #define CHEAP_REGNO(N) \
434 : (REGNO_PTR_FRAME_P (N) \
435 : || (HARD_REGISTER_NUM_P (N) \
436 : && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
437 :
438 : #define COST(X, MODE) \
439 : (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
440 : #define COST_IN(X, MODE, OUTER, OPNO) \
441 : (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
442 :
443 : /* Get the number of times this register has been updated in this
444 : basic block. */
445 :
446 : #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
447 :
448 : /* Get the point at which REG was recorded in the table. */
449 :
450 : #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
451 :
452 : /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
453 : SUBREG). */
454 :
455 : #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
456 :
457 : /* Get the quantity number for REG. */
458 :
459 : #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
460 :
461 : /* Determine if the quantity number for register X represents a valid index
462 : into the qty_table. */
463 :
464 : #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
465 :
466 : /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
467 :
468 : #define CHEAPER(X, Y) \
469 : (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
470 :
471 : static struct table_elt *table[HASH_SIZE];
472 :
473 : /* Chain of `struct table_elt's made so far for this function
474 : but currently removed from the table. */
475 :
476 : static struct table_elt *free_element_chain;
477 :
478 : /* Trace a patch through the CFG. */
479 :
480 : struct branch_path
481 : {
482 : /* The basic block for this path entry. */
483 : basic_block bb;
484 : };
485 :
486 : /* This data describes a pair of vec_duplicates in the same BB, which duplicate
487 : the same pseudo to different vector lengths. The same structure is also
488 : used while prescanning a basic block as a temporary cache entry. */
489 :
490 335443 : struct cse_vec_duplicate_match
491 : {
492 : basic_block bb;
493 : machine_mode widest_mode;
494 : rtx scalar;
495 : rtx_insn *first_insn;
496 : rtx_insn *widest_insn;
497 : auto_vec<rtx_insn *> related_dups;
498 :
499 335375 : cse_vec_duplicate_match (basic_block bb_, machine_mode widest_mode_,
500 : rtx scalar_, rtx_insn *first_insn_,
501 : rtx_insn *widest_insn_)
502 335375 : : bb (bb_), widest_mode (widest_mode_), scalar (scalar_),
503 335375 : first_insn (first_insn_), widest_insn (widest_insn_)
504 : {}
505 :
506 339195 : cse_vec_duplicate_match (const cse_vec_duplicate_match &other)
507 339195 : : bb (other.bb), widest_mode (other.widest_mode), scalar (other.scalar),
508 339195 : first_insn (other.first_insn), widest_insn (other.widest_insn)
509 : {
510 678390 : related_dups.reserve(other.related_dups.length ());
511 339195 : related_dups.splice(other.related_dups);
512 339195 : }
513 : };
514 :
515 : /* This data describes a block that will be processed by
516 : cse_extended_basic_block. */
517 :
518 2339740 : struct cse_basic_block_data
519 : {
520 : /* Total number of SETs in block. */
521 : int nsets;
522 : /* Size of current branch path, if any. */
523 : int path_size;
524 : /* Current path, indicating which basic_blocks will be processed. */
525 : struct branch_path *path;
526 : /* vec_duplicate sources seen in the current BB while prescanning. */
527 : auto_vec<cse_vec_duplicate_match, 8> vec_duplicate_cache;
528 : /* Syntactic vec_duplicate matches found in the same BB while prescanning. */
529 : auto_vec<cse_vec_duplicate_match, 8> vec_duplicate_matches;
530 : };
531 :
532 :
533 : /* Pointers to the live in/live out bitmaps for the boundaries of the
534 : current EBB. */
535 : static bitmap cse_ebb_live_in, cse_ebb_live_out;
536 :
537 : /* A simple bitmap to track which basic blocks have been visited
538 : already as part of an already processed extended basic block. */
539 : static sbitmap cse_visited_basic_blocks;
540 :
541 : static bool fixed_base_plus_p (rtx x);
542 : static int notreg_cost (rtx, machine_mode, enum rtx_code, int);
543 : static int preferable (int, int, int, int);
544 : static void new_basic_block (void);
545 : static void make_new_qty (unsigned int, machine_mode);
546 : static void make_regs_eqv (unsigned int, unsigned int);
547 : static void delete_reg_equiv (unsigned int);
548 : static bool mention_regs (rtx);
549 : static bool insert_regs (rtx, struct table_elt *, bool);
550 : static void remove_from_table (struct table_elt *, unsigned);
551 : static void remove_pseudo_from_table (rtx, unsigned);
552 : static struct table_elt *lookup (rtx, unsigned, machine_mode);
553 : static struct table_elt *lookup_for_remove (rtx, unsigned, machine_mode);
554 : static rtx lookup_as_function (rtx, enum rtx_code);
555 : static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
556 : machine_mode, int, int);
557 : static struct table_elt *insert (rtx, struct table_elt *, unsigned,
558 : machine_mode);
559 : static void merge_equiv_classes (struct table_elt *, struct table_elt *);
560 : static void invalidate (rtx, machine_mode);
561 : static void remove_invalid_refs (unsigned int);
562 : static void remove_invalid_subreg_refs (unsigned int, poly_uint64,
563 : machine_mode);
564 : static void rehash_using_reg (rtx);
565 : static void invalidate_memory (void);
566 : static rtx use_related_value (rtx, struct table_elt *);
567 :
568 : static inline unsigned canon_hash (rtx, machine_mode);
569 : static inline unsigned safe_hash (rtx, machine_mode);
570 : static inline unsigned hash_rtx_string (const char *);
571 :
572 : static rtx canon_reg (rtx, rtx_insn *);
573 : static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
574 : machine_mode *,
575 : machine_mode *);
576 : static rtx fold_rtx (rtx, rtx_insn *);
577 : static rtx equiv_constant (rtx);
578 : static void record_jump_equiv (rtx_insn *, bool);
579 : static void record_jump_cond (enum rtx_code, machine_mode, rtx, rtx);
580 : static void cse_insn (rtx_insn *);
581 : static void cse_prescan_cache_vec_dup (struct cse_basic_block_data *,
582 : basic_block, rtx_insn *, rtx);
583 : static void cse_prescan_path (struct cse_basic_block_data *);
584 : static void invalidate_from_clobbers (rtx_insn *);
585 : static void invalidate_from_sets_and_clobbers (rtx_insn *);
586 : static void cse_extended_basic_block (struct cse_basic_block_data *);
587 : extern void dump_class (struct table_elt*);
588 : static void get_cse_reg_info_1 (unsigned int regno);
589 : static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
590 :
591 : static void flush_hash_table (void);
592 : static bool insn_live_p (rtx_insn *, int *);
593 : static bool set_live_p (rtx, int *);
594 : static void cse_change_cc_mode_insn (rtx_insn *, rtx);
595 : static void cse_change_cc_mode_insns (rtx_insn *, rtx_insn *, rtx);
596 : static machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
597 : bool);
598 :
599 :
600 : #undef RTL_HOOKS_GEN_LOWPART
601 : #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
602 :
603 : static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
604 :
605 : /* Compute hash code of X in mode M. Special-case case where X is a pseudo
606 : register (hard registers may require `do_not_record' to be set). */
607 :
608 : static inline unsigned
609 856023850 : HASH (rtx x, machine_mode mode)
610 : {
611 556054796 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
612 1187287249 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
613 856023850 : : canon_hash (x, mode));
614 856023850 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
615 : }
616 :
617 : /* Like HASH, but without side-effects. */
618 :
619 : static inline unsigned
620 236467841 : SAFE_HASH (rtx x, machine_mode mode)
621 : {
622 118931710 : unsigned h = (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
623 303546636 : ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (x)))
624 236467841 : : safe_hash (x, mode));
625 236467841 : return (h ^ (h >> HASH_SHIFT)) & HASH_MASK;
626 : }
627 :
628 : /* Nonzero if X has the form (PLUS frame-pointer integer). */
629 :
630 : static bool
631 243142610 : fixed_base_plus_p (rtx x)
632 : {
633 275785037 : switch (GET_CODE (x))
634 : {
635 143669567 : case REG:
636 143669567 : if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
637 : return true;
638 129055298 : if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
639 118298 : return true;
640 : return false;
641 :
642 38957101 : case PLUS:
643 38957101 : if (!CONST_INT_P (XEXP (x, 1)))
644 : return false;
645 32642427 : return fixed_base_plus_p (XEXP (x, 0));
646 :
647 : default:
648 : return false;
649 : }
650 : }
651 :
652 : /* Dump the expressions in the equivalence class indicated by CLASSP.
653 : This function is used only for debugging. */
654 : DEBUG_FUNCTION void
655 0 : dump_class (struct table_elt *classp)
656 : {
657 0 : struct table_elt *elt;
658 :
659 0 : fprintf (stderr, "Equivalence chain for ");
660 0 : print_rtl (stderr, classp->exp);
661 0 : fprintf (stderr, ": \n");
662 :
663 0 : for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
664 : {
665 0 : print_rtl (stderr, elt->exp);
666 0 : fprintf (stderr, "\n");
667 : }
668 0 : }
669 :
670 : /* Return an estimate of the cost of the registers used in an rtx.
671 : This is mostly the number of different REG expressions in the rtx;
672 : however for some exceptions like fixed registers we use a cost of
673 : 0. If any other hard register reference occurs, return MAX_COST. */
674 :
675 : static int
676 443961707 : approx_reg_cost (const_rtx x)
677 : {
678 443961707 : int cost = 0;
679 443961707 : subrtx_iterator::array_type array;
680 1401619309 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
681 : {
682 1015147907 : const_rtx x = *iter;
683 1015147907 : if (REG_P (x))
684 : {
685 420765712 : unsigned int regno = REGNO (x);
686 420765712 : if (!CHEAP_REGNO (regno))
687 : {
688 57490305 : if (regno < FIRST_PSEUDO_REGISTER)
689 : {
690 57490305 : if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
691 57490305 : return MAX_COST;
692 0 : cost += 2;
693 : }
694 : else
695 299107991 : cost += 1;
696 : }
697 : }
698 : }
699 386471402 : return cost;
700 443961707 : }
701 :
702 : /* Return a negative value if an rtx A, whose costs are given by COST_A
703 : and REGCOST_A, is more desirable than an rtx B.
704 : Return a positive value if A is less desirable, or 0 if the two are
705 : equally good. */
706 : static int
707 673937643 : preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
708 : {
709 : /* First, get rid of cases involving expressions that are entirely
710 : unwanted. */
711 673937643 : if (cost_a != cost_b)
712 : {
713 630431396 : if (cost_a == MAX_COST)
714 : return 1;
715 629037040 : if (cost_b == MAX_COST)
716 : return -1;
717 : }
718 :
719 : /* Avoid extending lifetimes of hardregs. */
720 177091528 : if (regcost_a != regcost_b)
721 : {
722 96765744 : if (regcost_a == MAX_COST)
723 : return 1;
724 75005396 : if (regcost_b == MAX_COST)
725 : return -1;
726 : }
727 :
728 : /* Normal operation costs take precedence. */
729 153228851 : if (cost_a != cost_b)
730 109845537 : return cost_a - cost_b;
731 : /* Only if these are identical consider effects on register pressure. */
732 43383314 : if (regcost_a != regcost_b)
733 43383314 : return regcost_a - regcost_b;
734 : return 0;
735 : }
736 :
737 : /* Internal function, to compute cost when X is not a register; called
738 : from COST macro to keep it simple. */
739 :
740 : static int
741 312978560 : notreg_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno)
742 : {
743 312978560 : scalar_int_mode int_mode, inner_mode;
744 312978560 : return ((GET_CODE (x) == SUBREG
745 5548653 : && REG_P (SUBREG_REG (x))
746 315165836 : && is_int_mode (mode, &int_mode)
747 314264187 : && is_int_mode (GET_MODE (SUBREG_REG (x)), &inner_mode)
748 7767968 : && GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (inner_mode)
749 3833363 : && subreg_lowpart_p (x)
750 2598357 : && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, inner_mode))
751 312978560 : ? 0
752 310380203 : : rtx_cost (x, mode, outer, opno, optimize_this_for_speed_p) * 2);
753 : }
754 :
755 :
756 : /* Initialize CSE_REG_INFO_TABLE. */
757 :
758 : static void
759 2339740 : init_cse_reg_info (unsigned int nregs)
760 : {
761 : /* Do we need to grow the table? */
762 2339740 : if (nregs > cse_reg_info_table_size)
763 : {
764 179344 : unsigned int new_size;
765 :
766 179344 : if (cse_reg_info_table_size < 2048)
767 : {
768 : /* Compute a new size that is a power of 2 and no smaller
769 : than the large of NREGS and 64. */
770 179017 : new_size = (cse_reg_info_table_size
771 179017 : ? cse_reg_info_table_size : 64);
772 :
773 397853 : while (new_size < nregs)
774 218836 : new_size *= 2;
775 : }
776 : else
777 : {
778 : /* If we need a big table, allocate just enough to hold
779 : NREGS registers. */
780 : new_size = nregs;
781 : }
782 :
783 : /* Reallocate the table with NEW_SIZE entries. */
784 179344 : free (cse_reg_info_table);
785 179344 : cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
786 179344 : cse_reg_info_table_size = new_size;
787 179344 : cse_reg_info_table_first_uninitialized = 0;
788 : }
789 :
790 : /* Do we have all of the first NREGS entries initialized? */
791 2339740 : if (cse_reg_info_table_first_uninitialized < nregs)
792 : {
793 329633 : unsigned int old_timestamp = cse_reg_info_timestamp - 1;
794 329633 : unsigned int i;
795 :
796 : /* Put the old timestamp on newly allocated entries so that they
797 : will all be considered out of date. We do not touch those
798 : entries beyond the first NREGS entries to be nice to the
799 : virtual memory. */
800 33844552 : for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
801 33514919 : cse_reg_info_table[i].timestamp = old_timestamp;
802 :
803 329633 : cse_reg_info_table_first_uninitialized = nregs;
804 : }
805 2339740 : }
806 :
807 : /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
808 :
809 : static void
810 876155505 : get_cse_reg_info_1 (unsigned int regno)
811 : {
812 : /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
813 : entry will be considered to have been initialized. */
814 876155505 : cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
815 :
816 : /* Initialize the rest of the entry. */
817 876155505 : cse_reg_info_table[regno].reg_tick = 1;
818 876155505 : cse_reg_info_table[regno].reg_in_table = -1;
819 876155505 : cse_reg_info_table[regno].subreg_ticked = -1;
820 876155505 : cse_reg_info_table[regno].reg_qty = -regno - 1;
821 876155505 : }
822 :
823 : /* Find a cse_reg_info entry for REGNO. */
824 :
825 : static inline struct cse_reg_info *
826 11399537378 : get_cse_reg_info (unsigned int regno)
827 : {
828 11399537378 : struct cse_reg_info *p = &cse_reg_info_table[regno];
829 :
830 : /* If this entry has not been initialized, go ahead and initialize
831 : it. */
832 11399537378 : if (p->timestamp != cse_reg_info_timestamp)
833 876155505 : get_cse_reg_info_1 (regno);
834 :
835 11399537378 : return p;
836 : }
837 :
838 : /* Clear the hash table and initialize each register with its own quantity,
839 : for a new basic block. */
840 :
841 : static void
842 21118876 : new_basic_block (void)
843 : {
844 21118876 : int i;
845 :
846 21118876 : next_qty = 0;
847 :
848 : /* Invalidate cse_reg_info_table. */
849 21118876 : cse_reg_info_timestamp++;
850 :
851 : /* Clear out hash table state for this pass. */
852 21118876 : CLEAR_HARD_REG_SET (hard_regs_in_table);
853 :
854 : /* The per-quantity values used to be initialized here, but it is
855 : much faster to initialize each as it is made in `make_new_qty'. */
856 :
857 696922908 : for (i = 0; i < HASH_SIZE; i++)
858 : {
859 675804032 : struct table_elt *first;
860 :
861 675804032 : first = table[i];
862 675804032 : if (first != NULL)
863 : {
864 139492040 : struct table_elt *last = first;
865 :
866 139492040 : table[i] = NULL;
867 :
868 198144589 : while (last->next_same_hash != NULL)
869 : last = last->next_same_hash;
870 :
871 : /* Now relink this hash entire chain into
872 : the free element list. */
873 :
874 139492040 : last->next_same_hash = free_element_chain;
875 139492040 : free_element_chain = first;
876 : }
877 : }
878 21118876 : }
879 :
880 : /* Say that register REG contains a quantity in mode MODE not in any
881 : register before and initialize that quantity. */
882 :
883 : static void
884 106700340 : make_new_qty (unsigned int reg, machine_mode mode)
885 : {
886 106700340 : int q;
887 106700340 : struct qty_table_elem *ent;
888 106700340 : struct reg_eqv_elem *eqv;
889 :
890 106700340 : gcc_assert (next_qty < max_qty);
891 :
892 106700340 : q = REG_QTY (reg) = next_qty++;
893 106700340 : ent = &qty_table[q];
894 106700340 : ent->first_reg = reg;
895 106700340 : ent->last_reg = reg;
896 106700340 : ent->mode = mode;
897 106700340 : ent->const_rtx = ent->const_insn = NULL;
898 106700340 : ent->comparison_code = UNKNOWN;
899 :
900 106700340 : eqv = ®_eqv_table[reg];
901 106700340 : eqv->next = eqv->prev = -1;
902 106700340 : }
903 :
904 : /* Make reg NEW equivalent to reg OLD.
905 : OLD is not changing; NEW is. */
906 :
907 : static void
908 11803127 : make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
909 : {
910 11803127 : unsigned int lastr, firstr;
911 11803127 : int q = REG_QTY (old_reg);
912 11803127 : struct qty_table_elem *ent;
913 :
914 11803127 : ent = &qty_table[q];
915 :
916 : /* Nothing should become eqv until it has a "non-invalid" qty number. */
917 11803127 : gcc_assert (REGNO_QTY_VALID_P (old_reg));
918 :
919 11803127 : REG_QTY (new_reg) = q;
920 11803127 : firstr = ent->first_reg;
921 11803127 : lastr = ent->last_reg;
922 :
923 : /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
924 : hard regs. Among pseudos, if NEW will live longer than any other reg
925 : of the same qty, and that is beyond the current basic block,
926 : make it the new canonical replacement for this qty. */
927 317078 : if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
928 : /* Certain fixed registers might be of the class NO_REGS. This means
929 : that not only can they not be allocated by the compiler, but
930 : they cannot be used in substitutions or canonicalizations
931 : either. */
932 11486049 : && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
933 11808168 : && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
934 11481008 : || (new_reg >= FIRST_PSEUDO_REGISTER
935 11481008 : && (firstr < FIRST_PSEUDO_REGISTER
936 11481008 : || (bitmap_bit_p (cse_ebb_live_out, new_reg)
937 3662018 : && !bitmap_bit_p (cse_ebb_live_out, firstr))
938 9432382 : || (bitmap_bit_p (cse_ebb_live_in, new_reg)
939 495771 : && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
940 : {
941 2155921 : reg_eqv_table[firstr].prev = new_reg;
942 2155921 : reg_eqv_table[new_reg].next = firstr;
943 2155921 : reg_eqv_table[new_reg].prev = -1;
944 2155921 : ent->first_reg = new_reg;
945 : }
946 : else
947 : {
948 : /* If NEW is a hard reg (known to be non-fixed), insert at end.
949 : Otherwise, insert before any non-fixed hard regs that are at the
950 : end. Registers of class NO_REGS cannot be used as an
951 : equivalent for anything. */
952 298451 : while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
953 0 : && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
954 9647206 : && new_reg >= FIRST_PSEUDO_REGISTER)
955 0 : lastr = reg_eqv_table[lastr].prev;
956 9647206 : reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
957 9647206 : if (reg_eqv_table[lastr].next >= 0)
958 0 : reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
959 : else
960 9647206 : qty_table[q].last_reg = new_reg;
961 9647206 : reg_eqv_table[lastr].next = new_reg;
962 9647206 : reg_eqv_table[new_reg].prev = lastr;
963 : }
964 11803127 : }
965 :
966 : /* Remove REG from its equivalence class. */
967 :
968 : static void
969 1517525903 : delete_reg_equiv (unsigned int reg)
970 : {
971 1517525903 : struct qty_table_elem *ent;
972 1517525903 : int q = REG_QTY (reg);
973 1517525903 : int p, n;
974 :
975 : /* If invalid, do nothing. */
976 1517525903 : if (! REGNO_QTY_VALID_P (reg))
977 : return;
978 :
979 19043525 : ent = &qty_table[q];
980 :
981 19043525 : p = reg_eqv_table[reg].prev;
982 19043525 : n = reg_eqv_table[reg].next;
983 :
984 19043525 : if (n != -1)
985 668040 : reg_eqv_table[n].prev = p;
986 : else
987 18375485 : ent->last_reg = p;
988 19043525 : if (p != -1)
989 628090 : reg_eqv_table[p].next = n;
990 : else
991 18415435 : ent->first_reg = n;
992 :
993 19043525 : REG_QTY (reg) = -reg - 1;
994 : }
995 :
996 : /* Remove any invalid expressions from the hash table
997 : that refer to any of the registers contained in expression X.
998 :
999 : Make sure that newly inserted references to those registers
1000 : as subexpressions will be considered valid.
1001 :
1002 : mention_regs is not called when a register itself
1003 : is being stored in the table.
1004 :
1005 : Return true if we have done something that may have changed
1006 : the hash code of X. */
1007 :
1008 : static bool
1009 477356454 : mention_regs (rtx x)
1010 : {
1011 477356454 : enum rtx_code code;
1012 477356454 : int i, j;
1013 477356454 : const char *fmt;
1014 477356454 : bool changed = false;
1015 :
1016 477356454 : if (x == 0)
1017 : return false;
1018 :
1019 477356454 : code = GET_CODE (x);
1020 477356454 : if (code == REG)
1021 : {
1022 143826673 : unsigned int regno = REGNO (x);
1023 143826673 : unsigned int endregno = END_REGNO (x);
1024 143826673 : unsigned int i;
1025 :
1026 287653346 : for (i = regno; i < endregno; i++)
1027 : {
1028 143826673 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1029 169072 : remove_invalid_refs (i);
1030 :
1031 143826673 : REG_IN_TABLE (i) = REG_TICK (i);
1032 143826673 : SUBREG_TICKED (i) = -1;
1033 : }
1034 :
1035 : return false;
1036 : }
1037 :
1038 : /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1039 : pseudo if they don't use overlapping words. We handle only pseudos
1040 : here for simplicity. */
1041 8014764 : if (code == SUBREG && REG_P (SUBREG_REG (x))
1042 341526402 : && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1043 : {
1044 7996521 : unsigned int i = REGNO (SUBREG_REG (x));
1045 :
1046 7996521 : if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1047 : {
1048 : /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1049 : the last store to this register really stored into this
1050 : subreg, then remove the memory of this subreg.
1051 : Otherwise, remove any memory of the entire register and
1052 : all its subregs from the table. */
1053 341683 : if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1054 341683 : || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1055 341683 : remove_invalid_refs (i);
1056 : else
1057 0 : remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1058 : }
1059 :
1060 7996521 : REG_IN_TABLE (i) = REG_TICK (i);
1061 7996521 : SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1062 7996521 : return false;
1063 : }
1064 :
1065 : /* If X is a comparison or a COMPARE and either operand is a register
1066 : that does not have a quantity, give it one. This is so that a later
1067 : call to record_jump_equiv won't cause X to be assigned a different
1068 : hash code and not found in the table after that call.
1069 :
1070 : It is not necessary to do this here, since rehash_using_reg can
1071 : fix up the table later, but doing this here eliminates the need to
1072 : call that expensive function in the most common case where the only
1073 : use of the register is in the comparison. */
1074 :
1075 325533260 : if (code == COMPARE || COMPARISON_P (x))
1076 : {
1077 24078111 : if (REG_P (XEXP (x, 0))
1078 24078111 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1079 9008859 : if (insert_regs (XEXP (x, 0), NULL, false))
1080 : {
1081 9008859 : rehash_using_reg (XEXP (x, 0));
1082 9008859 : changed = true;
1083 : }
1084 :
1085 24078111 : if (REG_P (XEXP (x, 1))
1086 24078111 : && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1087 2456527 : if (insert_regs (XEXP (x, 1), NULL, false))
1088 : {
1089 2456527 : rehash_using_reg (XEXP (x, 1));
1090 2456527 : changed = true;
1091 : }
1092 : }
1093 :
1094 325533260 : fmt = GET_RTX_FORMAT (code);
1095 845646849 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1096 520113589 : if (fmt[i] == 'e')
1097 : {
1098 306756710 : if (mention_regs (XEXP (x, i)))
1099 520113589 : changed = true;
1100 : }
1101 213356879 : else if (fmt[i] == 'E')
1102 19137909 : for (j = 0; j < XVECLEN (x, i); j++)
1103 14478100 : if (mention_regs (XVECEXP (x, i, j)))
1104 358661 : changed = true;
1105 :
1106 : return changed;
1107 : }
1108 :
1109 : /* Update the register quantities for inserting X into the hash table
1110 : with a value equivalent to CLASSP.
1111 : (If the class does not contain a REG, it is irrelevant.)
1112 : If MODIFIED is true, X is a destination; it is being modified.
1113 : Note that delete_reg_equiv should be called on a register
1114 : before insert_regs is done on that register with MODIFIED != 0.
1115 :
1116 : True value means that elements of reg_qty have changed
1117 : so X's hash code may be different. */
1118 :
1119 : static bool
1120 257170067 : insert_regs (rtx x, struct table_elt *classp, bool modified)
1121 : {
1122 257170067 : if (REG_P (x))
1123 : {
1124 125078314 : unsigned int regno = REGNO (x);
1125 125078314 : int qty_valid;
1126 :
1127 : /* If REGNO is in the equivalence table already but is of the
1128 : wrong mode for that equivalence, don't do anything here. */
1129 :
1130 125078314 : qty_valid = REGNO_QTY_VALID_P (regno);
1131 125078314 : if (qty_valid)
1132 : {
1133 6574847 : struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1134 :
1135 6574847 : if (ent->mode != GET_MODE (x))
1136 : return false;
1137 : }
1138 :
1139 125078314 : if (modified || ! qty_valid)
1140 : {
1141 118503467 : if (classp)
1142 95957251 : for (classp = classp->first_same_value;
1143 189356665 : classp != 0;
1144 93399414 : classp = classp->next_same_value)
1145 105202541 : if (REG_P (classp->exp)
1146 11803127 : && GET_MODE (classp->exp) == GET_MODE (x))
1147 : {
1148 11803127 : unsigned c_regno = REGNO (classp->exp);
1149 :
1150 11803127 : gcc_assert (REGNO_QTY_VALID_P (c_regno));
1151 :
1152 : /* Suppose that 5 is hard reg and 100 and 101 are
1153 : pseudos. Consider
1154 :
1155 : (set (reg:si 100) (reg:si 5))
1156 : (set (reg:si 5) (reg:si 100))
1157 : (set (reg:di 101) (reg:di 5))
1158 :
1159 : We would now set REG_QTY (101) = REG_QTY (5), but the
1160 : entry for 5 is in SImode. When we use this later in
1161 : copy propagation, we get the register in wrong mode. */
1162 11803127 : if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1163 0 : continue;
1164 :
1165 11803127 : make_regs_eqv (regno, c_regno);
1166 11803127 : return true;
1167 : }
1168 :
1169 : /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1170 : than REG_IN_TABLE to find out if there was only a single preceding
1171 : invalidation - for the SUBREG - or another one, which would be
1172 : for the full register. However, if we find here that REG_TICK
1173 : indicates that the register is invalid, it means that it has
1174 : been invalidated in a separate operation. The SUBREG might be used
1175 : now (then this is a recursive call), or we might use the full REG
1176 : now and a SUBREG of it later. So bump up REG_TICK so that
1177 : mention_regs will do the right thing. */
1178 106700340 : if (! modified
1179 22759109 : && REG_IN_TABLE (regno) >= 0
1180 108845391 : && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1181 459 : REG_TICK (regno)++;
1182 106700340 : make_new_qty (regno, GET_MODE (x));
1183 106700340 : return true;
1184 : }
1185 :
1186 : return false;
1187 : }
1188 :
1189 : /* If X is a SUBREG, we will likely be inserting the inner register in the
1190 : table. If that register doesn't have an assigned quantity number at
1191 : this point but does later, the insertion that we will be doing now will
1192 : not be accessible because its hash code will have changed. So assign
1193 : a quantity number now. */
1194 :
1195 3502492 : else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1196 135578960 : && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1197 : {
1198 1678930 : insert_regs (SUBREG_REG (x), NULL, false);
1199 1678930 : mention_regs (x);
1200 1678930 : return true;
1201 : }
1202 : else
1203 130412823 : return mention_regs (x);
1204 : }
1205 :
1206 :
1207 : /* Compute upper and lower anchors for CST. Also compute the offset of CST
1208 : from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1209 : CST is equal to an anchor. */
1210 :
1211 : static bool
1212 0 : compute_const_anchors (rtx cst,
1213 : HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1214 : HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1215 : {
1216 0 : unsigned HOST_WIDE_INT n = UINTVAL (cst);
1217 :
1218 0 : *lower_base = n & ~(targetm.const_anchor - 1);
1219 0 : if ((unsigned HOST_WIDE_INT) *lower_base == n)
1220 : return false;
1221 :
1222 0 : *upper_base = ((n + (targetm.const_anchor - 1))
1223 0 : & ~(targetm.const_anchor - 1));
1224 0 : *upper_offs = n - *upper_base;
1225 0 : *lower_offs = n - *lower_base;
1226 0 : return true;
1227 : }
1228 :
1229 : /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1230 :
1231 : static void
1232 0 : insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1233 : machine_mode mode)
1234 : {
1235 0 : struct table_elt *elt;
1236 0 : unsigned hash;
1237 0 : rtx anchor_exp;
1238 0 : rtx exp;
1239 :
1240 0 : anchor_exp = gen_int_mode (anchor, mode);
1241 0 : hash = HASH (anchor_exp, mode);
1242 0 : elt = lookup (anchor_exp, hash, mode);
1243 0 : if (!elt)
1244 0 : elt = insert (anchor_exp, NULL, hash, mode);
1245 :
1246 0 : exp = plus_constant (mode, reg, offs);
1247 : /* REG has just been inserted and the hash codes recomputed. */
1248 0 : mention_regs (exp);
1249 0 : hash = HASH (exp, mode);
1250 :
1251 : /* Use the cost of the register rather than the whole expression. When
1252 : looking up constant anchors we will further offset the corresponding
1253 : expression therefore it does not make sense to prefer REGs over
1254 : reg-immediate additions. Prefer instead the oldest expression. Also
1255 : don't prefer pseudos over hard regs so that we derive constants in
1256 : argument registers from other argument registers rather than from the
1257 : original pseudo that was used to synthesize the constant. */
1258 0 : insert_with_costs (exp, elt, hash, mode, COST (reg, mode), 1);
1259 0 : }
1260 :
1261 : /* The constant CST is equivalent to the register REG. Create
1262 : equivalences between the two anchors of CST and the corresponding
1263 : register-offset expressions using REG. */
1264 :
1265 : static void
1266 0 : insert_const_anchors (rtx reg, rtx cst, machine_mode mode)
1267 : {
1268 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1269 :
1270 0 : if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1271 : &upper_base, &upper_offs))
1272 0 : return;
1273 :
1274 : /* Ignore anchors of value 0. Constants accessible from zero are
1275 : simple. */
1276 0 : if (lower_base != 0)
1277 0 : insert_const_anchor (lower_base, reg, -lower_offs, mode);
1278 :
1279 0 : if (upper_base != 0)
1280 0 : insert_const_anchor (upper_base, reg, -upper_offs, mode);
1281 : }
1282 :
1283 : /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1284 : ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1285 : valid expression. Return the cheapest and oldest of such expressions. In
1286 : *OLD, return how old the resulting expression is compared to the other
1287 : equivalent expressions. */
1288 :
1289 : static rtx
1290 0 : find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1291 : unsigned *old)
1292 : {
1293 0 : struct table_elt *elt;
1294 0 : unsigned idx;
1295 0 : struct table_elt *match_elt;
1296 0 : rtx match;
1297 :
1298 : /* Find the cheapest and *oldest* expression to maximize the chance of
1299 : reusing the same pseudo. */
1300 :
1301 0 : match_elt = NULL;
1302 0 : match = NULL_RTX;
1303 0 : for (elt = anchor_elt->first_same_value, idx = 0;
1304 0 : elt;
1305 0 : elt = elt->next_same_value, idx++)
1306 : {
1307 0 : if (match_elt && CHEAPER (match_elt, elt))
1308 : return match;
1309 :
1310 0 : if (REG_P (elt->exp)
1311 0 : || (GET_CODE (elt->exp) == PLUS
1312 0 : && REG_P (XEXP (elt->exp, 0))
1313 0 : && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1314 : {
1315 0 : rtx x;
1316 :
1317 : /* Ignore expressions that are no longer valid. */
1318 0 : if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1319 0 : continue;
1320 :
1321 0 : x = plus_constant (GET_MODE (elt->exp), elt->exp, offs);
1322 0 : if (REG_P (x)
1323 0 : || (GET_CODE (x) == PLUS
1324 0 : && IN_RANGE (INTVAL (XEXP (x, 1)),
1325 : -targetm.const_anchor,
1326 : targetm.const_anchor - 1)))
1327 : {
1328 0 : match = x;
1329 0 : match_elt = elt;
1330 0 : *old = idx;
1331 : }
1332 : }
1333 : }
1334 :
1335 : return match;
1336 : }
1337 :
1338 : /* Try to express the constant SRC_CONST using a register+offset expression
1339 : derived from a constant anchor. Return it if successful or NULL_RTX,
1340 : otherwise. */
1341 :
1342 : static rtx
1343 0 : try_const_anchors (rtx src_const, machine_mode mode)
1344 : {
1345 0 : struct table_elt *lower_elt, *upper_elt;
1346 0 : HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1347 0 : rtx lower_anchor_rtx, upper_anchor_rtx;
1348 0 : rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1349 0 : unsigned lower_old, upper_old;
1350 :
1351 : /* CONST_INT may be in various modes, avoid non-scalar-int mode. */
1352 0 : if (!SCALAR_INT_MODE_P (mode))
1353 : return NULL_RTX;
1354 :
1355 0 : if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1356 : &upper_base, &upper_offs))
1357 : return NULL_RTX;
1358 :
1359 0 : lower_anchor_rtx = GEN_INT (lower_base);
1360 0 : upper_anchor_rtx = GEN_INT (upper_base);
1361 0 : lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1362 0 : upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1363 :
1364 0 : if (lower_elt)
1365 0 : lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1366 0 : if (upper_elt)
1367 0 : upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1368 :
1369 0 : if (!lower_exp)
1370 : return upper_exp;
1371 0 : if (!upper_exp)
1372 : return lower_exp;
1373 :
1374 : /* Return the older expression. */
1375 0 : return (upper_old > lower_old ? upper_exp : lower_exp);
1376 : }
1377 :
1378 : /* Look in or update the hash table. */
1379 :
1380 : /* Remove table element ELT from use in the table.
1381 : HASH is its hash code, made using the HASH macro.
1382 : It's an argument because often that is known in advance
1383 : and we save much time not recomputing it. */
1384 :
1385 : static void
1386 69827862 : remove_from_table (struct table_elt *elt, unsigned int hash)
1387 : {
1388 69827862 : if (elt == 0)
1389 : return;
1390 :
1391 : /* Mark this element as removed. See cse_insn. */
1392 69827862 : elt->first_same_value = 0;
1393 :
1394 : /* Remove the table element from its equivalence class. */
1395 :
1396 69827862 : {
1397 69827862 : struct table_elt *prev = elt->prev_same_value;
1398 69827862 : struct table_elt *next = elt->next_same_value;
1399 :
1400 69827862 : if (next)
1401 7810425 : next->prev_same_value = prev;
1402 :
1403 69827862 : if (prev)
1404 45150165 : prev->next_same_value = next;
1405 : else
1406 : {
1407 : struct table_elt *newfirst = next;
1408 32032107 : while (next)
1409 : {
1410 7354410 : next->first_same_value = newfirst;
1411 7354410 : next = next->next_same_value;
1412 : }
1413 : }
1414 : }
1415 :
1416 : /* Remove the table element from its hash bucket. */
1417 :
1418 69827862 : {
1419 69827862 : struct table_elt *prev = elt->prev_same_hash;
1420 69827862 : struct table_elt *next = elt->next_same_hash;
1421 :
1422 69827862 : if (next)
1423 20588548 : next->prev_same_hash = prev;
1424 :
1425 69827862 : if (prev)
1426 8916369 : prev->next_same_hash = next;
1427 60911493 : else if (table[hash] == elt)
1428 60911483 : table[hash] = next;
1429 : else
1430 : {
1431 : /* This entry is not in the proper hash bucket. This can happen
1432 : when two classes were merged by `merge_equiv_classes'. Search
1433 : for the hash bucket that it heads. This happens only very
1434 : rarely, so the cost is acceptable. */
1435 330 : for (hash = 0; hash < HASH_SIZE; hash++)
1436 320 : if (table[hash] == elt)
1437 10 : table[hash] = next;
1438 : }
1439 : }
1440 :
1441 : /* Remove the table element from its related-value circular chain. */
1442 :
1443 69827862 : if (elt->related_value != 0 && elt->related_value != elt)
1444 : {
1445 : struct table_elt *p = elt->related_value;
1446 :
1447 116646 : while (p->related_value != elt)
1448 : p = p->related_value;
1449 31620 : p->related_value = elt->related_value;
1450 31620 : if (p->related_value == p)
1451 25764 : p->related_value = 0;
1452 : }
1453 :
1454 : /* Now add it to the free element chain. */
1455 69827862 : elt->next_same_hash = free_element_chain;
1456 69827862 : free_element_chain = elt;
1457 : }
1458 :
1459 : /* Same as above, but X is a pseudo-register. */
1460 :
1461 : static void
1462 93869422 : remove_pseudo_from_table (rtx x, unsigned int hash)
1463 : {
1464 93869422 : struct table_elt *elt;
1465 :
1466 : /* Because a pseudo-register can be referenced in more than one
1467 : mode, we might have to remove more than one table entry. */
1468 98237193 : while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1469 4367771 : remove_from_table (elt, hash);
1470 93869422 : }
1471 :
1472 : /* Look up X in the hash table and return its table element,
1473 : or 0 if X is not in the table.
1474 :
1475 : MODE is the machine-mode of X, or if X is an integer constant
1476 : with VOIDmode then MODE is the mode with which X will be used.
1477 :
1478 : Here we are satisfied to find an expression whose tree structure
1479 : looks like X. */
1480 :
1481 : static struct table_elt *
1482 504379741 : lookup (rtx x, unsigned int hash, machine_mode mode)
1483 : {
1484 504379741 : struct table_elt *p;
1485 :
1486 750738097 : for (p = table[hash]; p; p = p->next_same_hash)
1487 379362906 : if (mode == p->mode && ((x == p->exp && REG_P (x))
1488 148003204 : || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1489 : return p;
1490 :
1491 : return 0;
1492 : }
1493 :
1494 : /* Like `lookup' but don't care whether the table element uses invalid regs.
1495 : Also ignore discrepancies in the machine mode of a register. */
1496 :
1497 : static struct table_elt *
1498 98237193 : lookup_for_remove (rtx x, unsigned int hash, machine_mode mode)
1499 : {
1500 98237193 : struct table_elt *p;
1501 :
1502 98237193 : if (REG_P (x))
1503 : {
1504 98237193 : unsigned int regno = REGNO (x);
1505 :
1506 : /* Don't check the machine mode when comparing registers;
1507 : invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1508 178047362 : for (p = table[hash]; p; p = p->next_same_hash)
1509 84177940 : if (REG_P (p->exp)
1510 84177940 : && REGNO (p->exp) == regno)
1511 : return p;
1512 : }
1513 : else
1514 : {
1515 0 : for (p = table[hash]; p; p = p->next_same_hash)
1516 0 : if (mode == p->mode
1517 0 : && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1518 : return p;
1519 : }
1520 :
1521 : return 0;
1522 : }
1523 :
1524 : /* Look for an expression equivalent to X and with code CODE.
1525 : If one is found, return that expression. */
1526 :
1527 : static rtx
1528 62500824 : lookup_as_function (rtx x, enum rtx_code code)
1529 : {
1530 62500824 : struct table_elt *p
1531 62500824 : = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1532 :
1533 62500824 : if (p == 0)
1534 : return 0;
1535 :
1536 39186865 : for (p = p->first_same_value; p; p = p->next_same_value)
1537 27210919 : if (GET_CODE (p->exp) == code
1538 : /* Make sure this is a valid entry in the table. */
1539 27210919 : && exp_equiv_p (p->exp, p->exp, 1, false))
1540 832403 : return p->exp;
1541 :
1542 : return 0;
1543 : }
1544 :
1545 : /* Insert X in the hash table, assuming HASH is its hash code and
1546 : CLASSP is an element of the class it should go in (or 0 if a new
1547 : class should be made). COST is the code of X and reg_cost is the
1548 : cost of registers in X. It is inserted at the proper position to
1549 : keep the class in the order cheapest first.
1550 :
1551 : MODE is the machine-mode of X, or if X is an integer constant
1552 : with VOIDmode then MODE is the mode with which X will be used.
1553 :
1554 : For elements of equal cheapness, the most recent one
1555 : goes in front, except that the first element in the list
1556 : remains first unless a cheaper element is added. The order of
1557 : pseudo-registers does not matter, as canon_reg will be called to
1558 : find the cheapest when a register is retrieved from the table.
1559 :
1560 : The in_memory field in the hash table element is set to 0.
1561 : The caller must set it nonzero if appropriate.
1562 :
1563 : You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1564 : and if insert_regs returns a nonzero value
1565 : you must then recompute its hash code before calling here.
1566 :
1567 : If necessary, update table showing constant values of quantities. */
1568 :
1569 : static struct table_elt *
1570 268556460 : insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1571 : machine_mode mode, int cost, int reg_cost)
1572 : {
1573 268556460 : struct table_elt *elt;
1574 :
1575 : /* If X is a register and we haven't made a quantity for it,
1576 : something is wrong. */
1577 268556460 : gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1578 :
1579 : /* If X is a hard register, show it is being put in the table. */
1580 268556460 : if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1581 22344700 : add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1582 :
1583 : /* Put an element for X into the right hash bucket. */
1584 :
1585 268556460 : elt = free_element_chain;
1586 268556460 : if (elt)
1587 263388339 : free_element_chain = elt->next_same_hash;
1588 : else
1589 5168121 : elt = XNEW (struct table_elt);
1590 :
1591 268556460 : elt->exp = x;
1592 268556460 : elt->canon_exp = NULL_RTX;
1593 268556460 : elt->cost = cost;
1594 268556460 : elt->regcost = reg_cost;
1595 268556460 : elt->next_same_value = 0;
1596 268556460 : elt->prev_same_value = 0;
1597 268556460 : elt->next_same_hash = table[hash];
1598 268556460 : elt->prev_same_hash = 0;
1599 268556460 : elt->related_value = 0;
1600 268556460 : elt->in_memory = 0;
1601 268556460 : elt->mode = mode;
1602 268556460 : elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1603 :
1604 268556460 : if (table[hash])
1605 85019626 : table[hash]->prev_same_hash = elt;
1606 268556460 : table[hash] = elt;
1607 :
1608 : /* Put it into the proper value-class. */
1609 268556460 : if (classp)
1610 : {
1611 131402476 : classp = classp->first_same_value;
1612 131402476 : if (CHEAPER (elt, classp))
1613 : /* Insert at the head of the class. */
1614 : {
1615 61779453 : struct table_elt *p;
1616 61779453 : elt->next_same_value = classp;
1617 61779453 : classp->prev_same_value = elt;
1618 61779453 : elt->first_same_value = elt;
1619 :
1620 130500624 : for (p = classp; p; p = p->next_same_value)
1621 68721171 : p->first_same_value = elt;
1622 : }
1623 : else
1624 : {
1625 : /* Insert not at head of the class. */
1626 : /* Put it after the last element cheaper than X. */
1627 : struct table_elt *p, *next;
1628 :
1629 : for (p = classp;
1630 151917501 : (next = p->next_same_value) && CHEAPER (next, elt);
1631 : p = next)
1632 : ;
1633 :
1634 : /* Put it after P and before NEXT. */
1635 69623023 : elt->next_same_value = next;
1636 69623023 : if (next)
1637 17035215 : next->prev_same_value = elt;
1638 :
1639 69623023 : elt->prev_same_value = p;
1640 69623023 : p->next_same_value = elt;
1641 69623023 : elt->first_same_value = classp;
1642 : }
1643 : }
1644 : else
1645 137153984 : elt->first_same_value = elt;
1646 :
1647 : /* If this is a constant being set equivalent to a register or a register
1648 : being set equivalent to a constant, note the constant equivalence.
1649 :
1650 : If this is a constant, it cannot be equivalent to a different constant,
1651 : and a constant is the only thing that can be cheaper than a register. So
1652 : we know the register is the head of the class (before the constant was
1653 : inserted).
1654 :
1655 : If this is a register that is not already known equivalent to a
1656 : constant, we must check the entire class.
1657 :
1658 : If this is a register that is already known equivalent to an insn,
1659 : update the qtys `const_insn' to show that `this_insn' is the latest
1660 : insn making that quantity equivalent to the constant. */
1661 :
1662 268556460 : if (elt->is_const && classp && REG_P (classp->exp)
1663 3373486 : && !REG_P (x))
1664 : {
1665 3370720 : int exp_q = REG_QTY (REGNO (classp->exp));
1666 3370720 : struct qty_table_elem *exp_ent = &qty_table[exp_q];
1667 :
1668 3370720 : exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1669 3370720 : exp_ent->const_insn = this_insn;
1670 3370720 : }
1671 :
1672 265185740 : else if (REG_P (x)
1673 111933998 : && classp
1674 95966629 : && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1675 356473562 : && ! elt->is_const)
1676 : {
1677 : struct table_elt *p;
1678 :
1679 206114283 : for (p = classp; p != 0; p = p->next_same_value)
1680 : {
1681 129383773 : if (p->is_const && !REG_P (p->exp))
1682 : {
1683 14554485 : int x_q = REG_QTY (REGNO (x));
1684 14554485 : struct qty_table_elem *x_ent = &qty_table[x_q];
1685 :
1686 14554485 : x_ent->const_rtx
1687 14554485 : = gen_lowpart (GET_MODE (x), p->exp);
1688 14554485 : x_ent->const_insn = this_insn;
1689 14554485 : break;
1690 : }
1691 : }
1692 : }
1693 :
1694 173900745 : else if (REG_P (x)
1695 20649003 : && qty_table[REG_QTY (REGNO (x))].const_rtx
1696 178579553 : && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1697 4678808 : qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1698 :
1699 : /* If this is a constant with symbolic value,
1700 : and it has a term with an explicit integer value,
1701 : link it up with related expressions. */
1702 268556460 : if (GET_CODE (x) == CONST)
1703 : {
1704 845278 : rtx subexp = get_related_value (x);
1705 845278 : unsigned subhash;
1706 845278 : struct table_elt *subelt, *subelt_prev;
1707 :
1708 845278 : if (subexp != 0)
1709 : {
1710 : /* Get the integer-free subexpression in the hash table. */
1711 831380 : subhash = SAFE_HASH (subexp, mode);
1712 831380 : subelt = lookup (subexp, subhash, mode);
1713 831380 : if (subelt == 0)
1714 375744 : subelt = insert (subexp, NULL, subhash, mode);
1715 : /* Initialize SUBELT's circular chain if it has none. */
1716 831380 : if (subelt->related_value == 0)
1717 548775 : subelt->related_value = subelt;
1718 : /* Find the element in the circular chain that precedes SUBELT. */
1719 831380 : subelt_prev = subelt;
1720 2665671 : while (subelt_prev->related_value != subelt)
1721 : subelt_prev = subelt_prev->related_value;
1722 : /* Put new ELT into SUBELT's circular chain just before SUBELT.
1723 : This way the element that follows SUBELT is the oldest one. */
1724 831380 : elt->related_value = subelt_prev->related_value;
1725 831380 : subelt_prev->related_value = elt;
1726 : }
1727 : }
1728 :
1729 268556460 : return elt;
1730 : }
1731 :
1732 : /* Wrap insert_with_costs by passing the default costs. */
1733 :
1734 : static struct table_elt *
1735 268556460 : insert (rtx x, struct table_elt *classp, unsigned int hash,
1736 : machine_mode mode)
1737 : {
1738 537112920 : return insert_with_costs (x, classp, hash, mode,
1739 268556460 : COST (x, mode), approx_reg_cost (x));
1740 : }
1741 :
1742 :
1743 : /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1744 : CLASS2 into CLASS1. This is done when we have reached an insn which makes
1745 : the two classes equivalent.
1746 :
1747 : CLASS1 will be the surviving class; CLASS2 should not be used after this
1748 : call.
1749 :
1750 : Any invalid entries in CLASS2 will not be copied. */
1751 :
1752 : static void
1753 5343038 : merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1754 : {
1755 5343038 : struct table_elt *elt, *next, *new_elt;
1756 :
1757 : /* Ensure we start with the head of the classes. */
1758 5343038 : class1 = class1->first_same_value;
1759 5343038 : class2 = class2->first_same_value;
1760 :
1761 : /* If they were already equal, forget it. */
1762 5343038 : if (class1 == class2)
1763 : return;
1764 :
1765 12743325 : for (elt = class2; elt; elt = next)
1766 : {
1767 7400287 : unsigned int hash;
1768 7400287 : rtx exp = elt->exp;
1769 7400287 : machine_mode mode = elt->mode;
1770 :
1771 7400287 : next = elt->next_same_value;
1772 :
1773 : /* Remove old entry, make a new one in CLASS1's class.
1774 : Don't do this for invalid entries as we cannot find their
1775 : hash code (it also isn't necessary). */
1776 7400287 : if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1777 : {
1778 7400263 : bool need_rehash = false;
1779 :
1780 7400263 : hash_arg_in_memory = 0;
1781 7400263 : hash = HASH (exp, mode);
1782 :
1783 7400263 : if (REG_P (exp))
1784 : {
1785 2002794 : need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1786 2002794 : delete_reg_equiv (REGNO (exp));
1787 : }
1788 :
1789 7400263 : if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1790 2001651 : remove_pseudo_from_table (exp, hash);
1791 : else
1792 5398612 : remove_from_table (elt, hash);
1793 :
1794 7400263 : if (insert_regs (exp, class1, false) || need_rehash)
1795 : {
1796 2002794 : rehash_using_reg (exp);
1797 2002794 : hash = HASH (exp, mode);
1798 : }
1799 7400263 : new_elt = insert (exp, class1, hash, mode);
1800 7400263 : new_elt->in_memory = hash_arg_in_memory;
1801 7400263 : if (GET_CODE (exp) == ASM_OPERANDS && elt->cost == MAX_COST)
1802 0 : new_elt->cost = MAX_COST;
1803 : }
1804 : }
1805 : }
1806 :
1807 : /* Flush the entire hash table. */
1808 :
1809 : static void
1810 8131 : flush_hash_table (void)
1811 : {
1812 8131 : int i;
1813 8131 : struct table_elt *p;
1814 :
1815 268323 : for (i = 0; i < HASH_SIZE; i++)
1816 1032136 : for (p = table[i]; p; p = table[i])
1817 : {
1818 : /* Note that invalidate can remove elements
1819 : after P in the current hash chain. */
1820 771944 : if (REG_P (p->exp))
1821 337921 : invalidate (p->exp, VOIDmode);
1822 : else
1823 434023 : remove_from_table (p, i);
1824 : }
1825 8131 : }
1826 :
1827 : /* Check whether an anti dependence exists between X and EXP. MODE and
1828 : ADDR are as for canon_anti_dependence. */
1829 :
1830 : static bool
1831 184491902 : check_dependence (const_rtx x, rtx exp, machine_mode mode, rtx addr)
1832 : {
1833 184491902 : subrtx_iterator::array_type array;
1834 870211081 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
1835 : {
1836 694138100 : const_rtx x = *iter;
1837 694138100 : if (MEM_P (x) && canon_anti_dependence (x, true, exp, mode, addr))
1838 8418921 : return true;
1839 : }
1840 176072981 : return false;
1841 184491902 : }
1842 :
1843 : /* Remove from the hash table, or mark as invalid, all expressions whose
1844 : values could be altered by storing in register X. */
1845 :
1846 : static void
1847 224045497 : invalidate_reg (rtx x)
1848 : {
1849 224045497 : gcc_assert (GET_CODE (x) == REG);
1850 :
1851 : /* If X is a register, dependencies on its contents are recorded
1852 : through the qty number mechanism. Just change the qty number of
1853 : the register, mark it as invalid for expressions that refer to it,
1854 : and remove it itself. */
1855 224045497 : unsigned int regno = REGNO (x);
1856 224045497 : unsigned int hash = HASH (x, GET_MODE (x));
1857 :
1858 : /* Remove REGNO from any quantity list it might be on and indicate
1859 : that its value might have changed. If it is a pseudo, remove its
1860 : entry from the hash table.
1861 :
1862 : For a hard register, we do the first two actions above for any
1863 : additional hard registers corresponding to X. Then, if any of these
1864 : registers are in the table, we must remove any REG entries that
1865 : overlap these registers. */
1866 :
1867 224045497 : delete_reg_equiv (regno);
1868 224045497 : REG_TICK (regno)++;
1869 224045497 : SUBREG_TICKED (regno) = -1;
1870 :
1871 224045497 : if (regno >= FIRST_PSEUDO_REGISTER)
1872 91867771 : remove_pseudo_from_table (x, hash);
1873 : else
1874 : {
1875 132177726 : HOST_WIDE_INT in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1876 132177726 : unsigned int endregno = END_REGNO (x);
1877 132177726 : unsigned int rn;
1878 132177726 : struct table_elt *p, *next;
1879 :
1880 132177726 : CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1881 :
1882 132779474 : for (rn = regno + 1; rn < endregno; rn++)
1883 : {
1884 601748 : in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1885 601748 : CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1886 601748 : delete_reg_equiv (rn);
1887 601748 : REG_TICK (rn)++;
1888 601748 : SUBREG_TICKED (rn) = -1;
1889 : }
1890 :
1891 132177726 : if (in_table)
1892 415922760 : for (hash = 0; hash < HASH_SIZE; hash++)
1893 650218462 : for (p = table[hash]; p; p = next)
1894 : {
1895 246899422 : next = p->next_same_hash;
1896 :
1897 246899422 : if (!REG_P (p->exp) || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1898 235923189 : continue;
1899 :
1900 10976233 : unsigned int tregno = REGNO (p->exp);
1901 10976233 : unsigned int tendregno = END_REGNO (p->exp);
1902 10976233 : if (tendregno > regno && tregno < endregno)
1903 10902800 : remove_from_table (p, hash);
1904 : }
1905 : }
1906 224045497 : }
1907 :
1908 : /* Remove from the hash table, or mark as invalid, all expressions whose
1909 : values could be altered by storing in X. X is a register, a subreg, or
1910 : a memory reference with nonvarying address (because, when a memory
1911 : reference with a varying address is stored in, all memory references are
1912 : removed by invalidate_memory so specific invalidation is superfluous).
1913 : FULL_MODE, if not VOIDmode, indicates that this much should be
1914 : invalidated instead of just the amount indicated by the mode of X. This
1915 : is only used for bitfield stores into memory.
1916 :
1917 : A nonvarying address may be just a register or just a symbol reference,
1918 : or it may be either of those plus a numeric offset. */
1919 :
1920 : static void
1921 253222265 : invalidate (rtx x, machine_mode full_mode)
1922 : {
1923 254917167 : int i;
1924 254917167 : struct table_elt *p;
1925 254917167 : rtx addr;
1926 :
1927 254917167 : switch (GET_CODE (x))
1928 : {
1929 224045307 : case REG:
1930 224045307 : invalidate_reg (x);
1931 224045307 : return;
1932 :
1933 1648801 : case SUBREG:
1934 1648801 : invalidate (SUBREG_REG (x), VOIDmode);
1935 1648801 : return;
1936 :
1937 26615 : case PARALLEL:
1938 72716 : for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1939 46101 : invalidate (XVECEXP (x, 0, i), VOIDmode);
1940 : return;
1941 :
1942 46101 : case EXPR_LIST:
1943 : /* This is part of a disjoint return value; extract the location in
1944 : question ignoring the offset. */
1945 46101 : invalidate (XEXP (x, 0), VOIDmode);
1946 46101 : return;
1947 :
1948 29150343 : case MEM:
1949 29150343 : addr = canon_rtx (get_addr (XEXP (x, 0)));
1950 : /* Calculate the canonical version of X here so that
1951 : true_dependence doesn't generate new RTL for X on each call. */
1952 29150343 : x = canon_rtx (x);
1953 :
1954 : /* Remove all hash table elements that refer to overlapping pieces of
1955 : memory. */
1956 29150343 : if (full_mode == VOIDmode)
1957 29149391 : full_mode = GET_MODE (x);
1958 :
1959 961961319 : for (i = 0; i < HASH_SIZE; i++)
1960 : {
1961 932810976 : struct table_elt *next;
1962 :
1963 1887772804 : for (p = table[i]; p; p = next)
1964 : {
1965 954961828 : next = p->next_same_hash;
1966 954961828 : if (p->in_memory)
1967 : {
1968 : /* Just canonicalize the expression once;
1969 : otherwise each time we call invalidate
1970 : true_dependence will canonicalize the
1971 : expression again. */
1972 184491902 : if (!p->canon_exp)
1973 27477850 : p->canon_exp = canon_rtx (p->exp);
1974 184491902 : if (check_dependence (p->canon_exp, x, full_mode, addr))
1975 8418921 : remove_from_table (p, i);
1976 : }
1977 : }
1978 : }
1979 : return;
1980 :
1981 0 : default:
1982 0 : gcc_unreachable ();
1983 : }
1984 : }
1985 :
1986 : /* Invalidate DEST. Used when DEST is not going to be added
1987 : into the hash table for some reason, e.g. do_not_record
1988 : flagged on it. */
1989 :
1990 : static void
1991 56162787 : invalidate_dest (rtx dest)
1992 : {
1993 56162787 : if (REG_P (dest)
1994 27032059 : || GET_CODE (dest) == SUBREG
1995 27032059 : || MEM_P (dest))
1996 35753883 : invalidate (dest, VOIDmode);
1997 20408904 : else if (GET_CODE (dest) == STRICT_LOW_PART
1998 20408904 : || GET_CODE (dest) == ZERO_EXTRACT)
1999 960 : invalidate (XEXP (dest, 0), GET_MODE (dest));
2000 56162787 : }
2001 :
2002 : /* Remove all expressions that refer to register REGNO,
2003 : since they are already invalid, and we are about to
2004 : mark that register valid again and don't want the old
2005 : expressions to reappear as valid. */
2006 :
2007 : static void
2008 13342178 : remove_invalid_refs (unsigned int regno)
2009 : {
2010 13342178 : unsigned int i;
2011 13342178 : struct table_elt *p, *next;
2012 :
2013 440291874 : for (i = 0; i < HASH_SIZE; i++)
2014 679503931 : for (p = table[i]; p; p = next)
2015 : {
2016 252554235 : next = p->next_same_hash;
2017 252554235 : if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp))
2018 17342774 : remove_from_table (p, i);
2019 : }
2020 13342178 : }
2021 :
2022 : /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2023 : and mode MODE. */
2024 : static void
2025 0 : remove_invalid_subreg_refs (unsigned int regno, poly_uint64 offset,
2026 : machine_mode mode)
2027 : {
2028 0 : unsigned int i;
2029 0 : struct table_elt *p, *next;
2030 :
2031 0 : for (i = 0; i < HASH_SIZE; i++)
2032 0 : for (p = table[i]; p; p = next)
2033 : {
2034 0 : rtx exp = p->exp;
2035 0 : next = p->next_same_hash;
2036 :
2037 0 : if (!REG_P (exp)
2038 0 : && (GET_CODE (exp) != SUBREG
2039 0 : || !REG_P (SUBREG_REG (exp))
2040 0 : || REGNO (SUBREG_REG (exp)) != regno
2041 0 : || ranges_maybe_overlap_p (SUBREG_BYTE (exp),
2042 0 : GET_MODE_SIZE (GET_MODE (exp)),
2043 0 : offset, GET_MODE_SIZE (mode)))
2044 0 : && refers_to_regno_p (regno, p->exp))
2045 0 : remove_from_table (p, i);
2046 : }
2047 0 : }
2048 :
2049 : /* Recompute the hash codes of any valid entries in the hash table that
2050 : reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2051 :
2052 : This is called when we make a jump equivalence. */
2053 :
2054 : static void
2055 128295439 : rehash_using_reg (rtx x)
2056 : {
2057 128295439 : unsigned int i;
2058 128295439 : struct table_elt *p, *next;
2059 128295439 : unsigned hash;
2060 :
2061 128295439 : if (GET_CODE (x) == SUBREG)
2062 1678930 : x = SUBREG_REG (x);
2063 :
2064 : /* If X is not a register or if the register is known not to be in any
2065 : valid entries in the table, we have no work to do. */
2066 :
2067 128295439 : if (!REG_P (x)
2068 118503467 : || REG_IN_TABLE (REGNO (x)) < 0
2069 133367664 : || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2070 : return;
2071 :
2072 : /* Scan all hash chains looking for valid entries that mention X.
2073 : If we find one and it is in the wrong hash chain, move it. */
2074 :
2075 167365836 : for (i = 0; i < HASH_SIZE; i++)
2076 276093612 : for (p = table[i]; p; p = next)
2077 : {
2078 113799468 : next = p->next_same_hash;
2079 113799468 : if (reg_mentioned_p (x, p->exp)
2080 4899583 : && exp_equiv_p (p->exp, p->exp, 1, false)
2081 118698886 : && i != (hash = SAFE_HASH (p->exp, p->mode)))
2082 : {
2083 3482050 : if (p->next_same_hash)
2084 1119297 : p->next_same_hash->prev_same_hash = p->prev_same_hash;
2085 :
2086 3482050 : if (p->prev_same_hash)
2087 643399 : p->prev_same_hash->next_same_hash = p->next_same_hash;
2088 : else
2089 2838651 : table[i] = p->next_same_hash;
2090 :
2091 3482050 : p->next_same_hash = table[hash];
2092 3482050 : p->prev_same_hash = 0;
2093 3482050 : if (table[hash])
2094 1664287 : table[hash]->prev_same_hash = p;
2095 3482050 : table[hash] = p;
2096 : }
2097 : }
2098 : }
2099 :
2100 : /* Remove from the hash table any expression that is a call-clobbered
2101 : register in INSN. Also update their TICK values. */
2102 :
2103 : static void
2104 15784702 : invalidate_for_call (rtx_insn *insn)
2105 : {
2106 15784702 : unsigned int regno;
2107 15784702 : unsigned hash;
2108 15784702 : struct table_elt *p, *next;
2109 15784702 : int in_table = 0;
2110 15784702 : hard_reg_set_iterator hrsi;
2111 :
2112 : /* Go through all the hard registers. For each that might be clobbered
2113 : in call insn INSN, remove the register from quantity chains and update
2114 : reg_tick if defined. Also see if any of these registers is currently
2115 : in the table.
2116 :
2117 : ??? We could be more precise for partially-clobbered registers,
2118 : and only invalidate values that actually occupy the clobbered part
2119 : of the registers. It doesn't seem worth the effort though, since
2120 : we shouldn't see this situation much before RA. Whatever choice
2121 : we make here has to be consistent with the table walk below,
2122 : so any change to this test will require a change there too. */
2123 15784702 : HARD_REG_SET callee_clobbers
2124 15784702 : = insn_callee_abi (insn).full_and_partial_reg_clobbers ();
2125 1306660566 : EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi)
2126 : {
2127 1290875864 : delete_reg_equiv (regno);
2128 1290875864 : if (REG_TICK (regno) >= 0)
2129 : {
2130 1290875864 : REG_TICK (regno)++;
2131 1290875864 : SUBREG_TICKED (regno) = -1;
2132 : }
2133 1290875864 : in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2134 : }
2135 :
2136 : /* In the case where we have no call-clobbered hard registers in the
2137 : table, we are done. Otherwise, scan the table and remove any
2138 : entry that overlaps a call-clobbered register. */
2139 :
2140 15784702 : if (in_table)
2141 120130527 : for (hash = 0; hash < HASH_SIZE; hash++)
2142 174601379 : for (p = table[hash]; p; p = next)
2143 : {
2144 58111171 : next = p->next_same_hash;
2145 :
2146 113102502 : if (!REG_P (p->exp)
2147 58111171 : || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2148 54991331 : continue;
2149 :
2150 : /* This must use the same test as above rather than the
2151 : more accurate clobbers_reg_p. */
2152 3119840 : if (overlaps_hard_reg_set_p (callee_clobbers, GET_MODE (p->exp),
2153 3119840 : REGNO (p->exp)))
2154 3099177 : remove_from_table (p, hash);
2155 : }
2156 15784702 : }
2157 :
2158 : /* Given an expression X of type CONST,
2159 : and ELT which is its table entry (or 0 if it
2160 : is not in the hash table),
2161 : return an alternate expression for X as a register plus integer.
2162 : If none can be found, return 0. */
2163 :
2164 : static rtx
2165 736161 : use_related_value (rtx x, struct table_elt *elt)
2166 : {
2167 736161 : struct table_elt *relt = 0;
2168 736161 : struct table_elt *p, *q;
2169 736161 : HOST_WIDE_INT offset;
2170 :
2171 : /* First, is there anything related known?
2172 : If we have a table element, we can tell from that.
2173 : Otherwise, must look it up. */
2174 :
2175 736161 : if (elt != 0 && elt->related_value != 0)
2176 : relt = elt;
2177 563116 : else if (elt == 0 && GET_CODE (x) == CONST)
2178 : {
2179 563116 : rtx subexp = get_related_value (x);
2180 563116 : if (subexp != 0)
2181 549218 : relt = lookup (subexp,
2182 : SAFE_HASH (subexp, GET_MODE (subexp)),
2183 549218 : GET_MODE (subexp));
2184 : }
2185 :
2186 677683 : if (relt == 0)
2187 : return 0;
2188 :
2189 : /* Search all related table entries for one that has an
2190 : equivalent register. */
2191 :
2192 : p = relt;
2193 884659 : while (1)
2194 : {
2195 : /* This loop is strange in that it is executed in two different cases.
2196 : The first is when X is already in the table. Then it is searching
2197 : the RELATED_VALUE list of X's class (RELT). The second case is when
2198 : X is not in the table. Then RELT points to a class for the related
2199 : value.
2200 :
2201 : Ensure that, whatever case we are in, that we ignore classes that have
2202 : the same value as X. */
2203 :
2204 884659 : if (rtx_equal_p (x, p->exp))
2205 : q = 0;
2206 : else
2207 1737807 : for (q = p->first_same_value; q; q = q->next_same_value)
2208 1206195 : if (REG_P (q->exp))
2209 : break;
2210 :
2211 756194 : if (q)
2212 : break;
2213 :
2214 660077 : p = p->related_value;
2215 :
2216 : /* We went all the way around, so there is nothing to be found.
2217 : Alternatively, perhaps RELT was in the table for some other reason
2218 : and it has no related values recorded. */
2219 660077 : if (p == relt || p == 0)
2220 : break;
2221 : }
2222 :
2223 332398 : if (q == 0)
2224 : return 0;
2225 :
2226 224582 : offset = (get_integer_term (x) - get_integer_term (p->exp));
2227 : /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2228 224582 : return plus_constant (q->mode, q->exp, offset);
2229 : }
2230 :
2231 :
2232 : /* Hash a string. Just add its bytes up. */
2233 : static inline unsigned
2234 131375 : hash_rtx_string (const char *ps)
2235 : {
2236 131375 : unsigned hash = 0;
2237 131375 : const unsigned char *p = (const unsigned char *) ps;
2238 :
2239 131375 : if (p)
2240 749855 : while (*p)
2241 618480 : hash += *p++;
2242 :
2243 131375 : return hash;
2244 : }
2245 :
2246 : /* Hash an rtx. We are careful to make sure the value is never negative.
2247 : Equivalent registers hash identically.
2248 : MODE is used in hashing for CONST_INTs only;
2249 : otherwise the mode of X is used.
2250 :
2251 : Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2252 :
2253 : If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2254 : a MEM rtx which does not have the MEM_READONLY_P flag set.
2255 :
2256 : Note that cse_insn knows that the hash code of a MEM expression
2257 : is just (int) MEM plus the hash code of the address.
2258 :
2259 : Call CB on each rtx if CB is not NULL.
2260 : When the callback returns true, we continue with the new rtx. */
2261 :
2262 : unsigned
2263 1306312814 : hash_rtx (const_rtx x, machine_mode mode,
2264 : int *do_not_record_p, int *hash_arg_in_memory_p,
2265 : bool have_reg_qty, hash_rtx_callback_function cb)
2266 : {
2267 1306312814 : int i, j;
2268 1306312814 : unsigned hash = 0;
2269 1927119298 : enum rtx_code code;
2270 1927119298 : const char *fmt;
2271 1927119298 : machine_mode newmode;
2272 1927119298 : rtx newx;
2273 :
2274 : /* Used to turn recursion into iteration. We can't rely on GCC's
2275 : tail-recursion elimination since we need to keep accumulating values
2276 : in HASH. */
2277 620806484 : repeat:
2278 1927119298 : if (x == 0)
2279 : return hash;
2280 :
2281 : /* Invoke the callback first. */
2282 1927119298 : if (cb != NULL
2283 1927119298 : && ((*cb) (x, mode, &newx, &newmode)))
2284 : {
2285 0 : hash += hash_rtx (newx, newmode, do_not_record_p,
2286 : hash_arg_in_memory_p, have_reg_qty, cb);
2287 0 : return hash;
2288 : }
2289 :
2290 1927119298 : code = GET_CODE (x);
2291 1927119298 : switch (code)
2292 : {
2293 671193679 : case REG:
2294 671193679 : {
2295 671193679 : unsigned int regno = REGNO (x);
2296 :
2297 671193679 : if (do_not_record_p && !reload_completed)
2298 : {
2299 : /* On some machines, we can't record any non-fixed hard register,
2300 : because extending its life will cause reload problems. We
2301 : consider ap, fp, sp, gp to be fixed for this purpose.
2302 :
2303 : We also consider CCmode registers to be fixed for this purpose;
2304 : failure to do so leads to failure to simplify 0<100 type of
2305 : conditionals.
2306 :
2307 : On all machines, we can't record any global registers.
2308 : Nor should we record any register that is in a small
2309 : class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2310 667645114 : bool record;
2311 :
2312 667645114 : if (regno >= FIRST_PSEUDO_REGISTER)
2313 : record = true;
2314 443667333 : else if (x == frame_pointer_rtx
2315 308593369 : || x == hard_frame_pointer_rtx
2316 308476424 : || x == arg_pointer_rtx
2317 300755735 : || x == stack_pointer_rtx
2318 265323505 : || x == pic_offset_table_rtx)
2319 : record = true;
2320 265323505 : else if (global_regs[regno])
2321 : record = false;
2322 265323134 : else if (fixed_regs[regno])
2323 : record = true;
2324 78559426 : else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2325 : record = true;
2326 78559426 : else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2327 : record = false;
2328 0 : else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2329 : record = false;
2330 : else
2331 : record = true;
2332 :
2333 : if (!record)
2334 : {
2335 78559797 : *do_not_record_p = 1;
2336 78559797 : return 0;
2337 : }
2338 : }
2339 :
2340 592633882 : hash += ((unsigned int) REG << 7);
2341 592633882 : hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2342 592633882 : return hash;
2343 : }
2344 :
2345 : /* We handle SUBREG of a REG specially because the underlying
2346 : reg changes its hash value with every value change; we don't
2347 : want to have to forget unrelated subregs when one subreg changes. */
2348 37598752 : case SUBREG:
2349 37598752 : {
2350 37598752 : if (REG_P (SUBREG_REG (x)))
2351 : {
2352 75068662 : hash += (((unsigned int) SUBREG << 7)
2353 37534331 : + REGNO (SUBREG_REG (x))
2354 37534331 : + (constant_lower_bound (SUBREG_BYTE (x))
2355 37534331 : / UNITS_PER_WORD));
2356 37534331 : return hash;
2357 : }
2358 : break;
2359 : }
2360 :
2361 348093745 : case CONST_INT:
2362 348093745 : hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2363 348093745 : + (unsigned int) INTVAL (x));
2364 348093745 : return hash;
2365 :
2366 : case CONST_WIDE_INT:
2367 3031746 : for (i = 0; i < CONST_WIDE_INT_NUNITS (x); i++)
2368 2021328 : hash += CONST_WIDE_INT_ELT (x, i);
2369 : return hash;
2370 :
2371 0 : case CONST_POLY_INT:
2372 0 : {
2373 0 : inchash::hash h;
2374 0 : h.add_int (hash);
2375 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
2376 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
2377 0 : return h.end ();
2378 : }
2379 :
2380 4419309 : case CONST_DOUBLE:
2381 : /* This is like the general case, except that it only counts
2382 : the integers representing the constant. */
2383 4419309 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2384 4419309 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (x) == VOIDmode)
2385 : hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2386 : + (unsigned int) CONST_DOUBLE_HIGH (x));
2387 : else
2388 4419309 : hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2389 4419309 : return hash;
2390 :
2391 0 : case CONST_FIXED:
2392 0 : hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2393 0 : hash += fixed_hash (CONST_FIXED_VALUE (x));
2394 0 : return hash;
2395 :
2396 3894204 : case CONST_VECTOR:
2397 3894204 : {
2398 3894204 : int units;
2399 3894204 : rtx elt;
2400 :
2401 3894204 : units = const_vector_encoded_nelts (x);
2402 :
2403 10529168 : for (i = 0; i < units; ++i)
2404 : {
2405 6634964 : elt = CONST_VECTOR_ENCODED_ELT (x, i);
2406 6634964 : hash += hash_rtx (elt, GET_MODE (elt),
2407 : do_not_record_p, hash_arg_in_memory_p,
2408 : have_reg_qty, cb);
2409 : }
2410 :
2411 : return hash;
2412 : }
2413 :
2414 : /* Assume there is only one rtx object for any given label. */
2415 20636461 : case LABEL_REF:
2416 : /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2417 : differences and differences between each stage's debugging dumps. */
2418 20636461 : hash += (((unsigned int) LABEL_REF << 7)
2419 20636461 : + CODE_LABEL_NUMBER (label_ref_label (x)));
2420 20636461 : return hash;
2421 :
2422 155041286 : case SYMBOL_REF:
2423 155041286 : {
2424 : /* Don't hash on the symbol's address to avoid bootstrap differences.
2425 : Different hash values may cause expressions to be recorded in
2426 : different orders and thus different registers to be used in the
2427 : final assembler. This also avoids differences in the dump files
2428 : between various stages. */
2429 155041286 : unsigned int h = 0;
2430 155041286 : const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2431 :
2432 3441009236 : while (*p)
2433 3285967950 : h += (h << 7) + *p++; /* ??? revisit */
2434 :
2435 155041286 : hash += ((unsigned int) SYMBOL_REF << 7) + h;
2436 155041286 : return hash;
2437 : }
2438 :
2439 270941259 : case MEM:
2440 : /* We don't record if marked volatile or if BLKmode since we don't
2441 : know the size of the move. */
2442 270941259 : if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2443 : {
2444 5222769 : *do_not_record_p = 1;
2445 5222769 : return 0;
2446 : }
2447 265718490 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2448 60595660 : *hash_arg_in_memory_p = 1;
2449 :
2450 : /* Now that we have already found this special case,
2451 : might as well speed it up as much as possible. */
2452 265718490 : hash += (unsigned) MEM;
2453 265718490 : x = XEXP (x, 0);
2454 265718490 : goto repeat;
2455 :
2456 70 : case USE:
2457 : /* A USE that mentions non-volatile memory needs special
2458 : handling since the MEM may be BLKmode which normally
2459 : prevents an entry from being made. Pure calls are
2460 : marked by a USE which mentions BLKmode memory.
2461 : See calls.cc:emit_call_1. */
2462 70 : if (MEM_P (XEXP (x, 0))
2463 70 : && ! MEM_VOLATILE_P (XEXP (x, 0)))
2464 : {
2465 0 : hash += (unsigned) USE;
2466 0 : x = XEXP (x, 0);
2467 :
2468 0 : if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2469 0 : *hash_arg_in_memory_p = 1;
2470 :
2471 : /* Now that we have already found this special case,
2472 : might as well speed it up as much as possible. */
2473 0 : hash += (unsigned) MEM;
2474 0 : x = XEXP (x, 0);
2475 0 : goto repeat;
2476 : }
2477 : break;
2478 :
2479 52507133 : case PRE_DEC:
2480 52507133 : case PRE_INC:
2481 52507133 : case POST_DEC:
2482 52507133 : case POST_INC:
2483 52507133 : case PRE_MODIFY:
2484 52507133 : case POST_MODIFY:
2485 52507133 : case PC:
2486 52507133 : case CALL:
2487 52507133 : case UNSPEC_VOLATILE:
2488 52507133 : if (do_not_record_p) {
2489 52505734 : *do_not_record_p = 1;
2490 52505734 : return 0;
2491 : }
2492 : else
2493 : return hash;
2494 214488 : break;
2495 :
2496 214488 : case ASM_OPERANDS:
2497 214488 : if (do_not_record_p && MEM_VOLATILE_P (x))
2498 : {
2499 177296 : *do_not_record_p = 1;
2500 177296 : return 0;
2501 : }
2502 : else
2503 : {
2504 : /* We don't want to take the filename and line into account. */
2505 74384 : hash += (unsigned) code + (unsigned) GET_MODE (x)
2506 37192 : + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2507 37192 : + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2508 37192 : + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2509 :
2510 37192 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2511 : {
2512 56991 : for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2513 : {
2514 49224 : hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2515 24612 : GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2516 : do_not_record_p, hash_arg_in_memory_p,
2517 : have_reg_qty, cb)
2518 24612 : + hash_rtx_string
2519 49224 : (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2520 : }
2521 :
2522 32379 : hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2523 32379 : x = ASM_OPERANDS_INPUT (x, 0);
2524 32379 : mode = GET_MODE (x);
2525 32379 : goto repeat;
2526 : }
2527 :
2528 : return hash;
2529 : }
2530 : break;
2531 :
2532 : default:
2533 : break;
2534 : }
2535 :
2536 361632985 : i = GET_RTX_LENGTH (code) - 1;
2537 361632985 : hash += (unsigned) code + (unsigned) GET_MODE (x);
2538 361632985 : fmt = GET_RTX_FORMAT (code);
2539 731945042 : for (; i >= 0; i--)
2540 : {
2541 725367672 : switch (fmt[i])
2542 : {
2543 713455096 : case 'e':
2544 : /* If we are about to do the last recursive call
2545 : needed at this level, change it into iteration.
2546 : This function is called enough to be worth it. */
2547 713455096 : if (i == 0)
2548 : {
2549 355055615 : x = XEXP (x, i);
2550 355055615 : goto repeat;
2551 : }
2552 :
2553 358399481 : hash += hash_rtx (XEXP (x, i), VOIDmode, do_not_record_p,
2554 : hash_arg_in_memory_p,
2555 : have_reg_qty, cb);
2556 358399481 : break;
2557 :
2558 : case 'E':
2559 16896570 : for (j = 0; j < XVECLEN (x, i); j++)
2560 10319459 : hash += hash_rtx (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2561 : hash_arg_in_memory_p,
2562 : have_reg_qty, cb);
2563 : break;
2564 :
2565 0 : case 's':
2566 0 : hash += hash_rtx_string (XSTR (x, i));
2567 0 : break;
2568 :
2569 5270989 : case 'i':
2570 5270989 : hash += (unsigned int) XINT (x, i);
2571 5270989 : break;
2572 :
2573 0 : case 'L':
2574 0 : hash += (unsigned int) XLOC (x, i);
2575 0 : break;
2576 :
2577 64421 : case 'p':
2578 64421 : hash += constant_lower_bound (SUBREG_BYTE (x));
2579 64421 : break;
2580 :
2581 : case '0': case 't':
2582 : /* Unused. */
2583 : break;
2584 :
2585 0 : default:
2586 0 : gcc_unreachable ();
2587 : }
2588 : }
2589 :
2590 : return hash;
2591 : }
2592 :
2593 : /* Hash an rtx X for cse via hash_rtx.
2594 : Stores 1 in do_not_record if any subexpression is volatile.
2595 : Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2596 : does not have the MEM_READONLY_P flag set. */
2597 :
2598 : static inline unsigned
2599 524760451 : canon_hash (rtx x, machine_mode mode)
2600 : {
2601 524760451 : return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2602 : }
2603 :
2604 : /* Like canon_hash but with no side effects, i.e. do_not_record
2605 : and hash_arg_in_memory are not changed. */
2606 :
2607 : static inline unsigned
2608 169389046 : safe_hash (rtx x, machine_mode mode)
2609 : {
2610 169389046 : int dummy_do_not_record;
2611 169389046 : return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2612 : }
2613 :
2614 : /* Return true iff X and Y would canonicalize into the same thing,
2615 : without actually constructing the canonicalization of either one.
2616 : If VALIDATE is nonzero,
2617 : we assume X is an expression being processed from the rtl
2618 : and Y was found in the hash table. We check register refs
2619 : in Y for being marked as valid.
2620 :
2621 : If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2622 :
2623 : bool
2624 775777573 : exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2625 : {
2626 775777573 : int i, j;
2627 775777573 : enum rtx_code code;
2628 775777573 : const char *fmt;
2629 :
2630 : /* Note: it is incorrect to assume an expression is equivalent to itself
2631 : if VALIDATE is nonzero. */
2632 775777573 : if (x == y && !validate)
2633 : return true;
2634 :
2635 752394836 : if (x == 0 || y == 0)
2636 : return x == y;
2637 :
2638 752394836 : code = GET_CODE (x);
2639 752394836 : if (code != GET_CODE (y))
2640 : return false;
2641 :
2642 : /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2643 643432554 : if (GET_MODE (x) != GET_MODE (y))
2644 : return false;
2645 :
2646 : /* MEMs referring to different address space are not equivalent. */
2647 670341902 : if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2648 : return false;
2649 :
2650 565867719 : switch (code)
2651 : {
2652 : case PC:
2653 : CASE_CONST_UNIQUE:
2654 : return x == y;
2655 :
2656 : case CONST_VECTOR:
2657 : if (!same_vector_encodings_p (x, y))
2658 : return false;
2659 : break;
2660 :
2661 22871 : case LABEL_REF:
2662 22871 : return label_ref_label (x) == label_ref_label (y);
2663 :
2664 17520356 : case SYMBOL_REF:
2665 17520356 : return XSTR (x, 0) == XSTR (y, 0);
2666 :
2667 166299859 : case REG:
2668 166299859 : if (for_gcse)
2669 1316831 : return REGNO (x) == REGNO (y);
2670 : else
2671 : {
2672 164983028 : unsigned int regno = REGNO (y);
2673 164983028 : unsigned int i;
2674 164983028 : unsigned int endregno = END_REGNO (y);
2675 :
2676 : /* If the quantities are not the same, the expressions are not
2677 : equivalent. If there are and we are not to validate, they
2678 : are equivalent. Otherwise, ensure all regs are up-to-date. */
2679 :
2680 164983028 : if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2681 : return false;
2682 :
2683 151427542 : if (! validate)
2684 : return true;
2685 :
2686 279884527 : for (i = regno; i < endregno; i++)
2687 141129366 : if (REG_IN_TABLE (i) != REG_TICK (i))
2688 : return false;
2689 :
2690 : return true;
2691 : }
2692 :
2693 103023507 : case MEM:
2694 103023507 : if (for_gcse)
2695 : {
2696 : /* A volatile mem should not be considered equivalent to any
2697 : other. */
2698 58803139 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2699 : return false;
2700 :
2701 : /* Can't merge two expressions in different alias sets, since we
2702 : can decide that the expression is transparent in a block when
2703 : it isn't, due to it being set with the different alias set.
2704 :
2705 : Also, can't merge two expressions with different MEM_ATTRS.
2706 : They could e.g. be two different entities allocated into the
2707 : same space on the stack (see e.g. PR25130). In that case, the
2708 : MEM addresses can be the same, even though the two MEMs are
2709 : absolutely not equivalent.
2710 :
2711 : But because really all MEM attributes should be the same for
2712 : equivalent MEMs, we just use the invariant that MEMs that have
2713 : the same attributes share the same mem_attrs data structure. */
2714 58693285 : if (!mem_attrs_eq_p (MEM_ATTRS (x), MEM_ATTRS (y)))
2715 : return false;
2716 :
2717 : /* If we are handling exceptions, we cannot consider two expressions
2718 : with different trapping status as equivalent, because simple_mem
2719 : might accept one and reject the other. */
2720 9127376 : if (cfun->can_throw_non_call_exceptions
2721 9127376 : && (MEM_NOTRAP_P (x) != MEM_NOTRAP_P (y)))
2722 : return false;
2723 : }
2724 : break;
2725 :
2726 : /* For commutative operations, check both orders. */
2727 70323526 : case PLUS:
2728 70323526 : case MULT:
2729 70323526 : case AND:
2730 70323526 : case IOR:
2731 70323526 : case XOR:
2732 70323526 : case NE:
2733 70323526 : case EQ:
2734 70323526 : return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2735 : validate, for_gcse)
2736 64707642 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2737 : validate, for_gcse))
2738 77041870 : || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2739 : validate, for_gcse)
2740 18914 : && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2741 : validate, for_gcse)));
2742 :
2743 12952 : case ASM_OPERANDS:
2744 : /* We don't use the generic code below because we want to
2745 : disregard filename and line numbers. */
2746 :
2747 : /* A volatile asm isn't equivalent to any other. */
2748 12952 : if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2749 : return false;
2750 :
2751 12952 : if (GET_MODE (x) != GET_MODE (y)
2752 12952 : || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2753 12952 : || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2754 12952 : ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2755 12942 : || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2756 12942 : || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2757 : return false;
2758 :
2759 12942 : if (ASM_OPERANDS_INPUT_LENGTH (x))
2760 : {
2761 17509 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2762 8853 : if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2763 8853 : ASM_OPERANDS_INPUT (y, i),
2764 : validate, for_gcse)
2765 8853 : || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2766 8774 : ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2767 : return false;
2768 : }
2769 :
2770 : return true;
2771 :
2772 : default:
2773 : break;
2774 : }
2775 :
2776 : /* Compare the elements. If any pair of corresponding elements
2777 : fail to match, return 0 for the whole thing. */
2778 :
2779 122176938 : fmt = GET_RTX_FORMAT (code);
2780 341482693 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2781 : {
2782 231553816 : switch (fmt[i])
2783 : {
2784 157295186 : case 'e':
2785 157295186 : if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2786 : validate, for_gcse))
2787 : return false;
2788 : break;
2789 :
2790 9482825 : case 'E':
2791 9482825 : if (XVECLEN (x, i) != XVECLEN (y, i))
2792 : return 0;
2793 46264746 : for (j = 0; j < XVECLEN (x, i); j++)
2794 37684431 : if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2795 : validate, for_gcse))
2796 : return false;
2797 : break;
2798 :
2799 0 : case 's':
2800 0 : if (strcmp (XSTR (x, i), XSTR (y, i)))
2801 : return false;
2802 : break;
2803 :
2804 3554332 : case 'i':
2805 3554332 : if (XINT (x, i) != XINT (y, i))
2806 : return false;
2807 : break;
2808 :
2809 0 : case 'L':
2810 0 : if (XLOC (x, i) != XLOC (y, i))
2811 : return false;
2812 : break;
2813 :
2814 0 : case 'w':
2815 0 : if (XWINT (x, i) != XWINT (y, i))
2816 : return false;
2817 : break;
2818 :
2819 7883849 : case 'p':
2820 7883849 : if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2821 : return false;
2822 : break;
2823 :
2824 : case '0':
2825 : case 't':
2826 : break;
2827 :
2828 0 : default:
2829 0 : gcc_unreachable ();
2830 : }
2831 : }
2832 :
2833 : return true;
2834 : }
2835 :
2836 : /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2837 : the result if necessary. INSN is as for canon_reg. */
2838 :
2839 : static void
2840 1062926263 : validate_canon_reg (rtx *xloc, rtx_insn *insn)
2841 : {
2842 1062926263 : if (*xloc)
2843 : {
2844 1062926263 : rtx new_rtx = canon_reg (*xloc, insn);
2845 :
2846 : /* If replacing pseudo with hard reg or vice versa, ensure the
2847 : insn remains valid. Likewise if the insn has MATCH_DUPs. */
2848 1062926263 : gcc_assert (insn && new_rtx);
2849 1062926263 : validate_change (insn, xloc, new_rtx, 1);
2850 : }
2851 1062926263 : }
2852 :
2853 : /* Canonicalize an expression:
2854 : replace each register reference inside it
2855 : with the "oldest" equivalent register.
2856 :
2857 : If INSN is nonzero validate_change is used to ensure that INSN remains valid
2858 : after we make our substitution. The calls are made with IN_GROUP nonzero
2859 : so apply_change_group must be called upon the outermost return from this
2860 : function (unless INSN is zero). The result of apply_change_group can
2861 : generally be discarded since the changes we are making are optional. */
2862 :
2863 : static rtx
2864 1760602067 : canon_reg (rtx x, rtx_insn *insn)
2865 : {
2866 1760602067 : int i;
2867 1760602067 : enum rtx_code code;
2868 1760602067 : const char *fmt;
2869 :
2870 1760602067 : if (x == 0)
2871 : return x;
2872 :
2873 1760602067 : code = GET_CODE (x);
2874 1760602067 : switch (code)
2875 : {
2876 : case PC:
2877 : case CONST:
2878 : CASE_CONST_ANY:
2879 : case SYMBOL_REF:
2880 : case LABEL_REF:
2881 : case ADDR_VEC:
2882 : case ADDR_DIFF_VEC:
2883 : return x;
2884 :
2885 10304056 : case SUBREG:
2886 10304056 : {
2887 10304056 : rtx inner = canon_reg (SUBREG_REG (x), insn);
2888 10304056 : if (inner != SUBREG_REG (x))
2889 : {
2890 258978 : rtx newx = simplify_subreg (GET_MODE (x), inner,
2891 129489 : GET_MODE (SUBREG_REG (x)),
2892 129489 : SUBREG_BYTE (x));
2893 129489 : if (newx)
2894 : return newx;
2895 :
2896 129489 : if (validate_subreg (GET_MODE (x), GET_MODE (inner),
2897 129489 : inner, SUBREG_BYTE (x)))
2898 129489 : validate_change (insn, &SUBREG_REG (x), inner, 1);
2899 : }
2900 : return x;
2901 : }
2902 :
2903 483620572 : case REG:
2904 483620572 : {
2905 483620572 : int first;
2906 483620572 : int q;
2907 483620572 : struct qty_table_elem *ent;
2908 :
2909 : /* Never replace a hard reg, because hard regs can appear
2910 : in more than one machine mode, and we must preserve the mode
2911 : of each occurrence. Also, some hard regs appear in
2912 : MEMs that are shared and mustn't be altered. Don't try to
2913 : replace any reg that maps to a reg of class NO_REGS. */
2914 483620572 : if (REGNO (x) < FIRST_PSEUDO_REGISTER
2915 483620572 : || ! REGNO_QTY_VALID_P (REGNO (x)))
2916 : return x;
2917 :
2918 171196238 : q = REG_QTY (REGNO (x));
2919 171196238 : ent = &qty_table[q];
2920 171196238 : first = ent->first_reg;
2921 171196238 : return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2922 404833 : : REGNO_REG_CLASS (first) == NO_REGS ? x
2923 171196238 : : gen_rtx_REG (ent->mode, first));
2924 : }
2925 :
2926 782535020 : default:
2927 782535020 : break;
2928 : }
2929 :
2930 782535020 : fmt = GET_RTX_FORMAT (code);
2931 2148115010 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2932 : {
2933 1365579990 : int j;
2934 :
2935 1365579990 : if (fmt[i] == 'e')
2936 1049239728 : validate_canon_reg (&XEXP (x, i), insn);
2937 316340262 : else if (fmt[i] == 'E')
2938 20659747 : for (j = 0; j < XVECLEN (x, i); j++)
2939 13686535 : validate_canon_reg (&XVECEXP (x, i, j), insn);
2940 : }
2941 :
2942 : return x;
2943 : }
2944 :
2945 : /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2946 : operation (EQ, NE, GT, etc.), follow it back through the hash table and
2947 : what values are being compared.
2948 :
2949 : *PARG1 and *PARG2 are updated to contain the rtx representing the values
2950 : actually being compared. For example, if *PARG1 was (reg:CC CC_REG) and
2951 : *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that
2952 : were compared to produce (reg:CC CC_REG).
2953 :
2954 : The return value is the comparison operator and is either the code of
2955 : A or the code corresponding to the inverse of the comparison. */
2956 :
2957 : static enum rtx_code
2958 37460646 : find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2959 : machine_mode *pmode1, machine_mode *pmode2)
2960 : {
2961 37460646 : rtx arg1, arg2;
2962 37460646 : hash_set<rtx> *visited = NULL;
2963 : /* Set nonzero when we find something of interest. */
2964 37460646 : rtx x = NULL;
2965 :
2966 37460646 : arg1 = *parg1, arg2 = *parg2;
2967 :
2968 : /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2969 :
2970 73002796 : while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2971 : {
2972 54481075 : int reverse_code = 0;
2973 54481075 : struct table_elt *p = 0;
2974 :
2975 : /* Remember state from previous iteration. */
2976 54481075 : if (x)
2977 : {
2978 17096446 : if (!visited)
2979 17091780 : visited = new hash_set<rtx>;
2980 17096446 : visited->add (x);
2981 17096446 : x = 0;
2982 : }
2983 :
2984 : /* If arg1 is a COMPARE, extract the comparison arguments from it. */
2985 :
2986 54481075 : if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2987 0 : x = arg1;
2988 :
2989 : /* If ARG1 is a comparison operator and CODE is testing for
2990 : STORE_FLAG_VALUE, get the inner arguments. */
2991 :
2992 54481075 : else if (COMPARISON_P (arg1))
2993 : {
2994 : #ifdef FLOAT_STORE_FLAG_VALUE
2995 : REAL_VALUE_TYPE fsfv;
2996 : #endif
2997 :
2998 0 : if (code == NE
2999 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3000 : && code == LT && STORE_FLAG_VALUE == -1)
3001 : #ifdef FLOAT_STORE_FLAG_VALUE
3002 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3003 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3004 : REAL_VALUE_NEGATIVE (fsfv)))
3005 : #endif
3006 : )
3007 0 : x = arg1;
3008 0 : else if (code == EQ
3009 : || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3010 : && code == GE && STORE_FLAG_VALUE == -1)
3011 : #ifdef FLOAT_STORE_FLAG_VALUE
3012 : || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3013 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3014 : REAL_VALUE_NEGATIVE (fsfv)))
3015 : #endif
3016 : )
3017 0 : x = arg1, reverse_code = 1;
3018 : }
3019 :
3020 : /* ??? We could also check for
3021 :
3022 : (ne (and (eq (...) (const_int 1))) (const_int 0))
3023 :
3024 : and related forms, but let's wait until we see them occurring. */
3025 :
3026 54481075 : if (x == 0)
3027 : /* Look up ARG1 in the hash table and see if it has an equivalence
3028 : that lets us see what is being compared. */
3029 54481075 : p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3030 54481075 : if (p)
3031 : {
3032 43522244 : p = p->first_same_value;
3033 :
3034 : /* If what we compare is already known to be constant, that is as
3035 : good as it gets.
3036 : We need to break the loop in this case, because otherwise we
3037 : can have an infinite loop when looking at a reg that is known
3038 : to be a constant which is the same as a comparison of a reg
3039 : against zero which appears later in the insn stream, which in
3040 : turn is constant and the same as the comparison of the first reg
3041 : against zero... */
3042 43522244 : if (p->is_const)
3043 : break;
3044 : }
3045 :
3046 69790469 : for (; p; p = p->next_same_value)
3047 : {
3048 50856948 : machine_mode inner_mode = GET_MODE (p->exp);
3049 : #ifdef FLOAT_STORE_FLAG_VALUE
3050 : REAL_VALUE_TYPE fsfv;
3051 : #endif
3052 :
3053 : /* If the entry isn't valid, skip it. */
3054 50856948 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3055 1843101 : continue;
3056 :
3057 : /* If it's a comparison we've used before, skip it. */
3058 49013847 : if (visited && visited->contains (p->exp))
3059 0 : continue;
3060 :
3061 49013847 : if (GET_CODE (p->exp) == COMPARE
3062 : /* Another possibility is that this machine has a compare insn
3063 : that includes the comparison code. In that case, ARG1 would
3064 : be equivalent to a comparison operation that would set ARG1 to
3065 : either STORE_FLAG_VALUE or zero. If this is an NE operation,
3066 : ORIG_CODE is the actual comparison being done; if it is an EQ,
3067 : we must reverse ORIG_CODE. On machine with a negative value
3068 : for STORE_FLAG_VALUE, also look at LT and GE operations. */
3069 49013847 : || ((code == NE
3070 9148695 : || (code == LT
3071 256235 : && val_signbit_known_set_p (inner_mode,
3072 : STORE_FLAG_VALUE))
3073 : #ifdef FLOAT_STORE_FLAG_VALUE
3074 : || (code == LT
3075 : && SCALAR_FLOAT_MODE_P (inner_mode)
3076 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3077 : REAL_VALUE_NEGATIVE (fsfv)))
3078 : #endif
3079 : )
3080 4430199 : && COMPARISON_P (p->exp)))
3081 : {
3082 35438321 : x = p->exp;
3083 35438321 : break;
3084 : }
3085 13575526 : else if ((code == EQ
3086 7622330 : || (code == GE
3087 241725 : && val_signbit_known_set_p (inner_mode,
3088 : STORE_FLAG_VALUE))
3089 : #ifdef FLOAT_STORE_FLAG_VALUE
3090 : || (code == GE
3091 : && SCALAR_FLOAT_MODE_P (inner_mode)
3092 : && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3093 : REAL_VALUE_NEGATIVE (fsfv)))
3094 : #endif
3095 : )
3096 13575526 : && COMPARISON_P (p->exp))
3097 : {
3098 103829 : reverse_code = 1;
3099 103829 : x = p->exp;
3100 103829 : break;
3101 : }
3102 :
3103 : /* If this non-trapping address, e.g. fp + constant, the
3104 : equivalent is a better operand since it may let us predict
3105 : the value of the comparison. */
3106 13471697 : else if (!rtx_addr_can_trap_p (p->exp))
3107 : {
3108 0 : arg1 = p->exp;
3109 0 : continue;
3110 : }
3111 : }
3112 :
3113 : /* If we didn't find a useful equivalence for ARG1, we are done.
3114 : Otherwise, set up for the next iteration. */
3115 54475671 : if (x == 0)
3116 : break;
3117 :
3118 : /* If we need to reverse the comparison, make sure that is
3119 : possible -- we can't necessarily infer the value of GE from LT
3120 : with floating-point operands. */
3121 35542150 : if (reverse_code)
3122 : {
3123 103829 : enum rtx_code reversed = reversed_comparison_code (x, NULL);
3124 103829 : if (reversed == UNKNOWN)
3125 : break;
3126 : else
3127 : code = reversed;
3128 : }
3129 35438321 : else if (COMPARISON_P (x))
3130 3368 : code = GET_CODE (x);
3131 35542150 : arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3132 : }
3133 :
3134 : /* Return our results. Return the modes from before fold_rtx
3135 : because fold_rtx might produce const_int, and then it's too late. */
3136 37460646 : *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3137 37460646 : *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3138 :
3139 37460646 : if (visited)
3140 17091780 : delete visited;
3141 37460646 : return code;
3142 : }
3143 :
3144 : /* If X is a nontrivial arithmetic operation on an argument for which
3145 : a constant value can be determined, return the result of operating
3146 : on that value, as a constant. Otherwise, return X, possibly with
3147 : one or more operands changed to a forward-propagated constant.
3148 :
3149 : If X is a register whose contents are known, we do NOT return
3150 : those contents here; equiv_constant is called to perform that task.
3151 : For SUBREGs and MEMs, we do that both here and in equiv_constant.
3152 :
3153 : INSN is the insn that we may be modifying. If it is 0, make a copy
3154 : of X before modifying it. */
3155 :
3156 : static rtx
3157 404454302 : fold_rtx (rtx x, rtx_insn *insn)
3158 : {
3159 404456122 : enum rtx_code code;
3160 404456122 : machine_mode mode;
3161 404456122 : const char *fmt;
3162 404456122 : int i;
3163 404456122 : rtx new_rtx = 0;
3164 404456122 : bool changed = false;
3165 404456122 : poly_int64 xval;
3166 :
3167 : /* Operands of X. */
3168 : /* Workaround -Wmaybe-uninitialized false positive during
3169 : profiledbootstrap by initializing them. */
3170 404456122 : rtx folded_arg0 = NULL_RTX;
3171 404456122 : rtx folded_arg1 = NULL_RTX;
3172 :
3173 : /* Constant equivalents of first three operands of X;
3174 : 0 when no such equivalent is known. */
3175 404456122 : rtx const_arg0;
3176 404456122 : rtx const_arg1;
3177 404456122 : rtx const_arg2;
3178 :
3179 : /* The mode of the first operand of X. We need this for sign and zero
3180 : extends. */
3181 404456122 : machine_mode mode_arg0;
3182 :
3183 404456122 : if (x == 0)
3184 : return x;
3185 :
3186 : /* Try to perform some initial simplifications on X. */
3187 404456122 : code = GET_CODE (x);
3188 404456122 : switch (code)
3189 : {
3190 62990161 : case MEM:
3191 62990161 : case SUBREG:
3192 : /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3193 : than it would in other contexts. Basically its mode does not
3194 : signify the size of the object read. That information is carried
3195 : by size operand. If we happen to have a MEM of the appropriate
3196 : mode in our tables with a constant value we could simplify the
3197 : extraction incorrectly if we allowed substitution of that value
3198 : for the MEM. */
3199 62990161 : case ZERO_EXTRACT:
3200 62990161 : case SIGN_EXTRACT:
3201 62990161 : if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3202 2302376 : return new_rtx;
3203 : return x;
3204 :
3205 : case CONST:
3206 : CASE_CONST_ANY:
3207 : case SYMBOL_REF:
3208 : case LABEL_REF:
3209 : case REG:
3210 : case PC:
3211 : /* No use simplifying an EXPR_LIST
3212 : since they are used only for lists of args
3213 : in a function call's REG_EQUAL note. */
3214 : case EXPR_LIST:
3215 : return x;
3216 :
3217 213679 : case ASM_OPERANDS:
3218 213679 : if (insn)
3219 : {
3220 0 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3221 0 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3222 0 : fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3223 : }
3224 : return x;
3225 :
3226 15784702 : case CALL:
3227 15784702 : if (NO_FUNCTION_CSE && CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3228 : return x;
3229 : break;
3230 1043329 : case VEC_SELECT:
3231 1043329 : {
3232 1043329 : rtx trueop0 = XEXP (x, 0);
3233 1043329 : mode = GET_MODE (trueop0);
3234 1043329 : rtx trueop1 = XEXP (x, 1);
3235 : /* If we select a low-part subreg, return that. */
3236 1043329 : if (vec_series_lowpart_p (GET_MODE (x), mode, trueop1))
3237 : {
3238 219 : rtx new_rtx = lowpart_subreg (GET_MODE (x), trueop0, mode);
3239 219 : if (new_rtx != NULL_RTX)
3240 : return new_rtx;
3241 : }
3242 : }
3243 :
3244 : /* Anything else goes through the loop below. */
3245 : default:
3246 : break;
3247 : }
3248 :
3249 118410100 : mode = GET_MODE (x);
3250 118410100 : const_arg0 = 0;
3251 118410100 : const_arg1 = 0;
3252 118410100 : const_arg2 = 0;
3253 118410100 : mode_arg0 = VOIDmode;
3254 :
3255 : /* Try folding our operands.
3256 : Then see which ones have constant values known. */
3257 :
3258 118410100 : fmt = GET_RTX_FORMAT (code);
3259 369281755 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3260 250871655 : if (fmt[i] == 'e')
3261 : {
3262 246191667 : rtx folded_arg = XEXP (x, i), const_arg;
3263 246191667 : machine_mode mode_arg = GET_MODE (folded_arg);
3264 :
3265 246191667 : switch (GET_CODE (folded_arg))
3266 : {
3267 110247461 : case MEM:
3268 110247461 : case REG:
3269 110247461 : case SUBREG:
3270 110247461 : const_arg = equiv_constant (folded_arg);
3271 110247461 : break;
3272 :
3273 : case CONST:
3274 : CASE_CONST_ANY:
3275 : case SYMBOL_REF:
3276 : case LABEL_REF:
3277 : const_arg = folded_arg;
3278 : break;
3279 :
3280 46361991 : default:
3281 46361991 : folded_arg = fold_rtx (folded_arg, insn);
3282 46361991 : const_arg = equiv_constant (folded_arg);
3283 46361991 : break;
3284 : }
3285 :
3286 : /* For the first three operands, see if the operand
3287 : is constant or equivalent to a constant. */
3288 246191667 : switch (i)
3289 : {
3290 115548551 : case 0:
3291 115548551 : folded_arg0 = folded_arg;
3292 115548551 : const_arg0 = const_arg;
3293 115548551 : mode_arg0 = mode_arg;
3294 115548551 : break;
3295 109416960 : case 1:
3296 109416960 : folded_arg1 = folded_arg;
3297 109416960 : const_arg1 = const_arg;
3298 109416960 : break;
3299 21226156 : case 2:
3300 21226156 : const_arg2 = const_arg;
3301 21226156 : break;
3302 : }
3303 :
3304 : /* Pick the least expensive of the argument and an equivalent constant
3305 : argument. */
3306 246191667 : if (const_arg != 0
3307 246191667 : && const_arg != folded_arg
3308 6201038 : && (COST_IN (const_arg, mode_arg, code, i)
3309 3100519 : <= COST_IN (folded_arg, mode_arg, code, i))
3310 :
3311 : /* It's not safe to substitute the operand of a conversion
3312 : operator with a constant, as the conversion's identity
3313 : depends upon the mode of its operand. This optimization
3314 : is handled by the call to simplify_unary_operation. */
3315 247798285 : && (GET_RTX_CLASS (code) != RTX_UNARY
3316 416216 : || GET_MODE (const_arg) == mode_arg0
3317 332868 : || (code != ZERO_EXTEND
3318 : && code != SIGN_EXTEND
3319 332868 : && code != TRUNCATE
3320 332868 : && code != FLOAT_TRUNCATE
3321 260175 : && code != FLOAT_EXTEND
3322 260175 : && code != FLOAT
3323 : && code != FIX
3324 259987 : && code != UNSIGNED_FLOAT
3325 259987 : && code != UNSIGNED_FIX)))
3326 : folded_arg = const_arg;
3327 :
3328 246191667 : if (folded_arg == XEXP (x, i))
3329 244127776 : continue;
3330 :
3331 2063891 : if (insn == NULL_RTX && !changed)
3332 1871509 : x = copy_rtx (x);
3333 2063891 : changed = true;
3334 2063891 : validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3335 : }
3336 :
3337 118410100 : if (changed)
3338 : {
3339 : /* Canonicalize X if necessary, and keep const_argN and folded_argN
3340 : consistent with the order in X. */
3341 1871984 : if (canonicalize_change_group (insn, x))
3342 : {
3343 104926 : std::swap (const_arg0, const_arg1);
3344 104926 : std::swap (folded_arg0, folded_arg1);
3345 : }
3346 :
3347 1871984 : apply_change_group ();
3348 : }
3349 :
3350 : /* If X is an arithmetic operation, see if we can simplify it. */
3351 :
3352 118410100 : switch (GET_RTX_CLASS (code))
3353 : {
3354 6131591 : case RTX_UNARY:
3355 6131591 : {
3356 : /* We can't simplify extension ops unless we know the
3357 : original mode. */
3358 6131591 : if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3359 4286740 : && mode_arg0 == VOIDmode)
3360 : break;
3361 :
3362 6131591 : new_rtx = simplify_unary_operation (code, mode,
3363 : const_arg0 ? const_arg0 : folded_arg0,
3364 : mode_arg0);
3365 : }
3366 6131591 : break;
3367 :
3368 22632216 : case RTX_COMPARE:
3369 22632216 : case RTX_COMM_COMPARE:
3370 : /* See what items are actually being compared and set FOLDED_ARG[01]
3371 : to those values and CODE to the actual comparison code. If any are
3372 : constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3373 : do anything if both operands are already known to be constant. */
3374 :
3375 : /* ??? Vector mode comparisons are not supported yet. */
3376 22632216 : if (VECTOR_MODE_P (mode))
3377 : break;
3378 :
3379 22492448 : if (const_arg0 == 0 || const_arg1 == 0)
3380 : {
3381 22491317 : struct table_elt *p0, *p1;
3382 22491317 : rtx true_rtx, false_rtx;
3383 22491317 : machine_mode mode_arg1;
3384 :
3385 22491317 : if (SCALAR_FLOAT_MODE_P (mode))
3386 : {
3387 : #ifdef FLOAT_STORE_FLAG_VALUE
3388 : true_rtx = (const_double_from_real_value
3389 : (FLOAT_STORE_FLAG_VALUE (mode), mode));
3390 : #else
3391 2436 : true_rtx = NULL_RTX;
3392 : #endif
3393 2436 : false_rtx = CONST0_RTX (mode);
3394 : }
3395 : else
3396 : {
3397 22488881 : true_rtx = const_true_rtx;
3398 22488881 : false_rtx = const0_rtx;
3399 : }
3400 :
3401 22491317 : code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3402 : &mode_arg0, &mode_arg1);
3403 :
3404 : /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3405 : what kinds of things are being compared, so we can't do
3406 : anything with this comparison. */
3407 :
3408 22491317 : if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3409 : break;
3410 :
3411 21142669 : const_arg0 = equiv_constant (folded_arg0);
3412 21142669 : const_arg1 = equiv_constant (folded_arg1);
3413 :
3414 : /* If we do not now have two constants being compared, see
3415 : if we can nevertheless deduce some things about the
3416 : comparison. */
3417 21142669 : if (const_arg0 == 0 || const_arg1 == 0)
3418 : {
3419 20915115 : if (const_arg1 != NULL)
3420 : {
3421 15600101 : rtx cheapest_simplification;
3422 15600101 : int cheapest_cost;
3423 15600101 : rtx simp_result;
3424 15600101 : struct table_elt *p;
3425 :
3426 : /* See if we can find an equivalent of folded_arg0
3427 : that gets us a cheaper expression, possibly a
3428 : constant through simplifications. */
3429 15600101 : p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3430 : mode_arg0);
3431 :
3432 15600101 : if (p != NULL)
3433 : {
3434 6441062 : cheapest_simplification = x;
3435 6441062 : cheapest_cost = COST (x, mode);
3436 :
3437 18697812 : for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3438 : {
3439 12256750 : int cost;
3440 :
3441 : /* If the entry isn't valid, skip it. */
3442 12256750 : if (! exp_equiv_p (p->exp, p->exp, 1, false))
3443 525118 : continue;
3444 :
3445 : /* Try to simplify using this equivalence. */
3446 11731632 : simp_result
3447 11731632 : = simplify_relational_operation (code, mode,
3448 : mode_arg0,
3449 : p->exp,
3450 : const_arg1);
3451 :
3452 11731632 : if (simp_result == NULL)
3453 11588561 : continue;
3454 :
3455 143071 : cost = COST (simp_result, mode);
3456 143071 : if (cost < cheapest_cost)
3457 : {
3458 12256750 : cheapest_cost = cost;
3459 12256750 : cheapest_simplification = simp_result;
3460 : }
3461 : }
3462 :
3463 : /* If we have a cheaper expression now, use that
3464 : and try folding it further, from the top. */
3465 6441062 : if (cheapest_simplification != x)
3466 1791 : return fold_rtx (copy_rtx (cheapest_simplification),
3467 11323 : insn);
3468 : }
3469 : }
3470 :
3471 : /* See if the two operands are the same. */
3472 :
3473 21129877 : if ((REG_P (folded_arg0)
3474 17704419 : && REG_P (folded_arg1)
3475 4692306 : && (REG_QTY (REGNO (folded_arg0))
3476 4692306 : == REG_QTY (REGNO (folded_arg1))))
3477 38822316 : || ((p0 = lookup (folded_arg0,
3478 : SAFE_HASH (folded_arg0, mode_arg0),
3479 : mode_arg0))
3480 9048382 : && (p1 = lookup (folded_arg1,
3481 : SAFE_HASH (folded_arg1, mode_arg0),
3482 : mode_arg0))
3483 2554479 : && p0->first_same_value == p1->first_same_value))
3484 12964 : folded_arg1 = folded_arg0;
3485 :
3486 : /* If FOLDED_ARG0 is a register, see if the comparison we are
3487 : doing now is either the same as we did before or the reverse
3488 : (we only check the reverse if not floating-point). */
3489 21116913 : else if (REG_P (folded_arg0))
3490 : {
3491 17692060 : int qty = REG_QTY (REGNO (folded_arg0));
3492 :
3493 17692060 : if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3494 : {
3495 17681287 : struct qty_table_elem *ent = &qty_table[qty];
3496 :
3497 17681287 : if ((comparison_dominates_p (ent->comparison_code, code)
3498 17204280 : || (! FLOAT_MODE_P (mode_arg0)
3499 16978899 : && comparison_dominates_p (ent->comparison_code,
3500 : reverse_condition (code))))
3501 18136163 : && (rtx_equal_p (ent->comparison_const, folded_arg1)
3502 924010 : || (const_arg1
3503 784360 : && rtx_equal_p (ent->comparison_const,
3504 : const_arg1))
3505 924010 : || (REG_P (folded_arg1)
3506 133551 : && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3507 : {
3508 9532 : if (comparison_dominates_p (ent->comparison_code, code))
3509 : {
3510 6807 : if (true_rtx)
3511 : return true_rtx;
3512 : else
3513 : break;
3514 : }
3515 : else
3516 : return false_rtx;
3517 : }
3518 : }
3519 : }
3520 : }
3521 : }
3522 :
3523 : /* If we are comparing against zero, see if the first operand is
3524 : equivalent to an IOR with a constant. If so, we may be able to
3525 : determine the result of this comparison. */
3526 21132477 : if (const_arg1 == const0_rtx && !const_arg0)
3527 : {
3528 9931853 : rtx y = lookup_as_function (folded_arg0, IOR);
3529 9931853 : rtx inner_const;
3530 :
3531 9931853 : if (y != 0
3532 76166 : && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3533 53 : && CONST_INT_P (inner_const)
3534 9931906 : && INTVAL (inner_const) != 0)
3535 53 : folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3536 : }
3537 :
3538 21125116 : {
3539 21125116 : rtx op0 = const_arg0 ? const_arg0 : copy_rtx (folded_arg0);
3540 21132477 : rtx op1 = const_arg1 ? const_arg1 : copy_rtx (folded_arg1);
3541 21132477 : new_rtx = simplify_relational_operation (code, mode, mode_arg0,
3542 : op0, op1);
3543 : }
3544 21132477 : break;
3545 :
3546 65039016 : case RTX_BIN_ARITH:
3547 65039016 : case RTX_COMM_ARITH:
3548 65039016 : switch (code)
3549 : {
3550 27576888 : case PLUS:
3551 : /* If the second operand is a LABEL_REF, see if the first is a MINUS
3552 : with that LABEL_REF as its second operand. If so, the result is
3553 : the first operand of that MINUS. This handles switches with an
3554 : ADDR_DIFF_VEC table. */
3555 27576888 : if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3556 : {
3557 2917 : rtx y
3558 2917 : = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3559 2917 : : lookup_as_function (folded_arg0, MINUS);
3560 :
3561 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3562 2917 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg1))
3563 0 : return XEXP (y, 0);
3564 :
3565 : /* Now try for a CONST of a MINUS like the above. */
3566 2917 : if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3567 2917 : : lookup_as_function (folded_arg0, CONST))) != 0
3568 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3569 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3570 2917 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg1))
3571 0 : return XEXP (XEXP (y, 0), 0);
3572 : }
3573 :
3574 : /* Likewise if the operands are in the other order. */
3575 27576888 : if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3576 : {
3577 23 : rtx y
3578 23 : = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3579 23 : : lookup_as_function (folded_arg1, MINUS);
3580 :
3581 0 : if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3582 23 : && label_ref_label (XEXP (y, 1)) == label_ref_label (const_arg0))
3583 0 : return XEXP (y, 0);
3584 :
3585 : /* Now try for a CONST of a MINUS like the above. */
3586 23 : if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3587 23 : : lookup_as_function (folded_arg1, CONST))) != 0
3588 0 : && GET_CODE (XEXP (y, 0)) == MINUS
3589 0 : && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3590 23 : && label_ref_label (XEXP (XEXP (y, 0), 1)) == label_ref_label (const_arg0))
3591 0 : return XEXP (XEXP (y, 0), 0);
3592 : }
3593 :
3594 : /* If second operand is a register equivalent to a negative
3595 : CONST_INT, see if we can find a register equivalent to the
3596 : positive constant. Make a MINUS if so. Don't do this for
3597 : a non-negative constant since we might then alternate between
3598 : choosing positive and negative constants. Having the positive
3599 : constant previously-used is the more common case. Be sure
3600 : the resulting constant is non-negative; if const_arg1 were
3601 : the smallest negative number this would overflow: depending
3602 : on the mode, this would either just be the same value (and
3603 : hence not save anything) or be incorrect. */
3604 27576888 : if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3605 22077193 : && INTVAL (const_arg1) < 0
3606 : /* This used to test
3607 :
3608 : -INTVAL (const_arg1) >= 0
3609 :
3610 : But The Sun V5.0 compilers mis-compiled that test. So
3611 : instead we test for the problematic value in a more direct
3612 : manner and hope the Sun compilers get it correct. */
3613 12547073 : && INTVAL (const_arg1) !=
3614 : (HOST_WIDE_INT_1 << (HOST_BITS_PER_WIDE_INT - 1))
3615 12527965 : && REG_P (folded_arg1))
3616 : {
3617 32165 : rtx new_const = GEN_INT (-INTVAL (const_arg1));
3618 32165 : struct table_elt *p
3619 32165 : = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3620 :
3621 32165 : if (p)
3622 5045 : for (p = p->first_same_value; p; p = p->next_same_value)
3623 5042 : if (REG_P (p->exp))
3624 2629 : return simplify_gen_binary (MINUS, mode, folded_arg0,
3625 2629 : canon_reg (p->exp, NULL));
3626 : }
3627 27574259 : goto from_plus;
3628 :
3629 2375194 : case MINUS:
3630 : /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3631 : If so, produce (PLUS Z C2-C). */
3632 2375194 : if (const_arg1 != 0 && poly_int_rtx_p (const_arg1, &xval))
3633 : {
3634 43082 : rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3635 43082 : if (y && poly_int_rtx_p (XEXP (y, 1)))
3636 29 : return fold_rtx (plus_constant (mode, copy_rtx (y), -xval),
3637 29 : NULL);
3638 : }
3639 :
3640 : /* Fall through. */
3641 :
3642 40559624 : from_plus:
3643 40559624 : case SMIN: case SMAX: case UMIN: case UMAX:
3644 40559624 : case IOR: case AND: case XOR:
3645 40559624 : case MULT:
3646 40559624 : case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3647 : /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3648 : is known to be of similar form, we may be able to replace the
3649 : operation with a combined operation. This may eliminate the
3650 : intermediate operation if every use is simplified in this way.
3651 : Note that the similar optimization done by combine.cc only works
3652 : if the intermediate operation's result has only one reference. */
3653 :
3654 40559624 : if (REG_P (folded_arg0)
3655 37191222 : && const_arg1 && CONST_INT_P (const_arg1))
3656 : {
3657 27007489 : int is_shift
3658 27007489 : = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3659 : rtx y, inner_const, new_const;
3660 : rtx canon_const_arg1 = const_arg1;
3661 : enum rtx_code associate_code;
3662 :
3663 : if (is_shift
3664 6676590 : && (INTVAL (const_arg1) >= GET_MODE_UNIT_PRECISION (mode)
3665 3338128 : || INTVAL (const_arg1) < 0))
3666 : {
3667 : if (SHIFT_COUNT_TRUNCATED)
3668 : canon_const_arg1 = gen_int_shift_amount
3669 : (mode, (INTVAL (const_arg1)
3670 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3671 : else
3672 : break;
3673 : }
3674 :
3675 27007320 : y = lookup_as_function (folded_arg0, code);
3676 27007320 : if (y == 0)
3677 : break;
3678 :
3679 : /* If we have compiled a statement like
3680 : "if (x == (x & mask1))", and now are looking at
3681 : "x & mask2", we will have a case where the first operand
3682 : of Y is the same as our first operand. Unless we detect
3683 : this case, an infinite loop will result. */
3684 738984 : if (XEXP (y, 0) == folded_arg0)
3685 : break;
3686 :
3687 738823 : inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3688 738823 : if (!inner_const || !CONST_INT_P (inner_const))
3689 : break;
3690 :
3691 : /* Don't associate these operations if they are a PLUS with the
3692 : same constant and it is a power of two. These might be doable
3693 : with a pre- or post-increment. Similarly for two subtracts of
3694 : identical powers of two with post decrement. */
3695 :
3696 540785 : if (code == PLUS && const_arg1 == inner_const
3697 : && ((HAVE_PRE_INCREMENT
3698 : && pow2p_hwi (INTVAL (const_arg1)))
3699 : || (HAVE_POST_INCREMENT
3700 : && pow2p_hwi (INTVAL (const_arg1)))
3701 : || (HAVE_PRE_DECREMENT
3702 : && pow2p_hwi (- INTVAL (const_arg1)))
3703 : || (HAVE_POST_DECREMENT
3704 : && pow2p_hwi (- INTVAL (const_arg1)))))
3705 : break;
3706 :
3707 : /* ??? Vector mode shifts by scalar
3708 : shift operand are not supported yet. */
3709 540785 : if (is_shift && VECTOR_MODE_P (mode))
3710 : break;
3711 :
3712 4342 : if (is_shift
3713 8684 : && (INTVAL (inner_const) >= GET_MODE_UNIT_PRECISION (mode)
3714 4342 : || INTVAL (inner_const) < 0))
3715 : {
3716 : if (SHIFT_COUNT_TRUNCATED)
3717 : inner_const = gen_int_shift_amount
3718 : (mode, (INTVAL (inner_const)
3719 : & (GET_MODE_UNIT_BITSIZE (mode) - 1)));
3720 : else
3721 : break;
3722 : }
3723 :
3724 : /* Compute the code used to compose the constants. For example,
3725 : A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3726 :
3727 540520 : associate_code = (is_shift || code == MINUS ? PLUS : code);
3728 :
3729 540520 : new_const = simplify_binary_operation (associate_code, mode,
3730 : canon_const_arg1,
3731 : inner_const);
3732 :
3733 540520 : if (new_const == 0)
3734 : break;
3735 :
3736 : /* If we are associating shift operations, don't let this
3737 : produce a shift of the size of the object or larger.
3738 : This could occur when we follow a sign-extend by a right
3739 : shift on a machine that does a sign-extend as a pair
3740 : of shifts. */
3741 :
3742 540520 : if (is_shift
3743 4342 : && CONST_INT_P (new_const)
3744 549204 : && INTVAL (new_const) >= GET_MODE_UNIT_PRECISION (mode))
3745 : {
3746 : /* As an exception, we can turn an ASHIFTRT of this
3747 : form into a shift of the number of bits - 1. */
3748 1549 : if (code == ASHIFTRT)
3749 1526 : new_const = gen_int_shift_amount
3750 1526 : (mode, GET_MODE_UNIT_BITSIZE (mode) - 1);
3751 23 : else if (!side_effects_p (XEXP (y, 0)))
3752 23 : return CONST0_RTX (mode);
3753 : else
3754 : break;
3755 : }
3756 :
3757 540497 : y = copy_rtx (XEXP (y, 0));
3758 :
3759 : /* If Y contains our first operand (the most common way this
3760 : can happen is if Y is a MEM), we would do into an infinite
3761 : loop if we tried to fold it. So don't in that case. */
3762 :
3763 540497 : if (! reg_mentioned_p (folded_arg0, y))
3764 540497 : y = fold_rtx (y, insn);
3765 :
3766 540497 : return simplify_gen_binary (code, mode, y, new_const);
3767 : }
3768 : break;
3769 :
3770 : case DIV: case UDIV:
3771 : /* ??? The associative optimization performed immediately above is
3772 : also possible for DIV and UDIV using associate_code of MULT.
3773 : However, we would need extra code to verify that the
3774 : multiplication does not overflow, that is, there is no overflow
3775 : in the calculation of new_const. */
3776 : break;
3777 :
3778 : default:
3779 : break;
3780 : }
3781 :
3782 64495838 : new_rtx = simplify_binary_operation (code, mode,
3783 : const_arg0 ? const_arg0 : folded_arg0,
3784 : const_arg1 ? const_arg1 : folded_arg1);
3785 64495838 : break;
3786 :
3787 0 : case RTX_OBJ:
3788 : /* (lo_sum (high X) X) is simply X. */
3789 0 : if (code == LO_SUM && const_arg0 != 0
3790 0 : && GET_CODE (const_arg0) == HIGH
3791 0 : && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3792 : return const_arg1;
3793 : break;
3794 :
3795 21226156 : case RTX_TERNARY:
3796 21226156 : case RTX_BITFIELD_OPS:
3797 21226156 : new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3798 : const_arg0 ? const_arg0 : folded_arg0,
3799 : const_arg1 ? const_arg1 : folded_arg1,
3800 : const_arg2 ? const_arg2 : XEXP (x, 2));
3801 21226156 : break;
3802 :
3803 : default:
3804 : break;
3805 : }
3806 :
3807 114334710 : return new_rtx ? new_rtx : x;
3808 : }
3809 :
3810 : /* Return a constant value currently equivalent to X.
3811 : Return 0 if we don't know one. */
3812 :
3813 : static rtx
3814 276475527 : equiv_constant (rtx x)
3815 : {
3816 276475527 : if (REG_P (x)
3817 276475527 : && REGNO_QTY_VALID_P (REGNO (x)))
3818 : {
3819 88370284 : int x_q = REG_QTY (REGNO (x));
3820 88370284 : struct qty_table_elem *x_ent = &qty_table[x_q];
3821 :
3822 88370284 : if (x_ent->const_rtx)
3823 4607313 : x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3824 : }
3825 :
3826 276475527 : if (x == 0 || CONSTANT_P (x))
3827 : return x;
3828 :
3829 249350257 : if (GET_CODE (x) == SUBREG)
3830 : {
3831 6380843 : machine_mode mode = GET_MODE (x);
3832 6380843 : machine_mode imode = GET_MODE (SUBREG_REG (x));
3833 6380843 : rtx new_rtx;
3834 :
3835 : /* See if we previously assigned a constant value to this SUBREG. */
3836 6380843 : if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3837 6370355 : || (new_rtx = lookup_as_function (x, CONST_WIDE_INT)) != 0
3838 6370355 : || (NUM_POLY_INT_COEFFS > 1
3839 : && (new_rtx = lookup_as_function (x, CONST_POLY_INT)) != 0)
3840 6364439 : || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3841 12745092 : || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3842 : return new_rtx;
3843 :
3844 : /* If we didn't and if doing so makes sense, see if we previously
3845 : assigned a constant value to the enclosing word mode SUBREG. */
3846 13621864 : if (known_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD)
3847 9988393 : && known_lt (UNITS_PER_WORD, GET_MODE_SIZE (imode)))
3848 : {
3849 32803 : poly_int64 byte = (SUBREG_BYTE (x)
3850 32803 : - subreg_lowpart_offset (mode, word_mode));
3851 65606 : if (known_ge (byte, 0) && multiple_p (byte, UNITS_PER_WORD))
3852 : {
3853 32803 : rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3854 32803 : new_rtx = lookup_as_function (y, CONST_INT);
3855 32803 : if (new_rtx)
3856 0 : return gen_lowpart (mode, new_rtx);
3857 : }
3858 : }
3859 :
3860 : /* Otherwise see if we already have a constant for the inner REG,
3861 : and if that is enough to calculate an equivalent constant for
3862 : the subreg. Note that the upper bits of paradoxical subregs
3863 : are undefined, so they cannot be said to equal anything. */
3864 6364249 : if (REG_P (SUBREG_REG (x))
3865 6354915 : && !paradoxical_subreg_p (x)
3866 12530314 : && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3867 101544 : return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3868 :
3869 : return 0;
3870 : }
3871 :
3872 : /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3873 : the hash table in case its value was seen before. */
3874 :
3875 242969414 : if (MEM_P (x))
3876 : {
3877 69559607 : struct table_elt *elt;
3878 :
3879 69559607 : x = avoid_constant_pool_reference (x);
3880 69559607 : if (CONSTANT_P (x))
3881 : return x;
3882 :
3883 67407381 : elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3884 67407381 : if (elt == 0)
3885 : return 0;
3886 :
3887 5870576 : for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3888 4154802 : if (elt->is_const && CONSTANT_P (elt->exp))
3889 : return elt->exp;
3890 : }
3891 :
3892 : return 0;
3893 : }
3894 :
3895 : /* Given INSN, a jump insn, TAKEN indicates if we are following the
3896 : "taken" branch.
3897 :
3898 : In certain cases, this can cause us to add an equivalence. For example,
3899 : if we are following the taken case of
3900 : if (i == 2)
3901 : we can add the fact that `i' and '2' are now equivalent.
3902 :
3903 : In any case, we can record that this comparison was passed. If the same
3904 : comparison is seen later, we will know its value. */
3905 :
3906 : static void
3907 14969329 : record_jump_equiv (rtx_insn *insn, bool taken)
3908 : {
3909 14969329 : int cond_known_true;
3910 14969329 : rtx op0, op1;
3911 14969329 : rtx set;
3912 14969329 : machine_mode mode, mode0, mode1;
3913 14969329 : enum rtx_code code;
3914 :
3915 : /* Ensure this is the right kind of insn. */
3916 14969329 : gcc_assert (any_condjump_p (insn));
3917 :
3918 14969329 : set = pc_set (insn);
3919 :
3920 : /* See if this jump condition is known true or false. */
3921 14969329 : if (taken)
3922 5985150 : cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3923 : else
3924 8984179 : cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3925 :
3926 : /* Get the type of comparison being done and the operands being compared.
3927 : If we had to reverse a non-equality condition, record that fact so we
3928 : know that it isn't valid for floating-point. */
3929 14969329 : code = GET_CODE (XEXP (SET_SRC (set), 0));
3930 14969329 : op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3931 14969329 : op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3932 :
3933 : /* If fold_rtx returns NULL_RTX, there's nothing to record. */
3934 14969329 : if (op0 == NULL_RTX || op1 == NULL_RTX)
3935 88937 : return;
3936 :
3937 14969329 : code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3938 14969329 : if (! cond_known_true)
3939 : {
3940 8984179 : code = reversed_comparison_code_parts (code, op0, op1, insn);
3941 :
3942 : /* Don't remember if we can't find the inverse. */
3943 8984179 : if (code == UNKNOWN)
3944 : return;
3945 : }
3946 :
3947 : /* The mode is the mode of the non-constant. */
3948 14880392 : mode = mode0;
3949 14880392 : if (mode1 != VOIDmode)
3950 3791751 : mode = mode1;
3951 :
3952 14880392 : record_jump_cond (code, mode, op0, op1);
3953 : }
3954 :
3955 : /* Yet another form of subreg creation. In this case, we want something in
3956 : MODE, and we should assume OP has MODE iff it is naturally modeless. */
3957 :
3958 : static rtx
3959 58689 : record_jump_cond_subreg (machine_mode mode, rtx op)
3960 : {
3961 58689 : machine_mode op_mode = GET_MODE (op);
3962 58689 : if (op_mode == mode || op_mode == VOIDmode)
3963 : return op;
3964 6186 : return lowpart_subreg (mode, op, op_mode);
3965 : }
3966 :
3967 : /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3968 : Make any useful entries we can with that information. Called from
3969 : above function and called recursively. */
3970 :
3971 : static void
3972 14939077 : record_jump_cond (enum rtx_code code, machine_mode mode, rtx op0, rtx op1)
3973 : {
3974 14939077 : unsigned op0_hash, op1_hash;
3975 14939077 : int op0_in_memory, op1_in_memory;
3976 14939077 : struct table_elt *op0_elt, *op1_elt;
3977 :
3978 : /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3979 : we know that they are also equal in the smaller mode (this is also
3980 : true for all smaller modes whether or not there is a SUBREG, but
3981 : is not worth testing for with no SUBREG). */
3982 :
3983 : /* Note that GET_MODE (op0) may not equal MODE. */
3984 14986202 : if (code == EQ && paradoxical_subreg_p (op0))
3985 : {
3986 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3987 0 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
3988 0 : if (tem)
3989 0 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
3990 : }
3991 :
3992 14952340 : if (code == EQ && paradoxical_subreg_p (op1))
3993 : {
3994 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3995 0 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
3996 0 : if (tem)
3997 0 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
3998 : }
3999 :
4000 : /* Similarly, if this is an NE comparison, and either is a SUBREG
4001 : making a smaller mode, we know the whole thing is also NE. */
4002 :
4003 : /* Note that GET_MODE (op0) may not equal MODE;
4004 : if we test MODE instead, we can get an infinite recursion
4005 : alternating between two modes each wider than MODE. */
4006 :
4007 14939077 : if (code == NE
4008 53700 : && partial_subreg_p (op0)
4009 14992521 : && subreg_lowpart_p (op0))
4010 : {
4011 53081 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4012 53081 : rtx tem = record_jump_cond_subreg (inner_mode, op1);
4013 53081 : if (tem)
4014 53081 : record_jump_cond (code, mode, SUBREG_REG (op0), tem);
4015 : }
4016 :
4017 14939077 : if (code == NE
4018 11900 : && partial_subreg_p (op1)
4019 14944741 : && subreg_lowpart_p (op1))
4020 : {
4021 5608 : machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4022 5608 : rtx tem = record_jump_cond_subreg (inner_mode, op0);
4023 5608 : if (tem)
4024 5604 : record_jump_cond (code, mode, SUBREG_REG (op1), tem);
4025 : }
4026 :
4027 : /* Hash both operands. */
4028 :
4029 14939077 : do_not_record = 0;
4030 14939077 : hash_arg_in_memory = 0;
4031 14939077 : op0_hash = HASH (op0, mode);
4032 14939077 : op0_in_memory = hash_arg_in_memory;
4033 :
4034 14939077 : if (do_not_record)
4035 : return;
4036 :
4037 14939077 : do_not_record = 0;
4038 14939077 : hash_arg_in_memory = 0;
4039 14939077 : op1_hash = HASH (op1, mode);
4040 14939077 : op1_in_memory = hash_arg_in_memory;
4041 :
4042 14939077 : if (do_not_record)
4043 : return;
4044 :
4045 : /* Look up both operands. */
4046 14939077 : op0_elt = lookup (op0, op0_hash, mode);
4047 14939077 : op1_elt = lookup (op1, op1_hash, mode);
4048 :
4049 : /* If both operands are already equivalent or if they are not in the
4050 : table but are identical, do nothing. */
4051 14939077 : if ((op0_elt != 0 && op1_elt != 0
4052 1917293 : && op0_elt->first_same_value == op1_elt->first_same_value)
4053 16856231 : || op0 == op1 || rtx_equal_p (op0, op1))
4054 : return;
4055 :
4056 : /* If we aren't setting two things equal all we can do is save this
4057 : comparison. Similarly if this is floating-point. In the latter
4058 : case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4059 : If we record the equality, we might inadvertently delete code
4060 : whose intent was to change -0 to +0. */
4061 :
4062 14938163 : if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4063 : {
4064 9606033 : struct qty_table_elem *ent;
4065 9606033 : int qty;
4066 :
4067 : /* If OP0 is not a register, or if OP1 is neither a register
4068 : or constant, we can't do anything. */
4069 :
4070 9606033 : if (!REG_P (op1))
4071 7609522 : op1 = equiv_constant (op1);
4072 :
4073 9606033 : if (!REG_P (op0) || op1 == 0)
4074 : return;
4075 :
4076 : /* Put OP0 in the hash table if it isn't already. This gives it a
4077 : new quantity number. */
4078 8204880 : if (op0_elt == 0)
4079 : {
4080 3348356 : if (insert_regs (op0, NULL, false))
4081 : {
4082 57681 : rehash_using_reg (op0);
4083 57681 : op0_hash = HASH (op0, mode);
4084 :
4085 : /* If OP0 is contained in OP1, this changes its hash code
4086 : as well. Faster to rehash than to check, except
4087 : for the simple case of a constant. */
4088 57681 : if (! CONSTANT_P (op1))
4089 226 : op1_hash = HASH (op1,mode);
4090 : }
4091 :
4092 3348356 : op0_elt = insert (op0, NULL, op0_hash, mode);
4093 3348356 : op0_elt->in_memory = op0_in_memory;
4094 : }
4095 :
4096 8204880 : qty = REG_QTY (REGNO (op0));
4097 8204880 : ent = &qty_table[qty];
4098 :
4099 8204880 : ent->comparison_code = code;
4100 8204880 : if (REG_P (op1))
4101 : {
4102 : /* Look it up again--in case op0 and op1 are the same. */
4103 1907597 : op1_elt = lookup (op1, op1_hash, mode);
4104 :
4105 : /* Put OP1 in the hash table so it gets a new quantity number. */
4106 1907597 : if (op1_elt == 0)
4107 : {
4108 699228 : if (insert_regs (op1, NULL, false))
4109 : {
4110 212 : rehash_using_reg (op1);
4111 212 : op1_hash = HASH (op1, mode);
4112 : }
4113 :
4114 699228 : op1_elt = insert (op1, NULL, op1_hash, mode);
4115 699228 : op1_elt->in_memory = op1_in_memory;
4116 : }
4117 :
4118 1907597 : ent->comparison_const = NULL_RTX;
4119 1907597 : ent->comparison_qty = REG_QTY (REGNO (op1));
4120 : }
4121 : else
4122 : {
4123 6297283 : ent->comparison_const = op1;
4124 6297283 : ent->comparison_qty = INT_MIN;
4125 : }
4126 :
4127 : return;
4128 : }
4129 :
4130 : /* If either side is still missing an equivalence, make it now,
4131 : then merge the equivalences. */
4132 :
4133 5332130 : if (op0_elt == 0)
4134 : {
4135 3296576 : if (insert_regs (op0, NULL, false))
4136 : {
4137 19333 : rehash_using_reg (op0);
4138 19333 : op0_hash = HASH (op0, mode);
4139 : }
4140 :
4141 3296576 : op0_elt = insert (op0, NULL, op0_hash, mode);
4142 3296576 : op0_elt->in_memory = op0_in_memory;
4143 : }
4144 :
4145 5332130 : if (op1_elt == 0)
4146 : {
4147 4016181 : if (insert_regs (op1, NULL, false))
4148 : {
4149 7718 : rehash_using_reg (op1);
4150 7718 : op1_hash = HASH (op1, mode);
4151 : }
4152 :
4153 4016181 : op1_elt = insert (op1, NULL, op1_hash, mode);
4154 4016181 : op1_elt->in_memory = op1_in_memory;
4155 : }
4156 :
4157 5332130 : merge_equiv_classes (op0_elt, op1_elt);
4158 : }
4159 :
4160 : /* CSE processing for one instruction.
4161 :
4162 : Most "true" common subexpressions are mostly optimized away in GIMPLE,
4163 : but the few that "leak through" are cleaned up by cse_insn, and complex
4164 : addressing modes are often formed here.
4165 :
4166 : The main function is cse_insn, and between here and that function
4167 : a couple of helper functions is defined to keep the size of cse_insn
4168 : within reasonable proportions.
4169 :
4170 : Data is shared between the main and helper functions via STRUCT SET,
4171 : that contains all data related for every set in the instruction that
4172 : is being processed.
4173 :
4174 : Note that cse_main processes all sets in the instruction. Most
4175 : passes in GCC only process simple SET insns or single_set insns, but
4176 : CSE processes insns with multiple sets as well. */
4177 :
4178 : /* Data on one SET contained in the instruction. */
4179 :
4180 : struct set
4181 : {
4182 : /* The SET rtx itself. */
4183 : rtx rtl;
4184 : /* The SET_SRC of the rtx (the original value, if it is changing). */
4185 : rtx src;
4186 : /* The hash-table element for the SET_SRC of the SET. */
4187 : struct table_elt *src_elt;
4188 : /* Hash value for the SET_SRC. */
4189 : unsigned src_hash;
4190 : /* Hash value for the SET_DEST. */
4191 : unsigned dest_hash;
4192 : /* The SET_DEST, with SUBREG, etc., stripped. */
4193 : rtx inner_dest;
4194 : /* Original machine mode, in case it becomes a CONST_INT. */
4195 : machine_mode mode : MACHINE_MODE_BITSIZE;
4196 : /* Nonzero if the SET_SRC is in memory. */
4197 : unsigned int src_in_memory : 1;
4198 : /* Nonzero if the SET_SRC contains something
4199 : whose value cannot be predicted and understood. */
4200 : unsigned int src_volatile : 1;
4201 : /* Nonzero if RTL is an artificial set that has been created to describe
4202 : part of an insn's effect. Zero means that RTL appears directly in
4203 : the insn pattern. */
4204 : unsigned int is_fake_set : 1;
4205 : /* Hash value of constant equivalent for SET_SRC. */
4206 : unsigned src_const_hash;
4207 : /* A constant equivalent for SET_SRC, if any. */
4208 : rtx src_const;
4209 : /* Table entry for constant equivalent for SET_SRC, if any. */
4210 : struct table_elt *src_const_elt;
4211 : /* Table entry for the destination address. */
4212 : struct table_elt *dest_addr_elt;
4213 : };
4214 :
4215 : /* Special handling for (set REG0 REG1) where REG0 is the
4216 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
4217 : be used in the sequel, so (if easily done) change this insn to
4218 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4219 : that computed their value. Then REG1 will become a dead store
4220 : and won't cloud the situation for later optimizations.
4221 :
4222 : Do not make this change if REG1 is a hard register, because it will
4223 : then be used in the sequel and we may be changing a two-operand insn
4224 : into a three-operand insn.
4225 :
4226 : This is the last transformation that cse_insn will try to do. */
4227 :
4228 : static void
4229 138910218 : try_back_substitute_reg (rtx set, rtx_insn *insn)
4230 : {
4231 138910218 : rtx dest = SET_DEST (set);
4232 138910218 : rtx src = SET_SRC (set);
4233 :
4234 138910218 : if (REG_P (dest)
4235 115643318 : && REG_P (src) && ! HARD_REGISTER_P (src)
4236 146385317 : && REGNO_QTY_VALID_P (REGNO (src)))
4237 : {
4238 7475064 : int src_q = REG_QTY (REGNO (src));
4239 7475064 : struct qty_table_elem *src_ent = &qty_table[src_q];
4240 :
4241 7475064 : if (src_ent->first_reg == REGNO (dest))
4242 : {
4243 : /* Scan for the previous nonnote insn, but stop at a basic
4244 : block boundary. */
4245 1817051 : rtx_insn *prev = insn;
4246 1817051 : rtx_insn *bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
4247 4419562 : do
4248 : {
4249 4419562 : prev = PREV_INSN (prev);
4250 : }
4251 4419562 : while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
4252 :
4253 : /* Do not swap the registers around if the previous instruction
4254 : attaches a REG_EQUIV note to REG1.
4255 :
4256 : ??? It's not entirely clear whether we can transfer a REG_EQUIV
4257 : from the pseudo that originally shadowed an incoming argument
4258 : to another register. Some uses of REG_EQUIV might rely on it
4259 : being attached to REG1 rather than REG2.
4260 :
4261 : This section previously turned the REG_EQUIV into a REG_EQUAL
4262 : note. We cannot do that because REG_EQUIV may provide an
4263 : uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4264 1817051 : if (NONJUMP_INSN_P (prev)
4265 1099965 : && GET_CODE (PATTERN (prev)) == SET
4266 801050 : && SET_DEST (PATTERN (prev)) == src
4267 2061029 : && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
4268 : {
4269 243851 : rtx note;
4270 :
4271 243851 : validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
4272 243851 : validate_change (insn, &SET_DEST (set), src, 1);
4273 243851 : validate_change (insn, &SET_SRC (set), dest, 1);
4274 243851 : apply_change_group ();
4275 :
4276 : /* If INSN has a REG_EQUAL note, and this note mentions
4277 : REG0, then we must delete it, because the value in
4278 : REG0 has changed. If the note's value is REG1, we must
4279 : also delete it because that is now this insn's dest. */
4280 243851 : note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4281 243851 : if (note != 0
4282 243851 : && (reg_mentioned_p (dest, XEXP (note, 0))
4283 1470 : || rtx_equal_p (src, XEXP (note, 0))))
4284 7 : remove_note (insn, note);
4285 :
4286 : /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4287 243851 : note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4288 243851 : if (note != 0)
4289 : {
4290 0 : remove_note (insn, note);
4291 0 : gcc_assert (!find_reg_note (prev, REG_ARGS_SIZE, NULL_RTX));
4292 0 : set_unique_reg_note (prev, REG_ARGS_SIZE, XEXP (note, 0));
4293 : }
4294 : }
4295 : }
4296 : }
4297 138910218 : }
4298 :
4299 : /* Add an entry containing RTL X into SETS. IS_FAKE_SET is true if X is
4300 : an artificial set that has been created to describe part of an insn's
4301 : effect. */
4302 : static inline void
4303 198221003 : add_to_set (vec<struct set> *sets, rtx x, bool is_fake_set)
4304 : {
4305 198221003 : struct set entry = {};
4306 198221003 : entry.rtl = x;
4307 198221003 : entry.is_fake_set = is_fake_set;
4308 198221003 : sets->safe_push (entry);
4309 198221003 : }
4310 :
4311 : /* Record all the SETs in this instruction into SETS_PTR,
4312 : and return the number of recorded sets. */
4313 : static int
4314 414663369 : find_sets_in_insn (rtx_insn *insn, vec<struct set> *psets)
4315 : {
4316 414663369 : rtx x = PATTERN (insn);
4317 :
4318 414663369 : if (GET_CODE (x) == SET)
4319 : {
4320 : /* Ignore SETs that are unconditional jumps.
4321 : They never need cse processing, so this does not hurt.
4322 : The reason is not efficiency but rather
4323 : so that we can test at the end for instructions
4324 : that have been simplified to unconditional jumps
4325 : and not be misled by unchanged instructions
4326 : that were unconditional jumps to begin with. */
4327 172313975 : if (SET_DEST (x) == pc_rtx
4328 20410171 : && GET_CODE (SET_SRC (x)) == LABEL_REF)
4329 : ;
4330 : /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4331 : The hard function value register is used only once, to copy to
4332 : someplace else, so it isn't worth cse'ing. */
4333 172313753 : else if (GET_CODE (SET_SRC (x)) == CALL)
4334 : ;
4335 165046168 : else if (GET_CODE (SET_SRC (x)) == CONST_VECTOR
4336 678524 : && GET_MODE_CLASS (GET_MODE (SET_SRC (x))) != MODE_VECTOR_BOOL
4337 : /* Prevent duplicates from being generated if the type is a V1
4338 : type and a subreg. Folding this will result in the same
4339 : element as folding x itself. */
4340 165724692 : && !(SUBREG_P (SET_DEST (x))
4341 70 : && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x))), 1)))
4342 : {
4343 : /* First register the vector itself. */
4344 678523 : add_to_set (psets, x, false);
4345 678523 : rtx src = SET_SRC (x);
4346 : /* Go over the constants of the CONST_VECTOR in forward order, to
4347 : put them in the same order in the SETS array. */
4348 1357196 : for (unsigned i = 0; i < const_vector_encoded_nelts (src) ; i++)
4349 : {
4350 : /* These are templates and don't actually get emitted but are
4351 : used to tell CSE how to get to a particular constant. */
4352 678673 : rtx y = simplify_gen_vec_select (SET_DEST (x), i);
4353 678673 : gcc_assert (y);
4354 678673 : if (!REG_P (y))
4355 : {
4356 676970 : rtx set = gen_rtx_SET (y, CONST_VECTOR_ELT (src, i));
4357 676970 : add_to_set (psets, set, true);
4358 : }
4359 : }
4360 : }
4361 : else
4362 164367645 : add_to_set (psets, x, false);
4363 : }
4364 242349394 : else if (GET_CODE (x) == PARALLEL)
4365 : {
4366 31575535 : int i, lim = XVECLEN (x, 0);
4367 :
4368 : /* Go over the expressions of the PARALLEL in forward order, to
4369 : put them in the same order in the SETS array. */
4370 96117728 : for (i = 0; i < lim; i++)
4371 : {
4372 64542193 : rtx y = XVECEXP (x, 0, i);
4373 64542193 : if (GET_CODE (y) == SET)
4374 : {
4375 : /* As above, we ignore unconditional jumps and call-insns and
4376 : ignore the result of apply_change_group. */
4377 32508023 : if (SET_DEST (y) == pc_rtx
4378 19545 : && GET_CODE (SET_SRC (y)) == LABEL_REF)
4379 : ;
4380 32508023 : else if (GET_CODE (SET_SRC (y)) == CALL)
4381 : ;
4382 : else
4383 32497865 : add_to_set (psets, y, false);
4384 : }
4385 : }
4386 : }
4387 :
4388 414663369 : return psets->length ();
4389 : }
4390 :
4391 : /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4392 :
4393 : static void
4394 84829 : canon_asm_operands (rtx x, rtx_insn *insn)
4395 : {
4396 114449 : for (int i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4397 : {
4398 29620 : rtx input = ASM_OPERANDS_INPUT (x, i);
4399 29620 : if (!(REG_P (input) && HARD_REGISTER_P (input)))
4400 : {
4401 29234 : input = canon_reg (input, insn);
4402 29234 : validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4403 : }
4404 : }
4405 84829 : }
4406 :
4407 : /* Where possible, substitute every register reference in the N_SETS
4408 : number of SETS in INSN with the canonical register.
4409 :
4410 : Register canonicalization propagatest the earliest register (i.e.
4411 : one that is set before INSN) with the same value. This is a very
4412 : useful, simple form of CSE, to clean up warts from expanding GIMPLE
4413 : to RTL. For instance, a CONST for an address is usually expanded
4414 : multiple times to loads into different registers, thus creating many
4415 : subexpressions of the form:
4416 :
4417 : (set (reg1) (some_const))
4418 : (set (mem (... reg1 ...) (thing)))
4419 : (set (reg2) (some_const))
4420 : (set (mem (... reg2 ...) (thing)))
4421 :
4422 : After canonicalizing, the code takes the following form:
4423 :
4424 : (set (reg1) (some_const))
4425 : (set (mem (... reg1 ...) (thing)))
4426 : (set (reg2) (some_const))
4427 : (set (mem (... reg1 ...) (thing)))
4428 :
4429 : The set to reg2 is now trivially dead, and the memory reference (or
4430 : address, or whatever) may be a candidate for further CSEing.
4431 :
4432 : In this function, the result of apply_change_group can be ignored;
4433 : see canon_reg. */
4434 :
4435 : static void
4436 414663369 : canonicalize_insn (rtx_insn *insn, vec<struct set> *psets)
4437 : {
4438 414663369 : vec<struct set> sets = *psets;
4439 414663369 : int n_sets = sets.length ();
4440 414663369 : rtx tem;
4441 414663369 : rtx x = PATTERN (insn);
4442 414663369 : int i;
4443 :
4444 414663369 : if (CALL_P (insn))
4445 : {
4446 46742339 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4447 30957637 : if (GET_CODE (XEXP (tem, 0)) != SET)
4448 30742247 : XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4449 : }
4450 :
4451 414663369 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
4452 : {
4453 7267585 : canon_reg (SET_SRC (x), insn);
4454 7267585 : apply_change_group ();
4455 7267585 : fold_rtx (SET_SRC (x), insn);
4456 : }
4457 407395784 : else if (GET_CODE (x) == CLOBBER)
4458 : {
4459 : /* If we clobber memory, canon the address.
4460 : This does nothing when a register is clobbered
4461 : because we have already invalidated the reg. */
4462 67875 : if (MEM_P (XEXP (x, 0)))
4463 12950 : canon_reg (XEXP (x, 0), insn);
4464 : }
4465 407327909 : else if (GET_CODE (x) == USE
4466 407327909 : && ! (REG_P (XEXP (x, 0))
4467 1287522 : && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4468 : /* Canonicalize a USE of a pseudo register or memory location. */
4469 0 : canon_reg (x, insn);
4470 407327909 : else if (GET_CODE (x) == ASM_OPERANDS)
4471 18 : canon_asm_operands (x, insn);
4472 407327891 : else if (GET_CODE (x) == CALL)
4473 : {
4474 8016965 : canon_reg (x, insn);
4475 8016965 : apply_change_group ();
4476 8016965 : fold_rtx (x, insn);
4477 : }
4478 399310926 : else if (DEBUG_INSN_P (insn))
4479 200693367 : canon_reg (PATTERN (insn), insn);
4480 198617559 : else if (GET_CODE (x) == PARALLEL)
4481 : {
4482 96117728 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4483 : {
4484 64542193 : rtx y = XVECEXP (x, 0, i);
4485 64542193 : if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
4486 : {
4487 10158 : canon_reg (SET_SRC (y), insn);
4488 10158 : apply_change_group ();
4489 10158 : fold_rtx (SET_SRC (y), insn);
4490 : }
4491 64532035 : else if (GET_CODE (y) == CLOBBER)
4492 : {
4493 31191094 : if (MEM_P (XEXP (y, 0)))
4494 62725 : canon_reg (XEXP (y, 0), insn);
4495 : }
4496 33340941 : else if (GET_CODE (y) == USE
4497 33340941 : && ! (REG_P (XEXP (y, 0))
4498 192306 : && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4499 229157 : canon_reg (y, insn);
4500 33111784 : else if (GET_CODE (y) == ASM_OPERANDS)
4501 84811 : canon_asm_operands (y, insn);
4502 33026973 : else if (GET_CODE (y) == CALL)
4503 : {
4504 489994 : canon_reg (y, insn);
4505 489994 : apply_change_group ();
4506 489994 : fold_rtx (y, insn);
4507 : }
4508 : }
4509 : }
4510 :
4511 195051496 : if (n_sets == 1 && REG_NOTES (insn) != 0
4512 540548203 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4513 : {
4514 : /* We potentially will process this insn many times. Therefore,
4515 : drop the REG_EQUAL note if it is equal to the SET_SRC of the
4516 : unique set in INSN.
4517 :
4518 : Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4519 : because cse_insn handles those specially. */
4520 9111030 : if (GET_CODE (SET_DEST (sets[0].rtl)) != STRICT_LOW_PART
4521 9111030 : && rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
4522 180913 : remove_note (insn, tem);
4523 : else
4524 : {
4525 8930117 : canon_reg (XEXP (tem, 0), insn);
4526 8930117 : apply_change_group ();
4527 8930117 : XEXP (tem, 0) = fold_rtx (XEXP (tem, 0), insn);
4528 8930117 : df_notes_rescan (insn);
4529 : }
4530 : }
4531 :
4532 : /* Canonicalize sources and addresses of destinations.
4533 : We do this in a separate pass to avoid problems when a MATCH_DUP is
4534 : present in the insn pattern. In that case, we want to ensure that
4535 : we don't break the duplicate nature of the pattern. So we will replace
4536 : both operands at the same time. Otherwise, we would fail to find an
4537 : equivalent substitution in the loop calling validate_change below.
4538 :
4539 : We used to suppress canonicalization of DEST if it appears in SRC,
4540 : but we don't do this any more. */
4541 :
4542 612884372 : for (i = 0; i < n_sets; i++)
4543 : {
4544 198221003 : rtx dest = SET_DEST (sets[i].rtl);
4545 198221003 : rtx src = SET_SRC (sets[i].rtl);
4546 198221003 : rtx new_rtx = canon_reg (src, insn);
4547 :
4548 198221003 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4549 :
4550 198221003 : if (GET_CODE (dest) == ZERO_EXTRACT)
4551 : {
4552 4020 : validate_change (insn, &XEXP (dest, 1),
4553 : canon_reg (XEXP (dest, 1), insn), 1);
4554 4020 : validate_change (insn, &XEXP (dest, 2),
4555 : canon_reg (XEXP (dest, 2), insn), 1);
4556 : }
4557 :
4558 199887469 : while (GET_CODE (dest) == SUBREG
4559 198238576 : || GET_CODE (dest) == ZERO_EXTRACT
4560 398122025 : || GET_CODE (dest) == STRICT_LOW_PART)
4561 1666466 : dest = XEXP (dest, 0);
4562 :
4563 198221003 : if (MEM_P (dest))
4564 29017211 : canon_reg (dest, insn);
4565 : }
4566 :
4567 : /* Now that we have done all the replacements, we can apply the change
4568 : group and see if they all work. Note that this will cause some
4569 : canonicalizations that would have worked individually not to be applied
4570 : because some other canonicalization didn't work, but this should not
4571 : occur often.
4572 :
4573 : The result of apply_change_group can be ignored; see canon_reg. */
4574 :
4575 414663369 : apply_change_group ();
4576 414663369 : }
4577 :
4578 : /* Main function of CSE.
4579 : First simplify sources and addresses of all assignments
4580 : in the instruction, using previously-computed equivalents values.
4581 : Then install the new sources and destinations in the table
4582 : of available values. */
4583 :
4584 : static void
4585 414663369 : cse_insn (rtx_insn *insn)
4586 : {
4587 414663369 : rtx x = PATTERN (insn);
4588 414663369 : int i;
4589 414663369 : rtx tem;
4590 414663369 : int n_sets = 0;
4591 :
4592 414663369 : rtx src_eqv = 0;
4593 414663369 : struct table_elt *src_eqv_elt = 0;
4594 414663369 : int src_eqv_volatile = 0;
4595 414663369 : int src_eqv_in_memory = 0;
4596 414663369 : unsigned src_eqv_hash = 0;
4597 :
4598 414663369 : this_insn = insn;
4599 :
4600 : /* Find all regs explicitly clobbered in this insn,
4601 : to ensure they are not replaced with any other regs
4602 : elsewhere in this insn. */
4603 414663369 : invalidate_from_sets_and_clobbers (insn);
4604 :
4605 : /* Record all the SETs in this instruction. */
4606 414663369 : auto_vec<struct set, 8> sets;
4607 414663369 : n_sets = find_sets_in_insn (insn, (vec<struct set>*)&sets);
4608 :
4609 : /* Substitute the canonical register where possible. */
4610 414663369 : canonicalize_insn (insn, (vec<struct set>*)&sets);
4611 :
4612 : /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4613 : if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4614 : latter condition is necessary because SRC_EQV is handled specially for
4615 : this case, and if it isn't set, then there will be no equivalence
4616 : for the destination. */
4617 195051496 : if (n_sets == 1 && REG_NOTES (insn) != 0
4618 540406075 : && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
4619 : {
4620 :
4621 8930117 : if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT
4622 8930117 : && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4623 16292 : || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4624 8913825 : src_eqv = copy_rtx (XEXP (tem, 0));
4625 : /* If DEST is of the form ZERO_EXTACT, as in:
4626 : (set (zero_extract:SI (reg:SI 119)
4627 : (const_int 16 [0x10])
4628 : (const_int 16 [0x10]))
4629 : (const_int 51154 [0xc7d2]))
4630 : REG_EQUAL note will specify the value of register (reg:SI 119) at this
4631 : point. Note that this is different from SRC_EQV. We can however
4632 : calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4633 16292 : else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
4634 0 : && CONST_INT_P (XEXP (tem, 0))
4635 0 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
4636 16292 : && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
4637 : {
4638 0 : rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
4639 : /* This is the mode of XEXP (tem, 0) as well. */
4640 0 : scalar_int_mode dest_mode
4641 0 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
4642 0 : rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
4643 0 : rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
4644 0 : HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
4645 0 : HOST_WIDE_INT mask;
4646 0 : unsigned int shift;
4647 0 : if (BITS_BIG_ENDIAN)
4648 : shift = (GET_MODE_PRECISION (dest_mode)
4649 : - INTVAL (pos) - INTVAL (width));
4650 : else
4651 0 : shift = INTVAL (pos);
4652 0 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
4653 : mask = HOST_WIDE_INT_M1;
4654 : else
4655 0 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
4656 0 : val = (val >> shift) & mask;
4657 0 : src_eqv = GEN_INT (val);
4658 : }
4659 : }
4660 :
4661 : /* Set sets[i].src_elt to the class each source belongs to.
4662 : Detect assignments from or to volatile things
4663 : and set set[i] to zero so they will be ignored
4664 : in the rest of this function.
4665 :
4666 : Nothing in this loop changes the hash table or the register chains. */
4667 :
4668 612884380 : for (i = 0; i < n_sets; i++)
4669 : {
4670 198221011 : bool repeat = false;
4671 198221011 : bool noop_insn = false;
4672 198221011 : rtx src, dest;
4673 198221011 : rtx src_folded;
4674 198221011 : struct table_elt *elt = 0, *p;
4675 198221011 : machine_mode mode;
4676 198221011 : rtx src_eqv_here;
4677 198221011 : rtx src_const = 0;
4678 198221011 : rtx src_related = 0;
4679 198221011 : rtx dest_related = 0;
4680 198221011 : bool src_related_is_const_anchor = false;
4681 198221011 : struct table_elt *src_const_elt = 0;
4682 198221011 : int src_cost = MAX_COST;
4683 198221011 : int src_eqv_cost = MAX_COST;
4684 198221011 : int src_folded_cost = MAX_COST;
4685 198221011 : int src_related_cost = MAX_COST;
4686 198221011 : int src_elt_cost = MAX_COST;
4687 198221011 : int src_regcost = MAX_COST;
4688 198221011 : int src_eqv_regcost = MAX_COST;
4689 198221011 : int src_folded_regcost = MAX_COST;
4690 198221011 : int src_related_regcost = MAX_COST;
4691 198221011 : int src_elt_regcost = MAX_COST;
4692 198221011 : scalar_int_mode int_mode;
4693 198221011 : bool is_fake_set = sets[i].is_fake_set;
4694 :
4695 198221011 : dest = SET_DEST (sets[i].rtl);
4696 198221011 : src = SET_SRC (sets[i].rtl);
4697 :
4698 : /* If SRC is a constant that has no machine mode,
4699 : hash it with the destination's machine mode.
4700 : This way we can keep different modes separate. */
4701 :
4702 198221011 : mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4703 198221011 : sets[i].mode = mode;
4704 :
4705 198221011 : if (!is_fake_set && src_eqv)
4706 : {
4707 8913825 : machine_mode eqvmode = mode;
4708 8913825 : if (GET_CODE (dest) == STRICT_LOW_PART)
4709 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4710 8913825 : do_not_record = 0;
4711 8913825 : hash_arg_in_memory = 0;
4712 8913825 : src_eqv_hash = HASH (src_eqv, eqvmode);
4713 :
4714 : /* Find the equivalence class for the equivalent expression. */
4715 :
4716 8913825 : if (!do_not_record)
4717 8911567 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4718 :
4719 8913825 : src_eqv_volatile = do_not_record;
4720 8913825 : src_eqv_in_memory = hash_arg_in_memory;
4721 : }
4722 :
4723 : /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4724 : value of the INNER register, not the destination. So it is not
4725 : a valid substitution for the source. But save it for later. */
4726 198221011 : if (is_fake_set || GET_CODE (dest) == STRICT_LOW_PART)
4727 : src_eqv_here = 0;
4728 : else
4729 198221011 : src_eqv_here = src_eqv;
4730 :
4731 : /* Simplify and foldable subexpressions in SRC. Then get the fully-
4732 : simplified result, which may not necessarily be valid. */
4733 198221011 : src_folded = fold_rtx (src, NULL);
4734 :
4735 : #if 0
4736 : /* ??? This caused bad code to be generated for the m68k port with -O2.
4737 : Suppose src is (CONST_INT -1), and that after truncation src_folded
4738 : is (CONST_INT 3). Suppose src_folded is then used for src_const.
4739 : At the end we will add src and src_const to the same equivalence
4740 : class. We now have 3 and -1 on the same equivalence class. This
4741 : causes later instructions to be mis-optimized. */
4742 : /* If storing a constant in a bitfield, pre-truncate the constant
4743 : so we will be able to record it later. */
4744 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4745 : {
4746 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4747 :
4748 : if (CONST_INT_P (src)
4749 : && CONST_INT_P (width)
4750 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4751 : && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4752 : src_folded
4753 : = GEN_INT (INTVAL (src) & ((HOST_WIDE_INT_1
4754 : << INTVAL (width)) - 1));
4755 : }
4756 : #endif
4757 :
4758 : /* Compute SRC's hash code, and also notice if it
4759 : should not be recorded at all. In that case,
4760 : prevent any further processing of this assignment.
4761 :
4762 : We set DO_NOT_RECORD if the destination has a REG_UNUSED note.
4763 : This avoids getting the source register into the tables, where it
4764 : may be invalidated later (via REG_QTY), then trigger an ICE upon
4765 : re-insertion.
4766 :
4767 : This is only a problem in multi-set insns. If it were a single
4768 : set the dead copy would have been removed. If the RHS were anything
4769 : but a simple REG, then we won't call insert_regs and thus there's
4770 : no potential for triggering the ICE. */
4771 396442022 : do_not_record = (REG_P (dest)
4772 147123198 : && REG_P (src)
4773 233350011 : && find_reg_note (insn, REG_UNUSED, dest));
4774 198221011 : hash_arg_in_memory = 0;
4775 :
4776 198221011 : sets[i].src = src;
4777 198221011 : sets[i].src_hash = HASH (src, mode);
4778 198221011 : sets[i].src_volatile = do_not_record;
4779 198221011 : sets[i].src_in_memory = hash_arg_in_memory;
4780 :
4781 : /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4782 : a pseudo, do not record SRC. Using SRC as a replacement for
4783 : anything else will be incorrect in that situation. Note that
4784 : this usually occurs only for stack slots, in which case all the
4785 : RTL would be referring to SRC, so we don't lose any optimization
4786 : opportunities by not having SRC in the hash table. */
4787 :
4788 198221011 : if (MEM_P (src)
4789 25332046 : && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4790 927149 : && REG_P (dest)
4791 199148160 : && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4792 927149 : sets[i].src_volatile = 1;
4793 :
4794 197293862 : else if (GET_CODE (src) == ASM_OPERANDS
4795 213679 : && GET_CODE (x) == PARALLEL)
4796 : {
4797 : /* Do not record result of a non-volatile inline asm with
4798 : more than one result. */
4799 213655 : if (n_sets > 1)
4800 170498 : sets[i].src_volatile = 1;
4801 :
4802 213655 : int j, lim = XVECLEN (x, 0);
4803 1083417 : for (j = 0; j < lim; j++)
4804 : {
4805 871548 : rtx y = XVECEXP (x, 0, j);
4806 : /* And do not record result of a non-volatile inline asm
4807 : with "memory" clobber. */
4808 871548 : if (GET_CODE (y) == CLOBBER && MEM_P (XEXP (y, 0)))
4809 : {
4810 1786 : sets[i].src_volatile = 1;
4811 1786 : break;
4812 : }
4813 : }
4814 : }
4815 :
4816 : #if 0
4817 : /* It is no longer clear why we used to do this, but it doesn't
4818 : appear to still be needed. So let's try without it since this
4819 : code hurts cse'ing widened ops. */
4820 : /* If source is a paradoxical subreg (such as QI treated as an SI),
4821 : treat it as volatile. It may do the work of an SI in one context
4822 : where the extra bits are not being used, but cannot replace an SI
4823 : in general. */
4824 : if (paradoxical_subreg_p (src))
4825 : sets[i].src_volatile = 1;
4826 : #endif
4827 :
4828 : /* Locate all possible equivalent forms for SRC. Try to replace
4829 : SRC in the insn with each cheaper equivalent.
4830 :
4831 : We have the following types of equivalents: SRC itself, a folded
4832 : version, a value given in a REG_EQUAL note, or a value related
4833 : to a constant.
4834 :
4835 : Each of these equivalents may be part of an additional class
4836 : of equivalents (if more than one is in the table, they must be in
4837 : the same class; we check for this).
4838 :
4839 : If the source is volatile, we don't do any table lookups.
4840 :
4841 : We note any constant equivalent for possible later use in a
4842 : REG_NOTE. */
4843 :
4844 198221011 : if (!sets[i].src_volatile)
4845 163553017 : elt = lookup (src, sets[i].src_hash, mode);
4846 :
4847 198221011 : sets[i].src_elt = elt;
4848 :
4849 198221011 : if (elt && src_eqv_here && src_eqv_elt)
4850 : {
4851 3030836 : if (elt->first_same_value != src_eqv_elt->first_same_value)
4852 : {
4853 : /* The REG_EQUAL is indicating that two formerly distinct
4854 : classes are now equivalent. So merge them. */
4855 9903 : merge_equiv_classes (elt, src_eqv_elt);
4856 9903 : src_eqv_hash = HASH (src_eqv, elt->mode);
4857 9903 : src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4858 : }
4859 :
4860 : src_eqv_here = 0;
4861 : }
4862 :
4863 194988503 : else if (src_eqv_elt)
4864 : elt = src_eqv_elt;
4865 :
4866 : /* Try to find a constant somewhere and record it in `src_const'.
4867 : Record its table element, if any, in `src_const_elt'. Look in
4868 : any known equivalences first. (If the constant is not in the
4869 : table, also set `sets[i].src_const_hash'). */
4870 194814054 : if (elt)
4871 94588348 : for (p = elt->first_same_value; p; p = p->next_same_value)
4872 76084264 : if (p->is_const)
4873 : {
4874 16580450 : src_const = p->exp;
4875 16580450 : src_const_elt = elt;
4876 16580450 : break;
4877 : }
4878 :
4879 35084534 : if (src_const == 0
4880 181640561 : && (CONSTANT_P (src_folded)
4881 : /* Consider (minus (label_ref L1) (label_ref L2)) as
4882 : "constant" here so we will record it. This allows us
4883 : to fold switch statements when an ADDR_DIFF_VEC is used. */
4884 154898616 : || (GET_CODE (src_folded) == MINUS
4885 1933162 : && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4886 95 : && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4887 : src_const = src_folded, src_const_elt = elt;
4888 171478980 : else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4889 423372 : src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4890 :
4891 : /* If we don't know if the constant is in the table, get its
4892 : hash code and look it up. */
4893 198221011 : if (src_const && src_const_elt == 0)
4894 : {
4895 27164396 : sets[i].src_const_hash = HASH (src_const, mode);
4896 27164396 : src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4897 : }
4898 :
4899 198221011 : sets[i].src_const = src_const;
4900 198221011 : sets[i].src_const_elt = src_const_elt;
4901 :
4902 : /* If the constant and our source are both in the table, mark them as
4903 : equivalent. Otherwise, if a constant is in the table but the source
4904 : isn't, set ELT to it. */
4905 198221011 : if (src_const_elt && elt
4906 16581457 : && src_const_elt->first_same_value != elt->first_same_value)
4907 0 : merge_equiv_classes (elt, src_const_elt);
4908 198221011 : else if (src_const_elt && elt == 0)
4909 198221011 : elt = src_const_elt;
4910 :
4911 : /* See if there is a register linearly related to a constant
4912 : equivalent of SRC. */
4913 198221011 : if (src_const
4914 43745853 : && (GET_CODE (src_const) == CONST
4915 43100710 : || (src_const_elt && src_const_elt->related_value != 0)))
4916 : {
4917 736161 : src_related = use_related_value (src_const, src_const_elt);
4918 736161 : if (src_related)
4919 : {
4920 224582 : struct table_elt *src_related_elt
4921 224582 : = lookup (src_related, HASH (src_related, mode), mode);
4922 224582 : if (src_related_elt && elt)
4923 : {
4924 1842 : if (elt->first_same_value
4925 1842 : != src_related_elt->first_same_value)
4926 : /* This can occur when we previously saw a CONST
4927 : involving a SYMBOL_REF and then see the SYMBOL_REF
4928 : twice. Merge the involved classes. */
4929 844 : merge_equiv_classes (elt, src_related_elt);
4930 :
4931 : src_related = 0;
4932 198221011 : src_related_elt = 0;
4933 : }
4934 222740 : else if (src_related_elt && elt == 0)
4935 6821 : elt = src_related_elt;
4936 : }
4937 : }
4938 :
4939 : /* See if we have a CONST_INT that is already in a register in a
4940 : wider mode. */
4941 :
4942 43523113 : if (src_const && src_related == 0 && CONST_INT_P (src_const)
4943 18895130 : && is_int_mode (mode, &int_mode)
4944 219147816 : && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD)
4945 : {
4946 8093416 : opt_scalar_int_mode wider_mode_iter;
4947 20817130 : FOR_EACH_WIDER_MODE (wider_mode_iter, int_mode)
4948 : {
4949 20817130 : scalar_int_mode wider_mode = wider_mode_iter.require ();
4950 21567791 : if (GET_MODE_PRECISION (wider_mode) > BITS_PER_WORD)
4951 : break;
4952 :
4953 12963855 : struct table_elt *const_elt
4954 12963855 : = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4955 :
4956 12963855 : if (const_elt == 0)
4957 12279839 : continue;
4958 :
4959 684016 : for (const_elt = const_elt->first_same_value;
4960 2097901 : const_elt; const_elt = const_elt->next_same_value)
4961 1654026 : if (REG_P (const_elt->exp))
4962 : {
4963 240141 : src_related = gen_lowpart (int_mode, const_elt->exp);
4964 240141 : break;
4965 : }
4966 :
4967 684016 : if (src_related != 0)
4968 : break;
4969 : }
4970 : }
4971 :
4972 : /* Another possibility is that we have an AND with a constant in
4973 : a mode narrower than a word. If so, it might have been generated
4974 : as part of an "if" which would narrow the AND. If we already
4975 : have done the AND in a wider mode, we can use a SUBREG of that
4976 : value. */
4977 :
4978 193907580 : if (flag_expensive_optimizations && ! src_related
4979 331316538 : && is_a <scalar_int_mode> (mode, &int_mode)
4980 133095527 : && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4981 199517043 : && GET_MODE_SIZE (int_mode) < UNITS_PER_WORD)
4982 : {
4983 765920 : opt_scalar_int_mode tmode_iter;
4984 765920 : rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4985 :
4986 2255639 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
4987 : {
4988 2255639 : scalar_int_mode tmode = tmode_iter.require ();
4989 4664837 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
4990 : break;
4991 :
4992 1489782 : rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4993 1489782 : struct table_elt *larger_elt;
4994 :
4995 1489782 : if (inner)
4996 : {
4997 1480224 : PUT_MODE (new_and, tmode);
4998 1480224 : XEXP (new_and, 0) = inner;
4999 1480224 : larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5000 1480224 : if (larger_elt == 0)
5001 1480161 : continue;
5002 :
5003 63 : for (larger_elt = larger_elt->first_same_value;
5004 63 : larger_elt; larger_elt = larger_elt->next_same_value)
5005 63 : if (REG_P (larger_elt->exp))
5006 : {
5007 63 : src_related
5008 63 : = gen_lowpart (int_mode, larger_elt->exp);
5009 63 : break;
5010 : }
5011 :
5012 63 : if (src_related)
5013 : break;
5014 : }
5015 : }
5016 : }
5017 :
5018 : /* If SRC_EQV is a CONST_INT, try looking up some related
5019 : constants (logical and arithmetic negation). Those may
5020 : ultimately be cheaper to re-use. */
5021 198221011 : if (GET_CODE (src) != CONST_INT
5022 : && GET_CODE (src) != REG
5023 : && GET_CODE (src) != SUBREG
5024 122923482 : && src_const
5025 16273834 : && GET_CODE (src_const) == CONST_INT)
5026 : {
5027 73484 : rtx trial_rtx = GEN_INT (~UINTVAL (src_const));
5028 73484 : struct table_elt *tmp = lookup (trial_rtx, HASH (trial_rtx, mode), mode);
5029 73484 : rtx_code code = NOT;
5030 73484 : if (!tmp)
5031 : {
5032 72361 : trial_rtx = GEN_INT (-UINTVAL (src_const));
5033 72361 : tmp = lookup (trial_rtx, HASH (trial_rtx, mode), mode);
5034 72361 : code = NEG;
5035 : }
5036 :
5037 72361 : if (tmp)
5038 : {
5039 13758 : src_related = gen_rtx_fmt_e (code, mode, tmp->first_same_value->exp);
5040 13758 : src_eqv_here = src_related;
5041 13758 : src_related_is_const_anchor = true;
5042 : }
5043 :
5044 : }
5045 :
5046 : /* See if a MEM has already been loaded with a widening operation;
5047 : if it has, we can use a subreg of that. Many CISC machines
5048 : also have such operations, but this is only likely to be
5049 : beneficial on these machines. */
5050 :
5051 198221011 : rtx_code extend_op;
5052 198221011 : if (flag_expensive_optimizations && src_related == 0
5053 : && MEM_P (src) && ! do_not_record
5054 : && is_a <scalar_int_mode> (mode, &int_mode)
5055 : && (extend_op = load_extend_op (int_mode)) != UNKNOWN)
5056 : {
5057 : #if GCC_VERSION >= 5000
5058 : struct rtx_def memory_extend_buf;
5059 : rtx memory_extend_rtx = &memory_extend_buf;
5060 : #else
5061 : /* Workaround GCC < 5 bug, fixed in r5-3834 as part of PR63362
5062 : fix. */
5063 : alignas (rtx_def) unsigned char memory_extended_buf[sizeof (rtx_def)];
5064 : rtx memory_extend_rtx = (rtx) &memory_extended_buf[0];
5065 : #endif
5066 :
5067 : /* Set what we are trying to extend and the operation it might
5068 : have been extended with. */
5069 : memset (memory_extend_rtx, 0, sizeof (*memory_extend_rtx));
5070 : PUT_CODE (memory_extend_rtx, extend_op);
5071 : XEXP (memory_extend_rtx, 0) = src;
5072 :
5073 : opt_scalar_int_mode tmode_iter;
5074 : FOR_EACH_WIDER_MODE (tmode_iter, int_mode)
5075 : {
5076 : struct table_elt *larger_elt;
5077 :
5078 : scalar_int_mode tmode = tmode_iter.require ();
5079 : if (GET_MODE_SIZE (tmode) > UNITS_PER_WORD)
5080 : break;
5081 :
5082 : PUT_MODE (memory_extend_rtx, tmode);
5083 : larger_elt = lookup (memory_extend_rtx,
5084 : HASH (memory_extend_rtx, tmode), tmode);
5085 : if (larger_elt == 0)
5086 : continue;
5087 :
5088 : for (larger_elt = larger_elt->first_same_value;
5089 : larger_elt; larger_elt = larger_elt->next_same_value)
5090 : if (REG_P (larger_elt->exp))
5091 : {
5092 : src_related = gen_lowpart (int_mode, larger_elt->exp);
5093 : break;
5094 : }
5095 :
5096 : if (src_related)
5097 : break;
5098 : }
5099 : }
5100 :
5101 : /* Try to express the constant using a register+offset expression
5102 : derived from a constant anchor. */
5103 :
5104 198221011 : if (targetm.const_anchor
5105 0 : && !src_related
5106 0 : && src_const
5107 0 : && GET_CODE (src_const) == CONST_INT)
5108 : {
5109 0 : src_related = try_const_anchors (src_const, mode);
5110 0 : src_related_is_const_anchor = src_related != NULL_RTX;
5111 : }
5112 :
5113 : /* Try to re-materialize a vec_dup with an existing constant. */
5114 198221011 : rtx src_elt;
5115 5896707 : if ((!src_eqv_here || CONSTANT_P (src_eqv_here))
5116 198221011 : && const_vec_duplicate_p (src, &src_elt))
5117 : {
5118 682028 : machine_mode const_mode = GET_MODE_INNER (GET_MODE (src));
5119 682028 : struct table_elt *related_elt
5120 682028 : = lookup (src_elt, HASH (src_elt, const_mode), const_mode);
5121 682028 : if (related_elt)
5122 : {
5123 273885 : for (related_elt = related_elt->first_same_value;
5124 1804865 : related_elt; related_elt = related_elt->next_same_value)
5125 1562703 : if (REG_P (related_elt->exp))
5126 : {
5127 : /* We don't need to compare costs with an existing (constant)
5128 : src_eqv_here, since any such src_eqv_here should already be
5129 : available in src_const. */
5130 31723 : src_eqv_here
5131 31723 : = gen_rtx_VEC_DUPLICATE (GET_MODE (src),
5132 : related_elt->exp);
5133 31723 : break;
5134 : }
5135 : }
5136 : }
5137 :
5138 198221011 : if (src == src_folded)
5139 193823631 : src_folded = 0;
5140 :
5141 : /* At this point, ELT, if nonzero, points to a class of expressions
5142 : equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5143 : and SRC_RELATED, if nonzero, each contain additional equivalent
5144 : expressions. Prune these latter expressions by deleting expressions
5145 : already in the equivalence class.
5146 :
5147 : Check for an equivalent identical to the destination. If found,
5148 : this is the preferred equivalent since it will likely lead to
5149 : elimination of the insn. Indicate this by placing it in
5150 : `src_related'. */
5151 :
5152 198221011 : if (elt)
5153 35156487 : elt = elt->first_same_value;
5154 299123335 : for (p = elt; p; p = p->next_same_value)
5155 : {
5156 100902324 : enum rtx_code code = GET_CODE (p->exp);
5157 :
5158 : /* If the expression is not valid, ignore it. Then we do not
5159 : have to check for validity below. In most cases, we can use
5160 : `rtx_equal_p', since canonicalization has already been done. */
5161 100902324 : if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5162 3965 : continue;
5163 :
5164 : /* Also skip paradoxical subregs, unless that's what we're
5165 : looking for. */
5166 100898359 : if (paradoxical_subreg_p (p->exp)
5167 2525650 : && ! (src != 0
5168 3303 : && GET_CODE (src) == SUBREG
5169 3303 : && GET_MODE (src) == GET_MODE (p->exp)
5170 3303 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5171 : GET_MODE (SUBREG_REG (p->exp)))))
5172 3555 : continue;
5173 :
5174 100894804 : if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5175 : src = 0;
5176 2211827 : else if (src_folded && GET_CODE (src_folded) == code
5177 66771770 : && rtx_equal_p (src_folded, p->exp))
5178 : src_folded = 0;
5179 816457 : else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5180 65955794 : && rtx_equal_p (src_eqv_here, p->exp))
5181 : src_eqv_here = 0;
5182 745496 : else if (src_related && GET_CODE (src_related) == code
5183 65391460 : && rtx_equal_p (src_related, p->exp))
5184 : src_related = 0;
5185 :
5186 : /* This is the same as the destination of the insns, we want
5187 : to prefer it. The code below will then give it a negative
5188 : cost. */
5189 100894804 : if (!dest_related
5190 100894804 : && GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5191 216847 : dest_related = p->exp;
5192 : }
5193 :
5194 : /* Find the cheapest valid equivalent, trying all the available
5195 : possibilities. Prefer items not in the hash table to ones
5196 : that are when they are equal cost. Note that we can never
5197 : worsen an insn as the current contents will also succeed.
5198 : If we find an equivalent identical to the destination, use it as best,
5199 : since this insn will probably be eliminated in that case. */
5200 198221011 : if (src)
5201 : {
5202 163534947 : if (rtx_equal_p (src, dest))
5203 : src_cost = src_regcost = -1;
5204 : else
5205 : {
5206 163534941 : src_cost = COST (src, mode);
5207 163534941 : src_regcost = approx_reg_cost (src);
5208 : }
5209 : }
5210 :
5211 198221011 : if (src_eqv_here)
5212 : {
5213 5619349 : if (rtx_equal_p (src_eqv_here, dest))
5214 : src_eqv_cost = src_eqv_regcost = -1;
5215 : else
5216 : {
5217 5619349 : src_eqv_cost = COST (src_eqv_here, mode);
5218 5619349 : src_eqv_regcost = approx_reg_cost (src_eqv_here);
5219 : }
5220 : }
5221 :
5222 198221011 : if (src_folded)
5223 : {
5224 3834996 : if (rtx_equal_p (src_folded, dest))
5225 : src_folded_cost = src_folded_regcost = -1;
5226 : else
5227 : {
5228 3822287 : src_folded_cost = COST (src_folded, mode);
5229 3822287 : src_folded_regcost = approx_reg_cost (src_folded);
5230 : }
5231 : }
5232 :
5233 198221011 : if (dest_related)
5234 : {
5235 : src_related_cost = src_related_regcost = -1;
5236 : /* Handle it as src_related. */
5237 : src_related = dest_related;
5238 : }
5239 198004164 : else if (src_related)
5240 : {
5241 471380 : src_related_cost = COST (src_related, mode);
5242 471380 : src_related_regcost = approx_reg_cost (src_related);
5243 :
5244 : /* If a const-anchor is used to synthesize a constant that
5245 : normally requires multiple instructions then slightly prefer
5246 : it over the original sequence. These instructions are likely
5247 : to become redundant now. We can't compare against the cost
5248 : of src_eqv_here because, on MIPS for example, multi-insn
5249 : constants have zero cost; they are assumed to be hoisted from
5250 : loops. */
5251 471380 : if (src_related_is_const_anchor
5252 471380 : && src_related_cost == src_cost
5253 8612 : && src_eqv_here)
5254 8610 : src_related_cost--;
5255 : }
5256 :
5257 : /* If this was an indirect jump insn, a known label will really be
5258 : cheaper even though it looks more expensive. */
5259 198221011 : if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5260 198221011 : src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5261 :
5262 : /* Terminate loop when replacement made. This must terminate since
5263 : the current contents will be tested and will always be valid. */
5264 203549718 : while (!is_fake_set)
5265 : {
5266 : rtx trial;
5267 :
5268 : /* Skip invalid entries. */
5269 36170944 : while (elt && !REG_P (elt->exp)
5270 211785200 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5271 12 : elt = elt->next_same_value;
5272 :
5273 : /* A paradoxical subreg would be bad here: it'll be the right
5274 : size, but later may be adjusted so that the upper bits aren't
5275 : what we want. So reject it. */
5276 202873869 : if (elt != 0
5277 36170932 : && paradoxical_subreg_p (elt->exp)
5278 : /* It is okay, though, if the rtx we're trying to match
5279 : will ignore any of the bits we can't predict. */
5280 202874990 : && ! (src != 0
5281 1121 : && GET_CODE (src) == SUBREG
5282 1121 : && GET_MODE (src) == GET_MODE (elt->exp)
5283 1121 : && partial_subreg_p (GET_MODE (SUBREG_REG (src)),
5284 : GET_MODE (SUBREG_REG (elt->exp)))))
5285 : {
5286 1121 : elt = elt->next_same_value;
5287 1121 : continue;
5288 : }
5289 :
5290 202871627 : if (elt)
5291 : {
5292 36169811 : src_elt_cost = elt->cost;
5293 36169811 : src_elt_regcost = elt->regcost;
5294 : }
5295 :
5296 : /* Find cheapest and skip it for the next time. For items
5297 : of equal cost, use this order:
5298 : src_folded, src, src_eqv, src_related and hash table entry. */
5299 202871627 : if (src_folded
5300 8057436 : && preferable (src_folded_cost, src_folded_regcost,
5301 : src_cost, src_regcost) <= 0
5302 6196126 : && preferable (src_folded_cost, src_folded_regcost,
5303 : src_eqv_cost, src_eqv_regcost) <= 0
5304 5323745 : && preferable (src_folded_cost, src_folded_regcost,
5305 : src_related_cost, src_related_regcost) <= 0
5306 208191463 : && preferable (src_folded_cost, src_folded_regcost,
5307 : src_elt_cost, src_elt_regcost) <= 0)
5308 : trial = src_folded, src_folded_cost = MAX_COST;
5309 198049771 : else if (src
5310 162386105 : && preferable (src_cost, src_regcost,
5311 : src_eqv_cost, src_eqv_regcost) <= 0
5312 160848984 : && preferable (src_cost, src_regcost,
5313 : src_related_cost, src_related_regcost) <= 0
5314 358872314 : && preferable (src_cost, src_regcost,
5315 : src_elt_cost, src_elt_regcost) <= 0)
5316 : trial = src, src_cost = MAX_COST;
5317 37297898 : else if (src_eqv_here
5318 1749749 : && preferable (src_eqv_cost, src_eqv_regcost,
5319 : src_related_cost, src_related_regcost) <= 0
5320 39039449 : && preferable (src_eqv_cost, src_eqv_regcost,
5321 : src_elt_cost, src_elt_regcost) <= 0)
5322 : trial = src_eqv_here, src_eqv_cost = MAX_COST;
5323 35772802 : else if (src_related
5324 35772802 : && preferable (src_related_cost, src_related_regcost,
5325 : src_elt_cost, src_elt_regcost) <= 0)
5326 : trial = src_related, src_related_cost = MAX_COST;
5327 : else
5328 : {
5329 35536270 : trial = elt->exp;
5330 35536270 : elt = elt->next_same_value;
5331 35536270 : src_elt_cost = MAX_COST;
5332 : }
5333 :
5334 : /* Try to optimize
5335 : (set (reg:M N) (const_int A))
5336 : (set (reg:M2 O) (const_int B))
5337 : (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5338 : (reg:M2 O)). */
5339 202871627 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5340 4020 : && CONST_INT_P (trial)
5341 721 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5342 721 : && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5343 570 : && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5344 106 : && (known_ge
5345 : (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))),
5346 : INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))))
5347 202871733 : && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5348 106 : + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5349 : <= HOST_BITS_PER_WIDE_INT))
5350 : {
5351 106 : rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5352 106 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5353 106 : rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5354 106 : unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5355 106 : struct table_elt *dest_elt
5356 106 : = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5357 106 : rtx dest_cst = NULL;
5358 :
5359 106 : if (dest_elt)
5360 153 : for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5361 104 : if (p->is_const && CONST_INT_P (p->exp))
5362 : {
5363 : dest_cst = p->exp;
5364 : break;
5365 : }
5366 57 : if (dest_cst)
5367 : {
5368 8 : HOST_WIDE_INT val = INTVAL (dest_cst);
5369 8 : HOST_WIDE_INT mask;
5370 8 : unsigned int shift;
5371 : /* This is the mode of DEST_CST as well. */
5372 8 : scalar_int_mode dest_mode
5373 8 : = as_a <scalar_int_mode> (GET_MODE (dest_reg));
5374 8 : if (BITS_BIG_ENDIAN)
5375 : shift = GET_MODE_PRECISION (dest_mode)
5376 : - INTVAL (pos) - INTVAL (width);
5377 : else
5378 8 : shift = INTVAL (pos);
5379 8 : if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5380 : mask = HOST_WIDE_INT_M1;
5381 : else
5382 8 : mask = (HOST_WIDE_INT_1 << INTVAL (width)) - 1;
5383 8 : val &= ~(mask << shift);
5384 8 : val |= (INTVAL (trial) & mask) << shift;
5385 8 : val = trunc_int_for_mode (val, dest_mode);
5386 8 : validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5387 : dest_reg, 1);
5388 8 : validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5389 : GEN_INT (val), 1);
5390 8 : if (apply_change_group ())
5391 : {
5392 8 : rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5393 8 : if (note)
5394 : {
5395 0 : remove_note (insn, note);
5396 0 : df_notes_rescan (insn);
5397 : }
5398 8 : src_eqv = NULL_RTX;
5399 8 : src_eqv_elt = NULL;
5400 8 : src_eqv_volatile = 0;
5401 8 : src_eqv_in_memory = 0;
5402 8 : src_eqv_hash = 0;
5403 8 : repeat = true;
5404 8 : break;
5405 : }
5406 : }
5407 : }
5408 :
5409 : /* We don't normally have an insn matching (set (pc) (pc)), so
5410 : check for this separately here. We will delete such an
5411 : insn below.
5412 :
5413 : For other cases such as a table jump or conditional jump
5414 : where we know the ultimate target, go ahead and replace the
5415 : operand. While that may not make a valid insn, we will
5416 : reemit the jump below (and also insert any necessary
5417 : barriers). */
5418 199957557 : if (n_sets == 1 && dest == pc_rtx
5419 223315130 : && (trial == pc_rtx
5420 20431011 : || (GET_CODE (trial) == LABEL_REF
5421 10918 : && ! condjump_p (insn))))
5422 : {
5423 : /* Don't substitute non-local labels, this confuses CFG. */
5424 15117 : if (GET_CODE (trial) == LABEL_REF
5425 13809 : && LABEL_REF_NONLOCAL_P (trial))
5426 1308 : continue;
5427 :
5428 12501 : SET_SRC (sets[i].rtl) = trial;
5429 12501 : cse_jumps_altered = true;
5430 12501 : break;
5431 : }
5432 :
5433 : /* Similarly, lots of targets don't allow no-op
5434 : (set (mem x) (mem x)) moves. Even (set (reg x) (reg x))
5435 : might be impossible for certain registers (like CC registers). */
5436 202857810 : else if (n_sets == 1
5437 199943748 : && !CALL_P (insn)
5438 199453818 : && (MEM_P (trial) || REG_P (trial))
5439 80847025 : && rtx_equal_p (trial, dest)
5440 206967 : && !side_effects_p (dest)
5441 206963 : && (cfun->can_delete_dead_exceptions
5442 47274 : || insn_nothrow_p (insn))
5443 : /* We can only remove the later store if the earlier aliases
5444 : at least all accesses the later one. */
5445 203054143 : && (!MEM_P (trial)
5446 25139 : || ((MEM_ALIAS_SET (dest) == MEM_ALIAS_SET (trial)
5447 8923 : || alias_set_subset_of (MEM_ALIAS_SET (dest),
5448 8923 : MEM_ALIAS_SET (trial)))
5449 16761 : && (!MEM_EXPR (trial)
5450 15716 : || refs_same_for_tbaa_p (MEM_EXPR (trial),
5451 15716 : MEM_EXPR (dest))))))
5452 : {
5453 185152 : SET_SRC (sets[i].rtl) = trial;
5454 185152 : noop_insn = true;
5455 185152 : break;
5456 : }
5457 :
5458 : /* Reject certain invalid forms of CONST that we create. */
5459 202672658 : else if (CONSTANT_P (trial)
5460 33131340 : && GET_CODE (trial) == CONST
5461 : /* Reject cases that will cause decode_rtx_const to
5462 : die. On the alpha when simplifying a switch, we
5463 : get (const (truncate (minus (label_ref)
5464 : (label_ref)))). */
5465 572466 : && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5466 : /* Likewise on IA-64, except without the
5467 : truncate. */
5468 572466 : || (GET_CODE (XEXP (trial, 0)) == MINUS
5469 0 : && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5470 0 : && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5471 : /* Do nothing for this case. */
5472 : ;
5473 :
5474 : /* Do not replace anything with a MEM, except the replacement
5475 : is a no-op. This allows this loop to terminate. */
5476 202672658 : else if (MEM_P (trial) && !rtx_equal_p (trial, SET_SRC(sets[i].rtl)))
5477 : /* Do nothing for this case. */
5478 : ;
5479 :
5480 : /* Look for a substitution that makes a valid insn. */
5481 202573286 : else if (validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5482 : trial, 0))
5483 : {
5484 197346380 : rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5485 :
5486 : /* The result of apply_change_group can be ignored; see
5487 : canon_reg. */
5488 :
5489 197346380 : validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5490 197346380 : apply_change_group ();
5491 :
5492 197346380 : break;
5493 : }
5494 :
5495 : /* If the current function uses a constant pool and this is a
5496 : constant, try making a pool entry. Put it in src_folded
5497 : unless we already have done this since that is where it
5498 : likely came from. */
5499 :
5500 5226906 : else if (crtl->uses_const_pool
5501 3831985 : && CONSTANT_P (trial)
5502 2836305 : && !CONST_INT_P (trial)
5503 2817644 : && (src_folded == 0 || !MEM_P (src_folded))
5504 1957937 : && GET_MODE_CLASS (mode) != MODE_CC
5505 1957937 : && mode != VOIDmode)
5506 : {
5507 1957937 : src_folded = force_const_mem (mode, trial);
5508 1957937 : if (src_folded)
5509 : {
5510 1957290 : src_folded_cost = COST (src_folded, mode);
5511 1957290 : src_folded_regcost = approx_reg_cost (src_folded);
5512 : }
5513 : }
5514 : }
5515 :
5516 : /* If we changed the insn too much, handle this set from scratch. */
5517 197544033 : if (repeat)
5518 : {
5519 8 : i--;
5520 8 : continue;
5521 : }
5522 :
5523 198221003 : src = SET_SRC (sets[i].rtl);
5524 :
5525 : /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5526 : However, there is an important exception: If both are registers
5527 : that are not the head of their equivalence class, replace SET_SRC
5528 : with the head of the class. If we do not do this, we will have
5529 : both registers live over a portion of the basic block. This way,
5530 : their lifetimes will likely abut instead of overlapping. */
5531 198221003 : if (!is_fake_set
5532 197544033 : && REG_P (dest)
5533 345344201 : && REGNO_QTY_VALID_P (REGNO (dest)))
5534 : {
5535 8265487 : int dest_q = REG_QTY (REGNO (dest));
5536 8265487 : struct qty_table_elem *dest_ent = &qty_table[dest_q];
5537 :
5538 8265487 : if (dest_ent->mode == GET_MODE (dest)
5539 6412049 : && dest_ent->first_reg != REGNO (dest)
5540 118170 : && REG_P (src) && REGNO (src) == REGNO (dest)
5541 : /* Don't do this if the original insn had a hard reg as
5542 : SET_SRC or SET_DEST. */
5543 5095 : && (!REG_P (sets[i].src)
5544 4078 : || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5545 8270568 : && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5546 : /* We can't call canon_reg here because it won't do anything if
5547 : SRC is a hard register. */
5548 : {
5549 5081 : int src_q = REG_QTY (REGNO (src));
5550 5081 : struct qty_table_elem *src_ent = &qty_table[src_q];
5551 5081 : int first = src_ent->first_reg;
5552 5081 : rtx new_src
5553 : = (first >= FIRST_PSEUDO_REGISTER
5554 5081 : ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5555 :
5556 : /* We must use validate-change even for this, because this
5557 : might be a special no-op instruction, suitable only to
5558 : tag notes onto. */
5559 5081 : if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5560 : {
5561 5081 : src = new_src;
5562 : /* If we had a constant that is cheaper than what we are now
5563 : setting SRC to, use that constant. We ignored it when we
5564 : thought we could make this into a no-op. */
5565 1575 : if (src_const && COST (src_const, mode) < COST (src, mode)
5566 5081 : && validate_change (insn, &SET_SRC (sets[i].rtl),
5567 : src_const, 0))
5568 : src = src_const;
5569 : }
5570 : }
5571 : }
5572 :
5573 : /* If we made a change, recompute SRC values. */
5574 198221003 : if (src != sets[i].src)
5575 : {
5576 3379694 : do_not_record = 0;
5577 3379694 : hash_arg_in_memory = 0;
5578 3379694 : sets[i].src = src;
5579 3379694 : sets[i].src_hash = HASH (src, mode);
5580 3379694 : sets[i].src_volatile = do_not_record;
5581 3379694 : sets[i].src_in_memory = hash_arg_in_memory;
5582 3379694 : sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5583 : }
5584 :
5585 : /* If this is a single SET, we are setting a register, and we have an
5586 : equivalent constant, we want to add a REG_EQUAL note if the constant
5587 : is different from the source. We don't want to do it for a constant
5588 : pseudo since verifying that this pseudo hasn't been eliminated is a
5589 : pain; moreover such a note won't help anything.
5590 :
5591 : Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5592 : which can be created for a reference to a compile time computable
5593 : entry in a jump table. */
5594 198221003 : if (n_sets == 1
5595 195051496 : && REG_P (dest)
5596 144940146 : && src_const
5597 29715186 : && !REG_P (src_const)
5598 29688648 : && !(GET_CODE (src_const) == SUBREG
5599 0 : && REG_P (SUBREG_REG (src_const)))
5600 29688648 : && !(GET_CODE (src_const) == CONST
5601 383083 : && GET_CODE (XEXP (src_const, 0)) == MINUS
5602 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5603 0 : && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF)
5604 227909651 : && !rtx_equal_p (src, src_const))
5605 : {
5606 : /* Make sure that the rtx is not shared. */
5607 7879975 : src_const = copy_rtx (src_const);
5608 :
5609 : /* Record the actual constant value in a REG_EQUAL note,
5610 : making a new one if one does not already exist. */
5611 7879975 : set_unique_reg_note (insn, REG_EQUAL, src_const);
5612 7879975 : df_notes_rescan (insn);
5613 : }
5614 :
5615 : /* Now deal with the destination. */
5616 198221003 : do_not_record = 0;
5617 :
5618 : /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5619 198221003 : while (GET_CODE (dest) == SUBREG
5620 198238568 : || GET_CODE (dest) == ZERO_EXTRACT
5621 398122017 : || GET_CODE (dest) == STRICT_LOW_PART)
5622 1666458 : dest = XEXP (dest, 0);
5623 :
5624 198221003 : sets[i].inner_dest = dest;
5625 :
5626 198221003 : if (MEM_P (dest))
5627 : {
5628 : #ifdef PUSH_ROUNDING
5629 : /* Stack pushes invalidate the stack pointer. */
5630 29017211 : rtx addr = XEXP (dest, 0);
5631 29017211 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5632 5543449 : && XEXP (addr, 0) == stack_pointer_rtx)
5633 5543449 : invalidate (stack_pointer_rtx, VOIDmode);
5634 : #endif
5635 29017211 : dest = fold_rtx (dest, insn);
5636 : }
5637 :
5638 : /* Compute the hash code of the destination now,
5639 : before the effects of this instruction are recorded,
5640 : since the register values used in the address computation
5641 : are those before this instruction. */
5642 198221003 : sets[i].dest_hash = HASH (dest, mode);
5643 :
5644 : /* Don't enter a bit-field in the hash table
5645 : because the value in it after the store
5646 : may not equal what was stored, due to truncation. */
5647 :
5648 198221003 : if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5649 : {
5650 4012 : rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5651 :
5652 4012 : if (src_const != 0 && CONST_INT_P (src_const)
5653 713 : && CONST_INT_P (width)
5654 713 : && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5655 713 : && ! (INTVAL (src_const)
5656 713 : & (HOST_WIDE_INT_M1U << INTVAL (width))))
5657 : /* Exception: if the value is constant,
5658 : and it won't be truncated, record it. */
5659 : ;
5660 : else
5661 : {
5662 : /* This is chosen so that the destination will be invalidated
5663 : but no new value will be recorded.
5664 : We must invalidate because sometimes constant
5665 : values can be recorded for bitfields. */
5666 3300 : sets[i].src_elt = 0;
5667 3300 : sets[i].src_volatile = 1;
5668 3300 : src_eqv = 0;
5669 3300 : src_eqv_elt = 0;
5670 : }
5671 : }
5672 :
5673 : /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5674 : the insn. */
5675 198216991 : else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5676 : {
5677 : /* One less use of the label this insn used to jump to. */
5678 12500 : cse_cfg_altered |= delete_insn_and_edges (insn);
5679 12500 : cse_jumps_altered = true;
5680 : /* No more processing for this set. */
5681 12500 : sets[i].rtl = 0;
5682 : }
5683 :
5684 : /* Similarly for no-op moves. */
5685 198204491 : else if (noop_insn)
5686 : {
5687 185152 : if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
5688 0 : cse_cfg_altered = true;
5689 185152 : cse_cfg_altered |= delete_insn_and_edges (insn);
5690 : /* No more processing for this set. */
5691 185152 : sets[i].rtl = 0;
5692 : }
5693 :
5694 : /* If this SET is now setting PC to a label, we know it used to
5695 : be a conditional or computed branch. */
5696 20416994 : else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5697 198028949 : && !LABEL_REF_NONLOCAL_P (src))
5698 : {
5699 : /* We reemit the jump in as many cases as possible just in
5700 : case the form of an unconditional jump is significantly
5701 : different than a computed jump or conditional jump.
5702 :
5703 : If this insn has multiple sets, then reemitting the
5704 : jump is nontrivial. So instead we just force rerecognition
5705 : and hope for the best. */
5706 9610 : if (n_sets == 1)
5707 : {
5708 9610 : rtx_jump_insn *new_rtx;
5709 9610 : rtx note;
5710 :
5711 9610 : rtx_insn *seq = targetm.gen_jump (XEXP (src, 0));
5712 9610 : new_rtx = emit_jump_insn_before (seq, insn);
5713 9610 : JUMP_LABEL (new_rtx) = XEXP (src, 0);
5714 9610 : LABEL_NUSES (XEXP (src, 0))++;
5715 :
5716 : /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5717 9610 : note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5718 9610 : if (note)
5719 : {
5720 0 : XEXP (note, 1) = NULL_RTX;
5721 0 : REG_NOTES (new_rtx) = note;
5722 : }
5723 :
5724 9610 : cse_cfg_altered |= delete_insn_and_edges (insn);
5725 9610 : insn = new_rtx;
5726 : }
5727 : else
5728 0 : INSN_CODE (insn) = -1;
5729 :
5730 : /* Do not bother deleting any unreachable code, let jump do it. */
5731 9610 : cse_jumps_altered = true;
5732 9610 : sets[i].rtl = 0;
5733 : }
5734 :
5735 : /* If destination is volatile, invalidate it and then do no further
5736 : processing for this assignment. */
5737 :
5738 198009729 : else if (do_not_record)
5739 : {
5740 56161808 : invalidate_dest (dest);
5741 56161808 : sets[i].rtl = 0;
5742 : }
5743 :
5744 198221003 : if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5745 : {
5746 1735204 : do_not_record = 0;
5747 1735204 : sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5748 1735204 : if (do_not_record)
5749 : {
5750 979 : invalidate_dest (SET_DEST (sets[i].rtl));
5751 979 : sets[i].rtl = 0;
5752 : }
5753 : }
5754 : }
5755 :
5756 : /* Now enter all non-volatile source expressions in the hash table
5757 : if they are not already present.
5758 : Record their equivalence classes in src_elt.
5759 : This way we can insert the corresponding destinations into
5760 : the same classes even if the actual sources are no longer in them
5761 : (having been invalidated). */
5762 :
5763 5496965 : if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5764 419173833 : && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5765 : {
5766 4510464 : struct table_elt *elt;
5767 4510464 : struct table_elt *classp = sets[0].src_elt;
5768 4510464 : rtx dest = SET_DEST (sets[0].rtl);
5769 4510464 : machine_mode eqvmode = GET_MODE (dest);
5770 :
5771 4510464 : if (GET_CODE (dest) == STRICT_LOW_PART)
5772 : {
5773 0 : eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5774 0 : classp = 0;
5775 : }
5776 4510464 : if (insert_regs (src_eqv, classp, false))
5777 : {
5778 156355 : rehash_using_reg (src_eqv);
5779 156355 : src_eqv_hash = HASH (src_eqv, eqvmode);
5780 : }
5781 4510464 : elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5782 4510464 : elt->in_memory = src_eqv_in_memory;
5783 4510464 : src_eqv_elt = elt;
5784 :
5785 : /* Check to see if src_eqv_elt is the same as a set source which
5786 : does not yet have an elt, and if so set the elt of the set source
5787 : to src_eqv_elt. */
5788 9020928 : for (i = 0; i < n_sets; i++)
5789 9020928 : if (sets[i].rtl && sets[i].src_elt == 0
5790 8887012 : && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5791 98413 : sets[i].src_elt = src_eqv_elt;
5792 : }
5793 :
5794 612884372 : for (i = 0; i < n_sets; i++)
5795 340071957 : if (sets[i].rtl && ! sets[i].src_volatile
5796 326315597 : && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5797 : {
5798 128089549 : if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5799 : {
5800 : /* REG_EQUAL in setting a STRICT_LOW_PART
5801 : gives an equivalent for the entire destination register,
5802 : not just for the subreg being stored in now.
5803 : This is a more interesting equivalence, so we arrange later
5804 : to treat the entire reg as the destination. */
5805 13553 : sets[i].src_elt = src_eqv_elt;
5806 13553 : sets[i].src_hash = src_eqv_hash;
5807 : }
5808 : else
5809 : {
5810 : /* Insert source and constant equivalent into hash table, if not
5811 : already present. */
5812 128075996 : struct table_elt *classp = src_eqv_elt;
5813 128075996 : rtx src = sets[i].src;
5814 128075996 : rtx dest = SET_DEST (sets[i].rtl);
5815 267548990 : machine_mode mode
5816 128075996 : = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5817 :
5818 : /* It's possible that we have a source value known to be
5819 : constant but don't have a REG_EQUAL note on the insn.
5820 : Lack of a note will mean src_eqv_elt will be NULL. This
5821 : can happen where we've generated a SUBREG to access a
5822 : CONST_INT that is already in a register in a wider mode.
5823 : Ensure that the source expression is put in the proper
5824 : constant class. */
5825 128075996 : if (!classp)
5826 122593109 : classp = sets[i].src_const_elt;
5827 :
5828 128075996 : if (sets[i].src_elt == 0)
5829 : {
5830 105759885 : struct table_elt *elt;
5831 :
5832 : /* Note that these insert_regs calls cannot remove
5833 : any of the src_elt's, because they would have failed to
5834 : match if not still valid. */
5835 105759885 : if (insert_regs (src, classp, false))
5836 : {
5837 17521002 : rehash_using_reg (src);
5838 17521002 : sets[i].src_hash = HASH (src, mode);
5839 : }
5840 105759885 : elt = insert (src, classp, sets[i].src_hash, mode);
5841 105759885 : elt->in_memory = sets[i].src_in_memory;
5842 : /* If inline asm has any clobbers, ensure we only reuse
5843 : existing inline asms and never try to put the ASM_OPERANDS
5844 : into an insn that isn't inline asm. */
5845 105759885 : if (GET_CODE (src) == ASM_OPERANDS
5846 20696 : && GET_CODE (x) == PARALLEL)
5847 20678 : elt->cost = MAX_COST;
5848 105759885 : sets[i].src_elt = classp = elt;
5849 : }
5850 153249041 : if (sets[i].src_const && sets[i].src_const_elt == 0
5851 14918728 : && src != sets[i].src_const
5852 130285526 : && ! rtx_equal_p (sets[i].src_const, src))
5853 2209530 : sets[i].src_elt = insert (sets[i].src_const, classp,
5854 2209530 : sets[i].src_const_hash, mode);
5855 : }
5856 : }
5857 70131454 : else if (sets[i].src_elt == 0)
5858 : /* If we did not insert the source into the hash table (e.g., it was
5859 : volatile), note the equivalence class for the REG_EQUAL value, if any,
5860 : so that the destination goes into that class. */
5861 57422099 : sets[i].src_elt = src_eqv_elt;
5862 :
5863 : /* Record destination addresses in the hash table. This allows us to
5864 : check if they are invalidated by other sets. */
5865 612884372 : for (i = 0; i < n_sets; i++)
5866 : {
5867 198221003 : if (sets[i].rtl)
5868 : {
5869 141850954 : rtx x = sets[i].inner_dest;
5870 141850954 : struct table_elt *elt;
5871 141850954 : machine_mode mode;
5872 141850954 : unsigned hash;
5873 :
5874 141850954 : if (MEM_P (x))
5875 : {
5876 22379359 : x = XEXP (x, 0);
5877 22379359 : mode = GET_MODE (x);
5878 22379359 : hash = HASH (x, mode);
5879 22379359 : elt = lookup (x, hash, mode);
5880 22379359 : if (!elt)
5881 : {
5882 19495652 : if (insert_regs (x, NULL, false))
5883 : {
5884 2217631 : rtx dest = SET_DEST (sets[i].rtl);
5885 :
5886 2217631 : rehash_using_reg (x);
5887 2217631 : hash = HASH (x, mode);
5888 2217631 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5889 : }
5890 19495652 : elt = insert (x, NULL, hash, mode);
5891 : }
5892 :
5893 22379359 : sets[i].dest_addr_elt = elt;
5894 : }
5895 : else
5896 119471595 : sets[i].dest_addr_elt = NULL;
5897 : }
5898 : }
5899 :
5900 414663369 : invalidate_from_clobbers (insn);
5901 :
5902 : /* Some registers are invalidated by subroutine calls. Memory is
5903 : invalidated by non-constant calls. */
5904 :
5905 414663369 : if (CALL_P (insn))
5906 : {
5907 15784702 : if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5908 13629525 : invalidate_memory ();
5909 : else
5910 : /* For const/pure calls, invalidate any argument slots, because
5911 : those are owned by the callee. */
5912 6397641 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
5913 4242464 : if (GET_CODE (XEXP (tem, 0)) == USE
5914 4242463 : && MEM_P (XEXP (XEXP (tem, 0), 0)))
5915 71202 : invalidate (XEXP (XEXP (tem, 0), 0), VOIDmode);
5916 15784702 : invalidate_for_call (insn);
5917 : }
5918 :
5919 : /* Now invalidate everything set by this instruction.
5920 : If a SUBREG or other funny destination is being set,
5921 : sets[i].rtl is still nonzero, so here we invalidate the reg
5922 : a part of which is being set. */
5923 :
5924 612884372 : for (i = 0; i < n_sets; i++)
5925 198221003 : if (sets[i].rtl)
5926 : {
5927 : /* We can't use the inner dest, because the mode associated with
5928 : a ZERO_EXTRACT is significant. */
5929 141850954 : rtx dest = SET_DEST (sets[i].rtl);
5930 :
5931 : /* Needed for registers to remove the register from its
5932 : previous quantity's chain.
5933 : Needed for memory if this is a nonvarying address, unless
5934 : we have just done an invalidate_memory that covers even those. */
5935 141850954 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5936 119454868 : invalidate (dest, VOIDmode);
5937 22396086 : else if (MEM_P (dest))
5938 22379359 : invalidate (dest, VOIDmode);
5939 16727 : else if (GET_CODE (dest) == STRICT_LOW_PART
5940 3174 : || GET_CODE (dest) == ZERO_EXTRACT)
5941 16605 : invalidate (XEXP (dest, 0), GET_MODE (dest));
5942 : }
5943 :
5944 : /* Don't cse over a call to setjmp; on some machines (eg VAX)
5945 : the regs restored by the longjmp come from a later time
5946 : than the setjmp. */
5947 414663369 : if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5948 : {
5949 2222 : flush_hash_table ();
5950 2222 : goto done;
5951 : }
5952 :
5953 : /* Make sure registers mentioned in destinations
5954 : are safe for use in an expression to be inserted.
5955 : This removes from the hash table
5956 : any invalid entry that refers to one of these registers.
5957 :
5958 : We don't care about the return value from mention_regs because
5959 : we are going to hash the SET_DEST values unconditionally. */
5960 :
5961 612882150 : for (i = 0; i < n_sets; i++)
5962 : {
5963 198221003 : if (sets[i].rtl)
5964 : {
5965 141850954 : rtx x = SET_DEST (sets[i].rtl);
5966 :
5967 141850954 : if (!REG_P (x))
5968 24029891 : mention_regs (x);
5969 : else
5970 : {
5971 : /* We used to rely on all references to a register becoming
5972 : inaccessible when a register changes to a new quantity,
5973 : since that changes the hash code. However, that is not
5974 : safe, since after HASH_SIZE new quantities we get a
5975 : hash 'collision' of a register with its own invalid
5976 : entries. And since SUBREGs have been changed not to
5977 : change their hash code with the hash code of the register,
5978 : it wouldn't work any longer at all. So we have to check
5979 : for any invalid references lying around now.
5980 : This code is similar to the REG case in mention_regs,
5981 : but it knows that reg_tick has been incremented, and
5982 : it leaves reg_in_table as -1 . */
5983 117821063 : unsigned int regno = REGNO (x);
5984 117821063 : unsigned int endregno = END_REGNO (x);
5985 117821063 : unsigned int i;
5986 :
5987 235642126 : for (i = regno; i < endregno; i++)
5988 : {
5989 117821063 : if (REG_IN_TABLE (i) >= 0)
5990 : {
5991 12831423 : remove_invalid_refs (i);
5992 12831423 : REG_IN_TABLE (i) = -1;
5993 : }
5994 : }
5995 : }
5996 : }
5997 : }
5998 :
5999 : /* We may have just removed some of the src_elt's from the hash table.
6000 : So replace each one with the current head of the same class.
6001 : Also check if destination addresses have been removed. */
6002 :
6003 612882150 : for (i = 0; i < n_sets; i++)
6004 198221003 : if (sets[i].rtl)
6005 : {
6006 141850954 : if (sets[i].dest_addr_elt
6007 141850954 : && sets[i].dest_addr_elt->first_same_value == 0)
6008 : {
6009 : /* The elt was removed, which means this destination is not
6010 : valid after this instruction. */
6011 0 : sets[i].rtl = NULL_RTX;
6012 : }
6013 141850954 : else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6014 : /* If elt was removed, find current head of same class,
6015 : or 0 if nothing remains of that class. */
6016 : {
6017 10720587 : struct table_elt *elt = sets[i].src_elt;
6018 :
6019 10720587 : while (elt && elt->prev_same_value)
6020 : elt = elt->prev_same_value;
6021 :
6022 21368775 : while (elt && elt->first_same_value == 0)
6023 10683528 : elt = elt->next_same_value;
6024 10685247 : sets[i].src_elt = elt ? elt->first_same_value : 0;
6025 : }
6026 : }
6027 :
6028 : /* Now insert the destinations into their equivalence classes. */
6029 :
6030 612882150 : for (i = 0; i < n_sets; i++)
6031 198221003 : if (sets[i].rtl)
6032 : {
6033 141850954 : rtx dest = SET_DEST (sets[i].rtl);
6034 141850954 : struct table_elt *elt;
6035 :
6036 : /* Don't record value if we are not supposed to risk allocating
6037 : floating-point values in registers that might be wider than
6038 : memory. */
6039 166247134 : if ((flag_float_store
6040 12787 : && MEM_P (dest)
6041 4366 : && FLOAT_MODE_P (GET_MODE (dest)))
6042 : /* Don't record BLKmode values, because we don't know the
6043 : size of it, and can't be sure that other BLKmode values
6044 : have the same or smaller size. */
6045 141848288 : || GET_MODE (dest) == BLKmode
6046 : /* If we didn't put a REG_EQUAL value or a source into the hash
6047 : table, there is no point is recording DEST. */
6048 283699242 : || sets[i].src_elt == 0)
6049 24396180 : continue;
6050 :
6051 : /* STRICT_LOW_PART isn't part of the value BEING set,
6052 : and neither is the SUBREG inside it.
6053 : Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6054 117454774 : if (GET_CODE (dest) == STRICT_LOW_PART)
6055 0 : dest = SUBREG_REG (XEXP (dest, 0));
6056 :
6057 117454774 : if (REG_P (dest) || GET_CODE (dest) == SUBREG)
6058 : /* Registers must also be inserted into chains for quantities. */
6059 95444393 : if (insert_regs (dest, sets[i].src_elt, true))
6060 : {
6061 : /* If `insert_regs' changes something, the hash code must be
6062 : recalculated. */
6063 94847327 : rehash_using_reg (dest);
6064 94847327 : sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6065 : }
6066 :
6067 : /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
6068 : outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
6069 117454774 : if (paradoxical_subreg_p (dest))
6070 64946 : continue;
6071 :
6072 352169484 : elt = insert (dest, sets[i].src_elt,
6073 117389828 : sets[i].dest_hash, GET_MODE (dest));
6074 :
6075 : /* If this is a constant, insert the constant anchors with the
6076 : equivalent register-offset expressions using register DEST. */
6077 117389828 : if (targetm.const_anchor
6078 0 : && REG_P (dest)
6079 0 : && SCALAR_INT_MODE_P (GET_MODE (dest))
6080 117389828 : && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
6081 0 : insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
6082 :
6083 117389828 : elt->in_memory = (MEM_P (sets[i].inner_dest)
6084 117389828 : && !MEM_READONLY_P (sets[i].inner_dest));
6085 :
6086 : /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6087 : narrower than M2, and both M1 and M2 are the same number of words,
6088 : we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6089 : make that equivalence as well.
6090 :
6091 : However, BAR may have equivalences for which gen_lowpart
6092 : will produce a simpler value than gen_lowpart applied to
6093 : BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6094 : BAR's equivalences. If we don't get a simplified form, make
6095 : the SUBREG. It will not be used in an equivalence, but will
6096 : cause two similar assignments to be detected.
6097 :
6098 : Note the loop below will find SUBREG_REG (DEST) since we have
6099 : already entered SRC and DEST of the SET in the table. */
6100 :
6101 117389828 : if (GET_CODE (dest) == SUBREG
6102 : && (known_equal_after_align_down
6103 199763379 : (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1,
6104 3003906 : GET_MODE_SIZE (GET_MODE (dest)) - 1,
6105 1501953 : UNITS_PER_WORD))
6106 92979 : && !partial_subreg_p (dest)
6107 117430251 : && sets[i].src_elt != 0)
6108 : {
6109 40423 : machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6110 40423 : struct table_elt *elt, *classp = 0;
6111 :
6112 171420 : for (elt = sets[i].src_elt->first_same_value; elt;
6113 130997 : elt = elt->next_same_value)
6114 : {
6115 130997 : rtx new_src = 0;
6116 130997 : unsigned src_hash;
6117 130997 : struct table_elt *src_elt;
6118 :
6119 : /* Ignore invalid entries. */
6120 130997 : if (!REG_P (elt->exp)
6121 130997 : && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6122 0 : continue;
6123 :
6124 : /* We may have already been playing subreg games. If the
6125 : mode is already correct for the destination, use it. */
6126 130997 : if (GET_MODE (elt->exp) == new_mode)
6127 : new_src = elt->exp;
6128 : else
6129 : {
6130 130997 : poly_uint64 byte
6131 130997 : = subreg_lowpart_offset (new_mode, GET_MODE (dest));
6132 130997 : new_src = simplify_gen_subreg (new_mode, elt->exp,
6133 130997 : GET_MODE (dest), byte);
6134 : }
6135 :
6136 : /* The call to simplify_gen_subreg fails if the value
6137 : is VOIDmode, yet we can't do any simplification, e.g.
6138 : for EXPR_LISTs denoting function call results.
6139 : It is invalid to construct a SUBREG with a VOIDmode
6140 : SUBREG_REG, hence a zero new_src means we can't do
6141 : this substitution. */
6142 130997 : if (! new_src)
6143 6 : continue;
6144 :
6145 130991 : src_hash = HASH (new_src, new_mode);
6146 130991 : src_elt = lookup (new_src, src_hash, new_mode);
6147 :
6148 : /* Put the new source in the hash table is if isn't
6149 : already. */
6150 130991 : if (src_elt == 0)
6151 : {
6152 54753 : if (insert_regs (new_src, classp, false))
6153 : {
6154 0 : rehash_using_reg (new_src);
6155 0 : src_hash = HASH (new_src, new_mode);
6156 : }
6157 54753 : src_elt = insert (new_src, classp, src_hash, new_mode);
6158 54753 : src_elt->in_memory = elt->in_memory;
6159 54753 : if (GET_CODE (new_src) == ASM_OPERANDS
6160 0 : && elt->cost == MAX_COST)
6161 0 : src_elt->cost = MAX_COST;
6162 : }
6163 76238 : else if (classp && classp != src_elt->first_same_value)
6164 : /* Show that two things that we've seen before are
6165 : actually the same. */
6166 161 : merge_equiv_classes (src_elt, classp);
6167 :
6168 130991 : classp = src_elt->first_same_value;
6169 : /* Ignore invalid entries. */
6170 130991 : while (classp
6171 130991 : && !REG_P (classp->exp)
6172 211347 : && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6173 0 : classp = classp->next_same_value;
6174 : }
6175 : }
6176 : }
6177 :
6178 : /* Special handling for (set REG0 REG1) where REG0 is the
6179 : "cheapest", cheaper than REG1. After cse, REG1 will probably not
6180 : be used in the sequel, so (if easily done) change this insn to
6181 : (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6182 : that computed their value. Then REG1 will become a dead store
6183 : and won't cloud the situation for later optimizations.
6184 :
6185 : Do not make this change if REG1 is a hard register, because it will
6186 : then be used in the sequel and we may be changing a two-operand insn
6187 : into a three-operand insn.
6188 :
6189 : Also do not do this if we are operating on a copy of INSN. */
6190 :
6191 609712643 : if (n_sets == 1 && sets[0].rtl)
6192 138910218 : try_back_substitute_reg (sets[0].rtl, insn);
6193 :
6194 414663369 : done:;
6195 414663369 : }
6196 :
6197 : /* Remove from the hash table all expressions that reference memory. */
6198 :
6199 : static void
6200 13629525 : invalidate_memory (void)
6201 : {
6202 13629525 : int i;
6203 13629525 : struct table_elt *p, *next;
6204 :
6205 449774325 : for (i = 0; i < HASH_SIZE; i++)
6206 629163615 : for (p = table[i]; p; p = next)
6207 : {
6208 193018815 : next = p->next_same_hash;
6209 193018815 : if (p->in_memory)
6210 19863784 : remove_from_table (p, i);
6211 : }
6212 13629525 : }
6213 :
6214 : /* Perform invalidation on the basis of everything about INSN,
6215 : except for invalidating the actual places that are SET in it.
6216 : This includes the places CLOBBERed, and anything that might
6217 : alias with something that is SET or CLOBBERed. */
6218 :
6219 : static void
6220 414663369 : invalidate_from_clobbers (rtx_insn *insn)
6221 : {
6222 414663369 : rtx x = PATTERN (insn);
6223 :
6224 414663369 : if (GET_CODE (x) == CLOBBER)
6225 : {
6226 67875 : rtx ref = XEXP (x, 0);
6227 67875 : if (ref)
6228 : {
6229 67875 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6230 12950 : || MEM_P (ref))
6231 67875 : invalidate (ref, VOIDmode);
6232 0 : else if (GET_CODE (ref) == STRICT_LOW_PART
6233 0 : || GET_CODE (ref) == ZERO_EXTRACT)
6234 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6235 : }
6236 : }
6237 414595494 : else if (GET_CODE (x) == PARALLEL)
6238 : {
6239 30846053 : int i;
6240 93924466 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6241 : {
6242 63078413 : rtx y = XVECEXP (x, 0, i);
6243 63078413 : if (GET_CODE (y) == CLOBBER)
6244 : {
6245 30456796 : rtx ref = XEXP (y, 0);
6246 30456796 : if (REG_P (ref) || GET_CODE (ref) == SUBREG
6247 261380 : || MEM_P (ref))
6248 30258141 : invalidate (ref, VOIDmode);
6249 198655 : else if (GET_CODE (ref) == STRICT_LOW_PART
6250 198655 : || GET_CODE (ref) == ZERO_EXTRACT)
6251 0 : invalidate (XEXP (ref, 0), GET_MODE (ref));
6252 : }
6253 : }
6254 : }
6255 414663369 : }
6256 :
6257 : /* Perform invalidation on the basis of everything about INSN.
6258 : This includes the places CLOBBERed, and anything that might
6259 : alias with something that is SET or CLOBBERed. */
6260 :
6261 : static void
6262 414663369 : invalidate_from_sets_and_clobbers (rtx_insn *insn)
6263 : {
6264 414663369 : rtx tem;
6265 414663369 : rtx x = PATTERN (insn);
6266 :
6267 414663369 : if (CALL_P (insn))
6268 : {
6269 46742339 : for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6270 : {
6271 30957637 : rtx temx = XEXP (tem, 0);
6272 30957637 : if (GET_CODE (temx) == CLOBBER)
6273 0 : invalidate (SET_DEST (temx), VOIDmode);
6274 : }
6275 : }
6276 :
6277 : /* Ensure we invalidate the destination register of a CALL insn.
6278 : This is necessary for machines where this register is a fixed_reg,
6279 : because no other code would invalidate it. */
6280 414663369 : if (GET_CODE (x) == SET && GET_CODE (SET_SRC (x)) == CALL)
6281 7267585 : invalidate (SET_DEST (x), VOIDmode);
6282 :
6283 407395784 : else if (GET_CODE (x) == PARALLEL)
6284 : {
6285 31575535 : int i;
6286 :
6287 96117728 : for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6288 : {
6289 64542193 : rtx y = XVECEXP (x, 0, i);
6290 64542193 : if (GET_CODE (y) == CLOBBER)
6291 : {
6292 31191094 : rtx clobbered = XEXP (y, 0);
6293 :
6294 31191094 : if (REG_P (clobbered)
6295 266192 : || GET_CODE (clobbered) == SUBREG)
6296 30924902 : invalidate (clobbered, VOIDmode);
6297 266192 : else if (GET_CODE (clobbered) == STRICT_LOW_PART
6298 266192 : || GET_CODE (clobbered) == ZERO_EXTRACT)
6299 0 : invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6300 : }
6301 33351099 : else if (GET_CODE (y) == SET && GET_CODE (SET_SRC (y)) == CALL)
6302 10158 : invalidate (SET_DEST (y), VOIDmode);
6303 : }
6304 : }
6305 :
6306 : /* Any single register constraint may introduce a conflict, if the associated
6307 : hard register is live. For example:
6308 :
6309 : r100=%1
6310 : r101=42
6311 : r102=exp(r101)
6312 :
6313 : If the first operand r101 of exp is constrained to hard register %1, then
6314 : r100 cannot be trivially substituted by %1 in the following since %1 got
6315 : clobbered. Such conflicts may stem from single register classes as well
6316 : as hard register constraints. Since prior RA we do not know which
6317 : alternative will be chosen, be conservative and consider any such hard
6318 : register from any alternative as a potential clobber. */
6319 414663369 : extract_insn (insn);
6320 885772196 : for (int nop = recog_data.n_operands - 1; nop >= 0; --nop)
6321 : {
6322 471108827 : int c;
6323 471108827 : const char *p = recog_data.constraints[nop];
6324 15727694130 : for (; (c = *p); p += CONSTRAINT_LEN (c, p))
6325 15256585303 : if (c == ',')
6326 : ;
6327 9970414804 : else if (c == '{')
6328 : {
6329 190 : int regno = decode_hard_reg_constraint (p);
6330 190 : machine_mode mode = recog_data.operand_mode[nop];
6331 190 : invalidate_reg (gen_rtx_REG (mode, regno));
6332 : }
6333 : }
6334 414663369 : }
6335 :
6336 : static rtx cse_process_note (rtx);
6337 :
6338 : /* A simplify_replace_fn_rtx callback for cse_process_note. Process X,
6339 : part of the REG_NOTES of an insn. Replace any registers with either
6340 : an equivalent constant or the canonical form of the register.
6341 : Only replace addresses if the containing MEM remains valid.
6342 :
6343 : Return the replacement for X, or null if it should be simplified
6344 : recursively. */
6345 :
6346 : static rtx
6347 29829214 : cse_process_note_1 (rtx x, const_rtx, void *)
6348 : {
6349 29829214 : if (MEM_P (x))
6350 : {
6351 2082826 : validate_change (x, &XEXP (x, 0), cse_process_note (XEXP (x, 0)), false);
6352 1041413 : return x;
6353 : }
6354 :
6355 28787801 : if (REG_P (x))
6356 : {
6357 6297614 : int i = REG_QTY (REGNO (x));
6358 :
6359 : /* Return a constant or a constant register. */
6360 6297614 : if (REGNO_QTY_VALID_P (REGNO (x)))
6361 : {
6362 1698819 : struct qty_table_elem *ent = &qty_table[i];
6363 :
6364 1698819 : if (ent->const_rtx != NULL_RTX
6365 21775 : && (CONSTANT_P (ent->const_rtx)
6366 16147 : || REG_P (ent->const_rtx)))
6367 : {
6368 5628 : rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6369 5628 : if (new_rtx)
6370 5628 : return copy_rtx (new_rtx);
6371 : }
6372 : }
6373 :
6374 : /* Otherwise, canonicalize this register. */
6375 6291986 : return canon_reg (x, NULL);
6376 : }
6377 :
6378 : return NULL_RTX;
6379 : }
6380 :
6381 : /* Process X, part of the REG_NOTES of an insn. Replace any registers in it
6382 : with either an equivalent constant or the canonical form of the register.
6383 : Only replace addresses if the containing MEM remains valid. */
6384 :
6385 : static rtx
6386 10152560 : cse_process_note (rtx x)
6387 : {
6388 1041413 : return simplify_replace_fn_rtx (x, NULL_RTX, cse_process_note_1, NULL);
6389 : }
6390 :
6391 :
6392 : /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6393 :
6394 : DATA is a pointer to a struct cse_basic_block_data, that is used to
6395 : describe the path.
6396 : It is filled with a queue of basic blocks, starting with FIRST_BB
6397 : and following a trace through the CFG.
6398 :
6399 : If all paths starting at FIRST_BB have been followed, or no new path
6400 : starting at FIRST_BB can be constructed, this function returns FALSE.
6401 : Otherwise, DATA->path is filled and the function returns TRUE indicating
6402 : that a path to follow was found.
6403 :
6404 : If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6405 : block in the path will be FIRST_BB. */
6406 :
6407 : static bool
6408 40257907 : cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6409 : bool follow_jumps)
6410 : {
6411 40257907 : basic_block bb;
6412 40257907 : edge e;
6413 40257907 : int path_size;
6414 :
6415 40257907 : bitmap_set_bit (cse_visited_basic_blocks, first_bb->index);
6416 :
6417 : /* See if there is a previous path. */
6418 40257907 : path_size = data->path_size;
6419 :
6420 : /* There is a previous path. Make sure it started with FIRST_BB. */
6421 40257907 : if (path_size)
6422 21655159 : gcc_assert (data->path[0].bb == first_bb);
6423 :
6424 : /* There was only one basic block in the last path. Clear the path and
6425 : return, so that paths starting at another basic block can be tried. */
6426 21655159 : if (path_size == 1)
6427 : {
6428 14489464 : path_size = 0;
6429 14489464 : goto done;
6430 : }
6431 :
6432 : /* If the path was empty from the beginning, construct a new path. */
6433 25768443 : if (path_size == 0)
6434 18602748 : data->path[path_size++].bb = first_bb;
6435 : else
6436 : {
6437 : /* Otherwise, path_size must be equal to or greater than 2, because
6438 : a previous path exists that is at least two basic blocks long.
6439 :
6440 : Update the previous branch path, if any. If the last branch was
6441 : previously along the branch edge, take the fallthrough edge now. */
6442 15818889 : while (path_size >= 2)
6443 : {
6444 11705605 : basic_block last_bb_in_path, previous_bb_in_path;
6445 11705605 : edge e;
6446 :
6447 11705605 : --path_size;
6448 11705605 : last_bb_in_path = data->path[path_size].bb;
6449 11705605 : previous_bb_in_path = data->path[path_size - 1].bb;
6450 :
6451 : /* If we previously followed a path along the branch edge, try
6452 : the fallthru edge now. */
6453 20358799 : if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6454 11365367 : && any_condjump_p (BB_END (previous_bb_in_path))
6455 11365367 : && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6456 23070972 : && e == BRANCH_EDGE (previous_bb_in_path))
6457 : {
6458 4060781 : bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6459 4060781 : if (bb != EXIT_BLOCK_PTR_FOR_FN (cfun)
6460 4060781 : && single_pred_p (bb)
6461 : /* We used to assert here that we would only see blocks
6462 : that we have not visited yet. But we may end up
6463 : visiting basic blocks twice if the CFG has changed
6464 : in this run of cse_main, because when the CFG changes
6465 : the topological sort of the CFG also changes. A basic
6466 : blocks that previously had more than two predecessors
6467 : may now have a single predecessor, and become part of
6468 : a path that starts at another basic block.
6469 :
6470 : We still want to visit each basic block only once, so
6471 : halt the path here if we have already visited BB. */
6472 7113192 : && !bitmap_bit_p (cse_visited_basic_blocks, bb->index))
6473 : {
6474 3052411 : bitmap_set_bit (cse_visited_basic_blocks, bb->index);
6475 3052411 : data->path[path_size++].bb = bb;
6476 3052411 : break;
6477 : }
6478 : }
6479 :
6480 8653194 : data->path[path_size].bb = NULL;
6481 : }
6482 :
6483 : /* If only one block remains in the path, bail. */
6484 7165695 : if (path_size == 1)
6485 : {
6486 4113284 : path_size = 0;
6487 4113284 : goto done;
6488 : }
6489 : }
6490 :
6491 : /* Extend the path if possible. */
6492 21655159 : if (follow_jumps)
6493 : {
6494 12358805 : bb = data->path[path_size - 1].bb;
6495 21015581 : while (bb && path_size < param_max_cse_path_length)
6496 : {
6497 20856783 : if (single_succ_p (bb))
6498 9150557 : e = single_succ_edge (bb);
6499 11706226 : else if (EDGE_COUNT (bb->succs) == 2
6500 11690765 : && any_condjump_p (BB_END (bb)))
6501 : {
6502 : /* First try to follow the branch. If that doesn't lead
6503 : to a useful path, follow the fallthru edge. */
6504 9256397 : e = BRANCH_EDGE (bb);
6505 9256397 : if (!single_pred_p (e->dest))
6506 5185285 : e = FALLTHRU_EDGE (bb);
6507 : }
6508 : else
6509 : e = NULL;
6510 :
6511 18406954 : if (e
6512 18406954 : && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6513 18405909 : && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
6514 16221325 : && single_pred_p (e->dest)
6515 : /* Avoid visiting basic blocks twice. The large comment
6516 : above explains why this can happen. */
6517 27063741 : && !bitmap_bit_p (cse_visited_basic_blocks, e->dest->index))
6518 : {
6519 8656776 : basic_block bb2 = e->dest;
6520 8656776 : bitmap_set_bit (cse_visited_basic_blocks, bb2->index);
6521 8656776 : data->path[path_size++].bb = bb2;
6522 8656776 : bb = bb2;
6523 : }
6524 : else
6525 : bb = NULL;
6526 : }
6527 : }
6528 :
6529 9296354 : done:
6530 40257907 : data->path_size = path_size;
6531 40257907 : return path_size != 0;
6532 : }
6533 :
6534 : /* Dump the path in DATA to file F. NSETS is the number of sets
6535 : in the path. */
6536 :
6537 : static void
6538 317 : cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6539 : {
6540 317 : int path_entry;
6541 :
6542 317 : fprintf (f, ";; Following path with %d sets: ", nsets);
6543 1119 : for (path_entry = 0; path_entry < data->path_size; path_entry++)
6544 485 : fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6545 317 : fputc ('\n', f);
6546 317 : fflush (f);
6547 317 : }
6548 :
6549 :
6550 : /* Return true if BB has exception handling successor edges. */
6551 :
6552 : static bool
6553 9076744 : have_eh_succ_edges (basic_block bb)
6554 : {
6555 9076744 : edge e;
6556 9076744 : edge_iterator ei;
6557 :
6558 21371579 : FOR_EACH_EDGE (e, ei, bb->succs)
6559 13293415 : if (e->flags & EDGE_EH)
6560 : return true;
6561 :
6562 : return false;
6563 : }
6564 :
6565 : /* Record vec_duplicate match for SET in the same basic block, if any. */
6566 : static void
6567 204834804 : cse_prescan_cache_vec_dup (struct cse_basic_block_data *data, basic_block bb,
6568 : rtx_insn *insn, rtx set)
6569 : {
6570 204834804 : rtx src = SET_SRC (set);
6571 204834804 : rtx dest = SET_DEST (set);
6572 204834804 : machine_mode mode = GET_MODE (src);
6573 204834804 : rtx scalar;
6574 :
6575 : /* Limit matching to duplicates of the same pseudo register, or an exact
6576 : SUBREG of such a pseudo. */
6577 204834804 : if (!vec_duplicate_p (src, &scalar))
6578 204499429 : return;
6579 1047313 : if (REG_P (scalar))
6580 : {
6581 335124 : if (HARD_REGISTER_P (scalar))
6582 : return;
6583 : }
6584 712189 : else if (SUBREG_P (scalar))
6585 : {
6586 737 : if (!REG_P (SUBREG_REG (scalar))
6587 737 : || HARD_REGISTER_P (SUBREG_REG (scalar)))
6588 : return;
6589 : }
6590 : else
6591 : return;
6592 :
6593 : /* Check for matching cached vec_duplicates and save the match if found. */
6594 1214376 : for (auto &entry : data->vec_duplicate_cache)
6595 : {
6596 : /* Create a match with existing cache entry if both scalar register
6597 : pseudos are matching and the new vec_duplicate mode is wider. */
6598 207279 : if (REG_P (dest) && rtx_equal_p (entry.scalar, scalar)
6599 1458 : && known_gt (GET_MODE_SIZE (mode), GET_MODE_SIZE (entry.widest_mode))
6600 207429 : && GET_MODE_INNER (mode) == GET_MODE_INNER (entry.widest_mode))
6601 : {
6602 75 : entry.widest_mode = mode;
6603 75 : entry.widest_insn = insn;
6604 75 : entry.related_dups.safe_push (insn);
6605 75 : return;
6606 : }
6607 414408 : else if (GET_MODE_INNER (mode) == GET_MODE_INNER (entry.widest_mode)
6608 198587 : && rtx_equal_p (entry.scalar, scalar)
6609 208026 : && known_le (GET_MODE_SIZE (mode),
6610 : GET_MODE_SIZE (entry.widest_mode)))
6611 : {
6612 411 : entry.related_dups.safe_push (insn);
6613 411 : return;
6614 : }
6615 : }
6616 :
6617 : /* Cache vec_duplicate as a new entry if no match was found. */
6618 335375 : cse_vec_duplicate_match new_entry (bb, mode, scalar, insn, NULL);
6619 335375 : new_entry.related_dups.safe_push (insn);
6620 335375 : data->vec_duplicate_cache.safe_push (new_entry);
6621 335375 : }
6622 :
6623 :
6624 : /* Scan to the end of the path described by DATA. Return an estimate of
6625 : the total number of SETs of all insns in the path. Also record any
6626 : matching vec_duplicate SETs of the same scalar value for different modes. */
6627 :
6628 : static void
6629 21655159 : cse_prescan_path (struct cse_basic_block_data *data)
6630 : {
6631 21655159 : int nsets = 0;
6632 21655159 : int path_size = data->path_size;
6633 21655159 : int path_entry;
6634 :
6635 21655159 : data->vec_duplicate_matches.truncate (0);
6636 :
6637 : /* Scan to end of each basic block in the path. */
6638 80292705 : for (path_entry = 0; path_entry < path_size; path_entry++)
6639 : {
6640 36982387 : basic_block bb;
6641 36982387 : rtx_insn *insn;
6642 :
6643 36982387 : bb = data->path[path_entry].bb;
6644 36982387 : data->vec_duplicate_cache.truncate (0);
6645 :
6646 510752031 : FOR_BB_INSNS (bb, insn)
6647 : {
6648 473769644 : if (!INSN_P (insn))
6649 59090350 : continue;
6650 :
6651 414679294 : rtx pattern = PATTERN (insn);
6652 :
6653 : /* A PARALLEL can have lots of SETs in it,
6654 : especially if it is really an ASM_OPERANDS. */
6655 414679294 : if (GET_CODE (pattern) == PARALLEL)
6656 : {
6657 31580314 : int len = XVECLEN (pattern, 0);
6658 :
6659 31580314 : nsets += len;
6660 96132065 : for (int i = 0; i < len; i++)
6661 : {
6662 64551751 : rtx elt = XVECEXP (pattern, 0, i);
6663 64551751 : if (GET_CODE (elt) == SET)
6664 32512802 : cse_prescan_cache_vec_dup (data, bb, insn, elt);
6665 : }
6666 : }
6667 : else
6668 : {
6669 383098980 : if (GET_CODE (pattern) == SET)
6670 172322002 : cse_prescan_cache_vec_dup (data, bb, insn, pattern);
6671 383098980 : nsets += 1;
6672 : }
6673 : }
6674 :
6675 : /* Record any vec_duplicate matches from this basic block. */
6676 111282536 : for (auto &entry : data->vec_duplicate_cache)
6677 : {
6678 : /* If we recorded no wider vec_duplicate match then skip. */
6679 335375 : if (entry.widest_insn == NULL_RTX)
6680 335307 : continue;
6681 :
6682 68 : data->vec_duplicate_matches.safe_push (entry);
6683 : }
6684 : }
6685 :
6686 21655159 : data->nsets = nsets;
6687 21655159 : }
6688 :
6689 : /* Return true if the pattern of INSN uses a LABEL_REF for which
6690 : there isn't a REG_LABEL_OPERAND note. */
6691 :
6692 : static bool
6693 414497520 : check_for_label_ref (rtx_insn *insn)
6694 : {
6695 : /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6696 : note for it, we must rerun jump since it needs to place the note. If
6697 : this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6698 : don't do this since no REG_LABEL_OPERAND will be added. */
6699 414497520 : subrtx_iterator::array_type array;
6700 2054751345 : FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
6701 : {
6702 1640255107 : const_rtx x = *iter;
6703 1640255107 : if (GET_CODE (x) == LABEL_REF
6704 20452296 : && !LABEL_REF_NONLOCAL_P (x)
6705 20451469 : && (!JUMP_P (insn)
6706 20411132 : || !label_is_jump_target_p (label_ref_label (x), insn))
6707 40338 : && LABEL_P (label_ref_label (x))
6708 39994 : && INSN_UID (label_ref_label (x)) != 0
6709 1640295101 : && !find_reg_note (insn, REG_LABEL_OPERAND, label_ref_label (x)))
6710 1282 : return true;
6711 : }
6712 414496238 : return false;
6713 414497520 : }
6714 :
6715 : /* Process a single extended basic block described by EBB_DATA. */
6716 :
6717 : static void
6718 21118876 : cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6719 : {
6720 21118876 : int path_size = ebb_data->path_size;
6721 21118876 : int path_entry;
6722 21118876 : int num_insns = 0;
6723 :
6724 : /* Allocate the space needed by qty_table. */
6725 21118876 : qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6726 :
6727 21118876 : new_basic_block ();
6728 21118876 : cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6729 21118876 : cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6730 57561251 : for (path_entry = 0; path_entry < path_size; path_entry++)
6731 : {
6732 36442375 : basic_block bb;
6733 36442375 : rtx_insn *insn;
6734 :
6735 36442375 : bb = ebb_data->path[path_entry].bb;
6736 :
6737 : /* Invalidate recorded information for eh regs if there is an EH
6738 : edge pointing to that bb. */
6739 36442375 : if (bb_has_eh_pred (bb))
6740 : {
6741 544628 : df_ref def;
6742 :
6743 2178512 : FOR_EACH_ARTIFICIAL_DEF (def, bb->index)
6744 1089256 : if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6745 1089256 : invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6746 : }
6747 :
6748 36442375 : optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6749 509250922 : FOR_BB_INSNS (bb, insn)
6750 : {
6751 : /* If we have processed 1,000 insns, flush the hash table to
6752 : avoid extreme quadratic behavior. We must not include NOTEs
6753 : in the count since there may be more of them when generating
6754 : debugging information. If we clear the table at different
6755 : times, code generated with -g -O might be different than code
6756 : generated with -O but not -g.
6757 :
6758 : FIXME: This is a real kludge and needs to be done some other
6759 : way. */
6760 472808547 : if (NONDEBUG_INSN_P (insn)
6761 472808547 : && num_insns++ > param_max_cse_insns)
6762 : {
6763 5909 : flush_hash_table ();
6764 5909 : num_insns = 0;
6765 : }
6766 :
6767 472808547 : if (INSN_P (insn))
6768 : {
6769 : /* Process notes first so we have all notes in canonical forms
6770 : when looking for duplicate operations. */
6771 414663369 : bool changed = false;
6772 653603385 : for (rtx note = REG_NOTES (insn); note; note = XEXP (note, 1))
6773 238940016 : if (REG_NOTE_KIND (note) == REG_EQUAL)
6774 : {
6775 9111147 : rtx newval = cse_process_note (XEXP (note, 0));
6776 9111147 : if (newval != XEXP (note, 0))
6777 : {
6778 43168 : XEXP (note, 0) = newval;
6779 43168 : changed = true;
6780 : }
6781 : }
6782 414663369 : if (changed)
6783 43168 : df_notes_rescan (insn);
6784 :
6785 414663369 : cse_insn (insn);
6786 :
6787 : /* If we haven't already found an insn where we added a LABEL_REF,
6788 : check this one. */
6789 414663369 : if (INSN_P (insn) && !recorded_label_ref
6790 829160889 : && check_for_label_ref (insn))
6791 1282 : recorded_label_ref = true;
6792 : }
6793 : }
6794 :
6795 : /* With non-call exceptions, we are not always able to update
6796 : the CFG properly inside cse_insn. So clean up possibly
6797 : redundant EH edges here. */
6798 36442375 : if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6799 998580 : cse_cfg_altered |= purge_dead_edges (bb);
6800 :
6801 : /* If we changed a conditional jump, we may have terminated
6802 : the path we are following. Check that by verifying that
6803 : the edge we would take still exists. If the edge does
6804 : not exist anymore, purge the remainder of the path.
6805 : Note that this will cause us to return to the caller. */
6806 36442375 : if (path_entry < path_size - 1)
6807 : {
6808 15326376 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6809 15326376 : if (!find_edge (bb, next_bb))
6810 : {
6811 3582 : do
6812 : {
6813 3582 : path_size--;
6814 :
6815 : /* If we truncate the path, we must also reset the
6816 : visited bit on the remaining blocks in the path,
6817 : or we will never visit them at all. */
6818 3582 : bitmap_clear_bit (cse_visited_basic_blocks,
6819 3582 : ebb_data->path[path_size].bb->index);
6820 3582 : ebb_data->path[path_size].bb = NULL;
6821 : }
6822 3582 : while (path_size - 1 != path_entry);
6823 2877 : ebb_data->path_size = path_size;
6824 : }
6825 : }
6826 :
6827 : /* If this is a conditional jump insn, record any known
6828 : equivalences due to the condition being tested. */
6829 36442375 : insn = BB_END (bb);
6830 36442375 : if (path_entry < path_size - 1
6831 51411704 : && EDGE_COUNT (bb->succs) == 2
6832 14969329 : && JUMP_P (insn)
6833 14969329 : && single_set (insn)
6834 14969329 : && any_condjump_p (insn)
6835 : /* single_set may return non-NULL even for multiple sets
6836 : if there are REG_UNUSED notes. record_jump_equiv only
6837 : looks at pc_set and doesn't consider other sets that
6838 : could affect the value, and the recorded equivalence
6839 : can extend the lifetime of the compared REG, so use
6840 : also !multiple_sets check to verify it is exactly one
6841 : set. */
6842 51411704 : && !multiple_sets (insn))
6843 : {
6844 14969329 : basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6845 14969329 : bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6846 14969329 : record_jump_equiv (insn, taken);
6847 : }
6848 : }
6849 :
6850 21118876 : gcc_assert (next_qty <= max_qty);
6851 :
6852 21118876 : free (qty_table);
6853 21118876 : }
6854 :
6855 :
6856 : /* Perform cse on the instructions of a function.
6857 : F is the first instruction.
6858 : NREGS is one plus the highest pseudo-reg number used in the instruction.
6859 :
6860 : Return 2 if jump optimizations should be redone due to simplifications
6861 : in conditional jump instructions.
6862 : Return 1 if the CFG should be cleaned up because it has been modified.
6863 : Return 0 otherwise. */
6864 :
6865 : static int
6866 2339740 : cse_main (rtx_insn *f ATTRIBUTE_UNUSED, int nregs)
6867 : {
6868 2339740 : struct cse_basic_block_data ebb_data;
6869 2339740 : basic_block bb;
6870 2339740 : int *rc_order = XNEWVEC (int, last_basic_block_for_fn (cfun));
6871 2339740 : int i, n_blocks;
6872 :
6873 : /* CSE doesn't use dominane info but can invalidate it in different ways.
6874 : For simplicity free dominance info here. */
6875 2339740 : free_dominance_info (CDI_DOMINATORS);
6876 :
6877 2339740 : df_set_flags (DF_LR_RUN_DCE);
6878 2339740 : df_note_add_problem ();
6879 2339740 : df_analyze ();
6880 2339740 : df_set_flags (DF_DEFER_INSN_RESCAN);
6881 :
6882 2339740 : reg_scan (get_insns (), max_reg_num ());
6883 2339740 : init_cse_reg_info (nregs);
6884 :
6885 2339740 : ebb_data.path = XNEWVEC (struct branch_path,
6886 : param_max_cse_path_length);
6887 :
6888 2339740 : cse_cfg_altered = false;
6889 2339740 : cse_jumps_altered = false;
6890 2339740 : recorded_label_ref = false;
6891 2339740 : ebb_data.path_size = 0;
6892 2339740 : ebb_data.nsets = 0;
6893 2339740 : rtl_hooks = cse_rtl_hooks;
6894 :
6895 2339740 : init_recog ();
6896 2339740 : init_alias_analysis ();
6897 :
6898 2339740 : reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6899 :
6900 : /* Set up the table of already visited basic blocks. */
6901 2339740 : cse_visited_basic_blocks = sbitmap_alloc (last_basic_block_for_fn (cfun));
6902 2339740 : bitmap_clear (cse_visited_basic_blocks);
6903 :
6904 : /* Loop over basic blocks in reverse completion order (RPO),
6905 : excluding the ENTRY and EXIT blocks. */
6906 2339740 : n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6907 2339740 : i = 0;
6908 23282228 : while (i < n_blocks)
6909 : {
6910 : /* Find the first block in the RPO queue that we have not yet
6911 : processed before. */
6912 29892320 : do
6913 : {
6914 29892320 : bb = BASIC_BLOCK_FOR_FN (cfun, rc_order[i++]);
6915 : }
6916 29892320 : while (bitmap_bit_p (cse_visited_basic_blocks, bb->index)
6917 48495068 : && i < n_blocks);
6918 :
6919 : /* Find all paths starting with BB, and process them. */
6920 40257907 : while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6921 : {
6922 : /* Pre-scan the path. */
6923 21655159 : cse_prescan_path (&ebb_data);
6924 :
6925 : /* If this basic block has no sets, skip it. */
6926 21655159 : if (ebb_data.nsets == 0)
6927 536283 : continue;
6928 :
6929 : /* If prescan discovers any vec_duplicate pairs where a wider duplicate
6930 : appears after a narrow duplicate of the same scalar, move the
6931 : widest duplicate before the first vec_duplicate of this scalar and
6932 : rewrite all related duplicates to reuse it. */
6933 63356696 : for (auto &match : ebb_data.vec_duplicate_matches)
6934 : {
6935 68 : rtx wide_set = single_set (match.widest_insn);
6936 68 : if (!wide_set)
6937 0 : continue;
6938 68 : rtx wide_reg = SET_DEST (wide_set);
6939 68 : rtx_insn *insert_after = PREV_INSN (match.first_insn);
6940 68 : if (!REG_P (wide_reg) || !insert_after)
6941 0 : continue;
6942 :
6943 : /* Safety check that WIDE_REG is not otherwise used or redefined
6944 : before its original defining insn. */
6945 68 : if (reg_used_between_p (wide_reg, match.first_insn,
6946 68 : match.widest_insn)
6947 136 : || reg_set_between_p (wide_reg, match.first_insn,
6948 68 : match.widest_insn))
6949 0 : continue;
6950 :
6951 : /* Rewrite all related duplicates as a group so we either keep the
6952 : whole transformation or none of it. */
6953 68 : int prev_changes = num_changes_pending ();
6954 68 : bool abort_changes = false;
6955 :
6956 349 : for (auto &dup_insn : match.related_dups)
6957 : {
6958 145 : rtx dup_set;
6959 145 : rtx dup_src;
6960 145 : machine_mode dup_mode;
6961 :
6962 145 : if (dup_insn == match.widest_insn)
6963 68 : continue;
6964 :
6965 : /* The earlier safety check already covered the range from
6966 : FIRST_INSN up to WIDEST_INSN. Only check the remaining
6967 : suffix for duplicates that come later in the block. This
6968 : also covers call-clobbered hard registers via
6969 : reg_set_between_p. */
6970 77 : bool reg_set = false;
6971 77 : bool reg_set_with_widest_after = false;
6972 1473 : for (rtx_insn *scan = NEXT_INSN (match.widest_insn);
6973 1473 : scan != NEXT_INSN (BB_END (match.bb)) && scan != NULL_RTX;
6974 1396 : scan = NEXT_INSN (scan))
6975 : {
6976 1398 : if (scan == dup_insn)
6977 : {
6978 : reg_set_with_widest_after = reg_set;
6979 : break;
6980 : }
6981 1396 : if (!reg_set && INSN_P (scan) && reg_set_p (wide_reg, scan))
6982 : reg_set = true;
6983 : }
6984 :
6985 77 : if (reg_set_with_widest_after)
6986 0 : continue;
6987 :
6988 77 : dup_set = single_set (dup_insn);
6989 77 : if (!dup_set)
6990 : {
6991 : abort_changes = true;
6992 : break;
6993 : }
6994 :
6995 77 : dup_mode = GET_MODE (SET_DEST (dup_set));
6996 77 : if (dup_mode == GET_MODE (wide_reg))
6997 : dup_src = wide_reg;
6998 : else
6999 : {
7000 77 : dup_src = gen_lowpart (dup_mode, wide_reg);
7001 77 : if (!dup_src)
7002 : {
7003 : abort_changes = true;
7004 : break;
7005 : }
7006 : }
7007 :
7008 77 : if (rtx_equal_p (dup_src, SET_DEST (dup_set)))
7009 0 : continue;
7010 :
7011 77 : if (!validate_change (dup_insn, &SET_SRC (dup_set), dup_src, 1))
7012 : {
7013 : abort_changes = true;
7014 : break;
7015 : }
7016 : }
7017 :
7018 68 : if (abort_changes)
7019 : {
7020 0 : cancel_changes (prev_changes);
7021 0 : continue;
7022 : }
7023 :
7024 68 : if (num_changes_pending () == prev_changes)
7025 0 : continue;
7026 :
7027 68 : if (!apply_change_group ())
7028 0 : continue;
7029 :
7030 68 : reorder_insns (match.widest_insn, match.widest_insn, insert_after);
7031 :
7032 68 : if (match.related_dups.contains (match.widest_insn))
7033 68 : df_insn_rescan (match.widest_insn);
7034 : }
7035 :
7036 : /* Get a reasonable estimate for the maximum number of qty's
7037 : needed for this path. For this, we take the number of sets
7038 : and multiply that by MAX_RECOG_OPERANDS. */
7039 21118876 : max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
7040 :
7041 : /* Dump the path we're about to process. */
7042 21118876 : if (dump_file)
7043 317 : cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
7044 :
7045 21118876 : cse_extended_basic_block (&ebb_data);
7046 : }
7047 : }
7048 :
7049 : /* Clean up. */
7050 2339740 : end_alias_analysis ();
7051 2339740 : free (reg_eqv_table);
7052 2339740 : free (ebb_data.path);
7053 2339740 : sbitmap_free (cse_visited_basic_blocks);
7054 2339740 : free (rc_order);
7055 2339740 : rtl_hooks = general_rtl_hooks;
7056 :
7057 2339740 : if (cse_jumps_altered || recorded_label_ref)
7058 : return 2;
7059 2331897 : else if (cse_cfg_altered)
7060 : return 1;
7061 : else
7062 2322219 : return 0;
7063 2339740 : }
7064 :
7065 : /* Count the number of times registers are used (not set) in X.
7066 : COUNTS is an array in which we accumulate the count, INCR is how much
7067 : we count each register usage.
7068 :
7069 : Don't count a usage of DEST, which is the SET_DEST of a SET which
7070 : contains X in its SET_SRC. This is because such a SET does not
7071 : modify the liveness of DEST.
7072 : DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
7073 : We must then count uses of a SET_DEST regardless, because the insn can't be
7074 : deleted here.
7075 : Also count uses of a SET_DEST if it has been used by an earlier insn,
7076 : but in that case only when incrementing and not when decrementing, effectively
7077 : making setters of such a pseudo non-eliminable. This is for cases like
7078 : (set (reg x) (expr))
7079 : ...
7080 : (set (reg y) (expr (reg (x))))
7081 : ...
7082 : (set (reg x) (expr (reg (x))))
7083 : where we can't eliminate the last insn because x is is still used, if y
7084 : is unused we can eliminate the middle insn and when considering the first insn
7085 : we used to eliminate it despite it being used in the last insn. */
7086 :
7087 : static void
7088 2502449010 : count_reg_usage (rtx x, int *counts, rtx dest, int incr)
7089 : {
7090 2988602079 : enum rtx_code code;
7091 2988602079 : rtx note;
7092 2988602079 : const char *fmt;
7093 2988602079 : int i, j;
7094 :
7095 2988602079 : if (x == 0)
7096 : return;
7097 :
7098 2958345528 : switch (code = GET_CODE (x))
7099 : {
7100 561387123 : case REG:
7101 561387123 : if (x != dest || (incr > 0 && counts[REGNO (x)]))
7102 557618837 : counts[REGNO (x)] += incr;
7103 : return;
7104 :
7105 : case PC:
7106 : case CONST:
7107 : CASE_CONST_ANY:
7108 : case SYMBOL_REF:
7109 : case LABEL_REF:
7110 : return;
7111 :
7112 174640882 : case CLOBBER:
7113 : /* If we are clobbering a MEM, mark any registers inside the address
7114 : as being used. */
7115 174640882 : if (MEM_P (XEXP (x, 0)))
7116 216580 : count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7117 : return;
7118 :
7119 401949943 : case SET:
7120 : /* Unless we are setting a REG, count everything in SET_DEST. */
7121 401949943 : if (!REG_P (SET_DEST (x)))
7122 97603491 : count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7123 401949943 : count_reg_usage (SET_SRC (x), counts,
7124 : dest ? dest : SET_DEST (x),
7125 : incr);
7126 401949943 : return;
7127 :
7128 : case DEBUG_INSN:
7129 : return;
7130 :
7131 422910401 : case CALL_INSN:
7132 422910401 : case INSN:
7133 422910401 : case JUMP_INSN:
7134 : /* We expect dest to be NULL_RTX here. If the insn may throw,
7135 : or if it cannot be deleted due to side-effects, mark this fact
7136 : by setting DEST to pc_rtx. */
7137 163432581 : if ((!cfun->can_delete_dead_exceptions && !insn_nothrow_p (x))
7138 568154931 : || side_effects_p (PATTERN (x)))
7139 55240602 : dest = pc_rtx;
7140 422910401 : if (code == CALL_INSN)
7141 30256551 : count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
7142 422910401 : count_reg_usage (PATTERN (x), counts, dest, incr);
7143 :
7144 : /* Things used in a REG_EQUAL note aren't dead since loop may try to
7145 : use them. */
7146 :
7147 422910401 : note = find_reg_equal_equiv_note (x);
7148 422910401 : if (note)
7149 : {
7150 22988542 : rtx eqv = XEXP (note, 0);
7151 :
7152 22988542 : if (GET_CODE (eqv) == EXPR_LIST)
7153 : /* This REG_EQUAL note describes the result of a function call.
7154 : Process all the arguments. */
7155 0 : do
7156 : {
7157 0 : count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
7158 0 : eqv = XEXP (eqv, 1);
7159 : }
7160 0 : while (eqv && GET_CODE (eqv) == EXPR_LIST);
7161 : else
7162 : count_reg_usage (eqv, counts, dest, incr);
7163 : }
7164 : return;
7165 :
7166 60998004 : case EXPR_LIST:
7167 60998004 : if (REG_NOTE_KIND (x) == REG_EQUAL
7168 60998004 : || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7169 : /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7170 : involving registers in the address. */
7171 688141 : || GET_CODE (XEXP (x, 0)) == CLOBBER)
7172 60309863 : count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7173 :
7174 60998004 : count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7175 60998004 : return;
7176 :
7177 674175 : case ASM_OPERANDS:
7178 : /* Iterate over just the inputs, not the constraints as well. */
7179 1361529 : for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7180 687354 : count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
7181 : return;
7182 :
7183 0 : case INSN_LIST:
7184 0 : case INT_LIST:
7185 0 : gcc_unreachable ();
7186 :
7187 744562479 : default:
7188 744562479 : break;
7189 : }
7190 :
7191 744562479 : fmt = GET_RTX_FORMAT (code);
7192 2061678446 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7193 : {
7194 1317115967 : if (fmt[i] == 'e')
7195 1001850105 : count_reg_usage (XEXP (x, i), counts, dest, incr);
7196 315265862 : else if (fmt[i] == 'E')
7197 209688709 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7198 140444091 : count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7199 : }
7200 : }
7201 :
7202 : /* Return true if X is a dead register. */
7203 :
7204 : static inline bool
7205 829629141 : is_dead_reg (const_rtx x, int *counts)
7206 : {
7207 829629141 : return (REG_P (x)
7208 356820123 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
7209 221928900 : && counts[REGNO (x)] == 0);
7210 : }
7211 :
7212 : /* Return true if set is live. */
7213 : static bool
7214 379661442 : set_live_p (rtx set, int *counts)
7215 : {
7216 379661442 : if (set_noop_p (set))
7217 : return false;
7218 :
7219 379639913 : if (!is_dead_reg (SET_DEST (set), counts)
7220 8800980 : || side_effects_p (SET_SRC (set)))
7221 370902833 : return true;
7222 :
7223 : return false;
7224 : }
7225 :
7226 : /* Return true if insn is live. */
7227 :
7228 : static bool
7229 739470070 : insn_live_p (rtx_insn *insn, int *counts)
7230 : {
7231 739470070 : int i;
7232 739470070 : if (!cfun->can_delete_dead_exceptions && !insn_nothrow_p (insn))
7233 : return true;
7234 720965811 : else if (GET_CODE (PATTERN (insn)) == SET)
7235 319965592 : return set_live_p (PATTERN (insn), counts);
7236 401000219 : else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7237 : {
7238 120772355 : for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7239 : {
7240 120264039 : rtx elt = XVECEXP (PATTERN (insn), 0, i);
7241 :
7242 120264039 : if (GET_CODE (elt) == SET)
7243 : {
7244 59695850 : if (set_live_p (elt, counts))
7245 : return true;
7246 : }
7247 60568189 : else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7248 : return true;
7249 : }
7250 : return false;
7251 : }
7252 341271064 : else if (DEBUG_INSN_P (insn))
7253 : {
7254 324700372 : if (DEBUG_MARKER_INSN_P (insn))
7255 : return true;
7256 :
7257 251692508 : if (DEBUG_BIND_INSN_P (insn)
7258 251692508 : && TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
7259 442489 : return false;
7260 :
7261 : return true;
7262 : }
7263 : else
7264 : return true;
7265 : }
7266 :
7267 : /* Count the number of stores into pseudo. Callback for note_stores. */
7268 :
7269 : static void
7270 261768838 : count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
7271 : {
7272 261768838 : int *counts = (int *) data;
7273 261768838 : if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
7274 97983520 : counts[REGNO (x)]++;
7275 261768838 : }
7276 :
7277 : /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
7278 : pseudo doesn't have a replacement. COUNTS[X] is zero if register X
7279 : is dead and REPLACEMENTS[X] is null if it has no replacement.
7280 : Set *SEEN_REPL to true if we see a dead register that does have
7281 : a replacement. */
7282 :
7283 : static bool
7284 251583911 : is_dead_debug_insn (const_rtx pat, int *counts, rtx *replacements,
7285 : bool *seen_repl)
7286 : {
7287 251583911 : subrtx_iterator::array_type array;
7288 697355331 : FOR_EACH_SUBRTX (iter, array, pat, NONCONST)
7289 : {
7290 445797022 : const_rtx x = *iter;
7291 513996897 : if (is_dead_reg (x, counts))
7292 : {
7293 51319 : if (replacements && replacements[REGNO (x)] != NULL_RTX)
7294 25717 : *seen_repl = true;
7295 : else
7296 25602 : return true;
7297 : }
7298 : }
7299 251558309 : return false;
7300 251583911 : }
7301 :
7302 : /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
7303 : Callback for simplify_replace_fn_rtx. */
7304 :
7305 : static rtx
7306 40855 : replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
7307 : {
7308 40855 : rtx *replacements = (rtx *) data;
7309 :
7310 40855 : if (REG_P (x)
7311 26625 : && REGNO (x) >= FIRST_PSEUDO_REGISTER
7312 67442 : && replacements[REGNO (x)] != NULL_RTX)
7313 : {
7314 25717 : if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
7315 : return replacements[REGNO (x)];
7316 0 : return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
7317 0 : GET_MODE (replacements[REGNO (x)]));
7318 : }
7319 : return NULL_RTX;
7320 : }
7321 :
7322 : /* Scan all the insns and delete any that are dead; i.e., they store a register
7323 : that is never used or they copy a register to itself.
7324 :
7325 : This is used to remove insns made obviously dead by cse, loop or other
7326 : optimizations. It improves the heuristics in loop since it won't try to
7327 : move dead invariants out of loops or make givs for dead quantities. The
7328 : remaining passes of the compilation are also sped up. */
7329 :
7330 : int
7331 6505036 : delete_trivially_dead_insns (rtx_insn *insns, int nreg)
7332 : {
7333 6505036 : int *counts;
7334 6505036 : rtx_insn *insn, *prev;
7335 6505036 : rtx *replacements = NULL;
7336 6505036 : int ndead = 0;
7337 :
7338 6505036 : timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7339 : /* First count the number of times each register is used. */
7340 6505036 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7341 : {
7342 2721993 : counts = XCNEWVEC (int, nreg * 3);
7343 643507072 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7344 638063086 : if (DEBUG_BIND_INSN_P (insn))
7345 : {
7346 252008716 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7347 : NULL_RTX, 1);
7348 252008716 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 0;
7349 : }
7350 386054370 : else if (INSN_P (insn))
7351 : {
7352 311296702 : count_reg_usage (insn, counts, NULL_RTX, 1);
7353 311296702 : note_stores (insn, count_stores, counts + nreg * 2);
7354 : }
7355 : /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7356 : First one counts how many times each pseudo is used outside
7357 : of debug insns, second counts how many times each pseudo is
7358 : used in debug insns and third counts how many times a pseudo
7359 : is stored. */
7360 : }
7361 : else
7362 : {
7363 3783043 : counts = XCNEWVEC (int, nreg);
7364 231763982 : for (insn = insns; insn; insn = NEXT_INSN (insn))
7365 224197896 : if (INSN_P (insn))
7366 176164652 : count_reg_usage (insn, counts, NULL_RTX, 1);
7367 : /* If no debug insns can be present, COUNTS is just an array
7368 : which counts how many times each pseudo is used. */
7369 : }
7370 : /* Pseudo PIC register should be considered as used due to possible
7371 : new usages generated. */
7372 6505036 : if (!reload_completed
7373 6505036 : && pic_offset_table_rtx
7374 6723880 : && REGNO (pic_offset_table_rtx) >= FIRST_PSEUDO_REGISTER)
7375 218844 : counts[REGNO (pic_offset_table_rtx)]++;
7376 : /* Go from the last insn to the first and delete insns that only set unused
7377 : registers or copy a register to itself. As we delete an insn, remove
7378 : usage counts for registers it uses.
7379 :
7380 : The first jump optimization pass may leave a real insn as the last
7381 : insn in the function. We must not skip that insn or we may end
7382 : up deleting code that is not really dead.
7383 :
7384 : If some otherwise unused register is only used in DEBUG_INSNs,
7385 : try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7386 : the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7387 : has been created for the unused register, replace it with
7388 : the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7389 6505036 : auto_vec<tree, 32> later_debug_set_vars;
7390 868766018 : for (insn = get_last_insn (); insn; insn = prev)
7391 : {
7392 862260982 : int live_insn = 0;
7393 :
7394 862260982 : prev = PREV_INSN (insn);
7395 862260982 : if (!INSN_P (insn))
7396 122790912 : continue;
7397 :
7398 739470070 : live_insn = insn_live_p (insn, counts);
7399 :
7400 : /* If this is a dead insn, delete it and show registers in it aren't
7401 : being used. */
7402 :
7403 739470070 : if (! live_insn && dbg_cnt (delete_trivial_dead))
7404 : {
7405 8899400 : if (DEBUG_INSN_P (insn))
7406 : {
7407 442489 : if (DEBUG_BIND_INSN_P (insn))
7408 442489 : count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
7409 : NULL_RTX, -1);
7410 : }
7411 : else
7412 : {
7413 8456911 : rtx set;
7414 8456911 : if (MAY_HAVE_DEBUG_BIND_INSNS
7415 4192206 : && (set = single_set (insn)) != NULL_RTX
7416 4192206 : && is_dead_reg (SET_DEST (set), counts)
7417 : /* Used at least once in some DEBUG_INSN. */
7418 4186343 : && counts[REGNO (SET_DEST (set)) + nreg] > 0
7419 : /* And set exactly once. */
7420 18471 : && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
7421 17685 : && !side_effects_p (SET_SRC (set))
7422 8474596 : && asm_noperands (PATTERN (insn)) < 0)
7423 : {
7424 17684 : rtx dval, bind_var_loc;
7425 17684 : rtx_insn *bind;
7426 :
7427 : /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7428 17684 : dval = make_debug_expr_from_rtl (SET_DEST (set));
7429 :
7430 : /* Emit a debug bind insn before the insn in which
7431 : reg dies. */
7432 17684 : bind_var_loc =
7433 17684 : gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
7434 : DEBUG_EXPR_TREE_DECL (dval),
7435 : SET_SRC (set),
7436 : VAR_INIT_STATUS_INITIALIZED);
7437 17684 : count_reg_usage (bind_var_loc, counts + nreg, NULL_RTX, 1);
7438 :
7439 17684 : bind = emit_debug_insn_before (bind_var_loc, insn);
7440 17684 : df_insn_rescan (bind);
7441 :
7442 17684 : if (replacements == NULL)
7443 9448 : replacements = XCNEWVEC (rtx, nreg);
7444 17684 : replacements[REGNO (SET_DEST (set))] = dval;
7445 : }
7446 :
7447 8456911 : count_reg_usage (insn, counts, NULL_RTX, -1);
7448 8456911 : ndead++;
7449 : }
7450 8899400 : cse_cfg_altered |= delete_insn_and_edges (insn);
7451 : }
7452 : else
7453 : {
7454 730570670 : if (!DEBUG_INSN_P (insn) || DEBUG_MARKER_INSN_P (insn))
7455 : {
7456 1688280112 : for (tree var : later_debug_set_vars)
7457 251266783 : TREE_VISITED (var) = 0;
7458 479004443 : later_debug_set_vars.truncate (0);
7459 : }
7460 251566227 : else if (DEBUG_BIND_INSN_P (insn)
7461 251566227 : && !TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)))
7462 : {
7463 251560231 : later_debug_set_vars.safe_push (INSN_VAR_LOCATION_DECL (insn));
7464 251560231 : TREE_VISITED (INSN_VAR_LOCATION_DECL (insn)) = 1;
7465 : }
7466 : }
7467 : }
7468 :
7469 6505036 : if (MAY_HAVE_DEBUG_BIND_INSNS)
7470 : {
7471 636168068 : for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
7472 633446075 : if (DEBUG_BIND_INSN_P (insn))
7473 : {
7474 : /* If this debug insn references a dead register that wasn't replaced
7475 : with an DEBUG_EXPR, reset the DEBUG_INSN. */
7476 251583911 : bool seen_repl = false;
7477 251583911 : if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn),
7478 : counts, replacements, &seen_repl))
7479 : {
7480 25602 : INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
7481 25602 : df_insn_rescan (insn);
7482 : }
7483 251558309 : else if (seen_repl)
7484 : {
7485 25706 : INSN_VAR_LOCATION_LOC (insn)
7486 25706 : = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
7487 : NULL_RTX, replace_dead_reg,
7488 : replacements);
7489 25706 : df_insn_rescan (insn);
7490 : }
7491 : }
7492 2721993 : free (replacements);
7493 : }
7494 :
7495 6505036 : if (dump_file && ndead)
7496 26 : fprintf (dump_file, "Deleted %i trivially dead insns\n",
7497 : ndead);
7498 : /* Clean up. */
7499 6505036 : free (counts);
7500 6505036 : timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7501 6505036 : return ndead;
7502 6505036 : }
7503 :
7504 : /* If LOC contains references to NEWREG in a different mode, change them
7505 : to use NEWREG instead. */
7506 :
7507 : static void
7508 59060 : cse_change_cc_mode (subrtx_ptr_iterator::array_type &array,
7509 : rtx *loc, rtx_insn *insn, rtx newreg)
7510 : {
7511 365513 : FOR_EACH_SUBRTX_PTR (iter, array, loc, NONCONST)
7512 : {
7513 306453 : rtx *loc = *iter;
7514 306453 : rtx x = *loc;
7515 306453 : if (x
7516 276923 : && REG_P (x)
7517 68456 : && REGNO (x) == REGNO (newreg)
7518 356815 : && GET_MODE (x) != GET_MODE (newreg))
7519 : {
7520 50362 : validate_change (insn, loc, newreg, 1);
7521 50362 : iter.skip_subrtxes ();
7522 : }
7523 : }
7524 59060 : }
7525 :
7526 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7527 : GET_MODE (NEWREG) in INSN. */
7528 :
7529 : static void
7530 29530 : cse_change_cc_mode_insn (rtx_insn *insn, rtx newreg)
7531 : {
7532 29530 : int success;
7533 :
7534 29530 : if (!INSN_P (insn))
7535 0 : return;
7536 :
7537 29530 : subrtx_ptr_iterator::array_type array;
7538 29530 : cse_change_cc_mode (array, &PATTERN (insn), insn, newreg);
7539 29530 : cse_change_cc_mode (array, ®_NOTES (insn), insn, newreg);
7540 :
7541 : /* If the following assertion was triggered, there is most probably
7542 : something wrong with the cc_modes_compatible back end function.
7543 : CC modes only can be considered compatible if the insn - with the mode
7544 : replaced by any of the compatible modes - can still be recognized. */
7545 29530 : success = apply_change_group ();
7546 29530 : gcc_assert (success);
7547 29530 : }
7548 :
7549 : /* Change the mode of any reference to the register REGNO (NEWREG) to
7550 : GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7551 : any instruction which modifies NEWREG. */
7552 :
7553 : static void
7554 19949 : cse_change_cc_mode_insns (rtx_insn *start, rtx_insn *end, rtx newreg)
7555 : {
7556 19949 : rtx_insn *insn;
7557 :
7558 40291 : for (insn = start; insn != end; insn = NEXT_INSN (insn))
7559 : {
7560 21838 : if (! INSN_P (insn))
7561 0 : continue;
7562 :
7563 21838 : if (reg_set_p (newreg, insn))
7564 : return;
7565 :
7566 20342 : cse_change_cc_mode_insn (insn, newreg);
7567 : }
7568 : }
7569 :
7570 : /* BB is a basic block which finishes with CC_REG as a condition code
7571 : register which is set to CC_SRC. Look through the successors of BB
7572 : to find blocks which have a single predecessor (i.e., this one),
7573 : and look through those blocks for an assignment to CC_REG which is
7574 : equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7575 : permitted to change the mode of CC_SRC to a compatible mode. This
7576 : returns VOIDmode if no equivalent assignments were found.
7577 : Otherwise it returns the mode which CC_SRC should wind up with.
7578 : ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7579 : but is passed unmodified down to recursive calls in order to prevent
7580 : endless recursion.
7581 :
7582 : The main complexity in this function is handling the mode issues.
7583 : We may have more than one duplicate which we can eliminate, and we
7584 : try to find a mode which will work for multiple duplicates. */
7585 :
7586 : static machine_mode
7587 5664933 : cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7588 : bool can_change_mode)
7589 : {
7590 5664933 : bool found_equiv;
7591 5664933 : machine_mode mode;
7592 5664933 : unsigned int insn_count;
7593 5664933 : edge e;
7594 5664933 : rtx_insn *insns[2];
7595 5664933 : machine_mode modes[2];
7596 5664933 : rtx_insn *last_insns[2];
7597 5664933 : unsigned int i;
7598 5664933 : rtx newreg;
7599 5664933 : edge_iterator ei;
7600 :
7601 : /* We expect to have two successors. Look at both before picking
7602 : the final mode for the comparison. If we have more successors
7603 : (i.e., some sort of table jump, although that seems unlikely),
7604 : then we require all beyond the first two to use the same
7605 : mode. */
7606 :
7607 5664933 : found_equiv = false;
7608 5664933 : mode = GET_MODE (cc_src);
7609 5664933 : insn_count = 0;
7610 16039771 : FOR_EACH_EDGE (e, ei, bb->succs)
7611 : {
7612 10374838 : rtx_insn *insn;
7613 10374838 : rtx_insn *end;
7614 :
7615 10374838 : if (e->flags & EDGE_COMPLEX)
7616 32765 : continue;
7617 :
7618 10342073 : if (EDGE_COUNT (e->dest->preds) != 1
7619 5784803 : || e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
7620 : /* Avoid endless recursion on unreachable blocks. */
7621 16029432 : || e->dest == orig_bb)
7622 4654714 : continue;
7623 :
7624 5687359 : end = NEXT_INSN (BB_END (e->dest));
7625 36564812 : for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7626 : {
7627 35406825 : rtx set;
7628 :
7629 35406825 : if (! INSN_P (insn))
7630 7712339 : continue;
7631 :
7632 : /* If CC_SRC is modified, we have to stop looking for
7633 : something which uses it. */
7634 27694486 : if (modified_in_p (cc_src, insn))
7635 : break;
7636 :
7637 : /* Check whether INSN sets CC_REG to CC_SRC. */
7638 27205144 : set = single_set (insn);
7639 27205144 : if (set
7640 11543160 : && REG_P (SET_DEST (set))
7641 37284756 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7642 : {
7643 1416680 : bool found;
7644 1416680 : machine_mode set_mode;
7645 1416680 : machine_mode comp_mode;
7646 :
7647 1416680 : found = false;
7648 1416680 : set_mode = GET_MODE (SET_SRC (set));
7649 1416680 : comp_mode = set_mode;
7650 1416680 : if (rtx_equal_p (cc_src, SET_SRC (set)))
7651 : found = true;
7652 1410524 : else if (GET_CODE (cc_src) == COMPARE
7653 1340915 : && GET_CODE (SET_SRC (set)) == COMPARE
7654 1290333 : && mode != set_mode
7655 355098 : && rtx_equal_p (XEXP (cc_src, 0),
7656 355098 : XEXP (SET_SRC (set), 0))
7657 1473570 : && rtx_equal_p (XEXP (cc_src, 1),
7658 63046 : XEXP (SET_SRC (set), 1)))
7659 :
7660 : {
7661 19953 : comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7662 19953 : if (comp_mode != VOIDmode
7663 19953 : && (can_change_mode || comp_mode == mode))
7664 : found = true;
7665 : }
7666 :
7667 26105 : if (found)
7668 : {
7669 26105 : found_equiv = true;
7670 26105 : if (insn_count < ARRAY_SIZE (insns))
7671 : {
7672 26105 : insns[insn_count] = insn;
7673 26105 : modes[insn_count] = set_mode;
7674 26105 : last_insns[insn_count] = end;
7675 26105 : ++insn_count;
7676 :
7677 26105 : if (mode != comp_mode)
7678 : {
7679 9188 : gcc_assert (can_change_mode);
7680 9188 : mode = comp_mode;
7681 :
7682 : /* The modified insn will be re-recognized later. */
7683 9188 : PUT_MODE (cc_src, mode);
7684 : }
7685 : }
7686 : else
7687 : {
7688 0 : if (set_mode != mode)
7689 : {
7690 : /* We found a matching expression in the
7691 : wrong mode, but we don't have room to
7692 : store it in the array. Punt. This case
7693 : should be rare. */
7694 : break;
7695 : }
7696 : /* INSN sets CC_REG to a value equal to CC_SRC
7697 : with the right mode. We can simply delete
7698 : it. */
7699 0 : delete_insn (insn);
7700 : }
7701 :
7702 : /* We found an instruction to delete. Keep looking,
7703 : in the hopes of finding a three-way jump. */
7704 26105 : continue;
7705 : }
7706 :
7707 : /* We found an instruction which sets the condition
7708 : code, so don't look any farther. */
7709 : break;
7710 : }
7711 :
7712 : /* If INSN sets CC_REG in some other way, don't look any
7713 : farther. */
7714 25788464 : if (reg_set_p (cc_reg, insn))
7715 : break;
7716 : }
7717 :
7718 : /* If we fell off the bottom of the block, we can keep looking
7719 : through successors. We pass CAN_CHANGE_MODE as false because
7720 : we aren't prepared to handle compatibility between the
7721 : further blocks and this block. */
7722 5687359 : if (insn == end)
7723 : {
7724 1157987 : machine_mode submode;
7725 :
7726 1157987 : submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7727 1157987 : if (submode != VOIDmode)
7728 : {
7729 52 : gcc_assert (submode == mode);
7730 : found_equiv = true;
7731 : can_change_mode = false;
7732 : }
7733 : }
7734 : }
7735 :
7736 5664933 : if (! found_equiv)
7737 : return VOIDmode;
7738 :
7739 : /* Now INSN_COUNT is the number of instructions we found which set
7740 : CC_REG to a value equivalent to CC_SRC. The instructions are in
7741 : INSNS. The modes used by those instructions are in MODES. */
7742 :
7743 : newreg = NULL_RTX;
7744 52255 : for (i = 0; i < insn_count; ++i)
7745 : {
7746 26105 : if (modes[i] != mode)
7747 : {
7748 : /* We need to change the mode of CC_REG in INSNS[i] and
7749 : subsequent instructions. */
7750 10761 : if (! newreg)
7751 : {
7752 10761 : if (GET_MODE (cc_reg) == mode)
7753 : newreg = cc_reg;
7754 : else
7755 7700 : newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7756 : }
7757 10761 : cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7758 : newreg);
7759 : }
7760 :
7761 26105 : cse_cfg_altered |= delete_insn_and_edges (insns[i]);
7762 : }
7763 :
7764 : return mode;
7765 : }
7766 :
7767 : /* If we have a fixed condition code register (or two), walk through
7768 : the instructions and try to eliminate duplicate assignments. */
7769 :
7770 : static void
7771 981309 : cse_condition_code_reg (void)
7772 : {
7773 981309 : unsigned int cc_regno_1;
7774 981309 : unsigned int cc_regno_2;
7775 981309 : rtx cc_reg_1;
7776 981309 : rtx cc_reg_2;
7777 981309 : basic_block bb;
7778 :
7779 981309 : if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7780 0 : return;
7781 :
7782 981309 : cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7783 981309 : if (cc_regno_2 != INVALID_REGNUM)
7784 0 : cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7785 : else
7786 : cc_reg_2 = NULL_RTX;
7787 :
7788 11027637 : FOR_EACH_BB_FN (bb, cfun)
7789 : {
7790 10046328 : rtx_insn *last_insn;
7791 10046328 : rtx cc_reg;
7792 10046328 : rtx_insn *insn;
7793 10046328 : rtx_insn *cc_src_insn;
7794 10046328 : rtx cc_src;
7795 10046328 : machine_mode mode;
7796 10046328 : machine_mode orig_mode;
7797 :
7798 : /* Look for blocks which end with a conditional jump based on a
7799 : condition code register. Then look for the instruction which
7800 : sets the condition code register. Then look through the
7801 : successor blocks for instructions which set the condition
7802 : code register to the same value. There are other possible
7803 : uses of the condition code register, but these are by far the
7804 : most common and the ones which we are most likely to be able
7805 : to optimize. */
7806 :
7807 10046328 : last_insn = BB_END (bb);
7808 10046328 : if (!JUMP_P (last_insn))
7809 5388480 : continue;
7810 :
7811 4657848 : if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7812 : cc_reg = cc_reg_1;
7813 14351 : else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7814 : cc_reg = cc_reg_2;
7815 : else
7816 14351 : continue;
7817 :
7818 4643497 : cc_src_insn = NULL;
7819 4643497 : cc_src = NULL_RTX;
7820 4821423 : for (insn = PREV_INSN (last_insn);
7821 4821423 : insn && insn != PREV_INSN (BB_HEAD (bb));
7822 177926 : insn = PREV_INSN (insn))
7823 : {
7824 4701845 : rtx set;
7825 :
7826 4701845 : if (! INSN_P (insn))
7827 128284 : continue;
7828 4573561 : set = single_set (insn);
7829 4573561 : if (set
7830 4514549 : && REG_P (SET_DEST (set))
7831 9087208 : && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7832 : {
7833 4506963 : cc_src_insn = insn;
7834 4506963 : cc_src = SET_SRC (set);
7835 4506963 : break;
7836 : }
7837 66598 : else if (reg_set_p (cc_reg, insn))
7838 : break;
7839 : }
7840 :
7841 4643497 : if (! cc_src_insn)
7842 136534 : continue;
7843 :
7844 4506963 : if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7845 17 : continue;
7846 :
7847 : /* Now CC_REG is a condition code register used for a
7848 : conditional jump at the end of the block, and CC_SRC, in
7849 : CC_SRC_INSN, is the value to which that condition code
7850 : register is set, and CC_SRC is still meaningful at the end of
7851 : the basic block. */
7852 :
7853 4506946 : orig_mode = GET_MODE (cc_src);
7854 4506946 : mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7855 4506946 : if (mode != VOIDmode)
7856 : {
7857 26098 : gcc_assert (mode == GET_MODE (cc_src));
7858 26098 : if (mode != orig_mode)
7859 : {
7860 9188 : rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7861 :
7862 9188 : cse_change_cc_mode_insn (cc_src_insn, newreg);
7863 :
7864 : /* Do the same in the following insns that use the
7865 : current value of CC_REG within BB. */
7866 9188 : cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7867 : NEXT_INSN (last_insn),
7868 : newreg);
7869 : }
7870 : }
7871 : }
7872 : }
7873 :
7874 :
7875 : /* Perform common subexpression elimination. Nonzero value from
7876 : `cse_main' means that jumps were simplified and some code may now
7877 : be unreachable, so do jump optimization again. */
7878 : static unsigned int
7879 1062342 : rest_of_handle_cse (void)
7880 : {
7881 1062342 : int tem;
7882 :
7883 1062342 : if (dump_file)
7884 32 : dump_flow_info (dump_file, dump_flags);
7885 :
7886 1062342 : tem = cse_main (get_insns (), max_reg_num ());
7887 :
7888 : /* If we are not running more CSE passes, then we are no longer
7889 : expecting CSE to be run. But always rerun it in a cheap mode. */
7890 1062342 : cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7891 :
7892 1062342 : if (tem == 2)
7893 : {
7894 5439 : timevar_push (TV_JUMP);
7895 5439 : rebuild_jump_labels (get_insns ());
7896 5439 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7897 5439 : timevar_pop (TV_JUMP);
7898 : }
7899 1056903 : else if (tem == 1 || optimize > 1)
7900 976212 : cse_cfg_altered |= cleanup_cfg (0);
7901 :
7902 1062342 : return 0;
7903 : }
7904 :
7905 : namespace {
7906 :
7907 : const pass_data pass_data_cse =
7908 : {
7909 : RTL_PASS, /* type */
7910 : "cse1", /* name */
7911 : OPTGROUP_NONE, /* optinfo_flags */
7912 : TV_CSE, /* tv_id */
7913 : 0, /* properties_required */
7914 : 0, /* properties_provided */
7915 : 0, /* properties_destroyed */
7916 : 0, /* todo_flags_start */
7917 : TODO_df_finish, /* todo_flags_finish */
7918 : };
7919 :
7920 : class pass_cse : public rtl_opt_pass
7921 : {
7922 : public:
7923 294196 : pass_cse (gcc::context *ctxt)
7924 588392 : : rtl_opt_pass (pass_data_cse, ctxt)
7925 : {}
7926 :
7927 : /* opt_pass methods: */
7928 1515129 : bool gate (function *) final override { return optimize > 0; }
7929 1062342 : unsigned int execute (function *) final override
7930 : {
7931 1062342 : return rest_of_handle_cse ();
7932 : }
7933 :
7934 : }; // class pass_cse
7935 :
7936 : } // anon namespace
7937 :
7938 : rtl_opt_pass *
7939 294196 : make_pass_cse (gcc::context *ctxt)
7940 : {
7941 294196 : return new pass_cse (ctxt);
7942 : }
7943 :
7944 :
7945 : /* Run second CSE pass after loop optimizations. */
7946 : static unsigned int
7947 981309 : rest_of_handle_cse2 (void)
7948 : {
7949 981309 : int tem;
7950 :
7951 981309 : if (dump_file)
7952 22 : dump_flow_info (dump_file, dump_flags);
7953 :
7954 981309 : tem = cse_main (get_insns (), max_reg_num ());
7955 :
7956 : /* Run a pass to eliminate duplicated assignments to condition code
7957 : registers. We have to run this after bypass_jumps, because it
7958 : makes it harder for that pass to determine whether a jump can be
7959 : bypassed safely. */
7960 981309 : cse_condition_code_reg ();
7961 :
7962 981309 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
7963 :
7964 981309 : if (tem == 2)
7965 : {
7966 2149 : timevar_push (TV_JUMP);
7967 2149 : rebuild_jump_labels (get_insns ());
7968 2149 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
7969 2149 : timevar_pop (TV_JUMP);
7970 : }
7971 979160 : else if (tem == 1 || cse_cfg_altered)
7972 108 : cse_cfg_altered |= cleanup_cfg (0);
7973 :
7974 981309 : cse_not_expected = 1;
7975 981309 : return 0;
7976 : }
7977 :
7978 :
7979 : namespace {
7980 :
7981 : const pass_data pass_data_cse2 =
7982 : {
7983 : RTL_PASS, /* type */
7984 : "cse2", /* name */
7985 : OPTGROUP_NONE, /* optinfo_flags */
7986 : TV_CSE2, /* tv_id */
7987 : 0, /* properties_required */
7988 : 0, /* properties_provided */
7989 : 0, /* properties_destroyed */
7990 : 0, /* todo_flags_start */
7991 : TODO_df_finish, /* todo_flags_finish */
7992 : };
7993 :
7994 : class pass_cse2 : public rtl_opt_pass
7995 : {
7996 : public:
7997 294196 : pass_cse2 (gcc::context *ctxt)
7998 588392 : : rtl_opt_pass (pass_data_cse2, ctxt)
7999 : {}
8000 :
8001 : /* opt_pass methods: */
8002 1515129 : bool gate (function *) final override
8003 : {
8004 1515129 : return optimize > 0 && flag_rerun_cse_after_loop;
8005 : }
8006 :
8007 981309 : unsigned int execute (function *) final override
8008 : {
8009 981309 : return rest_of_handle_cse2 ();
8010 : }
8011 :
8012 : }; // class pass_cse2
8013 :
8014 : } // anon namespace
8015 :
8016 : rtl_opt_pass *
8017 294196 : make_pass_cse2 (gcc::context *ctxt)
8018 : {
8019 294196 : return new pass_cse2 (ctxt);
8020 : }
8021 :
8022 : /* Run second CSE pass after loop optimizations. */
8023 : static unsigned int
8024 296089 : rest_of_handle_cse_after_global_opts (void)
8025 : {
8026 296089 : int save_cfj;
8027 296089 : int tem;
8028 :
8029 : /* We only want to do local CSE, so don't follow jumps. */
8030 296089 : save_cfj = flag_cse_follow_jumps;
8031 296089 : flag_cse_follow_jumps = 0;
8032 :
8033 296089 : rebuild_jump_labels (get_insns ());
8034 296089 : tem = cse_main (get_insns (), max_reg_num ());
8035 296089 : cse_cfg_altered |= purge_all_dead_edges ();
8036 296089 : delete_trivially_dead_insns (get_insns (), max_reg_num ());
8037 :
8038 296089 : cse_not_expected = !flag_rerun_cse_after_loop;
8039 :
8040 : /* If cse altered any jumps, rerun jump opts to clean things up. */
8041 296089 : if (tem == 2)
8042 : {
8043 255 : timevar_push (TV_JUMP);
8044 255 : rebuild_jump_labels (get_insns ());
8045 255 : cse_cfg_altered |= cleanup_cfg (CLEANUP_CFG_CHANGED);
8046 255 : timevar_pop (TV_JUMP);
8047 : }
8048 295834 : else if (tem == 1 || cse_cfg_altered)
8049 4785 : cse_cfg_altered |= cleanup_cfg (0);
8050 :
8051 296089 : flag_cse_follow_jumps = save_cfj;
8052 296089 : return 0;
8053 : }
8054 :
8055 : namespace {
8056 :
8057 : const pass_data pass_data_cse_after_global_opts =
8058 : {
8059 : RTL_PASS, /* type */
8060 : "cse_local", /* name */
8061 : OPTGROUP_NONE, /* optinfo_flags */
8062 : TV_CSE, /* tv_id */
8063 : 0, /* properties_required */
8064 : 0, /* properties_provided */
8065 : 0, /* properties_destroyed */
8066 : 0, /* todo_flags_start */
8067 : TODO_df_finish, /* todo_flags_finish */
8068 : };
8069 :
8070 : class pass_cse_after_global_opts : public rtl_opt_pass
8071 : {
8072 : public:
8073 294196 : pass_cse_after_global_opts (gcc::context *ctxt)
8074 588392 : : rtl_opt_pass (pass_data_cse_after_global_opts, ctxt)
8075 : {}
8076 :
8077 : /* opt_pass methods: */
8078 1515129 : bool gate (function *) final override
8079 : {
8080 1515129 : return optimize > 0 && flag_rerun_cse_after_global_opts;
8081 : }
8082 :
8083 296089 : unsigned int execute (function *) final override
8084 : {
8085 296089 : return rest_of_handle_cse_after_global_opts ();
8086 : }
8087 :
8088 : }; // class pass_cse_after_global_opts
8089 :
8090 : } // anon namespace
8091 :
8092 : rtl_opt_pass *
8093 294196 : make_pass_cse_after_global_opts (gcc::context *ctxt)
8094 : {
8095 294196 : return new pass_cse_after_global_opts (ctxt);
8096 : }
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