Line data Source code
1 : /* Emit RTL for the GCC expander.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 :
21 : /* Middle-to-low level generation of rtx code and insns.
22 :
23 : This file contains support functions for creating rtl expressions
24 : and manipulating them in the doubly-linked chain of insns.
25 :
26 : The patterns of the insns are created by machine-dependent
27 : routines in insn-emit.cc, which is generated automatically from
28 : the machine description. These routines make the individual rtx's
29 : of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 : which are automatically generated from rtl.def; what is machine
31 : dependent is the kind of rtx's they make and what arguments they
32 : use. */
33 :
34 : #include "config.h"
35 : #include "system.h"
36 : #include "coretypes.h"
37 : #include "memmodel.h"
38 : #include "backend.h"
39 : #include "target.h"
40 : #include "rtl.h"
41 : #include "tree.h"
42 : #include "df.h"
43 : #include "tm_p.h"
44 : #include "stringpool.h"
45 : #include "insn-config.h"
46 : #include "regs.h"
47 : #include "emit-rtl.h"
48 : #include "recog.h"
49 : #include "diagnostic-core.h"
50 : #include "alias.h"
51 : #include "fold-const.h"
52 : #include "varasm.h"
53 : #include "cfgrtl.h"
54 : #include "tree-eh.h"
55 : #include "explow.h"
56 : #include "expr.h"
57 : #include "builtins.h"
58 : #include "rtl-iter.h"
59 : #include "stor-layout.h"
60 : #include "opts.h"
61 : #include "optabs.h"
62 : #include "predict.h"
63 : #include "rtx-vector-builder.h"
64 : #include "gimple.h"
65 : #include "gimple-ssa.h"
66 : #include "bbitmap.h"
67 :
68 : struct target_rtl default_target_rtl;
69 : #if SWITCHABLE_TARGET
70 : struct target_rtl *this_target_rtl = &default_target_rtl;
71 : #endif
72 :
73 : #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
74 :
75 : /* Commonly used modes. */
76 :
77 : scalar_int_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
78 : scalar_int_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
79 : scalar_int_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
80 :
81 : /* Datastructures maintained for currently processed function in RTL form. */
82 :
83 : struct rtl_data x_rtl;
84 :
85 : /* Indexed by pseudo register number, gives the rtx for that pseudo.
86 : Allocated in parallel with regno_pointer_align.
87 : FIXME: We could put it into emit_status struct, but gengtype is not able to deal
88 : with length attribute nested in top level structures. */
89 :
90 : rtx * regno_reg_rtx;
91 :
92 : /* This is *not* reset after each function. It gives each CODE_LABEL
93 : in the entire compilation a unique label number. */
94 :
95 : static GTY(()) int label_num = 1;
96 :
97 : /* We record floating-point CONST_DOUBLEs in each floating-point mode for
98 : the values of 0, 1, and 2. For the integer entries and VOIDmode, we
99 : record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
100 : is set only for MODE_INT and MODE_VECTOR_INT modes. */
101 :
102 : rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 :
104 : rtx const_true_rtx;
105 :
106 : REAL_VALUE_TYPE dconst0;
107 : REAL_VALUE_TYPE dconst1;
108 : REAL_VALUE_TYPE dconst2;
109 : REAL_VALUE_TYPE dconstm0;
110 : REAL_VALUE_TYPE dconstm1;
111 : REAL_VALUE_TYPE dconsthalf;
112 : REAL_VALUE_TYPE dconstinf;
113 : REAL_VALUE_TYPE dconstninf;
114 :
115 : /* Record fixed-point constant 0 and 1. */
116 : FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
117 : FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
118 :
119 : /* We make one copy of (const_int C) where C is in
120 : [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
121 : to save space during the compilation and simplify comparisons of
122 : integers. */
123 :
124 : rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
125 :
126 : /* Standard pieces of rtx, to be substituted directly into things. */
127 : rtx pc_rtx;
128 : rtx ret_rtx;
129 : rtx simple_return_rtx;
130 :
131 : /* Marker used for denoting an INSN, which should never be accessed (i.e.,
132 : this pointer should normally never be dereferenced), but is required to be
133 : distinct from NULL_RTX. Currently used by peephole2 pass. */
134 : rtx_insn *invalid_insn_rtx;
135 :
136 : /* A hash table storing CONST_INTs whose absolute value is greater
137 : than MAX_SAVED_CONST_INT. */
138 :
139 : struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
140 : {
141 : typedef HOST_WIDE_INT compare_type;
142 :
143 : static hashval_t hash (rtx i);
144 : static bool equal (rtx i, HOST_WIDE_INT h);
145 : };
146 :
147 : static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
148 :
149 : struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
150 : {
151 : static hashval_t hash (rtx x);
152 : static bool equal (rtx x, rtx y);
153 : };
154 :
155 : static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
156 :
157 : struct const_poly_int_hasher : ggc_cache_ptr_hash<rtx_def>
158 : {
159 : typedef std::pair<machine_mode, poly_wide_int_ref> compare_type;
160 :
161 : static hashval_t hash (rtx x);
162 : static bool equal (rtx x, const compare_type &y);
163 : };
164 :
165 : static GTY ((cache)) hash_table<const_poly_int_hasher> *const_poly_int_htab;
166 :
167 : /* A hash table storing register attribute structures. */
168 : struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
169 : {
170 : static hashval_t hash (reg_attrs *x);
171 : static bool equal (reg_attrs *a, reg_attrs *b);
172 : };
173 :
174 : static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
175 :
176 : /* A hash table storing all CONST_DOUBLEs. */
177 : struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
178 : {
179 : static hashval_t hash (rtx x);
180 : static bool equal (rtx x, rtx y);
181 : };
182 :
183 : static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
184 :
185 : /* A hash table storing all CONST_FIXEDs. */
186 : struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
187 : {
188 : static hashval_t hash (rtx x);
189 : static bool equal (rtx x, rtx y);
190 : };
191 :
192 : static GTY ((cache)) hash_table<const_fixed_hasher> *const_fixed_htab;
193 :
194 : #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
195 : #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
196 : #define first_label_num (crtl->emit.x_first_label_num)
197 :
198 : static void set_used_decls (tree);
199 : static void mark_label_nuses (rtx);
200 : #if TARGET_SUPPORTS_WIDE_INT
201 : static rtx lookup_const_wide_int (rtx);
202 : #endif
203 : static rtx lookup_const_double (rtx);
204 : static rtx lookup_const_fixed (rtx);
205 : static rtx gen_const_vector (machine_mode, int);
206 : static void copy_rtx_if_shared_1 (rtx *orig);
207 :
208 : /* Probability of the conditional branch currently proceeded by try_split. */
209 : profile_probability split_branch_probability;
210 :
211 : /* Returns a hash code for X (which is a really a CONST_INT). */
212 :
213 : hashval_t
214 3453623889 : const_int_hasher::hash (rtx x)
215 : {
216 3453623889 : return (hashval_t) INTVAL (x);
217 : }
218 :
219 : /* Returns true if the value represented by X (which is really a
220 : CONST_INT) is the same as that given by Y (which is really a
221 : HOST_WIDE_INT *). */
222 :
223 : bool
224 4359522028 : const_int_hasher::equal (rtx x, HOST_WIDE_INT y)
225 : {
226 4359522028 : return (INTVAL (x) == y);
227 : }
228 :
229 : #if TARGET_SUPPORTS_WIDE_INT
230 : /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
231 :
232 : hashval_t
233 1460437 : const_wide_int_hasher::hash (rtx x)
234 : {
235 1460437 : int i;
236 1460437 : unsigned HOST_WIDE_INT hash = 0;
237 1460437 : const_rtx xr = x;
238 :
239 4408363 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
240 2947926 : hash += CONST_WIDE_INT_ELT (xr, i);
241 :
242 1460437 : return (hashval_t) hash;
243 : }
244 :
245 : /* Returns true if the value represented by X (which is really a
246 : CONST_WIDE_INT) is the same as that given by Y (which is really a
247 : CONST_WIDE_INT). */
248 :
249 : bool
250 1487704 : const_wide_int_hasher::equal (rtx x, rtx y)
251 : {
252 1487704 : int i;
253 1487704 : const_rtx xr = x;
254 1487704 : const_rtx yr = y;
255 1487704 : if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
256 : return false;
257 :
258 2575838 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
259 2060412 : if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
260 : return false;
261 :
262 : return true;
263 : }
264 : #endif
265 :
266 : /* Returns a hash code for CONST_POLY_INT X. */
267 :
268 : hashval_t
269 0 : const_poly_int_hasher::hash (rtx x)
270 : {
271 0 : inchash::hash h;
272 0 : h.add_int (GET_MODE (x));
273 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
274 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
275 0 : return h.end ();
276 : }
277 :
278 : /* Returns true if CONST_POLY_INT X is an rtx representation of Y. */
279 :
280 : bool
281 0 : const_poly_int_hasher::equal (rtx x, const compare_type &y)
282 : {
283 0 : if (GET_MODE (x) != y.first)
284 : return false;
285 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
286 0 : if (CONST_POLY_INT_COEFFS (x)[i] != y.second.coeffs[i])
287 : return false;
288 : return true;
289 : }
290 :
291 : /* Returns a hash code for X (which is really a CONST_DOUBLE). */
292 : hashval_t
293 18739228 : const_double_hasher::hash (rtx x)
294 : {
295 18739228 : const_rtx const value = x;
296 18739228 : hashval_t h;
297 :
298 18739228 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
299 : h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
300 : else
301 : {
302 18739228 : h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
303 : /* MODE is used in the comparison, so it should be in the hash. */
304 18739228 : h ^= GET_MODE (value);
305 : }
306 18739228 : return h;
307 : }
308 :
309 : /* Returns true if the value represented by X (really a ...)
310 : is the same as that represented by Y (really a ...) */
311 : bool
312 12906246 : const_double_hasher::equal (rtx x, rtx y)
313 : {
314 12906246 : const_rtx const a = x, b = y;
315 :
316 12906246 : if (GET_MODE (a) != GET_MODE (b))
317 : return false;
318 4652750 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
319 : return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
320 : && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
321 : else
322 4652750 : return real_identical (CONST_DOUBLE_REAL_VALUE (a),
323 4652750 : CONST_DOUBLE_REAL_VALUE (b));
324 : }
325 :
326 : /* Returns a hash code for X (which is really a CONST_FIXED). */
327 :
328 : hashval_t
329 12059427 : const_fixed_hasher::hash (rtx x)
330 : {
331 12059427 : const_rtx const value = x;
332 12059427 : hashval_t h;
333 :
334 12059427 : h = fixed_hash (CONST_FIXED_VALUE (value));
335 : /* MODE is used in the comparison, so it should be in the hash. */
336 12059427 : h ^= GET_MODE (value);
337 12059427 : return h;
338 : }
339 :
340 : /* Returns true if the value represented by X is the same as that
341 : represented by Y. */
342 :
343 : bool
344 6033255 : const_fixed_hasher::equal (rtx x, rtx y)
345 : {
346 6033255 : const_rtx const a = x, b = y;
347 :
348 6033255 : if (GET_MODE (a) != GET_MODE (b))
349 : return false;
350 574078 : return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
351 : }
352 :
353 : /* Return true if the given memory attributes are equal. */
354 :
355 : bool
356 233555700 : mem_attrs_eq_p (const class mem_attrs *p, const class mem_attrs *q)
357 : {
358 233555700 : if (p == q)
359 : return true;
360 230551076 : if (!p || !q)
361 : return false;
362 229960243 : return (p->alias == q->alias
363 144917393 : && p->offset_known_p == q->offset_known_p
364 115016912 : && (!p->offset_known_p || known_eq (p->offset, q->offset))
365 99173367 : && p->size_known_p == q->size_known_p
366 95792208 : && (!p->size_known_p || known_eq (p->size, q->size))
367 82472671 : && p->align == q->align
368 67828965 : && p->addrspace == q->addrspace
369 297506577 : && (p->expr == q->expr
370 32032123 : || (p->expr != NULL_TREE && q->expr != NULL_TREE
371 24909058 : && operand_equal_p (p->expr, q->expr, 0))));
372 : }
373 :
374 : /* Set MEM's memory attributes so that they are the same as ATTRS. */
375 :
376 : static void
377 102119415 : set_mem_attrs (rtx mem, mem_attrs *attrs)
378 : {
379 : /* If everything is the default, we can just clear the attributes. */
380 102119415 : if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
381 : {
382 3351786 : MEM_ATTRS (mem) = 0;
383 3351786 : return;
384 : }
385 :
386 98767629 : if (!MEM_ATTRS (mem)
387 98767629 : || !mem_attrs_eq_p (attrs, MEM_ATTRS (mem)))
388 : {
389 75380173 : MEM_ATTRS (mem) = ggc_alloc<mem_attrs> ();
390 75380173 : memcpy (MEM_ATTRS (mem), attrs, sizeof (mem_attrs));
391 : }
392 : }
393 :
394 : /* Returns a hash code for X (which is a really a reg_attrs *). */
395 :
396 : hashval_t
397 322201279 : reg_attr_hasher::hash (reg_attrs *x)
398 : {
399 322201279 : const reg_attrs *const p = x;
400 :
401 322201279 : inchash::hash h;
402 322201279 : h.add_ptr (p->decl);
403 322201279 : h.add_poly_hwi (p->offset);
404 322201279 : return h.end ();
405 : }
406 :
407 : /* Returns true if the value represented by X is the same as that given by
408 : Y. */
409 :
410 : bool
411 311348012 : reg_attr_hasher::equal (reg_attrs *x, reg_attrs *y)
412 : {
413 311348012 : const reg_attrs *const p = x;
414 311348012 : const reg_attrs *const q = y;
415 :
416 311348012 : return (p->decl == q->decl && known_eq (p->offset, q->offset));
417 : }
418 : /* Allocate a new reg_attrs structure and insert it into the hash table if
419 : one identical to it is not already in the table. We are doing this for
420 : MEM of mode MODE. */
421 :
422 : static reg_attrs *
423 66432691 : get_reg_attrs (tree decl, poly_int64 offset)
424 : {
425 66432691 : reg_attrs attrs;
426 :
427 : /* If everything is the default, we can just return zero. */
428 66432691 : if (decl == 0 && known_eq (offset, 0))
429 : return 0;
430 :
431 60688284 : attrs.decl = decl;
432 60688284 : attrs.offset = offset;
433 :
434 60688284 : reg_attrs **slot = reg_attrs_htab->find_slot (&attrs, INSERT);
435 60688284 : if (*slot == 0)
436 : {
437 30645769 : *slot = ggc_alloc<reg_attrs> ();
438 30645769 : memcpy (*slot, &attrs, sizeof (reg_attrs));
439 : }
440 :
441 60688284 : return *slot;
442 : }
443 :
444 :
445 : #if !HAVE_blockage
446 : /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
447 : and to block register equivalences to be seen across this insn. */
448 :
449 : rtx
450 : gen_blockage (void)
451 : {
452 : rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
453 : MEM_VOLATILE_P (x) = true;
454 : return x;
455 : }
456 : #endif
457 :
458 :
459 : /* Set the mode and register number of X to MODE and REGNO. */
460 :
461 : void
462 1761076299 : set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
463 : {
464 1761076299 : unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
465 1761076299 : ? hard_regno_nregs (regno, mode)
466 1328388659 : : 1);
467 1761076299 : PUT_MODE_RAW (x, mode);
468 1761076299 : set_regno_raw (x, regno, nregs);
469 1761076299 : }
470 :
471 : /* Initialize a fresh REG rtx with mode MODE and register REGNO. */
472 :
473 : rtx
474 358523507 : init_raw_REG (rtx x, machine_mode mode, unsigned int regno)
475 : {
476 358523507 : set_mode_and_regno (x, mode, regno);
477 358523507 : REG_ATTRS (x) = NULL;
478 358523507 : ORIGINAL_REGNO (x) = regno;
479 358523507 : return x;
480 : }
481 :
482 : /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
483 : don't attempt to share with the various global pieces of rtl (such as
484 : frame_pointer_rtx). */
485 :
486 : rtx
487 356361343 : gen_raw_REG (machine_mode mode, unsigned int regno)
488 : {
489 356361343 : rtx x = rtx_alloc (REG MEM_STAT_INFO);
490 356361343 : init_raw_REG (x, mode, regno);
491 356361343 : return x;
492 : }
493 :
494 : /* There are some RTL codes that require special attention; the generation
495 : functions do the raw handling. If you add to this list, modify
496 : special_rtx in gengenrtl.cc as well. */
497 :
498 : rtx_expr_list *
499 208725666 : gen_rtx_EXPR_LIST (machine_mode mode, rtx expr, rtx expr_list)
500 : {
501 208725666 : return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
502 208725666 : expr_list));
503 : }
504 :
505 : rtx_insn_list *
506 96950687 : gen_rtx_INSN_LIST (machine_mode mode, rtx insn, rtx insn_list)
507 : {
508 96950687 : return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
509 96950687 : insn_list));
510 : }
511 :
512 : rtx_insn *
513 838885 : gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
514 : basic_block bb, rtx pattern, location_t location, int code,
515 : rtx reg_notes)
516 : {
517 838885 : return as_a <rtx_insn *> (gen_rtx_fmt_uuBeLie (INSN, mode,
518 : prev_insn, next_insn,
519 : bb, pattern, location, code,
520 838885 : reg_notes));
521 : }
522 :
523 : rtx
524 1335872595 : gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
525 : {
526 1335872595 : if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
527 866480977 : return const_int_rtx[arg + MAX_SAVED_CONST_INT];
528 :
529 : #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
530 : if (const_true_rtx && arg == STORE_FLAG_VALUE)
531 : return const_true_rtx;
532 : #endif
533 :
534 : /* Look up the CONST_INT in the hash table. */
535 469391618 : rtx *slot = const_int_htab->find_slot_with_hash (arg, (hashval_t) arg,
536 : INSERT);
537 469391618 : if (*slot == 0)
538 35675532 : *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
539 :
540 469391618 : return *slot;
541 : }
542 :
543 : rtx
544 1250098413 : gen_int_mode (poly_int64 c, machine_mode mode)
545 : {
546 1250098413 : c = trunc_int_for_mode (c, mode);
547 1250098413 : if (c.is_constant ())
548 1250098413 : return GEN_INT (c.coeffs[0]);
549 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
550 : return immed_wide_int_const (poly_wide_int::from (c, prec, SIGNED), mode);
551 : }
552 :
553 : /* CONST_DOUBLEs might be created from pairs of integers, or from
554 : REAL_VALUE_TYPEs. Also, their length is known only at run time,
555 : so we cannot use gen_rtx_raw_CONST_DOUBLE. */
556 :
557 : /* Determine whether REAL, a CONST_DOUBLE, already exists in the
558 : hash table. If so, return its counterpart; otherwise add it
559 : to the hash table and return it. */
560 : static rtx
561 9960809 : lookup_const_double (rtx real)
562 : {
563 9960809 : rtx *slot = const_double_htab->find_slot (real, INSERT);
564 9960809 : if (*slot == 0)
565 7954159 : *slot = real;
566 :
567 9960809 : return *slot;
568 : }
569 :
570 : /* Return a CONST_DOUBLE rtx for a floating-point value specified by
571 : VALUE in mode MODE. */
572 : rtx
573 9960809 : const_double_from_real_value (REAL_VALUE_TYPE value, machine_mode mode)
574 : {
575 9960809 : rtx real = rtx_alloc (CONST_DOUBLE);
576 9960809 : PUT_MODE (real, mode);
577 :
578 9960809 : real->u.rv = value;
579 :
580 9960809 : return lookup_const_double (real);
581 : }
582 :
583 : /* Determine whether FIXED, a CONST_FIXED, already exists in the
584 : hash table. If so, return its counterpart; otherwise add it
585 : to the hash table and return it. */
586 :
587 : static rtx
588 7460908 : lookup_const_fixed (rtx fixed)
589 : {
590 7460908 : rtx *slot = const_fixed_htab->find_slot (fixed, INSERT);
591 7460908 : if (*slot == 0)
592 7460908 : *slot = fixed;
593 :
594 7460908 : return *slot;
595 : }
596 :
597 : /* Return a CONST_FIXED rtx for a fixed-point value specified by
598 : VALUE in mode MODE. */
599 :
600 : rtx
601 7460908 : const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, machine_mode mode)
602 : {
603 7460908 : rtx fixed = rtx_alloc (CONST_FIXED);
604 7460908 : PUT_MODE (fixed, mode);
605 :
606 7460908 : fixed->u.fv = value;
607 :
608 7460908 : return lookup_const_fixed (fixed);
609 : }
610 :
611 : #if TARGET_SUPPORTS_WIDE_INT == 0
612 : /* Constructs double_int from rtx CST. */
613 :
614 : double_int
615 : rtx_to_double_int (const_rtx cst)
616 : {
617 : double_int r;
618 :
619 : if (CONST_INT_P (cst))
620 : r = double_int::from_shwi (INTVAL (cst));
621 : else if (CONST_DOUBLE_AS_INT_P (cst))
622 : {
623 : r.low = CONST_DOUBLE_LOW (cst);
624 : r.high = CONST_DOUBLE_HIGH (cst);
625 : }
626 : else
627 : gcc_unreachable ();
628 :
629 : return r;
630 : }
631 : #endif
632 :
633 : #if TARGET_SUPPORTS_WIDE_INT
634 : /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
635 : If so, return its counterpart; otherwise add it to the hash table and
636 : return it. */
637 :
638 : static rtx
639 574561 : lookup_const_wide_int (rtx wint)
640 : {
641 574561 : rtx *slot = const_wide_int_htab->find_slot (wint, INSERT);
642 574561 : if (*slot == 0)
643 59135 : *slot = wint;
644 :
645 574561 : return *slot;
646 : }
647 : #endif
648 :
649 : /* Return an rtx constant for V, given that the constant has mode MODE.
650 : The returned rtx will be a CONST_INT if V fits, otherwise it will be
651 : a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
652 : (if TARGET_SUPPORTS_WIDE_INT). */
653 :
654 : static rtx
655 656799663 : immed_wide_int_const_1 (const wide_int_ref &v, machine_mode mode)
656 : {
657 656799663 : unsigned int len = v.get_len ();
658 : /* Not scalar_int_mode because we also allow pointer bound modes. */
659 656799663 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
660 :
661 : /* Allow truncation but not extension since we do not know if the
662 : number is signed or unsigned. */
663 656799663 : gcc_assert (prec <= v.get_precision ());
664 :
665 656799663 : if (len < 2 || prec <= HOST_BITS_PER_WIDE_INT)
666 656225102 : return gen_int_mode (v.elt (0), mode);
667 :
668 : #if TARGET_SUPPORTS_WIDE_INT
669 574561 : {
670 574561 : unsigned int i;
671 574561 : rtx value;
672 574561 : unsigned int blocks_needed
673 574561 : = (prec + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT;
674 :
675 574561 : if (len > blocks_needed)
676 : len = blocks_needed;
677 :
678 574561 : value = const_wide_int_alloc (len);
679 :
680 : /* It is so tempting to just put the mode in here. Must control
681 : myself ... */
682 574561 : PUT_MODE (value, VOIDmode);
683 574561 : CWI_PUT_NUM_ELEM (value, len);
684 :
685 1731358 : for (i = 0; i < len; i++)
686 1156797 : CONST_WIDE_INT_ELT (value, i) = v.elt (i);
687 :
688 574561 : return lookup_const_wide_int (value);
689 : }
690 : #else
691 : return immed_double_const (v.elt (0), v.elt (1), mode);
692 : #endif
693 : }
694 :
695 : #if TARGET_SUPPORTS_WIDE_INT == 0
696 : /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
697 : of ints: I0 is the low-order word and I1 is the high-order word.
698 : For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
699 : implied upper bits are copies of the high bit of i1. The value
700 : itself is neither signed nor unsigned. Do not use this routine for
701 : non-integer modes; convert to REAL_VALUE_TYPE and use
702 : const_double_from_real_value. */
703 :
704 : rtx
705 : immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode)
706 : {
707 : rtx value;
708 : unsigned int i;
709 :
710 : /* There are the following cases (note that there are no modes with
711 : HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
712 :
713 : 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
714 : gen_int_mode.
715 : 2) If the value of the integer fits into HOST_WIDE_INT anyway
716 : (i.e., i1 consists only from copies of the sign bit, and sign
717 : of i0 and i1 are the same), then we return a CONST_INT for i0.
718 : 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
719 : scalar_mode smode;
720 : if (is_a <scalar_mode> (mode, &smode)
721 : && GET_MODE_BITSIZE (smode) <= HOST_BITS_PER_WIDE_INT)
722 : return gen_int_mode (i0, mode);
723 :
724 : /* If this integer fits in one word, return a CONST_INT. */
725 : if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
726 : return GEN_INT (i0);
727 :
728 : /* We use VOIDmode for integers. */
729 : value = rtx_alloc (CONST_DOUBLE);
730 : PUT_MODE (value, VOIDmode);
731 :
732 : CONST_DOUBLE_LOW (value) = i0;
733 : CONST_DOUBLE_HIGH (value) = i1;
734 :
735 : for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
736 : XWINT (value, i) = 0;
737 :
738 : return lookup_const_double (value);
739 : }
740 : #endif
741 :
742 : /* Return an rtx representation of C in mode MODE. */
743 :
744 : rtx
745 656799663 : immed_wide_int_const (const poly_wide_int_ref &c, machine_mode mode)
746 : {
747 656799663 : if (c.is_constant ())
748 656799663 : return immed_wide_int_const_1 (c.coeffs[0], mode);
749 :
750 : /* Not scalar_int_mode because we also allow pointer bound modes. */
751 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
752 :
753 : /* Allow truncation but not extension since we do not know if the
754 : number is signed or unsigned. */
755 : gcc_assert (prec <= c.coeffs[0].get_precision ());
756 : poly_wide_int newc = poly_wide_int::from (c, prec, SIGNED);
757 :
758 : /* See whether we already have an rtx for this constant. */
759 : inchash::hash h;
760 : h.add_int (mode);
761 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
762 : h.add_wide_int (newc.coeffs[i]);
763 : const_poly_int_hasher::compare_type typed_value (mode, newc);
764 : rtx *slot = const_poly_int_htab->find_slot_with_hash (typed_value,
765 : h.end (), INSERT);
766 : rtx x = *slot;
767 : if (x)
768 : return x;
769 :
770 : /* Create a new rtx. There's a choice to be made here between installing
771 : the actual mode of the rtx or leaving it as VOIDmode (for consistency
772 : with CONST_INT). In practice the handling of the codes is different
773 : enough that we get no benefit from using VOIDmode, and various places
774 : assume that VOIDmode implies CONST_INT. Using the real mode seems like
775 : the right long-term direction anyway. */
776 : typedef trailing_wide_ints<NUM_POLY_INT_COEFFS> twi;
777 : size_t extra_size = twi::extra_size (prec);
778 : x = rtx_alloc_v (CONST_POLY_INT,
779 : sizeof (struct const_poly_int_def) + extra_size);
780 : PUT_MODE (x, mode);
781 : CONST_POLY_INT_COEFFS (x).set_precision (prec);
782 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
783 : CONST_POLY_INT_COEFFS (x)[i] = newc.coeffs[i];
784 :
785 : *slot = x;
786 : return x;
787 : }
788 :
789 : rtx
790 196148283 : gen_rtx_REG (machine_mode mode, unsigned int regno)
791 : {
792 : /* In case the MD file explicitly references the frame pointer, have
793 : all such references point to the same frame pointer. This is
794 : used during frame pointer elimination to distinguish the explicit
795 : references to these registers from pseudos that happened to be
796 : assigned to them.
797 :
798 : If we have eliminated the frame pointer or arg pointer, we will
799 : be using it as a normal register, for example as a spill
800 : register. In such cases, we might be accessing it in a mode that
801 : is not Pmode and therefore cannot use the pre-allocated rtx.
802 :
803 : Also don't do this when we are making new REGs in reload, since
804 : we don't want to get confused with the real pointers. */
805 :
806 210746544 : if (mode == Pmode && !reload_in_progress && !lra_in_progress)
807 : {
808 63450819 : if (regno == FRAME_POINTER_REGNUM
809 3029451 : && (!reload_completed || frame_pointer_needed))
810 3029451 : return frame_pointer_rtx;
811 :
812 60421368 : if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
813 : && regno == HARD_FRAME_POINTER_REGNUM
814 4339717 : && (!reload_completed || frame_pointer_needed))
815 3810324 : return hard_frame_pointer_rtx;
816 : #if !HARD_FRAME_POINTER_IS_ARG_POINTER
817 56611044 : if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
818 : && regno == ARG_POINTER_REGNUM)
819 3033842 : return arg_pointer_rtx;
820 : #endif
821 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
822 : if (regno == RETURN_ADDRESS_POINTER_REGNUM)
823 : return return_address_pointer_rtx;
824 : #endif
825 53577202 : if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
826 0 : && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
827 53577202 : && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
828 0 : return pic_offset_table_rtx;
829 53577202 : if (regno == STACK_POINTER_REGNUM)
830 4067612 : return stack_pointer_rtx;
831 : }
832 :
833 : #if 0
834 : /* If the per-function register table has been set up, try to re-use
835 : an existing entry in that table to avoid useless generation of RTL.
836 :
837 : This code is disabled for now until we can fix the various backends
838 : which depend on having non-shared hard registers in some cases. Long
839 : term we want to re-enable this code as it can significantly cut down
840 : on the amount of useless RTL that gets generated.
841 :
842 : We'll also need to fix some code that runs after reload that wants to
843 : set ORIGINAL_REGNO. */
844 :
845 : if (cfun
846 : && cfun->emit
847 : && regno_reg_rtx
848 : && regno < FIRST_PSEUDO_REGISTER
849 : && reg_raw_mode[regno] == mode)
850 : return regno_reg_rtx[regno];
851 : #endif
852 :
853 182207054 : return gen_raw_REG (mode, regno);
854 : }
855 :
856 : rtx
857 253771093 : gen_rtx_MEM (machine_mode mode, rtx addr)
858 : {
859 253771093 : rtx rt = gen_rtx_raw_MEM (mode, addr);
860 :
861 : /* This field is not cleared by the mere allocation of the rtx, so
862 : we clear it here. */
863 253771093 : MEM_ATTRS (rt) = 0;
864 :
865 253771093 : return rt;
866 : }
867 :
868 : /* Generate a memory referring to non-trapping constant memory. */
869 :
870 : rtx
871 2145933 : gen_const_mem (machine_mode mode, rtx addr)
872 : {
873 2145933 : rtx mem = gen_rtx_MEM (mode, addr);
874 2145933 : MEM_READONLY_P (mem) = 1;
875 2145933 : MEM_NOTRAP_P (mem) = 1;
876 2145933 : return mem;
877 : }
878 :
879 : /* Generate a MEM referring to fixed portions of the frame, e.g., register
880 : save areas. */
881 :
882 : rtx
883 1253474 : gen_frame_mem (machine_mode mode, rtx addr)
884 : {
885 1253474 : rtx mem = gen_rtx_MEM (mode, addr);
886 1253474 : MEM_NOTRAP_P (mem) = 1;
887 1253474 : set_mem_alias_set (mem, get_frame_alias_set ());
888 1253474 : return mem;
889 : }
890 :
891 : /* Generate a MEM referring to a temporary use of the stack, not part
892 : of the fixed stack frame. For example, something which is pushed
893 : by a target splitter. */
894 : rtx
895 0 : gen_tmp_stack_mem (machine_mode mode, rtx addr)
896 : {
897 0 : rtx mem = gen_rtx_MEM (mode, addr);
898 0 : MEM_NOTRAP_P (mem) = 1;
899 0 : if (!cfun->calls_alloca)
900 0 : set_mem_alias_set (mem, get_frame_alias_set ());
901 0 : return mem;
902 : }
903 :
904 : /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
905 : this construct would be valid, and false otherwise. */
906 :
907 : bool
908 51524742 : validate_subreg (machine_mode omode, machine_mode imode,
909 : const_rtx reg, poly_uint64 offset)
910 : {
911 103049484 : poly_uint64 isize = GET_MODE_SIZE (imode);
912 103049484 : poly_uint64 osize = GET_MODE_SIZE (omode);
913 :
914 : /* The sizes must be ordered, so that we know whether the subreg
915 : is partial, paradoxical or complete. */
916 51524742 : if (!ordered_p (isize, osize))
917 : return false;
918 :
919 : /* All subregs must be aligned. */
920 51524742 : if (!multiple_p (offset, osize))
921 : return false;
922 :
923 : /* The subreg offset cannot be outside the inner object. */
924 51524722 : if (maybe_ge (offset, isize))
925 : return false;
926 :
927 51524722 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode);
928 :
929 : /* ??? This should not be here. Temporarily continue to allow word_mode
930 : subregs of anything. The most common offender is (subreg:SI (reg:DF)).
931 : Generally, backends are doing something sketchy but it'll take time to
932 : fix them all. */
933 51524722 : if (omode == word_mode)
934 : ;
935 : /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
936 : is the culprit here, and not the backends. */
937 31642453 : else if (known_ge (osize, regsize) && known_ge (isize, osize))
938 : ;
939 : /* Allow component subregs of complex and vector. Though given the below
940 : extraction rules, it's not always clear what that means. */
941 25230354 : else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
942 26435142 : && GET_MODE_INNER (imode) == omode)
943 : ;
944 : /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
945 : i.e. (subreg:V4SF (reg:SF) 0) or (subreg:V4SF (reg:V2SF) 0). This
946 : surely isn't the cleanest way to represent this. It's questionable
947 : if this ought to be represented at all -- why can't this all be hidden
948 : in post-reload splitters that make arbitrarily mode changes to the
949 : registers themselves. */
950 23764331 : else if (VECTOR_MODE_P (omode)
951 26085369 : && GET_MODE_UNIT_SIZE (omode) == GET_MODE_UNIT_SIZE (imode))
952 : ;
953 : /* Subregs involving floating point modes are not allowed to
954 : change size unless it's an insert into a complex mode.
955 : Therefore (subreg:DI (reg:DF) 0) and (subreg:CS (reg:SF) 0) are fine, but
956 : (subreg:SI (reg:DF) 0) isn't. */
957 23665144 : else if ((FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
958 325201 : && !COMPLEX_MODE_P (omode))
959 : {
960 325041 : if (! (known_eq (isize, osize)
961 : /* LRA can use subreg to store a floating point value in
962 : an integer mode. Although the floating point and the
963 : integer modes need the same number of hard registers,
964 : the size of floating point mode can be less than the
965 : integer mode. LRA also uses subregs for a register
966 : should be used in different mode in on insn. */
967 73010 : || lra_in_progress))
968 : return false;
969 : }
970 :
971 : /* Paradoxical subregs must have offset zero. */
972 51453713 : if (maybe_gt (osize, isize) && !known_eq (offset, 0U))
973 : return false;
974 :
975 : /* Verify that the offset is representable. */
976 :
977 : /* Ensure that subregs of hard registers can be folded. In other words,
978 : the hardware register must be valid in the subreg's outer mode,
979 : and consequently the subreg can be replaced with a hardware register. */
980 51453713 : if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
981 : {
982 401952 : unsigned int regno = REGNO (reg);
983 :
984 401952 : if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
985 783209 : && GET_MODE_INNER (imode) == omode)
986 : ;
987 116598 : else if (!REG_CAN_CHANGE_MODE_P (regno, imode, omode))
988 : return false;
989 :
990 : /* Pass true to allow_stack_regs because targets like x86
991 : expect to be able to take subregs of the stack pointer. */
992 401851 : return simplify_subreg_regno (regno, imode, offset, omode, true) >= 0;
993 : }
994 : /* Do not allow normal SUBREG with stricter alignment than the inner MEM.
995 :
996 : PR120329: Combine can create paradoxical mem subregs even for
997 : strict-alignment targets. Allow it until combine is fixed. */
998 51051761 : else if (reg && MEM_P (reg) && STRICT_ALIGNMENT
999 : && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)
1000 : && known_le (osize, isize))
1001 : return false;
1002 :
1003 : /* If ISIZE is greater than REGSIZE, the inner value is split into blocks
1004 : of size REGSIZE. The outer size must then be ordered wrt REGSIZE,
1005 : otherwise we wouldn't know at compile time how many blocks the
1006 : outer mode occupies. */
1007 51051761 : if (maybe_gt (isize, regsize) && !ordered_p (osize, regsize))
1008 : return false;
1009 :
1010 : /* For normal pseudo registers, we want most of the same checks. Namely:
1011 :
1012 : Assume that the pseudo register will be allocated to hard registers
1013 : that can hold REGSIZE bytes each. If OSIZE is not a multiple of REGSIZE,
1014 : the remainder must correspond to the lowpart of the containing hard
1015 : register. If BYTES_BIG_ENDIAN, the lowpart is at the highest offset,
1016 : otherwise it is at the lowest offset.
1017 :
1018 : Given that we've already checked the mode and offset alignment,
1019 : we only have to check subblock subregs here.
1020 :
1021 : For paradoxical little-endian registers, this check is redundant. The
1022 : offset has already been validated to be zero.
1023 :
1024 : For paradoxical big-endian registers, this check is not valid
1025 : because the offset is zero. */
1026 51051761 : if (maybe_lt (osize, regsize)
1027 24323870 : && known_le (osize, isize)
1028 68125588 : && ! (lra_in_progress && (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))))
1029 : {
1030 : /* It is invalid for the target to pick a register size for a mode
1031 : that isn't ordered wrt to the size of that mode. */
1032 17059719 : poly_uint64 block_size = ordered_min (isize, regsize);
1033 17059719 : unsigned int start_reg;
1034 17059719 : poly_uint64 offset_within_reg;
1035 17059719 : if (!can_div_trunc_p (offset, block_size, &start_reg, &offset_within_reg)
1036 17059719 : || (BYTES_BIG_ENDIAN
1037 : ? maybe_ne (offset_within_reg, block_size - osize)
1038 17059719 : : maybe_ne (offset_within_reg, 0U)))
1039 4418 : return false;
1040 : }
1041 : return true;
1042 : }
1043 :
1044 : rtx
1045 25515890 : gen_rtx_SUBREG (machine_mode mode, rtx reg, poly_uint64 offset)
1046 : {
1047 25515890 : gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
1048 25515890 : return gen_rtx_raw_SUBREG (mode, reg, offset);
1049 : }
1050 :
1051 : /* Generate a SUBREG representing the least-significant part of REG if MODE
1052 : is smaller than mode of REG, otherwise paradoxical SUBREG. */
1053 :
1054 : rtx
1055 601610 : gen_lowpart_SUBREG (machine_mode mode, rtx reg)
1056 : {
1057 601610 : machine_mode inmode;
1058 :
1059 601610 : inmode = GET_MODE (reg);
1060 601610 : if (inmode == VOIDmode)
1061 0 : inmode = mode;
1062 601610 : return gen_rtx_SUBREG (mode, reg,
1063 601610 : subreg_lowpart_offset (mode, inmode));
1064 : }
1065 :
1066 : rtx
1067 109182437 : gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
1068 : enum var_init_status status)
1069 : {
1070 109182437 : rtx x = gen_rtx_fmt_te (VAR_LOCATION, mode, decl, loc);
1071 109182437 : PAT_VAR_LOCATION_STATUS (x) = status;
1072 109182437 : return x;
1073 : }
1074 :
1075 :
1076 : /* Create an rtvec and stores within it the RTXen passed in the arguments. */
1077 :
1078 : rtvec
1079 25050776 : gen_rtvec (int n, ...)
1080 : {
1081 25050776 : int i;
1082 25050776 : rtvec rt_val;
1083 25050776 : va_list p;
1084 :
1085 25050776 : va_start (p, n);
1086 :
1087 : /* Don't allocate an empty rtvec... */
1088 25050776 : if (n == 0)
1089 : {
1090 0 : va_end (p);
1091 0 : return NULL_RTVEC;
1092 : }
1093 :
1094 25050776 : rt_val = rtvec_alloc (n);
1095 :
1096 95334283 : for (i = 0; i < n; i++)
1097 45232731 : rt_val->elem[i] = va_arg (p, rtx);
1098 :
1099 25050776 : va_end (p);
1100 25050776 : return rt_val;
1101 : }
1102 :
1103 : rtvec
1104 470079 : gen_rtvec_v (int n, rtx *argp)
1105 : {
1106 470079 : int i;
1107 470079 : rtvec rt_val;
1108 :
1109 : /* Don't allocate an empty rtvec... */
1110 470079 : if (n == 0)
1111 : return NULL_RTVEC;
1112 :
1113 470079 : rt_val = rtvec_alloc (n);
1114 :
1115 2134124 : for (i = 0; i < n; i++)
1116 1193966 : rt_val->elem[i] = *argp++;
1117 :
1118 : return rt_val;
1119 : }
1120 :
1121 : rtvec
1122 0 : gen_rtvec_v (int n, rtx_insn **argp)
1123 : {
1124 0 : int i;
1125 0 : rtvec rt_val;
1126 :
1127 : /* Don't allocate an empty rtvec... */
1128 0 : if (n == 0)
1129 : return NULL_RTVEC;
1130 :
1131 0 : rt_val = rtvec_alloc (n);
1132 :
1133 0 : for (i = 0; i < n; i++)
1134 0 : rt_val->elem[i] = *argp++;
1135 :
1136 : return rt_val;
1137 : }
1138 :
1139 :
1140 : /* Return the number of bytes between the start of an OUTER_MODE
1141 : in-memory value and the start of an INNER_MODE in-memory value,
1142 : given that the former is a lowpart of the latter. It may be a
1143 : paradoxical lowpart, in which case the offset will be negative
1144 : on big-endian targets. */
1145 :
1146 : poly_int64
1147 74880542 : byte_lowpart_offset (machine_mode outer_mode,
1148 : machine_mode inner_mode)
1149 : {
1150 74880542 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1151 3855106 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1152 : else
1153 71025436 : return subreg_lowpart_offset (outer_mode, inner_mode);
1154 : }
1155 :
1156 : /* Return the offset of (subreg:OUTER_MODE (mem:INNER_MODE X) OFFSET)
1157 : from address X. For paradoxical big-endian subregs this is a
1158 : negative value, otherwise it's the same as OFFSET. */
1159 :
1160 : poly_int64
1161 12517597 : subreg_memory_offset (machine_mode outer_mode, machine_mode inner_mode,
1162 : poly_uint64 offset)
1163 : {
1164 12517597 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1165 : {
1166 3453958 : gcc_assert (known_eq (offset, 0U));
1167 3453958 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1168 : }
1169 9063639 : return offset;
1170 : }
1171 :
1172 : /* As above, but return the offset that existing subreg X would have
1173 : if SUBREG_REG (X) were stored in memory. The only significant thing
1174 : about the current SUBREG_REG is its mode. */
1175 :
1176 : poly_int64
1177 686948 : subreg_memory_offset (const_rtx x)
1178 : {
1179 1373896 : return subreg_memory_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
1180 686948 : SUBREG_BYTE (x));
1181 : }
1182 :
1183 : /* Generate a REG rtx for a new pseudo register of mode MODE.
1184 : This pseudo is assigned the next sequential register number. */
1185 :
1186 : rtx
1187 69143619 : gen_reg_rtx (machine_mode mode)
1188 : {
1189 69143619 : rtx val;
1190 69143619 : unsigned int align = GET_MODE_ALIGNMENT (mode);
1191 :
1192 69143619 : gcc_assert (can_create_pseudo_p ());
1193 :
1194 : /* If a virtual register with bigger mode alignment is generated,
1195 : increase stack alignment estimation because it might be spilled
1196 : to stack later. */
1197 69143619 : if (SUPPORTS_STACK_ALIGNMENT
1198 69143619 : && crtl->stack_alignment_estimated < align
1199 374899 : && !crtl->stack_realign_processed)
1200 : {
1201 373826 : unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
1202 373826 : if (crtl->stack_alignment_estimated < min_align)
1203 373826 : crtl->stack_alignment_estimated = min_align;
1204 : }
1205 :
1206 69143619 : if (generating_concat_p
1207 52079078 : && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
1208 52079078 : || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
1209 : {
1210 : /* For complex modes, don't make a single pseudo.
1211 : Instead, make a CONCAT of two pseudos.
1212 : This allows noncontiguous allocation of the real and imaginary parts,
1213 : which makes much better code. Besides, allocating DCmode
1214 : pseudos overstrains reload on some machines like the 386. */
1215 225331 : rtx realpart, imagpart;
1216 225331 : machine_mode partmode = GET_MODE_INNER (mode);
1217 :
1218 225331 : realpart = gen_reg_rtx (partmode);
1219 225331 : imagpart = gen_reg_rtx (partmode);
1220 225331 : return gen_rtx_CONCAT (mode, realpart, imagpart);
1221 : }
1222 :
1223 : /* Do not call gen_reg_rtx with uninitialized crtl. */
1224 68918288 : gcc_assert (crtl->emit.regno_pointer_align_length);
1225 :
1226 68918288 : crtl->emit.ensure_regno_capacity ();
1227 68918288 : gcc_assert (reg_rtx_no < crtl->emit.regno_pointer_align_length);
1228 :
1229 68918288 : val = gen_raw_REG (mode, reg_rtx_no);
1230 68918288 : regno_reg_rtx[reg_rtx_no++] = val;
1231 68918288 : return val;
1232 : }
1233 :
1234 : /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1235 : enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1236 :
1237 : void
1238 68919514 : emit_status::ensure_regno_capacity ()
1239 : {
1240 68919514 : int old_size = regno_pointer_align_length;
1241 :
1242 68919514 : if (reg_rtx_no < old_size)
1243 : return;
1244 :
1245 181108 : int new_size = old_size * 2;
1246 181108 : while (reg_rtx_no >= new_size)
1247 0 : new_size *= 2;
1248 :
1249 181108 : char *tmp = XRESIZEVEC (char, regno_pointer_align, new_size);
1250 181108 : memset (tmp + old_size, 0, new_size - old_size);
1251 181108 : regno_pointer_align = (unsigned char *) tmp;
1252 :
1253 181108 : rtx *new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, new_size);
1254 181108 : memset (new1 + old_size, 0, (new_size - old_size) * sizeof (rtx));
1255 181108 : regno_reg_rtx = new1;
1256 :
1257 181108 : crtl->emit.regno_pointer_align_length = new_size;
1258 : }
1259 :
1260 : /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1261 :
1262 : bool
1263 11991 : reg_is_parm_p (rtx reg)
1264 : {
1265 11991 : tree decl;
1266 :
1267 11991 : gcc_assert (REG_P (reg));
1268 11991 : decl = REG_EXPR (reg);
1269 9545 : return (decl && TREE_CODE (decl) == PARM_DECL);
1270 : }
1271 :
1272 : /* Update NEW with the same attributes as REG, but with OFFSET added
1273 : to the REG_OFFSET. */
1274 :
1275 : static void
1276 18642538 : update_reg_offset (rtx new_rtx, rtx reg, poly_int64 offset)
1277 : {
1278 18642538 : REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
1279 18642538 : REG_OFFSET (reg) + offset);
1280 18642538 : }
1281 :
1282 : /* Generate a register with same attributes as REG, but with OFFSET
1283 : added to the REG_OFFSET. */
1284 :
1285 : rtx
1286 11023383 : gen_rtx_REG_offset (rtx reg, machine_mode mode, unsigned int regno,
1287 : poly_int64 offset)
1288 : {
1289 : /* Use gen_raw_REG rather than gen_rtx_REG, because otherwise we'd
1290 : overwrite REG_ATTRS (and in the callers often ORIGINAL_REGNO too)
1291 : of the shared REG rtxes like stack_pointer_rtx etc. This should
1292 : happen only for SUBREGs from DEBUG_INSNs, RA should ensure
1293 : multi-word registers don't overlap the special registers like
1294 : stack pointer. */
1295 11023383 : rtx new_rtx = gen_raw_REG (mode, regno);
1296 :
1297 11023383 : update_reg_offset (new_rtx, reg, offset);
1298 11023383 : return new_rtx;
1299 : }
1300 :
1301 : /* Generate a new pseudo-register with the same attributes as REG, but
1302 : with OFFSET added to the REG_OFFSET. */
1303 :
1304 : rtx
1305 635538 : gen_reg_rtx_offset (rtx reg, machine_mode mode, int offset)
1306 : {
1307 635538 : rtx new_rtx = gen_reg_rtx (mode);
1308 :
1309 635538 : update_reg_offset (new_rtx, reg, offset);
1310 635538 : return new_rtx;
1311 : }
1312 :
1313 : /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1314 : new register is a (possibly paradoxical) lowpart of the old one. */
1315 :
1316 : void
1317 2919058 : adjust_reg_mode (rtx reg, machine_mode mode)
1318 : {
1319 2919058 : update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
1320 2919058 : PUT_MODE (reg, mode);
1321 2919058 : }
1322 :
1323 : /* Copy REG's attributes from X, if X has any attributes. If REG and X
1324 : have different modes, REG is a (possibly paradoxical) lowpart of X. */
1325 :
1326 : void
1327 75706164 : set_reg_attrs_from_value (rtx reg, rtx x)
1328 : {
1329 75706164 : poly_int64 offset;
1330 75706164 : bool can_be_reg_pointer = true;
1331 :
1332 : /* Don't call mark_reg_pointer for incompatible pointer sign
1333 : extension. */
1334 75706164 : while (GET_CODE (x) == SIGN_EXTEND
1335 : || GET_CODE (x) == ZERO_EXTEND
1336 76749957 : || GET_CODE (x) == TRUNCATE
1337 76749957 : || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
1338 : {
1339 : #if defined(POINTERS_EXTEND_UNSIGNED)
1340 1043793 : if (((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
1341 : || (GET_CODE (x) == ZERO_EXTEND && ! POINTERS_EXTEND_UNSIGNED)
1342 489447 : || (paradoxical_subreg_p (x)
1343 17600 : && ! (SUBREG_PROMOTED_VAR_P (x)
1344 0 : && SUBREG_CHECK_PROMOTED_SIGN (x,
1345 : POINTERS_EXTEND_UNSIGNED))))
1346 1061393 : && !targetm.have_ptr_extend ())
1347 : can_be_reg_pointer = false;
1348 : #endif
1349 1043793 : x = XEXP (x, 0);
1350 : }
1351 :
1352 : /* Hard registers can be reused for multiple purposes within the same
1353 : function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1354 : on them is wrong. */
1355 75706164 : if (HARD_REGISTER_P (reg))
1356 49170082 : return;
1357 :
1358 26536082 : offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1359 26536082 : if (MEM_P (x))
1360 : {
1361 5658612 : if (MEM_OFFSET_KNOWN_P (x))
1362 2694411 : REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1363 2694411 : MEM_OFFSET (x) + offset);
1364 5204989 : if (can_be_reg_pointer && MEM_POINTER (x))
1365 662300 : mark_reg_pointer (reg, 0);
1366 : }
1367 21331093 : else if (REG_P (x))
1368 : {
1369 6913801 : if (REG_ATTRS (x))
1370 4064559 : update_reg_offset (reg, x, offset);
1371 6913801 : if (can_be_reg_pointer && REG_POINTER (x))
1372 1927379 : mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1373 : }
1374 : }
1375 :
1376 : /* Generate a REG rtx for a new pseudo register, copying the mode
1377 : and attributes from X. */
1378 :
1379 : rtx
1380 566986 : gen_reg_rtx_and_attrs (rtx x)
1381 : {
1382 566986 : rtx reg = gen_reg_rtx (GET_MODE (x));
1383 566986 : set_reg_attrs_from_value (reg, x);
1384 566986 : return reg;
1385 : }
1386 :
1387 : /* Set the register attributes for registers contained in PARM_RTX.
1388 : Use needed values from memory attributes of MEM. */
1389 :
1390 : void
1391 110331 : set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1392 : {
1393 110331 : if (REG_P (parm_rtx))
1394 110331 : set_reg_attrs_from_value (parm_rtx, mem);
1395 0 : else if (GET_CODE (parm_rtx) == PARALLEL)
1396 : {
1397 : /* Check for a NULL entry in the first slot, used to indicate that the
1398 : parameter goes both on the stack and in registers. */
1399 0 : int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1400 0 : for (; i < XVECLEN (parm_rtx, 0); i++)
1401 : {
1402 0 : rtx x = XVECEXP (parm_rtx, 0, i);
1403 0 : if (REG_P (XEXP (x, 0)))
1404 0 : REG_ATTRS (XEXP (x, 0))
1405 0 : = get_reg_attrs (MEM_EXPR (mem),
1406 0 : INTVAL (XEXP (x, 1)));
1407 : }
1408 : }
1409 110331 : }
1410 :
1411 : /* Set the REG_ATTRS for registers in value X, given that X represents
1412 : decl T. */
1413 :
1414 : void
1415 67680392 : set_reg_attrs_for_decl_rtl (tree t, rtx x)
1416 : {
1417 67680392 : if (!t)
1418 : return;
1419 67680196 : tree tdecl = t;
1420 67680196 : if (GET_CODE (x) == SUBREG)
1421 : {
1422 621 : gcc_assert (subreg_lowpart_p (x));
1423 621 : x = SUBREG_REG (x);
1424 : }
1425 67680196 : if (REG_P (x))
1426 44523601 : REG_ATTRS (x)
1427 44523601 : = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1428 44523601 : DECL_P (tdecl)
1429 21740670 : ? DECL_MODE (tdecl)
1430 22782931 : : TYPE_MODE (TREE_TYPE (tdecl))));
1431 67680196 : if (GET_CODE (x) == CONCAT)
1432 : {
1433 228723 : if (REG_P (XEXP (x, 0)))
1434 228723 : REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1435 228723 : if (REG_P (XEXP (x, 1)))
1436 228723 : REG_ATTRS (XEXP (x, 1))
1437 457446 : = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1438 : }
1439 67680196 : if (GET_CODE (x) == PARALLEL)
1440 : {
1441 61576 : int i, start;
1442 :
1443 : /* Check for a NULL entry, used to indicate that the parameter goes
1444 : both on the stack and in registers. */
1445 61576 : if (XEXP (XVECEXP (x, 0, 0), 0))
1446 : start = 0;
1447 : else
1448 0 : start = 1;
1449 :
1450 176271 : for (i = start; i < XVECLEN (x, 0); i++)
1451 : {
1452 114695 : rtx y = XVECEXP (x, 0, i);
1453 114695 : if (REG_P (XEXP (y, 0)))
1454 114695 : REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1455 : }
1456 : }
1457 : }
1458 :
1459 : /* Assign the RTX X to declaration T. */
1460 :
1461 : void
1462 650790719 : set_decl_rtl (tree t, rtx x)
1463 : {
1464 650790719 : DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1465 650790719 : if (x)
1466 34102040 : set_reg_attrs_for_decl_rtl (t, x);
1467 650790719 : }
1468 :
1469 : /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1470 : if the ABI requires the parameter to be passed by reference. */
1471 :
1472 : void
1473 3251813 : set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1474 : {
1475 3251813 : DECL_INCOMING_RTL (t) = x;
1476 3251813 : if (x && !by_reference_p)
1477 3246847 : set_reg_attrs_for_decl_rtl (t, x);
1478 3251813 : }
1479 :
1480 : /* Identify REG (which may be a CONCAT) as a user register. */
1481 :
1482 : void
1483 6373431 : mark_user_reg (rtx reg)
1484 : {
1485 6373431 : if (GET_CODE (reg) == CONCAT)
1486 : {
1487 3341 : REG_USERVAR_P (XEXP (reg, 0)) = 1;
1488 3341 : REG_USERVAR_P (XEXP (reg, 1)) = 1;
1489 : }
1490 : else
1491 : {
1492 6370090 : gcc_assert (REG_P (reg));
1493 6370090 : REG_USERVAR_P (reg) = 1;
1494 : }
1495 6373431 : }
1496 :
1497 : /* Identify REG as a probable pointer register and show its alignment
1498 : as ALIGN, if nonzero. */
1499 :
1500 : void
1501 17367427 : mark_reg_pointer (rtx reg, int align)
1502 : {
1503 17367427 : if (! REG_POINTER (reg))
1504 : {
1505 11006866 : REG_POINTER (reg) = 1;
1506 :
1507 11006866 : if (align)
1508 9550810 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1509 : }
1510 6360561 : else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1511 : /* We can no-longer be sure just how aligned this pointer is. */
1512 1321142 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1513 17367427 : }
1514 :
1515 : /* Return 1 plus largest pseudo reg number used in the current function. */
1516 :
1517 : int
1518 7168374488 : max_reg_num (void)
1519 : {
1520 7168374488 : return reg_rtx_no;
1521 : }
1522 :
1523 : /* Return 1 + the largest label number used so far in the current function. */
1524 :
1525 : int
1526 4098791 : max_label_num (void)
1527 : {
1528 4098791 : return label_num;
1529 : }
1530 :
1531 : /* Return first label number used in this function (if any were used). */
1532 :
1533 : int
1534 2585503 : get_first_label_num (void)
1535 : {
1536 2585503 : return first_label_num;
1537 : }
1538 :
1539 : /* If the rtx for label was created during the expansion of a nested
1540 : function, then first_label_num won't include this label number.
1541 : Fix this now so that array indices work later. */
1542 :
1543 : void
1544 26964 : maybe_set_first_label_num (rtx_code_label *x)
1545 : {
1546 26964 : if (CODE_LABEL_NUMBER (x) < first_label_num)
1547 389 : first_label_num = CODE_LABEL_NUMBER (x);
1548 26964 : }
1549 :
1550 : /* For use by the RTL function loader, when mingling with normal
1551 : functions.
1552 : Ensure that label_num is greater than the label num of X, to avoid
1553 : duplicate labels in the generated assembler. */
1554 :
1555 : void
1556 28 : maybe_set_max_label_num (rtx_code_label *x)
1557 : {
1558 28 : if (CODE_LABEL_NUMBER (x) >= label_num)
1559 24 : label_num = CODE_LABEL_NUMBER (x) + 1;
1560 28 : }
1561 :
1562 :
1563 : /* Return a value representing some low-order bits of X, where the number
1564 : of low-order bits is given by MODE. Note that no conversion is done
1565 : between floating-point and fixed-point values, rather, the bit
1566 : representation is returned.
1567 :
1568 : This function handles the cases in common between gen_lowpart, below,
1569 : and two variants in cse.cc and combine.cc. These are the cases that can
1570 : be safely handled at all points in the compilation.
1571 :
1572 : If this is not a case we can handle, return 0. */
1573 :
1574 : rtx
1575 53558303 : gen_lowpart_common (machine_mode mode, rtx x)
1576 : {
1577 107140892 : poly_uint64 msize = GET_MODE_SIZE (mode);
1578 53570446 : machine_mode innermode;
1579 :
1580 : /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1581 : so we have to make one up. Yuk. */
1582 53570446 : innermode = GET_MODE (x);
1583 53570446 : if (CONST_INT_P (x)
1584 53570446 : && known_le (msize * BITS_PER_UNIT,
1585 : (unsigned HOST_WIDE_INT) HOST_BITS_PER_WIDE_INT))
1586 15936701 : innermode = int_mode_for_size (HOST_BITS_PER_WIDE_INT, 0).require ();
1587 37633745 : else if (innermode == VOIDmode)
1588 195816 : innermode = int_mode_for_size (HOST_BITS_PER_DOUBLE_INT, 0).require ();
1589 :
1590 53570446 : gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1591 :
1592 53570446 : if (innermode == mode)
1593 : return x;
1594 :
1595 : /* The size of the outer and inner modes must be ordered. */
1596 61673090 : poly_uint64 xsize = GET_MODE_SIZE (innermode);
1597 30836545 : if (!ordered_p (msize, xsize))
1598 : return 0;
1599 :
1600 30836545 : if (SCALAR_FLOAT_MODE_P (mode))
1601 : {
1602 : /* Don't allow paradoxical FLOAT_MODE subregs. */
1603 266993 : if (maybe_gt (msize, xsize))
1604 : return 0;
1605 : }
1606 : else
1607 : {
1608 : /* MODE must occupy no more of the underlying registers than X. */
1609 30569552 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (innermode);
1610 30569552 : unsigned int mregs, xregs;
1611 30569552 : if (!can_div_away_from_zero_p (msize, regsize, &mregs)
1612 30569552 : || !can_div_away_from_zero_p (xsize, regsize, &xregs)
1613 30569552 : || mregs > xregs)
1614 1251 : return 0;
1615 : }
1616 :
1617 30835294 : scalar_int_mode int_mode, int_innermode, from_mode;
1618 30835294 : if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1619 170841 : && is_a <scalar_int_mode> (mode, &int_mode)
1620 30835294 : && is_a <scalar_int_mode> (innermode, &int_innermode)
1621 31006087 : && is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &from_mode))
1622 : {
1623 : /* If we are getting the low-order part of something that has been
1624 : sign- or zero-extended, we can either just use the object being
1625 : extended or make a narrower extension. If we want an even smaller
1626 : piece than the size of the object being extended, call ourselves
1627 : recursively.
1628 :
1629 : This case is used mostly by combine and cse. */
1630 :
1631 170793 : if (from_mode == int_mode)
1632 : return XEXP (x, 0);
1633 47340 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (from_mode))
1634 : return gen_lowpart_common (int_mode, XEXP (x, 0));
1635 10911 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (int_innermode))
1636 3377 : return gen_rtx_fmt_e (GET_CODE (x), int_mode, XEXP (x, 0));
1637 : }
1638 30664501 : else if (GET_CODE (x) == SUBREG || REG_P (x)
1639 : || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1640 17265047 : || CONST_DOUBLE_AS_FLOAT_P (x) || CONST_SCALAR_INT_P (x)
1641 : || CONST_POLY_INT_P (x))
1642 20600858 : return lowpart_subreg (mode, x, innermode);
1643 :
1644 : /* Otherwise, we can't do this. */
1645 : return 0;
1646 : }
1647 :
1648 : rtx
1649 10117 : gen_highpart (machine_mode mode, rtx x)
1650 : {
1651 20234 : poly_uint64 msize = GET_MODE_SIZE (mode);
1652 10117 : rtx result;
1653 :
1654 : /* This case loses if X is a subreg. To catch bugs early,
1655 : complain if an invalid MODE is used even in other cases. */
1656 11852 : gcc_assert (known_le (msize, (unsigned int) UNITS_PER_WORD)
1657 : || known_eq (msize, GET_MODE_UNIT_SIZE (GET_MODE (x))));
1658 :
1659 : /* gen_lowpart_common handles a lot of special cases due to needing to handle
1660 : paradoxical subregs; it only calls simplify_gen_subreg when certain that
1661 : it will produce something meaningful. The only case we need to handle
1662 : specially here is MEM. */
1663 10117 : if (MEM_P (x))
1664 : {
1665 148 : poly_int64 offset = subreg_highpart_offset (mode, GET_MODE (x));
1666 148 : return adjust_address (x, mode, offset);
1667 : }
1668 :
1669 9969 : result = simplify_gen_subreg (mode, x, GET_MODE (x),
1670 9969 : subreg_highpart_offset (mode, GET_MODE (x)));
1671 : /* Since we handle MEM directly above, we should never get a MEM back
1672 : from simplify_gen_subreg. */
1673 9969 : gcc_assert (result && !MEM_P (result));
1674 :
1675 : return result;
1676 : }
1677 :
1678 : /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1679 : be VOIDmode constant. */
1680 : rtx
1681 0 : gen_highpart_mode (machine_mode outermode, machine_mode innermode, rtx exp)
1682 : {
1683 0 : if (GET_MODE (exp) != VOIDmode)
1684 : {
1685 0 : gcc_assert (GET_MODE (exp) == innermode);
1686 0 : return gen_highpart (outermode, exp);
1687 : }
1688 0 : return simplify_gen_subreg (outermode, exp, innermode,
1689 0 : subreg_highpart_offset (outermode, innermode));
1690 : }
1691 :
1692 : /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1693 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1694 :
1695 : poly_uint64
1696 235312759 : subreg_size_lowpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1697 : {
1698 235312759 : gcc_checking_assert (ordered_p (outer_bytes, inner_bytes));
1699 235312759 : if (maybe_gt (outer_bytes, inner_bytes))
1700 : /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1701 : return 0;
1702 :
1703 235312759 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1704 : return inner_bytes - outer_bytes;
1705 235312759 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1706 235312759 : return 0;
1707 : else
1708 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes, 0);
1709 : }
1710 :
1711 : /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1712 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1713 :
1714 : poly_uint64
1715 44471 : subreg_size_highpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1716 : {
1717 44471 : gcc_assert (known_ge (inner_bytes, outer_bytes));
1718 :
1719 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1720 : return 0;
1721 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1722 44471 : return inner_bytes - outer_bytes;
1723 : else
1724 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes,
1725 : (inner_bytes - outer_bytes)
1726 : * BITS_PER_UNIT);
1727 : }
1728 :
1729 : /* Return true iff X, assumed to be a SUBREG,
1730 : refers to the least significant part of its containing reg.
1731 : If X is not a SUBREG, always return true (it is its own low part!). */
1732 :
1733 : bool
1734 54704334 : subreg_lowpart_p (const_rtx x)
1735 : {
1736 54704334 : if (GET_CODE (x) != SUBREG)
1737 : return true;
1738 54704334 : else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1739 : return false;
1740 :
1741 54704334 : return known_eq (subreg_lowpart_offset (GET_MODE (x),
1742 : GET_MODE (SUBREG_REG (x))),
1743 : SUBREG_BYTE (x));
1744 : }
1745 :
1746 : /* Return subword OFFSET of operand OP.
1747 : The word number, OFFSET, is interpreted as the word number starting
1748 : at the low-order address. OFFSET 0 is the low-order word if not
1749 : WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1750 :
1751 : If we cannot extract the required word, we return zero. Otherwise,
1752 : an rtx corresponding to the requested word will be returned.
1753 :
1754 : VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1755 : reload has completed, a valid address will always be returned. After
1756 : reload, if a valid address cannot be returned, we return zero.
1757 :
1758 : If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1759 : it is the responsibility of the caller.
1760 :
1761 : MODE is the mode of OP in case it is a CONST_INT.
1762 :
1763 : ??? This is still rather broken for some cases. The problem for the
1764 : moment is that all callers of this thing provide no 'goal mode' to
1765 : tell us to work with. This exists because all callers were written
1766 : in a word based SUBREG world.
1767 : Now use of this function can be deprecated by simplify_subreg in most
1768 : cases.
1769 : */
1770 :
1771 : rtx
1772 86258 : operand_subword (rtx op, poly_uint64 offset, int validate_address,
1773 : machine_mode mode)
1774 : {
1775 86258 : if (mode == VOIDmode)
1776 3034 : mode = GET_MODE (op);
1777 :
1778 3034 : gcc_assert (mode != VOIDmode);
1779 :
1780 : /* If OP is narrower than a word, fail. */
1781 86258 : if (mode != BLKmode
1782 187554 : && maybe_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1783 : return 0;
1784 :
1785 : /* If we want a word outside OP, return zero. */
1786 86258 : if (mode != BLKmode
1787 187554 : && maybe_gt ((offset + 1) * UNITS_PER_WORD, GET_MODE_SIZE (mode)))
1788 0 : return const0_rtx;
1789 :
1790 : /* Form a new MEM at the requested address. */
1791 86258 : if (MEM_P (op))
1792 : {
1793 10857 : rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1794 :
1795 9649 : if (! validate_address)
1796 : return new_rtx;
1797 :
1798 9649 : else if (reload_completed)
1799 : {
1800 0 : if (! strict_memory_address_addr_space_p (word_mode,
1801 : XEXP (new_rtx, 0),
1802 0 : MEM_ADDR_SPACE (op)))
1803 : return 0;
1804 : }
1805 : else
1806 9649 : return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1807 : }
1808 :
1809 : /* Rest can be handled by simplify_subreg. */
1810 93550 : return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1811 : }
1812 :
1813 : /* Similar to `operand_subword', but never return 0. If we can't
1814 : extract the required subword, put OP into a register and try again.
1815 : The second attempt must succeed. We always validate the address in
1816 : this case.
1817 :
1818 : MODE is the mode of OP, in case it is CONST_INT. */
1819 :
1820 : rtx
1821 64939 : operand_subword_force (rtx op, poly_uint64 offset, machine_mode mode)
1822 : {
1823 64939 : rtx result = operand_subword (op, offset, 1, mode);
1824 :
1825 64939 : if (result)
1826 : return result;
1827 :
1828 0 : if (mode != BLKmode && mode != VOIDmode)
1829 : {
1830 : /* If this is a register which cannot be accessed by words, copy it
1831 : to a pseudo register. */
1832 0 : if (REG_P (op))
1833 0 : op = copy_to_reg (op);
1834 : else
1835 0 : op = force_reg (mode, op);
1836 : }
1837 :
1838 0 : result = operand_subword (op, offset, 1, mode);
1839 0 : gcc_assert (result);
1840 :
1841 : return result;
1842 : }
1843 :
1844 32322949 : mem_attrs::mem_attrs ()
1845 32322949 : : expr (NULL_TREE),
1846 32322949 : offset (0),
1847 32322949 : size (0),
1848 32322949 : alias (0),
1849 32322949 : align (0),
1850 32322949 : addrspace (ADDR_SPACE_GENERIC),
1851 32322949 : offset_known_p (false),
1852 32322949 : size_known_p (false)
1853 32322949 : {}
1854 :
1855 : /* Returns true if both MEM_EXPR can be considered equal
1856 : and false otherwise. */
1857 :
1858 : bool
1859 44623 : mem_expr_equal_p (const_tree expr1, const_tree expr2)
1860 : {
1861 44623 : if (expr1 == expr2)
1862 : return true;
1863 :
1864 43987 : if (! expr1 || ! expr2)
1865 : return false;
1866 :
1867 34216 : if (TREE_CODE (expr1) != TREE_CODE (expr2))
1868 : return false;
1869 :
1870 32628 : return operand_equal_p (expr1, expr2, 0);
1871 : }
1872 :
1873 : /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1874 : bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1875 : -1 if not known. */
1876 :
1877 : int
1878 22 : get_mem_align_offset (rtx mem, unsigned int align)
1879 : {
1880 22 : tree expr;
1881 22 : poly_uint64 offset;
1882 :
1883 : /* This function can't use
1884 : if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1885 : || (MAX (MEM_ALIGN (mem),
1886 : MAX (align, get_object_alignment (MEM_EXPR (mem))))
1887 : < align))
1888 : return -1;
1889 : else
1890 : return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1891 : for two reasons:
1892 : - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1893 : for <variable>. get_inner_reference doesn't handle it and
1894 : even if it did, the alignment in that case needs to be determined
1895 : from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1896 : - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1897 : isn't sufficiently aligned, the object it is in might be. */
1898 22 : gcc_assert (MEM_P (mem));
1899 22 : expr = MEM_EXPR (mem);
1900 22 : if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1901 : return -1;
1902 :
1903 21 : offset = MEM_OFFSET (mem);
1904 21 : if (DECL_P (expr))
1905 : {
1906 2 : if (DECL_ALIGN (expr) < align)
1907 : return -1;
1908 : }
1909 19 : else if (INDIRECT_REF_P (expr))
1910 : {
1911 0 : if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1912 : return -1;
1913 : }
1914 19 : else if (TREE_CODE (expr) == COMPONENT_REF)
1915 : {
1916 0 : while (1)
1917 : {
1918 0 : tree inner = TREE_OPERAND (expr, 0);
1919 0 : tree field = TREE_OPERAND (expr, 1);
1920 0 : tree byte_offset = component_ref_field_offset (expr);
1921 0 : tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1922 :
1923 0 : poly_uint64 suboffset;
1924 0 : if (!byte_offset
1925 0 : || !poly_int_tree_p (byte_offset, &suboffset)
1926 0 : || !tree_fits_uhwi_p (bit_offset))
1927 0 : return -1;
1928 :
1929 0 : offset += suboffset;
1930 0 : offset += tree_to_uhwi (bit_offset) / BITS_PER_UNIT;
1931 :
1932 0 : if (inner == NULL_TREE)
1933 : {
1934 0 : if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1935 : < (unsigned int) align)
1936 : return -1;
1937 0 : break;
1938 : }
1939 0 : else if (DECL_P (inner))
1940 : {
1941 0 : if (DECL_ALIGN (inner) < align)
1942 : return -1;
1943 : break;
1944 : }
1945 0 : else if (TREE_CODE (inner) != COMPONENT_REF)
1946 : return -1;
1947 0 : expr = inner;
1948 0 : }
1949 : }
1950 : else
1951 : return -1;
1952 :
1953 0 : HOST_WIDE_INT misalign;
1954 0 : if (!known_misalignment (offset, align / BITS_PER_UNIT, &misalign))
1955 : return -1;
1956 0 : return misalign;
1957 : }
1958 :
1959 : /* Given REF (a MEM) and T, either the type of X or the expression
1960 : corresponding to REF, set the memory attributes. OBJECTP is nonzero
1961 : if we are making a new object of this type. BITPOS is nonzero if
1962 : there is an offset outstanding on T that will be applied later.
1963 : MAY_STORE_P is true when REF can be the destination of a store. */
1964 :
1965 : void
1966 32322949 : set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1967 : poly_int64 bitpos, bool may_store_p)
1968 : {
1969 32322949 : poly_int64 apply_bitpos = 0;
1970 32322949 : tree type;
1971 32322949 : class mem_attrs attrs, *defattrs, *refattrs;
1972 32322949 : addr_space_t as;
1973 :
1974 : /* It can happen that type_for_mode was given a mode for which there
1975 : is no language-level type. In which case it returns NULL, which
1976 : we can see here. */
1977 32322949 : if (t == NULL_TREE)
1978 0 : return;
1979 :
1980 32322949 : type = TYPE_P (t) ? t : TREE_TYPE (t);
1981 32322949 : if (type == error_mark_node)
1982 : return;
1983 :
1984 : /* If we have already set DECL_RTL = ref, get_alias_set will get the
1985 : wrong answer, as it assumes that DECL_RTL already has the right alias
1986 : info. Callers should not set DECL_RTL until after the call to
1987 : set_mem_attributes. */
1988 32322949 : gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1989 :
1990 : /* Get the alias set from the expression or type (perhaps using a
1991 : front-end routine) and use it. */
1992 32322949 : attrs.alias = get_alias_set (t);
1993 :
1994 32322949 : MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1995 32322949 : MEM_POINTER (ref) = POINTER_TYPE_P (type);
1996 :
1997 : /* Default values from pre-existing memory attributes if present. */
1998 32322949 : refattrs = MEM_ATTRS (ref);
1999 32322949 : if (refattrs)
2000 : {
2001 : /* ??? Can this ever happen? Calling this routine on a MEM that
2002 : already carries memory attributes should probably be invalid. */
2003 13035893 : attrs.expr = refattrs->expr;
2004 13035893 : attrs.offset_known_p = refattrs->offset_known_p;
2005 13035893 : attrs.offset = refattrs->offset;
2006 13035893 : attrs.size_known_p = refattrs->size_known_p;
2007 13035893 : attrs.size = refattrs->size;
2008 13035893 : attrs.align = refattrs->align;
2009 : }
2010 :
2011 : /* Otherwise, default values from the mode of the MEM reference. */
2012 : else
2013 : {
2014 19287056 : defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
2015 19287056 : gcc_assert (!defattrs->expr);
2016 19287056 : gcc_assert (!defattrs->offset_known_p);
2017 :
2018 : /* Respect mode size. */
2019 19287056 : attrs.size_known_p = defattrs->size_known_p;
2020 19287056 : attrs.size = defattrs->size;
2021 : /* ??? Is this really necessary? We probably should always get
2022 : the size from the type below. */
2023 :
2024 : /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
2025 : if T is an object, always compute the object alignment below. */
2026 19287056 : if (TYPE_P (t))
2027 2039465 : attrs.align = defattrs->align;
2028 : else
2029 17247591 : attrs.align = BITS_PER_UNIT;
2030 : /* ??? If T is a type, respecting mode alignment may *also* be wrong
2031 : e.g. if the type carries an alignment attribute. Should we be
2032 : able to simply always use TYPE_ALIGN? */
2033 : }
2034 :
2035 : /* We can set the alignment from the type if we are making an object or if
2036 : this is an INDIRECT_REF. */
2037 32322949 : if (objectp || TREE_CODE (t) == INDIRECT_REF)
2038 9969537 : attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
2039 :
2040 : /* If the size is known, we can set that. */
2041 32322949 : tree new_size = TYPE_SIZE_UNIT (type);
2042 :
2043 : /* The address-space is that of the type. */
2044 32322949 : as = TYPE_ADDR_SPACE (type);
2045 :
2046 : /* If T is not a type, we may be able to deduce some more information about
2047 : the expression. */
2048 32322949 : if (! TYPE_P (t))
2049 : {
2050 30277182 : tree base;
2051 :
2052 30277182 : if (TREE_THIS_VOLATILE (t))
2053 179203 : MEM_VOLATILE_P (ref) = 1;
2054 :
2055 : /* Now remove any conversions: they don't change what the underlying
2056 : object is. Likewise for SAVE_EXPR. */
2057 30281885 : while (CONVERT_EXPR_P (t)
2058 : || TREE_CODE (t) == VIEW_CONVERT_EXPR
2059 30281885 : || TREE_CODE (t) == SAVE_EXPR)
2060 4703 : t = TREE_OPERAND (t, 0);
2061 :
2062 : /* Note whether this expression can trap. */
2063 30277182 : MEM_NOTRAP_P (ref)
2064 30277182 : = !(may_store_p ? lhs_could_trap_p (t) : tree_could_trap_p (t));
2065 :
2066 30277182 : base = get_base_address (t);
2067 30277182 : if (base)
2068 : {
2069 30277182 : if (DECL_P (base)
2070 17359427 : && TREE_READONLY (base)
2071 2237629 : && (TREE_STATIC (base) || DECL_EXTERNAL (base))
2072 32167930 : && !TREE_THIS_VOLATILE (base))
2073 1890369 : MEM_READONLY_P (ref) = 1;
2074 :
2075 : /* Mark static const strings readonly as well. */
2076 30277182 : if (TREE_CODE (base) == STRING_CST
2077 312889 : && TREE_READONLY (base)
2078 30564999 : && TREE_STATIC (base))
2079 287817 : MEM_READONLY_P (ref) = 1;
2080 :
2081 : /* Address-space information is on the base object. */
2082 30277182 : if (TREE_CODE (base) == MEM_REF
2083 30277182 : || TREE_CODE (base) == TARGET_MEM_REF)
2084 12604854 : as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
2085 : 0))));
2086 : else
2087 17672328 : as = TYPE_ADDR_SPACE (TREE_TYPE (base));
2088 : }
2089 :
2090 : /* If this expression uses it's parent's alias set, mark it such
2091 : that we won't change it. */
2092 30277182 : if (component_uses_parent_alias_set_from (t) != NULL_TREE)
2093 1181325 : MEM_KEEP_ALIAS_SET_P (ref) = 1;
2094 :
2095 : /* If this is a decl, set the attributes of the MEM from it. */
2096 30277182 : if (DECL_P (t))
2097 : {
2098 7956627 : attrs.expr = t;
2099 7956627 : attrs.offset_known_p = true;
2100 7956627 : attrs.offset = 0;
2101 7956627 : apply_bitpos = bitpos;
2102 7956627 : new_size = DECL_SIZE_UNIT (t);
2103 : }
2104 :
2105 : /* ??? If we end up with a constant or a descriptor do not
2106 : record a MEM_EXPR. */
2107 22320555 : else if (CONSTANT_CLASS_P (t)
2108 22203737 : || TREE_CODE (t) == CONSTRUCTOR)
2109 : ;
2110 :
2111 : /* If this is a field reference, record it. */
2112 22203737 : else if (TREE_CODE (t) == COMPONENT_REF)
2113 : {
2114 10050539 : attrs.expr = t;
2115 10050539 : attrs.offset_known_p = true;
2116 10050539 : attrs.offset = 0;
2117 10050539 : apply_bitpos = bitpos;
2118 10050539 : if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
2119 66235 : new_size = DECL_SIZE_UNIT (TREE_OPERAND (t, 1));
2120 : }
2121 :
2122 : /* Else record it. */
2123 : else
2124 : {
2125 12153198 : gcc_assert (handled_component_p (t)
2126 : || TREE_CODE (t) == MEM_REF
2127 : || TREE_CODE (t) == TARGET_MEM_REF);
2128 12153198 : attrs.expr = t;
2129 12153198 : attrs.offset_known_p = true;
2130 12153198 : attrs.offset = 0;
2131 12153198 : apply_bitpos = bitpos;
2132 : }
2133 :
2134 : /* If this is a reference based on a partitioned decl replace the
2135 : base with a MEM_REF of the pointer representative we created
2136 : during stack slot partitioning. */
2137 30277182 : if (attrs.expr
2138 30160364 : && VAR_P (base)
2139 14253591 : && ! is_global_var (base)
2140 39160299 : && cfun->gimple_df->decls_to_pointers != NULL)
2141 : {
2142 4155741 : tree *namep = cfun->gimple_df->decls_to_pointers->get (base);
2143 4155741 : if (namep)
2144 : {
2145 2448204 : attrs.expr = unshare_expr (attrs.expr);
2146 2448204 : tree *orig_base = &attrs.expr;
2147 5167122 : while (handled_component_p (*orig_base))
2148 2718918 : orig_base = &TREE_OPERAND (*orig_base, 0);
2149 2448204 : if (TREE_CODE (*orig_base) == MEM_REF
2150 2448204 : || TREE_CODE (*orig_base) == TARGET_MEM_REF)
2151 746082 : TREE_OPERAND (*orig_base, 0) = *namep;
2152 : else
2153 : {
2154 1702122 : tree aptrt = reference_alias_ptr_type (*orig_base);
2155 1702122 : *orig_base = build2 (MEM_REF, TREE_TYPE (*orig_base),
2156 : *namep, build_int_cst (aptrt, 0));
2157 : }
2158 : }
2159 : }
2160 :
2161 : /* Compute the alignment. */
2162 30277182 : unsigned int obj_align;
2163 30277182 : unsigned HOST_WIDE_INT obj_bitpos;
2164 30277182 : get_object_alignment_1 (t, &obj_align, &obj_bitpos);
2165 30277182 : unsigned int diff_align = known_alignment (obj_bitpos - bitpos);
2166 30277182 : if (diff_align != 0)
2167 3964935 : obj_align = MIN (obj_align, diff_align);
2168 30277182 : attrs.align = MAX (attrs.align, obj_align);
2169 : }
2170 :
2171 32322949 : poly_uint64 const_size;
2172 32322949 : if (poly_int_tree_p (new_size, &const_size))
2173 : {
2174 31679613 : attrs.size_known_p = true;
2175 31679613 : attrs.size = const_size;
2176 : }
2177 :
2178 : /* If we modified OFFSET based on T, then subtract the outstanding
2179 : bit position offset. Similarly, increase the size of the accessed
2180 : object to contain the negative offset. */
2181 32322949 : if (maybe_ne (apply_bitpos, 0))
2182 : {
2183 2797633 : gcc_assert (attrs.offset_known_p);
2184 2797633 : poly_int64 bytepos = bits_to_bytes_round_down (apply_bitpos);
2185 2797633 : attrs.offset -= bytepos;
2186 2797633 : if (attrs.size_known_p)
2187 32322949 : attrs.size += bytepos;
2188 : }
2189 :
2190 : /* Now set the attributes we computed above. */
2191 32322949 : attrs.addrspace = as;
2192 32322949 : set_mem_attrs (ref, &attrs);
2193 : }
2194 :
2195 : void
2196 28216410 : set_mem_attributes (rtx ref, tree t, int objectp, bool may_store_p)
2197 : {
2198 28216410 : set_mem_attributes_minus_bitpos (ref, t, objectp, 0, may_store_p);
2199 28216410 : }
2200 :
2201 : /* Set the alias set of MEM to SET. */
2202 :
2203 : void
2204 7845616 : set_mem_alias_set (rtx mem, alias_set_type set)
2205 : {
2206 : /* If the new and old alias sets don't conflict, something is wrong. */
2207 10993747 : gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
2208 7845616 : mem_attrs attrs (*get_mem_attrs (mem));
2209 7845616 : attrs.alias = set;
2210 7845616 : set_mem_attrs (mem, &attrs);
2211 7845616 : }
2212 :
2213 : /* Set the address space of MEM to ADDRSPACE (target-defined). */
2214 :
2215 : void
2216 10322946 : set_mem_addr_space (rtx mem, addr_space_t addrspace)
2217 : {
2218 10322946 : mem_attrs attrs (*get_mem_attrs (mem));
2219 10322946 : attrs.addrspace = addrspace;
2220 10322946 : set_mem_attrs (mem, &attrs);
2221 10322946 : }
2222 :
2223 : /* Set the alignment of MEM to ALIGN bits. */
2224 :
2225 : void
2226 12812239 : set_mem_align (rtx mem, unsigned int align)
2227 : {
2228 12812239 : mem_attrs attrs (*get_mem_attrs (mem));
2229 12812239 : attrs.align = align;
2230 12812239 : set_mem_attrs (mem, &attrs);
2231 12812239 : }
2232 :
2233 : /* Set the expr for MEM to EXPR. */
2234 :
2235 : void
2236 7069626 : set_mem_expr (rtx mem, tree expr)
2237 : {
2238 7069626 : mem_attrs attrs (*get_mem_attrs (mem));
2239 7069626 : attrs.expr = expr;
2240 7069626 : set_mem_attrs (mem, &attrs);
2241 7069626 : }
2242 :
2243 : /* Set the offset of MEM to OFFSET. */
2244 :
2245 : void
2246 134 : set_mem_offset (rtx mem, poly_int64 offset)
2247 : {
2248 134 : mem_attrs attrs (*get_mem_attrs (mem));
2249 134 : attrs.offset_known_p = true;
2250 134 : attrs.offset = offset;
2251 134 : set_mem_attrs (mem, &attrs);
2252 134 : }
2253 :
2254 : /* Clear the offset of MEM. */
2255 :
2256 : void
2257 89755 : clear_mem_offset (rtx mem)
2258 : {
2259 89755 : mem_attrs attrs (*get_mem_attrs (mem));
2260 89755 : attrs.offset_known_p = false;
2261 89755 : set_mem_attrs (mem, &attrs);
2262 89755 : }
2263 :
2264 : /* Set the size of MEM to SIZE. */
2265 :
2266 : void
2267 2497712 : set_mem_size (rtx mem, poly_int64 size)
2268 : {
2269 2497712 : mem_attrs attrs (*get_mem_attrs (mem));
2270 2497712 : attrs.size_known_p = true;
2271 2497712 : attrs.size = size;
2272 2497712 : set_mem_attrs (mem, &attrs);
2273 2497712 : }
2274 :
2275 : /* Clear the size of MEM. */
2276 :
2277 : void
2278 586 : clear_mem_size (rtx mem)
2279 : {
2280 586 : mem_attrs attrs (*get_mem_attrs (mem));
2281 586 : attrs.size_known_p = false;
2282 586 : set_mem_attrs (mem, &attrs);
2283 586 : }
2284 :
2285 : /* Return a memory reference like MEMREF, but with its mode changed to MODE
2286 : and its address changed to ADDR. (VOIDmode means don't change the mode.
2287 : NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2288 : returned memory location is required to be valid. INPLACE is true if any
2289 : changes can be made directly to MEMREF or false if MEMREF must be treated
2290 : as immutable.
2291 :
2292 : The memory attributes are not changed. */
2293 :
2294 : static rtx
2295 505596010 : change_address_1 (rtx memref, machine_mode mode, rtx addr, int validate,
2296 : bool inplace)
2297 : {
2298 505596010 : addr_space_t as;
2299 505596010 : rtx new_rtx;
2300 :
2301 505596010 : gcc_assert (MEM_P (memref));
2302 505596010 : as = MEM_ADDR_SPACE (memref);
2303 505596010 : if (mode == VOIDmode)
2304 478695427 : mode = GET_MODE (memref);
2305 505596010 : if (addr == 0)
2306 64 : addr = XEXP (memref, 0);
2307 485166032 : if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2308 849779525 : && (!validate || memory_address_addr_space_p (mode, addr, as)))
2309 : return memref;
2310 :
2311 : /* Don't validate address for LRA. LRA can make the address valid
2312 : by itself in most efficient way. */
2313 161536748 : if (validate && !lra_in_progress)
2314 : {
2315 23151685 : if (reload_in_progress || reload_completed)
2316 3855332 : gcc_assert (memory_address_addr_space_p (mode, addr, as));
2317 : else
2318 19296353 : addr = memory_address_addr_space (mode, addr, as);
2319 : }
2320 :
2321 161536748 : if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2322 : return memref;
2323 :
2324 157394269 : if (inplace)
2325 : {
2326 260753 : XEXP (memref, 0) = addr;
2327 260753 : return memref;
2328 : }
2329 :
2330 157133516 : new_rtx = gen_rtx_MEM (mode, addr);
2331 157133516 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2332 157133516 : return new_rtx;
2333 : }
2334 :
2335 : /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2336 : way we are changing MEMREF, so we only preserve the alias set. */
2337 :
2338 : rtx
2339 253513 : change_address (rtx memref, machine_mode mode, rtx addr)
2340 : {
2341 253513 : rtx new_rtx = change_address_1 (memref, mode, addr, 1, false);
2342 253513 : machine_mode mmode = GET_MODE (new_rtx);
2343 253513 : class mem_attrs *defattrs;
2344 :
2345 253513 : mem_attrs attrs (*get_mem_attrs (memref));
2346 253513 : defattrs = mode_mem_attrs[(int) mmode];
2347 253513 : attrs.expr = NULL_TREE;
2348 253513 : attrs.offset_known_p = false;
2349 253513 : attrs.size_known_p = defattrs->size_known_p;
2350 253513 : attrs.size = defattrs->size;
2351 253513 : attrs.align = defattrs->align;
2352 :
2353 : /* If there are no changes, just return the original memory reference. */
2354 253513 : if (new_rtx == memref)
2355 : {
2356 57114 : if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2357 : return new_rtx;
2358 :
2359 55994 : new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2360 55994 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2361 : }
2362 :
2363 252393 : set_mem_attrs (new_rtx, &attrs);
2364 252393 : return new_rtx;
2365 : }
2366 :
2367 : /* Return a memory reference like MEMREF, but with its mode changed
2368 : to MODE and its address offset by OFFSET bytes. If VALIDATE is
2369 : nonzero, the memory address is forced to be valid.
2370 : If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2371 : and the caller is responsible for adjusting MEMREF base register.
2372 : If ADJUST_OBJECT is zero, the underlying object associated with the
2373 : memory reference is left unchanged and the caller is responsible for
2374 : dealing with it. Otherwise, if the new memory reference is outside
2375 : the underlying object, even partially, then the object is dropped.
2376 : SIZE, if nonzero, is the size of an access in cases where MODE
2377 : has no inherent size. */
2378 :
2379 : rtx
2380 35860149 : adjust_address_1 (rtx memref, machine_mode mode, poly_int64 offset,
2381 : int validate, int adjust_address, int adjust_object,
2382 : poly_int64 size)
2383 : {
2384 35860149 : rtx addr = XEXP (memref, 0);
2385 35860149 : rtx new_rtx;
2386 35860149 : scalar_int_mode address_mode;
2387 35860149 : class mem_attrs attrs (*get_mem_attrs (memref)), *defattrs;
2388 35860149 : unsigned HOST_WIDE_INT max_align;
2389 : #ifdef POINTERS_EXTEND_UNSIGNED
2390 35860149 : scalar_int_mode pointer_mode
2391 35860149 : = targetm.addr_space.pointer_mode (attrs.addrspace);
2392 : #endif
2393 :
2394 : /* VOIDmode means no mode change for change_address_1. */
2395 35860149 : if (mode == VOIDmode)
2396 17436 : mode = GET_MODE (memref);
2397 :
2398 : /* Take the size of non-BLKmode accesses from the mode. */
2399 35860149 : defattrs = mode_mem_attrs[(int) mode];
2400 35860149 : if (defattrs->size_known_p)
2401 29546430 : size = defattrs->size;
2402 :
2403 : /* If there are no changes, just return the original memory reference. */
2404 35860149 : if (mode == GET_MODE (memref)
2405 15554888 : && known_eq (offset, 0)
2406 9213733 : && (known_eq (size, 0)
2407 3788254 : || (attrs.size_known_p && known_eq (attrs.size, size)))
2408 50013164 : && (!validate || memory_address_addr_space_p (mode, addr,
2409 4939930 : attrs.addrspace)))
2410 : return memref;
2411 :
2412 : /* ??? Prefer to create garbage instead of creating shared rtl.
2413 : This may happen even if offset is nonzero -- consider
2414 : (plus (plus reg reg) const_int) -- so do this always. */
2415 26647070 : addr = copy_rtx (addr);
2416 :
2417 : /* Convert a possibly large offset to a signed value within the
2418 : range of the target address space. */
2419 26647070 : address_mode = get_address_mode (memref);
2420 26647070 : offset = trunc_int_for_mode (offset, address_mode);
2421 :
2422 26647070 : if (adjust_address)
2423 : {
2424 : /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2425 : object, we can merge it into the LO_SUM. */
2426 26616316 : if (GET_MODE (memref) != BLKmode
2427 12146497 : && GET_CODE (addr) == LO_SUM
2428 26616316 : && known_in_range_p (offset,
2429 0 : 0, (GET_MODE_ALIGNMENT (GET_MODE (memref))
2430 0 : / BITS_PER_UNIT)))
2431 0 : addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2432 : plus_constant (address_mode,
2433 : XEXP (addr, 1), offset));
2434 : #ifdef POINTERS_EXTEND_UNSIGNED
2435 : /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2436 : in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2437 : the fact that pointers are not allowed to overflow. */
2438 26616316 : else if (POINTERS_EXTEND_UNSIGNED > 0
2439 26616316 : && GET_CODE (addr) == ZERO_EXTEND
2440 12 : && GET_MODE (XEXP (addr, 0)) == pointer_mode
2441 26616318 : && known_eq (trunc_int_for_mode (offset, pointer_mode), offset))
2442 2 : addr = gen_rtx_ZERO_EXTEND (address_mode,
2443 : plus_constant (pointer_mode,
2444 : XEXP (addr, 0), offset));
2445 : #endif
2446 : else
2447 26616314 : addr = plus_constant (address_mode, addr, offset);
2448 : }
2449 :
2450 26647070 : new_rtx = change_address_1 (memref, mode, addr, validate, false);
2451 :
2452 : /* If the address is a REG, change_address_1 rightfully returns memref,
2453 : but this would destroy memref's MEM_ATTRS. */
2454 26647070 : if (new_rtx == memref && maybe_ne (offset, 0))
2455 30709 : new_rtx = copy_rtx (new_rtx);
2456 :
2457 : /* Conservatively drop the object if we don't know where we start from. */
2458 26647070 : if (adjust_object && (!attrs.offset_known_p || !attrs.size_known_p))
2459 : {
2460 1661 : attrs.expr = NULL_TREE;
2461 1661 : attrs.alias = 0;
2462 : }
2463 :
2464 : /* Compute the new values of the memory attributes due to this adjustment.
2465 : We add the offsets and update the alignment. */
2466 26647070 : if (attrs.offset_known_p)
2467 : {
2468 22793912 : attrs.offset += offset;
2469 :
2470 : /* Drop the object if the new left end is not within its bounds. */
2471 22793912 : if (adjust_object && maybe_lt (attrs.offset, 0))
2472 : {
2473 25720 : attrs.expr = NULL_TREE;
2474 25720 : attrs.alias = 0;
2475 : }
2476 : }
2477 :
2478 : /* Compute the new alignment by taking the MIN of the alignment and the
2479 : lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2480 : if zero. */
2481 26647070 : if (maybe_ne (offset, 0))
2482 : {
2483 12207754 : max_align = known_alignment (offset) * BITS_PER_UNIT;
2484 12207754 : attrs.align = MIN (attrs.align, max_align);
2485 : }
2486 :
2487 26647070 : if (maybe_ne (size, 0))
2488 : {
2489 : /* Drop the object if the new right end is not within its bounds. */
2490 25919616 : if (adjust_object && maybe_gt (offset + size, attrs.size))
2491 : {
2492 64946 : attrs.expr = NULL_TREE;
2493 64946 : attrs.alias = 0;
2494 : }
2495 25919616 : attrs.size_known_p = true;
2496 25919616 : attrs.size = size;
2497 : }
2498 727454 : else if (attrs.size_known_p)
2499 : {
2500 720883 : gcc_assert (!adjust_object);
2501 26647070 : attrs.size -= offset;
2502 : /* ??? The store_by_pieces machinery generates negative sizes,
2503 : so don't assert for that here. */
2504 : }
2505 :
2506 26647070 : set_mem_attrs (new_rtx, &attrs);
2507 :
2508 26647070 : return new_rtx;
2509 : }
2510 :
2511 : /* Return a memory reference like MEMREF, but with its mode changed
2512 : to MODE and its address changed to ADDR, which is assumed to be
2513 : MEMREF offset by OFFSET bytes. If VALIDATE is
2514 : nonzero, the memory address is forced to be valid. */
2515 :
2516 : rtx
2517 60441 : adjust_automodify_address_1 (rtx memref, machine_mode mode, rtx addr,
2518 : poly_int64 offset, int validate)
2519 : {
2520 60441 : memref = change_address_1 (memref, VOIDmode, addr, validate, false);
2521 60441 : return adjust_address_1 (memref, mode, offset, validate, 0, 0, 0);
2522 : }
2523 :
2524 : /* Return a memory reference like MEMREF, but whose address is changed by
2525 : adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2526 : known to be in OFFSET (possibly 1). */
2527 :
2528 : rtx
2529 766345 : offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2530 : {
2531 766345 : rtx new_rtx, addr = XEXP (memref, 0);
2532 766345 : machine_mode address_mode;
2533 766345 : class mem_attrs *defattrs;
2534 :
2535 766345 : mem_attrs attrs (*get_mem_attrs (memref));
2536 766345 : address_mode = get_address_mode (memref);
2537 766345 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2538 :
2539 : /* At this point we don't know _why_ the address is invalid. It
2540 : could have secondary memory references, multiplies or anything.
2541 :
2542 : However, if we did go and rearrange things, we can wind up not
2543 : being able to recognize the magic around pic_offset_table_rtx.
2544 : This stuff is fragile, and is yet another example of why it is
2545 : bad to expose PIC machinery too early. */
2546 1530954 : if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2547 766345 : attrs.addrspace)
2548 134770 : && GET_CODE (addr) == PLUS
2549 816781 : && XEXP (addr, 0) == pic_offset_table_rtx)
2550 : {
2551 1736 : addr = force_reg (GET_MODE (addr), addr);
2552 1736 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2553 : }
2554 :
2555 766345 : update_temp_slot_address (XEXP (memref, 0), new_rtx);
2556 766345 : new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1, false);
2557 :
2558 : /* If there are no changes, just return the original memory reference. */
2559 766345 : if (new_rtx == memref)
2560 : return new_rtx;
2561 :
2562 : /* Update the alignment to reflect the offset. Reset the offset, which
2563 : we don't know. */
2564 766345 : defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2565 766345 : attrs.offset_known_p = false;
2566 766345 : attrs.size_known_p = defattrs->size_known_p;
2567 766345 : attrs.size = defattrs->size;
2568 766345 : attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2569 766345 : set_mem_attrs (new_rtx, &attrs);
2570 766345 : return new_rtx;
2571 : }
2572 :
2573 : /* Return a memory reference like MEMREF, but with its address changed to
2574 : ADDR. The caller is asserting that the actual piece of memory pointed
2575 : to is the same, just the form of the address is being changed, such as
2576 : by putting something into a register. INPLACE is true if any changes
2577 : can be made directly to MEMREF or false if MEMREF must be treated as
2578 : immutable. */
2579 :
2580 : rtx
2581 12961629 : replace_equiv_address (rtx memref, rtx addr, bool inplace)
2582 : {
2583 : /* change_address_1 copies the memory attribute structure without change
2584 : and that's exactly what we want here. */
2585 12961629 : update_temp_slot_address (XEXP (memref, 0), addr);
2586 12961629 : return change_address_1 (memref, VOIDmode, addr, 1, inplace);
2587 : }
2588 :
2589 : /* Likewise, but the reference is not required to be valid. */
2590 :
2591 : rtx
2592 464907012 : replace_equiv_address_nv (rtx memref, rtx addr, bool inplace)
2593 : {
2594 464907012 : return change_address_1 (memref, VOIDmode, addr, 0, inplace);
2595 : }
2596 :
2597 :
2598 : /* Emit insns to reload VALUE into a new register. VALUE is an
2599 : auto-increment or auto-decrement RTX whose operand is a register or
2600 : memory location; so reloading involves incrementing that location.
2601 :
2602 : INC_AMOUNT is the number to increment or decrement by (always
2603 : positive and ignored for POST_MODIFY/PRE_MODIFY).
2604 :
2605 : Return a pseudo containing the result. */
2606 : rtx
2607 0 : address_reload_context::emit_autoinc (rtx value, poly_int64 inc_amount)
2608 : {
2609 : /* Since we're going to call recog, and might be called within recog,
2610 : we need to ensure we save and restore recog_data. */
2611 0 : recog_state_saver recog_save;
2612 :
2613 : /* REG or MEM to be copied and incremented. */
2614 0 : rtx incloc = XEXP (value, 0);
2615 :
2616 0 : const rtx_code code = GET_CODE (value);
2617 0 : const bool post_p
2618 0 : = code == POST_DEC || code == POST_INC || code == POST_MODIFY;
2619 :
2620 0 : bool plus_p = true;
2621 0 : rtx inc;
2622 0 : if (code == PRE_MODIFY || code == POST_MODIFY)
2623 : {
2624 0 : gcc_assert (GET_CODE (XEXP (value, 1)) == PLUS
2625 : || GET_CODE (XEXP (value, 1)) == MINUS);
2626 0 : gcc_assert (rtx_equal_p (XEXP (XEXP (value, 1), 0), XEXP (value, 0)));
2627 0 : plus_p = GET_CODE (XEXP (value, 1)) == PLUS;
2628 0 : inc = XEXP (XEXP (value, 1), 1);
2629 : }
2630 : else
2631 : {
2632 0 : if (code == PRE_DEC || code == POST_DEC)
2633 0 : inc_amount = -inc_amount;
2634 :
2635 0 : inc = gen_int_mode (inc_amount, GET_MODE (value));
2636 : }
2637 :
2638 0 : rtx result;
2639 0 : if (!post_p && REG_P (incloc))
2640 : result = incloc;
2641 : else
2642 : {
2643 0 : result = get_reload_reg ();
2644 : /* First copy the location to the result register. */
2645 0 : emit_insn (gen_move_insn (result, incloc));
2646 : }
2647 :
2648 : /* See if we can directly increment INCLOC. */
2649 0 : rtx_insn *last = get_last_insn ();
2650 0 : rtx_insn *add_insn = emit_insn (plus_p
2651 0 : ? gen_add2_insn (incloc, inc)
2652 0 : : gen_sub2_insn (incloc, inc));
2653 0 : const int icode = recog_memoized (add_insn);
2654 0 : if (icode >= 0)
2655 : {
2656 0 : if (!post_p && result != incloc)
2657 0 : emit_insn (gen_move_insn (result, incloc));
2658 : return result;
2659 : }
2660 0 : delete_insns_since (last);
2661 :
2662 : /* If couldn't do the increment directly, must increment in RESULT.
2663 : The way we do this depends on whether this is pre- or
2664 : post-increment. For pre-increment, copy INCLOC to the reload
2665 : register, increment it there, then save back. */
2666 0 : if (!post_p)
2667 : {
2668 0 : if (incloc != result)
2669 0 : emit_insn (gen_move_insn (result, incloc));
2670 0 : if (plus_p)
2671 0 : emit_insn (gen_add2_insn (result, inc));
2672 : else
2673 0 : emit_insn (gen_sub2_insn (result, inc));
2674 0 : if (incloc != result)
2675 0 : emit_insn (gen_move_insn (incloc, result));
2676 : }
2677 : else
2678 : {
2679 : /* Post-increment.
2680 :
2681 : Because this might be a jump insn or a compare, and because
2682 : RESULT may not be available after the insn in an input
2683 : reload, we must do the incrementing before the insn being
2684 : reloaded for.
2685 :
2686 : We have already copied INCLOC to RESULT. Increment the copy in
2687 : RESULT, save that back, then decrement RESULT so it has
2688 : the original value. */
2689 0 : if (plus_p)
2690 0 : emit_insn (gen_add2_insn (result, inc));
2691 : else
2692 0 : emit_insn (gen_sub2_insn (result, inc));
2693 0 : emit_insn (gen_move_insn (incloc, result));
2694 : /* Restore non-modified value for the result. We prefer this
2695 : way because it does not require an additional hard
2696 : register. */
2697 0 : if (plus_p)
2698 : {
2699 0 : poly_int64 offset;
2700 0 : if (poly_int_rtx_p (inc, &offset))
2701 0 : emit_insn (gen_add2_insn (result,
2702 : gen_int_mode (-offset,
2703 0 : GET_MODE (result))));
2704 : else
2705 0 : emit_insn (gen_sub2_insn (result, inc));
2706 : }
2707 : else
2708 0 : emit_insn (gen_add2_insn (result, inc));
2709 : }
2710 : return result;
2711 0 : }
2712 :
2713 : /* Return a memory reference like MEM, but with the address reloaded into a
2714 : pseudo register. */
2715 :
2716 : rtx
2717 0 : force_reload_address (rtx mem)
2718 : {
2719 0 : rtx addr = XEXP (mem, 0);
2720 0 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
2721 : {
2722 0 : const auto size = GET_MODE_SIZE (GET_MODE (mem));
2723 0 : addr = address_reload_context ().emit_autoinc (addr, size);
2724 : }
2725 : else
2726 0 : addr = force_reg (Pmode, addr);
2727 :
2728 0 : return replace_equiv_address (mem, addr);
2729 : }
2730 :
2731 : /* Return a memory reference like MEMREF, but with its mode widened to
2732 : MODE and offset by OFFSET. This would be used by targets that e.g.
2733 : cannot issue QImode memory operations and have to use SImode memory
2734 : operations plus masking logic. */
2735 :
2736 : rtx
2737 0 : widen_memory_access (rtx memref, machine_mode mode, poly_int64 offset)
2738 : {
2739 0 : rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1, 0, 0);
2740 0 : poly_uint64 size = GET_MODE_SIZE (mode);
2741 :
2742 : /* If there are no changes, just return the original memory reference. */
2743 0 : if (new_rtx == memref)
2744 : return new_rtx;
2745 :
2746 0 : mem_attrs attrs (*get_mem_attrs (new_rtx));
2747 :
2748 : /* If we don't know what offset we were at within the expression, then
2749 : we can't know if we've overstepped the bounds. */
2750 0 : if (! attrs.offset_known_p)
2751 0 : attrs.expr = NULL_TREE;
2752 :
2753 0 : while (attrs.expr)
2754 : {
2755 0 : if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2756 : {
2757 0 : tree field = TREE_OPERAND (attrs.expr, 1);
2758 0 : tree offset = component_ref_field_offset (attrs.expr);
2759 :
2760 0 : if (! DECL_SIZE_UNIT (field))
2761 : {
2762 0 : attrs.expr = NULL_TREE;
2763 0 : break;
2764 : }
2765 :
2766 : /* Is the field at least as large as the access? If so, ok,
2767 : otherwise strip back to the containing structure. */
2768 0 : if (poly_int_tree_p (DECL_SIZE_UNIT (field))
2769 0 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (field)), size)
2770 0 : && known_ge (attrs.offset, 0))
2771 : break;
2772 :
2773 0 : poly_uint64 suboffset;
2774 0 : if (!poly_int_tree_p (offset, &suboffset))
2775 : {
2776 0 : attrs.expr = NULL_TREE;
2777 0 : break;
2778 : }
2779 :
2780 0 : attrs.expr = TREE_OPERAND (attrs.expr, 0);
2781 0 : attrs.offset += suboffset;
2782 0 : attrs.offset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
2783 0 : / BITS_PER_UNIT);
2784 : }
2785 : /* Similarly for the decl. */
2786 0 : else if (DECL_P (attrs.expr)
2787 0 : && DECL_SIZE_UNIT (attrs.expr)
2788 0 : && poly_int_tree_p (DECL_SIZE_UNIT (attrs.expr))
2789 0 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (attrs.expr)),
2790 : size)
2791 0 : && known_ge (attrs.offset, 0))
2792 : break;
2793 : else
2794 : {
2795 : /* The widened memory access overflows the expression, which means
2796 : that it could alias another expression. Zap it. */
2797 0 : attrs.expr = NULL_TREE;
2798 0 : break;
2799 : }
2800 : }
2801 :
2802 0 : if (! attrs.expr)
2803 0 : attrs.offset_known_p = false;
2804 :
2805 : /* The widened memory may alias other stuff, so zap the alias set. */
2806 : /* ??? Maybe use get_alias_set on any remaining expression. */
2807 0 : attrs.alias = 0;
2808 0 : attrs.size_known_p = true;
2809 0 : attrs.size = size;
2810 0 : set_mem_attrs (new_rtx, &attrs);
2811 0 : return new_rtx;
2812 : }
2813 :
2814 : /* A fake decl that is used as the MEM_EXPR of spill slots. */
2815 : static GTY(()) tree spill_slot_decl;
2816 :
2817 : tree
2818 827915487 : get_spill_slot_decl (bool force_build_p)
2819 : {
2820 827915487 : tree d = spill_slot_decl;
2821 827915487 : rtx rd;
2822 :
2823 827915487 : if (d || !force_build_p)
2824 : return d;
2825 :
2826 31051 : d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2827 : VAR_DECL, get_identifier ("%sfp"), void_type_node);
2828 31051 : DECL_ARTIFICIAL (d) = 1;
2829 31051 : DECL_IGNORED_P (d) = 1;
2830 31051 : TREE_USED (d) = 1;
2831 31051 : spill_slot_decl = d;
2832 :
2833 31051 : rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2834 31051 : MEM_NOTRAP_P (rd) = 1;
2835 31051 : mem_attrs attrs (*mode_mem_attrs[(int) BLKmode]);
2836 31051 : attrs.alias = new_alias_set ();
2837 31051 : attrs.expr = d;
2838 31051 : set_mem_attrs (rd, &attrs);
2839 31051 : SET_DECL_RTL (d, rd);
2840 :
2841 31051 : return d;
2842 : }
2843 :
2844 : /* Given MEM, a result from assign_stack_local, fill in the memory
2845 : attributes as appropriate for a register allocator spill slot.
2846 : These slots are not aliasable by other memory. We arrange for
2847 : them all to use a single MEM_EXPR, so that the aliasing code can
2848 : work properly in the case of shared spill slots. */
2849 :
2850 : void
2851 1460993 : set_mem_attrs_for_spill (rtx mem)
2852 : {
2853 1460993 : rtx addr;
2854 :
2855 1460993 : mem_attrs attrs (*get_mem_attrs (mem));
2856 1460993 : attrs.expr = get_spill_slot_decl (true);
2857 1460993 : attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2858 1460993 : attrs.addrspace = ADDR_SPACE_GENERIC;
2859 :
2860 : /* We expect the incoming memory to be of the form:
2861 : (mem:MODE (plus (reg sfp) (const_int offset)))
2862 : with perhaps the plus missing for offset = 0. */
2863 1460993 : addr = XEXP (mem, 0);
2864 1460993 : attrs.offset_known_p = true;
2865 1460993 : strip_offset (addr, &attrs.offset);
2866 :
2867 1460993 : set_mem_attrs (mem, &attrs);
2868 1460993 : MEM_NOTRAP_P (mem) = 1;
2869 1460993 : }
2870 :
2871 : /* Return a newly created CODE_LABEL rtx with a unique label number. */
2872 :
2873 : rtx_code_label *
2874 15601798 : gen_label_rtx (void)
2875 : {
2876 15601798 : return as_a <rtx_code_label *> (
2877 : gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
2878 15601798 : NULL, label_num++, NULL));
2879 : }
2880 :
2881 : /* For procedure integration. */
2882 :
2883 : /* Install new pointers to the first and last insns in the chain.
2884 : Also, set cur_insn_uid to one higher than the last in use.
2885 : Used for an inline-procedure after copying the insn chain. */
2886 :
2887 : void
2888 8 : set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
2889 : {
2890 8 : rtx_insn *insn;
2891 :
2892 8 : set_first_insn (first);
2893 8 : set_last_insn (last);
2894 8 : cur_insn_uid = 0;
2895 :
2896 8 : if (param_min_nondebug_insn_uid || MAY_HAVE_DEBUG_INSNS)
2897 : {
2898 0 : int debug_count = 0;
2899 :
2900 0 : cur_insn_uid = param_min_nondebug_insn_uid - 1;
2901 0 : cur_debug_insn_uid = 0;
2902 :
2903 0 : for (insn = first; insn; insn = NEXT_INSN (insn))
2904 0 : if (INSN_UID (insn) < param_min_nondebug_insn_uid)
2905 0 : cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2906 : else
2907 : {
2908 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2909 0 : if (DEBUG_INSN_P (insn))
2910 0 : debug_count++;
2911 : }
2912 :
2913 0 : if (debug_count)
2914 0 : cur_debug_insn_uid = param_min_nondebug_insn_uid + debug_count;
2915 : else
2916 0 : cur_debug_insn_uid++;
2917 : }
2918 : else
2919 8 : for (insn = first; insn; insn = NEXT_INSN (insn))
2920 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2921 :
2922 8 : cur_insn_uid++;
2923 8 : }
2924 :
2925 : /* Go through all the RTL insn bodies and copy any invalid shared
2926 : structure. This routine should only be called once. */
2927 :
2928 : static void
2929 3023547 : unshare_all_rtl_1 (rtx_insn *insn)
2930 : {
2931 : /* Unshare just about everything else. */
2932 3023547 : unshare_all_rtl_in_chain (insn);
2933 :
2934 : /* Make sure the addresses of stack slots found outside the insn chain
2935 : (such as, in DECL_RTL of a variable) are not shared
2936 : with the insn chain.
2937 :
2938 : This special care is necessary when the stack slot MEM does not
2939 : actually appear in the insn chain. If it does appear, its address
2940 : is unshared from all else at that point. */
2941 3023547 : unsigned int i;
2942 3023547 : rtx temp;
2943 9338406 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2944 3291312 : (*stack_slot_list)[i] = copy_rtx_if_shared (temp);
2945 3023547 : }
2946 :
2947 : /* Go through all the RTL insn bodies and copy any invalid shared
2948 : structure, again. This is a fairly expensive thing to do so it
2949 : should be done sparingly. */
2950 :
2951 : void
2952 1511384 : unshare_all_rtl_again (rtx_insn *insn)
2953 : {
2954 1511384 : rtx_insn *p;
2955 1511384 : tree decl;
2956 :
2957 174819279 : for (p = insn; p; p = NEXT_INSN (p))
2958 173307895 : if (INSN_P (p))
2959 : {
2960 137558728 : reset_used_flags (PATTERN (p));
2961 137558728 : reset_used_flags (REG_NOTES (p));
2962 137558728 : if (CALL_P (p))
2963 6133242 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2964 : }
2965 :
2966 : /* Make sure that virtual stack slots are not shared. */
2967 1511384 : set_used_decls (DECL_INITIAL (cfun->decl));
2968 :
2969 : /* Make sure that virtual parameters are not shared. */
2970 4673003 : for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2971 3161619 : set_used_flags (DECL_RTL (decl));
2972 :
2973 : rtx temp;
2974 : unsigned int i;
2975 3952499 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2976 2441115 : reset_used_flags (temp);
2977 :
2978 1511384 : unshare_all_rtl_1 (insn);
2979 1511384 : }
2980 :
2981 : void
2982 1512163 : unshare_all_rtl (void)
2983 : {
2984 1512163 : unshare_all_rtl_1 (get_insns ());
2985 :
2986 4674339 : for (tree decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2987 : {
2988 3162176 : if (DECL_RTL_SET_P (decl))
2989 3162176 : SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2990 3162176 : DECL_INCOMING_RTL (decl) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl));
2991 : }
2992 1512163 : }
2993 :
2994 :
2995 : /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2996 : Recursively does the same for subexpressions. */
2997 :
2998 : static void
2999 57633506454 : verify_rtx_sharing (rtx orig, rtx insn)
3000 : {
3001 57633506454 : rtx x = orig;
3002 57633506454 : int i;
3003 57633506454 : enum rtx_code code;
3004 57633506454 : const char *format_ptr;
3005 :
3006 57633506454 : if (x == 0)
3007 : return;
3008 :
3009 47717475437 : code = GET_CODE (x);
3010 :
3011 : /* These types may be freely shared. */
3012 :
3013 47717475437 : switch (code)
3014 : {
3015 : case REG:
3016 : case DEBUG_EXPR:
3017 : case VALUE:
3018 : CASE_CONST_ANY:
3019 : case SYMBOL_REF:
3020 : case LABEL_REF:
3021 : case CODE_LABEL:
3022 : case PC:
3023 : case RETURN:
3024 : case SIMPLE_RETURN:
3025 : case SCRATCH:
3026 : /* SCRATCH must be shared because they represent distinct values. */
3027 : return;
3028 2066317764 : case CLOBBER:
3029 : /* Share clobbers of hard registers, but do not share pseudo reg
3030 : clobbers or clobbers of hard registers that originated as pseudos.
3031 : This is needed to allow safe register renaming. */
3032 2066317764 : if (REG_P (XEXP (x, 0))
3033 735503483 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3034 2798699559 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3035 : return;
3036 : break;
3037 :
3038 36411028 : case CONST:
3039 36411028 : if (shared_const_p (orig))
3040 : return;
3041 : break;
3042 :
3043 2806918691 : case MEM:
3044 : /* A MEM is allowed to be shared if its address is constant. */
3045 2806918691 : if (CONSTANT_ADDRESS_P (XEXP (x, 0))
3046 2806918691 : || reload_completed || reload_in_progress)
3047 : return;
3048 :
3049 : break;
3050 :
3051 : default:
3052 : break;
3053 : }
3054 :
3055 : /* This rtx may not be shared. If it has already been seen,
3056 : replace it with a copy of itself. */
3057 23190118576 : if (flag_checking && RTX_FLAG (x, used))
3058 : {
3059 0 : error ("invalid rtl sharing found in the insn");
3060 0 : debug_rtx (insn);
3061 0 : error ("shared rtx");
3062 0 : debug_rtx (x);
3063 0 : internal_error ("internal consistency failure");
3064 : }
3065 23190118576 : gcc_assert (!RTX_FLAG (x, used));
3066 :
3067 23190118576 : RTX_FLAG (x, used) = 1;
3068 :
3069 : /* Now scan the subexpressions recursively. */
3070 :
3071 23190118576 : format_ptr = GET_RTX_FORMAT (code);
3072 :
3073 65041549600 : for (i = 0; i < GET_RTX_LENGTH (code); i++)
3074 : {
3075 41851431024 : switch (*format_ptr++)
3076 : {
3077 36463260347 : case 'e':
3078 36463260347 : verify_rtx_sharing (XEXP (x, i), insn);
3079 36463260347 : break;
3080 :
3081 917380528 : case 'E':
3082 917380528 : if (XVEC (x, i) != NULL)
3083 : {
3084 917380528 : int j;
3085 917380528 : int len = XVECLEN (x, i);
3086 :
3087 2775824698 : for (j = 0; j < len; j++)
3088 : {
3089 : /* We allow sharing of ASM_OPERANDS inside single
3090 : instruction. */
3091 1858444170 : if (j && GET_CODE (XVECEXP (x, i, j)) == SET
3092 56618016 : && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
3093 : == ASM_OPERANDS))
3094 3233814 : verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
3095 : else
3096 1855210356 : verify_rtx_sharing (XVECEXP (x, i, j), insn);
3097 : }
3098 : }
3099 : break;
3100 : }
3101 : }
3102 : }
3103 :
3104 : /* Reset used-flags for INSN. */
3105 :
3106 : static void
3107 18891831328 : reset_insn_used_flags (rtx insn)
3108 : {
3109 18891831328 : gcc_assert (INSN_P (insn));
3110 18891831328 : reset_used_flags (PATTERN (insn));
3111 18891831328 : reset_used_flags (REG_NOTES (insn));
3112 18891831328 : if (CALL_P (insn))
3113 839941218 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn));
3114 18891831328 : }
3115 :
3116 : /* Go through all the RTL insn bodies and clear all the USED bits. */
3117 :
3118 : static void
3119 192248520 : reset_all_used_flags (void)
3120 : {
3121 192248520 : rtx_insn *p;
3122 :
3123 25529350296 : for (p = get_insns (); p; p = NEXT_INSN (p))
3124 25337101776 : if (INSN_P (p))
3125 : {
3126 18891831328 : rtx pat = PATTERN (p);
3127 18891831328 : if (GET_CODE (pat) != SEQUENCE)
3128 18891831328 : reset_insn_used_flags (p);
3129 : else
3130 : {
3131 0 : gcc_assert (REG_NOTES (p) == NULL);
3132 0 : for (int i = 0; i < XVECLEN (pat, 0); i++)
3133 : {
3134 0 : rtx insn = XVECEXP (pat, 0, i);
3135 0 : if (INSN_P (insn))
3136 0 : reset_insn_used_flags (insn);
3137 : }
3138 : }
3139 : }
3140 192248520 : }
3141 :
3142 : /* Verify sharing in INSN. */
3143 :
3144 : static void
3145 9445915664 : verify_insn_sharing (rtx insn)
3146 : {
3147 9445915664 : gcc_assert (INSN_P (insn));
3148 9445915664 : verify_rtx_sharing (PATTERN (insn), insn);
3149 9445915664 : verify_rtx_sharing (REG_NOTES (insn), insn);
3150 9445915664 : if (CALL_P (insn))
3151 419970609 : verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn), insn);
3152 9445915664 : }
3153 :
3154 : /* Go through all the RTL insn bodies and check that there is no unexpected
3155 : sharing in between the subexpressions. */
3156 :
3157 : DEBUG_FUNCTION void
3158 96124260 : verify_rtl_sharing (void)
3159 : {
3160 96124260 : rtx_insn *p;
3161 :
3162 96124260 : timevar_push (TV_VERIFY_RTL_SHARING);
3163 :
3164 96124260 : reset_all_used_flags ();
3165 :
3166 12764675148 : for (p = get_insns (); p; p = NEXT_INSN (p))
3167 12668550888 : if (INSN_P (p))
3168 : {
3169 9445915664 : rtx pat = PATTERN (p);
3170 9445915664 : if (GET_CODE (pat) != SEQUENCE)
3171 9445915664 : verify_insn_sharing (p);
3172 : else
3173 0 : for (int i = 0; i < XVECLEN (pat, 0); i++)
3174 : {
3175 0 : rtx insn = XVECEXP (pat, 0, i);
3176 0 : if (INSN_P (insn))
3177 0 : verify_insn_sharing (insn);
3178 : }
3179 : }
3180 :
3181 96124260 : reset_all_used_flags ();
3182 :
3183 96124260 : timevar_pop (TV_VERIFY_RTL_SHARING);
3184 96124260 : }
3185 :
3186 : /* Go through all the RTL insn bodies and copy any invalid shared structure.
3187 : Assumes the mark bits are cleared at entry. */
3188 :
3189 : void
3190 9583941 : unshare_all_rtl_in_chain (rtx_insn *insn)
3191 : {
3192 372609820 : for (; insn; insn = NEXT_INSN (insn))
3193 363025879 : if (INSN_P (insn))
3194 : {
3195 297543651 : PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
3196 297543651 : REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
3197 297543651 : if (CALL_P (insn))
3198 12258745 : CALL_INSN_FUNCTION_USAGE (insn)
3199 12258745 : = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
3200 : }
3201 9583941 : }
3202 :
3203 : /* Go through all virtual stack slots of a function and mark them as
3204 : shared. We never replace the DECL_RTLs themselves with a copy,
3205 : but expressions mentioned into a DECL_RTL cannot be shared with
3206 : expressions in the instruction stream.
3207 :
3208 : Note that reload may convert pseudo registers into memories in-place.
3209 : Pseudo registers are always shared, but MEMs never are. Thus if we
3210 : reset the used flags on MEMs in the instruction stream, we must set
3211 : them again on MEMs that appear in DECL_RTLs. */
3212 :
3213 : static void
3214 17348785 : set_used_decls (tree blk)
3215 : {
3216 17348785 : tree t;
3217 :
3218 : /* Mark decls. */
3219 37843176 : for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
3220 20494391 : if (DECL_RTL_SET_P (t))
3221 2322959 : set_used_flags (DECL_RTL (t));
3222 :
3223 : /* Now process sub-blocks. */
3224 33186186 : for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
3225 15837401 : set_used_decls (t);
3226 17348785 : }
3227 :
3228 : /* Mark ORIG as in use, and return a copy of it if it was already in use.
3229 : Recursively does the same for subexpressions. Uses
3230 : copy_rtx_if_shared_1 to reduce stack space. */
3231 :
3232 : rtx
3233 644854367 : copy_rtx_if_shared (rtx orig)
3234 : {
3235 644854367 : copy_rtx_if_shared_1 (&orig);
3236 644854367 : return orig;
3237 : }
3238 :
3239 : /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
3240 : use. Recursively does the same for subexpressions. */
3241 :
3242 : static void
3243 1121554243 : copy_rtx_if_shared_1 (rtx *orig1)
3244 : {
3245 1121554243 : rtx x;
3246 1121554243 : int i;
3247 1121554243 : enum rtx_code code;
3248 1121554243 : rtx *last_ptr;
3249 1121554243 : const char *format_ptr;
3250 1121554243 : int copied = 0;
3251 1852795547 : int length;
3252 :
3253 : /* Repeat is used to turn tail-recursion into iteration. */
3254 1852795547 : repeat:
3255 1852795547 : x = *orig1;
3256 :
3257 1852795547 : if (x == 0)
3258 : return;
3259 :
3260 1522262387 : code = GET_CODE (x);
3261 :
3262 : /* These types may be freely shared. */
3263 :
3264 1522262387 : switch (code)
3265 : {
3266 : case REG:
3267 : case DEBUG_EXPR:
3268 : case VALUE:
3269 : CASE_CONST_ANY:
3270 : case SYMBOL_REF:
3271 : case LABEL_REF:
3272 : case CODE_LABEL:
3273 : case PC:
3274 : case RETURN:
3275 : case SIMPLE_RETURN:
3276 : case SCRATCH:
3277 : /* SCRATCH must be shared because they represent distinct values. */
3278 : return;
3279 63666826 : case CLOBBER:
3280 : /* Share clobbers of hard registers, but do not share pseudo reg
3281 : clobbers or clobbers of hard registers that originated as pseudos.
3282 : This is needed to allow safe register renaming. */
3283 63666826 : if (REG_P (XEXP (x, 0))
3284 26273655 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3285 89762117 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3286 : return;
3287 : break;
3288 :
3289 5677276 : case CONST:
3290 5677276 : if (shared_const_p (x))
3291 : return;
3292 : break;
3293 :
3294 : case DEBUG_INSN:
3295 : case INSN:
3296 : case JUMP_INSN:
3297 : case CALL_INSN:
3298 : case NOTE:
3299 : case BARRIER:
3300 : /* The chain of insns is not being copied. */
3301 : return;
3302 :
3303 : default:
3304 : break;
3305 : }
3306 :
3307 : /* This rtx may not be shared. If it has already been seen,
3308 : replace it with a copy of itself. */
3309 :
3310 759099691 : if (RTX_FLAG (x, used))
3311 : {
3312 4947025 : x = shallow_copy_rtx (x);
3313 4947025 : copied = 1;
3314 : }
3315 759099691 : RTX_FLAG (x, used) = 1;
3316 :
3317 : /* Now scan the subexpressions recursively.
3318 : We can store any replaced subexpressions directly into X
3319 : since we know X is not shared! Any vectors in X
3320 : must be copied if X was copied. */
3321 :
3322 759099691 : format_ptr = GET_RTX_FORMAT (code);
3323 759099691 : length = GET_RTX_LENGTH (code);
3324 759099691 : last_ptr = NULL;
3325 :
3326 2138530380 : for (i = 0; i < length; i++)
3327 : {
3328 1379430689 : switch (*format_ptr++)
3329 : {
3330 1144857096 : case 'e':
3331 1144857096 : if (last_ptr)
3332 445030287 : copy_rtx_if_shared_1 (last_ptr);
3333 1144857096 : last_ptr = &XEXP (x, i);
3334 1144857096 : break;
3335 :
3336 32074480 : case 'E':
3337 32074480 : if (XVEC (x, i) != NULL)
3338 : {
3339 32074480 : int j;
3340 32074480 : int len = XVECLEN (x, i);
3341 :
3342 : /* Copy the vector iff I copied the rtx and the length
3343 : is nonzero. */
3344 32074480 : if (copied && len > 0)
3345 1378 : XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
3346 :
3347 : /* Call recursively on all inside the vector. */
3348 95158564 : for (j = 0; j < len; j++)
3349 : {
3350 63084084 : if (last_ptr)
3351 31669589 : copy_rtx_if_shared_1 (last_ptr);
3352 63084084 : last_ptr = &XVECEXP (x, i, j);
3353 : }
3354 : }
3355 : break;
3356 : }
3357 : }
3358 759099691 : *orig1 = x;
3359 759099691 : if (last_ptr)
3360 : {
3361 731241304 : orig1 = last_ptr;
3362 731241304 : goto repeat;
3363 : }
3364 : }
3365 :
3366 : /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3367 :
3368 : static void
3369 81144626543 : mark_used_flags (rtx x, int flag)
3370 : {
3371 >12623*10^7 : int i, j;
3372 >12623*10^7 : enum rtx_code code;
3373 >12623*10^7 : const char *format_ptr;
3374 >12623*10^7 : int length;
3375 :
3376 : /* Repeat is used to turn tail-recursion into iteration. */
3377 >12623*10^7 : repeat:
3378 >12623*10^7 : if (x == 0)
3379 : return;
3380 :
3381 >10623*10^7 : code = GET_CODE (x);
3382 :
3383 : /* These types may be freely shared so we needn't do any resetting
3384 : for them. */
3385 :
3386 >10623*10^7 : switch (code)
3387 : {
3388 : case REG:
3389 : case DEBUG_EXPR:
3390 : case VALUE:
3391 : CASE_CONST_ANY:
3392 : case SYMBOL_REF:
3393 : case CODE_LABEL:
3394 : case PC:
3395 : case RETURN:
3396 : case SIMPLE_RETURN:
3397 : return;
3398 :
3399 : case DEBUG_INSN:
3400 : case INSN:
3401 : case JUMP_INSN:
3402 : case CALL_INSN:
3403 : case NOTE:
3404 : case LABEL_REF:
3405 : case BARRIER:
3406 : /* The chain of insns is not being copied. */
3407 : return;
3408 :
3409 54916027025 : default:
3410 54916027025 : break;
3411 : }
3412 :
3413 54916027025 : RTX_FLAG (x, used) = flag;
3414 :
3415 54916027025 : format_ptr = GET_RTX_FORMAT (code);
3416 54916027025 : length = GET_RTX_LENGTH (code);
3417 :
3418 >10823*10^7 : for (i = 0; i < length; i++)
3419 : {
3420 98404096964 : switch (*format_ptr++)
3421 : {
3422 83502768623 : case 'e':
3423 83502768623 : if (i == length-1)
3424 : {
3425 45088202120 : x = XEXP (x, i);
3426 45088202120 : goto repeat;
3427 : }
3428 38414566503 : mark_used_flags (XEXP (x, i), flag);
3429 38414566503 : break;
3430 :
3431 : case 'E':
3432 5683584678 : for (j = 0; j < XVECLEN (x, i); j++)
3433 3790425430 : mark_used_flags (XVECEXP (x, i, j), flag);
3434 : break;
3435 : }
3436 : }
3437 : }
3438 :
3439 : /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3440 : to look for shared sub-parts. */
3441 :
3442 : void
3443 38932147227 : reset_used_flags (rtx x)
3444 : {
3445 38932147227 : mark_used_flags (x, 0);
3446 38932147227 : }
3447 :
3448 : /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3449 : to look for shared sub-parts. */
3450 :
3451 : void
3452 7487383 : set_used_flags (rtx x)
3453 : {
3454 7487383 : mark_used_flags (x, 1);
3455 7487383 : }
3456 :
3457 : /* Copy X if necessary so that it won't be altered by changes in OTHER.
3458 : Return X or the rtx for the pseudo reg the value of X was copied into.
3459 : OTHER must be valid as a SET_DEST. */
3460 :
3461 : rtx
3462 0 : make_safe_from (rtx x, rtx other)
3463 : {
3464 0 : while (1)
3465 0 : switch (GET_CODE (other))
3466 : {
3467 0 : case SUBREG:
3468 0 : other = SUBREG_REG (other);
3469 0 : break;
3470 0 : case STRICT_LOW_PART:
3471 0 : case SIGN_EXTEND:
3472 0 : case ZERO_EXTEND:
3473 0 : other = XEXP (other, 0);
3474 0 : break;
3475 0 : default:
3476 0 : goto done;
3477 : }
3478 0 : done:
3479 0 : if ((MEM_P (other)
3480 0 : && ! CONSTANT_P (x)
3481 0 : && !REG_P (x)
3482 0 : && GET_CODE (x) != SUBREG)
3483 0 : || (REG_P (other)
3484 0 : && (REGNO (other) < FIRST_PSEUDO_REGISTER
3485 0 : || reg_mentioned_p (other, x))))
3486 : {
3487 0 : rtx temp = gen_reg_rtx (GET_MODE (x));
3488 0 : emit_move_insn (temp, x);
3489 0 : return temp;
3490 : }
3491 : return x;
3492 : }
3493 :
3494 : /* Emission of insns (adding them to the doubly-linked list). */
3495 :
3496 : /* Return the last insn emitted, even if it is in a sequence now pushed. */
3497 :
3498 : rtx_insn *
3499 0 : get_last_insn_anywhere (void)
3500 : {
3501 0 : struct sequence_stack *seq;
3502 0 : for (seq = get_current_sequence (); seq; seq = seq->next)
3503 0 : if (seq->last != 0)
3504 : return seq->last;
3505 : return 0;
3506 : }
3507 :
3508 : /* Return the first nonnote insn emitted in current sequence or current
3509 : function. This routine looks inside SEQUENCEs. */
3510 :
3511 : rtx_insn *
3512 0 : get_first_nonnote_insn (void)
3513 : {
3514 0 : rtx_insn *insn = get_insns ();
3515 :
3516 0 : if (insn)
3517 : {
3518 0 : if (NOTE_P (insn))
3519 0 : for (insn = next_insn (insn);
3520 0 : insn && NOTE_P (insn);
3521 0 : insn = next_insn (insn))
3522 0 : continue;
3523 : else
3524 : {
3525 0 : if (NONJUMP_INSN_P (insn)
3526 0 : && GET_CODE (PATTERN (insn)) == SEQUENCE)
3527 0 : insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3528 : }
3529 : }
3530 :
3531 0 : return insn;
3532 : }
3533 :
3534 : /* Return the last nonnote insn emitted in current sequence or current
3535 : function. This routine looks inside SEQUENCEs. */
3536 :
3537 : rtx_insn *
3538 0 : get_last_nonnote_insn (void)
3539 : {
3540 0 : rtx_insn *insn = get_last_insn ();
3541 :
3542 0 : if (insn)
3543 : {
3544 0 : if (NOTE_P (insn))
3545 0 : for (insn = previous_insn (insn);
3546 0 : insn && NOTE_P (insn);
3547 0 : insn = previous_insn (insn))
3548 0 : continue;
3549 : else
3550 : {
3551 0 : if (NONJUMP_INSN_P (insn))
3552 0 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3553 0 : insn = seq->insn (seq->len () - 1);
3554 : }
3555 : }
3556 :
3557 0 : return insn;
3558 : }
3559 :
3560 : /* Return the number of actual (non-debug) insns emitted in this
3561 : function. */
3562 :
3563 : int
3564 3564937 : get_max_insn_count (void)
3565 : {
3566 3564937 : int n = cur_insn_uid;
3567 :
3568 : /* The table size must be stable across -g, to avoid codegen
3569 : differences due to debug insns, and not be affected by
3570 : -fmin-insn-uid, to avoid excessive table size and to simplify
3571 : debugging of -fcompare-debug failures. */
3572 3564937 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
3573 3564937 : n -= cur_debug_insn_uid;
3574 : else
3575 0 : n -= param_min_nondebug_insn_uid;
3576 :
3577 3564937 : return n;
3578 : }
3579 :
3580 :
3581 : /* Return the next insn. If it is a SEQUENCE, return the first insn
3582 : of the sequence. */
3583 :
3584 : rtx_insn *
3585 132756466 : next_insn (rtx_insn *insn)
3586 : {
3587 132756466 : if (insn)
3588 : {
3589 132756466 : insn = NEXT_INSN (insn);
3590 132444721 : if (insn && NONJUMP_INSN_P (insn)
3591 147142055 : && GET_CODE (PATTERN (insn)) == SEQUENCE)
3592 0 : insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3593 : }
3594 :
3595 132756466 : return insn;
3596 : }
3597 :
3598 : /* Return the previous insn. If it is a SEQUENCE, return the last insn
3599 : of the sequence. */
3600 :
3601 : rtx_insn *
3602 71895 : previous_insn (rtx_insn *insn)
3603 : {
3604 71895 : if (insn)
3605 : {
3606 71895 : insn = PREV_INSN (insn);
3607 71895 : if (insn && NONJUMP_INSN_P (insn))
3608 8640 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3609 0 : insn = seq->insn (seq->len () - 1);
3610 : }
3611 :
3612 71895 : return insn;
3613 : }
3614 :
3615 : /* Return the next insn after INSN that is not a NOTE. This routine does not
3616 : look inside SEQUENCEs. */
3617 :
3618 : rtx_insn *
3619 553233 : next_nonnote_insn (rtx_insn *insn)
3620 : {
3621 576740 : while (insn)
3622 : {
3623 576740 : insn = NEXT_INSN (insn);
3624 576740 : if (insn == 0 || !NOTE_P (insn))
3625 : break;
3626 : }
3627 :
3628 553233 : return insn;
3629 : }
3630 :
3631 : /* Return the next insn after INSN that is not a DEBUG_INSN. This
3632 : routine does not look inside SEQUENCEs. */
3633 :
3634 : rtx_insn *
3635 6125674 : next_nondebug_insn (rtx_insn *insn)
3636 : {
3637 8527115 : while (insn)
3638 : {
3639 8527115 : insn = NEXT_INSN (insn);
3640 8527115 : if (insn == 0 || !DEBUG_INSN_P (insn))
3641 : break;
3642 : }
3643 :
3644 6125674 : return insn;
3645 : }
3646 :
3647 : /* Return the previous insn before INSN that is not a NOTE. This routine does
3648 : not look inside SEQUENCEs. */
3649 :
3650 : rtx_insn *
3651 95144487 : prev_nonnote_insn (rtx_insn *insn)
3652 : {
3653 100099910 : while (insn)
3654 : {
3655 100099910 : insn = PREV_INSN (insn);
3656 100099910 : if (insn == 0 || !NOTE_P (insn))
3657 : break;
3658 : }
3659 :
3660 95144487 : return insn;
3661 : }
3662 :
3663 : /* Return the previous insn before INSN that is not a DEBUG_INSN.
3664 : This routine does not look inside SEQUENCEs. */
3665 :
3666 : rtx_insn *
3667 2065226 : prev_nondebug_insn (rtx_insn *insn)
3668 : {
3669 4470582 : while (insn)
3670 : {
3671 4470582 : insn = PREV_INSN (insn);
3672 4470582 : if (insn == 0 || !DEBUG_INSN_P (insn))
3673 : break;
3674 : }
3675 :
3676 2065226 : return insn;
3677 : }
3678 :
3679 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3680 : This routine does not look inside SEQUENCEs. */
3681 :
3682 : rtx_insn *
3683 52354107 : next_nonnote_nondebug_insn (rtx_insn *insn)
3684 : {
3685 71491917 : while (insn)
3686 : {
3687 71491917 : insn = NEXT_INSN (insn);
3688 71491917 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3689 : break;
3690 : }
3691 :
3692 52354107 : return insn;
3693 : }
3694 :
3695 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN,
3696 : but stop the search before we enter another basic block. This
3697 : routine does not look inside SEQUENCEs.
3698 : NOTE: This can potentially bleed into next BB. If current insn is
3699 : last insn of BB, followed by a code_label before the start of
3700 : the next BB, code_label will be returned. But this is the
3701 : behavior rest of gcc assumes/relies on e.g. get_last_bb_insn. */
3702 :
3703 : rtx_insn *
3704 7525893 : next_nonnote_nondebug_insn_bb (rtx_insn *insn)
3705 : {
3706 7557561 : while (insn)
3707 : {
3708 7557561 : insn = NEXT_INSN (insn);
3709 7557561 : if (insn == 0)
3710 : break;
3711 7329551 : if (DEBUG_INSN_P (insn))
3712 0 : continue;
3713 7329551 : if (!NOTE_P (insn))
3714 : break;
3715 2156599 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3716 : return NULL;
3717 : }
3718 :
3719 : return insn;
3720 : }
3721 :
3722 : /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3723 : This routine does not look inside SEQUENCEs. */
3724 :
3725 : rtx_insn *
3726 123586077 : prev_nonnote_nondebug_insn (rtx_insn *insn)
3727 : {
3728 235912887 : while (insn)
3729 : {
3730 235912887 : insn = PREV_INSN (insn);
3731 235912887 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3732 : break;
3733 : }
3734 :
3735 123586077 : return insn;
3736 : }
3737 :
3738 : /* Return the previous insn before INSN that is not a NOTE nor
3739 : DEBUG_INSN, but stop the search before we enter another basic
3740 : block. This routine does not look inside SEQUENCEs. */
3741 :
3742 : rtx_insn *
3743 71083163 : prev_nonnote_nondebug_insn_bb (rtx_insn *insn)
3744 : {
3745 141478521 : while (insn)
3746 : {
3747 141478521 : insn = PREV_INSN (insn);
3748 141478521 : if (insn == 0)
3749 : break;
3750 141477872 : if (DEBUG_INSN_P (insn))
3751 60799864 : continue;
3752 80678008 : if (!NOTE_P (insn))
3753 : break;
3754 21579696 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3755 : return NULL;
3756 : }
3757 :
3758 : return insn;
3759 : }
3760 :
3761 : /* Return the next INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN after INSN;
3762 : or 0, if there is none. This routine does not look inside
3763 : SEQUENCEs. */
3764 :
3765 : rtx_insn *
3766 4330860 : next_real_insn (rtx_insn *insn)
3767 : {
3768 4412255 : while (insn)
3769 : {
3770 4412255 : insn = NEXT_INSN (insn);
3771 4412255 : if (insn == 0 || INSN_P (insn))
3772 : break;
3773 : }
3774 :
3775 4330860 : return insn;
3776 : }
3777 :
3778 : /* Return the last INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN before INSN;
3779 : or 0, if there is none. This routine does not look inside
3780 : SEQUENCEs. */
3781 :
3782 : rtx_insn *
3783 993903 : prev_real_insn (rtx_insn *insn)
3784 : {
3785 2937362 : while (insn)
3786 : {
3787 2937362 : insn = PREV_INSN (insn);
3788 2937362 : if (insn == 0 || INSN_P (insn))
3789 : break;
3790 : }
3791 :
3792 993903 : return insn;
3793 : }
3794 :
3795 : /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3796 : or 0, if there is none. This routine does not look inside
3797 : SEQUENCEs. */
3798 :
3799 : rtx_insn *
3800 0 : next_real_nondebug_insn (rtx uncast_insn)
3801 : {
3802 0 : rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
3803 :
3804 0 : while (insn)
3805 : {
3806 0 : insn = NEXT_INSN (insn);
3807 0 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3808 : break;
3809 : }
3810 :
3811 0 : return insn;
3812 : }
3813 :
3814 : /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3815 : or 0, if there is none. This routine does not look inside
3816 : SEQUENCEs. */
3817 :
3818 : rtx_insn *
3819 5085843 : prev_real_nondebug_insn (rtx_insn *insn)
3820 : {
3821 15803696 : while (insn)
3822 : {
3823 15803696 : insn = PREV_INSN (insn);
3824 15803696 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3825 : break;
3826 : }
3827 :
3828 5085843 : return insn;
3829 : }
3830 :
3831 : /* Return the last CALL_INSN in the current list, or 0 if there is none.
3832 : This routine does not look inside SEQUENCEs. */
3833 :
3834 : rtx_call_insn *
3835 12247173 : last_call_insn (void)
3836 : {
3837 12247173 : rtx_insn *insn;
3838 :
3839 12374543 : for (insn = get_last_insn ();
3840 12374543 : insn && !CALL_P (insn);
3841 127370 : insn = PREV_INSN (insn))
3842 : ;
3843 :
3844 12247173 : return safe_as_a <rtx_call_insn *> (insn);
3845 : }
3846 :
3847 : bool
3848 1194353424 : active_insn_p (const rtx_insn *insn)
3849 : {
3850 1194353424 : return (CALL_P (insn) || JUMP_P (insn)
3851 1194353424 : || JUMP_TABLE_DATA_P (insn) /* FIXME */
3852 1194353424 : || (NONJUMP_INSN_P (insn)
3853 700293584 : && (! reload_completed
3854 497127283 : || (GET_CODE (PATTERN (insn)) != USE
3855 495527553 : && GET_CODE (PATTERN (insn)) != CLOBBER))));
3856 : }
3857 :
3858 : /* Find the next insn after INSN that really does something. This routine
3859 : does not look inside SEQUENCEs. After reload this also skips over
3860 : standalone USE and CLOBBER insn. */
3861 :
3862 : rtx_insn *
3863 115142930 : next_active_insn (rtx_insn *insn)
3864 : {
3865 259468612 : while (insn)
3866 : {
3867 259468612 : insn = NEXT_INSN (insn);
3868 374611542 : if (insn == 0 || active_insn_p (insn))
3869 : break;
3870 : }
3871 :
3872 115142930 : return insn;
3873 : }
3874 :
3875 : /* Find the last insn before INSN that really does something. This routine
3876 : does not look inside SEQUENCEs. After reload this also skips over
3877 : standalone USE and CLOBBER insn. */
3878 :
3879 : rtx_insn *
3880 46322 : prev_active_insn (rtx_insn *insn)
3881 : {
3882 138043 : while (insn)
3883 : {
3884 138043 : insn = PREV_INSN (insn);
3885 184365 : if (insn == 0 || active_insn_p (insn))
3886 : break;
3887 : }
3888 :
3889 46322 : return insn;
3890 : }
3891 :
3892 : /* Find a RTX_AUTOINC class rtx which matches DATA. */
3893 :
3894 : static int
3895 0 : find_auto_inc (const_rtx x, const_rtx reg)
3896 : {
3897 0 : subrtx_iterator::array_type array;
3898 0 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
3899 : {
3900 0 : const_rtx x = *iter;
3901 0 : if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC
3902 0 : && rtx_equal_p (reg, XEXP (x, 0)))
3903 0 : return true;
3904 : }
3905 0 : return false;
3906 0 : }
3907 :
3908 : /* Increment the label uses for all labels present in rtx. */
3909 :
3910 : static void
3911 56827746 : mark_label_nuses (rtx x)
3912 : {
3913 56827746 : enum rtx_code code;
3914 56827746 : int i, j;
3915 56827746 : const char *fmt;
3916 :
3917 56827746 : code = GET_CODE (x);
3918 56827751 : if (code == LABEL_REF && LABEL_P (label_ref_label (x)))
3919 1 : LABEL_NUSES (label_ref_label (x))++;
3920 :
3921 56827746 : fmt = GET_RTX_FORMAT (code);
3922 140194898 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3923 : {
3924 83367152 : if (fmt[i] == 'e')
3925 44650417 : mark_label_nuses (XEXP (x, i));
3926 38716735 : else if (fmt[i] == 'E')
3927 3908881 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3928 2709073 : mark_label_nuses (XVECEXP (x, i, j));
3929 : }
3930 56827746 : }
3931 :
3932 :
3933 : /* Try splitting insns that can be split for better scheduling.
3934 : PAT is the pattern which might split.
3935 : TRIAL is the insn providing PAT.
3936 : LAST is nonzero if we should return the last insn of the sequence produced.
3937 :
3938 : If this routine succeeds in splitting, it returns the first or last
3939 : replacement insn depending on the value of LAST. Otherwise, it
3940 : returns TRIAL. If the insn to be returned can be split, it will be. */
3941 :
3942 : rtx_insn *
3943 405933083 : try_split (rtx pat, rtx_insn *trial, int last)
3944 : {
3945 405933083 : rtx_insn *before, *after;
3946 405933083 : rtx note;
3947 405933083 : rtx_insn *seq, *tem;
3948 405933083 : profile_probability probability;
3949 405933083 : rtx_insn *insn_last, *insn;
3950 405933083 : int njumps = 0;
3951 405933083 : rtx_insn *call_insn = NULL;
3952 :
3953 405933083 : if (any_condjump_p (trial)
3954 405933083 : && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3955 14956004 : split_branch_probability
3956 14956004 : = profile_probability::from_reg_br_prob_note (XINT (note, 0));
3957 : else
3958 390977079 : split_branch_probability = profile_probability::uninitialized ();
3959 :
3960 405933083 : probability = split_branch_probability;
3961 :
3962 405933083 : seq = split_insns (pat, trial);
3963 :
3964 405933083 : split_branch_probability = profile_probability::uninitialized ();
3965 :
3966 405933083 : if (!seq)
3967 : return trial;
3968 :
3969 : int split_insn_count = 0;
3970 : /* Avoid infinite loop if any insn of the result matches
3971 : the original pattern. */
3972 : insn_last = seq;
3973 9484146 : while (1)
3974 : {
3975 9484146 : if (INSN_P (insn_last)
3976 9484146 : && rtx_equal_p (PATTERN (insn_last), pat))
3977 : return trial;
3978 9482627 : split_insn_count++;
3979 9482627 : if (!NEXT_INSN (insn_last))
3980 : break;
3981 : insn_last = NEXT_INSN (insn_last);
3982 : }
3983 :
3984 : /* We're not good at redistributing frame information if
3985 : the split occurs before reload or if it results in more
3986 : than one insn. */
3987 6280304 : if (RTX_FRAME_RELATED_P (trial))
3988 : {
3989 37 : if (!reload_completed || split_insn_count != 1)
3990 : return trial;
3991 :
3992 37 : rtx_insn *new_insn = seq;
3993 37 : rtx_insn *old_insn = trial;
3994 37 : copy_frame_info_to_split_insn (old_insn, new_insn);
3995 : }
3996 :
3997 : /* We will be adding the new sequence to the function. The splitters
3998 : may have introduced invalid RTL sharing, so unshare the sequence now. */
3999 6280304 : unshare_all_rtl_in_chain (seq);
4000 :
4001 : /* Mark labels and copy flags. */
4002 22043235 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4003 : {
4004 9482627 : if (JUMP_P (insn))
4005 : {
4006 6186 : if (JUMP_P (trial))
4007 5339 : CROSSING_JUMP_P (insn) = CROSSING_JUMP_P (trial);
4008 6186 : mark_jump_label (PATTERN (insn), insn, 0);
4009 6186 : njumps++;
4010 6186 : if (probability.initialized_p ()
4011 5309 : && any_condjump_p (insn)
4012 11495 : && !find_reg_note (insn, REG_BR_PROB, 0))
4013 : {
4014 : /* We can preserve the REG_BR_PROB notes only if exactly
4015 : one jump is created, otherwise the machine description
4016 : is responsible for this step using
4017 : split_branch_probability variable. */
4018 5309 : gcc_assert (njumps == 1);
4019 5309 : add_reg_br_prob_note (insn, probability);
4020 : }
4021 : }
4022 : }
4023 :
4024 : /* If we are splitting a CALL_INSN, look for the CALL_INSN
4025 : in SEQ and copy any additional information across. */
4026 6280304 : if (CALL_P (trial))
4027 : {
4028 0 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4029 0 : if (CALL_P (insn))
4030 : {
4031 0 : gcc_assert (call_insn == NULL_RTX);
4032 0 : call_insn = insn;
4033 :
4034 : /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
4035 : target may have explicitly specified. */
4036 0 : rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
4037 0 : while (*p)
4038 0 : p = &XEXP (*p, 1);
4039 0 : *p = CALL_INSN_FUNCTION_USAGE (trial);
4040 :
4041 : /* Preserve the ABI information from the original call. */
4042 0 : CALL_INSN_ABI_ID (insn) = CALL_INSN_ABI_ID (trial);
4043 :
4044 : /* If the old call was a sibling call, the new one must
4045 : be too. */
4046 0 : SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
4047 : }
4048 : }
4049 :
4050 : /* Copy notes, particularly those related to the CFG. */
4051 8137877 : for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
4052 : {
4053 1857573 : switch (REG_NOTE_KIND (note))
4054 : {
4055 2809 : case REG_EH_REGION:
4056 2809 : copy_reg_eh_region_note_backward (note, insn_last, NULL);
4057 2809 : break;
4058 :
4059 : case REG_NORETURN:
4060 : case REG_SETJMP:
4061 : case REG_TM:
4062 : case REG_CALL_NOCF_CHECK:
4063 : case REG_CALL_ARG_LOCATION:
4064 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4065 : {
4066 0 : if (CALL_P (insn))
4067 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4068 : }
4069 : break;
4070 :
4071 : case REG_NON_LOCAL_GOTO:
4072 : case REG_LABEL_TARGET:
4073 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4074 : {
4075 0 : if (JUMP_P (insn))
4076 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4077 : }
4078 : break;
4079 :
4080 : case REG_INC:
4081 : if (!AUTO_INC_DEC)
4082 : break;
4083 :
4084 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4085 : {
4086 : rtx reg = XEXP (note, 0);
4087 : if (!FIND_REG_INC_NOTE (insn, reg)
4088 : && find_auto_inc (PATTERN (insn), reg))
4089 : add_reg_note (insn, REG_INC, reg);
4090 : }
4091 : break;
4092 :
4093 310730 : case REG_ARGS_SIZE:
4094 310730 : fixup_args_size_notes (NULL, insn_last, get_args_size (note));
4095 310730 : break;
4096 :
4097 0 : case REG_CALL_DECL:
4098 0 : case REG_UNTYPED_CALL:
4099 0 : gcc_assert (call_insn != NULL_RTX);
4100 0 : add_reg_note (call_insn, REG_NOTE_KIND (note), XEXP (note, 0));
4101 0 : break;
4102 :
4103 : default:
4104 : break;
4105 : }
4106 : }
4107 :
4108 : /* If there are LABELS inside the split insns increment the
4109 : usage count so we don't delete the label. */
4110 6280304 : if (INSN_P (trial))
4111 : {
4112 : insn = insn_last;
4113 15762931 : while (insn != NULL_RTX)
4114 : {
4115 : /* JUMP_P insns have already been "marked" above. */
4116 9482627 : if (NONJUMP_INSN_P (insn))
4117 9468256 : mark_label_nuses (PATTERN (insn));
4118 :
4119 9482627 : insn = PREV_INSN (insn);
4120 : }
4121 : }
4122 :
4123 6280304 : before = PREV_INSN (trial);
4124 6280304 : after = NEXT_INSN (trial);
4125 :
4126 6280304 : emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
4127 :
4128 6280304 : delete_insn (trial);
4129 :
4130 : /* Recursively call try_split for each new insn created; by the
4131 : time control returns here that insn will be fully split, so
4132 : set LAST and continue from the insn after the one returned.
4133 : We can't use next_active_insn here since AFTER may be a note.
4134 : Ignore deleted insns, which can be occur if not optimizing. */
4135 22043235 : for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
4136 9482627 : if (! tem->deleted () && INSN_P (tem))
4137 9474442 : tem = try_split (PATTERN (tem), tem, 1);
4138 :
4139 : /* Return either the first or the last insn, depending on which was
4140 : requested. */
4141 6280304 : return last
4142 6280304 : ? (after ? PREV_INSN (after) : get_last_insn ())
4143 0 : : NEXT_INSN (before);
4144 : }
4145 :
4146 : /* Make and return an INSN rtx, initializing all its slots.
4147 : Store PATTERN in the pattern slots. */
4148 :
4149 : rtx_insn *
4150 128864949 : make_insn_raw (rtx pattern)
4151 : {
4152 128864949 : rtx_insn *insn;
4153 :
4154 128864949 : insn = as_a <rtx_insn *> (rtx_alloc (INSN));
4155 :
4156 128864949 : INSN_UID (insn) = cur_insn_uid++;
4157 128864949 : PATTERN (insn) = pattern;
4158 128864949 : INSN_CODE (insn) = -1;
4159 128864949 : REG_NOTES (insn) = NULL;
4160 128864949 : INSN_LOCATION (insn) = curr_insn_location ();
4161 128864949 : BLOCK_FOR_INSN (insn) = NULL;
4162 :
4163 : #ifdef ENABLE_RTL_CHECKING
4164 : if (insn
4165 : && INSN_P (insn)
4166 : && (returnjump_p (insn)
4167 : || (GET_CODE (insn) == SET
4168 : && SET_DEST (insn) == pc_rtx)))
4169 : {
4170 : warning (0, "ICE: %<emit_insn%> used where %<emit_jump_insn%> needed:");
4171 : debug_rtx (insn);
4172 : }
4173 : #endif
4174 :
4175 128864949 : return insn;
4176 : }
4177 :
4178 : /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
4179 :
4180 : static rtx_insn *
4181 55316870 : make_debug_insn_raw (rtx pattern)
4182 : {
4183 55316870 : rtx_debug_insn *insn;
4184 :
4185 55316870 : insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
4186 55316870 : INSN_UID (insn) = cur_debug_insn_uid++;
4187 55316870 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
4188 55316870 : INSN_UID (insn) = cur_insn_uid++;
4189 :
4190 55316870 : PATTERN (insn) = pattern;
4191 55316870 : INSN_CODE (insn) = -1;
4192 55316870 : REG_NOTES (insn) = NULL;
4193 55316870 : INSN_LOCATION (insn) = curr_insn_location ();
4194 55316870 : BLOCK_FOR_INSN (insn) = NULL;
4195 :
4196 55316870 : return insn;
4197 : }
4198 :
4199 : /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
4200 :
4201 : static rtx_insn *
4202 18439736 : make_jump_insn_raw (rtx pattern)
4203 : {
4204 18439736 : rtx_jump_insn *insn;
4205 :
4206 18439736 : insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
4207 18439736 : INSN_UID (insn) = cur_insn_uid++;
4208 :
4209 18439736 : PATTERN (insn) = pattern;
4210 18439736 : INSN_CODE (insn) = -1;
4211 18439736 : REG_NOTES (insn) = NULL;
4212 18439736 : JUMP_LABEL (insn) = NULL;
4213 18439736 : INSN_LOCATION (insn) = curr_insn_location ();
4214 18439736 : BLOCK_FOR_INSN (insn) = NULL;
4215 :
4216 18439736 : return insn;
4217 : }
4218 :
4219 : /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
4220 :
4221 : static rtx_insn *
4222 6439935 : make_call_insn_raw (rtx pattern)
4223 : {
4224 6439935 : rtx_call_insn *insn;
4225 :
4226 6439935 : insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
4227 6439935 : INSN_UID (insn) = cur_insn_uid++;
4228 :
4229 6439935 : PATTERN (insn) = pattern;
4230 6439935 : INSN_CODE (insn) = -1;
4231 6439935 : REG_NOTES (insn) = NULL;
4232 6439935 : CALL_INSN_FUNCTION_USAGE (insn) = NULL;
4233 6439935 : CALL_INSN_ABI_ID (insn) = 0;
4234 6439935 : INSN_LOCATION (insn) = curr_insn_location ();
4235 6439935 : BLOCK_FOR_INSN (insn) = NULL;
4236 :
4237 6439935 : return insn;
4238 : }
4239 :
4240 : /* Like `make_insn_raw' but make a NOTE instead of an insn. */
4241 :
4242 : static rtx_note *
4243 178186146 : make_note_raw (enum insn_note subtype)
4244 : {
4245 : /* Some notes are never created this way at all. These notes are
4246 : only created by patching out insns. */
4247 178186146 : gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
4248 : && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
4249 :
4250 178186146 : rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
4251 178186146 : INSN_UID (note) = cur_insn_uid++;
4252 178186146 : NOTE_KIND (note) = subtype;
4253 178186146 : BLOCK_FOR_INSN (note) = NULL;
4254 178186146 : memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4255 178186146 : return note;
4256 : }
4257 :
4258 : /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
4259 : INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
4260 : but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
4261 :
4262 : static inline void
4263 617357318 : link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
4264 : {
4265 617357318 : SET_PREV_INSN (insn) = prev;
4266 617357318 : SET_NEXT_INSN (insn) = next;
4267 617357318 : if (prev != NULL)
4268 : {
4269 445405941 : SET_NEXT_INSN (prev) = insn;
4270 445405941 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4271 : {
4272 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4273 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
4274 : }
4275 : }
4276 617357318 : if (next != NULL)
4277 : {
4278 183286245 : SET_PREV_INSN (next) = insn;
4279 183286245 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4280 : {
4281 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4282 0 : SET_PREV_INSN (sequence->insn (0)) = insn;
4283 : }
4284 : }
4285 :
4286 617357318 : if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
4287 : {
4288 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
4289 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4290 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4291 : }
4292 617357318 : }
4293 :
4294 : /* Add INSN to the end of the doubly-linked list.
4295 : INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4296 :
4297 : void
4298 422711906 : add_insn (rtx_insn *insn)
4299 : {
4300 422711906 : rtx_insn *prev = get_last_insn ();
4301 422711906 : link_insn_into_chain (insn, prev, NULL);
4302 422711906 : if (get_insns () == NULL)
4303 171764413 : set_first_insn (insn);
4304 422711906 : set_last_insn (insn);
4305 422711906 : }
4306 :
4307 : /* Add INSN into the doubly-linked list after insn AFTER. */
4308 :
4309 : static void
4310 72126909 : add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
4311 : {
4312 72126909 : rtx_insn *next = NEXT_INSN (after);
4313 :
4314 72126909 : gcc_assert (!optimize || !after->deleted ());
4315 :
4316 72126909 : link_insn_into_chain (insn, after, next);
4317 :
4318 72126909 : if (next == NULL)
4319 : {
4320 : struct sequence_stack *seq;
4321 :
4322 11359167 : for (seq = get_current_sequence (); seq; seq = seq->next)
4323 11359167 : if (after == seq->last)
4324 : {
4325 11359167 : seq->last = insn;
4326 11359167 : break;
4327 : }
4328 : }
4329 72126909 : }
4330 :
4331 : /* Add INSN into the doubly-linked list before insn BEFORE. */
4332 :
4333 : static void
4334 122518503 : add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
4335 : {
4336 122518503 : rtx_insn *prev = PREV_INSN (before);
4337 :
4338 122518503 : gcc_assert (!optimize || !before->deleted ());
4339 :
4340 122518503 : link_insn_into_chain (insn, prev, before);
4341 :
4342 122518503 : if (prev == NULL)
4343 : {
4344 : struct sequence_stack *seq;
4345 :
4346 186964 : for (seq = get_current_sequence (); seq; seq = seq->next)
4347 186964 : if (before == seq->first)
4348 : {
4349 186964 : seq->first = insn;
4350 186964 : break;
4351 : }
4352 :
4353 186964 : gcc_assert (seq);
4354 : }
4355 122518503 : }
4356 :
4357 : /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4358 : If BB is NULL, an attempt is made to infer the bb from before.
4359 :
4360 : This and the next function should be the only functions called
4361 : to insert an insn once delay slots have been filled since only
4362 : they know how to update a SEQUENCE. */
4363 :
4364 : void
4365 70665606 : add_insn_after (rtx_insn *insn, rtx_insn *after, basic_block bb)
4366 : {
4367 70665606 : add_insn_after_nobb (insn, after);
4368 70665606 : if (!BARRIER_P (after)
4369 70634372 : && !BARRIER_P (insn)
4370 133503223 : && (bb = BLOCK_FOR_INSN (after)))
4371 : {
4372 52162433 : set_block_for_insn (insn, bb);
4373 52162433 : if (INSN_P (insn))
4374 835302 : df_insn_rescan (insn);
4375 : /* Should not happen as first in the BB is always
4376 : either NOTE or LABEL. */
4377 52162433 : if (BB_END (bb) == after
4378 : /* Avoid clobbering of structure when creating new BB. */
4379 1015120 : && !BARRIER_P (insn)
4380 1015120 : && !NOTE_INSN_BASIC_BLOCK_P (insn))
4381 329368 : BB_END (bb) = insn;
4382 : }
4383 70665606 : }
4384 :
4385 : /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4386 : If BB is NULL, an attempt is made to infer the bb from before.
4387 :
4388 : This and the previous function should be the only functions called
4389 : to insert an insn once delay slots have been filled since only
4390 : they know how to update a SEQUENCE. */
4391 :
4392 : void
4393 98690112 : add_insn_before (rtx_insn *insn, rtx_insn *before, basic_block bb)
4394 : {
4395 98690112 : add_insn_before_nobb (insn, before);
4396 :
4397 98690112 : if (BARRIER_P (insn))
4398 : return;
4399 :
4400 98689995 : if (!bb
4401 23245101 : && !BARRIER_P (before))
4402 23245100 : bb = BLOCK_FOR_INSN (before);
4403 :
4404 23245101 : if (bb)
4405 : {
4406 94975171 : set_block_for_insn (insn, bb);
4407 94975171 : if (INSN_P (insn))
4408 13774963 : df_insn_rescan (insn);
4409 : /* Should not happen as first in the BB is always either NOTE or
4410 : LABEL. */
4411 94975171 : gcc_assert (BB_HEAD (bb) != insn
4412 : /* Avoid clobbering of structure when creating new BB. */
4413 : || BARRIER_P (insn)
4414 : || NOTE_INSN_BASIC_BLOCK_P (insn));
4415 : }
4416 : }
4417 :
4418 : /* Replace insn with an deleted instruction note. */
4419 :
4420 : void
4421 14412161 : set_insn_deleted (rtx_insn *insn)
4422 : {
4423 14412161 : if (INSN_P (insn))
4424 14412161 : df_insn_delete (insn);
4425 14412161 : PUT_CODE (insn, NOTE);
4426 14412161 : NOTE_KIND (insn) = NOTE_INSN_DELETED;
4427 14412161 : }
4428 :
4429 :
4430 : /* Unlink INSN from the insn chain.
4431 :
4432 : This function knows how to handle sequences.
4433 :
4434 : This function does not invalidate data flow information associated with
4435 : INSN (i.e. does not call df_insn_delete). That makes this function
4436 : usable for only disconnecting an insn from the chain, and re-emit it
4437 : elsewhere later.
4438 :
4439 : To later insert INSN elsewhere in the insn chain via add_insn and
4440 : similar functions, PREV_INSN and NEXT_INSN must be nullified by
4441 : the caller. Nullifying them here breaks many insn chain walks.
4442 :
4443 : To really delete an insn and related DF information, use delete_insn. */
4444 :
4445 : void
4446 142708998 : remove_insn (rtx_insn *insn)
4447 : {
4448 142708998 : rtx_insn *next = NEXT_INSN (insn);
4449 142708998 : rtx_insn *prev = PREV_INSN (insn);
4450 142708998 : basic_block bb;
4451 :
4452 142708998 : if (prev)
4453 : {
4454 142708739 : SET_NEXT_INSN (prev) = next;
4455 142708739 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4456 : {
4457 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4458 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4459 : }
4460 : }
4461 : else
4462 : {
4463 : struct sequence_stack *seq;
4464 :
4465 259 : for (seq = get_current_sequence (); seq; seq = seq->next)
4466 259 : if (insn == seq->first)
4467 : {
4468 259 : seq->first = next;
4469 259 : break;
4470 : }
4471 :
4472 259 : gcc_assert (seq);
4473 : }
4474 :
4475 142708998 : if (next)
4476 : {
4477 140572972 : SET_PREV_INSN (next) = prev;
4478 140572972 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4479 : {
4480 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4481 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4482 : }
4483 : }
4484 : else
4485 : {
4486 : struct sequence_stack *seq;
4487 :
4488 2136026 : for (seq = get_current_sequence (); seq; seq = seq->next)
4489 2136026 : if (insn == seq->last)
4490 : {
4491 2136026 : seq->last = prev;
4492 2136026 : break;
4493 : }
4494 :
4495 2136026 : gcc_assert (seq);
4496 : }
4497 :
4498 : /* Fix up basic block boundaries, if necessary. */
4499 142708998 : if (!BARRIER_P (insn)
4500 142708998 : && (bb = BLOCK_FOR_INSN (insn)))
4501 : {
4502 139645350 : if (BB_HEAD (bb) == insn)
4503 : {
4504 : /* Never ever delete the basic block note without deleting whole
4505 : basic block. */
4506 2509508 : gcc_assert (!NOTE_P (insn));
4507 2509508 : BB_HEAD (bb) = next;
4508 : }
4509 139645350 : if (BB_END (bb) == insn)
4510 23770265 : BB_END (bb) = prev;
4511 : }
4512 142708998 : }
4513 :
4514 : /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4515 :
4516 : void
4517 6383799 : add_function_usage_to (rtx call_insn, rtx call_fusage)
4518 : {
4519 6383799 : gcc_assert (call_insn && CALL_P (call_insn));
4520 :
4521 : /* Put the register usage information on the CALL. If there is already
4522 : some usage information, put ours at the end. */
4523 6383799 : if (CALL_INSN_FUNCTION_USAGE (call_insn))
4524 : {
4525 : rtx link;
4526 :
4527 568773 : for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4528 : link = XEXP (link, 1))
4529 : ;
4530 :
4531 568772 : XEXP (link, 1) = call_fusage;
4532 : }
4533 : else
4534 5815027 : CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4535 6383799 : }
4536 :
4537 : /* Delete all insns made since FROM.
4538 : FROM becomes the new last instruction. */
4539 :
4540 : void
4541 1323284 : delete_insns_since (rtx_insn *from)
4542 : {
4543 1323284 : if (from == 0)
4544 142100 : set_first_insn (0);
4545 : else
4546 1181184 : SET_NEXT_INSN (from) = 0;
4547 1323284 : set_last_insn (from);
4548 1323284 : }
4549 :
4550 : /* This function is deprecated, please use sequences instead.
4551 :
4552 : Move a consecutive bunch of insns to a different place in the chain.
4553 : The insns to be moved are those between FROM and TO.
4554 : They are moved to a new position after the insn AFTER.
4555 : AFTER must not be FROM or TO or any insn in between.
4556 :
4557 : This function does not know about SEQUENCEs and hence should not be
4558 : called after delay-slot filling has been done. */
4559 :
4560 : void
4561 1837713 : reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4562 : {
4563 1837713 : if (flag_checking)
4564 : {
4565 2443355 : for (rtx_insn *x = from; x != to; x = NEXT_INSN (x))
4566 605665 : gcc_assert (after != x);
4567 1837690 : gcc_assert (after != to);
4568 : }
4569 :
4570 : /* Splice this bunch out of where it is now. */
4571 1837713 : if (PREV_INSN (from))
4572 1837713 : SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4573 1837713 : if (NEXT_INSN (to))
4574 1828917 : SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4575 1837713 : if (get_last_insn () == to)
4576 8796 : set_last_insn (PREV_INSN (from));
4577 1837713 : if (get_insns () == from)
4578 0 : set_first_insn (NEXT_INSN (to));
4579 :
4580 : /* Make the new neighbors point to it and it to them. */
4581 1837713 : if (NEXT_INSN (after))
4582 1830362 : SET_PREV_INSN (NEXT_INSN (after)) = to;
4583 :
4584 1837713 : SET_NEXT_INSN (to) = NEXT_INSN (after);
4585 1837713 : SET_PREV_INSN (from) = after;
4586 1837713 : SET_NEXT_INSN (after) = from;
4587 1837713 : if (after == get_last_insn ())
4588 7351 : set_last_insn (to);
4589 1837713 : }
4590 :
4591 : /* Same as function above, but take care to update BB boundaries. */
4592 : void
4593 1187123 : reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4594 : {
4595 1187123 : rtx_insn *prev = PREV_INSN (from);
4596 1187123 : basic_block bb, bb2;
4597 :
4598 1187123 : reorder_insns_nobb (from, to, after);
4599 :
4600 1187123 : if (!BARRIER_P (after)
4601 1187123 : && (bb = BLOCK_FOR_INSN (after)))
4602 : {
4603 1180029 : rtx_insn *x;
4604 1180029 : df_set_bb_dirty (bb);
4605 :
4606 1180029 : if (!BARRIER_P (from)
4607 1180029 : && (bb2 = BLOCK_FOR_INSN (from)))
4608 : {
4609 1180029 : if (BB_END (bb2) == to)
4610 19175 : BB_END (bb2) = prev;
4611 1180029 : df_set_bb_dirty (bb2);
4612 : }
4613 :
4614 1180029 : if (BB_END (bb) == after)
4615 332991 : BB_END (bb) = to;
4616 :
4617 2417342 : for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4618 1237313 : if (!BARRIER_P (x))
4619 1237313 : df_insn_change_bb (x, bb);
4620 : }
4621 1187123 : }
4622 :
4623 :
4624 : /* Emit insn(s) of given code and pattern
4625 : at a specified place within the doubly-linked list.
4626 :
4627 : All of the emit_foo global entry points accept an object
4628 : X which is either an insn list or a PATTERN of a single
4629 : instruction.
4630 :
4631 : There are thus a few canonical ways to generate code and
4632 : emit it at a specific place in the instruction stream. For
4633 : example, consider the instruction named SPOT and the fact that
4634 : we would like to emit some instructions before SPOT. We might
4635 : do it like this:
4636 :
4637 : start_sequence ();
4638 : ... emit the new instructions ...
4639 : insns_head = end_sequence ();
4640 :
4641 : emit_insn_before (insns_head, SPOT);
4642 :
4643 : It used to be common to generate SEQUENCE rtl instead, but that
4644 : is a relic of the past which no longer occurs. The reason is that
4645 : SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4646 : generated would almost certainly die right after it was created. */
4647 :
4648 : static rtx_insn *
4649 12029439 : emit_pattern_before_noloc (rtx x, rtx_insn *before, rtx_insn *last,
4650 : basic_block bb,
4651 : rtx_insn *(*make_raw) (rtx))
4652 : {
4653 12029439 : rtx_insn *insn;
4654 :
4655 12029439 : gcc_assert (before);
4656 :
4657 12029439 : if (x == NULL_RTX)
4658 : return last;
4659 :
4660 12013729 : switch (GET_CODE (x))
4661 : {
4662 10493775 : case DEBUG_INSN:
4663 10493775 : case INSN:
4664 10493775 : case JUMP_INSN:
4665 10493775 : case CALL_INSN:
4666 10493775 : case CODE_LABEL:
4667 10493775 : case BARRIER:
4668 10493775 : case NOTE:
4669 10493775 : insn = as_a <rtx_insn *> (x);
4670 33912697 : while (insn)
4671 : {
4672 12925147 : rtx_insn *next = NEXT_INSN (insn);
4673 12925147 : add_insn_before (insn, before, bb);
4674 12925147 : last = insn;
4675 12925147 : insn = next;
4676 : }
4677 : break;
4678 :
4679 : #ifdef ENABLE_RTL_CHECKING
4680 : case SEQUENCE:
4681 : gcc_unreachable ();
4682 : break;
4683 : #endif
4684 :
4685 1519954 : default:
4686 1519954 : last = (*make_raw) (x);
4687 1519954 : add_insn_before (last, before, bb);
4688 1519954 : break;
4689 : }
4690 :
4691 : return last;
4692 : }
4693 :
4694 : /* Make X be output before the instruction BEFORE. */
4695 :
4696 : rtx_insn *
4697 481957 : emit_insn_before_noloc (rtx x, rtx_insn *before, basic_block bb)
4698 : {
4699 481957 : return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4700 : }
4701 :
4702 : /* Make an instruction with body X and code JUMP_INSN
4703 : and output it before the instruction BEFORE. */
4704 :
4705 : rtx_jump_insn *
4706 0 : emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
4707 : {
4708 0 : return as_a <rtx_jump_insn *> (
4709 : emit_pattern_before_noloc (x, before, NULL, NULL,
4710 0 : make_jump_insn_raw));
4711 : }
4712 :
4713 : /* Make an instruction with body X and code CALL_INSN
4714 : and output it before the instruction BEFORE. */
4715 :
4716 : rtx_insn *
4717 0 : emit_call_insn_before_noloc (rtx x, rtx_insn *before)
4718 : {
4719 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4720 0 : make_call_insn_raw);
4721 : }
4722 :
4723 : /* Make an instruction with body X and code DEBUG_INSN
4724 : and output it before the instruction BEFORE. */
4725 :
4726 : rtx_insn *
4727 0 : emit_debug_insn_before_noloc (rtx x, rtx_insn *before)
4728 : {
4729 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4730 0 : make_debug_insn_raw);
4731 : }
4732 :
4733 : /* Make an insn of code BARRIER
4734 : and output it before the insn BEFORE. */
4735 :
4736 : rtx_barrier *
4737 0 : emit_barrier_before (rtx_insn *before)
4738 : {
4739 0 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4740 :
4741 0 : INSN_UID (insn) = cur_insn_uid++;
4742 :
4743 0 : add_insn_before (insn, before, NULL);
4744 0 : return insn;
4745 : }
4746 :
4747 : /* Emit the label LABEL before the insn BEFORE. */
4748 :
4749 : rtx_code_label *
4750 6695031 : emit_label_before (rtx_code_label *label, rtx_insn *before)
4751 : {
4752 6695031 : gcc_checking_assert (INSN_UID (label) == 0);
4753 6695031 : INSN_UID (label) = cur_insn_uid++;
4754 6695031 : add_insn_before (label, before, NULL);
4755 6695031 : return label;
4756 : }
4757 :
4758 : /* Helper for emit_insn_after, handles lists of instructions
4759 : efficiently. */
4760 :
4761 : static rtx_insn *
4762 25104693 : emit_insn_after_1 (rtx_insn *first, rtx_insn *after, basic_block bb)
4763 : {
4764 25104693 : rtx_insn *last;
4765 25104693 : rtx_insn *after_after;
4766 25104693 : if (!bb && !BARRIER_P (after))
4767 20231576 : bb = BLOCK_FOR_INSN (after);
4768 :
4769 20231576 : if (bb)
4770 : {
4771 25104620 : df_set_bb_dirty (bb);
4772 69409640 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4773 19200400 : if (!BARRIER_P (last))
4774 : {
4775 19198704 : set_block_for_insn (last, bb);
4776 19198704 : df_insn_rescan (last);
4777 : }
4778 25104620 : if (!BARRIER_P (last))
4779 : {
4780 25104620 : set_block_for_insn (last, bb);
4781 25104620 : df_insn_rescan (last);
4782 : }
4783 25104620 : if (BB_END (bb) == after)
4784 9419930 : BB_END (bb) = last;
4785 : }
4786 : else
4787 73 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4788 0 : continue;
4789 :
4790 25104693 : after_after = NEXT_INSN (after);
4791 :
4792 25104693 : SET_NEXT_INSN (after) = first;
4793 25104693 : SET_PREV_INSN (first) = after;
4794 25104693 : SET_NEXT_INSN (last) = after_after;
4795 25104693 : if (after_after)
4796 24992072 : SET_PREV_INSN (after_after) = last;
4797 :
4798 25104693 : if (after == get_last_insn ())
4799 112621 : set_last_insn (last);
4800 :
4801 25104693 : return last;
4802 : }
4803 :
4804 : static rtx_insn *
4805 30180444 : emit_pattern_after_noloc (rtx x, rtx_insn *after, basic_block bb,
4806 : rtx_insn *(*make_raw)(rtx))
4807 : {
4808 30180444 : rtx_insn *last = after;
4809 :
4810 30180444 : gcc_assert (after);
4811 :
4812 30180444 : if (x == NULL_RTX)
4813 : return last;
4814 :
4815 29618020 : switch (GET_CODE (x))
4816 : {
4817 25104693 : case DEBUG_INSN:
4818 25104693 : case INSN:
4819 25104693 : case JUMP_INSN:
4820 25104693 : case CALL_INSN:
4821 25104693 : case CODE_LABEL:
4822 25104693 : case BARRIER:
4823 25104693 : case NOTE:
4824 25104693 : last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
4825 25104693 : break;
4826 :
4827 : #ifdef ENABLE_RTL_CHECKING
4828 : case SEQUENCE:
4829 : gcc_unreachable ();
4830 : break;
4831 : #endif
4832 :
4833 4513327 : default:
4834 4513327 : last = (*make_raw) (x);
4835 4513327 : add_insn_after (last, after, bb);
4836 4513327 : break;
4837 : }
4838 :
4839 : return last;
4840 : }
4841 :
4842 : /* Make X be output after the insn AFTER and set the BB of insn. If
4843 : BB is NULL, an attempt is made to infer the BB from AFTER. */
4844 :
4845 : rtx_insn *
4846 5110429 : emit_insn_after_noloc (rtx x, rtx_insn *after, basic_block bb)
4847 : {
4848 5110429 : return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4849 : }
4850 :
4851 :
4852 : /* Make an insn of code JUMP_INSN with body X
4853 : and output it after the insn AFTER. */
4854 :
4855 : rtx_jump_insn *
4856 2240 : emit_jump_insn_after_noloc (rtx x, rtx_insn *after)
4857 : {
4858 2240 : return as_a <rtx_jump_insn *> (
4859 2240 : emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
4860 : }
4861 :
4862 : /* Make an instruction with body X and code CALL_INSN
4863 : and output it after the instruction AFTER. */
4864 :
4865 : rtx_insn *
4866 0 : emit_call_insn_after_noloc (rtx x, rtx_insn *after)
4867 : {
4868 0 : return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4869 : }
4870 :
4871 : /* Make an instruction with body X and code CALL_INSN
4872 : and output it after the instruction AFTER. */
4873 :
4874 : rtx_insn *
4875 0 : emit_debug_insn_after_noloc (rtx x, rtx_insn *after)
4876 : {
4877 0 : return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4878 : }
4879 :
4880 : /* Make an insn of code BARRIER
4881 : and output it after the insn AFTER. */
4882 :
4883 : rtx_barrier *
4884 7796755 : emit_barrier_after (rtx_insn *after)
4885 : {
4886 7796755 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4887 :
4888 7796755 : INSN_UID (insn) = cur_insn_uid++;
4889 :
4890 7796755 : add_insn_after (insn, after, NULL);
4891 7796755 : return insn;
4892 : }
4893 :
4894 : /* Emit the label LABEL after the insn AFTER. */
4895 :
4896 : rtx_insn *
4897 0 : emit_label_after (rtx_insn *label, rtx_insn *after)
4898 : {
4899 0 : gcc_checking_assert (INSN_UID (label) == 0);
4900 0 : INSN_UID (label) = cur_insn_uid++;
4901 0 : add_insn_after (label, after, NULL);
4902 0 : return label;
4903 : }
4904 :
4905 : /* Notes require a bit of special handling: Some notes need to have their
4906 : BLOCK_FOR_INSN set, others should never have it set, and some should
4907 : have it set or clear depending on the context. */
4908 :
4909 : /* Return true iff a note of kind SUBTYPE should be emitted with routines
4910 : that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4911 : caller is asked to emit a note before BB_HEAD, or after BB_END. */
4912 :
4913 : static bool
4914 161170175 : note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
4915 : {
4916 0 : switch (subtype)
4917 : {
4918 : /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4919 : case NOTE_INSN_SWITCH_TEXT_SECTIONS:
4920 : return true;
4921 :
4922 : /* Notes for var tracking and EH region markers can appear between or
4923 : inside basic blocks. If the caller is emitting on the basic block
4924 : boundary, do not set BLOCK_FOR_INSN on the new note. */
4925 68110880 : case NOTE_INSN_VAR_LOCATION:
4926 68110880 : case NOTE_INSN_EH_REGION_BEG:
4927 68110880 : case NOTE_INSN_EH_REGION_END:
4928 0 : return on_bb_boundary_p;
4929 :
4930 : /* Otherwise, BLOCK_FOR_INSN must be set. */
4931 0 : default:
4932 0 : return false;
4933 : }
4934 : }
4935 :
4936 : /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4937 :
4938 : rtx_note *
4939 59791804 : emit_note_after (enum insn_note subtype, rtx_insn *after)
4940 : {
4941 59791804 : rtx_note *note = make_note_raw (subtype);
4942 59791804 : basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
4943 59760570 : bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
4944 :
4945 59791804 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4946 1461303 : add_insn_after_nobb (note, after);
4947 : else
4948 58330501 : add_insn_after (note, after, bb);
4949 59791804 : return note;
4950 : }
4951 :
4952 : /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4953 :
4954 : rtx_note *
4955 101378371 : emit_note_before (enum insn_note subtype, rtx_insn *before)
4956 : {
4957 101378371 : rtx_note *note = make_note_raw (subtype);
4958 101378371 : basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
4959 101378370 : bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
4960 :
4961 101378371 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4962 23828391 : add_insn_before_nobb (note, before);
4963 : else
4964 77549980 : add_insn_before (note, before, bb);
4965 101378371 : return note;
4966 : }
4967 :
4968 : /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4969 : MAKE_RAW indicates how to turn PATTERN into a real insn. */
4970 :
4971 : static rtx_insn *
4972 22869861 : emit_pattern_after_setloc (rtx pattern, rtx_insn *after, location_t loc,
4973 : rtx_insn *(*make_raw) (rtx))
4974 : {
4975 22869861 : rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4976 :
4977 22869861 : if (pattern == NULL_RTX || !loc)
4978 : return last;
4979 :
4980 16157956 : after = NEXT_INSN (after);
4981 4395196 : while (1)
4982 : {
4983 20553152 : if (active_insn_p (after)
4984 19355308 : && !JUMP_TABLE_DATA_P (after) /* FIXME */
4985 39908460 : && !INSN_LOCATION (after))
4986 19349202 : INSN_LOCATION (after) = loc;
4987 20553152 : if (after == last)
4988 : break;
4989 4395196 : after = NEXT_INSN (after);
4990 : }
4991 : return last;
4992 : }
4993 :
4994 : /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4995 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4996 : any DEBUG_INSNs. */
4997 :
4998 : static rtx_insn *
4999 11163485 : emit_pattern_after (rtx pattern, rtx_insn *after, bool skip_debug_insns,
5000 : rtx_insn *(*make_raw) (rtx))
5001 : {
5002 11163485 : rtx_insn *prev = after;
5003 :
5004 11163485 : if (skip_debug_insns)
5005 11754317 : while (DEBUG_INSN_P (prev))
5006 2137798 : prev = PREV_INSN (prev);
5007 :
5008 11163485 : if (INSN_P (prev))
5009 8965571 : return emit_pattern_after_setloc (pattern, after, INSN_LOCATION (prev),
5010 8965571 : make_raw);
5011 : else
5012 2197914 : return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
5013 : }
5014 :
5015 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5016 : rtx_insn *
5017 8555653 : emit_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5018 : {
5019 8555653 : return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
5020 : }
5021 :
5022 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5023 : rtx_insn *
5024 8968347 : emit_insn_after (rtx pattern, rtx_insn *after)
5025 : {
5026 8968347 : return emit_pattern_after (pattern, after, true, make_insn_raw);
5027 : }
5028 :
5029 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5030 : rtx_jump_insn *
5031 5348637 : emit_jump_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5032 : {
5033 5348637 : return as_a <rtx_jump_insn *> (
5034 5348637 : emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
5035 : }
5036 :
5037 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5038 : rtx_jump_insn *
5039 622510 : emit_jump_insn_after (rtx pattern, rtx_insn *after)
5040 : {
5041 622510 : return as_a <rtx_jump_insn *> (
5042 622510 : emit_pattern_after (pattern, after, true, make_jump_insn_raw));
5043 : }
5044 :
5045 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5046 : rtx_insn *
5047 0 : emit_call_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5048 : {
5049 0 : return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
5050 : }
5051 :
5052 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5053 : rtx_insn *
5054 25662 : emit_call_insn_after (rtx pattern, rtx_insn *after)
5055 : {
5056 25662 : return emit_pattern_after (pattern, after, true, make_call_insn_raw);
5057 : }
5058 :
5059 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5060 : rtx_insn *
5061 0 : emit_debug_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5062 : {
5063 0 : return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
5064 : }
5065 :
5066 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5067 : rtx_insn *
5068 1546966 : emit_debug_insn_after (rtx pattern, rtx_insn *after)
5069 : {
5070 1546966 : return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
5071 : }
5072 :
5073 : /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
5074 : MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
5075 : indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
5076 : CALL_INSN, etc. */
5077 :
5078 : static rtx_insn *
5079 10955741 : emit_pattern_before_setloc (rtx pattern, rtx_insn *before, location_t loc,
5080 : bool insnp, rtx_insn *(*make_raw) (rtx))
5081 : {
5082 10955741 : rtx_insn *first = PREV_INSN (before);
5083 11299832 : rtx_insn *last = emit_pattern_before_noloc (pattern, before,
5084 : insnp ? before : NULL,
5085 : NULL, make_raw);
5086 :
5087 10955741 : if (pattern == NULL_RTX || !loc)
5088 : return last;
5089 :
5090 9936245 : if (!first)
5091 88893 : first = get_insns ();
5092 : else
5093 9847352 : first = NEXT_INSN (first);
5094 1688359 : while (1)
5095 : {
5096 11624604 : if (active_insn_p (first)
5097 11046147 : && !JUMP_TABLE_DATA_P (first) /* FIXME */
5098 22670751 : && !INSN_LOCATION (first))
5099 10799700 : INSN_LOCATION (first) = loc;
5100 11624604 : if (first == last)
5101 : break;
5102 1688359 : first = NEXT_INSN (first);
5103 : }
5104 : return last;
5105 : }
5106 :
5107 : /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
5108 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
5109 : before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
5110 : INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
5111 :
5112 : static rtx_insn *
5113 11150452 : emit_pattern_before (rtx pattern, rtx_insn *before, bool skip_debug_insns,
5114 : bool insnp, rtx_insn *(*make_raw) (rtx))
5115 : {
5116 11150452 : rtx_insn *next = before;
5117 :
5118 11150452 : if (skip_debug_insns)
5119 10815182 : while (DEBUG_INSN_P (next))
5120 36 : next = PREV_INSN (next);
5121 :
5122 11150452 : if (INSN_P (next))
5123 10558711 : return emit_pattern_before_setloc (pattern, before, INSN_LOCATION (next),
5124 10558711 : insnp, make_raw);
5125 : else
5126 592905 : return emit_pattern_before_noloc (pattern, before,
5127 : insnp ? before : NULL,
5128 591741 : NULL, make_raw);
5129 : }
5130 :
5131 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5132 : rtx_insn *
5133 397030 : emit_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5134 : {
5135 397030 : return emit_pattern_before_setloc (pattern, before, loc, true,
5136 397030 : make_insn_raw);
5137 : }
5138 :
5139 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5140 : rtx_insn *
5141 10805197 : emit_insn_before (rtx pattern, rtx_insn *before)
5142 : {
5143 10805197 : return emit_pattern_before (pattern, before, true, true, make_insn_raw);
5144 : }
5145 :
5146 : /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5147 : rtx_jump_insn *
5148 0 : emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5149 : {
5150 0 : return as_a <rtx_jump_insn *> (
5151 : emit_pattern_before_setloc (pattern, before, loc, false,
5152 0 : make_jump_insn_raw));
5153 : }
5154 :
5155 : /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5156 : rtx_jump_insn *
5157 9949 : emit_jump_insn_before (rtx pattern, rtx_insn *before)
5158 : {
5159 9949 : return as_a <rtx_jump_insn *> (
5160 : emit_pattern_before (pattern, before, true, false,
5161 9949 : make_jump_insn_raw));
5162 : }
5163 :
5164 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5165 : rtx_insn *
5166 0 : emit_call_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5167 : {
5168 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5169 0 : make_call_insn_raw);
5170 : }
5171 :
5172 : /* Like emit_call_insn_before_noloc,
5173 : but set insn_location according to BEFORE. */
5174 : rtx_insn *
5175 0 : emit_call_insn_before (rtx pattern, rtx_insn *before)
5176 : {
5177 0 : return emit_pattern_before (pattern, before, true, false,
5178 0 : make_call_insn_raw);
5179 : }
5180 :
5181 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5182 : rtx_insn *
5183 0 : emit_debug_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5184 : {
5185 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5186 0 : make_debug_insn_raw);
5187 : }
5188 :
5189 : /* Like emit_debug_insn_before_noloc,
5190 : but set insn_location according to BEFORE. */
5191 : rtx_insn *
5192 335306 : emit_debug_insn_before (rtx pattern, rtx_insn *before)
5193 : {
5194 335306 : return emit_pattern_before (pattern, before, false, false,
5195 335306 : make_debug_insn_raw);
5196 : }
5197 :
5198 : /* Take X and emit it at the end of the doubly-linked
5199 : INSN list.
5200 :
5201 : Returns the last insn emitted. */
5202 :
5203 : rtx_insn *
5204 250093773 : emit_insn (rtx x)
5205 : {
5206 250093773 : rtx_insn *last = get_last_insn ();
5207 250093773 : rtx_insn *insn;
5208 :
5209 250093773 : if (x == NULL_RTX)
5210 : return last;
5211 :
5212 245361341 : switch (GET_CODE (x))
5213 : {
5214 120222841 : case DEBUG_INSN:
5215 120222841 : case INSN:
5216 120222841 : case JUMP_INSN:
5217 120222841 : case CALL_INSN:
5218 120222841 : case CODE_LABEL:
5219 120222841 : case BARRIER:
5220 120222841 : case NOTE:
5221 120222841 : insn = as_a <rtx_insn *> (x);
5222 408511476 : while (insn)
5223 : {
5224 168065794 : rtx_insn *next = NEXT_INSN (insn);
5225 168065794 : add_insn (insn);
5226 168065794 : last = insn;
5227 168065794 : insn = next;
5228 : }
5229 : break;
5230 :
5231 : #ifdef ENABLE_RTL_CHECKING
5232 : case JUMP_TABLE_DATA:
5233 : case SEQUENCE:
5234 : gcc_unreachable ();
5235 : break;
5236 : #endif
5237 :
5238 125138500 : default:
5239 125138500 : last = make_insn_raw (x);
5240 125138500 : add_insn (last);
5241 125138500 : break;
5242 : }
5243 :
5244 : return last;
5245 : }
5246 :
5247 : /* Make an insn of code DEBUG_INSN with pattern X
5248 : and add it to the end of the doubly-linked list. */
5249 :
5250 : rtx_insn *
5251 53434598 : emit_debug_insn (rtx x)
5252 : {
5253 53434598 : rtx_insn *last = get_last_insn ();
5254 53434598 : rtx_insn *insn;
5255 :
5256 53434598 : if (x == NULL_RTX)
5257 : return last;
5258 :
5259 53434598 : switch (GET_CODE (x))
5260 : {
5261 0 : case DEBUG_INSN:
5262 0 : case INSN:
5263 0 : case JUMP_INSN:
5264 0 : case CALL_INSN:
5265 0 : case CODE_LABEL:
5266 0 : case BARRIER:
5267 0 : case NOTE:
5268 0 : insn = as_a <rtx_insn *> (x);
5269 0 : while (insn)
5270 : {
5271 0 : rtx_insn *next = NEXT_INSN (insn);
5272 0 : add_insn (insn);
5273 0 : last = insn;
5274 0 : insn = next;
5275 : }
5276 : break;
5277 :
5278 : #ifdef ENABLE_RTL_CHECKING
5279 : case JUMP_TABLE_DATA:
5280 : case SEQUENCE:
5281 : gcc_unreachable ();
5282 : break;
5283 : #endif
5284 :
5285 53434598 : default:
5286 53434598 : last = make_debug_insn_raw (x);
5287 53434598 : add_insn (last);
5288 53434598 : break;
5289 : }
5290 :
5291 : return last;
5292 : }
5293 :
5294 : /* Make an insn of code JUMP_INSN with pattern X
5295 : and add it to the end of the doubly-linked list. */
5296 :
5297 : rtx_insn *
5298 30001328 : emit_jump_insn (rtx x)
5299 : {
5300 30001328 : rtx_insn *last = NULL;
5301 30001328 : rtx_insn *insn;
5302 :
5303 30001328 : switch (GET_CODE (x))
5304 : {
5305 12061144 : case DEBUG_INSN:
5306 12061144 : case INSN:
5307 12061144 : case JUMP_INSN:
5308 12061144 : case CALL_INSN:
5309 12061144 : case CODE_LABEL:
5310 12061144 : case BARRIER:
5311 12061144 : case NOTE:
5312 12061144 : insn = as_a <rtx_insn *> (x);
5313 45878239 : while (insn)
5314 : {
5315 21755951 : rtx_insn *next = NEXT_INSN (insn);
5316 21755951 : add_insn (insn);
5317 21755951 : last = insn;
5318 21755951 : insn = next;
5319 : }
5320 : break;
5321 :
5322 : #ifdef ENABLE_RTL_CHECKING
5323 : case JUMP_TABLE_DATA:
5324 : case SEQUENCE:
5325 : gcc_unreachable ();
5326 : break;
5327 : #endif
5328 :
5329 17940184 : default:
5330 17940184 : last = make_jump_insn_raw (x);
5331 17940184 : add_insn (last);
5332 17940184 : break;
5333 : }
5334 :
5335 30001328 : return last;
5336 : }
5337 :
5338 : /* Make an insn of code JUMP_INSN with pattern X,
5339 : add a REG_BR_PROB note that indicates very likely probability,
5340 : and add it to the end of the doubly-linked list. */
5341 :
5342 : rtx_insn *
5343 0 : emit_likely_jump_insn (rtx x)
5344 : {
5345 0 : rtx_insn *jump = emit_jump_insn (x);
5346 0 : add_reg_br_prob_note (jump, profile_probability::very_likely ());
5347 0 : return jump;
5348 : }
5349 :
5350 : /* Make an insn of code JUMP_INSN with pattern X,
5351 : add a REG_BR_PROB note that indicates very unlikely probability,
5352 : and add it to the end of the doubly-linked list. */
5353 :
5354 : rtx_insn *
5355 0 : emit_unlikely_jump_insn (rtx x)
5356 : {
5357 0 : rtx_insn *jump = emit_jump_insn (x);
5358 0 : add_reg_br_prob_note (jump, profile_probability::very_unlikely ());
5359 0 : return jump;
5360 : }
5361 :
5362 : /* Make an insn of code CALL_INSN with pattern X
5363 : and add it to the end of the doubly-linked list. */
5364 :
5365 : rtx_insn *
5366 6418686 : emit_call_insn (rtx x)
5367 : {
5368 6418686 : rtx_insn *insn;
5369 :
5370 6418686 : switch (GET_CODE (x))
5371 : {
5372 4413 : case DEBUG_INSN:
5373 4413 : case INSN:
5374 4413 : case JUMP_INSN:
5375 4413 : case CALL_INSN:
5376 4413 : case CODE_LABEL:
5377 4413 : case BARRIER:
5378 4413 : case NOTE:
5379 4413 : insn = emit_insn (x);
5380 4413 : break;
5381 :
5382 : #ifdef ENABLE_RTL_CHECKING
5383 : case SEQUENCE:
5384 : case JUMP_TABLE_DATA:
5385 : gcc_unreachable ();
5386 : break;
5387 : #endif
5388 :
5389 6414273 : default:
5390 6414273 : insn = make_call_insn_raw (x);
5391 6414273 : add_insn (insn);
5392 6414273 : break;
5393 : }
5394 :
5395 6418686 : return insn;
5396 : }
5397 :
5398 : /* Add the label LABEL to the end of the doubly-linked list. */
5399 :
5400 : rtx_code_label *
5401 8904396 : emit_label (rtx uncast_label)
5402 : {
5403 8904396 : rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
5404 :
5405 8904396 : gcc_checking_assert (INSN_UID (label) == 0);
5406 8904396 : INSN_UID (label) = cur_insn_uid++;
5407 8904396 : add_insn (label);
5408 8904396 : return label;
5409 : }
5410 :
5411 : /* Make an insn of code JUMP_TABLE_DATA
5412 : and add it to the end of the doubly-linked list. */
5413 :
5414 : rtx_jump_table_data *
5415 7094 : emit_jump_table_data (rtx table)
5416 : {
5417 7094 : rtx_jump_table_data *jump_table_data =
5418 7094 : as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
5419 7094 : INSN_UID (jump_table_data) = cur_insn_uid++;
5420 7094 : PATTERN (jump_table_data) = table;
5421 7094 : BLOCK_FOR_INSN (jump_table_data) = NULL;
5422 7094 : add_insn (jump_table_data);
5423 7094 : return jump_table_data;
5424 : }
5425 :
5426 : /* Make an insn of code BARRIER
5427 : and add it to the end of the doubly-linked list. */
5428 :
5429 : rtx_barrier *
5430 3622645 : emit_barrier (void)
5431 : {
5432 3622645 : rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
5433 3622645 : INSN_UID (barrier) = cur_insn_uid++;
5434 3622645 : add_insn (barrier);
5435 3622645 : return barrier;
5436 : }
5437 :
5438 : /* Emit a copy of note ORIG. */
5439 :
5440 : rtx_note *
5441 176079 : emit_note_copy (rtx_note *orig)
5442 : {
5443 176079 : enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
5444 176079 : rtx_note *note = make_note_raw (kind);
5445 176079 : NOTE_DATA (note) = NOTE_DATA (orig);
5446 176079 : add_insn (note);
5447 176079 : return note;
5448 : }
5449 :
5450 : /* Make an insn of code NOTE or type NOTE_NO
5451 : and add it to the end of the doubly-linked list. */
5452 :
5453 : rtx_note *
5454 16839892 : emit_note (enum insn_note kind)
5455 : {
5456 16839892 : rtx_note *note = make_note_raw (kind);
5457 16839892 : add_insn (note);
5458 16839892 : return note;
5459 : }
5460 :
5461 : /* Emit a clobber of lvalue X. */
5462 :
5463 : rtx_insn *
5464 548278 : emit_clobber (rtx x)
5465 : {
5466 : /* CONCATs should not appear in the insn stream. */
5467 548278 : if (GET_CODE (x) == CONCAT)
5468 : {
5469 0 : emit_clobber (XEXP (x, 0));
5470 0 : return emit_clobber (XEXP (x, 1));
5471 : }
5472 548278 : return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5473 : }
5474 :
5475 : /* Return a sequence of insns to clobber lvalue X. */
5476 :
5477 : rtx_insn *
5478 0 : gen_clobber (rtx x)
5479 : {
5480 0 : rtx_insn *seq;
5481 :
5482 0 : start_sequence ();
5483 0 : emit_clobber (x);
5484 0 : seq = end_sequence ();
5485 0 : return seq;
5486 : }
5487 :
5488 : /* Emit a use of rvalue X. */
5489 :
5490 : rtx_insn *
5491 808310 : emit_use (rtx x)
5492 : {
5493 : /* CONCATs should not appear in the insn stream. */
5494 808310 : if (GET_CODE (x) == CONCAT)
5495 : {
5496 0 : emit_use (XEXP (x, 0));
5497 0 : return emit_use (XEXP (x, 1));
5498 : }
5499 808310 : return emit_insn (gen_rtx_USE (VOIDmode, x));
5500 : }
5501 :
5502 : /* Return a sequence of insns to use rvalue X. */
5503 :
5504 : rtx_insn *
5505 0 : gen_use (rtx x)
5506 : {
5507 0 : rtx_insn *seq;
5508 :
5509 0 : start_sequence ();
5510 0 : emit_use (x);
5511 0 : seq = end_sequence ();
5512 0 : return seq;
5513 : }
5514 :
5515 : /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5516 : Return the set in INSN that such notes describe, or NULL if the notes
5517 : have no meaning for INSN. */
5518 :
5519 : rtx
5520 241166189 : set_for_reg_notes (rtx insn)
5521 : {
5522 241166189 : rtx pat, reg;
5523 :
5524 241166189 : if (!INSN_P (insn))
5525 : return NULL_RTX;
5526 :
5527 241161572 : pat = PATTERN (insn);
5528 241161572 : if (GET_CODE (pat) == PARALLEL)
5529 : {
5530 : /* We do not use single_set because that ignores SETs of unused
5531 : registers. REG_EQUAL and REG_EQUIV notes really do require the
5532 : PARALLEL to have a single SET. */
5533 18897741 : if (multiple_sets (insn))
5534 : return NULL_RTX;
5535 18181756 : pat = XVECEXP (pat, 0, 0);
5536 : }
5537 :
5538 240445587 : if (GET_CODE (pat) != SET)
5539 : return NULL_RTX;
5540 :
5541 131993197 : reg = SET_DEST (pat);
5542 :
5543 : /* Notes apply to the contents of a STRICT_LOW_PART. */
5544 131993197 : if (GET_CODE (reg) == STRICT_LOW_PART
5545 131986848 : || GET_CODE (reg) == ZERO_EXTRACT)
5546 8474 : reg = XEXP (reg, 0);
5547 :
5548 : /* Check that we have a register. */
5549 131993197 : if (!(REG_P (reg) || GET_CODE (reg) == SUBREG))
5550 35152514 : return NULL_RTX;
5551 :
5552 : return pat;
5553 : }
5554 :
5555 : /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5556 : note of this type already exists, remove it first. */
5557 :
5558 : rtx
5559 23760193 : set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5560 : {
5561 23760193 : rtx note = find_reg_note (insn, kind, NULL_RTX);
5562 :
5563 23760193 : switch (kind)
5564 : {
5565 23760193 : case REG_EQUAL:
5566 23760193 : case REG_EQUIV:
5567 : /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5568 23760193 : if (!set_for_reg_notes (insn) && GET_CODE (PATTERN (insn)) != USE)
5569 : return NULL_RTX;
5570 :
5571 : /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5572 : It serves no useful purpose and breaks eliminate_regs. */
5573 23725958 : if (GET_CODE (datum) == ASM_OPERANDS)
5574 : return NULL_RTX;
5575 :
5576 : /* Notes with side effects are dangerous. Even if the side-effect
5577 : initially mirrors one in PATTERN (INSN), later optimizations
5578 : might alter the way that the final register value is calculated
5579 : and so move or alter the side-effect in some way. The note would
5580 : then no longer be a valid substitution for SET_SRC. */
5581 23716511 : if (side_effects_p (datum))
5582 : return NULL_RTX;
5583 : break;
5584 :
5585 : default:
5586 : break;
5587 : }
5588 :
5589 23716045 : if (note)
5590 8069760 : XEXP (note, 0) = datum;
5591 : else
5592 : {
5593 15646285 : add_reg_note (insn, kind, datum);
5594 15646285 : note = REG_NOTES (insn);
5595 : }
5596 :
5597 23716045 : switch (kind)
5598 : {
5599 23716045 : case REG_EQUAL:
5600 23716045 : case REG_EQUIV:
5601 23716045 : df_notes_rescan (as_a <rtx_insn *> (insn));
5602 23716045 : break;
5603 : default:
5604 : break;
5605 : }
5606 :
5607 : return note;
5608 : }
5609 :
5610 : /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5611 : rtx
5612 1399890 : set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5613 : {
5614 1399890 : rtx set = set_for_reg_notes (insn);
5615 :
5616 1399890 : if (set && SET_DEST (set) == dst)
5617 1383109 : return set_unique_reg_note (insn, kind, datum);
5618 : return NULL_RTX;
5619 : }
5620 :
5621 : /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5622 : following barrier if the instruction needs one and if ALLOW_BARRIER_P
5623 : is true.
5624 :
5625 : If X is a label, it is simply added into the insn chain. */
5626 :
5627 : rtx_insn *
5628 18978077 : emit (rtx x, bool allow_barrier_p)
5629 : {
5630 18978077 : enum rtx_code code = classify_insn (x);
5631 :
5632 18978077 : switch (code)
5633 : {
5634 0 : case CODE_LABEL:
5635 0 : return emit_label (x);
5636 9387465 : case INSN:
5637 9387465 : return emit_insn (x);
5638 9584368 : case JUMP_INSN:
5639 9584368 : {
5640 9584368 : rtx_insn *insn = emit_jump_insn (x);
5641 9584368 : if (allow_barrier_p
5642 9584368 : && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
5643 0 : return emit_barrier ();
5644 : return insn;
5645 : }
5646 6244 : case CALL_INSN:
5647 6244 : return emit_call_insn (x);
5648 0 : case DEBUG_INSN:
5649 0 : return emit_debug_insn (x);
5650 0 : default:
5651 0 : gcc_unreachable ();
5652 : }
5653 : }
5654 :
5655 : /* Space for free sequence stack entries. */
5656 : static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5657 :
5658 : /* Begin emitting insns to a sequence. If this sequence will contain
5659 : something that might cause the compiler to pop arguments to function
5660 : calls (because those pops have previously been deferred; see
5661 : INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5662 : before calling this function. That will ensure that the deferred
5663 : pops are not accidentally emitted in the middle of this sequence. */
5664 :
5665 : void
5666 240906523 : start_sequence (void)
5667 : {
5668 240906523 : struct sequence_stack *tem;
5669 :
5670 240906523 : if (free_sequence_stack != NULL)
5671 : {
5672 240234807 : tem = free_sequence_stack;
5673 240234807 : free_sequence_stack = tem->next;
5674 : }
5675 : else
5676 671716 : tem = ggc_alloc<sequence_stack> ();
5677 :
5678 240906523 : tem->next = get_current_sequence ()->next;
5679 240906523 : tem->first = get_insns ();
5680 240906523 : tem->last = get_last_insn ();
5681 240906523 : get_current_sequence ()->next = tem;
5682 :
5683 240906523 : set_first_insn (0);
5684 240906523 : set_last_insn (0);
5685 240906523 : }
5686 :
5687 : /* Set up the insn chain starting with FIRST as the current sequence,
5688 : saving the previously current one. See the documentation for
5689 : start_sequence for more information about how to use this function. */
5690 :
5691 : void
5692 5657228 : push_to_sequence (rtx_insn *first)
5693 : {
5694 5657228 : rtx_insn *last;
5695 :
5696 5657228 : start_sequence ();
5697 :
5698 14959322 : for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5699 : ;
5700 :
5701 5657228 : set_first_insn (first);
5702 5657228 : set_last_insn (last);
5703 5657228 : }
5704 :
5705 : /* Like push_to_sequence, but take the last insn as an argument to avoid
5706 : looping through the list. */
5707 :
5708 : void
5709 78926 : push_to_sequence2 (rtx_insn *first, rtx_insn *last)
5710 : {
5711 78926 : start_sequence ();
5712 :
5713 78926 : set_first_insn (first);
5714 78926 : set_last_insn (last);
5715 78926 : }
5716 :
5717 : /* Set up the outer-level insn chain
5718 : as the current sequence, saving the previously current one. */
5719 :
5720 : void
5721 476 : push_topmost_sequence (void)
5722 : {
5723 476 : struct sequence_stack *top;
5724 :
5725 476 : start_sequence ();
5726 :
5727 476 : top = get_topmost_sequence ();
5728 476 : set_first_insn (top->first);
5729 476 : set_last_insn (top->last);
5730 476 : }
5731 :
5732 : /* After emitting to the outer-level insn chain, update the outer-level
5733 : insn chain, and restore the previous saved state. */
5734 :
5735 : void
5736 476 : pop_topmost_sequence (void)
5737 : {
5738 476 : struct sequence_stack *top;
5739 :
5740 476 : top = get_topmost_sequence ();
5741 476 : top->first = get_insns ();
5742 476 : top->last = get_last_insn ();
5743 :
5744 476 : end_sequence ();
5745 476 : }
5746 :
5747 : /* After emitting to a sequence, restore the previous saved state and return
5748 : the start of the completed sequence.
5749 :
5750 : If the compiler might have deferred popping arguments while
5751 : generating this sequence, and this sequence will not be immediately
5752 : inserted into the instruction stream, use do_pending_stack_adjust
5753 : before calling this function. That will ensure that the deferred
5754 : pops are inserted into this sequence, and not into some random
5755 : location in the instruction stream. See INHIBIT_DEFER_POP for more
5756 : information about deferred popping of arguments. */
5757 :
5758 : rtx_insn *
5759 240906521 : end_sequence (void)
5760 : {
5761 240906521 : rtx_insn *insns = get_insns ();
5762 :
5763 240906521 : struct sequence_stack *tem = get_current_sequence ()->next;
5764 :
5765 240906521 : set_first_insn (tem->first);
5766 240906521 : set_last_insn (tem->last);
5767 240906521 : get_current_sequence ()->next = tem->next;
5768 :
5769 240906521 : memset (tem, 0, sizeof (*tem));
5770 240906521 : tem->next = free_sequence_stack;
5771 240906521 : free_sequence_stack = tem;
5772 :
5773 240906521 : return insns;
5774 : }
5775 :
5776 : /* Return true if currently emitting into a sequence. */
5777 :
5778 : bool
5779 5040644 : in_sequence_p (void)
5780 : {
5781 5040644 : return get_current_sequence ()->next != 0;
5782 : }
5783 :
5784 : /* Put the various virtual registers into REGNO_REG_RTX. */
5785 :
5786 : static void
5787 1738109 : init_virtual_regs (void)
5788 : {
5789 1738109 : regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5790 1738109 : regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5791 1738109 : regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5792 1738109 : regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5793 1738109 : regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5794 1738109 : regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5795 1738109 : = virtual_preferred_stack_boundary_rtx;
5796 1738109 : }
5797 :
5798 :
5799 : /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5800 : static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5801 : static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5802 : static int copy_insn_n_scratches;
5803 :
5804 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5805 : copied an ASM_OPERANDS.
5806 : In that case, it is the original input-operand vector. */
5807 : static rtvec orig_asm_operands_vector;
5808 :
5809 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5810 : copied an ASM_OPERANDS.
5811 : In that case, it is the copied input-operand vector. */
5812 : static rtvec copy_asm_operands_vector;
5813 :
5814 : /* Likewise for the constraints vector. */
5815 : static rtvec orig_asm_constraints_vector;
5816 : static rtvec copy_asm_constraints_vector;
5817 :
5818 : /* Recursively create a new copy of an rtx for copy_insn.
5819 : This function differs from copy_rtx in that it handles SCRATCHes and
5820 : ASM_OPERANDs properly.
5821 : Normally, this function is not used directly; use copy_insn as front end.
5822 : However, you could first copy an insn pattern with copy_insn and then use
5823 : this function afterwards to properly copy any REG_NOTEs containing
5824 : SCRATCHes. */
5825 :
5826 : rtx
5827 22518196 : copy_insn_1 (rtx orig)
5828 : {
5829 22518196 : rtx copy;
5830 22518196 : int i, j;
5831 22518196 : RTX_CODE code;
5832 22518196 : const char *format_ptr;
5833 :
5834 22518196 : if (orig == NULL)
5835 : return NULL;
5836 :
5837 22516595 : code = GET_CODE (orig);
5838 :
5839 22516595 : switch (code)
5840 : {
5841 : case REG:
5842 : case DEBUG_EXPR:
5843 : CASE_CONST_ANY:
5844 : case SYMBOL_REF:
5845 : case CODE_LABEL:
5846 : case PC:
5847 : case RETURN:
5848 : case SIMPLE_RETURN:
5849 : return orig;
5850 1062807 : case CLOBBER:
5851 : /* Share clobbers of hard registers, but do not share pseudo reg
5852 : clobbers or clobbers of hard registers that originated as pseudos.
5853 : This is needed to allow safe register renaming. */
5854 1062807 : if (REG_P (XEXP (orig, 0))
5855 451189 : && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
5856 1513990 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0))))
5857 : return orig;
5858 : break;
5859 :
5860 : case SCRATCH:
5861 72259 : for (i = 0; i < copy_insn_n_scratches; i++)
5862 1535 : if (copy_insn_scratch_in[i] == orig)
5863 1507 : return copy_insn_scratch_out[i];
5864 : break;
5865 :
5866 103520 : case CONST:
5867 103520 : if (shared_const_p (orig))
5868 : return orig;
5869 : break;
5870 :
5871 : /* A MEM with a constant address is not sharable. The problem is that
5872 : the constant address may need to be reloaded. If the mem is shared,
5873 : then reloading one copy of this mem will cause all copies to appear
5874 : to have been reloaded. */
5875 :
5876 : default:
5877 : break;
5878 : }
5879 :
5880 : /* Copy the various flags, fields, and other information. We assume
5881 : that all fields need copying, and then clear the fields that should
5882 : not be copied. That is the sensible default behavior, and forces
5883 : us to explicitly document why we are *not* copying a flag. */
5884 10022861 : copy = shallow_copy_rtx (orig);
5885 :
5886 : /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5887 10022861 : if (INSN_P (orig))
5888 : {
5889 0 : RTX_FLAG (copy, jump) = 0;
5890 0 : RTX_FLAG (copy, call) = 0;
5891 0 : RTX_FLAG (copy, frame_related) = 0;
5892 : }
5893 :
5894 10022861 : format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5895 :
5896 27519334 : for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5897 17496473 : switch (*format_ptr++)
5898 : {
5899 14373949 : case 'e':
5900 14373949 : if (XEXP (orig, i) != NULL)
5901 14350770 : XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5902 : break;
5903 :
5904 636387 : case 'E':
5905 636387 : case 'V':
5906 636387 : if (XVEC (orig, i) == orig_asm_constraints_vector)
5907 12 : XVEC (copy, i) = copy_asm_constraints_vector;
5908 636375 : else if (XVEC (orig, i) == orig_asm_operands_vector)
5909 12 : XVEC (copy, i) = copy_asm_operands_vector;
5910 636363 : else if (XVEC (orig, i) != NULL)
5911 : {
5912 636363 : XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5913 1878896 : for (j = 0; j < XVECLEN (copy, i); j++)
5914 1242533 : XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5915 : }
5916 : break;
5917 :
5918 : case 't':
5919 : case 'w':
5920 : case 'i':
5921 : case 'L':
5922 : case 'p':
5923 : case 's':
5924 : case 'S':
5925 : case 'u':
5926 : case '0':
5927 : /* These are left unchanged. */
5928 : break;
5929 :
5930 0 : default:
5931 0 : gcc_unreachable ();
5932 : }
5933 :
5934 10022861 : if (code == SCRATCH)
5935 : {
5936 70724 : i = copy_insn_n_scratches++;
5937 70724 : gcc_assert (i < MAX_RECOG_OPERANDS);
5938 70724 : copy_insn_scratch_in[i] = orig;
5939 70724 : copy_insn_scratch_out[i] = copy;
5940 : }
5941 9952137 : else if (code == ASM_OPERANDS)
5942 : {
5943 221 : orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5944 221 : copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5945 221 : orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5946 221 : copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5947 : }
5948 :
5949 : return copy;
5950 : }
5951 :
5952 : /* Create a new copy of an rtx.
5953 : This function differs from copy_rtx in that it handles SCRATCHes and
5954 : ASM_OPERANDs properly.
5955 : INSN doesn't really have to be a full INSN; it could be just the
5956 : pattern. */
5957 : rtx
5958 3923618 : copy_insn (rtx insn)
5959 : {
5960 3923618 : copy_insn_n_scratches = 0;
5961 3923618 : orig_asm_operands_vector = 0;
5962 3923618 : orig_asm_constraints_vector = 0;
5963 3923618 : copy_asm_operands_vector = 0;
5964 3923618 : copy_asm_constraints_vector = 0;
5965 3923618 : return copy_insn_1 (insn);
5966 : }
5967 :
5968 : /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5969 : on that assumption that INSN itself remains in its original place. */
5970 :
5971 : rtx_insn *
5972 0 : copy_delay_slot_insn (rtx_insn *insn)
5973 : {
5974 : /* Copy INSN with its rtx_code, all its notes, location etc. */
5975 0 : insn = as_a <rtx_insn *> (copy_rtx (insn));
5976 0 : INSN_UID (insn) = cur_insn_uid++;
5977 0 : return insn;
5978 : }
5979 :
5980 : /* Initialize data structures and variables in this file
5981 : before generating rtl for each function. */
5982 :
5983 : void
5984 1738109 : init_emit (void)
5985 : {
5986 1738109 : set_first_insn (NULL);
5987 1738109 : set_last_insn (NULL);
5988 1738109 : if (param_min_nondebug_insn_uid)
5989 : cur_insn_uid = param_min_nondebug_insn_uid;
5990 : else
5991 1738109 : cur_insn_uid = 1;
5992 1738109 : cur_debug_insn_uid = 1;
5993 1738109 : reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5994 1738109 : first_label_num = label_num;
5995 1738109 : get_current_sequence ()->next = NULL;
5996 :
5997 : /* Init the tables that describe all the pseudo regs. */
5998 :
5999 1738109 : crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
6000 :
6001 1738109 : crtl->emit.regno_pointer_align
6002 1738109 : = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
6003 :
6004 1738109 : regno_reg_rtx
6005 1738109 : = ggc_cleared_vec_alloc<rtx> (crtl->emit.regno_pointer_align_length);
6006 :
6007 : /* Put copies of all the hard registers into regno_reg_rtx. */
6008 1738109 : memcpy (regno_reg_rtx,
6009 1738109 : initial_regno_reg_rtx,
6010 : FIRST_PSEUDO_REGISTER * sizeof (rtx));
6011 :
6012 : /* Put copies of all the virtual register rtx into regno_reg_rtx. */
6013 1738109 : init_virtual_regs ();
6014 :
6015 : /* Indicate that the virtual registers and stack locations are
6016 : all pointers. */
6017 1738109 : REG_POINTER (stack_pointer_rtx) = 1;
6018 1738109 : REG_POINTER (frame_pointer_rtx) = 1;
6019 1738109 : REG_POINTER (hard_frame_pointer_rtx) = 1;
6020 1738109 : REG_POINTER (arg_pointer_rtx) = 1;
6021 :
6022 1738109 : REG_POINTER (virtual_incoming_args_rtx) = 1;
6023 1738109 : REG_POINTER (virtual_stack_vars_rtx) = 1;
6024 1738109 : REG_POINTER (virtual_stack_dynamic_rtx) = 1;
6025 1738109 : REG_POINTER (virtual_outgoing_args_rtx) = 1;
6026 1738109 : REG_POINTER (virtual_cfa_rtx) = 1;
6027 :
6028 : #ifdef STACK_BOUNDARY
6029 1738109 : REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
6030 1738109 : REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6031 1738109 : REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6032 1738109 : REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
6033 :
6034 1738109 : REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
6035 1738109 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
6036 1738109 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
6037 1738109 : REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
6038 :
6039 1738109 : REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
6040 : #endif
6041 :
6042 : #ifdef INIT_EXPANDERS
6043 : INIT_EXPANDERS;
6044 : #endif
6045 1738109 : }
6046 :
6047 : /* Return the value of element I of CONST_VECTOR X as a wide_int. */
6048 :
6049 : wide_int
6050 1068 : const_vector_int_elt (const_rtx x, unsigned int i)
6051 : {
6052 : /* First handle elements that are directly encoded. */
6053 1068 : machine_mode elt_mode = GET_MODE_INNER (GET_MODE (x));
6054 1068 : if (i < (unsigned int) XVECLEN (x, 0))
6055 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, i), elt_mode);
6056 :
6057 : /* Identify the pattern that contains element I and work out the index of
6058 : the last encoded element for that pattern. */
6059 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6060 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6061 1068 : unsigned int count = i / npatterns;
6062 1068 : unsigned int pattern = i % npatterns;
6063 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6064 :
6065 : /* If there are no steps, the final encoded value is the right one. */
6066 1068 : if (!CONST_VECTOR_STEPPED_P (x))
6067 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, final_i), elt_mode);
6068 :
6069 : /* Otherwise work out the value from the last two encoded elements. */
6070 1068 : rtx v1 = CONST_VECTOR_ENCODED_ELT (x, final_i - npatterns);
6071 1068 : rtx v2 = CONST_VECTOR_ENCODED_ELT (x, final_i);
6072 1068 : wide_int diff = wi::sub (rtx_mode_t (v2, elt_mode),
6073 1068 : rtx_mode_t (v1, elt_mode));
6074 1068 : return wi::add (rtx_mode_t (v2, elt_mode), (count - 2) * diff);
6075 1068 : }
6076 :
6077 : /* Return the value of element I of CONST_VECTOR X. */
6078 :
6079 : rtx
6080 4836407 : const_vector_elt (const_rtx x, unsigned int i)
6081 : {
6082 : /* First handle elements that are directly encoded. */
6083 4836407 : if (i < (unsigned int) XVECLEN (x, 0))
6084 4834271 : return CONST_VECTOR_ENCODED_ELT (x, i);
6085 :
6086 : /* If there are no steps, the final encoded value is the right one. */
6087 2136 : if (!CONST_VECTOR_STEPPED_P (x))
6088 : {
6089 : /* Identify the pattern that contains element I and work out the index of
6090 : the last encoded element for that pattern. */
6091 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6092 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6093 1068 : unsigned int pattern = i % npatterns;
6094 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6095 1068 : return CONST_VECTOR_ENCODED_ELT (x, final_i);
6096 : }
6097 :
6098 : /* Otherwise work out the value from the last two encoded elements. */
6099 1068 : return immed_wide_int_const (const_vector_int_elt (x, i),
6100 2136 : GET_MODE_INNER (GET_MODE (x)));
6101 : }
6102 :
6103 : /* Return true if X is a valid element for a CONST_VECTOR of the given
6104 : mode. */
6105 :
6106 : bool
6107 567696 : valid_for_const_vector_p (machine_mode, rtx x)
6108 : {
6109 567696 : return (CONST_SCALAR_INT_P (x)
6110 : || CONST_POLY_INT_P (x)
6111 172211 : || CONST_DOUBLE_AS_FLOAT_P (x)
6112 720313 : || CONST_FIXED_P (x));
6113 : }
6114 :
6115 : /* Generate a vector constant of mode MODE in which every element has
6116 : value ELT. */
6117 :
6118 : rtx
6119 42431027 : gen_const_vec_duplicate (machine_mode mode, rtx elt)
6120 : {
6121 42431027 : rtx_vector_builder builder (mode, 1, 1);
6122 42431027 : builder.quick_push (elt);
6123 42431027 : return builder.build ();
6124 42431027 : }
6125 :
6126 : /* Return a vector rtx of mode MODE in which every element has value X.
6127 : The result will be a constant if X is constant. */
6128 :
6129 : rtx
6130 260678 : gen_vec_duplicate (machine_mode mode, rtx x)
6131 : {
6132 260678 : if (valid_for_const_vector_p (mode, x))
6133 113745 : return gen_const_vec_duplicate (mode, x);
6134 146933 : return gen_rtx_VEC_DUPLICATE (mode, x);
6135 : }
6136 :
6137 : /* A subroutine of const_vec_series_p that handles the case in which:
6138 :
6139 : (GET_CODE (X) == CONST_VECTOR
6140 : && CONST_VECTOR_NPATTERNS (X) == 1
6141 : && !CONST_VECTOR_DUPLICATE_P (X))
6142 :
6143 : is known to hold. */
6144 :
6145 : bool
6146 5783 : const_vec_series_p_1 (const_rtx x, rtx *base_out, rtx *step_out)
6147 : {
6148 : /* Stepped sequences are only defined for integers, to avoid specifying
6149 : rounding behavior. */
6150 5783 : if (GET_MODE_CLASS (GET_MODE (x)) != MODE_VECTOR_INT)
6151 : return false;
6152 :
6153 : /* A non-duplicated vector with two elements can always be seen as a
6154 : series with a nonzero step. Longer vectors must have a stepped
6155 : encoding. */
6156 5783 : if (maybe_ne (CONST_VECTOR_NUNITS (x), 2)
6157 5783 : && !CONST_VECTOR_STEPPED_P (x))
6158 : return false;
6159 :
6160 : /* Calculate the step between the first and second elements. */
6161 5779 : scalar_mode inner = GET_MODE_INNER (GET_MODE (x));
6162 5779 : rtx base = CONST_VECTOR_ELT (x, 0);
6163 11558 : rtx step = simplify_binary_operation (MINUS, inner,
6164 5779 : CONST_VECTOR_ENCODED_ELT (x, 1), base);
6165 5779 : if (rtx_equal_p (step, CONST0_RTX (inner)))
6166 : return false;
6167 :
6168 : /* If we have a stepped encoding, check that the step between the
6169 : second and third elements is the same as STEP. */
6170 5779 : if (CONST_VECTOR_STEPPED_P (x))
6171 : {
6172 9238 : rtx diff = simplify_binary_operation (MINUS, inner,
6173 : CONST_VECTOR_ENCODED_ELT (x, 2),
6174 4619 : CONST_VECTOR_ENCODED_ELT (x, 1));
6175 4619 : if (!rtx_equal_p (step, diff))
6176 : return false;
6177 : }
6178 :
6179 5779 : *base_out = base;
6180 5779 : *step_out = step;
6181 5779 : return true;
6182 : }
6183 :
6184 : /* Generate a vector constant of mode MODE in which element I has
6185 : the value BASE + I * STEP. */
6186 :
6187 : rtx
6188 645 : gen_const_vec_series (machine_mode mode, rtx base, rtx step)
6189 : {
6190 645 : gcc_assert (valid_for_const_vector_p (mode, base)
6191 : && valid_for_const_vector_p (mode, step));
6192 :
6193 645 : rtx_vector_builder builder (mode, 1, 3);
6194 645 : builder.quick_push (base);
6195 2580 : for (int i = 1; i < 3; ++i)
6196 1290 : builder.quick_push (simplify_gen_binary (PLUS, GET_MODE_INNER (mode),
6197 1290 : builder[i - 1], step));
6198 645 : return builder.build ();
6199 645 : }
6200 :
6201 : /* Generate a vector of mode MODE in which element I has the value
6202 : BASE + I * STEP. The result will be a constant if BASE and STEP
6203 : are both constants. */
6204 :
6205 : rtx
6206 4978 : gen_vec_series (machine_mode mode, rtx base, rtx step)
6207 : {
6208 4978 : if (step == const0_rtx)
6209 217 : return gen_vec_duplicate (mode, base);
6210 4761 : if (valid_for_const_vector_p (mode, base)
6211 4761 : && valid_for_const_vector_p (mode, step))
6212 0 : return gen_const_vec_series (mode, base, step);
6213 4761 : return gen_rtx_VEC_SERIES (mode, base, step);
6214 : }
6215 :
6216 : /* Generate a new vector constant for mode MODE and constant value
6217 : CONSTANT. */
6218 :
6219 : static rtx
6220 41034994 : gen_const_vector (machine_mode mode, int constant)
6221 : {
6222 41034994 : machine_mode inner = GET_MODE_INNER (mode);
6223 :
6224 41034994 : gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
6225 :
6226 41034994 : rtx el = const_tiny_rtx[constant][(int) inner];
6227 41034994 : gcc_assert (el);
6228 :
6229 41034994 : return gen_const_vec_duplicate (mode, el);
6230 : }
6231 :
6232 : /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
6233 : all elements are zero, and the one vector when all elements are one. */
6234 : rtx
6235 167467 : gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
6236 : {
6237 334934 : gcc_assert (known_eq (GET_MODE_NUNITS (mode), GET_NUM_ELEM (v)));
6238 :
6239 : /* If the values are all the same, check to see if we can use one of the
6240 : standard constant vectors. */
6241 167467 : if (rtvec_all_equal_p (v))
6242 48173 : return gen_const_vec_duplicate (mode, RTVEC_ELT (v, 0));
6243 :
6244 119294 : unsigned int nunits = GET_NUM_ELEM (v);
6245 119294 : rtx_vector_builder builder (mode, nunits, 1);
6246 813866 : for (unsigned int i = 0; i < nunits; ++i)
6247 575278 : builder.quick_push (RTVEC_ELT (v, i));
6248 119294 : return builder.build (v);
6249 119294 : }
6250 :
6251 : /* Initialise global register information required by all functions. */
6252 :
6253 : void
6254 790796 : init_emit_regs (void)
6255 : {
6256 790796 : int i;
6257 790796 : machine_mode mode;
6258 790796 : mem_attrs *attrs;
6259 :
6260 : /* Reset register attributes */
6261 790796 : reg_attrs_htab->empty ();
6262 :
6263 : /* We need reg_raw_mode, so initialize the modes now. */
6264 790796 : init_reg_modes_target ();
6265 :
6266 : /* Assign register numbers to the globally defined register rtx. */
6267 805908 : stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
6268 805908 : frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
6269 805908 : hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
6270 805908 : arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
6271 2372388 : virtual_incoming_args_rtx =
6272 805908 : gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
6273 2372388 : virtual_stack_vars_rtx =
6274 805908 : gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
6275 2372388 : virtual_stack_dynamic_rtx =
6276 805908 : gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
6277 2372388 : virtual_outgoing_args_rtx =
6278 805908 : gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
6279 805908 : virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
6280 2372388 : virtual_preferred_stack_boundary_rtx =
6281 805908 : gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
6282 :
6283 : /* Initialize RTL for commonly used hard registers. These are
6284 : copied into regno_reg_rtx as we begin to compile each function. */
6285 75125620 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6286 74334824 : initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
6287 :
6288 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
6289 : return_address_pointer_rtx
6290 : = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
6291 : #endif
6292 :
6293 790796 : pic_offset_table_rtx = NULL_RTX;
6294 790796 : if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
6295 20524 : pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
6296 :
6297 : /* Process stack-limiting command-line options. */
6298 790796 : if (opt_fstack_limit_symbol_arg != NULL)
6299 0 : stack_limit_rtx
6300 0 : = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (opt_fstack_limit_symbol_arg));
6301 790796 : if (opt_fstack_limit_register_no >= 0)
6302 0 : stack_limit_rtx = gen_rtx_REG (Pmode, opt_fstack_limit_register_no);
6303 :
6304 98849500 : for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
6305 : {
6306 98058704 : mode = (machine_mode) i;
6307 98058704 : attrs = ggc_cleared_alloc<mem_attrs> ();
6308 98058704 : attrs->align = BITS_PER_UNIT;
6309 98058704 : attrs->addrspace = ADDR_SPACE_GENERIC;
6310 98058704 : if (mode != BLKmode && mode != VOIDmode)
6311 : {
6312 96477112 : attrs->size_known_p = true;
6313 192954224 : attrs->size = GET_MODE_SIZE (mode);
6314 96477112 : if (STRICT_ALIGNMENT)
6315 : attrs->align = GET_MODE_ALIGNMENT (mode);
6316 : }
6317 98058704 : mode_mem_attrs[i] = attrs;
6318 : }
6319 :
6320 790796 : split_branch_probability = profile_probability::uninitialized ();
6321 790796 : }
6322 :
6323 : /* Initialize global machine_mode variables. */
6324 :
6325 : void
6326 294281 : init_derived_machine_modes (void)
6327 : {
6328 294281 : opt_scalar_int_mode mode_iter, opt_byte_mode, opt_word_mode;
6329 2354248 : FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
6330 : {
6331 2059967 : scalar_int_mode mode = mode_iter.require ();
6332 :
6333 2354248 : if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
6334 2059967 : && !opt_byte_mode.exists ())
6335 294281 : opt_byte_mode = mode;
6336 :
6337 4119934 : if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
6338 2059967 : && !opt_word_mode.exists ())
6339 294281 : opt_word_mode = mode;
6340 : }
6341 :
6342 294281 : byte_mode = opt_byte_mode.require ();
6343 294281 : word_mode = opt_word_mode.require ();
6344 294281 : ptr_mode = as_a <scalar_int_mode>
6345 308767 : (mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0).require ());
6346 294281 : }
6347 :
6348 : /* Create some permanent unique rtl objects shared between all functions. */
6349 :
6350 : void
6351 286958 : init_emit_once (void)
6352 : {
6353 286958 : int i;
6354 286958 : machine_mode mode;
6355 286958 : scalar_float_mode double_mode;
6356 286958 : opt_scalar_mode smode_iter;
6357 :
6358 : /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
6359 : CONST_FIXED, and memory attribute hash tables. */
6360 286958 : const_int_htab = hash_table<const_int_hasher>::create_ggc (37);
6361 :
6362 : #if TARGET_SUPPORTS_WIDE_INT
6363 286958 : const_wide_int_htab = hash_table<const_wide_int_hasher>::create_ggc (37);
6364 : #endif
6365 286958 : const_double_htab = hash_table<const_double_hasher>::create_ggc (37);
6366 :
6367 286958 : if (NUM_POLY_INT_COEFFS > 1)
6368 : const_poly_int_htab = hash_table<const_poly_int_hasher>::create_ggc (37);
6369 :
6370 286958 : const_fixed_htab = hash_table<const_fixed_hasher>::create_ggc (37);
6371 :
6372 286958 : reg_attrs_htab = hash_table<reg_attr_hasher>::create_ggc (37);
6373 :
6374 : #ifdef INIT_EXPANDERS
6375 : /* This is to initialize {init|mark|free}_machine_status before the first
6376 : call to push_function_context_to. This is needed by the Chill front
6377 : end which calls push_function_context_to before the first call to
6378 : init_function_start. */
6379 : INIT_EXPANDERS;
6380 : #endif
6381 :
6382 : /* Create the unique rtx's for certain rtx codes and operand values. */
6383 :
6384 : /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
6385 : tries to use these variables. */
6386 37304540 : for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
6387 74035164 : const_int_rtx[i + MAX_SAVED_CONST_INT] =
6388 37017582 : gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
6389 :
6390 286958 : if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
6391 : && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
6392 286958 : const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
6393 : else
6394 : const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
6395 :
6396 286958 : mode = targetm.c.mode_for_floating_type (TI_DOUBLE_TYPE);
6397 286958 : double_mode = as_a<scalar_float_mode> (mode);
6398 :
6399 286958 : real_from_integer (&dconst0, double_mode, 0, SIGNED);
6400 286958 : real_from_integer (&dconst1, double_mode, 1, SIGNED);
6401 286958 : real_from_integer (&dconst2, double_mode, 2, SIGNED);
6402 :
6403 286958 : dconstm0 = dconst0;
6404 286958 : dconstm0.sign = 1;
6405 :
6406 286958 : dconstm1 = dconst1;
6407 286958 : dconstm1.sign = 1;
6408 :
6409 286958 : dconsthalf = dconst1;
6410 286958 : SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
6411 :
6412 286958 : real_inf (&dconstinf);
6413 286958 : real_inf (&dconstninf, true);
6414 :
6415 1434790 : for (i = 0; i < 3; i++)
6416 : {
6417 860874 : const REAL_VALUE_TYPE *const r =
6418 : (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
6419 :
6420 6026118 : FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
6421 5165244 : const_tiny_rtx[i][(int) mode] =
6422 5165244 : const_double_from_real_value (*r, mode);
6423 :
6424 3443496 : FOR_EACH_MODE_IN_CLASS (mode, MODE_DECIMAL_FLOAT)
6425 2582622 : const_tiny_rtx[i][(int) mode] =
6426 2582622 : const_double_from_real_value (*r, mode);
6427 :
6428 860874 : const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
6429 :
6430 6886992 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6431 6026118 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6432 :
6433 2582622 : for (mode = MIN_MODE_PARTIAL_INT;
6434 3443496 : mode <= MAX_MODE_PARTIAL_INT;
6435 2582622 : mode = (machine_mode)((int)(mode) + 1))
6436 2582622 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6437 : }
6438 :
6439 286958 : const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
6440 :
6441 2295664 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6442 2008706 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6443 :
6444 : /* For BImode, 1 and -1 are unsigned and signed interpretations
6445 : of the same value. */
6446 286958 : for (mode = MIN_MODE_BOOL;
6447 573916 : mode <= MAX_MODE_BOOL;
6448 286958 : mode = (machine_mode)((int)(mode) + 1))
6449 : {
6450 286958 : const_tiny_rtx[0][(int) mode] = const0_rtx;
6451 286958 : if (mode == BImode)
6452 : {
6453 286958 : const_tiny_rtx[1][(int) mode] = const_true_rtx;
6454 286958 : const_tiny_rtx[3][(int) mode] = const_true_rtx;
6455 : }
6456 : else
6457 : {
6458 : const_tiny_rtx[1][(int) mode] = const1_rtx;
6459 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6460 : }
6461 : }
6462 :
6463 860874 : for (mode = MIN_MODE_PARTIAL_INT;
6464 1147832 : mode <= MAX_MODE_PARTIAL_INT;
6465 860874 : mode = (machine_mode)((int)(mode) + 1))
6466 860874 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6467 :
6468 3156538 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_INT)
6469 : {
6470 2869580 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6471 2869580 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6472 : }
6473 :
6474 2008706 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT)
6475 : {
6476 1721748 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6477 1721748 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6478 : }
6479 :
6480 286958 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_BOOL)
6481 : {
6482 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6483 0 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6484 0 : if (GET_MODE_INNER (mode) == BImode)
6485 : /* As for BImode, "all 1" and "all -1" are unsigned and signed
6486 : interpretations of the same value. */
6487 : const_tiny_rtx[1][(int) mode] = const_tiny_rtx[3][(int) mode];
6488 : else
6489 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6490 : }
6491 :
6492 9182656 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)
6493 : {
6494 8895698 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6495 8895698 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6496 8895698 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6497 : }
6498 :
6499 7460908 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FLOAT)
6500 : {
6501 7173950 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6502 7173950 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6503 : }
6504 :
6505 1721748 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_FRACT)
6506 : {
6507 1434790 : scalar_mode smode = smode_iter.require ();
6508 1434790 : FCONST0 (smode).data.high = 0;
6509 1434790 : FCONST0 (smode).data.low = 0;
6510 1434790 : FCONST0 (smode).mode = smode;
6511 2869580 : const_tiny_rtx[0][(int) smode]
6512 1434790 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6513 : }
6514 :
6515 1721748 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UFRACT)
6516 : {
6517 1434790 : scalar_mode smode = smode_iter.require ();
6518 1434790 : FCONST0 (smode).data.high = 0;
6519 1434790 : FCONST0 (smode).data.low = 0;
6520 1434790 : FCONST0 (smode).mode = smode;
6521 2869580 : const_tiny_rtx[0][(int) smode]
6522 1434790 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6523 : }
6524 :
6525 1434790 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_ACCUM)
6526 : {
6527 1147832 : scalar_mode smode = smode_iter.require ();
6528 1147832 : FCONST0 (smode).data.high = 0;
6529 1147832 : FCONST0 (smode).data.low = 0;
6530 1147832 : FCONST0 (smode).mode = smode;
6531 2295664 : const_tiny_rtx[0][(int) smode]
6532 1147832 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6533 :
6534 : /* We store the value 1. */
6535 1147832 : FCONST1 (smode).data.high = 0;
6536 1147832 : FCONST1 (smode).data.low = 0;
6537 1147832 : FCONST1 (smode).mode = smode;
6538 1147832 : FCONST1 (smode).data
6539 1147832 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6540 : HOST_BITS_PER_DOUBLE_INT,
6541 1147832 : SIGNED_FIXED_POINT_MODE_P (smode));
6542 2295664 : const_tiny_rtx[1][(int) smode]
6543 1147832 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6544 : }
6545 :
6546 1434790 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UACCUM)
6547 : {
6548 1147832 : scalar_mode smode = smode_iter.require ();
6549 1147832 : FCONST0 (smode).data.high = 0;
6550 1147832 : FCONST0 (smode).data.low = 0;
6551 1147832 : FCONST0 (smode).mode = smode;
6552 2295664 : const_tiny_rtx[0][(int) smode]
6553 1147832 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6554 :
6555 : /* We store the value 1. */
6556 1147832 : FCONST1 (smode).data.high = 0;
6557 1147832 : FCONST1 (smode).data.low = 0;
6558 1147832 : FCONST1 (smode).mode = smode;
6559 1147832 : FCONST1 (smode).data
6560 1147832 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6561 : HOST_BITS_PER_DOUBLE_INT,
6562 1147832 : SIGNED_FIXED_POINT_MODE_P (smode));
6563 2295664 : const_tiny_rtx[1][(int) smode]
6564 1147832 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6565 : }
6566 :
6567 286958 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FRACT)
6568 : {
6569 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6570 : }
6571 :
6572 286958 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UFRACT)
6573 : {
6574 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6575 : }
6576 :
6577 286958 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_ACCUM)
6578 : {
6579 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6580 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6581 : }
6582 :
6583 286958 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UACCUM)
6584 : {
6585 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6586 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6587 : }
6588 :
6589 35295834 : for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
6590 35008876 : if (GET_MODE_CLASS ((machine_mode) i) == MODE_CC)
6591 3443496 : const_tiny_rtx[0][i] = const0_rtx;
6592 :
6593 286958 : pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
6594 286958 : ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
6595 286958 : simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
6596 286958 : invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
6597 : /*prev_insn=*/NULL,
6598 : /*next_insn=*/NULL,
6599 : /*bb=*/NULL,
6600 : /*pattern=*/NULL_RTX,
6601 : /*location=*/-1,
6602 : CODE_FOR_nothing,
6603 : /*reg_notes=*/NULL_RTX);
6604 286958 : }
6605 :
6606 : /* Produce exact duplicate of insn INSN after AFTER.
6607 : Care updating of libcall regions if present. */
6608 :
6609 : rtx_insn *
6610 3702683 : emit_copy_of_insn_after (rtx_insn *insn, rtx_insn *after)
6611 : {
6612 3702683 : rtx_insn *new_rtx;
6613 3702683 : rtx link;
6614 :
6615 3702683 : switch (GET_CODE (insn))
6616 : {
6617 1708738 : case INSN:
6618 1708738 : new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6619 1708738 : break;
6620 :
6621 499064 : case JUMP_INSN:
6622 499064 : new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6623 499064 : CROSSING_JUMP_P (new_rtx) = CROSSING_JUMP_P (insn);
6624 499064 : break;
6625 :
6626 1469219 : case DEBUG_INSN:
6627 1469219 : new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6628 1469219 : break;
6629 :
6630 25662 : case CALL_INSN:
6631 25662 : new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6632 25662 : if (CALL_INSN_FUNCTION_USAGE (insn))
6633 23179 : CALL_INSN_FUNCTION_USAGE (new_rtx)
6634 23179 : = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6635 25662 : CALL_INSN_ABI_ID (new_rtx) = CALL_INSN_ABI_ID (insn);
6636 25662 : SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6637 25662 : RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6638 25662 : RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6639 25662 : RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6640 25662 : = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6641 25662 : break;
6642 :
6643 0 : default:
6644 0 : gcc_unreachable ();
6645 : }
6646 :
6647 : /* Update LABEL_NUSES. */
6648 3702683 : if (NONDEBUG_INSN_P (insn))
6649 2233464 : mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6650 :
6651 3702683 : INSN_LOCATION (new_rtx) = INSN_LOCATION (insn);
6652 :
6653 : /* If the old insn is frame related, then so is the new one. This is
6654 : primarily needed for IA-64 unwind info which marks epilogue insns,
6655 : which may be duplicated by the basic block reordering code. */
6656 3702683 : RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6657 :
6658 : /* Locate the end of existing REG_NOTES in NEW_RTX. */
6659 3702683 : rtx *ptail = ®_NOTES (new_rtx);
6660 3702689 : while (*ptail != NULL_RTX)
6661 6 : ptail = &XEXP (*ptail, 1);
6662 :
6663 : /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6664 : will make them. REG_LABEL_TARGETs are created there too, but are
6665 : supposed to be sticky, so we copy them. */
6666 6017887 : for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6667 2315204 : if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6668 : {
6669 2315198 : *ptail = duplicate_reg_note (link);
6670 2315198 : ptail = &XEXP (*ptail, 1);
6671 : }
6672 :
6673 3702683 : INSN_CODE (new_rtx) = INSN_CODE (insn);
6674 3702683 : return new_rtx;
6675 : }
6676 :
6677 : static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6678 : rtx
6679 4623482 : gen_hard_reg_clobber (machine_mode mode, unsigned int regno)
6680 : {
6681 4623482 : if (hard_reg_clobbers[mode][regno])
6682 : return hard_reg_clobbers[mode][regno];
6683 : else
6684 191991 : return (hard_reg_clobbers[mode][regno] =
6685 383982 : gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6686 : }
6687 :
6688 : location_t prologue_location;
6689 : location_t epilogue_location;
6690 :
6691 : /* Hold current location information and last location information, so the
6692 : datastructures are built lazily only when some instructions in given
6693 : place are needed. */
6694 : static location_t curr_location;
6695 :
6696 : /* Allocate insn location datastructure. */
6697 : void
6698 1751425 : insn_locations_init (void)
6699 : {
6700 1751425 : prologue_location = epilogue_location = 0;
6701 1751425 : curr_location = UNKNOWN_LOCATION;
6702 1751425 : }
6703 :
6704 : /* At the end of emit stage, clear current location. */
6705 : void
6706 1514059 : insn_locations_finalize (void)
6707 : {
6708 1514059 : epilogue_location = curr_location;
6709 1514059 : curr_location = UNKNOWN_LOCATION;
6710 1514059 : }
6711 :
6712 : /* Set current location. */
6713 : void
6714 157711036 : set_curr_insn_location (location_t location)
6715 : {
6716 157711036 : curr_location = location;
6717 157711036 : }
6718 :
6719 : /* Get current location. */
6720 : location_t
6721 272501659 : curr_insn_location (void)
6722 : {
6723 272501659 : return curr_location;
6724 : }
6725 :
6726 : /* Set the location of the insn chain starting at INSN to LOC. */
6727 : void
6728 3663902 : set_insn_locations (rtx_insn *insn, location_t loc)
6729 : {
6730 16436535 : while (insn)
6731 : {
6732 12772633 : if (INSN_P (insn))
6733 10805728 : INSN_LOCATION (insn) = loc;
6734 12772633 : insn = NEXT_INSN (insn);
6735 : }
6736 3663902 : }
6737 :
6738 : /* Return lexical scope block insn belongs to. */
6739 : tree
6740 50021102 : insn_scope (const rtx_insn *insn)
6741 : {
6742 50021102 : return LOCATION_BLOCK (INSN_LOCATION (insn));
6743 : }
6744 :
6745 : /* Return line number of the statement that produced this insn. */
6746 : int
6747 0 : insn_line (const rtx_insn *insn)
6748 : {
6749 0 : return LOCATION_LINE (INSN_LOCATION (insn));
6750 : }
6751 :
6752 : /* Return source file of the statement that produced this insn. */
6753 : const char *
6754 0 : insn_file (const rtx_insn *insn)
6755 : {
6756 0 : return LOCATION_FILE (INSN_LOCATION (insn));
6757 : }
6758 :
6759 : /* Return expanded location of the statement that produced this insn. */
6760 : expanded_location
6761 85569009 : insn_location (const rtx_insn *insn)
6762 : {
6763 85569009 : return expand_location (INSN_LOCATION (insn));
6764 : }
6765 :
6766 : /* Return true if memory model MODEL requires a pre-operation (release-style)
6767 : barrier or a post-operation (acquire-style) barrier. While not universal,
6768 : this function matches behavior of several targets. */
6769 :
6770 : bool
6771 0 : need_atomic_barrier_p (enum memmodel model, bool pre)
6772 : {
6773 0 : switch (model & MEMMODEL_BASE_MASK)
6774 : {
6775 : case MEMMODEL_RELAXED:
6776 : case MEMMODEL_CONSUME:
6777 : return false;
6778 0 : case MEMMODEL_RELEASE:
6779 0 : return pre;
6780 0 : case MEMMODEL_ACQUIRE:
6781 0 : return !pre;
6782 0 : case MEMMODEL_ACQ_REL:
6783 0 : case MEMMODEL_SEQ_CST:
6784 0 : return true;
6785 0 : default:
6786 0 : gcc_unreachable ();
6787 : }
6788 : }
6789 :
6790 : /* Return a constant shift amount for shifting a value of mode MODE
6791 : by VALUE bits. */
6792 :
6793 : rtx
6794 213489781 : gen_int_shift_amount (machine_mode, poly_int64 value)
6795 : {
6796 : /* Use a 64-bit mode, to avoid any truncation.
6797 :
6798 : ??? Perhaps this should be automatically derived from the .md files
6799 : instead, or perhaps have a target hook. */
6800 213489781 : scalar_int_mode shift_mode = (BITS_PER_UNIT == 8
6801 : ? DImode
6802 : : int_mode_for_size (64, 0).require ());
6803 213489781 : return gen_int_mode (value, shift_mode);
6804 : }
6805 :
6806 : namespace {
6807 : /* Helper class for expanding an rtx using the encoding generated by
6808 : genemit.cc. The code needs to be kept in sync with there. */
6809 :
6810 : class rtx_expander
6811 : {
6812 : public:
6813 : rtx_expander (const uint8_t *, rtx *);
6814 :
6815 : rtx get_rtx ();
6816 : rtvec get_rtvec ();
6817 : void expand_seq ();
6818 :
6819 : protected:
6820 : uint64_t get_uint ();
6821 86187326 : machine_mode get_mode () { return machine_mode (get_uint ()); }
6822 : char *get_string ();
6823 : rtx get_shared_operand ();
6824 : rtx get_unshared_operand ();
6825 :
6826 : rtx get_rtx (expand_opcode);
6827 : rtx get_rtx (rtx_code, machine_mode);
6828 :
6829 : /* Points to the first unread byte. */
6830 : const uint8_t *m_seq;
6831 :
6832 : /* The operands passed to the gen_* function. */
6833 : rtx *m_operands;
6834 :
6835 : /* A bitmap of operands that have already been used to replace a
6836 : MATCH_OPERAND or MATCH_DUP. In order to ensure correct sharing,
6837 : further replacements need to use a copy of the operand, rather than
6838 : the original rtx. */
6839 : bbitmap<MAX_RECOG_OPERANDS> m_used;
6840 : };
6841 : }
6842 :
6843 25561246 : rtx_expander::rtx_expander (const uint8_t *seq, rtx *operands)
6844 25561246 : : m_seq (seq), m_operands (operands), m_used ()
6845 0 : {}
6846 :
6847 : /* Read and return the next encoded "BEB128" integer. */
6848 :
6849 : inline uint64_t
6850 249369010 : rtx_expander::get_uint ()
6851 : {
6852 249369010 : const uint8_t *seq = m_seq;
6853 249369010 : uint64_t res = 0;
6854 251600294 : do
6855 251600294 : res = (res << 7) | (*seq & 127);
6856 251600294 : while (*seq++ >= 128);
6857 249369010 : m_seq = seq;
6858 249369010 : return res;
6859 : }
6860 :
6861 : /* Read an operand number and return the associated operand rtx,
6862 : without copying it. */
6863 :
6864 : rtx
6865 892246 : rtx_expander::get_shared_operand ()
6866 : {
6867 892246 : return m_operands[get_uint ()];
6868 : }
6869 :
6870 : /* Read an operand number and return a correctly-shared instance of
6871 : the associated operand rtx. This can be either the original rtx
6872 : or a copy. */
6873 :
6874 : rtx
6875 45831942 : rtx_expander::get_unshared_operand ()
6876 : {
6877 45831942 : auto opno = get_uint ();
6878 45831942 : auto mask = m_used.from_index (opno);
6879 45831942 : if (m_used & mask)
6880 2957849 : return copy_rtx (m_operands[opno]);
6881 :
6882 42874093 : m_used |= mask;
6883 42874093 : return m_operands[opno];
6884 : }
6885 :
6886 : /* Read an encoded rtx. */
6887 :
6888 : rtx
6889 130287613 : rtx_expander::get_rtx ()
6890 : {
6891 130287613 : auto FIRST_CODE = (unsigned) expand_opcode::FIRST_CODE;
6892 130287613 : auto opcode = get_uint ();
6893 130287613 : if (opcode < FIRST_CODE)
6894 51347670 : return get_rtx (expand_opcode (opcode));
6895 78939943 : return get_rtx (rtx_code (opcode - FIRST_CODE), NUM_MACHINE_MODES);
6896 : }
6897 :
6898 : /* Read an encoded rtx that starts with the given opcode. */
6899 :
6900 : rtx
6901 51347670 : rtx_expander::get_rtx (expand_opcode opcode)
6902 : {
6903 51347670 : switch (opcode)
6904 : {
6905 : case expand_opcode::NO_RTX:
6906 : return NULL_RTX;
6907 :
6908 45831942 : case expand_opcode::MATCH_OPERAND:
6909 45831942 : return get_unshared_operand ();
6910 :
6911 42512 : case expand_opcode::MATCH_OPERATOR_WITH_MODE:
6912 42512 : {
6913 42512 : auto mode = get_mode ();
6914 42512 : auto op = get_shared_operand ();
6915 42512 : return get_rtx (GET_CODE (op), mode);
6916 : }
6917 :
6918 847908 : case expand_opcode::MATCH_OPERATOR:
6919 847908 : {
6920 847908 : auto op = get_shared_operand ();
6921 847908 : return get_rtx (GET_CODE (op), GET_MODE (op));
6922 : }
6923 :
6924 1826 : case expand_opcode::MATCH_PARALLEL:
6925 1826 : return get_shared_operand ();
6926 :
6927 4623482 : case expand_opcode::CLOBBER_REG:
6928 4623482 : {
6929 4623482 : auto mode = get_mode ();
6930 4623482 : auto regno = get_uint ();
6931 4623482 : return gen_hard_reg_clobber (mode, regno);
6932 : }
6933 :
6934 : case expand_opcode::FIRST_CODE:
6935 : break;
6936 : }
6937 0 : gcc_unreachable ();
6938 : }
6939 :
6940 : /* Read the rest of an rtx of code CODE. If such rtxes are not always
6941 : VOIDmode, MODE is the mode that the rtx should have, or NUM_MACHINE_MODES
6942 : if the mode is encoded at the current iterator position. */
6943 :
6944 : rtx
6945 79830363 : rtx_expander::get_rtx (rtx_code code, machine_mode mode)
6946 : {
6947 79830363 : switch (code)
6948 : {
6949 : /* Please keep the cases below in sync with gengenrtl.cc:special_rtx. */
6950 :
6951 0 : case EXPR_LIST:
6952 0 : case INSN_LIST:
6953 0 : case INSN:
6954 0 : gcc_unreachable ();
6955 :
6956 4881381 : case CONST_INT:
6957 9762762 : return GEN_INT (get_uint ());
6958 :
6959 1932840 : case REG:
6960 1932840 : if (mode == NUM_MACHINE_MODES)
6961 3865680 : mode = get_mode ();
6962 3865680 : return gen_rtx_REG (mode, get_uint ());
6963 :
6964 51789 : case SUBREG:
6965 51789 : {
6966 51789 : if (mode == NUM_MACHINE_MODES)
6967 103578 : mode = get_mode ();
6968 51789 : auto reg = get_rtx ();
6969 51789 : auto byte = get_uint ();
6970 51789 : return gen_rtx_SUBREG (mode, reg, byte);
6971 : }
6972 :
6973 2504785 : case MEM:
6974 2504785 : if (mode == NUM_MACHINE_MODES)
6975 5009570 : mode = get_mode ();
6976 2504785 : return gen_rtx_MEM (mode, get_rtx ());
6977 :
6978 9658225 : case PC:
6979 9658225 : return pc_rtx;
6980 :
6981 0 : case RETURN:
6982 0 : return ret_rtx;
6983 :
6984 1611179 : case SIMPLE_RETURN:
6985 1611179 : return simple_return_rtx;
6986 :
6987 1922 : case CONST_VECTOR:
6988 1922 : if (mode == NUM_MACHINE_MODES)
6989 3844 : mode = get_mode ();
6990 1922 : return gen_rtx_CONST_VECTOR (mode, get_rtvec ());
6991 :
6992 : /* Please keep the cases below in sync with
6993 : gengenrtl.cc:excluded_rtx. */
6994 :
6995 0 : case VAR_LOCATION:
6996 0 : gcc_unreachable ();
6997 :
6998 0 : case CONST_DOUBLE:
6999 : /* genemit.cc only accepts zero const_doubles. */
7000 0 : if (mode == NUM_MACHINE_MODES)
7001 0 : mode = get_mode ();
7002 0 : return CONST0_RTX (mode);
7003 :
7004 0 : case CONST_WIDE_INT:
7005 0 : case CONST_POLY_INT:
7006 0 : case CONST_FIXED:
7007 0 : gcc_unreachable ();
7008 :
7009 59188242 : default:
7010 59188242 : break;
7011 : }
7012 :
7013 59188242 : rtx x = rtx_alloc (code);
7014 59188242 : if (!always_void_p (code))
7015 : {
7016 34826753 : if (mode == NUM_MACHINE_MODES)
7017 67872666 : mode = get_mode ();
7018 34826753 : PUT_MODE_RAW (x, mode);
7019 : }
7020 :
7021 59188242 : const char *fmt = GET_RTX_FORMAT (code);
7022 152993485 : for (unsigned int i = 0; fmt[i]; ++i)
7023 93805243 : switch (fmt[i])
7024 : {
7025 : /* Please keep these cases in sync with
7026 : gengenrtl.cc:type_from_format. */
7027 :
7028 1849211 : case 'i':
7029 1849211 : XINT (x, i) = get_uint ();
7030 1849211 : break;
7031 :
7032 0 : case 'L':
7033 0 : case 'w':
7034 0 : case 'p':
7035 0 : case 's':
7036 0 : gcc_unreachable ();
7037 :
7038 84455829 : case 'e': case 'u':
7039 84455829 : XEXP (x, i) = get_rtx ();
7040 84455829 : break;
7041 :
7042 7500203 : case 'E':
7043 7500203 : XVEC (x, i) = get_rtvec ();
7044 7500203 : break;
7045 :
7046 0 : case 't':
7047 0 : case 'B':
7048 0 : default:
7049 0 : gcc_unreachable ();
7050 : }
7051 :
7052 : return x;
7053 : }
7054 :
7055 : /* Read an encoded rtvec. */
7056 :
7057 : rtvec
7058 7502125 : rtx_expander::get_rtvec ()
7059 : {
7060 7502125 : unsigned int len = get_uint ();
7061 7502125 : rtvec v = rtvec_alloc (len);
7062 31666773 : for (unsigned int i = 0; i < len; ++i)
7063 16662523 : RTVEC_ELT (v, i) = get_rtx ();
7064 7502125 : return v;
7065 : }
7066 :
7067 : /* Read and emit an encoded sequence of instructions. */
7068 :
7069 : void
7070 8422718 : rtx_expander::expand_seq ()
7071 : {
7072 8422718 : unsigned int len = get_uint ();
7073 17896877 : for (unsigned int i = 0; i < len; ++i)
7074 9474159 : emit (get_rtx (), i < len - 1);
7075 8422718 : }
7076 :
7077 : /* Read an rtx from the bytecode in SEQ, which was generated by genemit.cc.
7078 : Replace operand placeholders with the values given in OPERANDS. */
7079 :
7080 : rtx
7081 17138528 : expand_rtx (const uint8_t *seq, rtx *operands)
7082 : {
7083 17138528 : return rtx_expander (seq, operands).get_rtx ();
7084 : }
7085 :
7086 : /* Read and emit a sequence of instructions from the bytecode in SEQ,
7087 : which was generated by genemit.cc. Replace operand placeholders with
7088 : the values given in OPERANDS. */
7089 :
7090 : rtx_insn *
7091 8422718 : complete_seq (const uint8_t *seq, rtx *operands)
7092 : {
7093 8422718 : rtx_expander (seq, operands).expand_seq ();
7094 8422718 : return end_sequence ();
7095 : }
7096 :
7097 : /* Note in the dump file that WHAT, which names a define_split or a
7098 : define_peephole2 and where it came from, is being applied. genemit.cc
7099 : emits a call to this rather than the test and the fprintf, so that the
7100 : dump is written out once instead of once per pattern. */
7101 :
7102 : void
7103 8572352 : note_split (const char *what)
7104 : {
7105 8572352 : if (dump_file)
7106 111 : fprintf (dump_file, "Splitting with %s\n", what);
7107 8572352 : }
7108 :
7109 : /* Initialize fields of rtl_data related to stack alignment. */
7110 :
7111 : void
7112 1512268 : rtl_data::init_stack_alignment ()
7113 : {
7114 1512268 : stack_alignment_needed = STACK_BOUNDARY;
7115 1512268 : max_used_stack_slot_alignment = STACK_BOUNDARY;
7116 1512268 : stack_alignment_estimated = 0;
7117 1512268 : preferred_stack_boundary = STACK_BOUNDARY;
7118 1512268 : }
7119 :
7120 :
7121 : #include "gt-emit-rtl.h"
|
