Line data Source code
1 : /* Emit RTL for the GCC expander.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 :
21 : /* Middle-to-low level generation of rtx code and insns.
22 :
23 : This file contains support functions for creating rtl expressions
24 : and manipulating them in the doubly-linked chain of insns.
25 :
26 : The patterns of the insns are created by machine-dependent
27 : routines in insn-emit.cc, which is generated automatically from
28 : the machine description. These routines make the individual rtx's
29 : of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 : which are automatically generated from rtl.def; what is machine
31 : dependent is the kind of rtx's they make and what arguments they
32 : use. */
33 :
34 : #include "config.h"
35 : #include "system.h"
36 : #include "coretypes.h"
37 : #include "memmodel.h"
38 : #include "backend.h"
39 : #include "target.h"
40 : #include "rtl.h"
41 : #include "tree.h"
42 : #include "df.h"
43 : #include "tm_p.h"
44 : #include "stringpool.h"
45 : #include "insn-config.h"
46 : #include "regs.h"
47 : #include "emit-rtl.h"
48 : #include "recog.h"
49 : #include "diagnostic-core.h"
50 : #include "alias.h"
51 : #include "fold-const.h"
52 : #include "varasm.h"
53 : #include "cfgrtl.h"
54 : #include "tree-eh.h"
55 : #include "explow.h"
56 : #include "expr.h"
57 : #include "builtins.h"
58 : #include "rtl-iter.h"
59 : #include "stor-layout.h"
60 : #include "opts.h"
61 : #include "optabs.h"
62 : #include "predict.h"
63 : #include "rtx-vector-builder.h"
64 : #include "gimple.h"
65 : #include "gimple-ssa.h"
66 : #include "bbitmap.h"
67 :
68 : struct target_rtl default_target_rtl;
69 : #if SWITCHABLE_TARGET
70 : struct target_rtl *this_target_rtl = &default_target_rtl;
71 : #endif
72 :
73 : #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
74 :
75 : /* Commonly used modes. */
76 :
77 : scalar_int_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
78 : scalar_int_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
79 : scalar_int_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
80 :
81 : /* Datastructures maintained for currently processed function in RTL form. */
82 :
83 : struct rtl_data x_rtl;
84 :
85 : /* Indexed by pseudo register number, gives the rtx for that pseudo.
86 : Allocated in parallel with regno_pointer_align.
87 : FIXME: We could put it into emit_status struct, but gengtype is not able to deal
88 : with length attribute nested in top level structures. */
89 :
90 : rtx * regno_reg_rtx;
91 :
92 : /* This is *not* reset after each function. It gives each CODE_LABEL
93 : in the entire compilation a unique label number. */
94 :
95 : static GTY(()) int label_num = 1;
96 :
97 : /* We record floating-point CONST_DOUBLEs in each floating-point mode for
98 : the values of 0, 1, and 2. For the integer entries and VOIDmode, we
99 : record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
100 : is set only for MODE_INT and MODE_VECTOR_INT modes. */
101 :
102 : rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 :
104 : rtx const_true_rtx;
105 :
106 : REAL_VALUE_TYPE dconst0;
107 : REAL_VALUE_TYPE dconst1;
108 : REAL_VALUE_TYPE dconst2;
109 : REAL_VALUE_TYPE dconstm0;
110 : REAL_VALUE_TYPE dconstm1;
111 : REAL_VALUE_TYPE dconsthalf;
112 : REAL_VALUE_TYPE dconstinf;
113 : REAL_VALUE_TYPE dconstninf;
114 :
115 : /* Record fixed-point constant 0 and 1. */
116 : FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
117 : FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
118 :
119 : /* We make one copy of (const_int C) where C is in
120 : [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
121 : to save space during the compilation and simplify comparisons of
122 : integers. */
123 :
124 : rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
125 :
126 : /* Standard pieces of rtx, to be substituted directly into things. */
127 : rtx pc_rtx;
128 : rtx ret_rtx;
129 : rtx simple_return_rtx;
130 :
131 : /* Marker used for denoting an INSN, which should never be accessed (i.e.,
132 : this pointer should normally never be dereferenced), but is required to be
133 : distinct from NULL_RTX. Currently used by peephole2 pass. */
134 : rtx_insn *invalid_insn_rtx;
135 :
136 : /* A hash table storing CONST_INTs whose absolute value is greater
137 : than MAX_SAVED_CONST_INT. */
138 :
139 : struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
140 : {
141 : typedef HOST_WIDE_INT compare_type;
142 :
143 : static hashval_t hash (rtx i);
144 : static bool equal (rtx i, HOST_WIDE_INT h);
145 : };
146 :
147 : static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
148 :
149 : struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
150 : {
151 : static hashval_t hash (rtx x);
152 : static bool equal (rtx x, rtx y);
153 : };
154 :
155 : static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
156 :
157 : struct const_poly_int_hasher : ggc_cache_ptr_hash<rtx_def>
158 : {
159 : typedef std::pair<machine_mode, poly_wide_int_ref> compare_type;
160 :
161 : static hashval_t hash (rtx x);
162 : static bool equal (rtx x, const compare_type &y);
163 : };
164 :
165 : static GTY ((cache)) hash_table<const_poly_int_hasher> *const_poly_int_htab;
166 :
167 : /* A hash table storing register attribute structures. */
168 : struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
169 : {
170 : static hashval_t hash (reg_attrs *x);
171 : static bool equal (reg_attrs *a, reg_attrs *b);
172 : };
173 :
174 : static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
175 :
176 : /* A hash table storing all CONST_DOUBLEs. */
177 : struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
178 : {
179 : static hashval_t hash (rtx x);
180 : static bool equal (rtx x, rtx y);
181 : };
182 :
183 : static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
184 :
185 : /* A hash table storing all CONST_FIXEDs. */
186 : struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
187 : {
188 : static hashval_t hash (rtx x);
189 : static bool equal (rtx x, rtx y);
190 : };
191 :
192 : static GTY ((cache)) hash_table<const_fixed_hasher> *const_fixed_htab;
193 :
194 : #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
195 : #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
196 : #define first_label_num (crtl->emit.x_first_label_num)
197 :
198 : static void set_used_decls (tree);
199 : static void mark_label_nuses (rtx);
200 : #if TARGET_SUPPORTS_WIDE_INT
201 : static rtx lookup_const_wide_int (rtx);
202 : #endif
203 : static rtx lookup_const_double (rtx);
204 : static rtx lookup_const_fixed (rtx);
205 : static rtx gen_const_vector (machine_mode, int);
206 : static void copy_rtx_if_shared_1 (rtx *orig);
207 :
208 : /* Probability of the conditional branch currently proceeded by try_split. */
209 : profile_probability split_branch_probability;
210 :
211 : /* Returns a hash code for X (which is a really a CONST_INT). */
212 :
213 : hashval_t
214 3424437621 : const_int_hasher::hash (rtx x)
215 : {
216 3424437621 : return (hashval_t) INTVAL (x);
217 : }
218 :
219 : /* Returns true if the value represented by X (which is really a
220 : CONST_INT) is the same as that given by Y (which is really a
221 : HOST_WIDE_INT *). */
222 :
223 : bool
224 4324124901 : const_int_hasher::equal (rtx x, HOST_WIDE_INT y)
225 : {
226 4324124901 : return (INTVAL (x) == y);
227 : }
228 :
229 : #if TARGET_SUPPORTS_WIDE_INT
230 : /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
231 :
232 : hashval_t
233 1431843 : const_wide_int_hasher::hash (rtx x)
234 : {
235 1431843 : int i;
236 1431843 : unsigned HOST_WIDE_INT hash = 0;
237 1431843 : const_rtx xr = x;
238 :
239 4322098 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
240 2890255 : hash += CONST_WIDE_INT_ELT (xr, i);
241 :
242 1431843 : return (hashval_t) hash;
243 : }
244 :
245 : /* Returns true if the value represented by X (which is really a
246 : CONST_WIDE_INT) is the same as that given by Y (which is really a
247 : CONST_WIDE_INT). */
248 :
249 : bool
250 1455982 : const_wide_int_hasher::equal (rtx x, rtx y)
251 : {
252 1455982 : int i;
253 1455982 : const_rtx xr = x;
254 1455982 : const_rtx yr = y;
255 1455982 : if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
256 : return false;
257 :
258 2529493 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
259 2021184 : if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
260 : return false;
261 :
262 : return true;
263 : }
264 : #endif
265 :
266 : /* Returns a hash code for CONST_POLY_INT X. */
267 :
268 : hashval_t
269 0 : const_poly_int_hasher::hash (rtx x)
270 : {
271 0 : inchash::hash h;
272 0 : h.add_int (GET_MODE (x));
273 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
274 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
275 0 : return h.end ();
276 : }
277 :
278 : /* Returns true if CONST_POLY_INT X is an rtx representation of Y. */
279 :
280 : bool
281 0 : const_poly_int_hasher::equal (rtx x, const compare_type &y)
282 : {
283 0 : if (GET_MODE (x) != y.first)
284 : return false;
285 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
286 0 : if (CONST_POLY_INT_COEFFS (x)[i] != y.second.coeffs[i])
287 : return false;
288 : return true;
289 : }
290 :
291 : /* Returns a hash code for X (which is really a CONST_DOUBLE). */
292 : hashval_t
293 18643328 : const_double_hasher::hash (rtx x)
294 : {
295 18643328 : const_rtx const value = x;
296 18643328 : hashval_t h;
297 :
298 18643328 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
299 : h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
300 : else
301 : {
302 18643328 : h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
303 : /* MODE is used in the comparison, so it should be in the hash. */
304 18643328 : h ^= GET_MODE (value);
305 : }
306 18643328 : return h;
307 : }
308 :
309 : /* Returns true if the value represented by X (really a ...)
310 : is the same as that represented by Y (really a ...) */
311 : bool
312 12857595 : const_double_hasher::equal (rtx x, rtx y)
313 : {
314 12857595 : const_rtx const a = x, b = y;
315 :
316 12857595 : if (GET_MODE (a) != GET_MODE (b))
317 : return false;
318 4642707 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
319 : return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
320 : && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
321 : else
322 4642707 : return real_identical (CONST_DOUBLE_REAL_VALUE (a),
323 4642707 : CONST_DOUBLE_REAL_VALUE (b));
324 : }
325 :
326 : /* Returns a hash code for X (which is really a CONST_FIXED). */
327 :
328 : hashval_t
329 11968387 : const_fixed_hasher::hash (rtx x)
330 : {
331 11968387 : const_rtx const value = x;
332 11968387 : hashval_t h;
333 :
334 11968387 : h = fixed_hash (CONST_FIXED_VALUE (value));
335 : /* MODE is used in the comparison, so it should be in the hash. */
336 11968387 : h ^= GET_MODE (value);
337 11968387 : return h;
338 : }
339 :
340 : /* Returns true if the value represented by X is the same as that
341 : represented by Y. */
342 :
343 : bool
344 5987743 : const_fixed_hasher::equal (rtx x, rtx y)
345 : {
346 5987743 : const_rtx const a = x, b = y;
347 :
348 5987743 : if (GET_MODE (a) != GET_MODE (b))
349 : return false;
350 569742 : return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
351 : }
352 :
353 : /* Return true if the given memory attributes are equal. */
354 :
355 : bool
356 231190490 : mem_attrs_eq_p (const class mem_attrs *p, const class mem_attrs *q)
357 : {
358 231190490 : if (p == q)
359 : return true;
360 228229222 : if (!p || !q)
361 : return false;
362 227664716 : return (p->alias == q->alias
363 143673088 : && p->offset_known_p == q->offset_known_p
364 113985117 : && (!p->offset_known_p || known_eq (p->offset, q->offset))
365 98290553 : && p->size_known_p == q->size_known_p
366 94939454 : && (!p->size_known_p || known_eq (p->size, q->size))
367 81681692 : && p->align == q->align
368 67033298 : && p->addrspace == q->addrspace
369 294415350 : && (p->expr == q->expr
370 31514428 : || (p->expr != NULL_TREE && q->expr != NULL_TREE
371 24463079 : && operand_equal_p (p->expr, q->expr, 0))));
372 : }
373 :
374 : /* Set MEM's memory attributes so that they are the same as ATTRS. */
375 :
376 : static void
377 101268487 : set_mem_attrs (rtx mem, mem_attrs *attrs)
378 : {
379 : /* If everything is the default, we can just clear the attributes. */
380 101268487 : if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
381 : {
382 3357966 : MEM_ATTRS (mem) = 0;
383 3357966 : return;
384 : }
385 :
386 97910521 : if (!MEM_ATTRS (mem)
387 97910521 : || !mem_attrs_eq_p (attrs, MEM_ATTRS (mem)))
388 : {
389 74724201 : MEM_ATTRS (mem) = ggc_alloc<mem_attrs> ();
390 74724201 : memcpy (MEM_ATTRS (mem), attrs, sizeof (mem_attrs));
391 : }
392 : }
393 :
394 : /* Returns a hash code for X (which is a really a reg_attrs *). */
395 :
396 : hashval_t
397 320158594 : reg_attr_hasher::hash (reg_attrs *x)
398 : {
399 320158594 : const reg_attrs *const p = x;
400 :
401 320158594 : inchash::hash h;
402 320158594 : h.add_ptr (p->decl);
403 320158594 : h.add_poly_hwi (p->offset);
404 320158594 : return h.end ();
405 : }
406 :
407 : /* Returns true if the value represented by X is the same as that given by
408 : Y. */
409 :
410 : bool
411 309305193 : reg_attr_hasher::equal (reg_attrs *x, reg_attrs *y)
412 : {
413 309305193 : const reg_attrs *const p = x;
414 309305193 : const reg_attrs *const q = y;
415 :
416 309305193 : return (p->decl == q->decl && known_eq (p->offset, q->offset));
417 : }
418 : /* Allocate a new reg_attrs structure and insert it into the hash table if
419 : one identical to it is not already in the table. We are doing this for
420 : MEM of mode MODE. */
421 :
422 : static reg_attrs *
423 65968705 : get_reg_attrs (tree decl, poly_int64 offset)
424 : {
425 65968705 : reg_attrs attrs;
426 :
427 : /* If everything is the default, we can just return zero. */
428 65968705 : if (decl == 0 && known_eq (offset, 0))
429 : return 0;
430 :
431 60209296 : attrs.decl = decl;
432 60209296 : attrs.offset = offset;
433 :
434 60209296 : reg_attrs **slot = reg_attrs_htab->find_slot (&attrs, INSERT);
435 60209296 : if (*slot == 0)
436 : {
437 30447906 : *slot = ggc_alloc<reg_attrs> ();
438 30447906 : memcpy (*slot, &attrs, sizeof (reg_attrs));
439 : }
440 :
441 60209296 : return *slot;
442 : }
443 :
444 :
445 : #if !HAVE_blockage
446 : /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
447 : and to block register equivalences to be seen across this insn. */
448 :
449 : rtx
450 : gen_blockage (void)
451 : {
452 : rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
453 : MEM_VOLATILE_P (x) = true;
454 : return x;
455 : }
456 : #endif
457 :
458 :
459 : /* Set the mode and register number of X to MODE and REGNO. */
460 :
461 : void
462 1708432112 : set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
463 : {
464 1708432112 : unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
465 1708432112 : ? hard_regno_nregs (regno, mode)
466 1278584434 : : 1);
467 1708432112 : PUT_MODE_RAW (x, mode);
468 1708432112 : set_regno_raw (x, regno, nregs);
469 1708432112 : }
470 :
471 : /* Initialize a fresh REG rtx with mode MODE and register REGNO. */
472 :
473 : rtx
474 352229620 : init_raw_REG (rtx x, machine_mode mode, unsigned int regno)
475 : {
476 352229620 : set_mode_and_regno (x, mode, regno);
477 352229620 : REG_ATTRS (x) = NULL;
478 352229620 : ORIGINAL_REGNO (x) = regno;
479 352229620 : return x;
480 : }
481 :
482 : /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
483 : don't attempt to share with the various global pieces of rtl (such as
484 : frame_pointer_rtx). */
485 :
486 : rtx
487 350066814 : gen_raw_REG (machine_mode mode, unsigned int regno)
488 : {
489 350066814 : rtx x = rtx_alloc (REG MEM_STAT_INFO);
490 350066814 : init_raw_REG (x, mode, regno);
491 350066814 : return x;
492 : }
493 :
494 : /* There are some RTL codes that require special attention; the generation
495 : functions do the raw handling. If you add to this list, modify
496 : special_rtx in gengenrtl.cc as well. */
497 :
498 : rtx_expr_list *
499 207349079 : gen_rtx_EXPR_LIST (machine_mode mode, rtx expr, rtx expr_list)
500 : {
501 207349079 : return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
502 207349079 : expr_list));
503 : }
504 :
505 : rtx_insn_list *
506 96032582 : gen_rtx_INSN_LIST (machine_mode mode, rtx insn, rtx insn_list)
507 : {
508 96032582 : return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
509 96032582 : insn_list));
510 : }
511 :
512 : rtx_insn *
513 834987 : gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
514 : basic_block bb, rtx pattern, location_t location, int code,
515 : rtx reg_notes)
516 : {
517 834987 : return as_a <rtx_insn *> (gen_rtx_fmt_uuBeLie (INSN, mode,
518 : prev_insn, next_insn,
519 : bb, pattern, location, code,
520 834987 : reg_notes));
521 : }
522 :
523 : rtx
524 1310434807 : gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
525 : {
526 1310434807 : if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
527 845593119 : return const_int_rtx[arg + MAX_SAVED_CONST_INT];
528 :
529 : #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
530 : if (const_true_rtx && arg == STORE_FLAG_VALUE)
531 : return const_true_rtx;
532 : #endif
533 :
534 : /* Look up the CONST_INT in the hash table. */
535 464841688 : rtx *slot = const_int_htab->find_slot_with_hash (arg, (hashval_t) arg,
536 : INSERT);
537 464841688 : if (*slot == 0)
538 35458280 : *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
539 :
540 464841688 : return *slot;
541 : }
542 :
543 : rtx
544 1225598705 : gen_int_mode (poly_int64 c, machine_mode mode)
545 : {
546 1225598705 : c = trunc_int_for_mode (c, mode);
547 1225598705 : if (c.is_constant ())
548 1225598705 : return GEN_INT (c.coeffs[0]);
549 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
550 : return immed_wide_int_const (poly_wide_int::from (c, prec, SIGNED), mode);
551 : }
552 :
553 : /* CONST_DOUBLEs might be created from pairs of integers, or from
554 : REAL_VALUE_TYPEs. Also, their length is known only at run time,
555 : so we cannot use gen_rtx_raw_CONST_DOUBLE. */
556 :
557 : /* Determine whether REAL, a CONST_DOUBLE, already exists in the
558 : hash table. If so, return its counterpart; otherwise add it
559 : to the hash table and return it. */
560 : static rtx
561 9892913 : lookup_const_double (rtx real)
562 : {
563 9892913 : rtx *slot = const_double_htab->find_slot (real, INSERT);
564 9892913 : if (*slot == 0)
565 7894179 : *slot = real;
566 :
567 9892913 : return *slot;
568 : }
569 :
570 : /* Return a CONST_DOUBLE rtx for a floating-point value specified by
571 : VALUE in mode MODE. */
572 : rtx
573 9892913 : const_double_from_real_value (REAL_VALUE_TYPE value, machine_mode mode)
574 : {
575 9892913 : rtx real = rtx_alloc (CONST_DOUBLE);
576 9892913 : PUT_MODE (real, mode);
577 :
578 9892913 : real->u.rv = value;
579 :
580 9892913 : return lookup_const_double (real);
581 : }
582 :
583 : /* Determine whether FIXED, a CONST_FIXED, already exists in the
584 : hash table. If so, return its counterpart; otherwise add it
585 : to the hash table and return it. */
586 :
587 : static rtx
588 7404540 : lookup_const_fixed (rtx fixed)
589 : {
590 7404540 : rtx *slot = const_fixed_htab->find_slot (fixed, INSERT);
591 7404540 : if (*slot == 0)
592 7404540 : *slot = fixed;
593 :
594 7404540 : return *slot;
595 : }
596 :
597 : /* Return a CONST_FIXED rtx for a fixed-point value specified by
598 : VALUE in mode MODE. */
599 :
600 : rtx
601 7404540 : const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, machine_mode mode)
602 : {
603 7404540 : rtx fixed = rtx_alloc (CONST_FIXED);
604 7404540 : PUT_MODE (fixed, mode);
605 :
606 7404540 : fixed->u.fv = value;
607 :
608 7404540 : return lookup_const_fixed (fixed);
609 : }
610 :
611 : #if TARGET_SUPPORTS_WIDE_INT == 0
612 : /* Constructs double_int from rtx CST. */
613 :
614 : double_int
615 : rtx_to_double_int (const_rtx cst)
616 : {
617 : double_int r;
618 :
619 : if (CONST_INT_P (cst))
620 : r = double_int::from_shwi (INTVAL (cst));
621 : else if (CONST_DOUBLE_AS_INT_P (cst))
622 : {
623 : r.low = CONST_DOUBLE_LOW (cst);
624 : r.high = CONST_DOUBLE_HIGH (cst);
625 : }
626 : else
627 : gcc_unreachable ();
628 :
629 : return r;
630 : }
631 : #endif
632 :
633 : #if TARGET_SUPPORTS_WIDE_INT
634 : /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
635 : If so, return its counterpart; otherwise add it to the hash table and
636 : return it. */
637 :
638 : static rtx
639 566714 : lookup_const_wide_int (rtx wint)
640 : {
641 566714 : rtx *slot = const_wide_int_htab->find_slot (wint, INSERT);
642 566714 : if (*slot == 0)
643 58405 : *slot = wint;
644 :
645 566714 : return *slot;
646 : }
647 : #endif
648 :
649 : /* Return an rtx constant for V, given that the constant has mode MODE.
650 : The returned rtx will be a CONST_INT if V fits, otherwise it will be
651 : a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
652 : (if TARGET_SUPPORTS_WIDE_INT). */
653 :
654 : static rtx
655 636397924 : immed_wide_int_const_1 (const wide_int_ref &v, machine_mode mode)
656 : {
657 636397924 : unsigned int len = v.get_len ();
658 : /* Not scalar_int_mode because we also allow pointer bound modes. */
659 636397924 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
660 :
661 : /* Allow truncation but not extension since we do not know if the
662 : number is signed or unsigned. */
663 636397924 : gcc_assert (prec <= v.get_precision ());
664 :
665 636397924 : if (len < 2 || prec <= HOST_BITS_PER_WIDE_INT)
666 635831210 : return gen_int_mode (v.elt (0), mode);
667 :
668 : #if TARGET_SUPPORTS_WIDE_INT
669 566714 : {
670 566714 : unsigned int i;
671 566714 : rtx value;
672 566714 : unsigned int blocks_needed
673 566714 : = (prec + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT;
674 :
675 566714 : if (len > blocks_needed)
676 : len = blocks_needed;
677 :
678 566714 : value = const_wide_int_alloc (len);
679 :
680 : /* It is so tempting to just put the mode in here. Must control
681 : myself ... */
682 566714 : PUT_MODE (value, VOIDmode);
683 566714 : CWI_PUT_NUM_ELEM (value, len);
684 :
685 1707807 : for (i = 0; i < len; i++)
686 1141093 : CONST_WIDE_INT_ELT (value, i) = v.elt (i);
687 :
688 566714 : return lookup_const_wide_int (value);
689 : }
690 : #else
691 : return immed_double_const (v.elt (0), v.elt (1), mode);
692 : #endif
693 : }
694 :
695 : #if TARGET_SUPPORTS_WIDE_INT == 0
696 : /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
697 : of ints: I0 is the low-order word and I1 is the high-order word.
698 : For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
699 : implied upper bits are copies of the high bit of i1. The value
700 : itself is neither signed nor unsigned. Do not use this routine for
701 : non-integer modes; convert to REAL_VALUE_TYPE and use
702 : const_double_from_real_value. */
703 :
704 : rtx
705 : immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode)
706 : {
707 : rtx value;
708 : unsigned int i;
709 :
710 : /* There are the following cases (note that there are no modes with
711 : HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
712 :
713 : 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
714 : gen_int_mode.
715 : 2) If the value of the integer fits into HOST_WIDE_INT anyway
716 : (i.e., i1 consists only from copies of the sign bit, and sign
717 : of i0 and i1 are the same), then we return a CONST_INT for i0.
718 : 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
719 : scalar_mode smode;
720 : if (is_a <scalar_mode> (mode, &smode)
721 : && GET_MODE_BITSIZE (smode) <= HOST_BITS_PER_WIDE_INT)
722 : return gen_int_mode (i0, mode);
723 :
724 : /* If this integer fits in one word, return a CONST_INT. */
725 : if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
726 : return GEN_INT (i0);
727 :
728 : /* We use VOIDmode for integers. */
729 : value = rtx_alloc (CONST_DOUBLE);
730 : PUT_MODE (value, VOIDmode);
731 :
732 : CONST_DOUBLE_LOW (value) = i0;
733 : CONST_DOUBLE_HIGH (value) = i1;
734 :
735 : for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
736 : XWINT (value, i) = 0;
737 :
738 : return lookup_const_double (value);
739 : }
740 : #endif
741 :
742 : /* Return an rtx representation of C in mode MODE. */
743 :
744 : rtx
745 636397924 : immed_wide_int_const (const poly_wide_int_ref &c, machine_mode mode)
746 : {
747 636397924 : if (c.is_constant ())
748 636397924 : return immed_wide_int_const_1 (c.coeffs[0], mode);
749 :
750 : /* Not scalar_int_mode because we also allow pointer bound modes. */
751 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
752 :
753 : /* Allow truncation but not extension since we do not know if the
754 : number is signed or unsigned. */
755 : gcc_assert (prec <= c.coeffs[0].get_precision ());
756 : poly_wide_int newc = poly_wide_int::from (c, prec, SIGNED);
757 :
758 : /* See whether we already have an rtx for this constant. */
759 : inchash::hash h;
760 : h.add_int (mode);
761 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
762 : h.add_wide_int (newc.coeffs[i]);
763 : const_poly_int_hasher::compare_type typed_value (mode, newc);
764 : rtx *slot = const_poly_int_htab->find_slot_with_hash (typed_value,
765 : h.end (), INSERT);
766 : rtx x = *slot;
767 : if (x)
768 : return x;
769 :
770 : /* Create a new rtx. There's a choice to be made here between installing
771 : the actual mode of the rtx or leaving it as VOIDmode (for consistency
772 : with CONST_INT). In practice the handling of the codes is different
773 : enough that we get no benefit from using VOIDmode, and various places
774 : assume that VOIDmode implies CONST_INT. Using the real mode seems like
775 : the right long-term direction anyway. */
776 : typedef trailing_wide_ints<NUM_POLY_INT_COEFFS> twi;
777 : size_t extra_size = twi::extra_size (prec);
778 : x = rtx_alloc_v (CONST_POLY_INT,
779 : sizeof (struct const_poly_int_def) + extra_size);
780 : PUT_MODE (x, mode);
781 : CONST_POLY_INT_COEFFS (x).set_precision (prec);
782 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
783 : CONST_POLY_INT_COEFFS (x)[i] = newc.coeffs[i];
784 :
785 : *slot = x;
786 : return x;
787 : }
788 :
789 : rtx
790 193635268 : gen_rtx_REG (machine_mode mode, unsigned int regno)
791 : {
792 : /* In case the MD file explicitly references the frame pointer, have
793 : all such references point to the same frame pointer. This is
794 : used during frame pointer elimination to distinguish the explicit
795 : references to these registers from pseudos that happened to be
796 : assigned to them.
797 :
798 : If we have eliminated the frame pointer or arg pointer, we will
799 : be using it as a normal register, for example as a spill
800 : register. In such cases, we might be accessing it in a mode that
801 : is not Pmode and therefore cannot use the pre-allocated rtx.
802 :
803 : Also don't do this when we are making new REGs in reload, since
804 : we don't want to get confused with the real pointers. */
805 :
806 208125332 : if (mode == Pmode && !reload_in_progress && !lra_in_progress)
807 : {
808 62989355 : if (regno == FRAME_POINTER_REGNUM
809 3015426 : && (!reload_completed || frame_pointer_needed))
810 3015426 : return frame_pointer_rtx;
811 :
812 59973929 : if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
813 : && regno == HARD_FRAME_POINTER_REGNUM
814 4313324 : && (!reload_completed || frame_pointer_needed))
815 3790491 : return hard_frame_pointer_rtx;
816 : #if !HARD_FRAME_POINTER_IS_ARG_POINTER
817 56183438 : if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
818 : && regno == ARG_POINTER_REGNUM)
819 3020885 : return arg_pointer_rtx;
820 : #endif
821 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
822 : if (regno == RETURN_ADDRESS_POINTER_REGNUM)
823 : return return_address_pointer_rtx;
824 : #endif
825 53162553 : if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
826 0 : && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
827 53162553 : && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
828 0 : return pic_offset_table_rtx;
829 53162553 : if (regno == STACK_POINTER_REGNUM)
830 4047021 : return stack_pointer_rtx;
831 : }
832 :
833 : #if 0
834 : /* If the per-function register table has been set up, try to re-use
835 : an existing entry in that table to avoid useless generation of RTL.
836 :
837 : This code is disabled for now until we can fix the various backends
838 : which depend on having non-shared hard registers in some cases. Long
839 : term we want to re-enable this code as it can significantly cut down
840 : on the amount of useless RTL that gets generated.
841 :
842 : We'll also need to fix some code that runs after reload that wants to
843 : set ORIGINAL_REGNO. */
844 :
845 : if (cfun
846 : && cfun->emit
847 : && regno_reg_rtx
848 : && regno < FIRST_PSEUDO_REGISTER
849 : && reg_raw_mode[regno] == mode)
850 : return regno_reg_rtx[regno];
851 : #endif
852 :
853 179761445 : return gen_raw_REG (mode, regno);
854 : }
855 :
856 : rtx
857 251951623 : gen_rtx_MEM (machine_mode mode, rtx addr)
858 : {
859 251951623 : rtx rt = gen_rtx_raw_MEM (mode, addr);
860 :
861 : /* This field is not cleared by the mere allocation of the rtx, so
862 : we clear it here. */
863 251951623 : MEM_ATTRS (rt) = 0;
864 :
865 251951623 : return rt;
866 : }
867 :
868 : /* Generate a memory referring to non-trapping constant memory. */
869 :
870 : rtx
871 2119823 : gen_const_mem (machine_mode mode, rtx addr)
872 : {
873 2119823 : rtx mem = gen_rtx_MEM (mode, addr);
874 2119823 : MEM_READONLY_P (mem) = 1;
875 2119823 : MEM_NOTRAP_P (mem) = 1;
876 2119823 : return mem;
877 : }
878 :
879 : /* Generate a MEM referring to fixed portions of the frame, e.g., register
880 : save areas. */
881 :
882 : rtx
883 1251412 : gen_frame_mem (machine_mode mode, rtx addr)
884 : {
885 1251412 : rtx mem = gen_rtx_MEM (mode, addr);
886 1251412 : MEM_NOTRAP_P (mem) = 1;
887 1251412 : set_mem_alias_set (mem, get_frame_alias_set ());
888 1251412 : return mem;
889 : }
890 :
891 : /* Generate a MEM referring to a temporary use of the stack, not part
892 : of the fixed stack frame. For example, something which is pushed
893 : by a target splitter. */
894 : rtx
895 0 : gen_tmp_stack_mem (machine_mode mode, rtx addr)
896 : {
897 0 : rtx mem = gen_rtx_MEM (mode, addr);
898 0 : MEM_NOTRAP_P (mem) = 1;
899 0 : if (!cfun->calls_alloca)
900 0 : set_mem_alias_set (mem, get_frame_alias_set ());
901 0 : return mem;
902 : }
903 :
904 : /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
905 : this construct would be valid, and false otherwise. */
906 :
907 : bool
908 51008493 : validate_subreg (machine_mode omode, machine_mode imode,
909 : const_rtx reg, poly_uint64 offset)
910 : {
911 102016986 : poly_uint64 isize = GET_MODE_SIZE (imode);
912 102016986 : poly_uint64 osize = GET_MODE_SIZE (omode);
913 :
914 : /* The sizes must be ordered, so that we know whether the subreg
915 : is partial, paradoxical or complete. */
916 51008493 : if (!ordered_p (isize, osize))
917 : return false;
918 :
919 : /* All subregs must be aligned. */
920 51082520 : if (!multiple_p (offset, osize))
921 : return false;
922 :
923 : /* The subreg offset cannot be outside the inner object. */
924 51008473 : if (maybe_ge (offset, isize))
925 : return false;
926 :
927 51008473 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode);
928 :
929 : /* ??? This should not be here. Temporarily continue to allow word_mode
930 : subregs of anything. The most common offender is (subreg:SI (reg:DF)).
931 : Generally, backends are doing something sketchy but it'll take time to
932 : fix them all. */
933 51008473 : if (omode == word_mode)
934 : ;
935 : /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
936 : is the culprit here, and not the backends. */
937 31539223 : else if (known_ge (osize, regsize) && known_ge (isize, osize))
938 : ;
939 : /* Allow component subregs of complex and vector. Though given the below
940 : extraction rules, it's not always clear what that means. */
941 25245748 : else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
942 26417993 : && GET_MODE_INNER (imode) == omode)
943 : ;
944 : /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
945 : i.e. (subreg:V4SF (reg:SF) 0) or (subreg:V4SF (reg:V2SF) 0). This
946 : surely isn't the cleanest way to represent this. It's questionable
947 : if this ought to be represented at all -- why can't this all be hidden
948 : in post-reload splitters that make arbitrarily mode changes to the
949 : registers themselves. */
950 23793293 : else if (VECTOR_MODE_P (omode)
951 26079752 : && GET_MODE_UNIT_SIZE (omode) == GET_MODE_UNIT_SIZE (imode))
952 : ;
953 : /* Subregs involving floating point modes are not allowed to
954 : change size unless it's an insert into a complex mode.
955 : Therefore (subreg:DI (reg:DF) 0) and (subreg:CS (reg:SF) 0) are fine, but
956 : (subreg:SI (reg:DF) 0) isn't. */
957 23685601 : else if ((FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
958 293837 : && !COMPLEX_MODE_P (omode))
959 : {
960 293677 : if (! (known_eq (isize, osize)
961 : /* LRA can use subreg to store a floating point value in
962 : an integer mode. Although the floating point and the
963 : integer modes need the same number of hard registers,
964 : the size of floating point mode can be less than the
965 : integer mode. LRA also uses subregs for a register
966 : should be used in different mode in on insn. */
967 71526 : || lra_in_progress))
968 : return false;
969 : }
970 :
971 : /* Paradoxical subregs must have offset zero. */
972 50938894 : if (maybe_gt (osize, isize) && !known_eq (offset, 0U))
973 : return false;
974 :
975 : /* Verify that the offset is representable. */
976 :
977 : /* Ensure that subregs of hard registers can be folded. In other words,
978 : the hardware register must be valid in the subreg's outer mode,
979 : and consequently the subreg can be replaced with a hardware register. */
980 50938894 : if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
981 : {
982 364253 : unsigned int regno = REGNO (reg);
983 :
984 364253 : if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
985 707276 : && GET_MODE_INNER (imode) == omode)
986 : ;
987 117449 : else if (!REG_CAN_CHANGE_MODE_P (regno, imode, omode))
988 : return false;
989 :
990 : /* Pass true to allow_stack_regs because targets like x86
991 : expect to be able to take subregs of the stack pointer. */
992 364154 : return simplify_subreg_regno (regno, imode, offset, omode, true) >= 0;
993 : }
994 : /* Do not allow normal SUBREG with stricter alignment than the inner MEM.
995 :
996 : PR120329: Combine can create paradoxical mem subregs even for
997 : strict-alignment targets. Allow it until combine is fixed. */
998 50574641 : else if (reg && MEM_P (reg) && STRICT_ALIGNMENT
999 : && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)
1000 : && known_le (osize, isize))
1001 : return false;
1002 :
1003 : /* If ISIZE is greater than REGSIZE, the inner value is split into blocks
1004 : of size REGSIZE. The outer size must then be ordered wrt REGSIZE,
1005 : otherwise we wouldn't know at compile time how many blocks the
1006 : outer mode occupies. */
1007 50574641 : if (maybe_gt (isize, regsize) && !ordered_p (osize, regsize))
1008 : return false;
1009 :
1010 : /* For normal pseudo registers, we want most of the same checks. Namely:
1011 :
1012 : Assume that the pseudo register will be allocated to hard registers
1013 : that can hold REGSIZE bytes each. If OSIZE is not a multiple of REGSIZE,
1014 : the remainder must correspond to the lowpart of the containing hard
1015 : register. If BYTES_BIG_ENDIAN, the lowpart is at the highest offset,
1016 : otherwise it is at the lowest offset.
1017 :
1018 : Given that we've already checked the mode and offset alignment,
1019 : we only have to check subblock subregs here.
1020 :
1021 : For paradoxical little-endian registers, this check is redundant. The
1022 : offset has already been validated to be zero.
1023 :
1024 : For paradoxical big-endian registers, this check is not valid
1025 : because the offset is zero. */
1026 50574641 : if (maybe_lt (osize, regsize)
1027 24349105 : && known_le (osize, isize)
1028 67461232 : && ! (lra_in_progress && (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))))
1029 : {
1030 : /* It is invalid for the target to pick a register size for a mode
1031 : that isn't ordered wrt to the size of that mode. */
1032 16871201 : poly_uint64 block_size = ordered_min (isize, regsize);
1033 16871201 : unsigned int start_reg;
1034 16871201 : poly_uint64 offset_within_reg;
1035 16871201 : if (!can_div_trunc_p (offset, block_size, &start_reg, &offset_within_reg)
1036 16871201 : || (BYTES_BIG_ENDIAN
1037 : ? maybe_ne (offset_within_reg, block_size - osize)
1038 16871201 : : maybe_ne (offset_within_reg, 0U)))
1039 74047 : return false;
1040 : }
1041 : return true;
1042 : }
1043 :
1044 : rtx
1045 25310628 : gen_rtx_SUBREG (machine_mode mode, rtx reg, poly_uint64 offset)
1046 : {
1047 25310628 : gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
1048 25310628 : return gen_rtx_raw_SUBREG (mode, reg, offset);
1049 : }
1050 :
1051 : /* Generate a SUBREG representing the least-significant part of REG if MODE
1052 : is smaller than mode of REG, otherwise paradoxical SUBREG. */
1053 :
1054 : rtx
1055 622818 : gen_lowpart_SUBREG (machine_mode mode, rtx reg)
1056 : {
1057 622818 : machine_mode inmode;
1058 :
1059 622818 : inmode = GET_MODE (reg);
1060 622818 : if (inmode == VOIDmode)
1061 0 : inmode = mode;
1062 622818 : return gen_rtx_SUBREG (mode, reg,
1063 622818 : subreg_lowpart_offset (mode, inmode));
1064 : }
1065 :
1066 : rtx
1067 102973251 : gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
1068 : enum var_init_status status)
1069 : {
1070 102973251 : rtx x = gen_rtx_fmt_te (VAR_LOCATION, mode, decl, loc);
1071 102973251 : PAT_VAR_LOCATION_STATUS (x) = status;
1072 102973251 : return x;
1073 : }
1074 :
1075 :
1076 : /* Create an rtvec and stores within it the RTXen passed in the arguments. */
1077 :
1078 : rtvec
1079 24441035 : gen_rtvec (int n, ...)
1080 : {
1081 24441035 : int i;
1082 24441035 : rtvec rt_val;
1083 24441035 : va_list p;
1084 :
1085 24441035 : va_start (p, n);
1086 :
1087 : /* Don't allocate an empty rtvec... */
1088 24441035 : if (n == 0)
1089 : {
1090 0 : va_end (p);
1091 0 : return NULL_RTVEC;
1092 : }
1093 :
1094 24441035 : rt_val = rtvec_alloc (n);
1095 :
1096 93275683 : for (i = 0; i < n; i++)
1097 44393613 : rt_val->elem[i] = va_arg (p, rtx);
1098 :
1099 24441035 : va_end (p);
1100 24441035 : return rt_val;
1101 : }
1102 :
1103 : rtvec
1104 462757 : gen_rtvec_v (int n, rtx *argp)
1105 : {
1106 462757 : int i;
1107 462757 : rtvec rt_val;
1108 :
1109 : /* Don't allocate an empty rtvec... */
1110 462757 : if (n == 0)
1111 : return NULL_RTVEC;
1112 :
1113 462757 : rt_val = rtvec_alloc (n);
1114 :
1115 2097385 : for (i = 0; i < n; i++)
1116 1171871 : rt_val->elem[i] = *argp++;
1117 :
1118 : return rt_val;
1119 : }
1120 :
1121 : rtvec
1122 0 : gen_rtvec_v (int n, rtx_insn **argp)
1123 : {
1124 0 : int i;
1125 0 : rtvec rt_val;
1126 :
1127 : /* Don't allocate an empty rtvec... */
1128 0 : if (n == 0)
1129 : return NULL_RTVEC;
1130 :
1131 0 : rt_val = rtvec_alloc (n);
1132 :
1133 0 : for (i = 0; i < n; i++)
1134 0 : rt_val->elem[i] = *argp++;
1135 :
1136 : return rt_val;
1137 : }
1138 :
1139 :
1140 : /* Return the number of bytes between the start of an OUTER_MODE
1141 : in-memory value and the start of an INNER_MODE in-memory value,
1142 : given that the former is a lowpart of the latter. It may be a
1143 : paradoxical lowpart, in which case the offset will be negative
1144 : on big-endian targets. */
1145 :
1146 : poly_int64
1147 74203459 : byte_lowpart_offset (machine_mode outer_mode,
1148 : machine_mode inner_mode)
1149 : {
1150 74203459 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1151 3846279 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1152 : else
1153 70357180 : return subreg_lowpart_offset (outer_mode, inner_mode);
1154 : }
1155 :
1156 : /* Return the offset of (subreg:OUTER_MODE (mem:INNER_MODE X) OFFSET)
1157 : from address X. For paradoxical big-endian subregs this is a
1158 : negative value, otherwise it's the same as OFFSET. */
1159 :
1160 : poly_int64
1161 12299573 : subreg_memory_offset (machine_mode outer_mode, machine_mode inner_mode,
1162 : poly_uint64 offset)
1163 : {
1164 12299573 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1165 : {
1166 3419540 : gcc_assert (known_eq (offset, 0U));
1167 3419540 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1168 : }
1169 8880033 : return offset;
1170 : }
1171 :
1172 : /* As above, but return the offset that existing subreg X would have
1173 : if SUBREG_REG (X) were stored in memory. The only significant thing
1174 : about the current SUBREG_REG is its mode. */
1175 :
1176 : poly_int64
1177 663007 : subreg_memory_offset (const_rtx x)
1178 : {
1179 1326014 : return subreg_memory_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
1180 663007 : SUBREG_BYTE (x));
1181 : }
1182 :
1183 : /* Generate a REG rtx for a new pseudo register of mode MODE.
1184 : This pseudo is assigned the next sequential register number. */
1185 :
1186 : rtx
1187 68323067 : gen_reg_rtx (machine_mode mode)
1188 : {
1189 68323067 : rtx val;
1190 68323067 : unsigned int align = GET_MODE_ALIGNMENT (mode);
1191 :
1192 68323067 : gcc_assert (can_create_pseudo_p ());
1193 :
1194 : /* If a virtual register with bigger mode alignment is generated,
1195 : increase stack alignment estimation because it might be spilled
1196 : to stack later. */
1197 68323067 : if (SUPPORTS_STACK_ALIGNMENT
1198 68323067 : && crtl->stack_alignment_estimated < align
1199 354007 : && !crtl->stack_realign_processed)
1200 : {
1201 352935 : unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
1202 352935 : if (crtl->stack_alignment_estimated < min_align)
1203 352935 : crtl->stack_alignment_estimated = min_align;
1204 : }
1205 :
1206 68323067 : if (generating_concat_p
1207 51624489 : && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
1208 51624489 : || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
1209 : {
1210 : /* For complex modes, don't make a single pseudo.
1211 : Instead, make a CONCAT of two pseudos.
1212 : This allows noncontiguous allocation of the real and imaginary parts,
1213 : which makes much better code. Besides, allocating DCmode
1214 : pseudos overstrains reload on some machines like the 386. */
1215 223416 : rtx realpart, imagpart;
1216 223416 : machine_mode partmode = GET_MODE_INNER (mode);
1217 :
1218 223416 : realpart = gen_reg_rtx (partmode);
1219 223416 : imagpart = gen_reg_rtx (partmode);
1220 223416 : return gen_rtx_CONCAT (mode, realpart, imagpart);
1221 : }
1222 :
1223 : /* Do not call gen_reg_rtx with uninitialized crtl. */
1224 68099651 : gcc_assert (crtl->emit.regno_pointer_align_length);
1225 :
1226 68099651 : crtl->emit.ensure_regno_capacity ();
1227 68099651 : gcc_assert (reg_rtx_no < crtl->emit.regno_pointer_align_length);
1228 :
1229 68099651 : val = gen_raw_REG (mode, reg_rtx_no);
1230 68099651 : regno_reg_rtx[reg_rtx_no++] = val;
1231 68099651 : return val;
1232 : }
1233 :
1234 : /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1235 : enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1236 :
1237 : void
1238 68100877 : emit_status::ensure_regno_capacity ()
1239 : {
1240 68100877 : int old_size = regno_pointer_align_length;
1241 :
1242 68100877 : if (reg_rtx_no < old_size)
1243 : return;
1244 :
1245 179773 : int new_size = old_size * 2;
1246 179773 : while (reg_rtx_no >= new_size)
1247 0 : new_size *= 2;
1248 :
1249 179773 : char *tmp = XRESIZEVEC (char, regno_pointer_align, new_size);
1250 179773 : memset (tmp + old_size, 0, new_size - old_size);
1251 179773 : regno_pointer_align = (unsigned char *) tmp;
1252 :
1253 179773 : rtx *new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, new_size);
1254 179773 : memset (new1 + old_size, 0, (new_size - old_size) * sizeof (rtx));
1255 179773 : regno_reg_rtx = new1;
1256 :
1257 179773 : crtl->emit.regno_pointer_align_length = new_size;
1258 : }
1259 :
1260 : /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1261 :
1262 : bool
1263 10935 : reg_is_parm_p (rtx reg)
1264 : {
1265 10935 : tree decl;
1266 :
1267 10935 : gcc_assert (REG_P (reg));
1268 10935 : decl = REG_EXPR (reg);
1269 8489 : return (decl && TREE_CODE (decl) == PARM_DECL);
1270 : }
1271 :
1272 : /* Update NEW with the same attributes as REG, but with OFFSET added
1273 : to the REG_OFFSET. */
1274 :
1275 : static void
1276 18463706 : update_reg_offset (rtx new_rtx, rtx reg, poly_int64 offset)
1277 : {
1278 18463706 : REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
1279 18463706 : REG_OFFSET (reg) + offset);
1280 18463706 : }
1281 :
1282 : /* Generate a register with same attributes as REG, but with OFFSET
1283 : added to the REG_OFFSET. */
1284 :
1285 : rtx
1286 10871631 : gen_rtx_REG_offset (rtx reg, machine_mode mode, unsigned int regno,
1287 : poly_int64 offset)
1288 : {
1289 : /* Use gen_raw_REG rather than gen_rtx_REG, because otherwise we'd
1290 : overwrite REG_ATTRS (and in the callers often ORIGINAL_REGNO too)
1291 : of the shared REG rtxes like stack_pointer_rtx etc. This should
1292 : happen only for SUBREGs from DEBUG_INSNs, RA should ensure
1293 : multi-word registers don't overlap the special registers like
1294 : stack pointer. */
1295 10871631 : rtx new_rtx = gen_raw_REG (mode, regno);
1296 :
1297 10871631 : update_reg_offset (new_rtx, reg, offset);
1298 10871631 : return new_rtx;
1299 : }
1300 :
1301 : /* Generate a new pseudo-register with the same attributes as REG, but
1302 : with OFFSET added to the REG_OFFSET. */
1303 :
1304 : rtx
1305 617932 : gen_reg_rtx_offset (rtx reg, machine_mode mode, int offset)
1306 : {
1307 617932 : rtx new_rtx = gen_reg_rtx (mode);
1308 :
1309 617932 : update_reg_offset (new_rtx, reg, offset);
1310 617932 : return new_rtx;
1311 : }
1312 :
1313 : /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1314 : new register is a (possibly paradoxical) lowpart of the old one. */
1315 :
1316 : void
1317 2938180 : adjust_reg_mode (rtx reg, machine_mode mode)
1318 : {
1319 2938180 : update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
1320 2938180 : PUT_MODE (reg, mode);
1321 2938180 : }
1322 :
1323 : /* Copy REG's attributes from X, if X has any attributes. If REG and X
1324 : have different modes, REG is a (possibly paradoxical) lowpart of X. */
1325 :
1326 : void
1327 74945616 : set_reg_attrs_from_value (rtx reg, rtx x)
1328 : {
1329 74945616 : poly_int64 offset;
1330 74945616 : bool can_be_reg_pointer = true;
1331 :
1332 : /* Don't call mark_reg_pointer for incompatible pointer sign
1333 : extension. */
1334 74945616 : while (GET_CODE (x) == SIGN_EXTEND
1335 : || GET_CODE (x) == ZERO_EXTEND
1336 75982852 : || GET_CODE (x) == TRUNCATE
1337 75982852 : || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
1338 : {
1339 : #if defined(POINTERS_EXTEND_UNSIGNED)
1340 1037236 : if (((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
1341 : || (GET_CODE (x) == ZERO_EXTEND && ! POINTERS_EXTEND_UNSIGNED)
1342 487629 : || (paradoxical_subreg_p (x)
1343 18640 : && ! (SUBREG_PROMOTED_VAR_P (x)
1344 0 : && SUBREG_CHECK_PROMOTED_SIGN (x,
1345 : POINTERS_EXTEND_UNSIGNED))))
1346 1055876 : && !targetm.have_ptr_extend ())
1347 : can_be_reg_pointer = false;
1348 : #endif
1349 1037236 : x = XEXP (x, 0);
1350 : }
1351 :
1352 : /* Hard registers can be reused for multiple purposes within the same
1353 : function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1354 : on them is wrong. */
1355 74945616 : if (HARD_REGISTER_P (reg))
1356 48813163 : return;
1357 :
1358 26132453 : offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1359 26132453 : if (MEM_P (x))
1360 : {
1361 5632510 : if (MEM_OFFSET_KNOWN_P (x))
1362 2681209 : REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1363 2681209 : MEM_OFFSET (x) + offset);
1364 5178785 : if (can_be_reg_pointer && MEM_POINTER (x))
1365 651339 : mark_reg_pointer (reg, 0);
1366 : }
1367 20953668 : else if (REG_P (x))
1368 : {
1369 6857991 : if (REG_ATTRS (x))
1370 4035963 : update_reg_offset (reg, x, offset);
1371 6857991 : if (can_be_reg_pointer && REG_POINTER (x))
1372 1915809 : mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1373 : }
1374 : }
1375 :
1376 : /* Generate a REG rtx for a new pseudo register, copying the mode
1377 : and attributes from X. */
1378 :
1379 : rtx
1380 566238 : gen_reg_rtx_and_attrs (rtx x)
1381 : {
1382 566238 : rtx reg = gen_reg_rtx (GET_MODE (x));
1383 566238 : set_reg_attrs_from_value (reg, x);
1384 566238 : return reg;
1385 : }
1386 :
1387 : /* Set the register attributes for registers contained in PARM_RTX.
1388 : Use needed values from memory attributes of MEM. */
1389 :
1390 : void
1391 110283 : set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1392 : {
1393 110283 : if (REG_P (parm_rtx))
1394 110283 : set_reg_attrs_from_value (parm_rtx, mem);
1395 0 : else if (GET_CODE (parm_rtx) == PARALLEL)
1396 : {
1397 : /* Check for a NULL entry in the first slot, used to indicate that the
1398 : parameter goes both on the stack and in registers. */
1399 0 : int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1400 0 : for (; i < XVECLEN (parm_rtx, 0); i++)
1401 : {
1402 0 : rtx x = XVECEXP (parm_rtx, 0, i);
1403 0 : if (REG_P (XEXP (x, 0)))
1404 0 : REG_ATTRS (XEXP (x, 0))
1405 0 : = get_reg_attrs (MEM_EXPR (mem),
1406 0 : INTVAL (XEXP (x, 1)));
1407 : }
1408 : }
1409 110283 : }
1410 :
1411 : /* Set the REG_ATTRS for registers in value X, given that X represents
1412 : decl T. */
1413 :
1414 : void
1415 67315881 : set_reg_attrs_for_decl_rtl (tree t, rtx x)
1416 : {
1417 67315881 : if (!t)
1418 : return;
1419 67315685 : tree tdecl = t;
1420 67315685 : if (GET_CODE (x) == SUBREG)
1421 : {
1422 611 : gcc_assert (subreg_lowpart_p (x));
1423 611 : x = SUBREG_REG (x);
1424 : }
1425 67315685 : if (REG_P (x))
1426 44253626 : REG_ATTRS (x)
1427 44253626 : = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1428 44253626 : DECL_P (tdecl)
1429 21610749 : ? DECL_MODE (tdecl)
1430 22642877 : : TYPE_MODE (TREE_TYPE (tdecl))));
1431 67315685 : if (GET_CODE (x) == CONCAT)
1432 : {
1433 228397 : if (REG_P (XEXP (x, 0)))
1434 228397 : REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1435 228397 : if (REG_P (XEXP (x, 1)))
1436 228397 : REG_ATTRS (XEXP (x, 1))
1437 456794 : = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1438 : }
1439 67315685 : if (GET_CODE (x) == PARALLEL)
1440 : {
1441 60682 : int i, start;
1442 :
1443 : /* Check for a NULL entry, used to indicate that the parameter goes
1444 : both on the stack and in registers. */
1445 60682 : if (XEXP (XVECEXP (x, 0, 0), 0))
1446 : start = 0;
1447 : else
1448 0 : start = 1;
1449 :
1450 174052 : for (i = start; i < XVECLEN (x, 0); i++)
1451 : {
1452 113370 : rtx y = XVECEXP (x, 0, i);
1453 113370 : if (REG_P (XEXP (y, 0)))
1454 113370 : REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1455 : }
1456 : }
1457 : }
1458 :
1459 : /* Assign the RTX X to declaration T. */
1460 :
1461 : void
1462 645691364 : set_decl_rtl (tree t, rtx x)
1463 : {
1464 645691364 : DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1465 645691364 : if (x)
1466 33934911 : set_reg_attrs_for_decl_rtl (t, x);
1467 645691364 : }
1468 :
1469 : /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1470 : if the ABI requires the parameter to be passed by reference. */
1471 :
1472 : void
1473 3241934 : set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1474 : {
1475 3241934 : DECL_INCOMING_RTL (t) = x;
1476 3241934 : if (x && !by_reference_p)
1477 3236972 : set_reg_attrs_for_decl_rtl (t, x);
1478 3241934 : }
1479 :
1480 : /* Identify REG (which may be a CONCAT) as a user register. */
1481 :
1482 : void
1483 6331055 : mark_user_reg (rtx reg)
1484 : {
1485 6331055 : if (GET_CODE (reg) == CONCAT)
1486 : {
1487 3585 : REG_USERVAR_P (XEXP (reg, 0)) = 1;
1488 3585 : REG_USERVAR_P (XEXP (reg, 1)) = 1;
1489 : }
1490 : else
1491 : {
1492 6327470 : gcc_assert (REG_P (reg));
1493 6327470 : REG_USERVAR_P (reg) = 1;
1494 : }
1495 6331055 : }
1496 :
1497 : /* Identify REG as a probable pointer register and show its alignment
1498 : as ALIGN, if nonzero. */
1499 :
1500 : void
1501 17225600 : mark_reg_pointer (rtx reg, int align)
1502 : {
1503 17225600 : if (! REG_POINTER (reg))
1504 : {
1505 10929621 : REG_POINTER (reg) = 1;
1506 :
1507 10929621 : if (align)
1508 9487487 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1509 : }
1510 6295979 : else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1511 : /* We can no-longer be sure just how aligned this pointer is. */
1512 1316723 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1513 17225600 : }
1514 :
1515 : /* Return 1 plus largest pseudo reg number used in the current function. */
1516 :
1517 : int
1518 7093896988 : max_reg_num (void)
1519 : {
1520 7093896988 : return reg_rtx_no;
1521 : }
1522 :
1523 : /* Return 1 + the largest label number used so far in the current function. */
1524 :
1525 : int
1526 4078141 : max_label_num (void)
1527 : {
1528 4078141 : return label_num;
1529 : }
1530 :
1531 : /* Return first label number used in this function (if any were used). */
1532 :
1533 : int
1534 2571416 : get_first_label_num (void)
1535 : {
1536 2571416 : return first_label_num;
1537 : }
1538 :
1539 : /* If the rtx for label was created during the expansion of a nested
1540 : function, then first_label_num won't include this label number.
1541 : Fix this now so that array indices work later. */
1542 :
1543 : void
1544 26936 : maybe_set_first_label_num (rtx_code_label *x)
1545 : {
1546 26936 : if (CODE_LABEL_NUMBER (x) < first_label_num)
1547 389 : first_label_num = CODE_LABEL_NUMBER (x);
1548 26936 : }
1549 :
1550 : /* For use by the RTL function loader, when mingling with normal
1551 : functions.
1552 : Ensure that label_num is greater than the label num of X, to avoid
1553 : duplicate labels in the generated assembler. */
1554 :
1555 : void
1556 28 : maybe_set_max_label_num (rtx_code_label *x)
1557 : {
1558 28 : if (CODE_LABEL_NUMBER (x) >= label_num)
1559 24 : label_num = CODE_LABEL_NUMBER (x) + 1;
1560 28 : }
1561 :
1562 :
1563 : /* Return a value representing some low-order bits of X, where the number
1564 : of low-order bits is given by MODE. Note that no conversion is done
1565 : between floating-point and fixed-point values, rather, the bit
1566 : representation is returned.
1567 :
1568 : This function handles the cases in common between gen_lowpart, below,
1569 : and two variants in cse.cc and combine.cc. These are the cases that can
1570 : be safely handled at all points in the compilation.
1571 :
1572 : If this is not a case we can handle, return 0. */
1573 :
1574 : rtx
1575 52922875 : gen_lowpart_common (machine_mode mode, rtx x)
1576 : {
1577 105868922 : poly_uint64 msize = GET_MODE_SIZE (mode);
1578 52934461 : machine_mode innermode;
1579 :
1580 : /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1581 : so we have to make one up. Yuk. */
1582 52934461 : innermode = GET_MODE (x);
1583 52934461 : if (CONST_INT_P (x)
1584 52934461 : && known_le (msize * BITS_PER_UNIT,
1585 : (unsigned HOST_WIDE_INT) HOST_BITS_PER_WIDE_INT))
1586 15939183 : innermode = int_mode_for_size (HOST_BITS_PER_WIDE_INT, 0).require ();
1587 36995278 : else if (innermode == VOIDmode)
1588 194869 : innermode = int_mode_for_size (HOST_BITS_PER_DOUBLE_INT, 0).require ();
1589 :
1590 52934461 : gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1591 :
1592 52934461 : if (innermode == mode)
1593 : return x;
1594 :
1595 : /* The size of the outer and inner modes must be ordered. */
1596 60642128 : poly_uint64 xsize = GET_MODE_SIZE (innermode);
1597 30321064 : if (!ordered_p (msize, xsize))
1598 : return 0;
1599 :
1600 30321064 : if (SCALAR_FLOAT_MODE_P (mode))
1601 : {
1602 : /* Don't allow paradoxical FLOAT_MODE subregs. */
1603 264004 : if (maybe_gt (msize, xsize))
1604 : return 0;
1605 : }
1606 : else
1607 : {
1608 : /* MODE must occupy no more of the underlying registers than X. */
1609 30057060 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (innermode);
1610 30057060 : unsigned int mregs, xregs;
1611 30057060 : if (!can_div_away_from_zero_p (msize, regsize, &mregs)
1612 30057060 : || !can_div_away_from_zero_p (xsize, regsize, &xregs)
1613 30057060 : || mregs > xregs)
1614 1385 : return 0;
1615 : }
1616 :
1617 30319679 : scalar_int_mode int_mode, int_innermode, from_mode;
1618 30319679 : if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1619 158525 : && is_a <scalar_int_mode> (mode, &int_mode)
1620 30319679 : && is_a <scalar_int_mode> (innermode, &int_innermode)
1621 30478152 : && is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &from_mode))
1622 : {
1623 : /* If we are getting the low-order part of something that has been
1624 : sign- or zero-extended, we can either just use the object being
1625 : extended or make a narrower extension. If we want an even smaller
1626 : piece than the size of the object being extended, call ourselves
1627 : recursively.
1628 :
1629 : This case is used mostly by combine and cse. */
1630 :
1631 158473 : if (from_mode == int_mode)
1632 : return XEXP (x, 0);
1633 44469 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (from_mode))
1634 : return gen_lowpart_common (int_mode, XEXP (x, 0));
1635 9711 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (int_innermode))
1636 2983 : return gen_rtx_fmt_e (GET_CODE (x), int_mode, XEXP (x, 0));
1637 : }
1638 30161206 : else if (GET_CODE (x) == SUBREG || REG_P (x)
1639 : || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1640 16986118 : || CONST_DOUBLE_AS_FLOAT_P (x) || CONST_SCALAR_INT_P (x)
1641 : || CONST_POLY_INT_P (x))
1642 20283429 : return lowpart_subreg (mode, x, innermode);
1643 :
1644 : /* Otherwise, we can't do this. */
1645 : return 0;
1646 : }
1647 :
1648 : rtx
1649 9135 : gen_highpart (machine_mode mode, rtx x)
1650 : {
1651 18270 : poly_uint64 msize = GET_MODE_SIZE (mode);
1652 9135 : rtx result;
1653 :
1654 : /* This case loses if X is a subreg. To catch bugs early,
1655 : complain if an invalid MODE is used even in other cases. */
1656 10863 : gcc_assert (known_le (msize, (unsigned int) UNITS_PER_WORD)
1657 : || known_eq (msize, GET_MODE_UNIT_SIZE (GET_MODE (x))));
1658 :
1659 : /* gen_lowpart_common handles a lot of special cases due to needing to handle
1660 : paradoxical subregs; it only calls simplify_gen_subreg when certain that
1661 : it will produce something meaningful. The only case we need to handle
1662 : specially here is MEM. */
1663 9135 : if (MEM_P (x))
1664 : {
1665 137 : poly_int64 offset = subreg_highpart_offset (mode, GET_MODE (x));
1666 137 : return adjust_address (x, mode, offset);
1667 : }
1668 :
1669 8998 : result = simplify_gen_subreg (mode, x, GET_MODE (x),
1670 8998 : subreg_highpart_offset (mode, GET_MODE (x)));
1671 : /* Since we handle MEM directly above, we should never get a MEM back
1672 : from simplify_gen_subreg. */
1673 8998 : gcc_assert (result && !MEM_P (result));
1674 :
1675 : return result;
1676 : }
1677 :
1678 : /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1679 : be VOIDmode constant. */
1680 : rtx
1681 0 : gen_highpart_mode (machine_mode outermode, machine_mode innermode, rtx exp)
1682 : {
1683 0 : if (GET_MODE (exp) != VOIDmode)
1684 : {
1685 0 : gcc_assert (GET_MODE (exp) == innermode);
1686 0 : return gen_highpart (outermode, exp);
1687 : }
1688 0 : return simplify_gen_subreg (outermode, exp, innermode,
1689 0 : subreg_highpart_offset (outermode, innermode));
1690 : }
1691 :
1692 : /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1693 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1694 :
1695 : poly_uint64
1696 232167443 : subreg_size_lowpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1697 : {
1698 232167443 : gcc_checking_assert (ordered_p (outer_bytes, inner_bytes));
1699 232167443 : if (maybe_gt (outer_bytes, inner_bytes))
1700 : /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1701 51349435 : return 0;
1702 :
1703 180818008 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1704 : return inner_bytes - outer_bytes;
1705 180818008 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1706 180818008 : return 0;
1707 : else
1708 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes, 0);
1709 : }
1710 :
1711 : /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1712 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1713 :
1714 : poly_uint64
1715 43594 : subreg_size_highpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1716 : {
1717 43594 : gcc_assert (known_ge (inner_bytes, outer_bytes));
1718 :
1719 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1720 : return 0;
1721 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1722 43594 : return inner_bytes - outer_bytes;
1723 : else
1724 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes,
1725 : (inner_bytes - outer_bytes)
1726 : * BITS_PER_UNIT);
1727 : }
1728 :
1729 : /* Return true iff X, assumed to be a SUBREG,
1730 : refers to the least significant part of its containing reg.
1731 : If X is not a SUBREG, always return true (it is its own low part!). */
1732 :
1733 : bool
1734 54368342 : subreg_lowpart_p (const_rtx x)
1735 : {
1736 54368342 : if (GET_CODE (x) != SUBREG)
1737 : return true;
1738 54368342 : else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1739 : return false;
1740 :
1741 54368342 : return known_eq (subreg_lowpart_offset (GET_MODE (x),
1742 : GET_MODE (SUBREG_REG (x))),
1743 : SUBREG_BYTE (x));
1744 : }
1745 :
1746 : /* Return subword OFFSET of operand OP.
1747 : The word number, OFFSET, is interpreted as the word number starting
1748 : at the low-order address. OFFSET 0 is the low-order word if not
1749 : WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1750 :
1751 : If we cannot extract the required word, we return zero. Otherwise,
1752 : an rtx corresponding to the requested word will be returned.
1753 :
1754 : VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1755 : reload has completed, a valid address will always be returned. After
1756 : reload, if a valid address cannot be returned, we return zero.
1757 :
1758 : If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1759 : it is the responsibility of the caller.
1760 :
1761 : MODE is the mode of OP in case it is a CONST_INT.
1762 :
1763 : ??? This is still rather broken for some cases. The problem for the
1764 : moment is that all callers of this thing provide no 'goal mode' to
1765 : tell us to work with. This exists because all callers were written
1766 : in a word based SUBREG world.
1767 : Now use of this function can be deprecated by simplify_subreg in most
1768 : cases.
1769 : */
1770 :
1771 : rtx
1772 83214 : operand_subword (rtx op, poly_uint64 offset, int validate_address,
1773 : machine_mode mode)
1774 : {
1775 83214 : if (mode == VOIDmode)
1776 3044 : mode = GET_MODE (op);
1777 :
1778 3044 : gcc_assert (mode != VOIDmode);
1779 :
1780 : /* If OP is narrower than a word, fail. */
1781 83214 : if (mode != BLKmode
1782 178922 : && maybe_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1783 : return 0;
1784 :
1785 : /* If we want a word outside OP, return zero. */
1786 83214 : if (mode != BLKmode
1787 178922 : && maybe_gt ((offset + 1) * UNITS_PER_WORD, GET_MODE_SIZE (mode)))
1788 0 : return const0_rtx;
1789 :
1790 : /* Form a new MEM at the requested address. */
1791 83214 : if (MEM_P (op))
1792 : {
1793 10839 : rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1794 :
1795 9631 : if (! validate_address)
1796 : return new_rtx;
1797 :
1798 9631 : else if (reload_completed)
1799 : {
1800 0 : if (! strict_memory_address_addr_space_p (word_mode,
1801 : XEXP (new_rtx, 0),
1802 0 : MEM_ADDR_SPACE (op)))
1803 : return 0;
1804 : }
1805 : else
1806 9631 : return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1807 : }
1808 :
1809 : /* Rest can be handled by simplify_subreg. */
1810 87980 : return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1811 : }
1812 :
1813 : /* Similar to `operand_subword', but never return 0. If we can't
1814 : extract the required subword, put OP into a register and try again.
1815 : The second attempt must succeed. We always validate the address in
1816 : this case.
1817 :
1818 : MODE is the mode of OP, in case it is CONST_INT. */
1819 :
1820 : rtx
1821 62724 : operand_subword_force (rtx op, poly_uint64 offset, machine_mode mode)
1822 : {
1823 62724 : rtx result = operand_subword (op, offset, 1, mode);
1824 :
1825 62724 : if (result)
1826 : return result;
1827 :
1828 0 : if (mode != BLKmode && mode != VOIDmode)
1829 : {
1830 : /* If this is a register which cannot be accessed by words, copy it
1831 : to a pseudo register. */
1832 0 : if (REG_P (op))
1833 0 : op = copy_to_reg (op);
1834 : else
1835 0 : op = force_reg (mode, op);
1836 : }
1837 :
1838 0 : result = operand_subword (op, offset, 1, mode);
1839 0 : gcc_assert (result);
1840 :
1841 : return result;
1842 : }
1843 :
1844 31992339 : mem_attrs::mem_attrs ()
1845 31992339 : : expr (NULL_TREE),
1846 31992339 : offset (0),
1847 31992339 : size (0),
1848 31992339 : alias (0),
1849 31992339 : align (0),
1850 31992339 : addrspace (ADDR_SPACE_GENERIC),
1851 31992339 : offset_known_p (false),
1852 31992339 : size_known_p (false)
1853 31992339 : {}
1854 :
1855 : /* Returns true if both MEM_EXPR can be considered equal
1856 : and false otherwise. */
1857 :
1858 : bool
1859 44508 : mem_expr_equal_p (const_tree expr1, const_tree expr2)
1860 : {
1861 44508 : if (expr1 == expr2)
1862 : return true;
1863 :
1864 43678 : if (! expr1 || ! expr2)
1865 : return false;
1866 :
1867 33864 : if (TREE_CODE (expr1) != TREE_CODE (expr2))
1868 : return false;
1869 :
1870 32149 : return operand_equal_p (expr1, expr2, 0);
1871 : }
1872 :
1873 : /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1874 : bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1875 : -1 if not known. */
1876 :
1877 : int
1878 22 : get_mem_align_offset (rtx mem, unsigned int align)
1879 : {
1880 22 : tree expr;
1881 22 : poly_uint64 offset;
1882 :
1883 : /* This function can't use
1884 : if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1885 : || (MAX (MEM_ALIGN (mem),
1886 : MAX (align, get_object_alignment (MEM_EXPR (mem))))
1887 : < align))
1888 : return -1;
1889 : else
1890 : return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1891 : for two reasons:
1892 : - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1893 : for <variable>. get_inner_reference doesn't handle it and
1894 : even if it did, the alignment in that case needs to be determined
1895 : from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1896 : - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1897 : isn't sufficiently aligned, the object it is in might be. */
1898 22 : gcc_assert (MEM_P (mem));
1899 22 : expr = MEM_EXPR (mem);
1900 22 : if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1901 : return -1;
1902 :
1903 21 : offset = MEM_OFFSET (mem);
1904 21 : if (DECL_P (expr))
1905 : {
1906 2 : if (DECL_ALIGN (expr) < align)
1907 : return -1;
1908 : }
1909 19 : else if (INDIRECT_REF_P (expr))
1910 : {
1911 0 : if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1912 : return -1;
1913 : }
1914 19 : else if (TREE_CODE (expr) == COMPONENT_REF)
1915 : {
1916 0 : while (1)
1917 : {
1918 0 : tree inner = TREE_OPERAND (expr, 0);
1919 0 : tree field = TREE_OPERAND (expr, 1);
1920 0 : tree byte_offset = component_ref_field_offset (expr);
1921 0 : tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1922 :
1923 0 : poly_uint64 suboffset;
1924 0 : if (!byte_offset
1925 0 : || !poly_int_tree_p (byte_offset, &suboffset)
1926 0 : || !tree_fits_uhwi_p (bit_offset))
1927 0 : return -1;
1928 :
1929 0 : offset += suboffset;
1930 0 : offset += tree_to_uhwi (bit_offset) / BITS_PER_UNIT;
1931 :
1932 0 : if (inner == NULL_TREE)
1933 : {
1934 0 : if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1935 : < (unsigned int) align)
1936 : return -1;
1937 0 : break;
1938 : }
1939 0 : else if (DECL_P (inner))
1940 : {
1941 0 : if (DECL_ALIGN (inner) < align)
1942 : return -1;
1943 : break;
1944 : }
1945 0 : else if (TREE_CODE (inner) != COMPONENT_REF)
1946 : return -1;
1947 0 : expr = inner;
1948 0 : }
1949 : }
1950 : else
1951 : return -1;
1952 :
1953 0 : HOST_WIDE_INT misalign;
1954 0 : if (!known_misalignment (offset, align / BITS_PER_UNIT, &misalign))
1955 : return -1;
1956 0 : return misalign;
1957 : }
1958 :
1959 : /* Given REF (a MEM) and T, either the type of X or the expression
1960 : corresponding to REF, set the memory attributes. OBJECTP is nonzero
1961 : if we are making a new object of this type. BITPOS is nonzero if
1962 : there is an offset outstanding on T that will be applied later. */
1963 :
1964 : void
1965 31992339 : set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1966 : poly_int64 bitpos)
1967 : {
1968 31992339 : poly_int64 apply_bitpos = 0;
1969 31992339 : tree type;
1970 31992339 : class mem_attrs attrs, *defattrs, *refattrs;
1971 31992339 : addr_space_t as;
1972 :
1973 : /* It can happen that type_for_mode was given a mode for which there
1974 : is no language-level type. In which case it returns NULL, which
1975 : we can see here. */
1976 31992339 : if (t == NULL_TREE)
1977 0 : return;
1978 :
1979 31992339 : type = TYPE_P (t) ? t : TREE_TYPE (t);
1980 31992339 : if (type == error_mark_node)
1981 : return;
1982 :
1983 : /* If we have already set DECL_RTL = ref, get_alias_set will get the
1984 : wrong answer, as it assumes that DECL_RTL already has the right alias
1985 : info. Callers should not set DECL_RTL until after the call to
1986 : set_mem_attributes. */
1987 31992339 : gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1988 :
1989 : /* Get the alias set from the expression or type (perhaps using a
1990 : front-end routine) and use it. */
1991 31992339 : attrs.alias = get_alias_set (t);
1992 :
1993 31992339 : MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1994 31992339 : MEM_POINTER (ref) = POINTER_TYPE_P (type);
1995 :
1996 : /* Default values from pre-existing memory attributes if present. */
1997 31992339 : refattrs = MEM_ATTRS (ref);
1998 31992339 : if (refattrs)
1999 : {
2000 : /* ??? Can this ever happen? Calling this routine on a MEM that
2001 : already carries memory attributes should probably be invalid. */
2002 12870997 : attrs.expr = refattrs->expr;
2003 12870997 : attrs.offset_known_p = refattrs->offset_known_p;
2004 12870997 : attrs.offset = refattrs->offset;
2005 12870997 : attrs.size_known_p = refattrs->size_known_p;
2006 12870997 : attrs.size = refattrs->size;
2007 12870997 : attrs.align = refattrs->align;
2008 : }
2009 :
2010 : /* Otherwise, default values from the mode of the MEM reference. */
2011 : else
2012 : {
2013 19121342 : defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
2014 19121342 : gcc_assert (!defattrs->expr);
2015 19121342 : gcc_assert (!defattrs->offset_known_p);
2016 :
2017 : /* Respect mode size. */
2018 19121342 : attrs.size_known_p = defattrs->size_known_p;
2019 19121342 : attrs.size = defattrs->size;
2020 : /* ??? Is this really necessary? We probably should always get
2021 : the size from the type below. */
2022 :
2023 : /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
2024 : if T is an object, always compute the object alignment below. */
2025 19121342 : if (TYPE_P (t))
2026 2038243 : attrs.align = defattrs->align;
2027 : else
2028 17083099 : attrs.align = BITS_PER_UNIT;
2029 : /* ??? If T is a type, respecting mode alignment may *also* be wrong
2030 : e.g. if the type carries an alignment attribute. Should we be
2031 : able to simply always use TYPE_ALIGN? */
2032 : }
2033 :
2034 : /* We can set the alignment from the type if we are making an object or if
2035 : this is an INDIRECT_REF. */
2036 31992339 : if (objectp || TREE_CODE (t) == INDIRECT_REF)
2037 9949630 : attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
2038 :
2039 : /* If the size is known, we can set that. */
2040 31992339 : tree new_size = TYPE_SIZE_UNIT (type);
2041 :
2042 : /* The address-space is that of the type. */
2043 31992339 : as = TYPE_ADDR_SPACE (type);
2044 :
2045 : /* If T is not a type, we may be able to deduce some more information about
2046 : the expression. */
2047 31992339 : if (! TYPE_P (t))
2048 : {
2049 29947807 : tree base;
2050 :
2051 29947807 : if (TREE_THIS_VOLATILE (t))
2052 178257 : MEM_VOLATILE_P (ref) = 1;
2053 :
2054 : /* Now remove any conversions: they don't change what the underlying
2055 : object is. Likewise for SAVE_EXPR. */
2056 29952459 : while (CONVERT_EXPR_P (t)
2057 : || TREE_CODE (t) == VIEW_CONVERT_EXPR
2058 29952459 : || TREE_CODE (t) == SAVE_EXPR)
2059 4652 : t = TREE_OPERAND (t, 0);
2060 :
2061 : /* Note whether this expression can trap. */
2062 29947807 : MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
2063 :
2064 29947807 : base = get_base_address (t);
2065 29947807 : if (base)
2066 : {
2067 29947807 : if (DECL_P (base)
2068 17247791 : && TREE_READONLY (base)
2069 2223456 : && (TREE_STATIC (base) || DECL_EXTERNAL (base))
2070 31827320 : && !TREE_THIS_VOLATILE (base))
2071 1879134 : MEM_READONLY_P (ref) = 1;
2072 :
2073 : /* Mark static const strings readonly as well. */
2074 29947807 : if (TREE_CODE (base) == STRING_CST
2075 312039 : && TREE_READONLY (base)
2076 30234925 : && TREE_STATIC (base))
2077 287118 : MEM_READONLY_P (ref) = 1;
2078 :
2079 : /* Address-space information is on the base object. */
2080 29947807 : if (TREE_CODE (base) == MEM_REF
2081 29947807 : || TREE_CODE (base) == TARGET_MEM_REF)
2082 12387965 : as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
2083 : 0))));
2084 : else
2085 17559842 : as = TYPE_ADDR_SPACE (TREE_TYPE (base));
2086 : }
2087 :
2088 : /* If this expression uses it's parent's alias set, mark it such
2089 : that we won't change it. */
2090 29947807 : if (component_uses_parent_alias_set_from (t) != NULL_TREE)
2091 1175142 : MEM_KEEP_ALIAS_SET_P (ref) = 1;
2092 :
2093 : /* If this is a decl, set the attributes of the MEM from it. */
2094 29947807 : if (DECL_P (t))
2095 : {
2096 7937671 : attrs.expr = t;
2097 7937671 : attrs.offset_known_p = true;
2098 7937671 : attrs.offset = 0;
2099 7937671 : apply_bitpos = bitpos;
2100 7937671 : new_size = DECL_SIZE_UNIT (t);
2101 : }
2102 :
2103 : /* ??? If we end up with a constant or a descriptor do not
2104 : record a MEM_EXPR. */
2105 22010136 : else if (CONSTANT_CLASS_P (t)
2106 21893099 : || TREE_CODE (t) == CONSTRUCTOR)
2107 : ;
2108 :
2109 : /* If this is a field reference, record it. */
2110 21893099 : else if (TREE_CODE (t) == COMPONENT_REF)
2111 : {
2112 9892854 : attrs.expr = t;
2113 9892854 : attrs.offset_known_p = true;
2114 9892854 : attrs.offset = 0;
2115 9892854 : apply_bitpos = bitpos;
2116 9892854 : if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
2117 66051 : new_size = DECL_SIZE_UNIT (TREE_OPERAND (t, 1));
2118 : }
2119 :
2120 : /* Else record it. */
2121 : else
2122 : {
2123 12000245 : gcc_assert (handled_component_p (t)
2124 : || TREE_CODE (t) == MEM_REF
2125 : || TREE_CODE (t) == TARGET_MEM_REF);
2126 12000245 : attrs.expr = t;
2127 12000245 : attrs.offset_known_p = true;
2128 12000245 : attrs.offset = 0;
2129 12000245 : apply_bitpos = bitpos;
2130 : }
2131 :
2132 : /* If this is a reference based on a partitioned decl replace the
2133 : base with a MEM_REF of the pointer representative we created
2134 : during stack slot partitioning. */
2135 29947807 : if (attrs.expr
2136 29830770 : && VAR_P (base)
2137 14137273 : && ! is_global_var (base)
2138 38736028 : && cfun->gimple_df->decls_to_pointers != NULL)
2139 : {
2140 4117103 : tree *namep = cfun->gimple_df->decls_to_pointers->get (base);
2141 4117103 : if (namep)
2142 : {
2143 2434389 : attrs.expr = unshare_expr (attrs.expr);
2144 2434389 : tree *orig_base = &attrs.expr;
2145 5147006 : while (handled_component_p (*orig_base))
2146 2712617 : orig_base = &TREE_OPERAND (*orig_base, 0);
2147 2434389 : if (TREE_CODE (*orig_base) == MEM_REF
2148 2434389 : || TREE_CODE (*orig_base) == TARGET_MEM_REF)
2149 748527 : TREE_OPERAND (*orig_base, 0) = *namep;
2150 : else
2151 : {
2152 1685862 : tree aptrt = reference_alias_ptr_type (*orig_base);
2153 1685862 : *orig_base = build2 (MEM_REF, TREE_TYPE (*orig_base),
2154 : *namep, build_int_cst (aptrt, 0));
2155 : }
2156 : }
2157 : }
2158 :
2159 : /* Compute the alignment. */
2160 29947807 : unsigned int obj_align;
2161 29947807 : unsigned HOST_WIDE_INT obj_bitpos;
2162 29947807 : get_object_alignment_1 (t, &obj_align, &obj_bitpos);
2163 29947807 : unsigned int diff_align = known_alignment (obj_bitpos - bitpos);
2164 29947807 : if (diff_align != 0)
2165 3926695 : obj_align = MIN (obj_align, diff_align);
2166 29947807 : attrs.align = MAX (attrs.align, obj_align);
2167 : }
2168 :
2169 31992339 : poly_uint64 const_size;
2170 31992339 : if (poly_int_tree_p (new_size, &const_size))
2171 : {
2172 31354180 : attrs.size_known_p = true;
2173 31354180 : attrs.size = const_size;
2174 : }
2175 :
2176 : /* If we modified OFFSET based on T, then subtract the outstanding
2177 : bit position offset. Similarly, increase the size of the accessed
2178 : object to contain the negative offset. */
2179 31992339 : if (maybe_ne (apply_bitpos, 0))
2180 : {
2181 2781161 : gcc_assert (attrs.offset_known_p);
2182 2781161 : poly_int64 bytepos = bits_to_bytes_round_down (apply_bitpos);
2183 2781161 : attrs.offset -= bytepos;
2184 2781161 : if (attrs.size_known_p)
2185 31992339 : attrs.size += bytepos;
2186 : }
2187 :
2188 : /* Now set the attributes we computed above. */
2189 31992339 : attrs.addrspace = as;
2190 31992339 : set_mem_attrs (ref, &attrs);
2191 : }
2192 :
2193 : void
2194 27909467 : set_mem_attributes (rtx ref, tree t, int objectp)
2195 : {
2196 27909467 : set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2197 27909467 : }
2198 :
2199 : /* Set the alias set of MEM to SET. */
2200 :
2201 : void
2202 7790146 : set_mem_alias_set (rtx mem, alias_set_type set)
2203 : {
2204 : /* If the new and old alias sets don't conflict, something is wrong. */
2205 10909539 : gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
2206 7790146 : mem_attrs attrs (*get_mem_attrs (mem));
2207 7790146 : attrs.alias = set;
2208 7790146 : set_mem_attrs (mem, &attrs);
2209 7790146 : }
2210 :
2211 : /* Set the address space of MEM to ADDRSPACE (target-defined). */
2212 :
2213 : void
2214 10187812 : set_mem_addr_space (rtx mem, addr_space_t addrspace)
2215 : {
2216 10187812 : mem_attrs attrs (*get_mem_attrs (mem));
2217 10187812 : attrs.addrspace = addrspace;
2218 10187812 : set_mem_attrs (mem, &attrs);
2219 10187812 : }
2220 :
2221 : /* Set the alignment of MEM to ALIGN bits. */
2222 :
2223 : void
2224 12785670 : set_mem_align (rtx mem, unsigned int align)
2225 : {
2226 12785670 : mem_attrs attrs (*get_mem_attrs (mem));
2227 12785670 : attrs.align = align;
2228 12785670 : set_mem_attrs (mem, &attrs);
2229 12785670 : }
2230 :
2231 : /* Set the expr for MEM to EXPR. */
2232 :
2233 : void
2234 6997948 : set_mem_expr (rtx mem, tree expr)
2235 : {
2236 6997948 : mem_attrs attrs (*get_mem_attrs (mem));
2237 6997948 : attrs.expr = expr;
2238 6997948 : set_mem_attrs (mem, &attrs);
2239 6997948 : }
2240 :
2241 : /* Set the offset of MEM to OFFSET. */
2242 :
2243 : void
2244 134 : set_mem_offset (rtx mem, poly_int64 offset)
2245 : {
2246 134 : mem_attrs attrs (*get_mem_attrs (mem));
2247 134 : attrs.offset_known_p = true;
2248 134 : attrs.offset = offset;
2249 134 : set_mem_attrs (mem, &attrs);
2250 134 : }
2251 :
2252 : /* Clear the offset of MEM. */
2253 :
2254 : void
2255 89162 : clear_mem_offset (rtx mem)
2256 : {
2257 89162 : mem_attrs attrs (*get_mem_attrs (mem));
2258 89162 : attrs.offset_known_p = false;
2259 89162 : set_mem_attrs (mem, &attrs);
2260 89162 : }
2261 :
2262 : /* Set the size of MEM to SIZE. */
2263 :
2264 : void
2265 2491509 : set_mem_size (rtx mem, poly_int64 size)
2266 : {
2267 2491509 : mem_attrs attrs (*get_mem_attrs (mem));
2268 2491509 : attrs.size_known_p = true;
2269 2491509 : attrs.size = size;
2270 2491509 : set_mem_attrs (mem, &attrs);
2271 2491509 : }
2272 :
2273 : /* Clear the size of MEM. */
2274 :
2275 : void
2276 560 : clear_mem_size (rtx mem)
2277 : {
2278 560 : mem_attrs attrs (*get_mem_attrs (mem));
2279 560 : attrs.size_known_p = false;
2280 560 : set_mem_attrs (mem, &attrs);
2281 560 : }
2282 :
2283 : /* Return a memory reference like MEMREF, but with its mode changed to MODE
2284 : and its address changed to ADDR. (VOIDmode means don't change the mode.
2285 : NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2286 : returned memory location is required to be valid. INPLACE is true if any
2287 : changes can be made directly to MEMREF or false if MEMREF must be treated
2288 : as immutable.
2289 :
2290 : The memory attributes are not changed. */
2291 :
2292 : static rtx
2293 502455983 : change_address_1 (rtx memref, machine_mode mode, rtx addr, int validate,
2294 : bool inplace)
2295 : {
2296 502455983 : addr_space_t as;
2297 502455983 : rtx new_rtx;
2298 :
2299 502455983 : gcc_assert (MEM_P (memref));
2300 502455983 : as = MEM_ADDR_SPACE (memref);
2301 502455983 : if (mode == VOIDmode)
2302 475754255 : mode = GET_MODE (memref);
2303 502455983 : if (addr == 0)
2304 60 : addr = XEXP (memref, 0);
2305 482159079 : if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2306 844783939 : && (!validate || memory_address_addr_space_p (mode, addr, as)))
2307 342203705 : return memref;
2308 :
2309 : /* Don't validate address for LRA. LRA can make the address valid
2310 : by itself in most efficient way. */
2311 160252278 : if (validate && !lra_in_progress)
2312 : {
2313 23021882 : if (reload_in_progress || reload_completed)
2314 3834107 : gcc_assert (memory_address_addr_space_p (mode, addr, as));
2315 : else
2316 19187775 : addr = memory_address_addr_space (mode, addr, as);
2317 : }
2318 :
2319 160252278 : if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2320 : return memref;
2321 :
2322 156146882 : if (inplace)
2323 : {
2324 260182 : XEXP (memref, 0) = addr;
2325 260182 : return memref;
2326 : }
2327 :
2328 155886700 : new_rtx = gen_rtx_MEM (mode, addr);
2329 155886700 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2330 155886700 : return new_rtx;
2331 : }
2332 :
2333 : /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2334 : way we are changing MEMREF, so we only preserve the alias set. */
2335 :
2336 : rtx
2337 254912 : change_address (rtx memref, machine_mode mode, rtx addr)
2338 : {
2339 254912 : rtx new_rtx = change_address_1 (memref, mode, addr, 1, false);
2340 254912 : machine_mode mmode = GET_MODE (new_rtx);
2341 254912 : class mem_attrs *defattrs;
2342 :
2343 254912 : mem_attrs attrs (*get_mem_attrs (memref));
2344 254912 : defattrs = mode_mem_attrs[(int) mmode];
2345 254912 : attrs.expr = NULL_TREE;
2346 254912 : attrs.offset_known_p = false;
2347 254912 : attrs.size_known_p = defattrs->size_known_p;
2348 254912 : attrs.size = defattrs->size;
2349 254912 : attrs.align = defattrs->align;
2350 :
2351 : /* If there are no changes, just return the original memory reference. */
2352 254912 : if (new_rtx == memref)
2353 : {
2354 57729 : if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2355 : return new_rtx;
2356 :
2357 56593 : new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2358 56593 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2359 : }
2360 :
2361 253776 : set_mem_attrs (new_rtx, &attrs);
2362 253776 : return new_rtx;
2363 : }
2364 :
2365 : /* Return a memory reference like MEMREF, but with its mode changed
2366 : to MODE and its address offset by OFFSET bytes. If VALIDATE is
2367 : nonzero, the memory address is forced to be valid.
2368 : If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2369 : and the caller is responsible for adjusting MEMREF base register.
2370 : If ADJUST_OBJECT is zero, the underlying object associated with the
2371 : memory reference is left unchanged and the caller is responsible for
2372 : dealing with it. Otherwise, if the new memory reference is outside
2373 : the underlying object, even partially, then the object is dropped.
2374 : SIZE, if nonzero, is the size of an access in cases where MODE
2375 : has no inherent size. */
2376 :
2377 : rtx
2378 35544026 : adjust_address_1 (rtx memref, machine_mode mode, poly_int64 offset,
2379 : int validate, int adjust_address, int adjust_object,
2380 : poly_int64 size)
2381 : {
2382 35544026 : rtx addr = XEXP (memref, 0);
2383 35544026 : rtx new_rtx;
2384 35544026 : scalar_int_mode address_mode;
2385 35544026 : class mem_attrs attrs (*get_mem_attrs (memref)), *defattrs;
2386 35544026 : unsigned HOST_WIDE_INT max_align;
2387 : #ifdef POINTERS_EXTEND_UNSIGNED
2388 35544026 : scalar_int_mode pointer_mode
2389 35544026 : = targetm.addr_space.pointer_mode (attrs.addrspace);
2390 : #endif
2391 :
2392 : /* VOIDmode means no mode change for change_address_1. */
2393 35544026 : if (mode == VOIDmode)
2394 17229 : mode = GET_MODE (memref);
2395 :
2396 : /* Take the size of non-BLKmode accesses from the mode. */
2397 35544026 : defattrs = mode_mem_attrs[(int) mode];
2398 35544026 : if (defattrs->size_known_p)
2399 29354698 : size = defattrs->size;
2400 :
2401 : /* If there are no changes, just return the original memory reference. */
2402 35544026 : if (mode == GET_MODE (memref)
2403 15372195 : && known_eq (offset, 0)
2404 9097845 : && (known_eq (size, 0)
2405 3766225 : || (attrs.size_known_p && known_eq (attrs.size, size)))
2406 49551512 : && (!validate || memory_address_addr_space_p (mode, addr,
2407 4910270 : attrs.addrspace)))
2408 9097210 : return memref;
2409 :
2410 : /* ??? Prefer to create garbage instead of creating shared rtl.
2411 : This may happen even if offset is nonzero -- consider
2412 : (plus (plus reg reg) const_int) -- so do this always. */
2413 26446816 : addr = copy_rtx (addr);
2414 :
2415 : /* Convert a possibly large offset to a signed value within the
2416 : range of the target address space. */
2417 26446816 : address_mode = get_address_mode (memref);
2418 26446816 : offset = trunc_int_for_mode (offset, address_mode);
2419 :
2420 26446816 : if (adjust_address)
2421 : {
2422 : /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2423 : object, we can merge it into the LO_SUM. */
2424 26416677 : if (GET_MODE (memref) != BLKmode
2425 12079646 : && GET_CODE (addr) == LO_SUM
2426 26416677 : && known_in_range_p (offset,
2427 0 : 0, (GET_MODE_ALIGNMENT (GET_MODE (memref))
2428 0 : / BITS_PER_UNIT)))
2429 0 : addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2430 : plus_constant (address_mode,
2431 : XEXP (addr, 1), offset));
2432 : #ifdef POINTERS_EXTEND_UNSIGNED
2433 : /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2434 : in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2435 : the fact that pointers are not allowed to overflow. */
2436 26416677 : else if (POINTERS_EXTEND_UNSIGNED > 0
2437 26416677 : && GET_CODE (addr) == ZERO_EXTEND
2438 12 : && GET_MODE (XEXP (addr, 0)) == pointer_mode
2439 26416679 : && known_eq (trunc_int_for_mode (offset, pointer_mode), offset))
2440 2 : addr = gen_rtx_ZERO_EXTEND (address_mode,
2441 : plus_constant (pointer_mode,
2442 : XEXP (addr, 0), offset));
2443 : #endif
2444 : else
2445 26416675 : addr = plus_constant (address_mode, addr, offset);
2446 : }
2447 :
2448 26446816 : new_rtx = change_address_1 (memref, mode, addr, validate, false);
2449 :
2450 : /* If the address is a REG, change_address_1 rightfully returns memref,
2451 : but this would destroy memref's MEM_ATTRS. */
2452 26446816 : if (new_rtx == memref && maybe_ne (offset, 0))
2453 30094 : new_rtx = copy_rtx (new_rtx);
2454 :
2455 : /* Conservatively drop the object if we don't know where we start from. */
2456 26446816 : if (adjust_object && (!attrs.offset_known_p || !attrs.size_known_p))
2457 : {
2458 1621 : attrs.expr = NULL_TREE;
2459 1621 : attrs.alias = 0;
2460 : }
2461 :
2462 : /* Compute the new values of the memory attributes due to this adjustment.
2463 : We add the offsets and update the alignment. */
2464 26446816 : if (attrs.offset_known_p)
2465 : {
2466 22621841 : attrs.offset += offset;
2467 :
2468 : /* Drop the object if the new left end is not within its bounds. */
2469 22621841 : if (adjust_object && maybe_lt (attrs.offset, 0))
2470 : {
2471 25606 : attrs.expr = NULL_TREE;
2472 25606 : attrs.alias = 0;
2473 : }
2474 : }
2475 :
2476 : /* Compute the new alignment by taking the MIN of the alignment and the
2477 : lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2478 : if zero. */
2479 26446816 : if (maybe_ne (offset, 0))
2480 : {
2481 12111279 : max_align = known_alignment (offset) * BITS_PER_UNIT;
2482 12111279 : attrs.align = MIN (attrs.align, max_align);
2483 : }
2484 :
2485 26446816 : if (maybe_ne (size, 0))
2486 : {
2487 : /* Drop the object if the new right end is not within its bounds. */
2488 25747314 : if (adjust_object && maybe_gt (offset + size, attrs.size))
2489 : {
2490 64688 : attrs.expr = NULL_TREE;
2491 64688 : attrs.alias = 0;
2492 : }
2493 25747314 : attrs.size_known_p = true;
2494 25747314 : attrs.size = size;
2495 : }
2496 699502 : else if (attrs.size_known_p)
2497 : {
2498 692938 : gcc_assert (!adjust_object);
2499 26446816 : attrs.size -= offset;
2500 : /* ??? The store_by_pieces machinery generates negative sizes,
2501 : so don't assert for that here. */
2502 : }
2503 :
2504 26446816 : set_mem_attrs (new_rtx, &attrs);
2505 :
2506 26446816 : return new_rtx;
2507 : }
2508 :
2509 : /* Return a memory reference like MEMREF, but with its mode changed
2510 : to MODE and its address changed to ADDR, which is assumed to be
2511 : MEMREF offset by OFFSET bytes. If VALIDATE is
2512 : nonzero, the memory address is forced to be valid. */
2513 :
2514 : rtx
2515 58993 : adjust_automodify_address_1 (rtx memref, machine_mode mode, rtx addr,
2516 : poly_int64 offset, int validate)
2517 : {
2518 58993 : memref = change_address_1 (memref, VOIDmode, addr, validate, false);
2519 58993 : return adjust_address_1 (memref, mode, offset, validate, 0, 0, 0);
2520 : }
2521 :
2522 : /* Return a memory reference like MEMREF, but whose address is changed by
2523 : adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2524 : known to be in OFFSET (possibly 1). */
2525 :
2526 : rtx
2527 765045 : offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2528 : {
2529 765045 : rtx new_rtx, addr = XEXP (memref, 0);
2530 765045 : machine_mode address_mode;
2531 765045 : class mem_attrs *defattrs;
2532 :
2533 765045 : mem_attrs attrs (*get_mem_attrs (memref));
2534 765045 : address_mode = get_address_mode (memref);
2535 765045 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2536 :
2537 : /* At this point we don't know _why_ the address is invalid. It
2538 : could have secondary memory references, multiplies or anything.
2539 :
2540 : However, if we did go and rearrange things, we can wind up not
2541 : being able to recognize the magic around pic_offset_table_rtx.
2542 : This stuff is fragile, and is yet another example of why it is
2543 : bad to expose PIC machinery too early. */
2544 1528354 : if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2545 765045 : attrs.addrspace)
2546 134392 : && GET_CODE (addr) == PLUS
2547 815114 : && XEXP (addr, 0) == pic_offset_table_rtx)
2548 : {
2549 1736 : addr = force_reg (GET_MODE (addr), addr);
2550 1736 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2551 : }
2552 :
2553 765045 : update_temp_slot_address (XEXP (memref, 0), new_rtx);
2554 765045 : new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1, false);
2555 :
2556 : /* If there are no changes, just return the original memory reference. */
2557 765045 : if (new_rtx == memref)
2558 : return new_rtx;
2559 :
2560 : /* Update the alignment to reflect the offset. Reset the offset, which
2561 : we don't know. */
2562 765045 : defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2563 765045 : attrs.offset_known_p = false;
2564 765045 : attrs.size_known_p = defattrs->size_known_p;
2565 765045 : attrs.size = defattrs->size;
2566 765045 : attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2567 765045 : set_mem_attrs (new_rtx, &attrs);
2568 765045 : return new_rtx;
2569 : }
2570 :
2571 : /* Return a memory reference like MEMREF, but with its address changed to
2572 : ADDR. The caller is asserting that the actual piece of memory pointed
2573 : to is the same, just the form of the address is being changed, such as
2574 : by putting something into a register. INPLACE is true if any changes
2575 : can be made directly to MEMREF or false if MEMREF must be treated as
2576 : immutable. */
2577 :
2578 : rtx
2579 12924232 : replace_equiv_address (rtx memref, rtx addr, bool inplace)
2580 : {
2581 : /* change_address_1 copies the memory attribute structure without change
2582 : and that's exactly what we want here. */
2583 12924232 : update_temp_slot_address (XEXP (memref, 0), addr);
2584 12924232 : return change_address_1 (memref, VOIDmode, addr, 1, inplace);
2585 : }
2586 :
2587 : /* Likewise, but the reference is not required to be valid. */
2588 :
2589 : rtx
2590 462005985 : replace_equiv_address_nv (rtx memref, rtx addr, bool inplace)
2591 : {
2592 462005985 : return change_address_1 (memref, VOIDmode, addr, 0, inplace);
2593 : }
2594 :
2595 :
2596 : /* Emit insns to reload VALUE into a new register. VALUE is an
2597 : auto-increment or auto-decrement RTX whose operand is a register or
2598 : memory location; so reloading involves incrementing that location.
2599 :
2600 : INC_AMOUNT is the number to increment or decrement by (always
2601 : positive and ignored for POST_MODIFY/PRE_MODIFY).
2602 :
2603 : Return a pseudo containing the result. */
2604 : rtx
2605 0 : address_reload_context::emit_autoinc (rtx value, poly_int64 inc_amount)
2606 : {
2607 : /* Since we're going to call recog, and might be called within recog,
2608 : we need to ensure we save and restore recog_data. */
2609 0 : recog_data_saver recog_save;
2610 :
2611 : /* REG or MEM to be copied and incremented. */
2612 0 : rtx incloc = XEXP (value, 0);
2613 :
2614 0 : const rtx_code code = GET_CODE (value);
2615 0 : const bool post_p
2616 0 : = code == POST_DEC || code == POST_INC || code == POST_MODIFY;
2617 :
2618 0 : bool plus_p = true;
2619 0 : rtx inc;
2620 0 : if (code == PRE_MODIFY || code == POST_MODIFY)
2621 : {
2622 0 : gcc_assert (GET_CODE (XEXP (value, 1)) == PLUS
2623 : || GET_CODE (XEXP (value, 1)) == MINUS);
2624 0 : gcc_assert (rtx_equal_p (XEXP (XEXP (value, 1), 0), XEXP (value, 0)));
2625 0 : plus_p = GET_CODE (XEXP (value, 1)) == PLUS;
2626 0 : inc = XEXP (XEXP (value, 1), 1);
2627 : }
2628 : else
2629 : {
2630 0 : if (code == PRE_DEC || code == POST_DEC)
2631 0 : inc_amount = -inc_amount;
2632 :
2633 0 : inc = gen_int_mode (inc_amount, GET_MODE (value));
2634 : }
2635 :
2636 0 : rtx result;
2637 0 : if (!post_p && REG_P (incloc))
2638 : result = incloc;
2639 : else
2640 : {
2641 0 : result = get_reload_reg ();
2642 : /* First copy the location to the result register. */
2643 0 : emit_insn (gen_move_insn (result, incloc));
2644 : }
2645 :
2646 : /* See if we can directly increment INCLOC. */
2647 0 : rtx_insn *last = get_last_insn ();
2648 0 : rtx_insn *add_insn = emit_insn (plus_p
2649 0 : ? gen_add2_insn (incloc, inc)
2650 0 : : gen_sub2_insn (incloc, inc));
2651 0 : const int icode = recog_memoized (add_insn);
2652 0 : if (icode >= 0)
2653 : {
2654 0 : if (!post_p && result != incloc)
2655 0 : emit_insn (gen_move_insn (result, incloc));
2656 0 : return result;
2657 : }
2658 0 : delete_insns_since (last);
2659 :
2660 : /* If couldn't do the increment directly, must increment in RESULT.
2661 : The way we do this depends on whether this is pre- or
2662 : post-increment. For pre-increment, copy INCLOC to the reload
2663 : register, increment it there, then save back. */
2664 0 : if (!post_p)
2665 : {
2666 0 : if (incloc != result)
2667 0 : emit_insn (gen_move_insn (result, incloc));
2668 0 : if (plus_p)
2669 0 : emit_insn (gen_add2_insn (result, inc));
2670 : else
2671 0 : emit_insn (gen_sub2_insn (result, inc));
2672 0 : if (incloc != result)
2673 0 : emit_insn (gen_move_insn (incloc, result));
2674 : }
2675 : else
2676 : {
2677 : /* Post-increment.
2678 :
2679 : Because this might be a jump insn or a compare, and because
2680 : RESULT may not be available after the insn in an input
2681 : reload, we must do the incrementing before the insn being
2682 : reloaded for.
2683 :
2684 : We have already copied INCLOC to RESULT. Increment the copy in
2685 : RESULT, save that back, then decrement RESULT so it has
2686 : the original value. */
2687 0 : if (plus_p)
2688 0 : emit_insn (gen_add2_insn (result, inc));
2689 : else
2690 0 : emit_insn (gen_sub2_insn (result, inc));
2691 0 : emit_insn (gen_move_insn (incloc, result));
2692 : /* Restore non-modified value for the result. We prefer this
2693 : way because it does not require an additional hard
2694 : register. */
2695 0 : if (plus_p)
2696 : {
2697 0 : poly_int64 offset;
2698 0 : if (poly_int_rtx_p (inc, &offset))
2699 0 : emit_insn (gen_add2_insn (result,
2700 : gen_int_mode (-offset,
2701 0 : GET_MODE (result))));
2702 : else
2703 0 : emit_insn (gen_sub2_insn (result, inc));
2704 : }
2705 : else
2706 0 : emit_insn (gen_add2_insn (result, inc));
2707 : }
2708 : return result;
2709 0 : }
2710 :
2711 : /* Return a memory reference like MEM, but with the address reloaded into a
2712 : pseudo register. */
2713 :
2714 : rtx
2715 0 : force_reload_address (rtx mem)
2716 : {
2717 0 : rtx addr = XEXP (mem, 0);
2718 0 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
2719 : {
2720 0 : const auto size = GET_MODE_SIZE (GET_MODE (mem));
2721 0 : addr = address_reload_context ().emit_autoinc (addr, size);
2722 : }
2723 : else
2724 0 : addr = force_reg (Pmode, addr);
2725 :
2726 0 : return replace_equiv_address (mem, addr);
2727 : }
2728 :
2729 : /* Return a memory reference like MEMREF, but with its mode widened to
2730 : MODE and offset by OFFSET. This would be used by targets that e.g.
2731 : cannot issue QImode memory operations and have to use SImode memory
2732 : operations plus masking logic. */
2733 :
2734 : rtx
2735 0 : widen_memory_access (rtx memref, machine_mode mode, poly_int64 offset)
2736 : {
2737 0 : rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1, 0, 0);
2738 0 : poly_uint64 size = GET_MODE_SIZE (mode);
2739 :
2740 : /* If there are no changes, just return the original memory reference. */
2741 0 : if (new_rtx == memref)
2742 : return new_rtx;
2743 :
2744 0 : mem_attrs attrs (*get_mem_attrs (new_rtx));
2745 :
2746 : /* If we don't know what offset we were at within the expression, then
2747 : we can't know if we've overstepped the bounds. */
2748 0 : if (! attrs.offset_known_p)
2749 0 : attrs.expr = NULL_TREE;
2750 :
2751 0 : while (attrs.expr)
2752 : {
2753 0 : if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2754 : {
2755 0 : tree field = TREE_OPERAND (attrs.expr, 1);
2756 0 : tree offset = component_ref_field_offset (attrs.expr);
2757 :
2758 0 : if (! DECL_SIZE_UNIT (field))
2759 : {
2760 0 : attrs.expr = NULL_TREE;
2761 0 : break;
2762 : }
2763 :
2764 : /* Is the field at least as large as the access? If so, ok,
2765 : otherwise strip back to the containing structure. */
2766 0 : if (poly_int_tree_p (DECL_SIZE_UNIT (field))
2767 0 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (field)), size)
2768 0 : && known_ge (attrs.offset, 0))
2769 : break;
2770 :
2771 0 : poly_uint64 suboffset;
2772 0 : if (!poly_int_tree_p (offset, &suboffset))
2773 : {
2774 0 : attrs.expr = NULL_TREE;
2775 0 : break;
2776 : }
2777 :
2778 0 : attrs.expr = TREE_OPERAND (attrs.expr, 0);
2779 0 : attrs.offset += suboffset;
2780 0 : attrs.offset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
2781 0 : / BITS_PER_UNIT);
2782 : }
2783 : /* Similarly for the decl. */
2784 0 : else if (DECL_P (attrs.expr)
2785 0 : && DECL_SIZE_UNIT (attrs.expr)
2786 0 : && poly_int_tree_p (DECL_SIZE_UNIT (attrs.expr))
2787 0 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (attrs.expr)),
2788 : size)
2789 0 : && known_ge (attrs.offset, 0))
2790 : break;
2791 : else
2792 : {
2793 : /* The widened memory access overflows the expression, which means
2794 : that it could alias another expression. Zap it. */
2795 0 : attrs.expr = NULL_TREE;
2796 0 : break;
2797 : }
2798 : }
2799 :
2800 0 : if (! attrs.expr)
2801 0 : attrs.offset_known_p = false;
2802 :
2803 : /* The widened memory may alias other stuff, so zap the alias set. */
2804 : /* ??? Maybe use get_alias_set on any remaining expression. */
2805 0 : attrs.alias = 0;
2806 0 : attrs.size_known_p = true;
2807 0 : attrs.size = size;
2808 0 : set_mem_attrs (new_rtx, &attrs);
2809 0 : return new_rtx;
2810 : }
2811 :
2812 : /* A fake decl that is used as the MEM_EXPR of spill slots. */
2813 : static GTY(()) tree spill_slot_decl;
2814 :
2815 : tree
2816 824542165 : get_spill_slot_decl (bool force_build_p)
2817 : {
2818 824542165 : tree d = spill_slot_decl;
2819 824542165 : rtx rd;
2820 :
2821 824542165 : if (d || !force_build_p)
2822 : return d;
2823 :
2824 30757 : d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2825 : VAR_DECL, get_identifier ("%sfp"), void_type_node);
2826 30757 : DECL_ARTIFICIAL (d) = 1;
2827 30757 : DECL_IGNORED_P (d) = 1;
2828 30757 : TREE_USED (d) = 1;
2829 30757 : spill_slot_decl = d;
2830 :
2831 30757 : rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2832 30757 : MEM_NOTRAP_P (rd) = 1;
2833 30757 : mem_attrs attrs (*mode_mem_attrs[(int) BLKmode]);
2834 30757 : attrs.alias = new_alias_set ();
2835 30757 : attrs.expr = d;
2836 30757 : set_mem_attrs (rd, &attrs);
2837 30757 : SET_DECL_RTL (d, rd);
2838 :
2839 30757 : return d;
2840 : }
2841 :
2842 : /* Given MEM, a result from assign_stack_local, fill in the memory
2843 : attributes as appropriate for a register allocator spill slot.
2844 : These slots are not aliasable by other memory. We arrange for
2845 : them all to use a single MEM_EXPR, so that the aliasing code can
2846 : work properly in the case of shared spill slots. */
2847 :
2848 : void
2849 1436813 : set_mem_attrs_for_spill (rtx mem)
2850 : {
2851 1436813 : rtx addr;
2852 :
2853 1436813 : mem_attrs attrs (*get_mem_attrs (mem));
2854 1436813 : attrs.expr = get_spill_slot_decl (true);
2855 1436813 : attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2856 1436813 : attrs.addrspace = ADDR_SPACE_GENERIC;
2857 :
2858 : /* We expect the incoming memory to be of the form:
2859 : (mem:MODE (plus (reg sfp) (const_int offset)))
2860 : with perhaps the plus missing for offset = 0. */
2861 1436813 : addr = XEXP (mem, 0);
2862 1436813 : attrs.offset_known_p = true;
2863 1436813 : strip_offset (addr, &attrs.offset);
2864 :
2865 1436813 : set_mem_attrs (mem, &attrs);
2866 1436813 : MEM_NOTRAP_P (mem) = 1;
2867 1436813 : }
2868 :
2869 : /* Return a newly created CODE_LABEL rtx with a unique label number. */
2870 :
2871 : rtx_code_label *
2872 15521202 : gen_label_rtx (void)
2873 : {
2874 15521202 : return as_a <rtx_code_label *> (
2875 : gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
2876 15521202 : NULL, label_num++, NULL));
2877 : }
2878 :
2879 : /* For procedure integration. */
2880 :
2881 : /* Install new pointers to the first and last insns in the chain.
2882 : Also, set cur_insn_uid to one higher than the last in use.
2883 : Used for an inline-procedure after copying the insn chain. */
2884 :
2885 : void
2886 8 : set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
2887 : {
2888 8 : rtx_insn *insn;
2889 :
2890 8 : set_first_insn (first);
2891 8 : set_last_insn (last);
2892 8 : cur_insn_uid = 0;
2893 :
2894 8 : if (param_min_nondebug_insn_uid || MAY_HAVE_DEBUG_INSNS)
2895 : {
2896 0 : int debug_count = 0;
2897 :
2898 0 : cur_insn_uid = param_min_nondebug_insn_uid - 1;
2899 0 : cur_debug_insn_uid = 0;
2900 :
2901 0 : for (insn = first; insn; insn = NEXT_INSN (insn))
2902 0 : if (INSN_UID (insn) < param_min_nondebug_insn_uid)
2903 0 : cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2904 : else
2905 : {
2906 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2907 0 : if (DEBUG_INSN_P (insn))
2908 0 : debug_count++;
2909 : }
2910 :
2911 0 : if (debug_count)
2912 0 : cur_debug_insn_uid = param_min_nondebug_insn_uid + debug_count;
2913 : else
2914 0 : cur_debug_insn_uid++;
2915 : }
2916 : else
2917 8 : for (insn = first; insn; insn = NEXT_INSN (insn))
2918 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2919 :
2920 8 : cur_insn_uid++;
2921 8 : }
2922 :
2923 : /* Go through all the RTL insn bodies and copy any invalid shared
2924 : structure. This routine should only be called once. */
2925 :
2926 : static void
2927 3010675 : unshare_all_rtl_1 (rtx_insn *insn)
2928 : {
2929 : /* Unshare just about everything else. */
2930 3010675 : unshare_all_rtl_in_chain (insn);
2931 :
2932 : /* Make sure the addresses of stack slots found outside the insn chain
2933 : (such as, in DECL_RTL of a variable) are not shared
2934 : with the insn chain.
2935 :
2936 : This special care is necessary when the stack slot MEM does not
2937 : actually appear in the insn chain. If it does appear, its address
2938 : is unshared from all else at that point. */
2939 3010675 : unsigned int i;
2940 3010675 : rtx temp;
2941 9303425 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2942 3282075 : (*stack_slot_list)[i] = copy_rtx_if_shared (temp);
2943 3010675 : }
2944 :
2945 : /* Go through all the RTL insn bodies and copy any invalid shared
2946 : structure, again. This is a fairly expensive thing to do so it
2947 : should be done sparingly. */
2948 :
2949 : void
2950 1504950 : unshare_all_rtl_again (rtx_insn *insn)
2951 : {
2952 1504950 : rtx_insn *p;
2953 1504950 : tree decl;
2954 :
2955 172541336 : for (p = insn; p; p = NEXT_INSN (p))
2956 171036386 : if (INSN_P (p))
2957 : {
2958 135429174 : reset_used_flags (PATTERN (p));
2959 135429174 : reset_used_flags (REG_NOTES (p));
2960 135429174 : if (CALL_P (p))
2961 6110291 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2962 : }
2963 :
2964 : /* Make sure that virtual stack slots are not shared. */
2965 1504950 : set_used_decls (DECL_INITIAL (cfun->decl));
2966 :
2967 : /* Make sure that virtual parameters are not shared. */
2968 4656813 : for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2969 3151863 : set_used_flags (DECL_RTL (decl));
2970 :
2971 : rtx temp;
2972 : unsigned int i;
2973 3935773 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2974 2430823 : reset_used_flags (temp);
2975 :
2976 1504950 : unshare_all_rtl_1 (insn);
2977 1504950 : }
2978 :
2979 : void
2980 1505725 : unshare_all_rtl (void)
2981 : {
2982 1505725 : unshare_all_rtl_1 (get_insns ());
2983 :
2984 4658144 : for (tree decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2985 : {
2986 3152419 : if (DECL_RTL_SET_P (decl))
2987 3152419 : SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2988 3152419 : DECL_INCOMING_RTL (decl) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl));
2989 : }
2990 1505725 : }
2991 :
2992 :
2993 : /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2994 : Recursively does the same for subexpressions. */
2995 :
2996 : static void
2997 56884941984 : verify_rtx_sharing (rtx orig, rtx insn)
2998 : {
2999 56884941984 : rtx x = orig;
3000 56884941984 : int i;
3001 56884941984 : enum rtx_code code;
3002 56884941984 : const char *format_ptr;
3003 :
3004 56884941984 : if (x == 0)
3005 : return;
3006 :
3007 47125727346 : code = GET_CODE (x);
3008 :
3009 : /* These types may be freely shared. */
3010 :
3011 47125727346 : switch (code)
3012 : {
3013 : case REG:
3014 : case DEBUG_EXPR:
3015 : case VALUE:
3016 : CASE_CONST_ANY:
3017 : case SYMBOL_REF:
3018 : case LABEL_REF:
3019 : case CODE_LABEL:
3020 : case PC:
3021 : case RETURN:
3022 : case SIMPLE_RETURN:
3023 : case SCRATCH:
3024 : /* SCRATCH must be shared because they represent distinct values. */
3025 : return;
3026 2026785875 : case CLOBBER:
3027 : /* Share clobbers of hard registers, but do not share pseudo reg
3028 : clobbers or clobbers of hard registers that originated as pseudos.
3029 : This is needed to allow safe register renaming. */
3030 2026785875 : if (REG_P (XEXP (x, 0))
3031 732844645 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3032 2756531701 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3033 : return;
3034 : break;
3035 :
3036 36166535 : case CONST:
3037 36166535 : if (shared_const_p (orig))
3038 : return;
3039 : break;
3040 :
3041 2791260636 : case MEM:
3042 : /* A MEM is allowed to be shared if its address is constant. */
3043 2791260636 : if (CONSTANT_ADDRESS_P (XEXP (x, 0))
3044 2791260636 : || reload_completed || reload_in_progress)
3045 : return;
3046 :
3047 : break;
3048 :
3049 : default:
3050 : break;
3051 : }
3052 :
3053 : /* This rtx may not be shared. If it has already been seen,
3054 : replace it with a copy of itself. */
3055 22884873596 : if (flag_checking && RTX_FLAG (x, used))
3056 : {
3057 0 : error ("invalid rtl sharing found in the insn");
3058 0 : debug_rtx (insn);
3059 0 : error ("shared rtx");
3060 0 : debug_rtx (x);
3061 0 : internal_error ("internal consistency failure");
3062 : }
3063 22884873596 : gcc_assert (!RTX_FLAG (x, used));
3064 :
3065 22884873596 : RTX_FLAG (x, used) = 1;
3066 :
3067 : /* Now scan the subexpressions recursively. */
3068 :
3069 22884873596 : format_ptr = GET_RTX_FORMAT (code);
3070 :
3071 64199384273 : for (i = 0; i < GET_RTX_LENGTH (code); i++)
3072 : {
3073 41314510677 : switch (*format_ptr++)
3074 : {
3075 36040826385 : case 'e':
3076 36040826385 : verify_rtx_sharing (XEXP (x, i), insn);
3077 36040826385 : break;
3078 :
3079 913597943 : case 'E':
3080 913597943 : if (XVEC (x, i) != NULL)
3081 : {
3082 913597943 : int j;
3083 913597943 : int len = XVECLEN (x, i);
3084 :
3085 2756900736 : for (j = 0; j < len; j++)
3086 : {
3087 : /* We allow sharing of ASM_OPERANDS inside single
3088 : instruction. */
3089 1843302793 : if (j && GET_CODE (XVECEXP (x, i, j)) == SET
3090 55919125 : && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
3091 : == ASM_OPERANDS))
3092 3239720 : verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
3093 : else
3094 1840063073 : verify_rtx_sharing (XVECEXP (x, i, j), insn);
3095 : }
3096 : }
3097 : break;
3098 : }
3099 : }
3100 : }
3101 :
3102 : /* Reset used-flags for INSN. */
3103 :
3104 : static void
3105 18582899900 : reset_insn_used_flags (rtx insn)
3106 : {
3107 18582899900 : gcc_assert (INSN_P (insn));
3108 18582899900 : reset_used_flags (PATTERN (insn));
3109 18582899900 : reset_used_flags (REG_NOTES (insn));
3110 18582899900 : if (CALL_P (insn))
3111 835825812 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn));
3112 18582899900 : }
3113 :
3114 : /* Go through all the RTL insn bodies and clear all the USED bits. */
3115 :
3116 : static void
3117 191182968 : reset_all_used_flags (void)
3118 : {
3119 191182968 : rtx_insn *p;
3120 :
3121 25095027402 : for (p = get_insns (); p; p = NEXT_INSN (p))
3122 24903844434 : if (INSN_P (p))
3123 : {
3124 18582899900 : rtx pat = PATTERN (p);
3125 18582899900 : if (GET_CODE (pat) != SEQUENCE)
3126 18582899900 : reset_insn_used_flags (p);
3127 : else
3128 : {
3129 0 : gcc_assert (REG_NOTES (p) == NULL);
3130 0 : for (int i = 0; i < XVECLEN (pat, 0); i++)
3131 : {
3132 0 : rtx insn = XVECEXP (pat, 0, i);
3133 0 : if (INSN_P (insn))
3134 0 : reset_insn_used_flags (insn);
3135 : }
3136 : }
3137 : }
3138 191182968 : }
3139 :
3140 : /* Verify sharing in INSN. */
3141 :
3142 : static void
3143 9291449950 : verify_insn_sharing (rtx insn)
3144 : {
3145 9291449950 : gcc_assert (INSN_P (insn));
3146 9291449950 : verify_rtx_sharing (PATTERN (insn), insn);
3147 9291449950 : verify_rtx_sharing (REG_NOTES (insn), insn);
3148 9291449950 : if (CALL_P (insn))
3149 417912906 : verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn), insn);
3150 9291449950 : }
3151 :
3152 : /* Go through all the RTL insn bodies and check that there is no unexpected
3153 : sharing in between the subexpressions. */
3154 :
3155 : DEBUG_FUNCTION void
3156 95591484 : verify_rtl_sharing (void)
3157 : {
3158 95591484 : rtx_insn *p;
3159 :
3160 95591484 : timevar_push (TV_VERIFY_RTL_SHARING);
3161 :
3162 95591484 : reset_all_used_flags ();
3163 :
3164 12547513701 : for (p = get_insns (); p; p = NEXT_INSN (p))
3165 12451922217 : if (INSN_P (p))
3166 : {
3167 9291449950 : rtx pat = PATTERN (p);
3168 9291449950 : if (GET_CODE (pat) != SEQUENCE)
3169 9291449950 : verify_insn_sharing (p);
3170 : else
3171 0 : for (int i = 0; i < XVECLEN (pat, 0); i++)
3172 : {
3173 0 : rtx insn = XVECEXP (pat, 0, i);
3174 0 : if (INSN_P (insn))
3175 0 : verify_insn_sharing (insn);
3176 : }
3177 : }
3178 :
3179 95591484 : reset_all_used_flags ();
3180 :
3181 95591484 : timevar_pop (TV_VERIFY_RTL_SHARING);
3182 95591484 : }
3183 :
3184 : /* Go through all the RTL insn bodies and copy any invalid shared structure.
3185 : Assumes the mark bits are cleared at entry. */
3186 :
3187 : void
3188 9484003 : unshare_all_rtl_in_chain (rtx_insn *insn)
3189 : {
3190 367369835 : for (; insn; insn = NEXT_INSN (insn))
3191 357885832 : if (INSN_P (insn))
3192 : {
3193 292722813 : PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
3194 292722813 : REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
3195 292722813 : if (CALL_P (insn))
3196 12212385 : CALL_INSN_FUNCTION_USAGE (insn)
3197 12212385 : = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
3198 : }
3199 9484003 : }
3200 :
3201 : /* Go through all virtual stack slots of a function and mark them as
3202 : shared. We never replace the DECL_RTLs themselves with a copy,
3203 : but expressions mentioned into a DECL_RTL cannot be shared with
3204 : expressions in the instruction stream.
3205 :
3206 : Note that reload may convert pseudo registers into memories in-place.
3207 : Pseudo registers are always shared, but MEMs never are. Thus if we
3208 : reset the used flags on MEMs in the instruction stream, we must set
3209 : them again on MEMs that appear in DECL_RTLs. */
3210 :
3211 : static void
3212 17168402 : set_used_decls (tree blk)
3213 : {
3214 17168402 : tree t;
3215 :
3216 : /* Mark decls. */
3217 37421961 : for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
3218 20253559 : if (DECL_RTL_SET_P (t))
3219 2328815 : set_used_flags (DECL_RTL (t));
3220 :
3221 : /* Now process sub-blocks. */
3222 32831854 : for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
3223 15663452 : set_used_decls (t);
3224 17168402 : }
3225 :
3226 : /* Mark ORIG as in use, and return a copy of it if it was already in use.
3227 : Recursively does the same for subexpressions. Uses
3228 : copy_rtx_if_shared_1 to reduce stack space. */
3229 :
3230 : rtx
3231 634974459 : copy_rtx_if_shared (rtx orig)
3232 : {
3233 634974459 : copy_rtx_if_shared_1 (&orig);
3234 634974459 : return orig;
3235 : }
3236 :
3237 : /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
3238 : use. Recursively does the same for subexpressions. */
3239 :
3240 : static void
3241 1107918166 : copy_rtx_if_shared_1 (rtx *orig1)
3242 : {
3243 1107918166 : rtx x;
3244 1107918166 : int i;
3245 1107918166 : enum rtx_code code;
3246 1107918166 : rtx *last_ptr;
3247 1107918166 : const char *format_ptr;
3248 1107918166 : int copied = 0;
3249 1830472154 : int length;
3250 :
3251 : /* Repeat is used to turn tail-recursion into iteration. */
3252 1830472154 : repeat:
3253 1830472154 : x = *orig1;
3254 :
3255 1830472154 : if (x == 0)
3256 : return;
3257 :
3258 1504917821 : code = GET_CODE (x);
3259 :
3260 : /* These types may be freely shared. */
3261 :
3262 1504917821 : switch (code)
3263 : {
3264 : case REG:
3265 : case DEBUG_EXPR:
3266 : case VALUE:
3267 : CASE_CONST_ANY:
3268 : case SYMBOL_REF:
3269 : case LABEL_REF:
3270 : case CODE_LABEL:
3271 : case PC:
3272 : case RETURN:
3273 : case SIMPLE_RETURN:
3274 : case SCRATCH:
3275 : /* SCRATCH must be shared because they represent distinct values. */
3276 : return;
3277 62478463 : case CLOBBER:
3278 : /* Share clobbers of hard registers, but do not share pseudo reg
3279 : clobbers or clobbers of hard registers that originated as pseudos.
3280 : This is needed to allow safe register renaming. */
3281 62478463 : if (REG_P (XEXP (x, 0))
3282 26201003 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3283 88501226 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3284 : return;
3285 : break;
3286 :
3287 5613052 : case CONST:
3288 5613052 : if (shared_const_p (x))
3289 : return;
3290 : break;
3291 :
3292 : case DEBUG_INSN:
3293 : case INSN:
3294 : case JUMP_INSN:
3295 : case CALL_INSN:
3296 : case NOTE:
3297 : case BARRIER:
3298 : /* The chain of insns is not being copied. */
3299 : return;
3300 :
3301 : default:
3302 : break;
3303 : }
3304 :
3305 : /* This rtx may not be shared. If it has already been seen,
3306 : replace it with a copy of itself. */
3307 :
3308 750049761 : if (RTX_FLAG (x, used))
3309 : {
3310 4949260 : x = shallow_copy_rtx (x);
3311 4949260 : copied = 1;
3312 : }
3313 750049761 : RTX_FLAG (x, used) = 1;
3314 :
3315 : /* Now scan the subexpressions recursively.
3316 : We can store any replaced subexpressions directly into X
3317 : since we know X is not shared! Any vectors in X
3318 : must be copied if X was copied. */
3319 :
3320 750049761 : format_ptr = GET_RTX_FORMAT (code);
3321 750049761 : length = GET_RTX_LENGTH (code);
3322 750049761 : last_ptr = NULL;
3323 :
3324 2113694907 : for (i = 0; i < length; i++)
3325 : {
3326 1363645146 : switch (*format_ptr++)
3327 : {
3328 1132885011 : case 'e':
3329 1132885011 : if (last_ptr)
3330 441504032 : copy_rtx_if_shared_1 (last_ptr);
3331 1132885011 : last_ptr = &XEXP (x, i);
3332 1132885011 : break;
3333 :
3334 31925252 : case 'E':
3335 31925252 : if (XVEC (x, i) != NULL)
3336 : {
3337 31925252 : int j;
3338 31925252 : int len = XVECLEN (x, i);
3339 :
3340 : /* Copy the vector iff I copied the rtx and the length
3341 : is nonzero. */
3342 31925252 : if (copied && len > 0)
3343 1374 : XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
3344 :
3345 : /* Call recursively on all inside the vector. */
3346 94537936 : for (j = 0; j < len; j++)
3347 : {
3348 62612684 : if (last_ptr)
3349 31439675 : copy_rtx_if_shared_1 (last_ptr);
3350 62612684 : last_ptr = &XVECEXP (x, i, j);
3351 : }
3352 : }
3353 : break;
3354 : }
3355 : }
3356 750049761 : *orig1 = x;
3357 750049761 : if (last_ptr)
3358 : {
3359 722553988 : orig1 = last_ptr;
3360 722553988 : goto repeat;
3361 : }
3362 : }
3363 :
3364 : /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3365 :
3366 : static void
3367 80168290327 : mark_used_flags (rtx x, int flag)
3368 : {
3369 >12467*10^7 : int i, j;
3370 >12467*10^7 : enum rtx_code code;
3371 >12467*10^7 : const char *format_ptr;
3372 >12467*10^7 : int length;
3373 :
3374 : /* Repeat is used to turn tail-recursion into iteration. */
3375 >12467*10^7 : repeat:
3376 >12467*10^7 : if (x == 0)
3377 : return;
3378 :
3379 >10499*10^7 : code = GET_CODE (x);
3380 :
3381 : /* These types may be freely shared so we needn't do any resetting
3382 : for them. */
3383 :
3384 >10499*10^7 : switch (code)
3385 : {
3386 : case REG:
3387 : case DEBUG_EXPR:
3388 : case VALUE:
3389 : CASE_CONST_ANY:
3390 : case SYMBOL_REF:
3391 : case CODE_LABEL:
3392 : case PC:
3393 : case RETURN:
3394 : case SIMPLE_RETURN:
3395 : return;
3396 :
3397 : case DEBUG_INSN:
3398 : case INSN:
3399 : case JUMP_INSN:
3400 : case CALL_INSN:
3401 : case NOTE:
3402 : case LABEL_REF:
3403 : case BARRIER:
3404 : /* The chain of insns is not being copied. */
3405 : return;
3406 :
3407 54262796353 : default:
3408 54262796353 : break;
3409 : }
3410 :
3411 54262796353 : RTX_FLAG (x, used) = flag;
3412 :
3413 54262796353 : format_ptr = GET_RTX_FORMAT (code);
3414 54262796353 : length = GET_RTX_LENGTH (code);
3415 :
3416 >10701*10^7 : for (i = 0; i < length; i++)
3417 : {
3418 97255726140 : switch (*format_ptr++)
3419 : {
3420 82605045348 : case 'e':
3421 82605045348 : if (i == length-1)
3422 : {
3423 44508116925 : x = XEXP (x, i);
3424 44508116925 : goto repeat;
3425 : }
3426 38096928423 : mark_used_flags (XEXP (x, i), flag);
3427 38096928423 : break;
3428 :
3429 : case 'E':
3430 5641941762 : for (j = 0; j < XVECLEN (x, i); j++)
3431 3758222603 : mark_used_flags (XVECEXP (x, i, j), flag);
3432 : break;
3433 : }
3434 : }
3435 : }
3436 :
3437 : /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3438 : to look for shared sub-parts. */
3439 :
3440 : void
3441 38305744192 : reset_used_flags (rtx x)
3442 : {
3443 38305744192 : mark_used_flags (x, 0);
3444 38305744192 : }
3445 :
3446 : /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3447 : to look for shared sub-parts. */
3448 :
3449 : void
3450 7395109 : set_used_flags (rtx x)
3451 : {
3452 7395109 : mark_used_flags (x, 1);
3453 7395109 : }
3454 :
3455 : /* Copy X if necessary so that it won't be altered by changes in OTHER.
3456 : Return X or the rtx for the pseudo reg the value of X was copied into.
3457 : OTHER must be valid as a SET_DEST. */
3458 :
3459 : rtx
3460 0 : make_safe_from (rtx x, rtx other)
3461 : {
3462 0 : while (1)
3463 0 : switch (GET_CODE (other))
3464 : {
3465 0 : case SUBREG:
3466 0 : other = SUBREG_REG (other);
3467 0 : break;
3468 0 : case STRICT_LOW_PART:
3469 0 : case SIGN_EXTEND:
3470 0 : case ZERO_EXTEND:
3471 0 : other = XEXP (other, 0);
3472 0 : break;
3473 0 : default:
3474 0 : goto done;
3475 : }
3476 0 : done:
3477 0 : if ((MEM_P (other)
3478 0 : && ! CONSTANT_P (x)
3479 0 : && !REG_P (x)
3480 0 : && GET_CODE (x) != SUBREG)
3481 0 : || (REG_P (other)
3482 0 : && (REGNO (other) < FIRST_PSEUDO_REGISTER
3483 0 : || reg_mentioned_p (other, x))))
3484 : {
3485 0 : rtx temp = gen_reg_rtx (GET_MODE (x));
3486 0 : emit_move_insn (temp, x);
3487 0 : return temp;
3488 : }
3489 : return x;
3490 : }
3491 :
3492 : /* Emission of insns (adding them to the doubly-linked list). */
3493 :
3494 : /* Return the last insn emitted, even if it is in a sequence now pushed. */
3495 :
3496 : rtx_insn *
3497 0 : get_last_insn_anywhere (void)
3498 : {
3499 0 : struct sequence_stack *seq;
3500 0 : for (seq = get_current_sequence (); seq; seq = seq->next)
3501 0 : if (seq->last != 0)
3502 : return seq->last;
3503 : return 0;
3504 : }
3505 :
3506 : /* Return the first nonnote insn emitted in current sequence or current
3507 : function. This routine looks inside SEQUENCEs. */
3508 :
3509 : rtx_insn *
3510 0 : get_first_nonnote_insn (void)
3511 : {
3512 0 : rtx_insn *insn = get_insns ();
3513 :
3514 0 : if (insn)
3515 : {
3516 0 : if (NOTE_P (insn))
3517 0 : for (insn = next_insn (insn);
3518 0 : insn && NOTE_P (insn);
3519 0 : insn = next_insn (insn))
3520 0 : continue;
3521 : else
3522 : {
3523 0 : if (NONJUMP_INSN_P (insn)
3524 0 : && GET_CODE (PATTERN (insn)) == SEQUENCE)
3525 0 : insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3526 : }
3527 : }
3528 :
3529 0 : return insn;
3530 : }
3531 :
3532 : /* Return the last nonnote insn emitted in current sequence or current
3533 : function. This routine looks inside SEQUENCEs. */
3534 :
3535 : rtx_insn *
3536 0 : get_last_nonnote_insn (void)
3537 : {
3538 0 : rtx_insn *insn = get_last_insn ();
3539 :
3540 0 : if (insn)
3541 : {
3542 0 : if (NOTE_P (insn))
3543 0 : for (insn = previous_insn (insn);
3544 0 : insn && NOTE_P (insn);
3545 0 : insn = previous_insn (insn))
3546 0 : continue;
3547 : else
3548 : {
3549 0 : if (NONJUMP_INSN_P (insn))
3550 0 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3551 0 : insn = seq->insn (seq->len () - 1);
3552 : }
3553 : }
3554 :
3555 0 : return insn;
3556 : }
3557 :
3558 : /* Return the number of actual (non-debug) insns emitted in this
3559 : function. */
3560 :
3561 : int
3562 2043294 : get_max_insn_count (void)
3563 : {
3564 2043294 : int n = cur_insn_uid;
3565 :
3566 : /* The table size must be stable across -g, to avoid codegen
3567 : differences due to debug insns, and not be affected by
3568 : -fmin-insn-uid, to avoid excessive table size and to simplify
3569 : debugging of -fcompare-debug failures. */
3570 2043294 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
3571 2043294 : n -= cur_debug_insn_uid;
3572 : else
3573 0 : n -= param_min_nondebug_insn_uid;
3574 :
3575 2043294 : return n;
3576 : }
3577 :
3578 :
3579 : /* Return the next insn. If it is a SEQUENCE, return the first insn
3580 : of the sequence. */
3581 :
3582 : rtx_insn *
3583 129639929 : next_insn (rtx_insn *insn)
3584 : {
3585 129639929 : if (insn)
3586 : {
3587 129639929 : insn = NEXT_INSN (insn);
3588 129331868 : if (insn && NONJUMP_INSN_P (insn)
3589 143944361 : && GET_CODE (PATTERN (insn)) == SEQUENCE)
3590 0 : insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3591 : }
3592 :
3593 129639929 : return insn;
3594 : }
3595 :
3596 : /* Return the previous insn. If it is a SEQUENCE, return the last insn
3597 : of the sequence. */
3598 :
3599 : rtx_insn *
3600 71520 : previous_insn (rtx_insn *insn)
3601 : {
3602 71520 : if (insn)
3603 : {
3604 71520 : insn = PREV_INSN (insn);
3605 71520 : if (insn && NONJUMP_INSN_P (insn))
3606 8592 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3607 0 : insn = seq->insn (seq->len () - 1);
3608 : }
3609 :
3610 71520 : return insn;
3611 : }
3612 :
3613 : /* Return the next insn after INSN that is not a NOTE. This routine does not
3614 : look inside SEQUENCEs. */
3615 :
3616 : rtx_insn *
3617 549369 : next_nonnote_insn (rtx_insn *insn)
3618 : {
3619 573111 : while (insn)
3620 : {
3621 573111 : insn = NEXT_INSN (insn);
3622 573111 : if (insn == 0 || !NOTE_P (insn))
3623 : break;
3624 : }
3625 :
3626 549369 : return insn;
3627 : }
3628 :
3629 : /* Return the next insn after INSN that is not a DEBUG_INSN. This
3630 : routine does not look inside SEQUENCEs. */
3631 :
3632 : rtx_insn *
3633 6085416 : next_nondebug_insn (rtx_insn *insn)
3634 : {
3635 8510386 : while (insn)
3636 : {
3637 8510386 : insn = NEXT_INSN (insn);
3638 8510386 : if (insn == 0 || !DEBUG_INSN_P (insn))
3639 : break;
3640 : }
3641 :
3642 6085416 : return insn;
3643 : }
3644 :
3645 : /* Return the previous insn before INSN that is not a NOTE. This routine does
3646 : not look inside SEQUENCEs. */
3647 :
3648 : rtx_insn *
3649 93561527 : prev_nonnote_insn (rtx_insn *insn)
3650 : {
3651 98483720 : while (insn)
3652 : {
3653 98483720 : insn = PREV_INSN (insn);
3654 98483720 : if (insn == 0 || !NOTE_P (insn))
3655 : break;
3656 : }
3657 :
3658 93561527 : return insn;
3659 : }
3660 :
3661 : /* Return the previous insn before INSN that is not a DEBUG_INSN.
3662 : This routine does not look inside SEQUENCEs. */
3663 :
3664 : rtx_insn *
3665 2036991 : prev_nondebug_insn (rtx_insn *insn)
3666 : {
3667 4376546 : while (insn)
3668 : {
3669 4376546 : insn = PREV_INSN (insn);
3670 4376546 : if (insn == 0 || !DEBUG_INSN_P (insn))
3671 : break;
3672 : }
3673 :
3674 2036991 : return insn;
3675 : }
3676 :
3677 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3678 : This routine does not look inside SEQUENCEs. */
3679 :
3680 : rtx_insn *
3681 51997124 : next_nonnote_nondebug_insn (rtx_insn *insn)
3682 : {
3683 70891787 : while (insn)
3684 : {
3685 70891787 : insn = NEXT_INSN (insn);
3686 70891787 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3687 : break;
3688 : }
3689 :
3690 51997124 : return insn;
3691 : }
3692 :
3693 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN,
3694 : but stop the search before we enter another basic block. This
3695 : routine does not look inside SEQUENCEs.
3696 : NOTE: This can potentially bleed into next BB. If current insn is
3697 : last insn of BB, followed by a code_label before the start of
3698 : the next BB, code_label will be returned. But this is the
3699 : behavior rest of gcc assumes/relies on e.g. get_last_bb_insn. */
3700 :
3701 : rtx_insn *
3702 7432788 : next_nonnote_nondebug_insn_bb (rtx_insn *insn)
3703 : {
3704 7463803 : while (insn)
3705 : {
3706 7463803 : insn = NEXT_INSN (insn);
3707 7463803 : if (insn == 0)
3708 : break;
3709 7236121 : if (DEBUG_INSN_P (insn))
3710 0 : continue;
3711 7236121 : if (!NOTE_P (insn))
3712 : break;
3713 2144761 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3714 : return NULL;
3715 : }
3716 :
3717 : return insn;
3718 : }
3719 :
3720 : /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3721 : This routine does not look inside SEQUENCEs. */
3722 :
3723 : rtx_insn *
3724 122926911 : prev_nonnote_nondebug_insn (rtx_insn *insn)
3725 : {
3726 232257667 : while (insn)
3727 : {
3728 232257667 : insn = PREV_INSN (insn);
3729 232257667 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3730 : break;
3731 : }
3732 :
3733 122926911 : return insn;
3734 : }
3735 :
3736 : /* Return the previous insn before INSN that is not a NOTE nor
3737 : DEBUG_INSN, but stop the search before we enter another basic
3738 : block. This routine does not look inside SEQUENCEs. */
3739 :
3740 : rtx_insn *
3741 70491821 : prev_nonnote_nondebug_insn_bb (rtx_insn *insn)
3742 : {
3743 139441619 : while (insn)
3744 : {
3745 139441619 : insn = PREV_INSN (insn);
3746 139441619 : if (insn == 0)
3747 : break;
3748 139441032 : if (DEBUG_INSN_P (insn))
3749 59397146 : continue;
3750 80043886 : if (!NOTE_P (insn))
3751 : break;
3752 21483901 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3753 : return NULL;
3754 : }
3755 :
3756 : return insn;
3757 : }
3758 :
3759 : /* Return the next INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN after INSN;
3760 : or 0, if there is none. This routine does not look inside
3761 : SEQUENCEs. */
3762 :
3763 : rtx_insn *
3764 4211111 : next_real_insn (rtx_insn *insn)
3765 : {
3766 4274065 : while (insn)
3767 : {
3768 4274065 : insn = NEXT_INSN (insn);
3769 4274065 : if (insn == 0 || INSN_P (insn))
3770 : break;
3771 : }
3772 :
3773 4211111 : return insn;
3774 : }
3775 :
3776 : /* Return the last INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN before INSN;
3777 : or 0, if there is none. This routine does not look inside
3778 : SEQUENCEs. */
3779 :
3780 : rtx_insn *
3781 992219 : prev_real_insn (rtx_insn *insn)
3782 : {
3783 2931278 : while (insn)
3784 : {
3785 2931278 : insn = PREV_INSN (insn);
3786 2931278 : if (insn == 0 || INSN_P (insn))
3787 : break;
3788 : }
3789 :
3790 992219 : return insn;
3791 : }
3792 :
3793 : /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3794 : or 0, if there is none. This routine does not look inside
3795 : SEQUENCEs. */
3796 :
3797 : rtx_insn *
3798 0 : next_real_nondebug_insn (rtx uncast_insn)
3799 : {
3800 0 : rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
3801 :
3802 0 : while (insn)
3803 : {
3804 0 : insn = NEXT_INSN (insn);
3805 0 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3806 : break;
3807 : }
3808 :
3809 0 : return insn;
3810 : }
3811 :
3812 : /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3813 : or 0, if there is none. This routine does not look inside
3814 : SEQUENCEs. */
3815 :
3816 : rtx_insn *
3817 5049270 : prev_real_nondebug_insn (rtx_insn *insn)
3818 : {
3819 15694409 : while (insn)
3820 : {
3821 15694409 : insn = PREV_INSN (insn);
3822 15694409 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3823 : break;
3824 : }
3825 :
3826 5049270 : return insn;
3827 : }
3828 :
3829 : /* Return the last CALL_INSN in the current list, or 0 if there is none.
3830 : This routine does not look inside SEQUENCEs. */
3831 :
3832 : rtx_call_insn *
3833 12200301 : last_call_insn (void)
3834 : {
3835 12200301 : rtx_insn *insn;
3836 :
3837 12327229 : for (insn = get_last_insn ();
3838 12327229 : insn && !CALL_P (insn);
3839 126928 : insn = PREV_INSN (insn))
3840 : ;
3841 :
3842 12200301 : return safe_as_a <rtx_call_insn *> (insn);
3843 : }
3844 :
3845 : bool
3846 1165090441 : active_insn_p (const rtx_insn *insn)
3847 : {
3848 1165090441 : return (CALL_P (insn) || JUMP_P (insn)
3849 1165090441 : || JUMP_TABLE_DATA_P (insn) /* FIXME */
3850 1165090441 : || (NONJUMP_INSN_P (insn)
3851 690380886 : && (! reload_completed
3852 490503517 : || (GET_CODE (PATTERN (insn)) != USE
3853 488899579 : && GET_CODE (PATTERN (insn)) != CLOBBER))));
3854 : }
3855 :
3856 : /* Find the next insn after INSN that really does something. This routine
3857 : does not look inside SEQUENCEs. After reload this also skips over
3858 : standalone USE and CLOBBER insn. */
3859 :
3860 : rtx_insn *
3861 114092070 : next_active_insn (rtx_insn *insn)
3862 : {
3863 256863549 : while (insn)
3864 : {
3865 256863549 : insn = NEXT_INSN (insn);
3866 370955619 : if (insn == 0 || active_insn_p (insn))
3867 : break;
3868 : }
3869 :
3870 114092070 : return insn;
3871 : }
3872 :
3873 : /* Find the last insn before INSN that really does something. This routine
3874 : does not look inside SEQUENCEs. After reload this also skips over
3875 : standalone USE and CLOBBER insn. */
3876 :
3877 : rtx_insn *
3878 45110 : prev_active_insn (rtx_insn *insn)
3879 : {
3880 134527 : while (insn)
3881 : {
3882 134527 : insn = PREV_INSN (insn);
3883 179637 : if (insn == 0 || active_insn_p (insn))
3884 : break;
3885 : }
3886 :
3887 45110 : return insn;
3888 : }
3889 :
3890 : /* Find a RTX_AUTOINC class rtx which matches DATA. */
3891 :
3892 : static int
3893 0 : find_auto_inc (const_rtx x, const_rtx reg)
3894 : {
3895 0 : subrtx_iterator::array_type array;
3896 0 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
3897 : {
3898 0 : const_rtx x = *iter;
3899 0 : if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC
3900 0 : && rtx_equal_p (reg, XEXP (x, 0)))
3901 0 : return true;
3902 : }
3903 0 : return false;
3904 0 : }
3905 :
3906 : /* Increment the label uses for all labels present in rtx. */
3907 :
3908 : static void
3909 56194431 : mark_label_nuses (rtx x)
3910 : {
3911 56194431 : enum rtx_code code;
3912 56194431 : int i, j;
3913 56194431 : const char *fmt;
3914 :
3915 56194431 : code = GET_CODE (x);
3916 56194436 : if (code == LABEL_REF && LABEL_P (label_ref_label (x)))
3917 1 : LABEL_NUSES (label_ref_label (x))++;
3918 :
3919 56194431 : fmt = GET_RTX_FORMAT (code);
3920 138680430 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3921 : {
3922 82485999 : if (fmt[i] == 'e')
3923 44172225 : mark_label_nuses (XEXP (x, i));
3924 38313774 : else if (fmt[i] == 'E')
3925 3863127 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3926 2678953 : mark_label_nuses (XVECEXP (x, i, j));
3927 : }
3928 56194431 : }
3929 :
3930 :
3931 : /* Try splitting insns that can be split for better scheduling.
3932 : PAT is the pattern which might split.
3933 : TRIAL is the insn providing PAT.
3934 : LAST is nonzero if we should return the last insn of the sequence produced.
3935 :
3936 : If this routine succeeds in splitting, it returns the first or last
3937 : replacement insn depending on the value of LAST. Otherwise, it
3938 : returns TRIAL. If the insn to be returned can be split, it will be. */
3939 :
3940 : rtx_insn *
3941 399549191 : try_split (rtx pat, rtx_insn *trial, int last)
3942 : {
3943 399549191 : rtx_insn *before, *after;
3944 399549191 : rtx note;
3945 399549191 : rtx_insn *seq, *tem;
3946 399549191 : profile_probability probability;
3947 399549191 : rtx_insn *insn_last, *insn;
3948 399549191 : int njumps = 0;
3949 399549191 : rtx_insn *call_insn = NULL;
3950 :
3951 399549191 : if (any_condjump_p (trial)
3952 399549191 : && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3953 14893587 : split_branch_probability
3954 14893587 : = profile_probability::from_reg_br_prob_note (XINT (note, 0));
3955 : else
3956 384655604 : split_branch_probability = profile_probability::uninitialized ();
3957 :
3958 399549191 : probability = split_branch_probability;
3959 :
3960 399549191 : seq = split_insns (pat, trial);
3961 :
3962 399549191 : split_branch_probability = profile_probability::uninitialized ();
3963 :
3964 399549191 : if (!seq)
3965 : return trial;
3966 :
3967 : int split_insn_count = 0;
3968 : /* Avoid infinite loop if any insn of the result matches
3969 : the original pattern. */
3970 : insn_last = seq;
3971 9358985 : while (1)
3972 : {
3973 9358985 : if (INSN_P (insn_last)
3974 9358985 : && rtx_equal_p (PATTERN (insn_last), pat))
3975 : return trial;
3976 9357471 : split_insn_count++;
3977 9357471 : if (!NEXT_INSN (insn_last))
3978 : break;
3979 : insn_last = NEXT_INSN (insn_last);
3980 : }
3981 :
3982 : /* We're not good at redistributing frame information if
3983 : the split occurs before reload or if it results in more
3984 : than one insn. */
3985 6204200 : if (RTX_FRAME_RELATED_P (trial))
3986 : {
3987 37 : if (!reload_completed || split_insn_count != 1)
3988 : return trial;
3989 :
3990 37 : rtx_insn *new_insn = seq;
3991 37 : rtx_insn *old_insn = trial;
3992 37 : copy_frame_info_to_split_insn (old_insn, new_insn);
3993 : }
3994 :
3995 : /* We will be adding the new sequence to the function. The splitters
3996 : may have introduced invalid RTL sharing, so unshare the sequence now. */
3997 6204200 : unshare_all_rtl_in_chain (seq);
3998 :
3999 : /* Mark labels and copy flags. */
4000 15561671 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4001 : {
4002 9357471 : if (JUMP_P (insn))
4003 : {
4004 6190 : if (JUMP_P (trial))
4005 5323 : CROSSING_JUMP_P (insn) = CROSSING_JUMP_P (trial);
4006 6190 : mark_jump_label (PATTERN (insn), insn, 0);
4007 6190 : njumps++;
4008 6190 : if (probability.initialized_p ()
4009 5293 : && any_condjump_p (insn)
4010 11483 : && !find_reg_note (insn, REG_BR_PROB, 0))
4011 : {
4012 : /* We can preserve the REG_BR_PROB notes only if exactly
4013 : one jump is created, otherwise the machine description
4014 : is responsible for this step using
4015 : split_branch_probability variable. */
4016 5293 : gcc_assert (njumps == 1);
4017 5293 : add_reg_br_prob_note (insn, probability);
4018 : }
4019 : }
4020 : }
4021 :
4022 : /* If we are splitting a CALL_INSN, look for the CALL_INSN
4023 : in SEQ and copy any additional information across. */
4024 6204200 : if (CALL_P (trial))
4025 : {
4026 0 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4027 0 : if (CALL_P (insn))
4028 : {
4029 0 : gcc_assert (call_insn == NULL_RTX);
4030 0 : call_insn = insn;
4031 :
4032 : /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
4033 : target may have explicitly specified. */
4034 0 : rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
4035 0 : while (*p)
4036 0 : p = &XEXP (*p, 1);
4037 0 : *p = CALL_INSN_FUNCTION_USAGE (trial);
4038 :
4039 : /* Preserve the ABI information from the original call. */
4040 0 : CALL_INSN_ABI_ID (insn) = CALL_INSN_ABI_ID (trial);
4041 :
4042 : /* If the old call was a sibling call, the new one must
4043 : be too. */
4044 0 : SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
4045 : }
4046 : }
4047 :
4048 : /* Copy notes, particularly those related to the CFG. */
4049 8058618 : for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
4050 : {
4051 1854418 : switch (REG_NOTE_KIND (note))
4052 : {
4053 2806 : case REG_EH_REGION:
4054 2806 : copy_reg_eh_region_note_backward (note, insn_last, NULL);
4055 2806 : break;
4056 :
4057 : case REG_NORETURN:
4058 : case REG_SETJMP:
4059 : case REG_TM:
4060 : case REG_CALL_NOCF_CHECK:
4061 : case REG_CALL_ARG_LOCATION:
4062 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4063 : {
4064 0 : if (CALL_P (insn))
4065 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4066 : }
4067 : break;
4068 :
4069 : case REG_NON_LOCAL_GOTO:
4070 : case REG_LABEL_TARGET:
4071 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4072 : {
4073 0 : if (JUMP_P (insn))
4074 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4075 : }
4076 : break;
4077 :
4078 : case REG_INC:
4079 : if (!AUTO_INC_DEC)
4080 : break;
4081 :
4082 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4083 : {
4084 : rtx reg = XEXP (note, 0);
4085 : if (!FIND_REG_INC_NOTE (insn, reg)
4086 : && find_auto_inc (PATTERN (insn), reg))
4087 : add_reg_note (insn, REG_INC, reg);
4088 : }
4089 : break;
4090 :
4091 309203 : case REG_ARGS_SIZE:
4092 309203 : fixup_args_size_notes (NULL, insn_last, get_args_size (note));
4093 309203 : break;
4094 :
4095 0 : case REG_CALL_DECL:
4096 0 : case REG_UNTYPED_CALL:
4097 0 : gcc_assert (call_insn != NULL_RTX);
4098 0 : add_reg_note (call_insn, REG_NOTE_KIND (note), XEXP (note, 0));
4099 0 : break;
4100 :
4101 : default:
4102 : break;
4103 : }
4104 : }
4105 :
4106 : /* If there are LABELS inside the split insns increment the
4107 : usage count so we don't delete the label. */
4108 6204200 : if (INSN_P (trial))
4109 : {
4110 : insn = insn_last;
4111 15561671 : while (insn != NULL_RTX)
4112 : {
4113 : /* JUMP_P insns have already been "marked" above. */
4114 9357471 : if (NONJUMP_INSN_P (insn))
4115 9343253 : mark_label_nuses (PATTERN (insn));
4116 :
4117 9357471 : insn = PREV_INSN (insn);
4118 : }
4119 : }
4120 :
4121 6204200 : before = PREV_INSN (trial);
4122 6204200 : after = NEXT_INSN (trial);
4123 :
4124 6204200 : emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
4125 :
4126 6204200 : delete_insn (trial);
4127 :
4128 : /* Recursively call try_split for each new insn created; by the
4129 : time control returns here that insn will be fully split, so
4130 : set LAST and continue from the insn after the one returned.
4131 : We can't use next_active_insn here since AFTER may be a note.
4132 : Ignore deleted insns, which can be occur if not optimizing. */
4133 21765871 : for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
4134 9357471 : if (! tem->deleted () && INSN_P (tem))
4135 9349443 : tem = try_split (PATTERN (tem), tem, 1);
4136 :
4137 : /* Return either the first or the last insn, depending on which was
4138 : requested. */
4139 6204200 : return last
4140 6204200 : ? (after ? PREV_INSN (after) : get_last_insn ())
4141 0 : : NEXT_INSN (before);
4142 : }
4143 :
4144 : /* Make and return an INSN rtx, initializing all its slots.
4145 : Store PATTERN in the pattern slots. */
4146 :
4147 : rtx_insn *
4148 127472008 : make_insn_raw (rtx pattern)
4149 : {
4150 127472008 : rtx_insn *insn;
4151 :
4152 127472008 : insn = as_a <rtx_insn *> (rtx_alloc (INSN));
4153 :
4154 127472008 : INSN_UID (insn) = cur_insn_uid++;
4155 127472008 : PATTERN (insn) = pattern;
4156 127472008 : INSN_CODE (insn) = -1;
4157 127472008 : REG_NOTES (insn) = NULL;
4158 127472008 : INSN_LOCATION (insn) = curr_insn_location ();
4159 127472008 : BLOCK_FOR_INSN (insn) = NULL;
4160 :
4161 : #ifdef ENABLE_RTL_CHECKING
4162 : if (insn
4163 : && INSN_P (insn)
4164 : && (returnjump_p (insn)
4165 : || (GET_CODE (insn) == SET
4166 : && SET_DEST (insn) == pc_rtx)))
4167 : {
4168 : warning (0, "ICE: %<emit_insn%> used where %<emit_jump_insn%> needed:");
4169 : debug_rtx (insn);
4170 : }
4171 : #endif
4172 :
4173 127472008 : return insn;
4174 : }
4175 :
4176 : /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
4177 :
4178 : static rtx_insn *
4179 53572362 : make_debug_insn_raw (rtx pattern)
4180 : {
4181 53572362 : rtx_debug_insn *insn;
4182 :
4183 53572362 : insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
4184 53572362 : INSN_UID (insn) = cur_debug_insn_uid++;
4185 53572362 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
4186 53572362 : INSN_UID (insn) = cur_insn_uid++;
4187 :
4188 53572362 : PATTERN (insn) = pattern;
4189 53572362 : INSN_CODE (insn) = -1;
4190 53572362 : REG_NOTES (insn) = NULL;
4191 53572362 : INSN_LOCATION (insn) = curr_insn_location ();
4192 53572362 : BLOCK_FOR_INSN (insn) = NULL;
4193 :
4194 53572362 : return insn;
4195 : }
4196 :
4197 : /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
4198 :
4199 : static rtx_insn *
4200 18329077 : make_jump_insn_raw (rtx pattern)
4201 : {
4202 18329077 : rtx_jump_insn *insn;
4203 :
4204 18329077 : insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
4205 18329077 : INSN_UID (insn) = cur_insn_uid++;
4206 :
4207 18329077 : PATTERN (insn) = pattern;
4208 18329077 : INSN_CODE (insn) = -1;
4209 18329077 : REG_NOTES (insn) = NULL;
4210 18329077 : JUMP_LABEL (insn) = NULL;
4211 18329077 : INSN_LOCATION (insn) = curr_insn_location ();
4212 18329077 : BLOCK_FOR_INSN (insn) = NULL;
4213 :
4214 18329077 : return insn;
4215 : }
4216 :
4217 : /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
4218 :
4219 : static rtx_insn *
4220 6416437 : make_call_insn_raw (rtx pattern)
4221 : {
4222 6416437 : rtx_call_insn *insn;
4223 :
4224 6416437 : insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
4225 6416437 : INSN_UID (insn) = cur_insn_uid++;
4226 :
4227 6416437 : PATTERN (insn) = pattern;
4228 6416437 : INSN_CODE (insn) = -1;
4229 6416437 : REG_NOTES (insn) = NULL;
4230 6416437 : CALL_INSN_FUNCTION_USAGE (insn) = NULL;
4231 6416437 : CALL_INSN_ABI_ID (insn) = 0;
4232 6416437 : INSN_LOCATION (insn) = curr_insn_location ();
4233 6416437 : BLOCK_FOR_INSN (insn) = NULL;
4234 :
4235 6416437 : return insn;
4236 : }
4237 :
4238 : /* Like `make_insn_raw' but make a NOTE instead of an insn. */
4239 :
4240 : static rtx_note *
4241 172745738 : make_note_raw (enum insn_note subtype)
4242 : {
4243 : /* Some notes are never created this way at all. These notes are
4244 : only created by patching out insns. */
4245 172745738 : gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
4246 : && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
4247 :
4248 172745738 : rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
4249 172745738 : INSN_UID (note) = cur_insn_uid++;
4250 172745738 : NOTE_KIND (note) = subtype;
4251 172745738 : BLOCK_FOR_INSN (note) = NULL;
4252 172745738 : memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4253 172745738 : return note;
4254 : }
4255 :
4256 : /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
4257 : INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
4258 : but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
4259 :
4260 : static inline void
4261 606024128 : link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
4262 : {
4263 606024128 : SET_PREV_INSN (insn) = prev;
4264 606024128 : SET_NEXT_INSN (insn) = next;
4265 606024128 : if (prev != NULL)
4266 : {
4267 436073899 : SET_NEXT_INSN (prev) = insn;
4268 436073899 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4269 : {
4270 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4271 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
4272 : }
4273 : }
4274 606024128 : if (next != NULL)
4275 : {
4276 177613733 : SET_PREV_INSN (next) = insn;
4277 177613733 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4278 : {
4279 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4280 0 : SET_PREV_INSN (sequence->insn (0)) = insn;
4281 : }
4282 : }
4283 :
4284 606024128 : if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
4285 : {
4286 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
4287 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4288 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4289 : }
4290 606024128 : }
4291 :
4292 : /* Add INSN to the end of the doubly-linked list.
4293 : INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4294 :
4295 : void
4296 416995307 : add_insn (rtx_insn *insn)
4297 : {
4298 416995307 : rtx_insn *prev = get_last_insn ();
4299 416995307 : link_insn_into_chain (insn, prev, NULL);
4300 416995307 : if (get_insns () == NULL)
4301 169763448 : set_first_insn (insn);
4302 416995307 : set_last_insn (insn);
4303 416995307 : }
4304 :
4305 : /* Add INSN into the doubly-linked list after insn AFTER. */
4306 :
4307 : static void
4308 68425087 : add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
4309 : {
4310 68425087 : rtx_insn *next = NEXT_INSN (after);
4311 :
4312 68425087 : gcc_assert (!optimize || !after->deleted ());
4313 :
4314 68425087 : link_insn_into_chain (insn, after, next);
4315 :
4316 68425087 : if (next == NULL)
4317 : {
4318 : struct sequence_stack *seq;
4319 :
4320 11415088 : for (seq = get_current_sequence (); seq; seq = seq->next)
4321 11415088 : if (after == seq->last)
4322 : {
4323 11415088 : seq->last = insn;
4324 11415088 : break;
4325 : }
4326 : }
4327 68425087 : }
4328 :
4329 : /* Add INSN into the doubly-linked list before insn BEFORE. */
4330 :
4331 : static void
4332 120603734 : add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
4333 : {
4334 120603734 : rtx_insn *prev = PREV_INSN (before);
4335 :
4336 120603734 : gcc_assert (!optimize || !before->deleted ());
4337 :
4338 120603734 : link_insn_into_chain (insn, prev, before);
4339 :
4340 120603734 : if (prev == NULL)
4341 : {
4342 : struct sequence_stack *seq;
4343 :
4344 186781 : for (seq = get_current_sequence (); seq; seq = seq->next)
4345 186781 : if (before == seq->first)
4346 : {
4347 186781 : seq->first = insn;
4348 186781 : break;
4349 : }
4350 :
4351 186781 : gcc_assert (seq);
4352 : }
4353 120603734 : }
4354 :
4355 : /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4356 : If BB is NULL, an attempt is made to infer the bb from before.
4357 :
4358 : This and the next function should be the only functions called
4359 : to insert an insn once delay slots have been filled since only
4360 : they know how to update a SEQUENCE. */
4361 :
4362 : void
4363 66974826 : add_insn_after (rtx_insn *insn, rtx_insn *after, basic_block bb)
4364 : {
4365 66974826 : add_insn_after_nobb (insn, after);
4366 66974826 : if (!BARRIER_P (after)
4367 66943615 : && !BARRIER_P (insn)
4368 126170078 : && (bb = BLOCK_FOR_INSN (after)))
4369 : {
4370 48481530 : set_block_for_insn (insn, bb);
4371 48481530 : if (INSN_P (insn))
4372 841062 : df_insn_rescan (insn);
4373 : /* Should not happen as first in the BB is always
4374 : either NOTE or LABEL. */
4375 48481530 : if (BB_END (bb) == after
4376 : /* Avoid clobbering of structure when creating new BB. */
4377 1027594 : && !BARRIER_P (insn)
4378 1027594 : && !NOTE_INSN_BASIC_BLOCK_P (insn))
4379 339210 : BB_END (bb) = insn;
4380 : }
4381 66974826 : }
4382 :
4383 : /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4384 : If BB is NULL, an attempt is made to infer the bb from before.
4385 :
4386 : This and the previous function should be the only functions called
4387 : to insert an insn once delay slots have been filled since only
4388 : they know how to update a SEQUENCE. */
4389 :
4390 : void
4391 97419722 : add_insn_before (rtx_insn *insn, rtx_insn *before, basic_block bb)
4392 : {
4393 97419722 : add_insn_before_nobb (insn, before);
4394 :
4395 97419722 : if (BARRIER_P (insn))
4396 : return;
4397 :
4398 97419605 : if (!bb
4399 22991039 : && !BARRIER_P (before))
4400 22991038 : bb = BLOCK_FOR_INSN (before);
4401 :
4402 22991039 : if (bb)
4403 : {
4404 93707179 : set_block_for_insn (insn, bb);
4405 93707179 : if (INSN_P (insn))
4406 13510730 : df_insn_rescan (insn);
4407 : /* Should not happen as first in the BB is always either NOTE or
4408 : LABEL. */
4409 93707179 : gcc_assert (BB_HEAD (bb) != insn
4410 : /* Avoid clobbering of structure when creating new BB. */
4411 : || BARRIER_P (insn)
4412 : || NOTE_INSN_BASIC_BLOCK_P (insn));
4413 : }
4414 : }
4415 :
4416 : /* Replace insn with an deleted instruction note. */
4417 :
4418 : void
4419 14274990 : set_insn_deleted (rtx_insn *insn)
4420 : {
4421 14274990 : if (INSN_P (insn))
4422 14274990 : df_insn_delete (insn);
4423 14274990 : PUT_CODE (insn, NOTE);
4424 14274990 : NOTE_KIND (insn) = NOTE_INSN_DELETED;
4425 14274990 : }
4426 :
4427 :
4428 : /* Unlink INSN from the insn chain.
4429 :
4430 : This function knows how to handle sequences.
4431 :
4432 : This function does not invalidate data flow information associated with
4433 : INSN (i.e. does not call df_insn_delete). That makes this function
4434 : usable for only disconnecting an insn from the chain, and re-emit it
4435 : elsewhere later.
4436 :
4437 : To later insert INSN elsewhere in the insn chain via add_insn and
4438 : similar functions, PREV_INSN and NEXT_INSN must be nullified by
4439 : the caller. Nullifying them here breaks many insn chain walks.
4440 :
4441 : To really delete an insn and related DF information, use delete_insn. */
4442 :
4443 : void
4444 140048799 : remove_insn (rtx_insn *insn)
4445 : {
4446 140048799 : rtx_insn *next = NEXT_INSN (insn);
4447 140048799 : rtx_insn *prev = PREV_INSN (insn);
4448 140048799 : basic_block bb;
4449 :
4450 140048799 : if (prev)
4451 : {
4452 140048538 : SET_NEXT_INSN (prev) = next;
4453 140048538 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4454 : {
4455 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4456 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4457 : }
4458 : }
4459 : else
4460 : {
4461 : struct sequence_stack *seq;
4462 :
4463 261 : for (seq = get_current_sequence (); seq; seq = seq->next)
4464 261 : if (insn == seq->first)
4465 : {
4466 261 : seq->first = next;
4467 261 : break;
4468 : }
4469 :
4470 261 : gcc_assert (seq);
4471 : }
4472 :
4473 140048799 : if (next)
4474 : {
4475 137905119 : SET_PREV_INSN (next) = prev;
4476 137905119 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4477 : {
4478 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4479 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4480 : }
4481 : }
4482 : else
4483 : {
4484 : struct sequence_stack *seq;
4485 :
4486 2143680 : for (seq = get_current_sequence (); seq; seq = seq->next)
4487 2143680 : if (insn == seq->last)
4488 : {
4489 2143680 : seq->last = prev;
4490 2143680 : break;
4491 : }
4492 :
4493 2143680 : gcc_assert (seq);
4494 : }
4495 :
4496 : /* Fix up basic block boundaries, if necessary. */
4497 140048799 : if (!BARRIER_P (insn)
4498 140048799 : && (bb = BLOCK_FOR_INSN (insn)))
4499 : {
4500 137012268 : if (BB_HEAD (bb) == insn)
4501 : {
4502 : /* Never ever delete the basic block note without deleting whole
4503 : basic block. */
4504 2508468 : gcc_assert (!NOTE_P (insn));
4505 2508468 : BB_HEAD (bb) = next;
4506 : }
4507 137012268 : if (BB_END (bb) == insn)
4508 23185548 : BB_END (bb) = prev;
4509 : }
4510 140048799 : }
4511 :
4512 : /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4513 :
4514 : void
4515 6360428 : add_function_usage_to (rtx call_insn, rtx call_fusage)
4516 : {
4517 6360428 : gcc_assert (call_insn && CALL_P (call_insn));
4518 :
4519 : /* Put the register usage information on the CALL. If there is already
4520 : some usage information, put ours at the end. */
4521 6360428 : if (CALL_INSN_FUNCTION_USAGE (call_insn))
4522 : {
4523 : rtx link;
4524 :
4525 566925 : for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4526 : link = XEXP (link, 1))
4527 : ;
4528 :
4529 566924 : XEXP (link, 1) = call_fusage;
4530 : }
4531 : else
4532 5793504 : CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4533 6360428 : }
4534 :
4535 : /* Delete all insns made since FROM.
4536 : FROM becomes the new last instruction. */
4537 :
4538 : void
4539 1314652 : delete_insns_since (rtx_insn *from)
4540 : {
4541 1314652 : if (from == 0)
4542 146684 : set_first_insn (0);
4543 : else
4544 1167968 : SET_NEXT_INSN (from) = 0;
4545 1314652 : set_last_insn (from);
4546 1314652 : }
4547 :
4548 : /* This function is deprecated, please use sequences instead.
4549 :
4550 : Move a consecutive bunch of insns to a different place in the chain.
4551 : The insns to be moved are those between FROM and TO.
4552 : They are moved to a new position after the insn AFTER.
4553 : AFTER must not be FROM or TO or any insn in between.
4554 :
4555 : This function does not know about SEQUENCEs and hence should not be
4556 : called after delay-slot filling has been done. */
4557 :
4558 : void
4559 1850788 : reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4560 : {
4561 1850788 : if (flag_checking)
4562 : {
4563 2465422 : for (rtx_insn *x = from; x != to; x = NEXT_INSN (x))
4564 614656 : gcc_assert (after != x);
4565 1850766 : gcc_assert (after != to);
4566 : }
4567 :
4568 : /* Splice this bunch out of where it is now. */
4569 1850788 : if (PREV_INSN (from))
4570 1850788 : SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4571 1850788 : if (NEXT_INSN (to))
4572 1842496 : SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4573 1850788 : if (get_last_insn () == to)
4574 8292 : set_last_insn (PREV_INSN (from));
4575 1850788 : if (get_insns () == from)
4576 0 : set_first_insn (NEXT_INSN (to));
4577 :
4578 : /* Make the new neighbors point to it and it to them. */
4579 1850788 : if (NEXT_INSN (after))
4580 1843878 : SET_PREV_INSN (NEXT_INSN (after)) = to;
4581 :
4582 1850788 : SET_NEXT_INSN (to) = NEXT_INSN (after);
4583 1850788 : SET_PREV_INSN (from) = after;
4584 1850788 : SET_NEXT_INSN (after) = from;
4585 1850788 : if (after == get_last_insn ())
4586 6910 : set_last_insn (to);
4587 1850788 : }
4588 :
4589 : /* Same as function above, but take care to update BB boundaries. */
4590 : void
4591 1185202 : reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4592 : {
4593 1185202 : rtx_insn *prev = PREV_INSN (from);
4594 1185202 : basic_block bb, bb2;
4595 :
4596 1185202 : reorder_insns_nobb (from, to, after);
4597 :
4598 1185202 : if (!BARRIER_P (after)
4599 1185202 : && (bb = BLOCK_FOR_INSN (after)))
4600 : {
4601 1178608 : rtx_insn *x;
4602 1178608 : df_set_bb_dirty (bb);
4603 :
4604 1178608 : if (!BARRIER_P (from)
4605 1178608 : && (bb2 = BLOCK_FOR_INSN (from)))
4606 : {
4607 1178608 : if (BB_END (bb2) == to)
4608 17064 : BB_END (bb2) = prev;
4609 1178608 : df_set_bb_dirty (bb2);
4610 : }
4611 :
4612 1178608 : if (BB_END (bb) == after)
4613 334026 : BB_END (bb) = to;
4614 :
4615 2417267 : for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4616 1238659 : if (!BARRIER_P (x))
4617 1238659 : df_insn_change_bb (x, bb);
4618 : }
4619 1185202 : }
4620 :
4621 :
4622 : /* Emit insn(s) of given code and pattern
4623 : at a specified place within the doubly-linked list.
4624 :
4625 : All of the emit_foo global entry points accept an object
4626 : X which is either an insn list or a PATTERN of a single
4627 : instruction.
4628 :
4629 : There are thus a few canonical ways to generate code and
4630 : emit it at a specific place in the instruction stream. For
4631 : example, consider the instruction named SPOT and the fact that
4632 : we would like to emit some instructions before SPOT. We might
4633 : do it like this:
4634 :
4635 : start_sequence ();
4636 : ... emit the new instructions ...
4637 : insns_head = end_sequence ();
4638 :
4639 : emit_insn_before (insns_head, SPOT);
4640 :
4641 : It used to be common to generate SEQUENCE rtl instead, but that
4642 : is a relic of the past which no longer occurs. The reason is that
4643 : SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4644 : generated would almost certainly die right after it was created. */
4645 :
4646 : static rtx_insn *
4647 11874364 : emit_pattern_before_noloc (rtx x, rtx_insn *before, rtx_insn *last,
4648 : basic_block bb,
4649 : rtx_insn *(*make_raw) (rtx))
4650 : {
4651 11874364 : rtx_insn *insn;
4652 :
4653 11874364 : gcc_assert (before);
4654 :
4655 11874364 : if (x == NULL_RTX)
4656 : return last;
4657 :
4658 11858348 : switch (GET_CODE (x))
4659 : {
4660 10345626 : case DEBUG_INSN:
4661 10345626 : case INSN:
4662 10345626 : case JUMP_INSN:
4663 10345626 : case CALL_INSN:
4664 10345626 : case CODE_LABEL:
4665 10345626 : case BARRIER:
4666 10345626 : case NOTE:
4667 10345626 : insn = as_a <rtx_insn *> (x);
4668 33355367 : while (insn)
4669 : {
4670 12664115 : rtx_insn *next = NEXT_INSN (insn);
4671 12664115 : add_insn_before (insn, before, bb);
4672 12664115 : last = insn;
4673 12664115 : insn = next;
4674 : }
4675 : break;
4676 :
4677 : #ifdef ENABLE_RTL_CHECKING
4678 : case SEQUENCE:
4679 : gcc_unreachable ();
4680 : break;
4681 : #endif
4682 :
4683 1512722 : default:
4684 1512722 : last = (*make_raw) (x);
4685 1512722 : add_insn_before (last, before, bb);
4686 1512722 : break;
4687 : }
4688 :
4689 : return last;
4690 : }
4691 :
4692 : /* Make X be output before the instruction BEFORE. */
4693 :
4694 : rtx_insn *
4695 470261 : emit_insn_before_noloc (rtx x, rtx_insn *before, basic_block bb)
4696 : {
4697 470261 : return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4698 : }
4699 :
4700 : /* Make an instruction with body X and code JUMP_INSN
4701 : and output it before the instruction BEFORE. */
4702 :
4703 : rtx_jump_insn *
4704 0 : emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
4705 : {
4706 0 : return as_a <rtx_jump_insn *> (
4707 : emit_pattern_before_noloc (x, before, NULL, NULL,
4708 0 : make_jump_insn_raw));
4709 : }
4710 :
4711 : /* Make an instruction with body X and code CALL_INSN
4712 : and output it before the instruction BEFORE. */
4713 :
4714 : rtx_insn *
4715 0 : emit_call_insn_before_noloc (rtx x, rtx_insn *before)
4716 : {
4717 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4718 0 : make_call_insn_raw);
4719 : }
4720 :
4721 : /* Make an instruction with body X and code DEBUG_INSN
4722 : and output it before the instruction BEFORE. */
4723 :
4724 : rtx_insn *
4725 0 : emit_debug_insn_before_noloc (rtx x, rtx_insn *before)
4726 : {
4727 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4728 0 : make_debug_insn_raw);
4729 : }
4730 :
4731 : /* Make an insn of code BARRIER
4732 : and output it before the insn BEFORE. */
4733 :
4734 : rtx_barrier *
4735 0 : emit_barrier_before (rtx_insn *before)
4736 : {
4737 0 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4738 :
4739 0 : INSN_UID (insn) = cur_insn_uid++;
4740 :
4741 0 : add_insn_before (insn, before, NULL);
4742 0 : return insn;
4743 : }
4744 :
4745 : /* Emit the label LABEL before the insn BEFORE. */
4746 :
4747 : rtx_code_label *
4748 6673040 : emit_label_before (rtx_code_label *label, rtx_insn *before)
4749 : {
4750 6673040 : gcc_checking_assert (INSN_UID (label) == 0);
4751 6673040 : INSN_UID (label) = cur_insn_uid++;
4752 6673040 : add_insn_before (label, before, NULL);
4753 6673040 : return label;
4754 : }
4755 :
4756 : /* Helper for emit_insn_after, handles lists of instructions
4757 : efficiently. */
4758 :
4759 : static rtx_insn *
4760 24897237 : emit_insn_after_1 (rtx_insn *first, rtx_insn *after, basic_block bb)
4761 : {
4762 24897237 : rtx_insn *last;
4763 24897237 : rtx_insn *after_after;
4764 24897237 : if (!bb && !BARRIER_P (after))
4765 20043668 : bb = BLOCK_FOR_INSN (after);
4766 :
4767 20043668 : if (bb)
4768 : {
4769 24897167 : df_set_bb_dirty (bb);
4770 68837370 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4771 19043036 : if (!BARRIER_P (last))
4772 : {
4773 19041363 : set_block_for_insn (last, bb);
4774 19041363 : df_insn_rescan (last);
4775 : }
4776 24897167 : if (!BARRIER_P (last))
4777 : {
4778 24897167 : set_block_for_insn (last, bb);
4779 24897167 : df_insn_rescan (last);
4780 : }
4781 24897167 : if (BB_END (bb) == after)
4782 9358323 : BB_END (bb) = last;
4783 : }
4784 : else
4785 70 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4786 0 : continue;
4787 :
4788 24897237 : after_after = NEXT_INSN (after);
4789 :
4790 24897237 : SET_NEXT_INSN (after) = first;
4791 24897237 : SET_PREV_INSN (first) = after;
4792 24897237 : SET_NEXT_INSN (last) = after_after;
4793 24897237 : if (after_after)
4794 24784709 : SET_PREV_INSN (after_after) = last;
4795 :
4796 24897237 : if (after == get_last_insn ())
4797 112528 : set_last_insn (last);
4798 :
4799 24897237 : return last;
4800 : }
4801 :
4802 : static rtx_insn *
4803 30067774 : emit_pattern_after_noloc (rtx x, rtx_insn *after, basic_block bb,
4804 : rtx_insn *(*make_raw)(rtx))
4805 : {
4806 30067774 : rtx_insn *last = after;
4807 :
4808 30067774 : gcc_assert (after);
4809 :
4810 30067774 : if (x == NULL_RTX)
4811 : return last;
4812 :
4813 29502932 : switch (GET_CODE (x))
4814 : {
4815 24897237 : case DEBUG_INSN:
4816 24897237 : case INSN:
4817 24897237 : case JUMP_INSN:
4818 24897237 : case CALL_INSN:
4819 24897237 : case CODE_LABEL:
4820 24897237 : case BARRIER:
4821 24897237 : case NOTE:
4822 24897237 : last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
4823 24897237 : break;
4824 :
4825 : #ifdef ENABLE_RTL_CHECKING
4826 : case SEQUENCE:
4827 : gcc_unreachable ();
4828 : break;
4829 : #endif
4830 :
4831 4605695 : default:
4832 4605695 : last = (*make_raw) (x);
4833 4605695 : add_insn_after (last, after, bb);
4834 4605695 : break;
4835 : }
4836 :
4837 : return last;
4838 : }
4839 :
4840 : /* Make X be output after the insn AFTER and set the BB of insn. If
4841 : BB is NULL, an attempt is made to infer the BB from AFTER. */
4842 :
4843 : rtx_insn *
4844 5100862 : emit_insn_after_noloc (rtx x, rtx_insn *after, basic_block bb)
4845 : {
4846 5100862 : return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4847 : }
4848 :
4849 :
4850 : /* Make an insn of code JUMP_INSN with body X
4851 : and output it after the insn AFTER. */
4852 :
4853 : rtx_jump_insn *
4854 2081 : emit_jump_insn_after_noloc (rtx x, rtx_insn *after)
4855 : {
4856 2081 : return as_a <rtx_jump_insn *> (
4857 2081 : emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
4858 : }
4859 :
4860 : /* Make an instruction with body X and code CALL_INSN
4861 : and output it after the instruction AFTER. */
4862 :
4863 : rtx_insn *
4864 0 : emit_call_insn_after_noloc (rtx x, rtx_insn *after)
4865 : {
4866 0 : return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4867 : }
4868 :
4869 : /* Make an instruction with body X and code CALL_INSN
4870 : and output it after the instruction AFTER. */
4871 :
4872 : rtx_insn *
4873 0 : emit_debug_insn_after_noloc (rtx x, rtx_insn *after)
4874 : {
4875 0 : return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4876 : }
4877 :
4878 : /* Make an insn of code BARRIER
4879 : and output it after the insn AFTER. */
4880 :
4881 : rtx_barrier *
4882 7748363 : emit_barrier_after (rtx_insn *after)
4883 : {
4884 7748363 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4885 :
4886 7748363 : INSN_UID (insn) = cur_insn_uid++;
4887 :
4888 7748363 : add_insn_after (insn, after, NULL);
4889 7748363 : return insn;
4890 : }
4891 :
4892 : /* Emit the label LABEL after the insn AFTER. */
4893 :
4894 : rtx_insn *
4895 0 : emit_label_after (rtx_insn *label, rtx_insn *after)
4896 : {
4897 0 : gcc_checking_assert (INSN_UID (label) == 0);
4898 0 : INSN_UID (label) = cur_insn_uid++;
4899 0 : add_insn_after (label, after, NULL);
4900 0 : return label;
4901 : }
4902 :
4903 : /* Notes require a bit of special handling: Some notes need to have their
4904 : BLOCK_FOR_INSN set, others should never have it set, and some should
4905 : have it set or clear depending on the context. */
4906 :
4907 : /* Return true iff a note of kind SUBTYPE should be emitted with routines
4908 : that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4909 : caller is asked to emit a note before BB_HEAD, or after BB_END. */
4910 :
4911 : static bool
4912 155799904 : note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
4913 : {
4914 0 : switch (subtype)
4915 : {
4916 : /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4917 : case NOTE_INSN_SWITCH_TEXT_SECTIONS:
4918 : return true;
4919 :
4920 : /* Notes for var tracking and EH region markers can appear between or
4921 : inside basic blocks. If the caller is emitting on the basic block
4922 : boundary, do not set BLOCK_FOR_INSN on the new note. */
4923 63523100 : case NOTE_INSN_VAR_LOCATION:
4924 63523100 : case NOTE_INSN_EH_REGION_BEG:
4925 63523100 : case NOTE_INSN_EH_REGION_END:
4926 0 : return on_bb_boundary_p;
4927 :
4928 : /* Otherwise, BLOCK_FOR_INSN must be set. */
4929 0 : default:
4930 0 : return false;
4931 : }
4932 : }
4933 :
4934 : /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4935 :
4936 : rtx_note *
4937 56046047 : emit_note_after (enum insn_note subtype, rtx_insn *after)
4938 : {
4939 56046047 : rtx_note *note = make_note_raw (subtype);
4940 56046047 : basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
4941 56014836 : bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
4942 :
4943 56046047 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4944 1450261 : add_insn_after_nobb (note, after);
4945 : else
4946 54595786 : add_insn_after (note, after, bb);
4947 56046047 : return note;
4948 : }
4949 :
4950 : /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4951 :
4952 : rtx_note *
4953 99753857 : emit_note_before (enum insn_note subtype, rtx_insn *before)
4954 : {
4955 99753857 : rtx_note *note = make_note_raw (subtype);
4956 99753857 : basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
4957 99753856 : bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
4958 :
4959 99753857 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4960 23184012 : add_insn_before_nobb (note, before);
4961 : else
4962 76569845 : add_insn_before (note, before, bb);
4963 99753857 : return note;
4964 : }
4965 :
4966 : /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4967 : MAKE_RAW indicates how to turn PATTERN into a real insn. */
4968 :
4969 : static rtx_insn *
4970 22770560 : emit_pattern_after_setloc (rtx pattern, rtx_insn *after, location_t loc,
4971 : rtx_insn *(*make_raw) (rtx))
4972 : {
4973 22770560 : rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4974 :
4975 22770560 : if (pattern == NULL_RTX || !loc)
4976 : return last;
4977 :
4978 16095682 : after = NEXT_INSN (after);
4979 4295094 : while (1)
4980 : {
4981 20390776 : if (active_insn_p (after)
4982 19146764 : && !JUMP_TABLE_DATA_P (after) /* FIXME */
4983 39537540 : && !INSN_LOCATION (after))
4984 19140651 : INSN_LOCATION (after) = loc;
4985 20390776 : if (after == last)
4986 : break;
4987 4295094 : after = NEXT_INSN (after);
4988 : }
4989 : return last;
4990 : }
4991 :
4992 : /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4993 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4994 : any DEBUG_INSNs. */
4995 :
4996 : static rtx_insn *
4997 11197051 : emit_pattern_after (rtx pattern, rtx_insn *after, bool skip_debug_insns,
4998 : rtx_insn *(*make_raw) (rtx))
4999 : {
5000 11197051 : rtx_insn *prev = after;
5001 :
5002 11197051 : if (skip_debug_insns)
5003 11786722 : while (DEBUG_INSN_P (prev))
5004 2205273 : prev = PREV_INSN (prev);
5005 :
5006 11197051 : if (INSN_P (prev))
5007 9002780 : return emit_pattern_after_setloc (pattern, after, INSN_LOCATION (prev),
5008 9002780 : make_raw);
5009 : else
5010 2194271 : return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
5011 : }
5012 :
5013 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5014 : rtx_insn *
5015 8459687 : emit_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5016 : {
5017 8459687 : return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
5018 : }
5019 :
5020 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5021 : rtx_insn *
5022 8929672 : emit_insn_after (rtx pattern, rtx_insn *after)
5023 : {
5024 8929672 : return emit_pattern_after (pattern, after, true, make_insn_raw);
5025 : }
5026 :
5027 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5028 : rtx_jump_insn *
5029 5308093 : emit_jump_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5030 : {
5031 5308093 : return as_a <rtx_jump_insn *> (
5032 5308093 : emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
5033 : }
5034 :
5035 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5036 : rtx_jump_insn *
5037 625758 : emit_jump_insn_after (rtx pattern, rtx_insn *after)
5038 : {
5039 625758 : return as_a <rtx_jump_insn *> (
5040 625758 : emit_pattern_after (pattern, after, true, make_jump_insn_raw));
5041 : }
5042 :
5043 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5044 : rtx_insn *
5045 0 : emit_call_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5046 : {
5047 0 : return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
5048 : }
5049 :
5050 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5051 : rtx_insn *
5052 26019 : emit_call_insn_after (rtx pattern, rtx_insn *after)
5053 : {
5054 26019 : return emit_pattern_after (pattern, after, true, make_call_insn_raw);
5055 : }
5056 :
5057 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5058 : rtx_insn *
5059 0 : emit_debug_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5060 : {
5061 0 : return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
5062 : }
5063 :
5064 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5065 : rtx_insn *
5066 1615602 : emit_debug_insn_after (rtx pattern, rtx_insn *after)
5067 : {
5068 1615602 : return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
5069 : }
5070 :
5071 : /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
5072 : MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
5073 : indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
5074 : CALL_INSN, etc. */
5075 :
5076 : static rtx_insn *
5077 10811782 : emit_pattern_before_setloc (rtx pattern, rtx_insn *before, location_t loc,
5078 : bool insnp, rtx_insn *(*make_raw) (rtx))
5079 : {
5080 10811782 : rtx_insn *first = PREV_INSN (before);
5081 11153339 : rtx_insn *last = emit_pattern_before_noloc (pattern, before,
5082 : insnp ? before : NULL,
5083 : NULL, make_raw);
5084 :
5085 10811782 : if (pattern == NULL_RTX || !loc)
5086 : return last;
5087 :
5088 9798474 : if (!first)
5089 88555 : first = get_insns ();
5090 : else
5091 9709919 : first = NEXT_INSN (first);
5092 1600783 : while (1)
5093 : {
5094 11399257 : if (active_insn_p (first)
5095 10828201 : && !JUMP_TABLE_DATA_P (first) /* FIXME */
5096 22227458 : && !INSN_LOCATION (first))
5097 10596492 : INSN_LOCATION (first) = loc;
5098 11399257 : if (first == last)
5099 : break;
5100 1600783 : first = NEXT_INSN (first);
5101 : }
5102 : return last;
5103 : }
5104 :
5105 : /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
5106 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
5107 : before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
5108 : INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
5109 :
5110 : static rtx_insn *
5111 11020626 : emit_pattern_before (rtx pattern, rtx_insn *before, bool skip_debug_insns,
5112 : bool insnp, rtx_insn *(*make_raw) (rtx))
5113 : {
5114 11020626 : rtx_insn *next = before;
5115 :
5116 11020626 : if (skip_debug_insns)
5117 10687920 : while (DEBUG_INSN_P (next))
5118 31 : next = PREV_INSN (next);
5119 :
5120 11020626 : if (INSN_P (next))
5121 10428305 : return emit_pattern_before_setloc (pattern, before, INSN_LOCATION (next),
5122 10428305 : insnp, make_raw);
5123 : else
5124 593559 : return emit_pattern_before_noloc (pattern, before,
5125 : insnp ? before : NULL,
5126 592321 : NULL, make_raw);
5127 : }
5128 :
5129 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5130 : rtx_insn *
5131 383477 : emit_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5132 : {
5133 383477 : return emit_pattern_before_setloc (pattern, before, loc, true,
5134 383477 : make_insn_raw);
5135 : }
5136 :
5137 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5138 : rtx_insn *
5139 10677831 : emit_insn_before (rtx pattern, rtx_insn *before)
5140 : {
5141 10677831 : return emit_pattern_before (pattern, before, true, true, make_insn_raw);
5142 : }
5143 :
5144 : /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5145 : rtx_jump_insn *
5146 0 : emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5147 : {
5148 0 : return as_a <rtx_jump_insn *> (
5149 : emit_pattern_before_setloc (pattern, before, loc, false,
5150 0 : make_jump_insn_raw));
5151 : }
5152 :
5153 : /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5154 : rtx_jump_insn *
5155 10058 : emit_jump_insn_before (rtx pattern, rtx_insn *before)
5156 : {
5157 10058 : return as_a <rtx_jump_insn *> (
5158 : emit_pattern_before (pattern, before, true, false,
5159 10058 : make_jump_insn_raw));
5160 : }
5161 :
5162 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5163 : rtx_insn *
5164 0 : emit_call_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5165 : {
5166 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5167 0 : make_call_insn_raw);
5168 : }
5169 :
5170 : /* Like emit_call_insn_before_noloc,
5171 : but set insn_location according to BEFORE. */
5172 : rtx_insn *
5173 0 : emit_call_insn_before (rtx pattern, rtx_insn *before)
5174 : {
5175 0 : return emit_pattern_before (pattern, before, true, false,
5176 0 : make_call_insn_raw);
5177 : }
5178 :
5179 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5180 : rtx_insn *
5181 0 : emit_debug_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5182 : {
5183 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5184 0 : make_debug_insn_raw);
5185 : }
5186 :
5187 : /* Like emit_debug_insn_before_noloc,
5188 : but set insn_location according to BEFORE. */
5189 : rtx_insn *
5190 332737 : emit_debug_insn_before (rtx pattern, rtx_insn *before)
5191 : {
5192 332737 : return emit_pattern_before (pattern, before, false, false,
5193 332737 : make_debug_insn_raw);
5194 : }
5195 :
5196 : /* Take X and emit it at the end of the doubly-linked
5197 : INSN list.
5198 :
5199 : Returns the last insn emitted. */
5200 :
5201 : rtx_insn *
5202 247165471 : emit_insn (rtx x)
5203 : {
5204 247165471 : rtx_insn *last = get_last_insn ();
5205 247165471 : rtx_insn *insn;
5206 :
5207 247165471 : if (x == NULL_RTX)
5208 : return last;
5209 :
5210 242472257 : switch (GET_CODE (x))
5211 : {
5212 118740718 : case DEBUG_INSN:
5213 118740718 : case INSN:
5214 118740718 : case JUMP_INSN:
5215 118740718 : case CALL_INSN:
5216 118740718 : case CODE_LABEL:
5217 118740718 : case BARRIER:
5218 118740718 : case NOTE:
5219 118740718 : insn = as_a <rtx_insn *> (x);
5220 403475417 : while (insn)
5221 : {
5222 165993981 : rtx_insn *next = NEXT_INSN (insn);
5223 165993981 : add_insn (insn);
5224 165993981 : last = insn;
5225 165993981 : insn = next;
5226 : }
5227 : break;
5228 :
5229 : #ifdef ENABLE_RTL_CHECKING
5230 : case JUMP_TABLE_DATA:
5231 : case SEQUENCE:
5232 : gcc_unreachable ();
5233 : break;
5234 : #endif
5235 :
5236 123731539 : default:
5237 123731539 : last = make_insn_raw (x);
5238 123731539 : add_insn (last);
5239 123731539 : break;
5240 : }
5241 :
5242 : return last;
5243 : }
5244 :
5245 : /* Make an insn of code DEBUG_INSN with pattern X
5246 : and add it to the end of the doubly-linked list. */
5247 :
5248 : rtx_insn *
5249 51624023 : emit_debug_insn (rtx x)
5250 : {
5251 51624023 : rtx_insn *last = get_last_insn ();
5252 51624023 : rtx_insn *insn;
5253 :
5254 51624023 : if (x == NULL_RTX)
5255 : return last;
5256 :
5257 51624023 : switch (GET_CODE (x))
5258 : {
5259 0 : case DEBUG_INSN:
5260 0 : case INSN:
5261 0 : case JUMP_INSN:
5262 0 : case CALL_INSN:
5263 0 : case CODE_LABEL:
5264 0 : case BARRIER:
5265 0 : case NOTE:
5266 0 : insn = as_a <rtx_insn *> (x);
5267 0 : while (insn)
5268 : {
5269 0 : rtx_insn *next = NEXT_INSN (insn);
5270 0 : add_insn (insn);
5271 0 : last = insn;
5272 0 : insn = next;
5273 : }
5274 : break;
5275 :
5276 : #ifdef ENABLE_RTL_CHECKING
5277 : case JUMP_TABLE_DATA:
5278 : case SEQUENCE:
5279 : gcc_unreachable ();
5280 : break;
5281 : #endif
5282 :
5283 51624023 : default:
5284 51624023 : last = make_debug_insn_raw (x);
5285 51624023 : add_insn (last);
5286 51624023 : break;
5287 : }
5288 :
5289 : return last;
5290 : }
5291 :
5292 : /* Make an insn of code JUMP_INSN with pattern X
5293 : and add it to the end of the doubly-linked list. */
5294 :
5295 : rtx_insn *
5296 29812753 : emit_jump_insn (rtx x)
5297 : {
5298 29812753 : rtx_insn *last = NULL;
5299 29812753 : rtx_insn *insn;
5300 :
5301 29812753 : switch (GET_CODE (x))
5302 : {
5303 11986958 : case DEBUG_INSN:
5304 11986958 : case INSN:
5305 11986958 : case JUMP_INSN:
5306 11986958 : case CALL_INSN:
5307 11986958 : case CODE_LABEL:
5308 11986958 : case BARRIER:
5309 11986958 : case NOTE:
5310 11986958 : insn = as_a <rtx_insn *> (x);
5311 45604233 : while (insn)
5312 : {
5313 21630317 : rtx_insn *next = NEXT_INSN (insn);
5314 21630317 : add_insn (insn);
5315 21630317 : last = insn;
5316 21630317 : insn = next;
5317 : }
5318 : break;
5319 :
5320 : #ifdef ENABLE_RTL_CHECKING
5321 : case JUMP_TABLE_DATA:
5322 : case SEQUENCE:
5323 : gcc_unreachable ();
5324 : break;
5325 : #endif
5326 :
5327 17825795 : default:
5328 17825795 : last = make_jump_insn_raw (x);
5329 17825795 : add_insn (last);
5330 17825795 : break;
5331 : }
5332 :
5333 29812753 : return last;
5334 : }
5335 :
5336 : /* Make an insn of code JUMP_INSN with pattern X,
5337 : add a REG_BR_PROB note that indicates very likely probability,
5338 : and add it to the end of the doubly-linked list. */
5339 :
5340 : rtx_insn *
5341 0 : emit_likely_jump_insn (rtx x)
5342 : {
5343 0 : rtx_insn *jump = emit_jump_insn (x);
5344 0 : add_reg_br_prob_note (jump, profile_probability::very_likely ());
5345 0 : return jump;
5346 : }
5347 :
5348 : /* Make an insn of code JUMP_INSN with pattern X,
5349 : add a REG_BR_PROB note that indicates very unlikely probability,
5350 : and add it to the end of the doubly-linked list. */
5351 :
5352 : rtx_insn *
5353 0 : emit_unlikely_jump_insn (rtx x)
5354 : {
5355 0 : rtx_insn *jump = emit_jump_insn (x);
5356 0 : add_reg_br_prob_note (jump, profile_probability::very_unlikely ());
5357 0 : return jump;
5358 : }
5359 :
5360 : /* Make an insn of code CALL_INSN with pattern X
5361 : and add it to the end of the doubly-linked list. */
5362 :
5363 : rtx_insn *
5364 6394828 : emit_call_insn (rtx x)
5365 : {
5366 6394828 : rtx_insn *insn;
5367 :
5368 6394828 : switch (GET_CODE (x))
5369 : {
5370 4410 : case DEBUG_INSN:
5371 4410 : case INSN:
5372 4410 : case JUMP_INSN:
5373 4410 : case CALL_INSN:
5374 4410 : case CODE_LABEL:
5375 4410 : case BARRIER:
5376 4410 : case NOTE:
5377 4410 : insn = emit_insn (x);
5378 4410 : break;
5379 :
5380 : #ifdef ENABLE_RTL_CHECKING
5381 : case SEQUENCE:
5382 : case JUMP_TABLE_DATA:
5383 : gcc_unreachable ();
5384 : break;
5385 : #endif
5386 :
5387 6390418 : default:
5388 6390418 : insn = make_call_insn_raw (x);
5389 6390418 : add_insn (insn);
5390 6390418 : break;
5391 : }
5392 :
5393 6394828 : return insn;
5394 : }
5395 :
5396 : /* Add the label LABEL to the end of the doubly-linked list. */
5397 :
5398 : rtx_code_label *
5399 8845782 : emit_label (rtx uncast_label)
5400 : {
5401 8845782 : rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
5402 :
5403 8845782 : gcc_checking_assert (INSN_UID (label) == 0);
5404 8845782 : INSN_UID (label) = cur_insn_uid++;
5405 8845782 : add_insn (label);
5406 8845782 : return label;
5407 : }
5408 :
5409 : /* Make an insn of code JUMP_TABLE_DATA
5410 : and add it to the end of the doubly-linked list. */
5411 :
5412 : rtx_jump_table_data *
5413 6594 : emit_jump_table_data (rtx table)
5414 : {
5415 6594 : rtx_jump_table_data *jump_table_data =
5416 6594 : as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
5417 6594 : INSN_UID (jump_table_data) = cur_insn_uid++;
5418 6594 : PATTERN (jump_table_data) = table;
5419 6594 : BLOCK_FOR_INSN (jump_table_data) = NULL;
5420 6594 : add_insn (jump_table_data);
5421 6594 : return jump_table_data;
5422 : }
5423 :
5424 : /* Make an insn of code BARRIER
5425 : and add it to the end of the doubly-linked list. */
5426 :
5427 : rtx_barrier *
5428 3593030 : emit_barrier (void)
5429 : {
5430 3593030 : rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
5431 3593030 : INSN_UID (barrier) = cur_insn_uid++;
5432 3593030 : add_insn (barrier);
5433 3593030 : return barrier;
5434 : }
5435 :
5436 : /* Emit a copy of note ORIG. */
5437 :
5438 : rtx_note *
5439 176921 : emit_note_copy (rtx_note *orig)
5440 : {
5441 176921 : enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
5442 176921 : rtx_note *note = make_note_raw (kind);
5443 176921 : NOTE_DATA (note) = NOTE_DATA (orig);
5444 176921 : add_insn (note);
5445 176921 : return note;
5446 : }
5447 :
5448 : /* Make an insn of code NOTE or type NOTE_NO
5449 : and add it to the end of the doubly-linked list. */
5450 :
5451 : rtx_note *
5452 16768913 : emit_note (enum insn_note kind)
5453 : {
5454 16768913 : rtx_note *note = make_note_raw (kind);
5455 16768913 : add_insn (note);
5456 16768913 : return note;
5457 : }
5458 :
5459 : /* Emit a clobber of lvalue X. */
5460 :
5461 : rtx_insn *
5462 557990 : emit_clobber (rtx x)
5463 : {
5464 : /* CONCATs should not appear in the insn stream. */
5465 557990 : if (GET_CODE (x) == CONCAT)
5466 : {
5467 0 : emit_clobber (XEXP (x, 0));
5468 0 : return emit_clobber (XEXP (x, 1));
5469 : }
5470 557990 : return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5471 : }
5472 :
5473 : /* Return a sequence of insns to clobber lvalue X. */
5474 :
5475 : rtx_insn *
5476 0 : gen_clobber (rtx x)
5477 : {
5478 0 : rtx_insn *seq;
5479 :
5480 0 : start_sequence ();
5481 0 : emit_clobber (x);
5482 0 : seq = end_sequence ();
5483 0 : return seq;
5484 : }
5485 :
5486 : /* Emit a use of rvalue X. */
5487 :
5488 : rtx_insn *
5489 799906 : emit_use (rtx x)
5490 : {
5491 : /* CONCATs should not appear in the insn stream. */
5492 799906 : if (GET_CODE (x) == CONCAT)
5493 : {
5494 0 : emit_use (XEXP (x, 0));
5495 0 : return emit_use (XEXP (x, 1));
5496 : }
5497 799906 : return emit_insn (gen_rtx_USE (VOIDmode, x));
5498 : }
5499 :
5500 : /* Return a sequence of insns to use rvalue X. */
5501 :
5502 : rtx_insn *
5503 0 : gen_use (rtx x)
5504 : {
5505 0 : rtx_insn *seq;
5506 :
5507 0 : start_sequence ();
5508 0 : emit_use (x);
5509 0 : seq = end_sequence ();
5510 0 : return seq;
5511 : }
5512 :
5513 : /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5514 : Return the set in INSN that such notes describe, or NULL if the notes
5515 : have no meaning for INSN. */
5516 :
5517 : rtx
5518 236369425 : set_for_reg_notes (rtx insn)
5519 : {
5520 236369425 : rtx pat, reg;
5521 :
5522 236369425 : if (!INSN_P (insn))
5523 : return NULL_RTX;
5524 :
5525 236364858 : pat = PATTERN (insn);
5526 236364858 : if (GET_CODE (pat) == PARALLEL)
5527 : {
5528 : /* We do not use single_set because that ignores SETs of unused
5529 : registers. REG_EQUAL and REG_EQUIV notes really do require the
5530 : PARALLEL to have a single SET. */
5531 18772310 : if (multiple_sets (insn))
5532 : return NULL_RTX;
5533 18060676 : pat = XVECEXP (pat, 0, 0);
5534 : }
5535 :
5536 235653224 : if (GET_CODE (pat) != SET)
5537 : return NULL_RTX;
5538 :
5539 130406489 : reg = SET_DEST (pat);
5540 :
5541 : /* Notes apply to the contents of a STRICT_LOW_PART. */
5542 130406489 : if (GET_CODE (reg) == STRICT_LOW_PART
5543 130400231 : || GET_CODE (reg) == ZERO_EXTRACT)
5544 8362 : reg = XEXP (reg, 0);
5545 :
5546 : /* Check that we have a register. */
5547 130406489 : if (!(REG_P (reg) || GET_CODE (reg) == SUBREG))
5548 : return NULL_RTX;
5549 :
5550 : return pat;
5551 : }
5552 :
5553 : /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5554 : note of this type already exists, remove it first. */
5555 :
5556 : rtx
5557 23202002 : set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5558 : {
5559 23202002 : rtx note = find_reg_note (insn, kind, NULL_RTX);
5560 :
5561 23202002 : switch (kind)
5562 : {
5563 23202002 : case REG_EQUAL:
5564 23202002 : case REG_EQUIV:
5565 : /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5566 23202002 : if (!set_for_reg_notes (insn) && GET_CODE (PATTERN (insn)) != USE)
5567 : return NULL_RTX;
5568 :
5569 : /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5570 : It serves no useful purpose and breaks eliminate_regs. */
5571 23167589 : if (GET_CODE (datum) == ASM_OPERANDS)
5572 : return NULL_RTX;
5573 :
5574 : /* Notes with side effects are dangerous. Even if the side-effect
5575 : initially mirrors one in PATTERN (INSN), later optimizations
5576 : might alter the way that the final register value is calculated
5577 : and so move or alter the side-effect in some way. The note would
5578 : then no longer be a valid substitution for SET_SRC. */
5579 23158142 : if (side_effects_p (datum))
5580 : return NULL_RTX;
5581 : break;
5582 :
5583 : default:
5584 : break;
5585 : }
5586 :
5587 23157676 : if (note)
5588 7938681 : XEXP (note, 0) = datum;
5589 : else
5590 : {
5591 15218995 : add_reg_note (insn, kind, datum);
5592 15218995 : note = REG_NOTES (insn);
5593 : }
5594 :
5595 23157676 : switch (kind)
5596 : {
5597 23157676 : case REG_EQUAL:
5598 23157676 : case REG_EQUIV:
5599 23157676 : df_notes_rescan (as_a <rtx_insn *> (insn));
5600 23157676 : break;
5601 : default:
5602 : break;
5603 : }
5604 :
5605 : return note;
5606 : }
5607 :
5608 : /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5609 : rtx
5610 1408586 : set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5611 : {
5612 1408586 : rtx set = set_for_reg_notes (insn);
5613 :
5614 1408586 : if (set && SET_DEST (set) == dst)
5615 1393564 : return set_unique_reg_note (insn, kind, datum);
5616 : return NULL_RTX;
5617 : }
5618 :
5619 : /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5620 : following barrier if the instruction needs one and if ALLOW_BARRIER_P
5621 : is true.
5622 :
5623 : If X is a label, it is simply added into the insn chain. */
5624 :
5625 : rtx_insn *
5626 18807034 : emit (rtx x, bool allow_barrier_p)
5627 : {
5628 18807034 : enum rtx_code code = classify_insn (x);
5629 :
5630 18807034 : switch (code)
5631 : {
5632 0 : case CODE_LABEL:
5633 0 : return emit_label (x);
5634 9291662 : case INSN:
5635 9291662 : return emit_insn (x);
5636 9509131 : case JUMP_INSN:
5637 9509131 : {
5638 9509131 : rtx_insn *insn = emit_jump_insn (x);
5639 9509131 : if (allow_barrier_p
5640 9509131 : && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
5641 0 : return emit_barrier ();
5642 : return insn;
5643 : }
5644 6241 : case CALL_INSN:
5645 6241 : return emit_call_insn (x);
5646 0 : case DEBUG_INSN:
5647 0 : return emit_debug_insn (x);
5648 0 : default:
5649 0 : gcc_unreachable ();
5650 : }
5651 : }
5652 :
5653 : /* Space for free sequence stack entries. */
5654 : static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5655 :
5656 : /* Begin emitting insns to a sequence. If this sequence will contain
5657 : something that might cause the compiler to pop arguments to function
5658 : calls (because those pops have previously been deferred; see
5659 : INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5660 : before calling this function. That will ensure that the deferred
5661 : pops are not accidentally emitted in the middle of this sequence. */
5662 :
5663 : void
5664 238294101 : start_sequence (void)
5665 : {
5666 238294101 : struct sequence_stack *tem;
5667 :
5668 238294101 : if (free_sequence_stack != NULL)
5669 : {
5670 237628685 : tem = free_sequence_stack;
5671 237628685 : free_sequence_stack = tem->next;
5672 : }
5673 : else
5674 665416 : tem = ggc_alloc<sequence_stack> ();
5675 :
5676 238294101 : tem->next = get_current_sequence ()->next;
5677 238294101 : tem->first = get_insns ();
5678 238294101 : tem->last = get_last_insn ();
5679 238294101 : get_current_sequence ()->next = tem;
5680 :
5681 238294101 : set_first_insn (0);
5682 238294101 : set_last_insn (0);
5683 238294101 : }
5684 :
5685 : /* Set up the insn chain starting with FIRST as the current sequence,
5686 : saving the previously current one. See the documentation for
5687 : start_sequence for more information about how to use this function. */
5688 :
5689 : void
5690 5577766 : push_to_sequence (rtx_insn *first)
5691 : {
5692 5577766 : rtx_insn *last;
5693 :
5694 5577766 : start_sequence ();
5695 :
5696 14705820 : for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5697 : ;
5698 :
5699 5577766 : set_first_insn (first);
5700 5577766 : set_last_insn (last);
5701 5577766 : }
5702 :
5703 : /* Like push_to_sequence, but take the last insn as an argument to avoid
5704 : looping through the list. */
5705 :
5706 : void
5707 78627 : push_to_sequence2 (rtx_insn *first, rtx_insn *last)
5708 : {
5709 78627 : start_sequence ();
5710 :
5711 78627 : set_first_insn (first);
5712 78627 : set_last_insn (last);
5713 78627 : }
5714 :
5715 : /* Set up the outer-level insn chain
5716 : as the current sequence, saving the previously current one. */
5717 :
5718 : void
5719 476 : push_topmost_sequence (void)
5720 : {
5721 476 : struct sequence_stack *top;
5722 :
5723 476 : start_sequence ();
5724 :
5725 476 : top = get_topmost_sequence ();
5726 476 : set_first_insn (top->first);
5727 476 : set_last_insn (top->last);
5728 476 : }
5729 :
5730 : /* After emitting to the outer-level insn chain, update the outer-level
5731 : insn chain, and restore the previous saved state. */
5732 :
5733 : void
5734 476 : pop_topmost_sequence (void)
5735 : {
5736 476 : struct sequence_stack *top;
5737 :
5738 476 : top = get_topmost_sequence ();
5739 476 : top->first = get_insns ();
5740 476 : top->last = get_last_insn ();
5741 :
5742 476 : end_sequence ();
5743 476 : }
5744 :
5745 : /* After emitting to a sequence, restore the previous saved state and return
5746 : the start of the completed sequence.
5747 :
5748 : If the compiler might have deferred popping arguments while
5749 : generating this sequence, and this sequence will not be immediately
5750 : inserted into the instruction stream, use do_pending_stack_adjust
5751 : before calling this function. That will ensure that the deferred
5752 : pops are inserted into this sequence, and not into some random
5753 : location in the instruction stream. See INHIBIT_DEFER_POP for more
5754 : information about deferred popping of arguments. */
5755 :
5756 : rtx_insn *
5757 238294099 : end_sequence (void)
5758 : {
5759 238294099 : rtx_insn *insns = get_insns ();
5760 :
5761 238294099 : struct sequence_stack *tem = get_current_sequence ()->next;
5762 :
5763 238294099 : set_first_insn (tem->first);
5764 238294099 : set_last_insn (tem->last);
5765 238294099 : get_current_sequence ()->next = tem->next;
5766 :
5767 238294099 : memset (tem, 0, sizeof (*tem));
5768 238294099 : tem->next = free_sequence_stack;
5769 238294099 : free_sequence_stack = tem;
5770 :
5771 238294099 : return insns;
5772 : }
5773 :
5774 : /* Return true if currently emitting into a sequence. */
5775 :
5776 : bool
5777 5013461 : in_sequence_p (void)
5778 : {
5779 5013461 : return get_current_sequence ()->next != 0;
5780 : }
5781 :
5782 : /* Put the various virtual registers into REGNO_REG_RTX. */
5783 :
5784 : static void
5785 1730171 : init_virtual_regs (void)
5786 : {
5787 1730171 : regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5788 1730171 : regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5789 1730171 : regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5790 1730171 : regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5791 1730171 : regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5792 1730171 : regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5793 1730171 : = virtual_preferred_stack_boundary_rtx;
5794 1730171 : }
5795 :
5796 :
5797 : /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5798 : static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5799 : static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5800 : static int copy_insn_n_scratches;
5801 :
5802 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5803 : copied an ASM_OPERANDS.
5804 : In that case, it is the original input-operand vector. */
5805 : static rtvec orig_asm_operands_vector;
5806 :
5807 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5808 : copied an ASM_OPERANDS.
5809 : In that case, it is the copied input-operand vector. */
5810 : static rtvec copy_asm_operands_vector;
5811 :
5812 : /* Likewise for the constraints vector. */
5813 : static rtvec orig_asm_constraints_vector;
5814 : static rtvec copy_asm_constraints_vector;
5815 :
5816 : /* Recursively create a new copy of an rtx for copy_insn.
5817 : This function differs from copy_rtx in that it handles SCRATCHes and
5818 : ASM_OPERANDs properly.
5819 : Normally, this function is not used directly; use copy_insn as front end.
5820 : However, you could first copy an insn pattern with copy_insn and then use
5821 : this function afterwards to properly copy any REG_NOTEs containing
5822 : SCRATCHes. */
5823 :
5824 : rtx
5825 22801927 : copy_insn_1 (rtx orig)
5826 : {
5827 22801927 : rtx copy;
5828 22801927 : int i, j;
5829 22801927 : RTX_CODE code;
5830 22801927 : const char *format_ptr;
5831 :
5832 22801927 : if (orig == NULL)
5833 : return NULL;
5834 :
5835 22800596 : code = GET_CODE (orig);
5836 :
5837 22800596 : switch (code)
5838 : {
5839 : case REG:
5840 : case DEBUG_EXPR:
5841 : CASE_CONST_ANY:
5842 : case SYMBOL_REF:
5843 : case CODE_LABEL:
5844 : case PC:
5845 : case RETURN:
5846 : case SIMPLE_RETURN:
5847 : return orig;
5848 1088929 : case CLOBBER:
5849 : /* Share clobbers of hard registers, but do not share pseudo reg
5850 : clobbers or clobbers of hard registers that originated as pseudos.
5851 : This is needed to allow safe register renaming. */
5852 1088929 : if (REG_P (XEXP (orig, 0))
5853 448257 : && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
5854 1537180 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0))))
5855 : return orig;
5856 : break;
5857 :
5858 : case SCRATCH:
5859 73313 : for (i = 0; i < copy_insn_n_scratches; i++)
5860 1605 : if (copy_insn_scratch_in[i] == orig)
5861 1549 : return copy_insn_scratch_out[i];
5862 : break;
5863 :
5864 102131 : case CONST:
5865 102131 : if (shared_const_p (orig))
5866 : return orig;
5867 : break;
5868 :
5869 : /* A MEM with a constant address is not sharable. The problem is that
5870 : the constant address may need to be reloaded. If the mem is shared,
5871 : then reloading one copy of this mem will cause all copies to appear
5872 : to have been reloaded. */
5873 :
5874 : default:
5875 : break;
5876 : }
5877 :
5878 : /* Copy the various flags, fields, and other information. We assume
5879 : that all fields need copying, and then clear the fields that should
5880 : not be copied. That is the sensible default behavior, and forces
5881 : us to explicitly document why we are *not* copying a flag. */
5882 10191818 : copy = shallow_copy_rtx (orig);
5883 :
5884 : /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5885 10191818 : if (INSN_P (orig))
5886 : {
5887 0 : RTX_FLAG (copy, jump) = 0;
5888 0 : RTX_FLAG (copy, call) = 0;
5889 0 : RTX_FLAG (copy, frame_related) = 0;
5890 : }
5891 :
5892 10191818 : format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5893 :
5894 27949639 : for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5895 17757821 : switch (*format_ptr++)
5896 : {
5897 14562711 : case 'e':
5898 14562711 : if (XEXP (orig, i) != NULL)
5899 14539165 : XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5900 : break;
5901 :
5902 633894 : case 'E':
5903 633894 : case 'V':
5904 633894 : if (XVEC (orig, i) == orig_asm_constraints_vector)
5905 12 : XVEC (copy, i) = copy_asm_constraints_vector;
5906 633882 : else if (XVEC (orig, i) == orig_asm_operands_vector)
5907 12 : XVEC (copy, i) = copy_asm_operands_vector;
5908 633870 : else if (XVEC (orig, i) != NULL)
5909 : {
5910 633870 : XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5911 1870703 : for (j = 0; j < XVECLEN (copy, i); j++)
5912 1236833 : XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5913 : }
5914 : break;
5915 :
5916 : case 't':
5917 : case 'w':
5918 : case 'i':
5919 : case 'L':
5920 : case 'p':
5921 : case 's':
5922 : case 'S':
5923 : case 'u':
5924 : case '0':
5925 : /* These are left unchanged. */
5926 : break;
5927 :
5928 0 : default:
5929 0 : gcc_unreachable ();
5930 : }
5931 :
5932 10191818 : if (code == SCRATCH)
5933 : {
5934 71708 : i = copy_insn_n_scratches++;
5935 71708 : gcc_assert (i < MAX_RECOG_OPERANDS);
5936 71708 : copy_insn_scratch_in[i] = orig;
5937 71708 : copy_insn_scratch_out[i] = copy;
5938 : }
5939 10120110 : else if (code == ASM_OPERANDS)
5940 : {
5941 215 : orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5942 215 : copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5943 215 : orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5944 215 : copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5945 : }
5946 :
5947 : return copy;
5948 : }
5949 :
5950 : /* Create a new copy of an rtx.
5951 : This function differs from copy_rtx in that it handles SCRATCHes and
5952 : ASM_OPERANDs properly.
5953 : INSN doesn't really have to be a full INSN; it could be just the
5954 : pattern. */
5955 : rtx
5956 4010113 : copy_insn (rtx insn)
5957 : {
5958 4010113 : copy_insn_n_scratches = 0;
5959 4010113 : orig_asm_operands_vector = 0;
5960 4010113 : orig_asm_constraints_vector = 0;
5961 4010113 : copy_asm_operands_vector = 0;
5962 4010113 : copy_asm_constraints_vector = 0;
5963 4010113 : return copy_insn_1 (insn);
5964 : }
5965 :
5966 : /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5967 : on that assumption that INSN itself remains in its original place. */
5968 :
5969 : rtx_insn *
5970 0 : copy_delay_slot_insn (rtx_insn *insn)
5971 : {
5972 : /* Copy INSN with its rtx_code, all its notes, location etc. */
5973 0 : insn = as_a <rtx_insn *> (copy_rtx (insn));
5974 0 : INSN_UID (insn) = cur_insn_uid++;
5975 0 : return insn;
5976 : }
5977 :
5978 : /* Initialize data structures and variables in this file
5979 : before generating rtl for each function. */
5980 :
5981 : void
5982 1730171 : init_emit (void)
5983 : {
5984 1730171 : set_first_insn (NULL);
5985 1730171 : set_last_insn (NULL);
5986 1730171 : if (param_min_nondebug_insn_uid)
5987 0 : cur_insn_uid = param_min_nondebug_insn_uid;
5988 : else
5989 1730171 : cur_insn_uid = 1;
5990 1730171 : cur_debug_insn_uid = 1;
5991 1730171 : reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5992 1730171 : first_label_num = label_num;
5993 1730171 : get_current_sequence ()->next = NULL;
5994 :
5995 : /* Init the tables that describe all the pseudo regs. */
5996 :
5997 1730171 : crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5998 :
5999 1730171 : crtl->emit.regno_pointer_align
6000 1730171 : = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
6001 :
6002 1730171 : regno_reg_rtx
6003 1730171 : = ggc_cleared_vec_alloc<rtx> (crtl->emit.regno_pointer_align_length);
6004 :
6005 : /* Put copies of all the hard registers into regno_reg_rtx. */
6006 1730171 : memcpy (regno_reg_rtx,
6007 1730171 : initial_regno_reg_rtx,
6008 : FIRST_PSEUDO_REGISTER * sizeof (rtx));
6009 :
6010 : /* Put copies of all the virtual register rtx into regno_reg_rtx. */
6011 1730171 : init_virtual_regs ();
6012 :
6013 : /* Indicate that the virtual registers and stack locations are
6014 : all pointers. */
6015 1730171 : REG_POINTER (stack_pointer_rtx) = 1;
6016 1730171 : REG_POINTER (frame_pointer_rtx) = 1;
6017 1730171 : REG_POINTER (hard_frame_pointer_rtx) = 1;
6018 1730171 : REG_POINTER (arg_pointer_rtx) = 1;
6019 :
6020 1730171 : REG_POINTER (virtual_incoming_args_rtx) = 1;
6021 1730171 : REG_POINTER (virtual_stack_vars_rtx) = 1;
6022 1730171 : REG_POINTER (virtual_stack_dynamic_rtx) = 1;
6023 1730171 : REG_POINTER (virtual_outgoing_args_rtx) = 1;
6024 1730171 : REG_POINTER (virtual_cfa_rtx) = 1;
6025 :
6026 : #ifdef STACK_BOUNDARY
6027 1730171 : REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
6028 1730171 : REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6029 1730171 : REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6030 1730171 : REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
6031 :
6032 1730171 : REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
6033 1730171 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
6034 1730171 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
6035 1730171 : REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
6036 :
6037 1730171 : REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
6038 : #endif
6039 :
6040 : #ifdef INIT_EXPANDERS
6041 : INIT_EXPANDERS;
6042 : #endif
6043 1730171 : }
6044 :
6045 : /* Return the value of element I of CONST_VECTOR X as a wide_int. */
6046 :
6047 : wide_int
6048 1068 : const_vector_int_elt (const_rtx x, unsigned int i)
6049 : {
6050 : /* First handle elements that are directly encoded. */
6051 1068 : machine_mode elt_mode = GET_MODE_INNER (GET_MODE (x));
6052 1068 : if (i < (unsigned int) XVECLEN (x, 0))
6053 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, i), elt_mode);
6054 :
6055 : /* Identify the pattern that contains element I and work out the index of
6056 : the last encoded element for that pattern. */
6057 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6058 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6059 1068 : unsigned int count = i / npatterns;
6060 1068 : unsigned int pattern = i % npatterns;
6061 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6062 :
6063 : /* If there are no steps, the final encoded value is the right one. */
6064 1068 : if (!CONST_VECTOR_STEPPED_P (x))
6065 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, final_i), elt_mode);
6066 :
6067 : /* Otherwise work out the value from the last two encoded elements. */
6068 1068 : rtx v1 = CONST_VECTOR_ENCODED_ELT (x, final_i - npatterns);
6069 1068 : rtx v2 = CONST_VECTOR_ENCODED_ELT (x, final_i);
6070 1068 : wide_int diff = wi::sub (rtx_mode_t (v2, elt_mode),
6071 1068 : rtx_mode_t (v1, elt_mode));
6072 1068 : return wi::add (rtx_mode_t (v2, elt_mode), (count - 2) * diff);
6073 1068 : }
6074 :
6075 : /* Return the value of element I of CONST_VECTOR X. */
6076 :
6077 : rtx
6078 4800698 : const_vector_elt (const_rtx x, unsigned int i)
6079 : {
6080 : /* First handle elements that are directly encoded. */
6081 4800698 : if (i < (unsigned int) XVECLEN (x, 0))
6082 4798562 : return CONST_VECTOR_ENCODED_ELT (x, i);
6083 :
6084 : /* If there are no steps, the final encoded value is the right one. */
6085 2136 : if (!CONST_VECTOR_STEPPED_P (x))
6086 : {
6087 : /* Identify the pattern that contains element I and work out the index of
6088 : the last encoded element for that pattern. */
6089 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6090 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6091 1068 : unsigned int pattern = i % npatterns;
6092 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6093 1068 : return CONST_VECTOR_ENCODED_ELT (x, final_i);
6094 : }
6095 :
6096 : /* Otherwise work out the value from the last two encoded elements. */
6097 1068 : return immed_wide_int_const (const_vector_int_elt (x, i),
6098 2136 : GET_MODE_INNER (GET_MODE (x)));
6099 : }
6100 :
6101 : /* Return true if X is a valid element for a CONST_VECTOR of the given
6102 : mode. */
6103 :
6104 : bool
6105 560689 : valid_for_const_vector_p (machine_mode, rtx x)
6106 : {
6107 560689 : return (CONST_SCALAR_INT_P (x)
6108 : || CONST_POLY_INT_P (x)
6109 170082 : || CONST_DOUBLE_AS_FLOAT_P (x)
6110 711738 : || CONST_FIXED_P (x));
6111 : }
6112 :
6113 : /* Generate a vector constant of mode MODE in which every element has
6114 : value ELT. */
6115 :
6116 : rtx
6117 42113637 : gen_const_vec_duplicate (machine_mode mode, rtx elt)
6118 : {
6119 42113637 : rtx_vector_builder builder (mode, 1, 1);
6120 42113637 : builder.quick_push (elt);
6121 42113637 : return builder.build ();
6122 42113637 : }
6123 :
6124 : /* Return a vector rtx of mode MODE in which every element has value X.
6125 : The result will be a constant if X is constant. */
6126 :
6127 : rtx
6128 255495 : gen_vec_duplicate (machine_mode mode, rtx x)
6129 : {
6130 255495 : if (valid_for_const_vector_p (mode, x))
6131 110157 : return gen_const_vec_duplicate (mode, x);
6132 145338 : return gen_rtx_VEC_DUPLICATE (mode, x);
6133 : }
6134 :
6135 : /* A subroutine of const_vec_series_p that handles the case in which:
6136 :
6137 : (GET_CODE (X) == CONST_VECTOR
6138 : && CONST_VECTOR_NPATTERNS (X) == 1
6139 : && !CONST_VECTOR_DUPLICATE_P (X))
6140 :
6141 : is known to hold. */
6142 :
6143 : bool
6144 5777 : const_vec_series_p_1 (const_rtx x, rtx *base_out, rtx *step_out)
6145 : {
6146 : /* Stepped sequences are only defined for integers, to avoid specifying
6147 : rounding behavior. */
6148 5777 : if (GET_MODE_CLASS (GET_MODE (x)) != MODE_VECTOR_INT)
6149 : return false;
6150 :
6151 : /* A non-duplicated vector with two elements can always be seen as a
6152 : series with a nonzero step. Longer vectors must have a stepped
6153 : encoding. */
6154 5777 : if (maybe_ne (CONST_VECTOR_NUNITS (x), 2)
6155 5777 : && !CONST_VECTOR_STEPPED_P (x))
6156 : return false;
6157 :
6158 : /* Calculate the step between the first and second elements. */
6159 5773 : scalar_mode inner = GET_MODE_INNER (GET_MODE (x));
6160 5773 : rtx base = CONST_VECTOR_ELT (x, 0);
6161 11546 : rtx step = simplify_binary_operation (MINUS, inner,
6162 5773 : CONST_VECTOR_ENCODED_ELT (x, 1), base);
6163 5773 : if (rtx_equal_p (step, CONST0_RTX (inner)))
6164 : return false;
6165 :
6166 : /* If we have a stepped encoding, check that the step between the
6167 : second and third elements is the same as STEP. */
6168 5773 : if (CONST_VECTOR_STEPPED_P (x))
6169 : {
6170 9246 : rtx diff = simplify_binary_operation (MINUS, inner,
6171 : CONST_VECTOR_ENCODED_ELT (x, 2),
6172 4623 : CONST_VECTOR_ENCODED_ELT (x, 1));
6173 4623 : if (!rtx_equal_p (step, diff))
6174 : return false;
6175 : }
6176 :
6177 5773 : *base_out = base;
6178 5773 : *step_out = step;
6179 5773 : return true;
6180 : }
6181 :
6182 : /* Generate a vector constant of mode MODE in which element I has
6183 : the value BASE + I * STEP. */
6184 :
6185 : rtx
6186 645 : gen_const_vec_series (machine_mode mode, rtx base, rtx step)
6187 : {
6188 645 : gcc_assert (valid_for_const_vector_p (mode, base)
6189 : && valid_for_const_vector_p (mode, step));
6190 :
6191 645 : rtx_vector_builder builder (mode, 1, 3);
6192 645 : builder.quick_push (base);
6193 1935 : for (int i = 1; i < 3; ++i)
6194 1290 : builder.quick_push (simplify_gen_binary (PLUS, GET_MODE_INNER (mode),
6195 1290 : builder[i - 1], step));
6196 645 : return builder.build ();
6197 645 : }
6198 :
6199 : /* Generate a vector of mode MODE in which element I has the value
6200 : BASE + I * STEP. The result will be a constant if BASE and STEP
6201 : are both constants. */
6202 :
6203 : rtx
6204 4985 : gen_vec_series (machine_mode mode, rtx base, rtx step)
6205 : {
6206 4985 : if (step == const0_rtx)
6207 205 : return gen_vec_duplicate (mode, base);
6208 4780 : if (valid_for_const_vector_p (mode, base)
6209 4780 : && valid_for_const_vector_p (mode, step))
6210 0 : return gen_const_vec_series (mode, base, step);
6211 4780 : return gen_rtx_VEC_SERIES (mode, base, step);
6212 : }
6213 :
6214 : /* Generate a new vector constant for mode MODE and constant value
6215 : CONSTANT. */
6216 :
6217 : static rtx
6218 40724970 : gen_const_vector (machine_mode mode, int constant)
6219 : {
6220 40724970 : machine_mode inner = GET_MODE_INNER (mode);
6221 :
6222 40724970 : gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
6223 :
6224 40724970 : rtx el = const_tiny_rtx[constant][(int) inner];
6225 40724970 : gcc_assert (el);
6226 :
6227 40724970 : return gen_const_vec_duplicate (mode, el);
6228 : }
6229 :
6230 : /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
6231 : all elements are zero, and the one vector when all elements are one. */
6232 : rtx
6233 170901 : gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
6234 : {
6235 341802 : gcc_assert (known_eq (GET_MODE_NUNITS (mode), GET_NUM_ELEM (v)));
6236 :
6237 : /* If the values are all the same, check to see if we can use one of the
6238 : standard constant vectors. */
6239 170901 : if (rtvec_all_equal_p (v))
6240 53084 : return gen_const_vec_duplicate (mode, RTVEC_ELT (v, 0));
6241 :
6242 117817 : unsigned int nunits = GET_NUM_ELEM (v);
6243 117817 : rtx_vector_builder builder (mode, nunits, 1);
6244 686925 : for (unsigned int i = 0; i < nunits; ++i)
6245 569108 : builder.quick_push (RTVEC_ELT (v, i));
6246 117817 : return builder.build (v);
6247 117817 : }
6248 :
6249 : /* Initialise global register information required by all functions. */
6250 :
6251 : void
6252 776443 : init_emit_regs (void)
6253 : {
6254 776443 : int i;
6255 776443 : machine_mode mode;
6256 776443 : mem_attrs *attrs;
6257 :
6258 : /* Reset register attributes */
6259 776443 : reg_attrs_htab->empty ();
6260 :
6261 : /* We need reg_raw_mode, so initialize the modes now. */
6262 776443 : init_reg_modes_target ();
6263 :
6264 : /* Assign register numbers to the globally defined register rtx. */
6265 791382 : stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
6266 791382 : frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
6267 791382 : hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
6268 791382 : arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
6269 2329329 : virtual_incoming_args_rtx =
6270 791382 : gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
6271 2329329 : virtual_stack_vars_rtx =
6272 791382 : gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
6273 2329329 : virtual_stack_dynamic_rtx =
6274 791382 : gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
6275 2329329 : virtual_outgoing_args_rtx =
6276 791382 : gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
6277 791382 : virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
6278 2329329 : virtual_preferred_stack_boundary_rtx =
6279 791382 : gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
6280 :
6281 : /* Initialize RTL for commonly used hard registers. These are
6282 : copied into regno_reg_rtx as we begin to compile each function. */
6283 72209199 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6284 71432756 : initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
6285 :
6286 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
6287 : return_address_pointer_rtx
6288 : = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
6289 : #endif
6290 :
6291 776443 : pic_offset_table_rtx = NULL_RTX;
6292 776443 : if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
6293 20262 : pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
6294 :
6295 : /* Process stack-limiting command-line options. */
6296 776443 : if (opt_fstack_limit_symbol_arg != NULL)
6297 0 : stack_limit_rtx
6298 0 : = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (opt_fstack_limit_symbol_arg));
6299 776443 : if (opt_fstack_limit_register_no >= 0)
6300 0 : stack_limit_rtx = gen_rtx_REG (Pmode, opt_fstack_limit_register_no);
6301 :
6302 97055375 : for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
6303 : {
6304 96278932 : mode = (machine_mode) i;
6305 96278932 : attrs = ggc_cleared_alloc<mem_attrs> ();
6306 96278932 : attrs->align = BITS_PER_UNIT;
6307 96278932 : attrs->addrspace = ADDR_SPACE_GENERIC;
6308 96278932 : if (mode != BLKmode && mode != VOIDmode)
6309 : {
6310 94726046 : attrs->size_known_p = true;
6311 189452092 : attrs->size = GET_MODE_SIZE (mode);
6312 94726046 : if (STRICT_ALIGNMENT)
6313 : attrs->align = GET_MODE_ALIGNMENT (mode);
6314 : }
6315 96278932 : mode_mem_attrs[i] = attrs;
6316 : }
6317 :
6318 776443 : split_branch_probability = profile_probability::uninitialized ();
6319 776443 : }
6320 :
6321 : /* Initialize global machine_mode variables. */
6322 :
6323 : void
6324 292068 : init_derived_machine_modes (void)
6325 : {
6326 292068 : opt_scalar_int_mode mode_iter, opt_byte_mode, opt_word_mode;
6327 2336544 : FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
6328 : {
6329 2044476 : scalar_int_mode mode = mode_iter.require ();
6330 :
6331 2336544 : if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
6332 2044476 : && !opt_byte_mode.exists ())
6333 292068 : opt_byte_mode = mode;
6334 :
6335 4088952 : if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
6336 2044476 : && !opt_word_mode.exists ())
6337 292068 : opt_word_mode = mode;
6338 : }
6339 :
6340 292068 : byte_mode = opt_byte_mode.require ();
6341 292068 : word_mode = opt_word_mode.require ();
6342 292068 : ptr_mode = as_a <scalar_int_mode>
6343 306552 : (mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0).require ());
6344 292068 : }
6345 :
6346 : /* Create some permanent unique rtl objects shared between all functions. */
6347 :
6348 : void
6349 284790 : init_emit_once (void)
6350 : {
6351 284790 : int i;
6352 284790 : machine_mode mode;
6353 284790 : scalar_float_mode double_mode;
6354 284790 : opt_scalar_mode smode_iter;
6355 :
6356 : /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
6357 : CONST_FIXED, and memory attribute hash tables. */
6358 284790 : const_int_htab = hash_table<const_int_hasher>::create_ggc (37);
6359 :
6360 : #if TARGET_SUPPORTS_WIDE_INT
6361 284790 : const_wide_int_htab = hash_table<const_wide_int_hasher>::create_ggc (37);
6362 : #endif
6363 284790 : const_double_htab = hash_table<const_double_hasher>::create_ggc (37);
6364 :
6365 284790 : if (NUM_POLY_INT_COEFFS > 1)
6366 : const_poly_int_htab = hash_table<const_poly_int_hasher>::create_ggc (37);
6367 :
6368 284790 : const_fixed_htab = hash_table<const_fixed_hasher>::create_ggc (37);
6369 :
6370 284790 : reg_attrs_htab = hash_table<reg_attr_hasher>::create_ggc (37);
6371 :
6372 : #ifdef INIT_EXPANDERS
6373 : /* This is to initialize {init|mark|free}_machine_status before the first
6374 : call to push_function_context_to. This is needed by the Chill front
6375 : end which calls push_function_context_to before the first call to
6376 : init_function_start. */
6377 : INIT_EXPANDERS;
6378 : #endif
6379 :
6380 : /* Create the unique rtx's for certain rtx codes and operand values. */
6381 :
6382 : /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
6383 : tries to use these variables. */
6384 37022700 : for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
6385 73475820 : const_int_rtx[i + MAX_SAVED_CONST_INT] =
6386 36737910 : gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
6387 :
6388 284790 : if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
6389 : && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
6390 284790 : const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
6391 : else
6392 : const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
6393 :
6394 284790 : mode = targetm.c.mode_for_floating_type (TI_DOUBLE_TYPE);
6395 284790 : double_mode = as_a<scalar_float_mode> (mode);
6396 :
6397 284790 : real_from_integer (&dconst0, double_mode, 0, SIGNED);
6398 284790 : real_from_integer (&dconst1, double_mode, 1, SIGNED);
6399 284790 : real_from_integer (&dconst2, double_mode, 2, SIGNED);
6400 :
6401 284790 : dconstm0 = dconst0;
6402 284790 : dconstm0.sign = 1;
6403 :
6404 284790 : dconstm1 = dconst1;
6405 284790 : dconstm1.sign = 1;
6406 :
6407 284790 : dconsthalf = dconst1;
6408 284790 : SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
6409 :
6410 284790 : real_inf (&dconstinf);
6411 284790 : real_inf (&dconstninf, true);
6412 :
6413 1139160 : for (i = 0; i < 3; i++)
6414 : {
6415 854370 : const REAL_VALUE_TYPE *const r =
6416 : (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
6417 :
6418 5980590 : FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
6419 5126220 : const_tiny_rtx[i][(int) mode] =
6420 5126220 : const_double_from_real_value (*r, mode);
6421 :
6422 3417480 : FOR_EACH_MODE_IN_CLASS (mode, MODE_DECIMAL_FLOAT)
6423 2563110 : const_tiny_rtx[i][(int) mode] =
6424 2563110 : const_double_from_real_value (*r, mode);
6425 :
6426 854370 : const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
6427 :
6428 6834960 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6429 5980590 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6430 :
6431 2563110 : for (mode = MIN_MODE_PARTIAL_INT;
6432 3417480 : mode <= MAX_MODE_PARTIAL_INT;
6433 2563110 : mode = (machine_mode)((int)(mode) + 1))
6434 2563110 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6435 : }
6436 :
6437 284790 : const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
6438 :
6439 2278320 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6440 1993530 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6441 :
6442 : /* For BImode, 1 and -1 are unsigned and signed interpretations
6443 : of the same value. */
6444 284790 : for (mode = MIN_MODE_BOOL;
6445 569580 : mode <= MAX_MODE_BOOL;
6446 284790 : mode = (machine_mode)((int)(mode) + 1))
6447 : {
6448 284790 : const_tiny_rtx[0][(int) mode] = const0_rtx;
6449 284790 : if (mode == BImode)
6450 : {
6451 284790 : const_tiny_rtx[1][(int) mode] = const_true_rtx;
6452 284790 : const_tiny_rtx[3][(int) mode] = const_true_rtx;
6453 : }
6454 : else
6455 : {
6456 : const_tiny_rtx[1][(int) mode] = const1_rtx;
6457 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6458 : }
6459 : }
6460 :
6461 854370 : for (mode = MIN_MODE_PARTIAL_INT;
6462 1139160 : mode <= MAX_MODE_PARTIAL_INT;
6463 854370 : mode = (machine_mode)((int)(mode) + 1))
6464 854370 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6465 :
6466 3132690 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_INT)
6467 : {
6468 2847900 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6469 2847900 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6470 : }
6471 :
6472 1993530 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT)
6473 : {
6474 1708740 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6475 1708740 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6476 : }
6477 :
6478 284790 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_BOOL)
6479 : {
6480 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6481 0 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6482 0 : if (GET_MODE_INNER (mode) == BImode)
6483 : /* As for BImode, "all 1" and "all -1" are unsigned and signed
6484 : interpretations of the same value. */
6485 0 : const_tiny_rtx[1][(int) mode] = const_tiny_rtx[3][(int) mode];
6486 : else
6487 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6488 : }
6489 :
6490 9113280 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)
6491 : {
6492 8828490 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6493 8828490 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6494 8828490 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6495 : }
6496 :
6497 7404540 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FLOAT)
6498 : {
6499 7119750 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6500 7119750 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6501 : }
6502 :
6503 1708740 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_FRACT)
6504 : {
6505 1423950 : scalar_mode smode = smode_iter.require ();
6506 1423950 : FCONST0 (smode).data.high = 0;
6507 1423950 : FCONST0 (smode).data.low = 0;
6508 1423950 : FCONST0 (smode).mode = smode;
6509 2847900 : const_tiny_rtx[0][(int) smode]
6510 1423950 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6511 : }
6512 :
6513 1708740 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UFRACT)
6514 : {
6515 1423950 : scalar_mode smode = smode_iter.require ();
6516 1423950 : FCONST0 (smode).data.high = 0;
6517 1423950 : FCONST0 (smode).data.low = 0;
6518 1423950 : FCONST0 (smode).mode = smode;
6519 2847900 : const_tiny_rtx[0][(int) smode]
6520 1423950 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6521 : }
6522 :
6523 1423950 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_ACCUM)
6524 : {
6525 1139160 : scalar_mode smode = smode_iter.require ();
6526 1139160 : FCONST0 (smode).data.high = 0;
6527 1139160 : FCONST0 (smode).data.low = 0;
6528 1139160 : FCONST0 (smode).mode = smode;
6529 2278320 : const_tiny_rtx[0][(int) smode]
6530 1139160 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6531 :
6532 : /* We store the value 1. */
6533 1139160 : FCONST1 (smode).data.high = 0;
6534 1139160 : FCONST1 (smode).data.low = 0;
6535 1139160 : FCONST1 (smode).mode = smode;
6536 2278320 : FCONST1 (smode).data
6537 1139160 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6538 : HOST_BITS_PER_DOUBLE_INT,
6539 1139160 : SIGNED_FIXED_POINT_MODE_P (smode));
6540 2278320 : const_tiny_rtx[1][(int) smode]
6541 1139160 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6542 : }
6543 :
6544 1423950 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UACCUM)
6545 : {
6546 1139160 : scalar_mode smode = smode_iter.require ();
6547 1139160 : FCONST0 (smode).data.high = 0;
6548 1139160 : FCONST0 (smode).data.low = 0;
6549 1139160 : FCONST0 (smode).mode = smode;
6550 2278320 : const_tiny_rtx[0][(int) smode]
6551 1139160 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6552 :
6553 : /* We store the value 1. */
6554 1139160 : FCONST1 (smode).data.high = 0;
6555 1139160 : FCONST1 (smode).data.low = 0;
6556 1139160 : FCONST1 (smode).mode = smode;
6557 2278320 : FCONST1 (smode).data
6558 1139160 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6559 : HOST_BITS_PER_DOUBLE_INT,
6560 1139160 : SIGNED_FIXED_POINT_MODE_P (smode));
6561 2278320 : const_tiny_rtx[1][(int) smode]
6562 1139160 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6563 : }
6564 :
6565 284790 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FRACT)
6566 : {
6567 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6568 : }
6569 :
6570 284790 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UFRACT)
6571 : {
6572 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6573 : }
6574 :
6575 284790 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_ACCUM)
6576 : {
6577 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6578 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6579 : }
6580 :
6581 284790 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UACCUM)
6582 : {
6583 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6584 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6585 : }
6586 :
6587 35029170 : for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
6588 34744380 : if (GET_MODE_CLASS ((machine_mode) i) == MODE_CC)
6589 3417480 : const_tiny_rtx[0][i] = const0_rtx;
6590 :
6591 284790 : pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
6592 284790 : ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
6593 284790 : simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
6594 284790 : invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
6595 : /*prev_insn=*/NULL,
6596 : /*next_insn=*/NULL,
6597 : /*bb=*/NULL,
6598 : /*pattern=*/NULL_RTX,
6599 : /*location=*/-1,
6600 : CODE_FOR_nothing,
6601 : /*reg_notes=*/NULL_RTX);
6602 284790 : }
6603 :
6604 : /* Produce exact duplicate of insn INSN after AFTER.
6605 : Care updating of libcall regions if present. */
6606 :
6607 : rtx_insn *
6608 3789232 : emit_copy_of_insn_after (rtx_insn *insn, rtx_insn *after)
6609 : {
6610 3789232 : rtx_insn *new_rtx;
6611 3789232 : rtx link;
6612 :
6613 3789232 : switch (GET_CODE (insn))
6614 : {
6615 1722650 : case INSN:
6616 1722650 : new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6617 1722650 : break;
6618 :
6619 502794 : case JUMP_INSN:
6620 502794 : new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6621 502794 : CROSSING_JUMP_P (new_rtx) = CROSSING_JUMP_P (insn);
6622 502794 : break;
6623 :
6624 1537769 : case DEBUG_INSN:
6625 1537769 : new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6626 1537769 : break;
6627 :
6628 26019 : case CALL_INSN:
6629 26019 : new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6630 26019 : if (CALL_INSN_FUNCTION_USAGE (insn))
6631 23546 : CALL_INSN_FUNCTION_USAGE (new_rtx)
6632 23546 : = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6633 26019 : CALL_INSN_ABI_ID (new_rtx) = CALL_INSN_ABI_ID (insn);
6634 26019 : SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6635 26019 : RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6636 26019 : RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6637 26019 : RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6638 26019 : = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6639 26019 : break;
6640 :
6641 0 : default:
6642 0 : gcc_unreachable ();
6643 : }
6644 :
6645 : /* Update LABEL_NUSES. */
6646 3789232 : if (NONDEBUG_INSN_P (insn))
6647 2251463 : mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6648 :
6649 3789232 : INSN_LOCATION (new_rtx) = INSN_LOCATION (insn);
6650 :
6651 : /* If the old insn is frame related, then so is the new one. This is
6652 : primarily needed for IA-64 unwind info which marks epilogue insns,
6653 : which may be duplicated by the basic block reordering code. */
6654 3789232 : RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6655 :
6656 : /* Locate the end of existing REG_NOTES in NEW_RTX. */
6657 3789232 : rtx *ptail = ®_NOTES (new_rtx);
6658 3789238 : while (*ptail != NULL_RTX)
6659 6 : ptail = &XEXP (*ptail, 1);
6660 :
6661 : /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6662 : will make them. REG_LABEL_TARGETs are created there too, but are
6663 : supposed to be sticky, so we copy them. */
6664 6128868 : for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6665 2339636 : if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6666 : {
6667 2339630 : *ptail = duplicate_reg_note (link);
6668 2339630 : ptail = &XEXP (*ptail, 1);
6669 : }
6670 :
6671 3789232 : INSN_CODE (new_rtx) = INSN_CODE (insn);
6672 3789232 : return new_rtx;
6673 : }
6674 :
6675 : static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6676 : rtx
6677 4594259 : gen_hard_reg_clobber (machine_mode mode, unsigned int regno)
6678 : {
6679 4594259 : if (hard_reg_clobbers[mode][regno])
6680 : return hard_reg_clobbers[mode][regno];
6681 : else
6682 190489 : return (hard_reg_clobbers[mode][regno] =
6683 380978 : gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6684 : }
6685 :
6686 : location_t prologue_location;
6687 : location_t epilogue_location;
6688 :
6689 : /* Hold current location information and last location information, so the
6690 : datastructures are built lazily only when some instructions in given
6691 : place are needed. */
6692 : static location_t curr_location;
6693 :
6694 : /* Allocate insn location datastructure. */
6695 : void
6696 1743351 : insn_locations_init (void)
6697 : {
6698 1743351 : prologue_location = epilogue_location = 0;
6699 1743351 : curr_location = UNKNOWN_LOCATION;
6700 1743351 : }
6701 :
6702 : /* At the end of emit stage, clear current location. */
6703 : void
6704 1507492 : insn_locations_finalize (void)
6705 : {
6706 1507492 : epilogue_location = curr_location;
6707 1507492 : curr_location = UNKNOWN_LOCATION;
6708 1507492 : }
6709 :
6710 : /* Set current location. */
6711 : void
6712 154932372 : set_curr_insn_location (location_t location)
6713 : {
6714 154932372 : curr_location = location;
6715 154932372 : }
6716 :
6717 : /* Get current location. */
6718 : location_t
6719 268662830 : curr_insn_location (void)
6720 : {
6721 268662830 : return curr_location;
6722 : }
6723 :
6724 : /* Set the location of the insn chain starting at INSN to LOC. */
6725 : void
6726 3646727 : set_insn_locations (rtx_insn *insn, location_t loc)
6727 : {
6728 16359737 : while (insn)
6729 : {
6730 12713010 : if (INSN_P (insn))
6731 10752729 : INSN_LOCATION (insn) = loc;
6732 12713010 : insn = NEXT_INSN (insn);
6733 : }
6734 3646727 : }
6735 :
6736 : /* Return lexical scope block insn belongs to. */
6737 : tree
6738 49787839 : insn_scope (const rtx_insn *insn)
6739 : {
6740 49787839 : return LOCATION_BLOCK (INSN_LOCATION (insn));
6741 : }
6742 :
6743 : /* Return line number of the statement that produced this insn. */
6744 : int
6745 0 : insn_line (const rtx_insn *insn)
6746 : {
6747 0 : return LOCATION_LINE (INSN_LOCATION (insn));
6748 : }
6749 :
6750 : /* Return source file of the statement that produced this insn. */
6751 : const char *
6752 0 : insn_file (const rtx_insn *insn)
6753 : {
6754 0 : return LOCATION_FILE (INSN_LOCATION (insn));
6755 : }
6756 :
6757 : /* Return expanded location of the statement that produced this insn. */
6758 : expanded_location
6759 85074675 : insn_location (const rtx_insn *insn)
6760 : {
6761 85074675 : return expand_location (INSN_LOCATION (insn));
6762 : }
6763 :
6764 : /* Return true if memory model MODEL requires a pre-operation (release-style)
6765 : barrier or a post-operation (acquire-style) barrier. While not universal,
6766 : this function matches behavior of several targets. */
6767 :
6768 : bool
6769 0 : need_atomic_barrier_p (enum memmodel model, bool pre)
6770 : {
6771 0 : switch (model & MEMMODEL_BASE_MASK)
6772 : {
6773 : case MEMMODEL_RELAXED:
6774 : case MEMMODEL_CONSUME:
6775 : return false;
6776 0 : case MEMMODEL_RELEASE:
6777 0 : return pre;
6778 0 : case MEMMODEL_ACQUIRE:
6779 0 : return !pre;
6780 0 : case MEMMODEL_ACQ_REL:
6781 0 : case MEMMODEL_SEQ_CST:
6782 0 : return true;
6783 0 : default:
6784 0 : gcc_unreachable ();
6785 : }
6786 : }
6787 :
6788 : /* Return a constant shift amount for shifting a value of mode MODE
6789 : by VALUE bits. */
6790 :
6791 : rtx
6792 212265215 : gen_int_shift_amount (machine_mode, poly_int64 value)
6793 : {
6794 : /* Use a 64-bit mode, to avoid any truncation.
6795 :
6796 : ??? Perhaps this should be automatically derived from the .md files
6797 : instead, or perhaps have a target hook. */
6798 212265215 : scalar_int_mode shift_mode = (BITS_PER_UNIT == 8
6799 : ? DImode
6800 : : int_mode_for_size (64, 0).require ());
6801 212265215 : return gen_int_mode (value, shift_mode);
6802 : }
6803 :
6804 : namespace {
6805 : /* Helper class for expanding an rtx using the encoding generated by
6806 : genemit.cc. The code needs to be kept in sync with there. */
6807 :
6808 : class rtx_expander
6809 : {
6810 : public:
6811 : rtx_expander (const uint8_t *, rtx *);
6812 :
6813 : rtx get_rtx ();
6814 : rtvec get_rtvec ();
6815 : void expand_seq ();
6816 :
6817 : protected:
6818 : uint64_t get_uint ();
6819 84959362 : machine_mode get_mode () { return machine_mode (get_uint ()); }
6820 : char *get_string ();
6821 : rtx get_shared_operand ();
6822 : rtx get_unshared_operand ();
6823 :
6824 : rtx get_rtx (expand_opcode);
6825 : rtx get_rtx (rtx_code, machine_mode);
6826 :
6827 : /* Points to the first unread byte. */
6828 : const uint8_t *m_seq;
6829 :
6830 : /* The operands passed to the gen_* function. */
6831 : rtx *m_operands;
6832 :
6833 : /* A bitmap of operands that have already been used to replace a
6834 : MATCH_OPERAND or MATCH_DUP. In order to ensure correct sharing,
6835 : further replacements need to use a copy of the operand, rather than
6836 : the original rtx. */
6837 : bbitmap<MAX_RECOG_OPERANDS> m_used;
6838 : };
6839 : }
6840 :
6841 25250098 : rtx_expander::rtx_expander (const uint8_t *seq, rtx *operands)
6842 25250098 : : m_seq (seq), m_operands (operands), m_used ()
6843 0 : {}
6844 :
6845 : /* Read and return the next encoded "BEB128" integer. */
6846 :
6847 : inline uint64_t
6848 245703906 : rtx_expander::get_uint ()
6849 : {
6850 245703906 : const uint8_t *seq = m_seq;
6851 245703906 : uint64_t res = 0;
6852 247743467 : do
6853 247743467 : res = (res << 7) | (*seq & 127);
6854 247743467 : while (*seq++ >= 128);
6855 245703906 : m_seq = seq;
6856 245703906 : return res;
6857 : }
6858 :
6859 : /* Read an operand number and return the associated operand rtx,
6860 : without copying it. */
6861 :
6862 : rtx
6863 922803 : rtx_expander::get_shared_operand ()
6864 : {
6865 922803 : return m_operands[get_uint ()];
6866 : }
6867 :
6868 : /* Read an operand number and return a correctly-shared instance of
6869 : the associated operand rtx. This can be either the original rtx
6870 : or a copy. */
6871 :
6872 : rtx
6873 44974759 : rtx_expander::get_unshared_operand ()
6874 : {
6875 44974759 : auto opno = get_uint ();
6876 44974759 : auto mask = m_used.from_index (opno);
6877 44974759 : if (m_used & mask)
6878 2915242 : return copy_rtx (m_operands[opno]);
6879 :
6880 42059517 : m_used |= mask;
6881 42059517 : return m_operands[opno];
6882 : }
6883 :
6884 : /* Read an encoded rtx. */
6885 :
6886 : rtx
6887 128353673 : rtx_expander::get_rtx ()
6888 : {
6889 128353673 : auto FIRST_CODE = (unsigned) expand_opcode::FIRST_CODE;
6890 128353673 : auto opcode = get_uint ();
6891 128353673 : if (opcode < FIRST_CODE)
6892 50491821 : return get_rtx (expand_opcode (opcode));
6893 77861852 : return get_rtx (rtx_code (opcode - FIRST_CODE), NUM_MACHINE_MODES);
6894 : }
6895 :
6896 : /* Read an encoded rtx that starts with the given opcode. */
6897 :
6898 : rtx
6899 50491821 : rtx_expander::get_rtx (expand_opcode opcode)
6900 : {
6901 50491821 : switch (opcode)
6902 : {
6903 : case expand_opcode::NO_RTX:
6904 : return NULL_RTX;
6905 :
6906 44974759 : case expand_opcode::MATCH_OPERAND:
6907 44974759 : return get_unshared_operand ();
6908 :
6909 42528 : case expand_opcode::MATCH_OPERATOR_WITH_MODE:
6910 42528 : {
6911 42528 : auto mode = get_mode ();
6912 42528 : auto op = get_shared_operand ();
6913 42528 : return get_rtx (GET_CODE (op), mode);
6914 : }
6915 :
6916 878451 : case expand_opcode::MATCH_OPERATOR:
6917 878451 : {
6918 878451 : auto op = get_shared_operand ();
6919 878451 : return get_rtx (GET_CODE (op), GET_MODE (op));
6920 : }
6921 :
6922 1824 : case expand_opcode::MATCH_PARALLEL:
6923 1824 : return get_shared_operand ();
6924 :
6925 4594259 : case expand_opcode::CLOBBER_REG:
6926 4594259 : {
6927 4594259 : auto mode = get_mode ();
6928 4594259 : auto regno = get_uint ();
6929 4594259 : return gen_hard_reg_clobber (mode, regno);
6930 : }
6931 :
6932 : case expand_opcode::FIRST_CODE:
6933 : break;
6934 : }
6935 0 : gcc_unreachable ();
6936 : }
6937 :
6938 : /* Read the rest of an rtx of code CODE. If such rtxes are not always
6939 : VOIDmode, MODE is the mode that the rtx should have, or NUM_MACHINE_MODES
6940 : if the mode is encoded at the current iterator position. */
6941 :
6942 : rtx
6943 78782831 : rtx_expander::get_rtx (rtx_code code, machine_mode mode)
6944 : {
6945 78782831 : switch (code)
6946 : {
6947 : /* Please keep the cases below in sync with gengenrtl.cc:special_rtx. */
6948 :
6949 0 : case EXPR_LIST:
6950 0 : case INSN_LIST:
6951 0 : case INSN:
6952 0 : gcc_unreachable ();
6953 :
6954 4814584 : case CONST_INT:
6955 9629168 : return GEN_INT (get_uint ());
6956 :
6957 1896855 : case REG:
6958 1896855 : if (mode == NUM_MACHINE_MODES)
6959 3793710 : mode = get_mode ();
6960 3793710 : return gen_rtx_REG (mode, get_uint ());
6961 :
6962 52987 : case SUBREG:
6963 52987 : {
6964 52987 : if (mode == NUM_MACHINE_MODES)
6965 105974 : mode = get_mode ();
6966 52987 : auto reg = get_rtx ();
6967 52987 : auto byte = get_uint ();
6968 52987 : return gen_rtx_SUBREG (mode, reg, byte);
6969 : }
6970 :
6971 2491964 : case MEM:
6972 2491964 : if (mode == NUM_MACHINE_MODES)
6973 4983928 : mode = get_mode ();
6974 2491964 : return gen_rtx_MEM (mode, get_rtx ());
6975 :
6976 9583207 : case PC:
6977 9583207 : return pc_rtx;
6978 :
6979 0 : case RETURN:
6980 0 : return ret_rtx;
6981 :
6982 1604478 : case SIMPLE_RETURN:
6983 1604478 : return simple_return_rtx;
6984 :
6985 1903 : case CONST_VECTOR:
6986 1903 : if (mode == NUM_MACHINE_MODES)
6987 3806 : mode = get_mode ();
6988 1903 : return gen_rtx_CONST_VECTOR (mode, get_rtvec ());
6989 :
6990 : /* Please keep the cases below in sync with
6991 : gengenrtl.cc:excluded_rtx. */
6992 :
6993 0 : case VAR_LOCATION:
6994 0 : gcc_unreachable ();
6995 :
6996 0 : case CONST_DOUBLE:
6997 : /* genemit.cc only accepts zero const_doubles. */
6998 0 : if (mode == NUM_MACHINE_MODES)
6999 0 : mode = get_mode ();
7000 0 : return CONST0_RTX (mode);
7001 :
7002 0 : case CONST_WIDE_INT:
7003 0 : case CONST_POLY_INT:
7004 0 : case CONST_FIXED:
7005 0 : gcc_unreachable ();
7006 :
7007 58336853 : default:
7008 58336853 : break;
7009 : }
7010 :
7011 58336853 : rtx x = rtx_alloc (code);
7012 58336853 : if (!always_void_p (code))
7013 : {
7014 34320164 : if (mode == NUM_MACHINE_MODES)
7015 66798370 : mode = get_mode ();
7016 34320164 : PUT_MODE_RAW (x, mode);
7017 : }
7018 :
7019 58336853 : const char *fmt = GET_RTX_FORMAT (code);
7020 150658832 : for (unsigned int i = 0; fmt[i]; ++i)
7021 92321979 : switch (fmt[i])
7022 : {
7023 : /* Please keep these cases in sync with
7024 : gengenrtl.cc:type_from_format. */
7025 :
7026 1842788 : case 'i':
7027 1842788 : XINT (x, i) = get_uint ();
7028 1842788 : break;
7029 :
7030 0 : case 'L':
7031 0 : case 'w':
7032 0 : case 'p':
7033 0 : case 's':
7034 0 : gcc_unreachable ();
7035 :
7036 83054247 : case 'e': case 'u':
7037 83054247 : XEXP (x, i) = get_rtx ();
7038 83054247 : break;
7039 :
7040 7424944 : case 'E':
7041 7424944 : XVEC (x, i) = get_rtvec ();
7042 7424944 : break;
7043 :
7044 0 : case 't':
7045 0 : case 'B':
7046 0 : default:
7047 0 : gcc_unreachable ();
7048 : }
7049 :
7050 : return x;
7051 : }
7052 :
7053 : /* Read an encoded rtvec. */
7054 :
7055 : rtvec
7056 7426847 : rtx_expander::get_rtvec ()
7057 : {
7058 7426847 : unsigned int len = get_uint ();
7059 7426847 : rtvec v = rtvec_alloc (len);
7060 23898241 : for (unsigned int i = 0; i < len; ++i)
7061 16471394 : RTVEC_ELT (v, i) = get_rtx ();
7062 7426847 : return v;
7063 : }
7064 :
7065 : /* Read and emit an encoded sequence of instructions. */
7066 :
7067 : void
7068 8344670 : rtx_expander::expand_seq ()
7069 : {
7070 8344670 : unsigned int len = get_uint ();
7071 17722323 : for (unsigned int i = 0; i < len; ++i)
7072 9377653 : emit (get_rtx (), i < len - 1);
7073 8344670 : }
7074 :
7075 : /* Read an rtx from the bytecode in SEQ, which was generated by genemit.cc.
7076 : Replace operand placeholders with the values given in OPERANDS. */
7077 :
7078 : rtx
7079 16905428 : expand_rtx (const uint8_t *seq, rtx *operands)
7080 : {
7081 16905428 : return rtx_expander (seq, operands).get_rtx ();
7082 : }
7083 :
7084 : /* Read and emit a sequence of instructions from the bytecode in SEQ,
7085 : which was generated by genemit.cc. Replace operand placeholders with
7086 : the values given in OPERANDS. */
7087 :
7088 : rtx_insn *
7089 8344670 : complete_seq (const uint8_t *seq, rtx *operands)
7090 : {
7091 8344670 : rtx_expander (seq, operands).expand_seq ();
7092 8344670 : return end_sequence ();
7093 : }
7094 :
7095 : /* Initialize fields of rtl_data related to stack alignment. */
7096 :
7097 : void
7098 1505826 : rtl_data::init_stack_alignment ()
7099 : {
7100 1505826 : stack_alignment_needed = STACK_BOUNDARY;
7101 1505826 : max_used_stack_slot_alignment = STACK_BOUNDARY;
7102 1505826 : stack_alignment_estimated = 0;
7103 1505826 : preferred_stack_boundary = STACK_BOUNDARY;
7104 1505826 : }
7105 :
7106 :
7107 : #include "gt-emit-rtl.h"
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