Line data Source code
1 : /* Emit RTL for the GCC expander.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 :
21 : /* Middle-to-low level generation of rtx code and insns.
22 :
23 : This file contains support functions for creating rtl expressions
24 : and manipulating them in the doubly-linked chain of insns.
25 :
26 : The patterns of the insns are created by machine-dependent
27 : routines in insn-emit.cc, which is generated automatically from
28 : the machine description. These routines make the individual rtx's
29 : of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 : which are automatically generated from rtl.def; what is machine
31 : dependent is the kind of rtx's they make and what arguments they
32 : use. */
33 :
34 : #include "config.h"
35 : #include "system.h"
36 : #include "coretypes.h"
37 : #include "memmodel.h"
38 : #include "backend.h"
39 : #include "target.h"
40 : #include "rtl.h"
41 : #include "tree.h"
42 : #include "df.h"
43 : #include "tm_p.h"
44 : #include "stringpool.h"
45 : #include "insn-config.h"
46 : #include "regs.h"
47 : #include "emit-rtl.h"
48 : #include "recog.h"
49 : #include "diagnostic-core.h"
50 : #include "alias.h"
51 : #include "fold-const.h"
52 : #include "varasm.h"
53 : #include "cfgrtl.h"
54 : #include "tree-eh.h"
55 : #include "explow.h"
56 : #include "expr.h"
57 : #include "builtins.h"
58 : #include "rtl-iter.h"
59 : #include "stor-layout.h"
60 : #include "opts.h"
61 : #include "optabs.h"
62 : #include "predict.h"
63 : #include "rtx-vector-builder.h"
64 : #include "gimple.h"
65 : #include "gimple-ssa.h"
66 : #include "bbitmap.h"
67 :
68 : struct target_rtl default_target_rtl;
69 : #if SWITCHABLE_TARGET
70 : struct target_rtl *this_target_rtl = &default_target_rtl;
71 : #endif
72 :
73 : #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
74 :
75 : /* Commonly used modes. */
76 :
77 : scalar_int_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
78 : scalar_int_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
79 : scalar_int_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
80 :
81 : /* Datastructures maintained for currently processed function in RTL form. */
82 :
83 : struct rtl_data x_rtl;
84 :
85 : /* Indexed by pseudo register number, gives the rtx for that pseudo.
86 : Allocated in parallel with regno_pointer_align.
87 : FIXME: We could put it into emit_status struct, but gengtype is not able to deal
88 : with length attribute nested in top level structures. */
89 :
90 : rtx * regno_reg_rtx;
91 :
92 : /* This is *not* reset after each function. It gives each CODE_LABEL
93 : in the entire compilation a unique label number. */
94 :
95 : static GTY(()) int label_num = 1;
96 :
97 : /* We record floating-point CONST_DOUBLEs in each floating-point mode for
98 : the values of 0, 1, and 2. For the integer entries and VOIDmode, we
99 : record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
100 : is set only for MODE_INT and MODE_VECTOR_INT modes. */
101 :
102 : rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 :
104 : rtx const_true_rtx;
105 :
106 : REAL_VALUE_TYPE dconst0;
107 : REAL_VALUE_TYPE dconst1;
108 : REAL_VALUE_TYPE dconst2;
109 : REAL_VALUE_TYPE dconstm0;
110 : REAL_VALUE_TYPE dconstm1;
111 : REAL_VALUE_TYPE dconsthalf;
112 : REAL_VALUE_TYPE dconstinf;
113 : REAL_VALUE_TYPE dconstninf;
114 :
115 : /* Record fixed-point constant 0 and 1. */
116 : FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
117 : FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
118 :
119 : /* We make one copy of (const_int C) where C is in
120 : [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
121 : to save space during the compilation and simplify comparisons of
122 : integers. */
123 :
124 : rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
125 :
126 : /* Standard pieces of rtx, to be substituted directly into things. */
127 : rtx pc_rtx;
128 : rtx ret_rtx;
129 : rtx simple_return_rtx;
130 :
131 : /* Marker used for denoting an INSN, which should never be accessed (i.e.,
132 : this pointer should normally never be dereferenced), but is required to be
133 : distinct from NULL_RTX. Currently used by peephole2 pass. */
134 : rtx_insn *invalid_insn_rtx;
135 :
136 : /* A hash table storing CONST_INTs whose absolute value is greater
137 : than MAX_SAVED_CONST_INT. */
138 :
139 : struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
140 : {
141 : typedef HOST_WIDE_INT compare_type;
142 :
143 : static hashval_t hash (rtx i);
144 : static bool equal (rtx i, HOST_WIDE_INT h);
145 : };
146 :
147 : static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
148 :
149 : struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
150 : {
151 : static hashval_t hash (rtx x);
152 : static bool equal (rtx x, rtx y);
153 : };
154 :
155 : static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
156 :
157 : struct const_poly_int_hasher : ggc_cache_ptr_hash<rtx_def>
158 : {
159 : typedef std::pair<machine_mode, poly_wide_int_ref> compare_type;
160 :
161 : static hashval_t hash (rtx x);
162 : static bool equal (rtx x, const compare_type &y);
163 : };
164 :
165 : static GTY ((cache)) hash_table<const_poly_int_hasher> *const_poly_int_htab;
166 :
167 : /* A hash table storing register attribute structures. */
168 : struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
169 : {
170 : static hashval_t hash (reg_attrs *x);
171 : static bool equal (reg_attrs *a, reg_attrs *b);
172 : };
173 :
174 : static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
175 :
176 : /* A hash table storing all CONST_DOUBLEs. */
177 : struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
178 : {
179 : static hashval_t hash (rtx x);
180 : static bool equal (rtx x, rtx y);
181 : };
182 :
183 : static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
184 :
185 : /* A hash table storing all CONST_FIXEDs. */
186 : struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
187 : {
188 : static hashval_t hash (rtx x);
189 : static bool equal (rtx x, rtx y);
190 : };
191 :
192 : static GTY ((cache)) hash_table<const_fixed_hasher> *const_fixed_htab;
193 :
194 : #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
195 : #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
196 : #define first_label_num (crtl->emit.x_first_label_num)
197 :
198 : static void set_used_decls (tree);
199 : static void mark_label_nuses (rtx);
200 : #if TARGET_SUPPORTS_WIDE_INT
201 : static rtx lookup_const_wide_int (rtx);
202 : #endif
203 : static rtx lookup_const_double (rtx);
204 : static rtx lookup_const_fixed (rtx);
205 : static rtx gen_const_vector (machine_mode, int);
206 : static void copy_rtx_if_shared_1 (rtx *orig);
207 :
208 : /* Probability of the conditional branch currently proceeded by try_split. */
209 : profile_probability split_branch_probability;
210 :
211 : /* Returns a hash code for X (which is a really a CONST_INT). */
212 :
213 : hashval_t
214 3398851380 : const_int_hasher::hash (rtx x)
215 : {
216 3398851380 : return (hashval_t) INTVAL (x);
217 : }
218 :
219 : /* Returns true if the value represented by X (which is really a
220 : CONST_INT) is the same as that given by Y (which is really a
221 : HOST_WIDE_INT *). */
222 :
223 : bool
224 4282427979 : const_int_hasher::equal (rtx x, HOST_WIDE_INT y)
225 : {
226 4282427979 : return (INTVAL (x) == y);
227 : }
228 :
229 : #if TARGET_SUPPORTS_WIDE_INT
230 : /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
231 :
232 : hashval_t
233 1415450 : const_wide_int_hasher::hash (rtx x)
234 : {
235 1415450 : int i;
236 1415450 : unsigned HOST_WIDE_INT hash = 0;
237 1415450 : const_rtx xr = x;
238 :
239 4272940 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
240 2857490 : hash += CONST_WIDE_INT_ELT (xr, i);
241 :
242 1415450 : return (hashval_t) hash;
243 : }
244 :
245 : /* Returns true if the value represented by X (which is really a
246 : CONST_WIDE_INT) is the same as that given by Y (which is really a
247 : CONST_WIDE_INT). */
248 :
249 : bool
250 1437520 : const_wide_int_hasher::equal (rtx x, rtx y)
251 : {
252 1437520 : int i;
253 1437520 : const_rtx xr = x;
254 1437520 : const_rtx yr = y;
255 1437520 : if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
256 : return false;
257 :
258 2498800 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
259 1996258 : if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
260 : return false;
261 :
262 : return true;
263 : }
264 : #endif
265 :
266 : /* Returns a hash code for CONST_POLY_INT X. */
267 :
268 : hashval_t
269 0 : const_poly_int_hasher::hash (rtx x)
270 : {
271 0 : inchash::hash h;
272 0 : h.add_int (GET_MODE (x));
273 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
274 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
275 0 : return h.end ();
276 : }
277 :
278 : /* Returns true if CONST_POLY_INT X is an rtx representation of Y. */
279 :
280 : bool
281 0 : const_poly_int_hasher::equal (rtx x, const compare_type &y)
282 : {
283 0 : if (GET_MODE (x) != y.first)
284 : return false;
285 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
286 0 : if (CONST_POLY_INT_COEFFS (x)[i] != y.second.coeffs[i])
287 : return false;
288 : return true;
289 : }
290 :
291 : /* Returns a hash code for X (which is really a CONST_DOUBLE). */
292 : hashval_t
293 18474577 : const_double_hasher::hash (rtx x)
294 : {
295 18474577 : const_rtx const value = x;
296 18474577 : hashval_t h;
297 :
298 18474577 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
299 : h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
300 : else
301 : {
302 18474577 : h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
303 : /* MODE is used in the comparison, so it should be in the hash. */
304 18474577 : h ^= GET_MODE (value);
305 : }
306 18474577 : return h;
307 : }
308 :
309 : /* Returns true if the value represented by X (really a ...)
310 : is the same as that represented by Y (really a ...) */
311 : bool
312 12756128 : const_double_hasher::equal (rtx x, rtx y)
313 : {
314 12756128 : const_rtx const a = x, b = y;
315 :
316 12756128 : if (GET_MODE (a) != GET_MODE (b))
317 : return false;
318 4611474 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
319 : return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
320 : && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
321 : else
322 4611474 : return real_identical (CONST_DOUBLE_REAL_VALUE (a),
323 4611474 : CONST_DOUBLE_REAL_VALUE (b));
324 : }
325 :
326 : /* Returns a hash code for X (which is really a CONST_FIXED). */
327 :
328 : hashval_t
329 11819077 : const_fixed_hasher::hash (rtx x)
330 : {
331 11819077 : const_rtx const value = x;
332 11819077 : hashval_t h;
333 :
334 11819077 : h = fixed_hash (CONST_FIXED_VALUE (value));
335 : /* MODE is used in the comparison, so it should be in the hash. */
336 11819077 : h ^= GET_MODE (value);
337 11819077 : return h;
338 : }
339 :
340 : /* Returns true if the value represented by X is the same as that
341 : represented by Y. */
342 :
343 : bool
344 5913088 : const_fixed_hasher::equal (rtx x, rtx y)
345 : {
346 5913088 : const_rtx const a = x, b = y;
347 :
348 5913088 : if (GET_MODE (a) != GET_MODE (b))
349 : return false;
350 562632 : return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
351 : }
352 :
353 : /* Return true if the given memory attributes are equal. */
354 :
355 : bool
356 226910160 : mem_attrs_eq_p (const class mem_attrs *p, const class mem_attrs *q)
357 : {
358 226910160 : if (p == q)
359 : return true;
360 223413199 : if (!p || !q)
361 : return false;
362 222904796 : return (p->alias == q->alias
363 141026617 : && p->offset_known_p == q->offset_known_p
364 111840939 : && (!p->offset_known_p || known_eq (p->offset, q->offset))
365 96496837 : && p->size_known_p == q->size_known_p
366 93188395 : && (!p->size_known_p || known_eq (p->size, q->size))
367 80096734 : && p->align == q->align
368 65622861 : && p->addrspace == q->addrspace
369 288245165 : && (p->expr == q->expr
370 30422990 : || (p->expr != NULL_TREE && q->expr != NULL_TREE
371 23531813 : && operand_equal_p (p->expr, q->expr, 0))));
372 : }
373 :
374 : /* Set MEM's memory attributes so that they are the same as ATTRS. */
375 :
376 : static void
377 99657232 : set_mem_attrs (rtx mem, mem_attrs *attrs)
378 : {
379 : /* If everything is the default, we can just clear the attributes. */
380 99657232 : if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
381 : {
382 3612143 : MEM_ATTRS (mem) = 0;
383 3612143 : return;
384 : }
385 :
386 96045089 : if (!MEM_ATTRS (mem)
387 96045089 : || !mem_attrs_eq_p (attrs, MEM_ATTRS (mem)))
388 : {
389 73332645 : MEM_ATTRS (mem) = ggc_alloc<mem_attrs> ();
390 73332645 : memcpy (MEM_ATTRS (mem), attrs, sizeof (mem_attrs));
391 : }
392 : }
393 :
394 : /* Returns a hash code for X (which is a really a reg_attrs *). */
395 :
396 : hashval_t
397 315448974 : reg_attr_hasher::hash (reg_attrs *x)
398 : {
399 315448974 : const reg_attrs *const p = x;
400 :
401 315448974 : inchash::hash h;
402 315448974 : h.add_ptr (p->decl);
403 315448974 : h.add_poly_hwi (p->offset);
404 315448974 : return h.end ();
405 : }
406 :
407 : /* Returns true if the value represented by X is the same as that given by
408 : Y. */
409 :
410 : bool
411 305332463 : reg_attr_hasher::equal (reg_attrs *x, reg_attrs *y)
412 : {
413 305332463 : const reg_attrs *const p = x;
414 305332463 : const reg_attrs *const q = y;
415 :
416 305332463 : return (p->decl == q->decl && known_eq (p->offset, q->offset));
417 : }
418 : /* Allocate a new reg_attrs structure and insert it into the hash table if
419 : one identical to it is not already in the table. We are doing this for
420 : MEM of mode MODE. */
421 :
422 : static reg_attrs *
423 64601094 : get_reg_attrs (tree decl, poly_int64 offset)
424 : {
425 64601094 : reg_attrs attrs;
426 :
427 : /* If everything is the default, we can just return zero. */
428 64601094 : if (decl == 0 && known_eq (offset, 0))
429 : return 0;
430 :
431 59021278 : attrs.decl = decl;
432 59021278 : attrs.offset = offset;
433 :
434 59021278 : reg_attrs **slot = reg_attrs_htab->find_slot (&attrs, INSERT);
435 59021278 : if (*slot == 0)
436 : {
437 29751469 : *slot = ggc_alloc<reg_attrs> ();
438 29751469 : memcpy (*slot, &attrs, sizeof (reg_attrs));
439 : }
440 :
441 59021278 : return *slot;
442 : }
443 :
444 :
445 : #if !HAVE_blockage
446 : /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
447 : and to block register equivalences to be seen across this insn. */
448 :
449 : rtx
450 : gen_blockage (void)
451 : {
452 : rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
453 : MEM_VOLATILE_P (x) = true;
454 : return x;
455 : }
456 : #endif
457 :
458 :
459 : /* Set the mode and register number of X to MODE and REGNO. */
460 :
461 : void
462 1685869501 : set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
463 : {
464 1685869501 : unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
465 1685869501 : ? hard_regno_nregs (regno, mode)
466 1262123355 : : 1);
467 1685869501 : PUT_MODE_RAW (x, mode);
468 1685869501 : set_regno_raw (x, regno, nregs);
469 1685869501 : }
470 :
471 : /* Initialize a fresh REG rtx with mode MODE and register REGNO. */
472 :
473 : rtx
474 347184670 : init_raw_REG (rtx x, machine_mode mode, unsigned int regno)
475 : {
476 347184670 : set_mode_and_regno (x, mode, regno);
477 347184670 : REG_ATTRS (x) = NULL;
478 347184670 : ORIGINAL_REGNO (x) = regno;
479 347184670 : return x;
480 : }
481 :
482 : /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
483 : don't attempt to share with the various global pieces of rtl (such as
484 : frame_pointer_rtx). */
485 :
486 : rtx
487 345143097 : gen_raw_REG (machine_mode mode, unsigned int regno)
488 : {
489 345143097 : rtx x = rtx_alloc (REG MEM_STAT_INFO);
490 345143097 : init_raw_REG (x, mode, regno);
491 345143097 : return x;
492 : }
493 :
494 : /* There are some RTL codes that require special attention; the generation
495 : functions do the raw handling. If you add to this list, modify
496 : special_rtx in gengenrtl.cc as well. */
497 :
498 : rtx_expr_list *
499 204853235 : gen_rtx_EXPR_LIST (machine_mode mode, rtx expr, rtx expr_list)
500 : {
501 204853235 : return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
502 204853235 : expr_list));
503 : }
504 :
505 : rtx_insn_list *
506 94295376 : gen_rtx_INSN_LIST (machine_mode mode, rtx insn, rtx insn_list)
507 : {
508 94295376 : return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
509 94295376 : insn_list));
510 : }
511 :
512 : rtx_insn *
513 820146 : gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
514 : basic_block bb, rtx pattern, location_t location, int code,
515 : rtx reg_notes)
516 : {
517 820146 : return as_a <rtx_insn *> (gen_rtx_fmt_uuBeLie (INSN, mode,
518 : prev_insn, next_insn,
519 : bb, pattern, location, code,
520 820146 : reg_notes));
521 : }
522 :
523 : rtx
524 1389409883 : gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
525 : {
526 1389409883 : if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
527 929238772 : return const_int_rtx[arg + MAX_SAVED_CONST_INT];
528 :
529 : #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
530 : if (const_true_rtx && arg == STORE_FLAG_VALUE)
531 : return const_true_rtx;
532 : #endif
533 :
534 : /* Look up the CONST_INT in the hash table. */
535 460171111 : rtx *slot = const_int_htab->find_slot_with_hash (arg, (hashval_t) arg,
536 : INSERT);
537 460171111 : if (*slot == 0)
538 35023265 : *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
539 :
540 460171111 : return *slot;
541 : }
542 :
543 : rtx
544 1305816536 : gen_int_mode (poly_int64 c, machine_mode mode)
545 : {
546 1305816536 : c = trunc_int_for_mode (c, mode);
547 1305816536 : if (c.is_constant ())
548 1305816536 : return GEN_INT (c.coeffs[0]);
549 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
550 : return immed_wide_int_const (poly_wide_int::from (c, prec, SIGNED), mode);
551 : }
552 :
553 : /* CONST_DOUBLEs might be created from pairs of integers, or from
554 : REAL_VALUE_TYPEs. Also, their length is known only at run time,
555 : so we cannot use gen_rtx_raw_CONST_DOUBLE. */
556 :
557 : /* Determine whether REAL, a CONST_DOUBLE, already exists in the
558 : hash table. If so, return its counterpart; otherwise add it
559 : to the hash table and return it. */
560 : static rtx
561 9781312 : lookup_const_double (rtx real)
562 : {
563 9781312 : rtx *slot = const_double_htab->find_slot (real, INSERT);
564 9781312 : if (*slot == 0)
565 7797052 : *slot = real;
566 :
567 9781312 : return *slot;
568 : }
569 :
570 : /* Return a CONST_DOUBLE rtx for a floating-point value specified by
571 : VALUE in mode MODE. */
572 : rtx
573 9781312 : const_double_from_real_value (REAL_VALUE_TYPE value, machine_mode mode)
574 : {
575 9781312 : rtx real = rtx_alloc (CONST_DOUBLE);
576 9781312 : PUT_MODE (real, mode);
577 :
578 9781312 : real->u.rv = value;
579 :
580 9781312 : return lookup_const_double (real);
581 : }
582 :
583 : /* Determine whether FIXED, a CONST_FIXED, already exists in the
584 : hash table. If so, return its counterpart; otherwise add it
585 : to the hash table and return it. */
586 :
587 : static rtx
588 7312110 : lookup_const_fixed (rtx fixed)
589 : {
590 7312110 : rtx *slot = const_fixed_htab->find_slot (fixed, INSERT);
591 7312110 : if (*slot == 0)
592 7312110 : *slot = fixed;
593 :
594 7312110 : return *slot;
595 : }
596 :
597 : /* Return a CONST_FIXED rtx for a fixed-point value specified by
598 : VALUE in mode MODE. */
599 :
600 : rtx
601 7312110 : const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, machine_mode mode)
602 : {
603 7312110 : rtx fixed = rtx_alloc (CONST_FIXED);
604 7312110 : PUT_MODE (fixed, mode);
605 :
606 7312110 : fixed->u.fv = value;
607 :
608 7312110 : return lookup_const_fixed (fixed);
609 : }
610 :
611 : #if TARGET_SUPPORTS_WIDE_INT == 0
612 : /* Constructs double_int from rtx CST. */
613 :
614 : double_int
615 : rtx_to_double_int (const_rtx cst)
616 : {
617 : double_int r;
618 :
619 : if (CONST_INT_P (cst))
620 : r = double_int::from_shwi (INTVAL (cst));
621 : else if (CONST_DOUBLE_AS_INT_P (cst))
622 : {
623 : r.low = CONST_DOUBLE_LOW (cst);
624 : r.high = CONST_DOUBLE_HIGH (cst);
625 : }
626 : else
627 : gcc_unreachable ();
628 :
629 : return r;
630 : }
631 : #endif
632 :
633 : #if TARGET_SUPPORTS_WIDE_INT
634 : /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
635 : If so, return its counterpart; otherwise add it to the hash table and
636 : return it. */
637 :
638 : static rtx
639 560183 : lookup_const_wide_int (rtx wint)
640 : {
641 560183 : rtx *slot = const_wide_int_htab->find_slot (wint, INSERT);
642 560183 : if (*slot == 0)
643 57641 : *slot = wint;
644 :
645 560183 : return *slot;
646 : }
647 : #endif
648 :
649 : /* Return an rtx constant for V, given that the constant has mode MODE.
650 : The returned rtx will be a CONST_INT if V fits, otherwise it will be
651 : a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
652 : (if TARGET_SUPPORTS_WIDE_INT). */
653 :
654 : static rtx
655 712686171 : immed_wide_int_const_1 (const wide_int_ref &v, machine_mode mode)
656 : {
657 712686171 : unsigned int len = v.get_len ();
658 : /* Not scalar_int_mode because we also allow pointer bound modes. */
659 712686171 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
660 :
661 : /* Allow truncation but not extension since we do not know if the
662 : number is signed or unsigned. */
663 712686171 : gcc_assert (prec <= v.get_precision ());
664 :
665 712686171 : if (len < 2 || prec <= HOST_BITS_PER_WIDE_INT)
666 712125988 : return gen_int_mode (v.elt (0), mode);
667 :
668 : #if TARGET_SUPPORTS_WIDE_INT
669 560183 : {
670 560183 : unsigned int i;
671 560183 : rtx value;
672 560183 : unsigned int blocks_needed
673 560183 : = (prec + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT;
674 :
675 560183 : if (len > blocks_needed)
676 : len = blocks_needed;
677 :
678 560183 : value = const_wide_int_alloc (len);
679 :
680 : /* It is so tempting to just put the mode in here. Must control
681 : myself ... */
682 560183 : PUT_MODE (value, VOIDmode);
683 560183 : CWI_PUT_NUM_ELEM (value, len);
684 :
685 1688214 : for (i = 0; i < len; i++)
686 1128031 : CONST_WIDE_INT_ELT (value, i) = v.elt (i);
687 :
688 560183 : return lookup_const_wide_int (value);
689 : }
690 : #else
691 : return immed_double_const (v.elt (0), v.elt (1), mode);
692 : #endif
693 : }
694 :
695 : #if TARGET_SUPPORTS_WIDE_INT == 0
696 : /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
697 : of ints: I0 is the low-order word and I1 is the high-order word.
698 : For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
699 : implied upper bits are copies of the high bit of i1. The value
700 : itself is neither signed nor unsigned. Do not use this routine for
701 : non-integer modes; convert to REAL_VALUE_TYPE and use
702 : const_double_from_real_value. */
703 :
704 : rtx
705 : immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode)
706 : {
707 : rtx value;
708 : unsigned int i;
709 :
710 : /* There are the following cases (note that there are no modes with
711 : HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
712 :
713 : 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
714 : gen_int_mode.
715 : 2) If the value of the integer fits into HOST_WIDE_INT anyway
716 : (i.e., i1 consists only from copies of the sign bit, and sign
717 : of i0 and i1 are the same), then we return a CONST_INT for i0.
718 : 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
719 : scalar_mode smode;
720 : if (is_a <scalar_mode> (mode, &smode)
721 : && GET_MODE_BITSIZE (smode) <= HOST_BITS_PER_WIDE_INT)
722 : return gen_int_mode (i0, mode);
723 :
724 : /* If this integer fits in one word, return a CONST_INT. */
725 : if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
726 : return GEN_INT (i0);
727 :
728 : /* We use VOIDmode for integers. */
729 : value = rtx_alloc (CONST_DOUBLE);
730 : PUT_MODE (value, VOIDmode);
731 :
732 : CONST_DOUBLE_LOW (value) = i0;
733 : CONST_DOUBLE_HIGH (value) = i1;
734 :
735 : for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
736 : XWINT (value, i) = 0;
737 :
738 : return lookup_const_double (value);
739 : }
740 : #endif
741 :
742 : /* Return an rtx representation of C in mode MODE. */
743 :
744 : rtx
745 712686171 : immed_wide_int_const (const poly_wide_int_ref &c, machine_mode mode)
746 : {
747 712686171 : if (c.is_constant ())
748 712686171 : return immed_wide_int_const_1 (c.coeffs[0], mode);
749 :
750 : /* Not scalar_int_mode because we also allow pointer bound modes. */
751 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
752 :
753 : /* Allow truncation but not extension since we do not know if the
754 : number is signed or unsigned. */
755 : gcc_assert (prec <= c.coeffs[0].get_precision ());
756 : poly_wide_int newc = poly_wide_int::from (c, prec, SIGNED);
757 :
758 : /* See whether we already have an rtx for this constant. */
759 : inchash::hash h;
760 : h.add_int (mode);
761 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
762 : h.add_wide_int (newc.coeffs[i]);
763 : const_poly_int_hasher::compare_type typed_value (mode, newc);
764 : rtx *slot = const_poly_int_htab->find_slot_with_hash (typed_value,
765 : h.end (), INSERT);
766 : rtx x = *slot;
767 : if (x)
768 : return x;
769 :
770 : /* Create a new rtx. There's a choice to be made here between installing
771 : the actual mode of the rtx or leaving it as VOIDmode (for consistency
772 : with CONST_INT). In practice the handling of the codes is different
773 : enough that we get no benefit from using VOIDmode, and various places
774 : assume that VOIDmode implies CONST_INT. Using the real mode seems like
775 : the right long-term direction anyway. */
776 : typedef trailing_wide_ints<NUM_POLY_INT_COEFFS> twi;
777 : size_t extra_size = twi::extra_size (prec);
778 : x = rtx_alloc_v (CONST_POLY_INT,
779 : sizeof (struct const_poly_int_def) + extra_size);
780 : PUT_MODE (x, mode);
781 : CONST_POLY_INT_COEFFS (x).set_precision (prec);
782 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
783 : CONST_POLY_INT_COEFFS (x)[i] = newc.coeffs[i];
784 :
785 : *slot = x;
786 : return x;
787 : }
788 :
789 : rtx
790 190101198 : gen_rtx_REG (machine_mode mode, unsigned int regno)
791 : {
792 : /* In case the MD file explicitly references the frame pointer, have
793 : all such references point to the same frame pointer. This is
794 : used during frame pointer elimination to distinguish the explicit
795 : references to these registers from pseudos that happened to be
796 : assigned to them.
797 :
798 : If we have eliminated the frame pointer or arg pointer, we will
799 : be using it as a normal register, for example as a spill
800 : register. In such cases, we might be accessing it in a mode that
801 : is not Pmode and therefore cannot use the pre-allocated rtx.
802 :
803 : Also don't do this when we are making new REGs in reload, since
804 : we don't want to get confused with the real pointers. */
805 :
806 204581852 : if (mode == Pmode && !reload_in_progress && !lra_in_progress)
807 : {
808 61215964 : if (regno == FRAME_POINTER_REGNUM
809 2968923 : && (!reload_completed || frame_pointer_needed))
810 2968923 : return frame_pointer_rtx;
811 :
812 58247041 : if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
813 : && regno == HARD_FRAME_POINTER_REGNUM
814 4245626 : && (!reload_completed || frame_pointer_needed))
815 3729589 : return hard_frame_pointer_rtx;
816 : #if !HARD_FRAME_POINTER_IS_ARG_POINTER
817 54517452 : if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
818 : && regno == ARG_POINTER_REGNUM)
819 2973026 : return arg_pointer_rtx;
820 : #endif
821 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
822 : if (regno == RETURN_ADDRESS_POINTER_REGNUM)
823 : return return_address_pointer_rtx;
824 : #endif
825 51544426 : if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
826 0 : && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
827 51544426 : && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
828 0 : return pic_offset_table_rtx;
829 51544426 : if (regno == STACK_POINTER_REGNUM)
830 3994361 : return stack_pointer_rtx;
831 : }
832 :
833 : #if 0
834 : /* If the per-function register table has been set up, try to re-use
835 : an existing entry in that table to avoid useless generation of RTL.
836 :
837 : This code is disabled for now until we can fix the various backends
838 : which depend on having non-shared hard registers in some cases. Long
839 : term we want to re-enable this code as it can significantly cut down
840 : on the amount of useless RTL that gets generated.
841 :
842 : We'll also need to fix some code that runs after reload that wants to
843 : set ORIGINAL_REGNO. */
844 :
845 : if (cfun
846 : && cfun->emit
847 : && regno_reg_rtx
848 : && regno < FIRST_PSEUDO_REGISTER
849 : && reg_raw_mode[regno] == mode)
850 : return regno_reg_rtx[regno];
851 : #endif
852 :
853 176435299 : return gen_raw_REG (mode, regno);
854 : }
855 :
856 : rtx
857 248604179 : gen_rtx_MEM (machine_mode mode, rtx addr)
858 : {
859 248604179 : rtx rt = gen_rtx_raw_MEM (mode, addr);
860 :
861 : /* This field is not cleared by the mere allocation of the rtx, so
862 : we clear it here. */
863 248604179 : MEM_ATTRS (rt) = 0;
864 :
865 248604179 : return rt;
866 : }
867 :
868 : /* Generate a memory referring to non-trapping constant memory. */
869 :
870 : rtx
871 2100765 : gen_const_mem (machine_mode mode, rtx addr)
872 : {
873 2100765 : rtx mem = gen_rtx_MEM (mode, addr);
874 2100765 : MEM_READONLY_P (mem) = 1;
875 2100765 : MEM_NOTRAP_P (mem) = 1;
876 2100765 : return mem;
877 : }
878 :
879 : /* Generate a MEM referring to fixed portions of the frame, e.g., register
880 : save areas. */
881 :
882 : rtx
883 1247281 : gen_frame_mem (machine_mode mode, rtx addr)
884 : {
885 1247281 : rtx mem = gen_rtx_MEM (mode, addr);
886 1247281 : MEM_NOTRAP_P (mem) = 1;
887 1247281 : set_mem_alias_set (mem, get_frame_alias_set ());
888 1247281 : return mem;
889 : }
890 :
891 : /* Generate a MEM referring to a temporary use of the stack, not part
892 : of the fixed stack frame. For example, something which is pushed
893 : by a target splitter. */
894 : rtx
895 0 : gen_tmp_stack_mem (machine_mode mode, rtx addr)
896 : {
897 0 : rtx mem = gen_rtx_MEM (mode, addr);
898 0 : MEM_NOTRAP_P (mem) = 1;
899 0 : if (!cfun->calls_alloca)
900 0 : set_mem_alias_set (mem, get_frame_alias_set ());
901 0 : return mem;
902 : }
903 :
904 : /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
905 : this construct would be valid, and false otherwise. */
906 :
907 : bool
908 48753680 : validate_subreg (machine_mode omode, machine_mode imode,
909 : const_rtx reg, poly_uint64 offset)
910 : {
911 97507360 : poly_uint64 isize = GET_MODE_SIZE (imode);
912 97507360 : poly_uint64 osize = GET_MODE_SIZE (omode);
913 :
914 : /* The sizes must be ordered, so that we know whether the subreg
915 : is partial, paradoxical or complete. */
916 48753680 : if (!ordered_p (isize, osize))
917 : return false;
918 :
919 : /* All subregs must be aligned. */
920 48830907 : if (!multiple_p (offset, osize))
921 : return false;
922 :
923 : /* The subreg offset cannot be outside the inner object. */
924 48753660 : if (maybe_ge (offset, isize))
925 : return false;
926 :
927 48753660 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode);
928 :
929 : /* ??? This should not be here. Temporarily continue to allow word_mode
930 : subregs of anything. The most common offender is (subreg:SI (reg:DF)).
931 : Generally, backends are doing something sketchy but it'll take time to
932 : fix them all. */
933 48753660 : if (omode == word_mode)
934 : ;
935 : /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
936 : is the culprit here, and not the backends. */
937 29609773 : else if (known_ge (osize, regsize) && known_ge (isize, osize))
938 : ;
939 : /* Allow component subregs of complex and vector. Though given the below
940 : extraction rules, it's not always clear what that means. */
941 23592564 : else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
942 24456819 : && GET_MODE_INNER (imode) == omode)
943 : ;
944 : /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
945 : i.e. (subreg:V4SF (reg:SF) 0) or (subreg:V4SF (reg:V2SF) 0). This
946 : surely isn't the cleanest way to represent this. It's questionable
947 : if this ought to be represented at all -- why can't this all be hidden
948 : in post-reload splitters that make arbitrarily mode changes to the
949 : registers themselves. */
950 22208109 : else if (VECTOR_MODE_P (omode)
951 24485485 : && GET_MODE_UNIT_SIZE (omode) == GET_MODE_UNIT_SIZE (imode))
952 : ;
953 : /* Subregs involving floating point modes are not allowed to
954 : change size unless it's an insert into a complex mode.
955 : Therefore (subreg:DI (reg:DF) 0) and (subreg:CS (reg:SF) 0) are fine, but
956 : (subreg:SI (reg:DF) 0) isn't. */
957 22098831 : else if ((FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
958 262825 : && !COMPLEX_MODE_P (omode))
959 : {
960 262665 : if (! (known_eq (isize, osize)
961 : /* LRA can use subreg to store a floating point value in
962 : an integer mode. Although the floating point and the
963 : integer modes need the same number of hard registers,
964 : the size of floating point mode can be less than the
965 : integer mode. LRA also uses subregs for a register
966 : should be used in different mode in on insn. */
967 75184 : || lra_in_progress))
968 : return false;
969 : }
970 :
971 : /* Paradoxical subregs must have offset zero. */
972 48680281 : if (maybe_gt (osize, isize) && !known_eq (offset, 0U))
973 : return false;
974 :
975 : /* Verify that the offset is representable. */
976 :
977 : /* Ensure that subregs of hard registers can be folded. In other words,
978 : the hardware register must be valid in the subreg's outer mode,
979 : and consequently the subreg can be replaced with a hardware register. */
980 48680281 : if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
981 : {
982 356559 : unsigned int regno = REGNO (reg);
983 :
984 356559 : if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
985 692120 : && GET_MODE_INNER (imode) == omode)
986 : ;
987 118589 : else if (!REG_CAN_CHANGE_MODE_P (regno, imode, omode))
988 : return false;
989 :
990 : /* Pass true to allow_stack_regs because targets like x86
991 : expect to be able to take subregs of the stack pointer. */
992 356466 : return simplify_subreg_regno (regno, imode, offset, omode, true) >= 0;
993 : }
994 : /* Do not allow normal SUBREG with stricter alignment than the inner MEM.
995 :
996 : PR120329: Combine can create paradoxical mem subregs even for
997 : strict-alignment targets. Allow it until combine is fixed. */
998 48323722 : else if (reg && MEM_P (reg) && STRICT_ALIGNMENT
999 : && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)
1000 : && known_le (osize, isize))
1001 : return false;
1002 :
1003 : /* If ISIZE is greater than REGSIZE, the inner value is split into blocks
1004 : of size REGSIZE. The outer size must then be ordered wrt REGSIZE,
1005 : otherwise we wouldn't know at compile time how many blocks the
1006 : outer mode occupies. */
1007 48323722 : if (maybe_gt (isize, regsize) && !ordered_p (osize, regsize))
1008 : return false;
1009 :
1010 : /* For normal pseudo registers, we want most of the same checks. Namely:
1011 :
1012 : Assume that the pseudo register will be allocated to hard registers
1013 : that can hold REGSIZE bytes each. If OSIZE is not a multiple of REGSIZE,
1014 : the remainder must correspond to the lowpart of the containing hard
1015 : register. If BYTES_BIG_ENDIAN, the lowpart is at the highest offset,
1016 : otherwise it is at the lowest offset.
1017 :
1018 : Given that we've already checked the mode and offset alignment,
1019 : we only have to check subblock subregs here.
1020 :
1021 : For paradoxical little-endian registers, this check is redundant. The
1022 : offset has already been validated to be zero.
1023 :
1024 : For paradoxical big-endian registers, this check is not valid
1025 : because the offset is zero. */
1026 48323722 : if (maybe_lt (osize, regsize)
1027 22583152 : && known_le (osize, isize)
1028 63916631 : && ! (lra_in_progress && (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))))
1029 : {
1030 : /* It is invalid for the target to pick a register size for a mode
1031 : that isn't ordered wrt to the size of that mode. */
1032 15577765 : poly_uint64 block_size = ordered_min (isize, regsize);
1033 15577765 : unsigned int start_reg;
1034 15577765 : poly_uint64 offset_within_reg;
1035 15577765 : if (!can_div_trunc_p (offset, block_size, &start_reg, &offset_within_reg)
1036 15577765 : || (BYTES_BIG_ENDIAN
1037 : ? maybe_ne (offset_within_reg, block_size - osize)
1038 15577765 : : maybe_ne (offset_within_reg, 0U)))
1039 77247 : return false;
1040 : }
1041 : return true;
1042 : }
1043 :
1044 : rtx
1045 24228450 : gen_rtx_SUBREG (machine_mode mode, rtx reg, poly_uint64 offset)
1046 : {
1047 24228450 : gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
1048 24228450 : return gen_rtx_raw_SUBREG (mode, reg, offset);
1049 : }
1050 :
1051 : /* Generate a SUBREG representing the least-significant part of REG if MODE
1052 : is smaller than mode of REG, otherwise paradoxical SUBREG. */
1053 :
1054 : rtx
1055 576010 : gen_lowpart_SUBREG (machine_mode mode, rtx reg)
1056 : {
1057 576010 : machine_mode inmode;
1058 :
1059 576010 : inmode = GET_MODE (reg);
1060 576010 : if (inmode == VOIDmode)
1061 0 : inmode = mode;
1062 576010 : return gen_rtx_SUBREG (mode, reg,
1063 576010 : subreg_lowpart_offset (mode, inmode));
1064 : }
1065 :
1066 : rtx
1067 97567647 : gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
1068 : enum var_init_status status)
1069 : {
1070 97567647 : rtx x = gen_rtx_fmt_te (VAR_LOCATION, mode, decl, loc);
1071 97567647 : PAT_VAR_LOCATION_STATUS (x) = status;
1072 97567647 : return x;
1073 : }
1074 :
1075 :
1076 : /* Create an rtvec and stores within it the RTXen passed in the arguments. */
1077 :
1078 : rtvec
1079 24017882 : gen_rtvec (int n, ...)
1080 : {
1081 24017882 : int i;
1082 24017882 : rtvec rt_val;
1083 24017882 : va_list p;
1084 :
1085 24017882 : va_start (p, n);
1086 :
1087 : /* Don't allocate an empty rtvec... */
1088 24017882 : if (n == 0)
1089 : {
1090 0 : va_end (p);
1091 0 : return NULL_RTVEC;
1092 : }
1093 :
1094 24017882 : rt_val = rtvec_alloc (n);
1095 :
1096 91671934 : for (i = 0; i < n; i++)
1097 43636170 : rt_val->elem[i] = va_arg (p, rtx);
1098 :
1099 24017882 : va_end (p);
1100 24017882 : return rt_val;
1101 : }
1102 :
1103 : rtvec
1104 459393 : gen_rtvec_v (int n, rtx *argp)
1105 : {
1106 459393 : int i;
1107 459393 : rtvec rt_val;
1108 :
1109 : /* Don't allocate an empty rtvec... */
1110 459393 : if (n == 0)
1111 : return NULL_RTVEC;
1112 :
1113 459393 : rt_val = rtvec_alloc (n);
1114 :
1115 2067519 : for (i = 0; i < n; i++)
1116 1148733 : rt_val->elem[i] = *argp++;
1117 :
1118 : return rt_val;
1119 : }
1120 :
1121 : rtvec
1122 0 : gen_rtvec_v (int n, rtx_insn **argp)
1123 : {
1124 0 : int i;
1125 0 : rtvec rt_val;
1126 :
1127 : /* Don't allocate an empty rtvec... */
1128 0 : if (n == 0)
1129 : return NULL_RTVEC;
1130 :
1131 0 : rt_val = rtvec_alloc (n);
1132 :
1133 0 : for (i = 0; i < n; i++)
1134 0 : rt_val->elem[i] = *argp++;
1135 :
1136 : return rt_val;
1137 : }
1138 :
1139 :
1140 : /* Return the number of bytes between the start of an OUTER_MODE
1141 : in-memory value and the start of an INNER_MODE in-memory value,
1142 : given that the former is a lowpart of the latter. It may be a
1143 : paradoxical lowpart, in which case the offset will be negative
1144 : on big-endian targets. */
1145 :
1146 : poly_int64
1147 73000792 : byte_lowpart_offset (machine_mode outer_mode,
1148 : machine_mode inner_mode)
1149 : {
1150 73000792 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1151 3885972 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1152 : else
1153 69114820 : return subreg_lowpart_offset (outer_mode, inner_mode);
1154 : }
1155 :
1156 : /* Return the offset of (subreg:OUTER_MODE (mem:INNER_MODE X) OFFSET)
1157 : from address X. For paradoxical big-endian subregs this is a
1158 : negative value, otherwise it's the same as OFFSET. */
1159 :
1160 : poly_int64
1161 11863546 : subreg_memory_offset (machine_mode outer_mode, machine_mode inner_mode,
1162 : poly_uint64 offset)
1163 : {
1164 11863546 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1165 : {
1166 3351240 : gcc_assert (known_eq (offset, 0U));
1167 3351240 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1168 : }
1169 8512306 : return offset;
1170 : }
1171 :
1172 : /* As above, but return the offset that existing subreg X would have
1173 : if SUBREG_REG (X) were stored in memory. The only significant thing
1174 : about the current SUBREG_REG is its mode. */
1175 :
1176 : poly_int64
1177 579854 : subreg_memory_offset (const_rtx x)
1178 : {
1179 1159708 : return subreg_memory_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
1180 579854 : SUBREG_BYTE (x));
1181 : }
1182 :
1183 : /* Generate a REG rtx for a new pseudo register of mode MODE.
1184 : This pseudo is assigned the next sequential register number. */
1185 :
1186 : rtx
1187 67012173 : gen_reg_rtx (machine_mode mode)
1188 : {
1189 67012173 : rtx val;
1190 67012173 : unsigned int align = GET_MODE_ALIGNMENT (mode);
1191 :
1192 67012173 : gcc_assert (can_create_pseudo_p ());
1193 :
1194 : /* If a virtual register with bigger mode alignment is generated,
1195 : increase stack alignment estimation because it might be spilled
1196 : to stack later. */
1197 67012173 : if (SUPPORTS_STACK_ALIGNMENT
1198 67012173 : && crtl->stack_alignment_estimated < align
1199 350459 : && !crtl->stack_realign_processed)
1200 : {
1201 349383 : unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
1202 349383 : if (crtl->stack_alignment_estimated < min_align)
1203 349383 : crtl->stack_alignment_estimated = min_align;
1204 : }
1205 :
1206 67012173 : if (generating_concat_p
1207 50494093 : && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
1208 50494093 : || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
1209 : {
1210 : /* For complex modes, don't make a single pseudo.
1211 : Instead, make a CONCAT of two pseudos.
1212 : This allows noncontiguous allocation of the real and imaginary parts,
1213 : which makes much better code. Besides, allocating DCmode
1214 : pseudos overstrains reload on some machines like the 386. */
1215 205749 : rtx realpart, imagpart;
1216 205749 : machine_mode partmode = GET_MODE_INNER (mode);
1217 :
1218 205749 : realpart = gen_reg_rtx (partmode);
1219 205749 : imagpart = gen_reg_rtx (partmode);
1220 205749 : return gen_rtx_CONCAT (mode, realpart, imagpart);
1221 : }
1222 :
1223 : /* Do not call gen_reg_rtx with uninitialized crtl. */
1224 66806424 : gcc_assert (crtl->emit.regno_pointer_align_length);
1225 :
1226 66806424 : crtl->emit.ensure_regno_capacity ();
1227 66806424 : gcc_assert (reg_rtx_no < crtl->emit.regno_pointer_align_length);
1228 :
1229 66806424 : val = gen_raw_REG (mode, reg_rtx_no);
1230 66806424 : regno_reg_rtx[reg_rtx_no++] = val;
1231 66806424 : return val;
1232 : }
1233 :
1234 : /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1235 : enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1236 :
1237 : void
1238 66807650 : emit_status::ensure_regno_capacity ()
1239 : {
1240 66807650 : int old_size = regno_pointer_align_length;
1241 :
1242 66807650 : if (reg_rtx_no < old_size)
1243 : return;
1244 :
1245 175465 : int new_size = old_size * 2;
1246 175465 : while (reg_rtx_no >= new_size)
1247 0 : new_size *= 2;
1248 :
1249 175465 : char *tmp = XRESIZEVEC (char, regno_pointer_align, new_size);
1250 175465 : memset (tmp + old_size, 0, new_size - old_size);
1251 175465 : regno_pointer_align = (unsigned char *) tmp;
1252 :
1253 175465 : rtx *new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, new_size);
1254 175465 : memset (new1 + old_size, 0, (new_size - old_size) * sizeof (rtx));
1255 175465 : regno_reg_rtx = new1;
1256 :
1257 175465 : crtl->emit.regno_pointer_align_length = new_size;
1258 : }
1259 :
1260 : /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1261 :
1262 : bool
1263 10511 : reg_is_parm_p (rtx reg)
1264 : {
1265 10511 : tree decl;
1266 :
1267 10511 : gcc_assert (REG_P (reg));
1268 10511 : decl = REG_EXPR (reg);
1269 8065 : return (decl && TREE_CODE (decl) == PARM_DECL);
1270 : }
1271 :
1272 : /* Update NEW with the same attributes as REG, but with OFFSET added
1273 : to the REG_OFFSET. */
1274 :
1275 : static void
1276 18076265 : update_reg_offset (rtx new_rtx, rtx reg, poly_int64 offset)
1277 : {
1278 18076265 : REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
1279 18076265 : REG_OFFSET (reg) + offset);
1280 18076265 : }
1281 :
1282 : /* Generate a register with same attributes as REG, but with OFFSET
1283 : added to the REG_OFFSET. */
1284 :
1285 : rtx
1286 10618775 : gen_rtx_REG_offset (rtx reg, machine_mode mode, unsigned int regno,
1287 : poly_int64 offset)
1288 : {
1289 : /* Use gen_raw_REG rather than gen_rtx_REG, because otherwise we'd
1290 : overwrite REG_ATTRS (and in the callers often ORIGINAL_REGNO too)
1291 : of the shared REG rtxes like stack_pointer_rtx etc. This should
1292 : happen only for SUBREGs from DEBUG_INSNs, RA should ensure
1293 : multi-word registers don't overlap the special registers like
1294 : stack pointer. */
1295 10618775 : rtx new_rtx = gen_raw_REG (mode, regno);
1296 :
1297 10618775 : update_reg_offset (new_rtx, reg, offset);
1298 10618775 : return new_rtx;
1299 : }
1300 :
1301 : /* Generate a new pseudo-register with the same attributes as REG, but
1302 : with OFFSET added to the REG_OFFSET. */
1303 :
1304 : rtx
1305 606694 : gen_reg_rtx_offset (rtx reg, machine_mode mode, int offset)
1306 : {
1307 606694 : rtx new_rtx = gen_reg_rtx (mode);
1308 :
1309 606694 : update_reg_offset (new_rtx, reg, offset);
1310 606694 : return new_rtx;
1311 : }
1312 :
1313 : /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1314 : new register is a (possibly paradoxical) lowpart of the old one. */
1315 :
1316 : void
1317 2867945 : adjust_reg_mode (rtx reg, machine_mode mode)
1318 : {
1319 2867945 : update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
1320 2867945 : PUT_MODE (reg, mode);
1321 2867945 : }
1322 :
1323 : /* Copy REG's attributes from X, if X has any attributes. If REG and X
1324 : have different modes, REG is a (possibly paradoxical) lowpart of X. */
1325 :
1326 : void
1327 73559915 : set_reg_attrs_from_value (rtx reg, rtx x)
1328 : {
1329 73559915 : poly_int64 offset;
1330 73559915 : bool can_be_reg_pointer = true;
1331 :
1332 : /* Don't call mark_reg_pointer for incompatible pointer sign
1333 : extension. */
1334 73559915 : while (GET_CODE (x) == SIGN_EXTEND
1335 : || GET_CODE (x) == ZERO_EXTEND
1336 74508476 : || GET_CODE (x) == TRUNCATE
1337 74508476 : || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
1338 : {
1339 : #if defined(POINTERS_EXTEND_UNSIGNED)
1340 948561 : if (((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
1341 : || (GET_CODE (x) == ZERO_EXTEND && ! POINTERS_EXTEND_UNSIGNED)
1342 373972 : || (paradoxical_subreg_p (x)
1343 18335 : && ! (SUBREG_PROMOTED_VAR_P (x)
1344 0 : && SUBREG_CHECK_PROMOTED_SIGN (x,
1345 : POINTERS_EXTEND_UNSIGNED))))
1346 966896 : && !targetm.have_ptr_extend ())
1347 : can_be_reg_pointer = false;
1348 : #endif
1349 948561 : x = XEXP (x, 0);
1350 : }
1351 :
1352 : /* Hard registers can be reused for multiple purposes within the same
1353 : function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1354 : on them is wrong. */
1355 73559915 : if (HARD_REGISTER_P (reg))
1356 47651857 : return;
1357 :
1358 25908058 : offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1359 25908058 : if (MEM_P (x))
1360 : {
1361 5825238 : if (MEM_OFFSET_KNOWN_P (x))
1362 2640928 : REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1363 2640928 : MEM_OFFSET (x) + offset);
1364 5245777 : if (can_be_reg_pointer && MEM_POINTER (x))
1365 638741 : mark_reg_pointer (reg, 0);
1366 : }
1367 20662281 : else if (REG_P (x))
1368 : {
1369 6656360 : if (REG_ATTRS (x))
1370 3982851 : update_reg_offset (reg, x, offset);
1371 6656360 : if (can_be_reg_pointer && REG_POINTER (x))
1372 1876098 : mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1373 : }
1374 : }
1375 :
1376 : /* Generate a REG rtx for a new pseudo register, copying the mode
1377 : and attributes from X. */
1378 :
1379 : rtx
1380 559658 : gen_reg_rtx_and_attrs (rtx x)
1381 : {
1382 559658 : rtx reg = gen_reg_rtx (GET_MODE (x));
1383 559658 : set_reg_attrs_from_value (reg, x);
1384 559658 : return reg;
1385 : }
1386 :
1387 : /* Set the register attributes for registers contained in PARM_RTX.
1388 : Use needed values from memory attributes of MEM. */
1389 :
1390 : void
1391 110273 : set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1392 : {
1393 110273 : if (REG_P (parm_rtx))
1394 110273 : set_reg_attrs_from_value (parm_rtx, mem);
1395 0 : else if (GET_CODE (parm_rtx) == PARALLEL)
1396 : {
1397 : /* Check for a NULL entry in the first slot, used to indicate that the
1398 : parameter goes both on the stack and in registers. */
1399 0 : int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1400 0 : for (; i < XVECLEN (parm_rtx, 0); i++)
1401 : {
1402 0 : rtx x = XVECEXP (parm_rtx, 0, i);
1403 0 : if (REG_P (XEXP (x, 0)))
1404 0 : REG_ATTRS (XEXP (x, 0))
1405 0 : = get_reg_attrs (MEM_EXPR (mem),
1406 0 : INTVAL (XEXP (x, 1)));
1407 : }
1408 : }
1409 110273 : }
1410 :
1411 : /* Set the REG_ATTRS for registers in value X, given that X represents
1412 : decl T. */
1413 :
1414 : void
1415 65935217 : set_reg_attrs_for_decl_rtl (tree t, rtx x)
1416 : {
1417 65935217 : if (!t)
1418 : return;
1419 65935021 : tree tdecl = t;
1420 65935021 : if (GET_CODE (x) == SUBREG)
1421 : {
1422 611 : gcc_assert (subreg_lowpart_p (x));
1423 611 : x = SUBREG_REG (x);
1424 : }
1425 65935021 : if (REG_P (x))
1426 43350673 : REG_ATTRS (x)
1427 43350673 : = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1428 43350673 : DECL_P (tdecl)
1429 21351191 : ? DECL_MODE (tdecl)
1430 21999482 : : TYPE_MODE (TREE_TYPE (tdecl))));
1431 65935021 : if (GET_CODE (x) == CONCAT)
1432 : {
1433 210674 : if (REG_P (XEXP (x, 0)))
1434 210674 : REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1435 210674 : if (REG_P (XEXP (x, 1)))
1436 210674 : REG_ATTRS (XEXP (x, 1))
1437 421348 : = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1438 : }
1439 65935021 : if (GET_CODE (x) == PARALLEL)
1440 : {
1441 59930 : int i, start;
1442 :
1443 : /* Check for a NULL entry, used to indicate that the parameter goes
1444 : both on the stack and in registers. */
1445 59930 : if (XEXP (XVECEXP (x, 0, 0), 0))
1446 : start = 0;
1447 : else
1448 0 : start = 1;
1449 :
1450 171810 : for (i = start; i < XVECLEN (x, 0); i++)
1451 : {
1452 111880 : rtx y = XVECEXP (x, 0, i);
1453 111880 : if (REG_P (XEXP (y, 0)))
1454 111880 : REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1455 : }
1456 : }
1457 : }
1458 :
1459 : /* Assign the RTX X to declaration T. */
1460 :
1461 : void
1462 606833789 : set_decl_rtl (tree t, rtx x)
1463 : {
1464 606833789 : DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1465 606833789 : if (x)
1466 33350024 : set_reg_attrs_for_decl_rtl (t, x);
1467 606833789 : }
1468 :
1469 : /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1470 : if the ABI requires the parameter to be passed by reference. */
1471 :
1472 : void
1473 3205277 : set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1474 : {
1475 3205277 : DECL_INCOMING_RTL (t) = x;
1476 3205277 : if (x && !by_reference_p)
1477 3200315 : set_reg_attrs_for_decl_rtl (t, x);
1478 3205277 : }
1479 :
1480 : /* Identify REG (which may be a CONCAT) as a user register. */
1481 :
1482 : void
1483 6260305 : mark_user_reg (rtx reg)
1484 : {
1485 6260305 : if (GET_CODE (reg) == CONCAT)
1486 : {
1487 3583 : REG_USERVAR_P (XEXP (reg, 0)) = 1;
1488 3583 : REG_USERVAR_P (XEXP (reg, 1)) = 1;
1489 : }
1490 : else
1491 : {
1492 6256722 : gcc_assert (REG_P (reg));
1493 6256722 : REG_USERVAR_P (reg) = 1;
1494 : }
1495 6260305 : }
1496 :
1497 : /* Identify REG as a probable pointer register and show its alignment
1498 : as ALIGN, if nonzero. */
1499 :
1500 : void
1501 16953734 : mark_reg_pointer (rtx reg, int align)
1502 : {
1503 16953734 : if (! REG_POINTER (reg))
1504 : {
1505 10756109 : REG_POINTER (reg) = 1;
1506 :
1507 10756109 : if (align)
1508 9345013 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1509 : }
1510 6197625 : else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1511 : /* We can no-longer be sure just how aligned this pointer is. */
1512 1298838 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1513 16953734 : }
1514 :
1515 : /* Return 1 plus largest pseudo reg number used in the current function. */
1516 :
1517 : int
1518 6948304153 : max_reg_num (void)
1519 : {
1520 6948304153 : return reg_rtx_no;
1521 : }
1522 :
1523 : /* Return 1 + the largest label number used so far in the current function. */
1524 :
1525 : int
1526 4020282 : max_label_num (void)
1527 : {
1528 4020282 : return label_num;
1529 : }
1530 :
1531 : /* Return first label number used in this function (if any were used). */
1532 :
1533 : int
1534 2537030 : get_first_label_num (void)
1535 : {
1536 2537030 : return first_label_num;
1537 : }
1538 :
1539 : /* If the rtx for label was created during the expansion of a nested
1540 : function, then first_label_num won't include this label number.
1541 : Fix this now so that array indices work later. */
1542 :
1543 : void
1544 26745 : maybe_set_first_label_num (rtx_code_label *x)
1545 : {
1546 26745 : if (CODE_LABEL_NUMBER (x) < first_label_num)
1547 389 : first_label_num = CODE_LABEL_NUMBER (x);
1548 26745 : }
1549 :
1550 : /* For use by the RTL function loader, when mingling with normal
1551 : functions.
1552 : Ensure that label_num is greater than the label num of X, to avoid
1553 : duplicate labels in the generated assembler. */
1554 :
1555 : void
1556 28 : maybe_set_max_label_num (rtx_code_label *x)
1557 : {
1558 28 : if (CODE_LABEL_NUMBER (x) >= label_num)
1559 24 : label_num = CODE_LABEL_NUMBER (x) + 1;
1560 28 : }
1561 :
1562 :
1563 : /* Return a value representing some low-order bits of X, where the number
1564 : of low-order bits is given by MODE. Note that no conversion is done
1565 : between floating-point and fixed-point values, rather, the bit
1566 : representation is returned.
1567 :
1568 : This function handles the cases in common between gen_lowpart, below,
1569 : and two variants in cse.cc and combine.cc. These are the cases that can
1570 : be safely handled at all points in the compilation.
1571 :
1572 : If this is not a case we can handle, return 0. */
1573 :
1574 : rtx
1575 51481026 : gen_lowpart_common (machine_mode mode, rtx x)
1576 : {
1577 102981814 : poly_uint64 msize = GET_MODE_SIZE (mode);
1578 51490907 : machine_mode innermode;
1579 :
1580 : /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1581 : so we have to make one up. Yuk. */
1582 51490907 : innermode = GET_MODE (x);
1583 51490907 : if (CONST_INT_P (x)
1584 51490907 : && known_le (msize * BITS_PER_UNIT,
1585 : (unsigned HOST_WIDE_INT) HOST_BITS_PER_WIDE_INT))
1586 15852376 : innermode = int_mode_for_size (HOST_BITS_PER_WIDE_INT, 0).require ();
1587 35638531 : else if (innermode == VOIDmode)
1588 193461 : innermode = int_mode_for_size (HOST_BITS_PER_DOUBLE_INT, 0).require ();
1589 :
1590 51490907 : gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1591 :
1592 51490907 : if (innermode == mode)
1593 : return x;
1594 :
1595 : /* The size of the outer and inner modes must be ordered. */
1596 58795750 : poly_uint64 xsize = GET_MODE_SIZE (innermode);
1597 29397875 : if (!ordered_p (msize, xsize))
1598 : return 0;
1599 :
1600 29397875 : if (SCALAR_FLOAT_MODE_P (mode))
1601 : {
1602 : /* Don't allow paradoxical FLOAT_MODE subregs. */
1603 260423 : if (maybe_gt (msize, xsize))
1604 : return 0;
1605 : }
1606 : else
1607 : {
1608 : /* MODE must occupy no more of the underlying registers than X. */
1609 29137452 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (innermode);
1610 29137452 : unsigned int mregs, xregs;
1611 45863811 : if (!can_div_away_from_zero_p (msize, regsize, &mregs)
1612 29137452 : || !can_div_away_from_zero_p (xsize, regsize, &xregs)
1613 29137452 : || mregs > xregs)
1614 9258398 : return 0;
1615 : }
1616 :
1617 29396503 : scalar_int_mode int_mode, int_innermode, from_mode;
1618 29396503 : if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1619 155395 : && is_a <scalar_int_mode> (mode, &int_mode)
1620 29396503 : && is_a <scalar_int_mode> (innermode, &int_innermode)
1621 29551846 : && is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &from_mode))
1622 : {
1623 : /* If we are getting the low-order part of something that has been
1624 : sign- or zero-extended, we can either just use the object being
1625 : extended or make a narrower extension. If we want an even smaller
1626 : piece than the size of the object being extended, call ourselves
1627 : recursively.
1628 :
1629 : This case is used mostly by combine and cse. */
1630 :
1631 155343 : if (from_mode == int_mode)
1632 : return XEXP (x, 0);
1633 39291 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (from_mode))
1634 : return gen_lowpart_common (int_mode, XEXP (x, 0));
1635 9648 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (int_innermode))
1636 2962 : return gen_rtx_fmt_e (GET_CODE (x), int_mode, XEXP (x, 0));
1637 : }
1638 29241160 : else if (GET_CODE (x) == SUBREG || REG_P (x)
1639 : || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1640 16372631 : || CONST_DOUBLE_AS_FLOAT_P (x) || CONST_SCALAR_INT_P (x)
1641 : || CONST_POLY_INT_P (x))
1642 19984388 : return lowpart_subreg (mode, x, innermode);
1643 :
1644 : /* Otherwise, we can't do this. */
1645 : return 0;
1646 : }
1647 :
1648 : rtx
1649 8924 : gen_highpart (machine_mode mode, rtx x)
1650 : {
1651 17848 : poly_uint64 msize = GET_MODE_SIZE (mode);
1652 8924 : rtx result;
1653 :
1654 : /* This case loses if X is a subreg. To catch bugs early,
1655 : complain if an invalid MODE is used even in other cases. */
1656 10656 : gcc_assert (known_le (msize, (unsigned int) UNITS_PER_WORD)
1657 : || known_eq (msize, GET_MODE_UNIT_SIZE (GET_MODE (x))));
1658 :
1659 : /* gen_lowpart_common handles a lot of special cases due to needing to handle
1660 : paradoxical subregs; it only calls simplify_gen_subreg when certain that
1661 : it will produce something meaningful. The only case we need to handle
1662 : specially here is MEM. */
1663 8924 : if (MEM_P (x))
1664 : {
1665 137 : poly_int64 offset = subreg_highpart_offset (mode, GET_MODE (x));
1666 137 : return adjust_address (x, mode, offset);
1667 : }
1668 :
1669 8787 : result = simplify_gen_subreg (mode, x, GET_MODE (x),
1670 8787 : subreg_highpart_offset (mode, GET_MODE (x)));
1671 : /* Since we handle MEM directly above, we should never get a MEM back
1672 : from simplify_gen_subreg. */
1673 8787 : gcc_assert (result && !MEM_P (result));
1674 :
1675 : return result;
1676 : }
1677 :
1678 : /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1679 : be VOIDmode constant. */
1680 : rtx
1681 0 : gen_highpart_mode (machine_mode outermode, machine_mode innermode, rtx exp)
1682 : {
1683 0 : if (GET_MODE (exp) != VOIDmode)
1684 : {
1685 0 : gcc_assert (GET_MODE (exp) == innermode);
1686 0 : return gen_highpart (outermode, exp);
1687 : }
1688 0 : return simplify_gen_subreg (outermode, exp, innermode,
1689 0 : subreg_highpart_offset (outermode, innermode));
1690 : }
1691 :
1692 : /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1693 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1694 :
1695 : poly_uint64
1696 224971072 : subreg_size_lowpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1697 : {
1698 224971072 : gcc_checking_assert (ordered_p (outer_bytes, inner_bytes));
1699 224971072 : if (maybe_gt (outer_bytes, inner_bytes))
1700 : /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1701 50395698 : return 0;
1702 :
1703 174575374 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1704 : return inner_bytes - outer_bytes;
1705 174575374 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1706 174575374 : return 0;
1707 : else
1708 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes, 0);
1709 : }
1710 :
1711 : /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1712 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1713 :
1714 : poly_uint64
1715 43231 : subreg_size_highpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1716 : {
1717 43231 : gcc_assert (known_ge (inner_bytes, outer_bytes));
1718 :
1719 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1720 : return 0;
1721 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1722 43231 : return inner_bytes - outer_bytes;
1723 : else
1724 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes,
1725 : (inner_bytes - outer_bytes)
1726 : * BITS_PER_UNIT);
1727 : }
1728 :
1729 : /* Return true iff X, assumed to be a SUBREG,
1730 : refers to the least significant part of its containing reg.
1731 : If X is not a SUBREG, always return true (it is its own low part!). */
1732 :
1733 : bool
1734 52410076 : subreg_lowpart_p (const_rtx x)
1735 : {
1736 52410076 : if (GET_CODE (x) != SUBREG)
1737 : return true;
1738 52410076 : else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1739 : return false;
1740 :
1741 52410076 : return known_eq (subreg_lowpart_offset (GET_MODE (x),
1742 : GET_MODE (SUBREG_REG (x))),
1743 : SUBREG_BYTE (x));
1744 : }
1745 :
1746 : /* Return subword OFFSET of operand OP.
1747 : The word number, OFFSET, is interpreted as the word number starting
1748 : at the low-order address. OFFSET 0 is the low-order word if not
1749 : WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1750 :
1751 : If we cannot extract the required word, we return zero. Otherwise,
1752 : an rtx corresponding to the requested word will be returned.
1753 :
1754 : VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1755 : reload has completed, a valid address will always be returned. After
1756 : reload, if a valid address cannot be returned, we return zero.
1757 :
1758 : If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1759 : it is the responsibility of the caller.
1760 :
1761 : MODE is the mode of OP in case it is a CONST_INT.
1762 :
1763 : ??? This is still rather broken for some cases. The problem for the
1764 : moment is that all callers of this thing provide no 'goal mode' to
1765 : tell us to work with. This exists because all callers were written
1766 : in a word based SUBREG world.
1767 : Now use of this function can be deprecated by simplify_subreg in most
1768 : cases.
1769 : */
1770 :
1771 : rtx
1772 82144 : operand_subword (rtx op, poly_uint64 offset, int validate_address,
1773 : machine_mode mode)
1774 : {
1775 82144 : if (mode == VOIDmode)
1776 3016 : mode = GET_MODE (op);
1777 :
1778 3016 : gcc_assert (mode != VOIDmode);
1779 :
1780 : /* If OP is narrower than a word, fail. */
1781 82144 : if (mode != BLKmode
1782 176757 : && maybe_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1783 : return 0;
1784 :
1785 : /* If we want a word outside OP, return zero. */
1786 82144 : if (mode != BLKmode
1787 176757 : && maybe_gt ((offset + 1) * UNITS_PER_WORD, GET_MODE_SIZE (mode)))
1788 0 : return const0_rtx;
1789 :
1790 : /* Form a new MEM at the requested address. */
1791 82144 : if (MEM_P (op))
1792 : {
1793 10821 : rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1794 :
1795 9613 : if (! validate_address)
1796 : return new_rtx;
1797 :
1798 9613 : else if (reload_completed)
1799 : {
1800 0 : if (! strict_memory_address_addr_space_p (word_mode,
1801 : XEXP (new_rtx, 0),
1802 0 : MEM_ADDR_SPACE (op)))
1803 : return 0;
1804 : }
1805 : else
1806 9613 : return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1807 : }
1808 :
1809 : /* Rest can be handled by simplify_subreg. */
1810 86903 : return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1811 : }
1812 :
1813 : /* Similar to `operand_subword', but never return 0. If we can't
1814 : extract the required subword, put OP into a register and try again.
1815 : The second attempt must succeed. We always validate the address in
1816 : this case.
1817 :
1818 : MODE is the mode of OP, in case it is CONST_INT. */
1819 :
1820 : rtx
1821 61896 : operand_subword_force (rtx op, poly_uint64 offset, machine_mode mode)
1822 : {
1823 61896 : rtx result = operand_subword (op, offset, 1, mode);
1824 :
1825 61896 : if (result)
1826 : return result;
1827 :
1828 0 : if (mode != BLKmode && mode != VOIDmode)
1829 : {
1830 : /* If this is a register which cannot be accessed by words, copy it
1831 : to a pseudo register. */
1832 0 : if (REG_P (op))
1833 0 : op = copy_to_reg (op);
1834 : else
1835 0 : op = force_reg (mode, op);
1836 : }
1837 :
1838 0 : result = operand_subword (op, offset, 1, mode);
1839 0 : gcc_assert (result);
1840 :
1841 : return result;
1842 : }
1843 :
1844 31283048 : mem_attrs::mem_attrs ()
1845 31283048 : : expr (NULL_TREE),
1846 31283048 : offset (0),
1847 31283048 : size (0),
1848 31283048 : alias (0),
1849 31283048 : align (0),
1850 31283048 : addrspace (ADDR_SPACE_GENERIC),
1851 31283048 : offset_known_p (false),
1852 31283048 : size_known_p (false)
1853 31283048 : {}
1854 :
1855 : /* Returns true if both MEM_EXPR can be considered equal
1856 : and false otherwise. */
1857 :
1858 : bool
1859 43107 : mem_expr_equal_p (const_tree expr1, const_tree expr2)
1860 : {
1861 43107 : if (expr1 == expr2)
1862 : return true;
1863 :
1864 42486 : if (! expr1 || ! expr2)
1865 : return false;
1866 :
1867 33335 : if (TREE_CODE (expr1) != TREE_CODE (expr2))
1868 : return false;
1869 :
1870 31689 : return operand_equal_p (expr1, expr2, 0);
1871 : }
1872 :
1873 : /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1874 : bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1875 : -1 if not known. */
1876 :
1877 : int
1878 20 : get_mem_align_offset (rtx mem, unsigned int align)
1879 : {
1880 20 : tree expr;
1881 20 : poly_uint64 offset;
1882 :
1883 : /* This function can't use
1884 : if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1885 : || (MAX (MEM_ALIGN (mem),
1886 : MAX (align, get_object_alignment (MEM_EXPR (mem))))
1887 : < align))
1888 : return -1;
1889 : else
1890 : return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1891 : for two reasons:
1892 : - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1893 : for <variable>. get_inner_reference doesn't handle it and
1894 : even if it did, the alignment in that case needs to be determined
1895 : from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1896 : - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1897 : isn't sufficiently aligned, the object it is in might be. */
1898 20 : gcc_assert (MEM_P (mem));
1899 20 : expr = MEM_EXPR (mem);
1900 20 : if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1901 : return -1;
1902 :
1903 19 : offset = MEM_OFFSET (mem);
1904 19 : if (DECL_P (expr))
1905 : {
1906 2 : if (DECL_ALIGN (expr) < align)
1907 : return -1;
1908 : }
1909 17 : else if (INDIRECT_REF_P (expr))
1910 : {
1911 0 : if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1912 : return -1;
1913 : }
1914 17 : else if (TREE_CODE (expr) == COMPONENT_REF)
1915 : {
1916 0 : while (1)
1917 : {
1918 0 : tree inner = TREE_OPERAND (expr, 0);
1919 0 : tree field = TREE_OPERAND (expr, 1);
1920 0 : tree byte_offset = component_ref_field_offset (expr);
1921 0 : tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1922 :
1923 0 : poly_uint64 suboffset;
1924 0 : if (!byte_offset
1925 0 : || !poly_int_tree_p (byte_offset, &suboffset)
1926 0 : || !tree_fits_uhwi_p (bit_offset))
1927 0 : return -1;
1928 :
1929 0 : offset += suboffset;
1930 0 : offset += tree_to_uhwi (bit_offset) / BITS_PER_UNIT;
1931 :
1932 0 : if (inner == NULL_TREE)
1933 : {
1934 0 : if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1935 : < (unsigned int) align)
1936 : return -1;
1937 0 : break;
1938 : }
1939 0 : else if (DECL_P (inner))
1940 : {
1941 0 : if (DECL_ALIGN (inner) < align)
1942 : return -1;
1943 : break;
1944 : }
1945 0 : else if (TREE_CODE (inner) != COMPONENT_REF)
1946 : return -1;
1947 0 : expr = inner;
1948 0 : }
1949 : }
1950 : else
1951 : return -1;
1952 :
1953 0 : HOST_WIDE_INT misalign;
1954 0 : if (!known_misalignment (offset, align / BITS_PER_UNIT, &misalign))
1955 : return -1;
1956 0 : return misalign;
1957 : }
1958 :
1959 : /* Given REF (a MEM) and T, either the type of X or the expression
1960 : corresponding to REF, set the memory attributes. OBJECTP is nonzero
1961 : if we are making a new object of this type. BITPOS is nonzero if
1962 : there is an offset outstanding on T that will be applied later. */
1963 :
1964 : void
1965 31283048 : set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1966 : poly_int64 bitpos)
1967 : {
1968 31283048 : poly_int64 apply_bitpos = 0;
1969 31283048 : tree type;
1970 31283048 : class mem_attrs attrs, *defattrs, *refattrs;
1971 31283048 : addr_space_t as;
1972 :
1973 : /* It can happen that type_for_mode was given a mode for which there
1974 : is no language-level type. In which case it returns NULL, which
1975 : we can see here. */
1976 31283048 : if (t == NULL_TREE)
1977 0 : return;
1978 :
1979 31283048 : type = TYPE_P (t) ? t : TREE_TYPE (t);
1980 31283048 : if (type == error_mark_node)
1981 : return;
1982 :
1983 : /* If we have already set DECL_RTL = ref, get_alias_set will get the
1984 : wrong answer, as it assumes that DECL_RTL already has the right alias
1985 : info. Callers should not set DECL_RTL until after the call to
1986 : set_mem_attributes. */
1987 31283048 : gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1988 :
1989 : /* Get the alias set from the expression or type (perhaps using a
1990 : front-end routine) and use it. */
1991 31283048 : attrs.alias = get_alias_set (t);
1992 :
1993 31283048 : MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1994 31283048 : MEM_POINTER (ref) = POINTER_TYPE_P (type);
1995 :
1996 : /* Default values from pre-existing memory attributes if present. */
1997 31283048 : refattrs = MEM_ATTRS (ref);
1998 31283048 : if (refattrs)
1999 : {
2000 : /* ??? Can this ever happen? Calling this routine on a MEM that
2001 : already carries memory attributes should probably be invalid. */
2002 12488439 : attrs.expr = refattrs->expr;
2003 12488439 : attrs.offset_known_p = refattrs->offset_known_p;
2004 12488439 : attrs.offset = refattrs->offset;
2005 12488439 : attrs.size_known_p = refattrs->size_known_p;
2006 12488439 : attrs.size = refattrs->size;
2007 12488439 : attrs.align = refattrs->align;
2008 : }
2009 :
2010 : /* Otherwise, default values from the mode of the MEM reference. */
2011 : else
2012 : {
2013 18794609 : defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
2014 18794609 : gcc_assert (!defattrs->expr);
2015 18794609 : gcc_assert (!defattrs->offset_known_p);
2016 :
2017 : /* Respect mode size. */
2018 18794609 : attrs.size_known_p = defattrs->size_known_p;
2019 18794609 : attrs.size = defattrs->size;
2020 : /* ??? Is this really necessary? We probably should always get
2021 : the size from the type below. */
2022 :
2023 : /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
2024 : if T is an object, always compute the object alignment below. */
2025 18794609 : if (TYPE_P (t))
2026 2035949 : attrs.align = defattrs->align;
2027 : else
2028 16758660 : attrs.align = BITS_PER_UNIT;
2029 : /* ??? If T is a type, respecting mode alignment may *also* be wrong
2030 : e.g. if the type carries an alignment attribute. Should we be
2031 : able to simply always use TYPE_ALIGN? */
2032 : }
2033 :
2034 : /* We can set the alignment from the type if we are making an object or if
2035 : this is an INDIRECT_REF. */
2036 31283048 : if (objectp || TREE_CODE (t) == INDIRECT_REF)
2037 9841990 : attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
2038 :
2039 : /* If the size is known, we can set that. */
2040 31283048 : tree new_size = TYPE_SIZE_UNIT (type);
2041 :
2042 : /* The address-space is that of the type. */
2043 31283048 : as = TYPE_ADDR_SPACE (type);
2044 :
2045 : /* If T is not a type, we may be able to deduce some more information about
2046 : the expression. */
2047 31283048 : if (! TYPE_P (t))
2048 : {
2049 29240858 : tree base;
2050 :
2051 29240858 : if (TREE_THIS_VOLATILE (t))
2052 177762 : MEM_VOLATILE_P (ref) = 1;
2053 :
2054 : /* Now remove any conversions: they don't change what the underlying
2055 : object is. Likewise for SAVE_EXPR. */
2056 29245467 : while (CONVERT_EXPR_P (t)
2057 : || TREE_CODE (t) == VIEW_CONVERT_EXPR
2058 29245467 : || TREE_CODE (t) == SAVE_EXPR)
2059 4609 : t = TREE_OPERAND (t, 0);
2060 :
2061 : /* Note whether this expression can trap. */
2062 29240858 : MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
2063 :
2064 29240858 : base = get_base_address (t);
2065 29240858 : if (base)
2066 : {
2067 29240858 : if (DECL_P (base)
2068 16974323 : && TREE_READONLY (base)
2069 2193264 : && (TREE_STATIC (base) || DECL_EXTERNAL (base))
2070 31104692 : && !TREE_THIS_VOLATILE (base))
2071 1863459 : MEM_READONLY_P (ref) = 1;
2072 :
2073 : /* Mark static const strings readonly as well. */
2074 29240858 : if (TREE_CODE (base) == STRING_CST
2075 336363 : && TREE_READONLY (base)
2076 29552353 : && TREE_STATIC (base))
2077 311495 : MEM_READONLY_P (ref) = 1;
2078 :
2079 : /* Address-space information is on the base object. */
2080 29240858 : if (TREE_CODE (base) == MEM_REF
2081 29240858 : || TREE_CODE (base) == TARGET_MEM_REF)
2082 11930160 : as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
2083 : 0))));
2084 : else
2085 17310698 : as = TYPE_ADDR_SPACE (TREE_TYPE (base));
2086 : }
2087 :
2088 : /* If this expression uses it's parent's alias set, mark it such
2089 : that we won't change it. */
2090 29240858 : if (component_uses_parent_alias_set_from (t) != NULL_TREE)
2091 1158899 : MEM_KEEP_ALIAS_SET_P (ref) = 1;
2092 :
2093 : /* If this is a decl, set the attributes of the MEM from it. */
2094 29240858 : if (DECL_P (t))
2095 : {
2096 7832012 : attrs.expr = t;
2097 7832012 : attrs.offset_known_p = true;
2098 7832012 : attrs.offset = 0;
2099 7832012 : apply_bitpos = bitpos;
2100 7832012 : new_size = DECL_SIZE_UNIT (t);
2101 : }
2102 :
2103 : /* ??? If we end up with a constant or a descriptor do not
2104 : record a MEM_EXPR. */
2105 21408846 : else if (CONSTANT_CLASS_P (t)
2106 21271627 : || TREE_CODE (t) == CONSTRUCTOR)
2107 : ;
2108 :
2109 : /* If this is a field reference, record it. */
2110 21271627 : else if (TREE_CODE (t) == COMPONENT_REF)
2111 : {
2112 9595350 : attrs.expr = t;
2113 9595350 : attrs.offset_known_p = true;
2114 9595350 : attrs.offset = 0;
2115 9595350 : apply_bitpos = bitpos;
2116 9595350 : if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
2117 66008 : new_size = DECL_SIZE_UNIT (TREE_OPERAND (t, 1));
2118 : }
2119 :
2120 : /* Else record it. */
2121 : else
2122 : {
2123 11676277 : gcc_assert (handled_component_p (t)
2124 : || TREE_CODE (t) == MEM_REF
2125 : || TREE_CODE (t) == TARGET_MEM_REF);
2126 11676277 : attrs.expr = t;
2127 11676277 : attrs.offset_known_p = true;
2128 11676277 : attrs.offset = 0;
2129 11676277 : apply_bitpos = bitpos;
2130 : }
2131 :
2132 : /* If this is a reference based on a partitioned decl replace the
2133 : base with a MEM_REF of the pointer representative we created
2134 : during stack slot partitioning. */
2135 29240858 : if (attrs.expr
2136 29103639 : && VAR_P (base)
2137 13906085 : && ! is_global_var (base)
2138 37785132 : && cfun->gimple_df->decls_to_pointers != NULL)
2139 : {
2140 3909406 : tree *namep = cfun->gimple_df->decls_to_pointers->get (base);
2141 3909406 : if (namep)
2142 : {
2143 2288435 : attrs.expr = unshare_expr (attrs.expr);
2144 2288435 : tree *orig_base = &attrs.expr;
2145 4844785 : while (handled_component_p (*orig_base))
2146 2556350 : orig_base = &TREE_OPERAND (*orig_base, 0);
2147 2288435 : if (TREE_CODE (*orig_base) == MEM_REF
2148 2288435 : || TREE_CODE (*orig_base) == TARGET_MEM_REF)
2149 688116 : TREE_OPERAND (*orig_base, 0) = *namep;
2150 : else
2151 : {
2152 1600319 : tree aptrt = reference_alias_ptr_type (*orig_base);
2153 1600319 : *orig_base = build2 (MEM_REF, TREE_TYPE (*orig_base),
2154 : *namep, build_int_cst (aptrt, 0));
2155 : }
2156 : }
2157 : }
2158 :
2159 : /* Compute the alignment. */
2160 29240858 : unsigned int obj_align;
2161 29240858 : unsigned HOST_WIDE_INT obj_bitpos;
2162 29240858 : get_object_alignment_1 (t, &obj_align, &obj_bitpos);
2163 29240858 : unsigned int diff_align = known_alignment (obj_bitpos - bitpos);
2164 29240858 : if (diff_align != 0)
2165 3858963 : obj_align = MIN (obj_align, diff_align);
2166 29240858 : attrs.align = MAX (attrs.align, obj_align);
2167 : }
2168 :
2169 31283048 : poly_uint64 const_size;
2170 31283048 : if (poly_int_tree_p (new_size, &const_size))
2171 : {
2172 30688917 : attrs.size_known_p = true;
2173 30688917 : attrs.size = const_size;
2174 : }
2175 :
2176 : /* If we modified OFFSET based on T, then subtract the outstanding
2177 : bit position offset. Similarly, increase the size of the accessed
2178 : object to contain the negative offset. */
2179 31283048 : if (maybe_ne (apply_bitpos, 0))
2180 : {
2181 2730363 : gcc_assert (attrs.offset_known_p);
2182 2730363 : poly_int64 bytepos = bits_to_bytes_round_down (apply_bitpos);
2183 2730363 : attrs.offset -= bytepos;
2184 2730363 : if (attrs.size_known_p)
2185 31283048 : attrs.size += bytepos;
2186 : }
2187 :
2188 : /* Now set the attributes we computed above. */
2189 31283048 : attrs.addrspace = as;
2190 31283048 : set_mem_attrs (ref, &attrs);
2191 : }
2192 :
2193 : void
2194 27271337 : set_mem_attributes (rtx ref, tree t, int objectp)
2195 : {
2196 27271337 : set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2197 27271337 : }
2198 :
2199 : /* Set the alias set of MEM to SET. */
2200 :
2201 : void
2202 7688928 : set_mem_alias_set (rtx mem, alias_set_type set)
2203 : {
2204 : /* If the new and old alias sets don't conflict, something is wrong. */
2205 10790681 : gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
2206 7688928 : mem_attrs attrs (*get_mem_attrs (mem));
2207 7688928 : attrs.alias = set;
2208 7688928 : set_mem_attrs (mem, &attrs);
2209 7688928 : }
2210 :
2211 : /* Set the address space of MEM to ADDRSPACE (target-defined). */
2212 :
2213 : void
2214 9923942 : set_mem_addr_space (rtx mem, addr_space_t addrspace)
2215 : {
2216 9923942 : mem_attrs attrs (*get_mem_attrs (mem));
2217 9923942 : attrs.addrspace = addrspace;
2218 9923942 : set_mem_attrs (mem, &attrs);
2219 9923942 : }
2220 :
2221 : /* Set the alignment of MEM to ALIGN bits. */
2222 :
2223 : void
2224 12634689 : set_mem_align (rtx mem, unsigned int align)
2225 : {
2226 12634689 : mem_attrs attrs (*get_mem_attrs (mem));
2227 12634689 : attrs.align = align;
2228 12634689 : set_mem_attrs (mem, &attrs);
2229 12634689 : }
2230 :
2231 : /* Set the expr for MEM to EXPR. */
2232 :
2233 : void
2234 6829152 : set_mem_expr (rtx mem, tree expr)
2235 : {
2236 6829152 : mem_attrs attrs (*get_mem_attrs (mem));
2237 6829152 : attrs.expr = expr;
2238 6829152 : set_mem_attrs (mem, &attrs);
2239 6829152 : }
2240 :
2241 : /* Set the offset of MEM to OFFSET. */
2242 :
2243 : void
2244 134 : set_mem_offset (rtx mem, poly_int64 offset)
2245 : {
2246 134 : mem_attrs attrs (*get_mem_attrs (mem));
2247 134 : attrs.offset_known_p = true;
2248 134 : attrs.offset = offset;
2249 134 : set_mem_attrs (mem, &attrs);
2250 134 : }
2251 :
2252 : /* Clear the offset of MEM. */
2253 :
2254 : void
2255 86853 : clear_mem_offset (rtx mem)
2256 : {
2257 86853 : mem_attrs attrs (*get_mem_attrs (mem));
2258 86853 : attrs.offset_known_p = false;
2259 86853 : set_mem_attrs (mem, &attrs);
2260 86853 : }
2261 :
2262 : /* Set the size of MEM to SIZE. */
2263 :
2264 : void
2265 2479171 : set_mem_size (rtx mem, poly_int64 size)
2266 : {
2267 2479171 : mem_attrs attrs (*get_mem_attrs (mem));
2268 2479171 : attrs.size_known_p = true;
2269 2479171 : attrs.size = size;
2270 2479171 : set_mem_attrs (mem, &attrs);
2271 2479171 : }
2272 :
2273 : /* Clear the size of MEM. */
2274 :
2275 : void
2276 539 : clear_mem_size (rtx mem)
2277 : {
2278 539 : mem_attrs attrs (*get_mem_attrs (mem));
2279 539 : attrs.size_known_p = false;
2280 539 : set_mem_attrs (mem, &attrs);
2281 539 : }
2282 :
2283 : /* Return a memory reference like MEMREF, but with its mode changed to MODE
2284 : and its address changed to ADDR. (VOIDmode means don't change the mode.
2285 : NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2286 : returned memory location is required to be valid. INPLACE is true if any
2287 : changes can be made directly to MEMREF or false if MEMREF must be treated
2288 : as immutable.
2289 :
2290 : The memory attributes are not changed. */
2291 :
2292 : static rtx
2293 497053906 : change_address_1 (rtx memref, machine_mode mode, rtx addr, int validate,
2294 : bool inplace)
2295 : {
2296 497053906 : addr_space_t as;
2297 497053906 : rtx new_rtx;
2298 :
2299 497053906 : gcc_assert (MEM_P (memref));
2300 497053906 : as = MEM_ADDR_SPACE (memref);
2301 497053906 : if (mode == VOIDmode)
2302 470710405 : mode = GET_MODE (memref);
2303 497053906 : if (addr == 0)
2304 60 : addr = XEXP (memref, 0);
2305 477024285 : if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2306 836088832 : && (!validate || memory_address_addr_space_p (mode, addr, as)))
2307 338910916 : return memref;
2308 :
2309 : /* Don't validate address for LRA. LRA can make the address valid
2310 : by itself in most efficient way. */
2311 158142990 : if (validate && !lra_in_progress)
2312 : {
2313 22967273 : if (reload_in_progress || reload_completed)
2314 3816404 : gcc_assert (memory_address_addr_space_p (mode, addr, as));
2315 : else
2316 19150869 : addr = memory_address_addr_space (mode, addr, as);
2317 : }
2318 :
2319 158142990 : if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2320 : return memref;
2321 :
2322 154122699 : if (inplace)
2323 : {
2324 259731 : XEXP (memref, 0) = addr;
2325 259731 : return memref;
2326 : }
2327 :
2328 153862968 : new_rtx = gen_rtx_MEM (mode, addr);
2329 153862968 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2330 153862968 : return new_rtx;
2331 : }
2332 :
2333 : /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2334 : way we are changing MEMREF, so we only preserve the alias set. */
2335 :
2336 : rtx
2337 300329 : change_address (rtx memref, machine_mode mode, rtx addr)
2338 : {
2339 300329 : rtx new_rtx = change_address_1 (memref, mode, addr, 1, false);
2340 300329 : machine_mode mmode = GET_MODE (new_rtx);
2341 300329 : class mem_attrs *defattrs;
2342 :
2343 300329 : mem_attrs attrs (*get_mem_attrs (memref));
2344 300329 : defattrs = mode_mem_attrs[(int) mmode];
2345 300329 : attrs.expr = NULL_TREE;
2346 300329 : attrs.offset_known_p = false;
2347 300329 : attrs.size_known_p = defattrs->size_known_p;
2348 300329 : attrs.size = defattrs->size;
2349 300329 : attrs.align = defattrs->align;
2350 :
2351 : /* If there are no changes, just return the original memory reference. */
2352 300329 : if (new_rtx == memref)
2353 : {
2354 69808 : if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2355 : return new_rtx;
2356 :
2357 56300 : new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2358 56300 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2359 : }
2360 :
2361 286821 : set_mem_attrs (new_rtx, &attrs);
2362 286821 : return new_rtx;
2363 : }
2364 :
2365 : /* Return a memory reference like MEMREF, but with its mode changed
2366 : to MODE and its address offset by OFFSET bytes. If VALIDATE is
2367 : nonzero, the memory address is forced to be valid.
2368 : If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2369 : and the caller is responsible for adjusting MEMREF base register.
2370 : If ADJUST_OBJECT is zero, the underlying object associated with the
2371 : memory reference is left unchanged and the caller is responsible for
2372 : dealing with it. Otherwise, if the new memory reference is outside
2373 : the underlying object, even partially, then the object is dropped.
2374 : SIZE, if nonzero, is the size of an access in cases where MODE
2375 : has no inherent size. */
2376 :
2377 : rtx
2378 34865373 : adjust_address_1 (rtx memref, machine_mode mode, poly_int64 offset,
2379 : int validate, int adjust_address, int adjust_object,
2380 : poly_int64 size)
2381 : {
2382 34865373 : rtx addr = XEXP (memref, 0);
2383 34865373 : rtx new_rtx;
2384 34865373 : scalar_int_mode address_mode;
2385 34865373 : class mem_attrs attrs (*get_mem_attrs (memref)), *defattrs;
2386 34865373 : unsigned HOST_WIDE_INT max_align;
2387 : #ifdef POINTERS_EXTEND_UNSIGNED
2388 34865373 : scalar_int_mode pointer_mode
2389 34865373 : = targetm.addr_space.pointer_mode (attrs.addrspace);
2390 : #endif
2391 :
2392 : /* VOIDmode means no mode change for change_address_1. */
2393 34865373 : if (mode == VOIDmode)
2394 16636 : mode = GET_MODE (memref);
2395 :
2396 : /* Take the size of non-BLKmode accesses from the mode. */
2397 34865373 : defattrs = mode_mem_attrs[(int) mode];
2398 34865373 : if (defattrs->size_known_p)
2399 28914248 : size = defattrs->size;
2400 :
2401 : /* If there are no changes, just return the original memory reference. */
2402 34865373 : if (mode == GET_MODE (memref)
2403 14978862 : && known_eq (offset, 0)
2404 8822831 : && (known_eq (size, 0)
2405 3699730 : || (attrs.size_known_p && known_eq (attrs.size, size)))
2406 48539349 : && (!validate || memory_address_addr_space_p (mode, addr,
2407 4851769 : attrs.addrspace)))
2408 8822201 : return memref;
2409 :
2410 : /* ??? Prefer to create garbage instead of creating shared rtl.
2411 : This may happen even if offset is nonzero -- consider
2412 : (plus (plus reg reg) const_int) -- so do this always. */
2413 26043172 : addr = copy_rtx (addr);
2414 :
2415 : /* Convert a possibly large offset to a signed value within the
2416 : range of the target address space. */
2417 26043172 : address_mode = get_address_mode (memref);
2418 26043172 : offset = trunc_int_for_mode (offset, address_mode);
2419 :
2420 26043172 : if (adjust_address)
2421 : {
2422 : /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2423 : object, we can merge it into the LO_SUM. */
2424 26016175 : if (GET_MODE (memref) != BLKmode
2425 11940892 : && GET_CODE (addr) == LO_SUM
2426 26016175 : && known_in_range_p (offset,
2427 0 : 0, (GET_MODE_ALIGNMENT (GET_MODE (memref))
2428 0 : / BITS_PER_UNIT)))
2429 0 : addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2430 : plus_constant (address_mode,
2431 : XEXP (addr, 1), offset));
2432 : #ifdef POINTERS_EXTEND_UNSIGNED
2433 : /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2434 : in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2435 : the fact that pointers are not allowed to overflow. */
2436 26016175 : else if (POINTERS_EXTEND_UNSIGNED > 0
2437 26016175 : && GET_CODE (addr) == ZERO_EXTEND
2438 12 : && GET_MODE (XEXP (addr, 0)) == pointer_mode
2439 26016177 : && known_eq (trunc_int_for_mode (offset, pointer_mode), offset))
2440 2 : addr = gen_rtx_ZERO_EXTEND (address_mode,
2441 : plus_constant (pointer_mode,
2442 : XEXP (addr, 0), offset));
2443 : #endif
2444 : else
2445 26016173 : addr = plus_constant (address_mode, addr, offset);
2446 : }
2447 :
2448 26043172 : new_rtx = change_address_1 (memref, mode, addr, validate, false);
2449 :
2450 : /* If the address is a REG, change_address_1 rightfully returns memref,
2451 : but this would destroy memref's MEM_ATTRS. */
2452 26043172 : if (new_rtx == memref && maybe_ne (offset, 0))
2453 26952 : new_rtx = copy_rtx (new_rtx);
2454 :
2455 : /* Conservatively drop the object if we don't know where we start from. */
2456 26043172 : if (adjust_object && (!attrs.offset_known_p || !attrs.size_known_p))
2457 : {
2458 4357 : attrs.expr = NULL_TREE;
2459 4357 : attrs.alias = 0;
2460 : }
2461 :
2462 : /* Compute the new values of the memory attributes due to this adjustment.
2463 : We add the offsets and update the alignment. */
2464 26043172 : if (attrs.offset_known_p)
2465 : {
2466 22193596 : attrs.offset += offset;
2467 :
2468 : /* Drop the object if the new left end is not within its bounds. */
2469 22193596 : if (adjust_object && maybe_lt (attrs.offset, 0))
2470 : {
2471 25638 : attrs.expr = NULL_TREE;
2472 25638 : attrs.alias = 0;
2473 : }
2474 : }
2475 :
2476 : /* Compute the new alignment by taking the MIN of the alignment and the
2477 : lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2478 : if zero. */
2479 26043172 : if (maybe_ne (offset, 0))
2480 : {
2481 11929378 : max_align = known_alignment (offset) * BITS_PER_UNIT;
2482 11929378 : attrs.align = MIN (attrs.align, max_align);
2483 : }
2484 :
2485 26043172 : if (maybe_ne (size, 0))
2486 : {
2487 : /* Drop the object if the new right end is not within its bounds. */
2488 25371514 : if (adjust_object && maybe_gt (offset + size, attrs.size))
2489 : {
2490 64761 : attrs.expr = NULL_TREE;
2491 64761 : attrs.alias = 0;
2492 : }
2493 25371514 : attrs.size_known_p = true;
2494 25371514 : attrs.size = size;
2495 : }
2496 671658 : else if (attrs.size_known_p)
2497 : {
2498 665209 : gcc_assert (!adjust_object);
2499 26043172 : attrs.size -= offset;
2500 : /* ??? The store_by_pieces machinery generates negative sizes,
2501 : so don't assert for that here. */
2502 : }
2503 :
2504 26043172 : set_mem_attrs (new_rtx, &attrs);
2505 :
2506 26043172 : return new_rtx;
2507 : }
2508 :
2509 : /* Return a memory reference like MEMREF, but with its mode changed
2510 : to MODE and its address changed to ADDR, which is assumed to be
2511 : MEMREF offset by OFFSET bytes. If VALIDATE is
2512 : nonzero, the memory address is forced to be valid. */
2513 :
2514 : rtx
2515 53757 : adjust_automodify_address_1 (rtx memref, machine_mode mode, rtx addr,
2516 : poly_int64 offset, int validate)
2517 : {
2518 53757 : memref = change_address_1 (memref, VOIDmode, addr, validate, false);
2519 53757 : return adjust_address_1 (memref, mode, offset, validate, 0, 0, 0);
2520 : }
2521 :
2522 : /* Return a memory reference like MEMREF, but whose address is changed by
2523 : adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2524 : known to be in OFFSET (possibly 1). */
2525 :
2526 : rtx
2527 961503 : offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2528 : {
2529 961503 : rtx new_rtx, addr = XEXP (memref, 0);
2530 961503 : machine_mode address_mode;
2531 961503 : class mem_attrs *defattrs;
2532 :
2533 961503 : mem_attrs attrs (*get_mem_attrs (memref));
2534 961503 : address_mode = get_address_mode (memref);
2535 961503 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2536 :
2537 : /* At this point we don't know _why_ the address is invalid. It
2538 : could have secondary memory references, multiplies or anything.
2539 :
2540 : However, if we did go and rearrange things, we can wind up not
2541 : being able to recognize the magic around pic_offset_table_rtx.
2542 : This stuff is fragile, and is yet another example of why it is
2543 : bad to expose PIC machinery too early. */
2544 1921266 : if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2545 961503 : attrs.addrspace)
2546 150541 : && GET_CODE (addr) == PLUS
2547 1060760 : && XEXP (addr, 0) == pic_offset_table_rtx)
2548 : {
2549 1740 : addr = force_reg (GET_MODE (addr), addr);
2550 1740 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2551 : }
2552 :
2553 961503 : update_temp_slot_address (XEXP (memref, 0), new_rtx);
2554 961503 : new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1, false);
2555 :
2556 : /* If there are no changes, just return the original memory reference. */
2557 961503 : if (new_rtx == memref)
2558 : return new_rtx;
2559 :
2560 : /* Update the alignment to reflect the offset. Reset the offset, which
2561 : we don't know. */
2562 961503 : defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2563 961503 : attrs.offset_known_p = false;
2564 961503 : attrs.size_known_p = defattrs->size_known_p;
2565 961503 : attrs.size = defattrs->size;
2566 961503 : attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2567 961503 : set_mem_attrs (new_rtx, &attrs);
2568 961503 : return new_rtx;
2569 : }
2570 :
2571 : /* Return a memory reference like MEMREF, but with its address changed to
2572 : ADDR. The caller is asserting that the actual piece of memory pointed
2573 : to is the same, just the form of the address is being changed, such as
2574 : by putting something into a register. INPLACE is true if any changes
2575 : can be made directly to MEMREF or false if MEMREF must be treated as
2576 : immutable. */
2577 :
2578 : rtx
2579 12736504 : replace_equiv_address (rtx memref, rtx addr, bool inplace)
2580 : {
2581 : /* change_address_1 copies the memory attribute structure without change
2582 : and that's exactly what we want here. */
2583 12736504 : update_temp_slot_address (XEXP (memref, 0), addr);
2584 12736504 : return change_address_1 (memref, VOIDmode, addr, 1, inplace);
2585 : }
2586 :
2587 : /* Likewise, but the reference is not required to be valid. */
2588 :
2589 : rtx
2590 456958641 : replace_equiv_address_nv (rtx memref, rtx addr, bool inplace)
2591 : {
2592 456958641 : return change_address_1 (memref, VOIDmode, addr, 0, inplace);
2593 : }
2594 :
2595 :
2596 : /* Emit insns to reload VALUE into a new register. VALUE is an
2597 : auto-increment or auto-decrement RTX whose operand is a register or
2598 : memory location; so reloading involves incrementing that location.
2599 :
2600 : INC_AMOUNT is the number to increment or decrement by (always
2601 : positive and ignored for POST_MODIFY/PRE_MODIFY).
2602 :
2603 : Return a pseudo containing the result. */
2604 : rtx
2605 0 : address_reload_context::emit_autoinc (rtx value, poly_int64 inc_amount)
2606 : {
2607 : /* Since we're going to call recog, and might be called within recog,
2608 : we need to ensure we save and restore recog_data. */
2609 0 : recog_data_saver recog_save;
2610 :
2611 : /* REG or MEM to be copied and incremented. */
2612 0 : rtx incloc = XEXP (value, 0);
2613 :
2614 0 : const rtx_code code = GET_CODE (value);
2615 0 : const bool post_p
2616 0 : = code == POST_DEC || code == POST_INC || code == POST_MODIFY;
2617 :
2618 0 : bool plus_p = true;
2619 0 : rtx inc;
2620 0 : if (code == PRE_MODIFY || code == POST_MODIFY)
2621 : {
2622 0 : gcc_assert (GET_CODE (XEXP (value, 1)) == PLUS
2623 : || GET_CODE (XEXP (value, 1)) == MINUS);
2624 0 : gcc_assert (rtx_equal_p (XEXP (XEXP (value, 1), 0), XEXP (value, 0)));
2625 0 : plus_p = GET_CODE (XEXP (value, 1)) == PLUS;
2626 0 : inc = XEXP (XEXP (value, 1), 1);
2627 : }
2628 : else
2629 : {
2630 0 : if (code == PRE_DEC || code == POST_DEC)
2631 0 : inc_amount = -inc_amount;
2632 :
2633 0 : inc = gen_int_mode (inc_amount, GET_MODE (value));
2634 : }
2635 :
2636 0 : rtx result;
2637 0 : if (!post_p && REG_P (incloc))
2638 : result = incloc;
2639 : else
2640 : {
2641 0 : result = get_reload_reg ();
2642 : /* First copy the location to the result register. */
2643 0 : emit_insn (gen_move_insn (result, incloc));
2644 : }
2645 :
2646 : /* See if we can directly increment INCLOC. */
2647 0 : rtx_insn *last = get_last_insn ();
2648 0 : rtx_insn *add_insn = emit_insn (plus_p
2649 0 : ? gen_add2_insn (incloc, inc)
2650 0 : : gen_sub2_insn (incloc, inc));
2651 0 : const int icode = recog_memoized (add_insn);
2652 0 : if (icode >= 0)
2653 : {
2654 0 : if (!post_p && result != incloc)
2655 0 : emit_insn (gen_move_insn (result, incloc));
2656 0 : return result;
2657 : }
2658 0 : delete_insns_since (last);
2659 :
2660 : /* If couldn't do the increment directly, must increment in RESULT.
2661 : The way we do this depends on whether this is pre- or
2662 : post-increment. For pre-increment, copy INCLOC to the reload
2663 : register, increment it there, then save back. */
2664 0 : if (!post_p)
2665 : {
2666 0 : if (incloc != result)
2667 0 : emit_insn (gen_move_insn (result, incloc));
2668 0 : if (plus_p)
2669 0 : emit_insn (gen_add2_insn (result, inc));
2670 : else
2671 0 : emit_insn (gen_sub2_insn (result, inc));
2672 0 : if (incloc != result)
2673 0 : emit_insn (gen_move_insn (incloc, result));
2674 : }
2675 : else
2676 : {
2677 : /* Post-increment.
2678 :
2679 : Because this might be a jump insn or a compare, and because
2680 : RESULT may not be available after the insn in an input
2681 : reload, we must do the incrementing before the insn being
2682 : reloaded for.
2683 :
2684 : We have already copied INCLOC to RESULT. Increment the copy in
2685 : RESULT, save that back, then decrement RESULT so it has
2686 : the original value. */
2687 0 : if (plus_p)
2688 0 : emit_insn (gen_add2_insn (result, inc));
2689 : else
2690 0 : emit_insn (gen_sub2_insn (result, inc));
2691 0 : emit_insn (gen_move_insn (incloc, result));
2692 : /* Restore non-modified value for the result. We prefer this
2693 : way because it does not require an additional hard
2694 : register. */
2695 0 : if (plus_p)
2696 : {
2697 0 : poly_int64 offset;
2698 0 : if (poly_int_rtx_p (inc, &offset))
2699 0 : emit_insn (gen_add2_insn (result,
2700 : gen_int_mode (-offset,
2701 0 : GET_MODE (result))));
2702 : else
2703 0 : emit_insn (gen_sub2_insn (result, inc));
2704 : }
2705 : else
2706 0 : emit_insn (gen_add2_insn (result, inc));
2707 : }
2708 : return result;
2709 0 : }
2710 :
2711 : /* Return a memory reference like MEM, but with the address reloaded into a
2712 : pseudo register. */
2713 :
2714 : rtx
2715 0 : force_reload_address (rtx mem)
2716 : {
2717 0 : rtx addr = XEXP (mem, 0);
2718 0 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
2719 : {
2720 0 : const auto size = GET_MODE_SIZE (GET_MODE (mem));
2721 0 : addr = address_reload_context ().emit_autoinc (addr, size);
2722 : }
2723 : else
2724 0 : addr = force_reg (Pmode, addr);
2725 :
2726 0 : return replace_equiv_address (mem, addr);
2727 : }
2728 :
2729 : /* Return a memory reference like MEMREF, but with its mode widened to
2730 : MODE and offset by OFFSET. This would be used by targets that e.g.
2731 : cannot issue QImode memory operations and have to use SImode memory
2732 : operations plus masking logic. */
2733 :
2734 : rtx
2735 0 : widen_memory_access (rtx memref, machine_mode mode, poly_int64 offset)
2736 : {
2737 0 : rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1, 0, 0);
2738 0 : poly_uint64 size = GET_MODE_SIZE (mode);
2739 :
2740 : /* If there are no changes, just return the original memory reference. */
2741 0 : if (new_rtx == memref)
2742 : return new_rtx;
2743 :
2744 0 : mem_attrs attrs (*get_mem_attrs (new_rtx));
2745 :
2746 : /* If we don't know what offset we were at within the expression, then
2747 : we can't know if we've overstepped the bounds. */
2748 0 : if (! attrs.offset_known_p)
2749 0 : attrs.expr = NULL_TREE;
2750 :
2751 0 : while (attrs.expr)
2752 : {
2753 0 : if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2754 : {
2755 0 : tree field = TREE_OPERAND (attrs.expr, 1);
2756 0 : tree offset = component_ref_field_offset (attrs.expr);
2757 :
2758 0 : if (! DECL_SIZE_UNIT (field))
2759 : {
2760 0 : attrs.expr = NULL_TREE;
2761 0 : break;
2762 : }
2763 :
2764 : /* Is the field at least as large as the access? If so, ok,
2765 : otherwise strip back to the containing structure. */
2766 0 : if (poly_int_tree_p (DECL_SIZE_UNIT (field))
2767 0 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (field)), size)
2768 0 : && known_ge (attrs.offset, 0))
2769 : break;
2770 :
2771 0 : poly_uint64 suboffset;
2772 0 : if (!poly_int_tree_p (offset, &suboffset))
2773 : {
2774 0 : attrs.expr = NULL_TREE;
2775 0 : break;
2776 : }
2777 :
2778 0 : attrs.expr = TREE_OPERAND (attrs.expr, 0);
2779 0 : attrs.offset += suboffset;
2780 0 : attrs.offset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
2781 0 : / BITS_PER_UNIT);
2782 : }
2783 : /* Similarly for the decl. */
2784 0 : else if (DECL_P (attrs.expr)
2785 0 : && DECL_SIZE_UNIT (attrs.expr)
2786 0 : && poly_int_tree_p (DECL_SIZE_UNIT (attrs.expr))
2787 0 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (attrs.expr)),
2788 : size)
2789 0 : && known_ge (attrs.offset, 0))
2790 : break;
2791 : else
2792 : {
2793 : /* The widened memory access overflows the expression, which means
2794 : that it could alias another expression. Zap it. */
2795 0 : attrs.expr = NULL_TREE;
2796 0 : break;
2797 : }
2798 : }
2799 :
2800 0 : if (! attrs.expr)
2801 0 : attrs.offset_known_p = false;
2802 :
2803 : /* The widened memory may alias other stuff, so zap the alias set. */
2804 : /* ??? Maybe use get_alias_set on any remaining expression. */
2805 0 : attrs.alias = 0;
2806 0 : attrs.size_known_p = true;
2807 0 : attrs.size = size;
2808 0 : set_mem_attrs (new_rtx, &attrs);
2809 0 : return new_rtx;
2810 : }
2811 :
2812 : /* A fake decl that is used as the MEM_EXPR of spill slots. */
2813 : static GTY(()) tree spill_slot_decl;
2814 :
2815 : tree
2816 813268479 : get_spill_slot_decl (bool force_build_p)
2817 : {
2818 813268479 : tree d = spill_slot_decl;
2819 813268479 : rtx rd;
2820 :
2821 813268479 : if (d || !force_build_p)
2822 : return d;
2823 :
2824 30402 : d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2825 : VAR_DECL, get_identifier ("%sfp"), void_type_node);
2826 30402 : DECL_ARTIFICIAL (d) = 1;
2827 30402 : DECL_IGNORED_P (d) = 1;
2828 30402 : TREE_USED (d) = 1;
2829 30402 : spill_slot_decl = d;
2830 :
2831 30402 : rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2832 30402 : MEM_NOTRAP_P (rd) = 1;
2833 30402 : mem_attrs attrs (*mode_mem_attrs[(int) BLKmode]);
2834 30402 : attrs.alias = new_alias_set ();
2835 30402 : attrs.expr = d;
2836 30402 : set_mem_attrs (rd, &attrs);
2837 30402 : SET_DECL_RTL (d, rd);
2838 :
2839 30402 : return d;
2840 : }
2841 :
2842 : /* Given MEM, a result from assign_stack_local, fill in the memory
2843 : attributes as appropriate for a register allocator spill slot.
2844 : These slots are not aliasable by other memory. We arrange for
2845 : them all to use a single MEM_EXPR, so that the aliasing code can
2846 : work properly in the case of shared spill slots. */
2847 :
2848 : void
2849 1408878 : set_mem_attrs_for_spill (rtx mem)
2850 : {
2851 1408878 : rtx addr;
2852 :
2853 1408878 : mem_attrs attrs (*get_mem_attrs (mem));
2854 1408878 : attrs.expr = get_spill_slot_decl (true);
2855 1408878 : attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2856 1408878 : attrs.addrspace = ADDR_SPACE_GENERIC;
2857 :
2858 : /* We expect the incoming memory to be of the form:
2859 : (mem:MODE (plus (reg sfp) (const_int offset)))
2860 : with perhaps the plus missing for offset = 0. */
2861 1408878 : addr = XEXP (mem, 0);
2862 1408878 : attrs.offset_known_p = true;
2863 1408878 : strip_offset (addr, &attrs.offset);
2864 :
2865 1408878 : set_mem_attrs (mem, &attrs);
2866 1408878 : MEM_NOTRAP_P (mem) = 1;
2867 1408878 : }
2868 :
2869 : /* Return a newly created CODE_LABEL rtx with a unique label number. */
2870 :
2871 : rtx_code_label *
2872 15263506 : gen_label_rtx (void)
2873 : {
2874 15263506 : return as_a <rtx_code_label *> (
2875 : gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
2876 15263506 : NULL, label_num++, NULL));
2877 : }
2878 :
2879 : /* For procedure integration. */
2880 :
2881 : /* Install new pointers to the first and last insns in the chain.
2882 : Also, set cur_insn_uid to one higher than the last in use.
2883 : Used for an inline-procedure after copying the insn chain. */
2884 :
2885 : void
2886 8 : set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
2887 : {
2888 8 : rtx_insn *insn;
2889 :
2890 8 : set_first_insn (first);
2891 8 : set_last_insn (last);
2892 8 : cur_insn_uid = 0;
2893 :
2894 8 : if (param_min_nondebug_insn_uid || MAY_HAVE_DEBUG_INSNS)
2895 : {
2896 0 : int debug_count = 0;
2897 :
2898 0 : cur_insn_uid = param_min_nondebug_insn_uid - 1;
2899 0 : cur_debug_insn_uid = 0;
2900 :
2901 0 : for (insn = first; insn; insn = NEXT_INSN (insn))
2902 0 : if (INSN_UID (insn) < param_min_nondebug_insn_uid)
2903 0 : cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2904 : else
2905 : {
2906 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2907 0 : if (DEBUG_INSN_P (insn))
2908 0 : debug_count++;
2909 : }
2910 :
2911 0 : if (debug_count)
2912 0 : cur_debug_insn_uid = param_min_nondebug_insn_uid + debug_count;
2913 : else
2914 0 : cur_debug_insn_uid++;
2915 : }
2916 : else
2917 8 : for (insn = first; insn; insn = NEXT_INSN (insn))
2918 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2919 :
2920 8 : cur_insn_uid++;
2921 8 : }
2922 :
2923 : /* Go through all the RTL insn bodies and copy any invalid shared
2924 : structure. This routine should only be called once. */
2925 :
2926 : static void
2927 2963744 : unshare_all_rtl_1 (rtx_insn *insn)
2928 : {
2929 : /* Unshare just about everything else. */
2930 2963744 : unshare_all_rtl_in_chain (insn);
2931 :
2932 : /* Make sure the addresses of stack slots found outside the insn chain
2933 : (such as, in DECL_RTL of a variable) are not shared
2934 : with the insn chain.
2935 :
2936 : This special care is necessary when the stack slot MEM does not
2937 : actually appear in the insn chain. If it does appear, its address
2938 : is unshared from all else at that point. */
2939 2963744 : unsigned int i;
2940 2963744 : rtx temp;
2941 9154382 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2942 3226894 : (*stack_slot_list)[i] = copy_rtx_if_shared (temp);
2943 2963744 : }
2944 :
2945 : /* Go through all the RTL insn bodies and copy any invalid shared
2946 : structure, again. This is a fairly expensive thing to do so it
2947 : should be done sparingly. */
2948 :
2949 : void
2950 1481483 : unshare_all_rtl_again (rtx_insn *insn)
2951 : {
2952 1481483 : rtx_insn *p;
2953 1481483 : tree decl;
2954 :
2955 167856119 : for (p = insn; p; p = NEXT_INSN (p))
2956 166374636 : if (INSN_P (p))
2957 : {
2958 131401793 : reset_used_flags (PATTERN (p));
2959 131401793 : reset_used_flags (REG_NOTES (p));
2960 131401793 : if (CALL_P (p))
2961 5991884 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2962 : }
2963 :
2964 : /* Make sure that virtual stack slots are not shared. */
2965 1481483 : set_used_decls (DECL_INITIAL (cfun->decl));
2966 :
2967 : /* Make sure that virtual parameters are not shared. */
2968 4597219 : for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2969 3115736 : set_used_flags (DECL_RTL (decl));
2970 :
2971 : rtx temp;
2972 : unsigned int i;
2973 3871370 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2974 2389887 : reset_used_flags (temp);
2975 :
2976 1481483 : unshare_all_rtl_1 (insn);
2977 1481483 : }
2978 :
2979 : void
2980 1482261 : unshare_all_rtl (void)
2981 : {
2982 1482261 : unshare_all_rtl_1 (get_insns ());
2983 :
2984 4598556 : for (tree decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2985 : {
2986 3116295 : if (DECL_RTL_SET_P (decl))
2987 3116295 : SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2988 3116295 : DECL_INCOMING_RTL (decl) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl));
2989 : }
2990 1482261 : }
2991 :
2992 :
2993 : /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2994 : Recursively does the same for subexpressions. */
2995 :
2996 : static void
2997 55571229858 : verify_rtx_sharing (rtx orig, rtx insn)
2998 : {
2999 55571229858 : rtx x = orig;
3000 55571229858 : int i;
3001 55571229858 : enum rtx_code code;
3002 55571229858 : const char *format_ptr;
3003 :
3004 55571229858 : if (x == 0)
3005 : return;
3006 :
3007 46099784920 : code = GET_CODE (x);
3008 :
3009 : /* These types may be freely shared. */
3010 :
3011 46099784920 : switch (code)
3012 : {
3013 : case REG:
3014 : case DEBUG_EXPR:
3015 : case VALUE:
3016 : CASE_CONST_ANY:
3017 : case SYMBOL_REF:
3018 : case LABEL_REF:
3019 : case CODE_LABEL:
3020 : case PC:
3021 : case RETURN:
3022 : case SIMPLE_RETURN:
3023 : case SCRATCH:
3024 : /* SCRATCH must be shared because they represent distinct values. */
3025 : return;
3026 1989699777 : case CLOBBER:
3027 : /* Share clobbers of hard registers, but do not share pseudo reg
3028 : clobbers or clobbers of hard registers that originated as pseudos.
3029 : This is needed to allow safe register renaming. */
3030 1989699777 : if (REG_P (XEXP (x, 0))
3031 766036501 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3032 2752725743 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3033 : return;
3034 : break;
3035 :
3036 38398937 : case CONST:
3037 38398937 : if (shared_const_p (orig))
3038 : return;
3039 : break;
3040 :
3041 2758932751 : case MEM:
3042 : /* A MEM is allowed to be shared if its address is constant. */
3043 2758932751 : if (CONSTANT_ADDRESS_P (XEXP (x, 0))
3044 2758932751 : || reload_completed || reload_in_progress)
3045 : return;
3046 :
3047 : break;
3048 :
3049 : default:
3050 : break;
3051 : }
3052 :
3053 : /* This rtx may not be shared. If it has already been seen,
3054 : replace it with a copy of itself. */
3055 22339036883 : if (flag_checking && RTX_FLAG (x, used))
3056 : {
3057 0 : error ("invalid rtl sharing found in the insn");
3058 0 : debug_rtx (insn);
3059 0 : error ("shared rtx");
3060 0 : debug_rtx (x);
3061 0 : internal_error ("internal consistency failure");
3062 : }
3063 22339036883 : gcc_assert (!RTX_FLAG (x, used));
3064 :
3065 22339036883 : RTX_FLAG (x, used) = 1;
3066 :
3067 : /* Now scan the subexpressions recursively. */
3068 :
3069 22339036883 : format_ptr = GET_RTX_FORMAT (code);
3070 :
3071 62749912267 : for (i = 0; i < GET_RTX_LENGTH (code); i++)
3072 : {
3073 40410875384 : switch (*format_ptr++)
3074 : {
3075 35324499927 : case 'e':
3076 35324499927 : verify_rtx_sharing (XEXP (x, i), insn);
3077 35324499927 : break;
3078 :
3079 899077255 : case 'E':
3080 899077255 : if (XVEC (x, i) != NULL)
3081 : {
3082 899077255 : int j;
3083 899077255 : int len = XVECLEN (x, i);
3084 :
3085 2710061626 : for (j = 0; j < len; j++)
3086 : {
3087 : /* We allow sharing of ASM_OPERANDS inside single
3088 : instruction. */
3089 1810984371 : if (j && GET_CODE (XVECEXP (x, i, j)) == SET
3090 54261381 : && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
3091 : == ASM_OPERANDS))
3092 3111819 : verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
3093 : else
3094 1807872552 : verify_rtx_sharing (XVECEXP (x, i, j), insn);
3095 : }
3096 : }
3097 : break;
3098 : }
3099 : }
3100 : }
3101 :
3102 : /* Reset used-flags for INSN. */
3103 :
3104 : static void
3105 18025827764 : reset_insn_used_flags (rtx insn)
3106 : {
3107 18025827764 : gcc_assert (INSN_P (insn));
3108 18025827764 : reset_used_flags (PATTERN (insn));
3109 18025827764 : reset_used_flags (REG_NOTES (insn));
3110 18025827764 : if (CALL_P (insn))
3111 819835592 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn));
3112 18025827764 : }
3113 :
3114 : /* Go through all the RTL insn bodies and clear all the USED bits. */
3115 :
3116 : static void
3117 188669878 : reset_all_used_flags (void)
3118 : {
3119 188669878 : rtx_insn *p;
3120 :
3121 24357491748 : for (p = get_insns (); p; p = NEXT_INSN (p))
3122 24168821870 : if (INSN_P (p))
3123 : {
3124 18025827764 : rtx pat = PATTERN (p);
3125 18025827764 : if (GET_CODE (pat) != SEQUENCE)
3126 18025827764 : reset_insn_used_flags (p);
3127 : else
3128 : {
3129 0 : gcc_assert (REG_NOTES (p) == NULL);
3130 0 : for (int i = 0; i < XVECLEN (pat, 0); i++)
3131 : {
3132 0 : rtx insn = XVECEXP (pat, 0, i);
3133 0 : if (INSN_P (insn))
3134 0 : reset_insn_used_flags (insn);
3135 : }
3136 : }
3137 : }
3138 188669878 : }
3139 :
3140 : /* Verify sharing in INSN. */
3141 :
3142 : static void
3143 9012913882 : verify_insn_sharing (rtx insn)
3144 : {
3145 9012913882 : gcc_assert (INSN_P (insn));
3146 9012913882 : verify_rtx_sharing (PATTERN (insn), insn);
3147 9012913882 : verify_rtx_sharing (REG_NOTES (insn), insn);
3148 9012913882 : if (CALL_P (insn))
3149 409917796 : verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn), insn);
3150 9012913882 : }
3151 :
3152 : /* Go through all the RTL insn bodies and check that there is no unexpected
3153 : sharing in between the subexpressions. */
3154 :
3155 : DEBUG_FUNCTION void
3156 94334939 : verify_rtl_sharing (void)
3157 : {
3158 94334939 : rtx_insn *p;
3159 :
3160 94334939 : timevar_push (TV_VERIFY_RTL_SHARING);
3161 :
3162 94334939 : reset_all_used_flags ();
3163 :
3164 12178745874 : for (p = get_insns (); p; p = NEXT_INSN (p))
3165 12084410935 : if (INSN_P (p))
3166 : {
3167 9012913882 : rtx pat = PATTERN (p);
3168 9012913882 : if (GET_CODE (pat) != SEQUENCE)
3169 9012913882 : verify_insn_sharing (p);
3170 : else
3171 0 : for (int i = 0; i < XVECLEN (pat, 0); i++)
3172 : {
3173 0 : rtx insn = XVECEXP (pat, 0, i);
3174 0 : if (INSN_P (insn))
3175 0 : verify_insn_sharing (insn);
3176 : }
3177 : }
3178 :
3179 94334939 : reset_all_used_flags ();
3180 :
3181 94334939 : timevar_pop (TV_VERIFY_RTL_SHARING);
3182 94334939 : }
3183 :
3184 : /* Go through all the RTL insn bodies and copy any invalid shared structure.
3185 : Assumes the mark bits are cleared at entry. */
3186 :
3187 : void
3188 9421066 : unshare_all_rtl_in_chain (rtx_insn *insn)
3189 : {
3190 357696848 : for (; insn; insn = NEXT_INSN (insn))
3191 348275782 : if (INSN_P (insn))
3192 : {
3193 284329820 : PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
3194 284329820 : REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
3195 284329820 : if (CALL_P (insn))
3196 11975481 : CALL_INSN_FUNCTION_USAGE (insn)
3197 11975481 : = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
3198 : }
3199 9421066 : }
3200 :
3201 : /* Go through all virtual stack slots of a function and mark them as
3202 : shared. We never replace the DECL_RTLs themselves with a copy,
3203 : but expressions mentioned into a DECL_RTL cannot be shared with
3204 : expressions in the instruction stream.
3205 :
3206 : Note that reload may convert pseudo registers into memories in-place.
3207 : Pseudo registers are always shared, but MEMs never are. Thus if we
3208 : reset the used flags on MEMs in the instruction stream, we must set
3209 : them again on MEMs that appear in DECL_RTLs. */
3210 :
3211 : static void
3212 16379202 : set_used_decls (tree blk)
3213 : {
3214 16379202 : tree t;
3215 :
3216 : /* Mark decls. */
3217 35471794 : for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
3218 19092592 : if (DECL_RTL_SET_P (t))
3219 2276923 : set_used_flags (DECL_RTL (t));
3220 :
3221 : /* Now process sub-blocks. */
3222 31276921 : for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
3223 14897719 : set_used_decls (t);
3224 16379202 : }
3225 :
3226 : /* Mark ORIG as in use, and return a copy of it if it was already in use.
3227 : Recursively does the same for subexpressions. Uses
3228 : copy_rtx_if_shared_1 to reduce stack space. */
3229 :
3230 : rtx
3231 617457019 : copy_rtx_if_shared (rtx orig)
3232 : {
3233 617457019 : copy_rtx_if_shared_1 (&orig);
3234 617457019 : return orig;
3235 : }
3236 :
3237 : /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
3238 : use. Recursively does the same for subexpressions. */
3239 :
3240 : static void
3241 1084390862 : copy_rtx_if_shared_1 (rtx *orig1)
3242 : {
3243 1084390862 : rtx x;
3244 1084390862 : int i;
3245 1084390862 : enum rtx_code code;
3246 1084390862 : rtx *last_ptr;
3247 1084390862 : const char *format_ptr;
3248 1084390862 : int copied = 0;
3249 1792706658 : int length;
3250 :
3251 : /* Repeat is used to turn tail-recursion into iteration. */
3252 1792706658 : repeat:
3253 1792706658 : x = *orig1;
3254 :
3255 1792706658 : if (x == 0)
3256 : return;
3257 :
3258 1475961316 : code = GET_CODE (x);
3259 :
3260 : /* These types may be freely shared. */
3261 :
3262 1475961316 : switch (code)
3263 : {
3264 : case REG:
3265 : case DEBUG_EXPR:
3266 : case VALUE:
3267 : CASE_CONST_ANY:
3268 : case SYMBOL_REF:
3269 : case LABEL_REF:
3270 : case CODE_LABEL:
3271 : case PC:
3272 : case RETURN:
3273 : case SIMPLE_RETURN:
3274 : case SCRATCH:
3275 : /* SCRATCH must be shared because they represent distinct values. */
3276 : return;
3277 61604333 : case CLOBBER:
3278 : /* Share clobbers of hard registers, but do not share pseudo reg
3279 : clobbers or clobbers of hard registers that originated as pseudos.
3280 : This is needed to allow safe register renaming. */
3281 61604333 : if (REG_P (XEXP (x, 0))
3282 27347113 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3283 88781230 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3284 : return;
3285 : break;
3286 :
3287 5678377 : case CONST:
3288 5678377 : if (shared_const_p (x))
3289 : return;
3290 : break;
3291 :
3292 : case DEBUG_INSN:
3293 : case INSN:
3294 : case JUMP_INSN:
3295 : case CALL_INSN:
3296 : case NOTE:
3297 : case BARRIER:
3298 : /* The chain of insns is not being copied. */
3299 : return;
3300 :
3301 : default:
3302 : break;
3303 : }
3304 :
3305 : /* This rtx may not be shared. If it has already been seen,
3306 : replace it with a copy of itself. */
3307 :
3308 734452955 : if (RTX_FLAG (x, used))
3309 : {
3310 4787941 : x = shallow_copy_rtx (x);
3311 4787941 : copied = 1;
3312 : }
3313 734452955 : RTX_FLAG (x, used) = 1;
3314 :
3315 : /* Now scan the subexpressions recursively.
3316 : We can store any replaced subexpressions directly into X
3317 : since we know X is not shared! Any vectors in X
3318 : must be copied if X was copied. */
3319 :
3320 734452955 : format_ptr = GET_RTX_FORMAT (code);
3321 734452955 : length = GET_RTX_LENGTH (code);
3322 734452955 : last_ptr = NULL;
3323 :
3324 2072481074 : for (i = 0; i < length; i++)
3325 : {
3326 1338028119 : switch (*format_ptr++)
3327 : {
3328 1113766772 : case 'e':
3329 1113766772 : if (last_ptr)
3330 436116848 : copy_rtx_if_shared_1 (last_ptr);
3331 1113766772 : last_ptr = &XEXP (x, i);
3332 1113766772 : break;
3333 :
3334 31403843 : case 'E':
3335 31403843 : if (XVEC (x, i) != NULL)
3336 : {
3337 31403843 : int j;
3338 31403843 : int len = XVECLEN (x, i);
3339 :
3340 : /* Copy the vector iff I copied the rtx and the length
3341 : is nonzero. */
3342 31403843 : if (copied && len > 0)
3343 1488 : XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
3344 :
3345 : /* Call recursively on all inside the vector. */
3346 92886710 : for (j = 0; j < len; j++)
3347 : {
3348 61482867 : if (last_ptr)
3349 30816995 : copy_rtx_if_shared_1 (last_ptr);
3350 61482867 : last_ptr = &XVECEXP (x, i, j);
3351 : }
3352 : }
3353 : break;
3354 : }
3355 : }
3356 734452955 : *orig1 = x;
3357 734452955 : if (last_ptr)
3358 : {
3359 708315796 : orig1 = last_ptr;
3360 708315796 : goto repeat;
3361 : }
3362 : }
3363 :
3364 : /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3365 :
3366 : static void
3367 78414240903 : mark_used_flags (rtx x, int flag)
3368 : {
3369 >12203*10^7 : int i, j;
3370 >12203*10^7 : enum rtx_code code;
3371 >12203*10^7 : const char *format_ptr;
3372 >12203*10^7 : int length;
3373 :
3374 : /* Repeat is used to turn tail-recursion into iteration. */
3375 >12203*10^7 : repeat:
3376 >12203*10^7 : if (x == 0)
3377 : return;
3378 :
3379 >10293*10^7 : code = GET_CODE (x);
3380 :
3381 : /* These types may be freely shared so we needn't do any resetting
3382 : for them. */
3383 :
3384 >10293*10^7 : switch (code)
3385 : {
3386 : case REG:
3387 : case DEBUG_EXPR:
3388 : case VALUE:
3389 : CASE_CONST_ANY:
3390 : case SYMBOL_REF:
3391 : case CODE_LABEL:
3392 : case PC:
3393 : case RETURN:
3394 : case SIMPLE_RETURN:
3395 : return;
3396 :
3397 : case DEBUG_INSN:
3398 : case INSN:
3399 : case JUMP_INSN:
3400 : case CALL_INSN:
3401 : case NOTE:
3402 : case LABEL_REF:
3403 : case BARRIER:
3404 : /* The chain of insns is not being copied. */
3405 : return;
3406 :
3407 53176870915 : default:
3408 53176870915 : break;
3409 : }
3410 :
3411 53176870915 : RTX_FLAG (x, used) = flag;
3412 :
3413 53176870915 : format_ptr = GET_RTX_FORMAT (code);
3414 53176870915 : length = GET_RTX_LENGTH (code);
3415 :
3416 >10494*10^7 : for (i = 0; i < length; i++)
3417 : {
3418 95395700292 : switch (*format_ptr++)
3419 : {
3420 81171633521 : case 'e':
3421 81171633521 : if (i == length-1)
3422 : {
3423 43624015553 : x = XEXP (x, i);
3424 43624015553 : goto repeat;
3425 : }
3426 37547617968 : mark_used_flags (XEXP (x, i), flag);
3427 37547617968 : break;
3428 :
3429 : case 'E':
3430 5545562827 : for (j = 0; j < XVECLEN (x, i); j++)
3431 3692010029 : mark_used_flags (XVECEXP (x, i, j), flag);
3432 : break;
3433 : }
3434 : }
3435 : }
3436 :
3437 : /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3438 : to look for shared sub-parts. */
3439 :
3440 : void
3441 37167130731 : reset_used_flags (rtx x)
3442 : {
3443 37167130731 : mark_used_flags (x, 0);
3444 37167130731 : }
3445 :
3446 : /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3447 : to look for shared sub-parts. */
3448 :
3449 : void
3450 7482175 : set_used_flags (rtx x)
3451 : {
3452 7482175 : mark_used_flags (x, 1);
3453 7482175 : }
3454 :
3455 : /* Copy X if necessary so that it won't be altered by changes in OTHER.
3456 : Return X or the rtx for the pseudo reg the value of X was copied into.
3457 : OTHER must be valid as a SET_DEST. */
3458 :
3459 : rtx
3460 0 : make_safe_from (rtx x, rtx other)
3461 : {
3462 0 : while (1)
3463 0 : switch (GET_CODE (other))
3464 : {
3465 0 : case SUBREG:
3466 0 : other = SUBREG_REG (other);
3467 0 : break;
3468 0 : case STRICT_LOW_PART:
3469 0 : case SIGN_EXTEND:
3470 0 : case ZERO_EXTEND:
3471 0 : other = XEXP (other, 0);
3472 0 : break;
3473 0 : default:
3474 0 : goto done;
3475 : }
3476 0 : done:
3477 0 : if ((MEM_P (other)
3478 0 : && ! CONSTANT_P (x)
3479 0 : && !REG_P (x)
3480 0 : && GET_CODE (x) != SUBREG)
3481 0 : || (REG_P (other)
3482 0 : && (REGNO (other) < FIRST_PSEUDO_REGISTER
3483 0 : || reg_mentioned_p (other, x))))
3484 : {
3485 0 : rtx temp = gen_reg_rtx (GET_MODE (x));
3486 0 : emit_move_insn (temp, x);
3487 0 : return temp;
3488 : }
3489 : return x;
3490 : }
3491 :
3492 : /* Emission of insns (adding them to the doubly-linked list). */
3493 :
3494 : /* Return the last insn emitted, even if it is in a sequence now pushed. */
3495 :
3496 : rtx_insn *
3497 0 : get_last_insn_anywhere (void)
3498 : {
3499 0 : struct sequence_stack *seq;
3500 0 : for (seq = get_current_sequence (); seq; seq = seq->next)
3501 0 : if (seq->last != 0)
3502 : return seq->last;
3503 : return 0;
3504 : }
3505 :
3506 : /* Return the first nonnote insn emitted in current sequence or current
3507 : function. This routine looks inside SEQUENCEs. */
3508 :
3509 : rtx_insn *
3510 0 : get_first_nonnote_insn (void)
3511 : {
3512 0 : rtx_insn *insn = get_insns ();
3513 :
3514 0 : if (insn)
3515 : {
3516 0 : if (NOTE_P (insn))
3517 0 : for (insn = next_insn (insn);
3518 0 : insn && NOTE_P (insn);
3519 0 : insn = next_insn (insn))
3520 0 : continue;
3521 : else
3522 : {
3523 0 : if (NONJUMP_INSN_P (insn)
3524 0 : && GET_CODE (PATTERN (insn)) == SEQUENCE)
3525 0 : insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3526 : }
3527 : }
3528 :
3529 0 : return insn;
3530 : }
3531 :
3532 : /* Return the last nonnote insn emitted in current sequence or current
3533 : function. This routine looks inside SEQUENCEs. */
3534 :
3535 : rtx_insn *
3536 0 : get_last_nonnote_insn (void)
3537 : {
3538 0 : rtx_insn *insn = get_last_insn ();
3539 :
3540 0 : if (insn)
3541 : {
3542 0 : if (NOTE_P (insn))
3543 0 : for (insn = previous_insn (insn);
3544 0 : insn && NOTE_P (insn);
3545 0 : insn = previous_insn (insn))
3546 0 : continue;
3547 : else
3548 : {
3549 0 : if (NONJUMP_INSN_P (insn))
3550 0 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3551 0 : insn = seq->insn (seq->len () - 1);
3552 : }
3553 : }
3554 :
3555 0 : return insn;
3556 : }
3557 :
3558 : /* Return the number of actual (non-debug) insns emitted in this
3559 : function. */
3560 :
3561 : int
3562 2022525 : get_max_insn_count (void)
3563 : {
3564 2022525 : int n = cur_insn_uid;
3565 :
3566 : /* The table size must be stable across -g, to avoid codegen
3567 : differences due to debug insns, and not be affected by
3568 : -fmin-insn-uid, to avoid excessive table size and to simplify
3569 : debugging of -fcompare-debug failures. */
3570 2022525 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
3571 2022525 : n -= cur_debug_insn_uid;
3572 : else
3573 0 : n -= param_min_nondebug_insn_uid;
3574 :
3575 2022525 : return n;
3576 : }
3577 :
3578 :
3579 : /* Return the next insn. If it is a SEQUENCE, return the first insn
3580 : of the sequence. */
3581 :
3582 : rtx_insn *
3583 127485414 : next_insn (rtx_insn *insn)
3584 : {
3585 127485414 : if (insn)
3586 : {
3587 127485414 : insn = NEXT_INSN (insn);
3588 127180361 : if (insn && NONJUMP_INSN_P (insn)
3589 141655065 : && GET_CODE (PATTERN (insn)) == SEQUENCE)
3590 0 : insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3591 : }
3592 :
3593 127485414 : return insn;
3594 : }
3595 :
3596 : /* Return the previous insn. If it is a SEQUENCE, return the last insn
3597 : of the sequence. */
3598 :
3599 : rtx_insn *
3600 71235 : previous_insn (rtx_insn *insn)
3601 : {
3602 71235 : if (insn)
3603 : {
3604 71235 : insn = PREV_INSN (insn);
3605 71235 : if (insn && NONJUMP_INSN_P (insn))
3606 8465 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3607 0 : insn = seq->insn (seq->len () - 1);
3608 : }
3609 :
3610 71235 : return insn;
3611 : }
3612 :
3613 : /* Return the next insn after INSN that is not a NOTE. This routine does not
3614 : look inside SEQUENCEs. */
3615 :
3616 : rtx_insn *
3617 549241 : next_nonnote_insn (rtx_insn *insn)
3618 : {
3619 572939 : while (insn)
3620 : {
3621 572939 : insn = NEXT_INSN (insn);
3622 572939 : if (insn == 0 || !NOTE_P (insn))
3623 : break;
3624 : }
3625 :
3626 549241 : return insn;
3627 : }
3628 :
3629 : /* Return the next insn after INSN that is not a DEBUG_INSN. This
3630 : routine does not look inside SEQUENCEs. */
3631 :
3632 : rtx_insn *
3633 5983001 : next_nondebug_insn (rtx_insn *insn)
3634 : {
3635 8133612 : while (insn)
3636 : {
3637 8133612 : insn = NEXT_INSN (insn);
3638 8133612 : if (insn == 0 || !DEBUG_INSN_P (insn))
3639 : break;
3640 : }
3641 :
3642 5983001 : return insn;
3643 : }
3644 :
3645 : /* Return the previous insn before INSN that is not a NOTE. This routine does
3646 : not look inside SEQUENCEs. */
3647 :
3648 : rtx_insn *
3649 90610156 : prev_nonnote_insn (rtx_insn *insn)
3650 : {
3651 95483070 : while (insn)
3652 : {
3653 95483070 : insn = PREV_INSN (insn);
3654 95483070 : if (insn == 0 || !NOTE_P (insn))
3655 : break;
3656 : }
3657 :
3658 90610156 : return insn;
3659 : }
3660 :
3661 : /* Return the previous insn before INSN that is not a DEBUG_INSN.
3662 : This routine does not look inside SEQUENCEs. */
3663 :
3664 : rtx_insn *
3665 1991133 : prev_nondebug_insn (rtx_insn *insn)
3666 : {
3667 4220773 : while (insn)
3668 : {
3669 4220773 : insn = PREV_INSN (insn);
3670 4220773 : if (insn == 0 || !DEBUG_INSN_P (insn))
3671 : break;
3672 : }
3673 :
3674 1991133 : return insn;
3675 : }
3676 :
3677 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3678 : This routine does not look inside SEQUENCEs. */
3679 :
3680 : rtx_insn *
3681 51158211 : next_nonnote_nondebug_insn (rtx_insn *insn)
3682 : {
3683 69310968 : while (insn)
3684 : {
3685 69310968 : insn = NEXT_INSN (insn);
3686 69310968 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3687 : break;
3688 : }
3689 :
3690 51158211 : return insn;
3691 : }
3692 :
3693 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN,
3694 : but stop the search before we enter another basic block. This
3695 : routine does not look inside SEQUENCEs.
3696 : NOTE: This can potentially bleed into next BB. If current insn is
3697 : last insn of BB, followed by a code_label before the start of
3698 : the next BB, code_label will be returned. But this is the
3699 : behavior rest of gcc assumes/relies on e.g. get_last_bb_insn. */
3700 :
3701 : rtx_insn *
3702 7254810 : next_nonnote_nondebug_insn_bb (rtx_insn *insn)
3703 : {
3704 7285958 : while (insn)
3705 : {
3706 7285958 : insn = NEXT_INSN (insn);
3707 7285958 : if (insn == 0)
3708 : break;
3709 7059363 : if (DEBUG_INSN_P (insn))
3710 0 : continue;
3711 7059363 : if (!NOTE_P (insn))
3712 : break;
3713 2072466 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3714 : return NULL;
3715 : }
3716 :
3717 : return insn;
3718 : }
3719 :
3720 : /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3721 : This routine does not look inside SEQUENCEs. */
3722 :
3723 : rtx_insn *
3724 120737624 : prev_nonnote_nondebug_insn (rtx_insn *insn)
3725 : {
3726 224711335 : while (insn)
3727 : {
3728 224711335 : insn = PREV_INSN (insn);
3729 224711335 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3730 : break;
3731 : }
3732 :
3733 120737624 : return insn;
3734 : }
3735 :
3736 : /* Return the previous insn before INSN that is not a NOTE nor
3737 : DEBUG_INSN, but stop the search before we enter another basic
3738 : block. This routine does not look inside SEQUENCEs. */
3739 :
3740 : rtx_insn *
3741 69247058 : prev_nonnote_nondebug_insn_bb (rtx_insn *insn)
3742 : {
3743 134686882 : while (insn)
3744 : {
3745 134686882 : insn = PREV_INSN (insn);
3746 134686882 : if (insn == 0)
3747 : break;
3748 134686293 : if (DEBUG_INSN_P (insn))
3749 56020943 : continue;
3750 78665350 : if (!NOTE_P (insn))
3751 : break;
3752 21131899 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3753 : return NULL;
3754 : }
3755 :
3756 : return insn;
3757 : }
3758 :
3759 : /* Return the next INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN after INSN;
3760 : or 0, if there is none. This routine does not look inside
3761 : SEQUENCEs. */
3762 :
3763 : rtx_insn *
3764 4060481 : next_real_insn (rtx_insn *insn)
3765 : {
3766 4120838 : while (insn)
3767 : {
3768 4120838 : insn = NEXT_INSN (insn);
3769 4120838 : if (insn == 0 || INSN_P (insn))
3770 : break;
3771 : }
3772 :
3773 4060481 : return insn;
3774 : }
3775 :
3776 : /* Return the last INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN before INSN;
3777 : or 0, if there is none. This routine does not look inside
3778 : SEQUENCEs. */
3779 :
3780 : rtx_insn *
3781 979076 : prev_real_insn (rtx_insn *insn)
3782 : {
3783 2891664 : while (insn)
3784 : {
3785 2891664 : insn = PREV_INSN (insn);
3786 2891664 : if (insn == 0 || INSN_P (insn))
3787 : break;
3788 : }
3789 :
3790 979076 : return insn;
3791 : }
3792 :
3793 : /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3794 : or 0, if there is none. This routine does not look inside
3795 : SEQUENCEs. */
3796 :
3797 : rtx_insn *
3798 0 : next_real_nondebug_insn (rtx uncast_insn)
3799 : {
3800 0 : rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
3801 :
3802 0 : while (insn)
3803 : {
3804 0 : insn = NEXT_INSN (insn);
3805 0 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3806 : break;
3807 : }
3808 :
3809 0 : return insn;
3810 : }
3811 :
3812 : /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3813 : or 0, if there is none. This routine does not look inside
3814 : SEQUENCEs. */
3815 :
3816 : rtx_insn *
3817 4965107 : prev_real_nondebug_insn (rtx_insn *insn)
3818 : {
3819 15243277 : while (insn)
3820 : {
3821 15243277 : insn = PREV_INSN (insn);
3822 15243277 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3823 : break;
3824 : }
3825 :
3826 4965107 : return insn;
3827 : }
3828 :
3829 : /* Return the last CALL_INSN in the current list, or 0 if there is none.
3830 : This routine does not look inside SEQUENCEs. */
3831 :
3832 : rtx_call_insn *
3833 11961363 : last_call_insn (void)
3834 : {
3835 11961363 : rtx_insn *insn;
3836 :
3837 12087856 : for (insn = get_last_insn ();
3838 12087856 : insn && !CALL_P (insn);
3839 126493 : insn = PREV_INSN (insn))
3840 : ;
3841 :
3842 11961363 : return safe_as_a <rtx_call_insn *> (insn);
3843 : }
3844 :
3845 : bool
3846 1132832247 : active_insn_p (const rtx_insn *insn)
3847 : {
3848 1132832247 : return (CALL_P (insn) || JUMP_P (insn)
3849 1132832247 : || JUMP_TABLE_DATA_P (insn) /* FIXME */
3850 1132832247 : || (NONJUMP_INSN_P (insn)
3851 677496692 : && (! reload_completed
3852 481541778 : || (GET_CODE (PATTERN (insn)) != USE
3853 479951646 : && GET_CODE (PATTERN (insn)) != CLOBBER))));
3854 : }
3855 :
3856 : /* Find the next insn after INSN that really does something. This routine
3857 : does not look inside SEQUENCEs. After reload this also skips over
3858 : standalone USE and CLOBBER insn. */
3859 :
3860 : rtx_insn *
3861 111824184 : next_active_insn (rtx_insn *insn)
3862 : {
3863 249437790 : while (insn)
3864 : {
3865 249437790 : insn = NEXT_INSN (insn);
3866 361261974 : if (insn == 0 || active_insn_p (insn))
3867 : break;
3868 : }
3869 :
3870 111824184 : return insn;
3871 : }
3872 :
3873 : /* Find the last insn before INSN that really does something. This routine
3874 : does not look inside SEQUENCEs. After reload this also skips over
3875 : standalone USE and CLOBBER insn. */
3876 :
3877 : rtx_insn *
3878 45109 : prev_active_insn (rtx_insn *insn)
3879 : {
3880 134455 : while (insn)
3881 : {
3882 134455 : insn = PREV_INSN (insn);
3883 179564 : if (insn == 0 || active_insn_p (insn))
3884 : break;
3885 : }
3886 :
3887 45109 : return insn;
3888 : }
3889 :
3890 : /* Find a RTX_AUTOINC class rtx which matches DATA. */
3891 :
3892 : static int
3893 0 : find_auto_inc (const_rtx x, const_rtx reg)
3894 : {
3895 0 : subrtx_iterator::array_type array;
3896 0 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
3897 : {
3898 0 : const_rtx x = *iter;
3899 0 : if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC
3900 0 : && rtx_equal_p (reg, XEXP (x, 0)))
3901 0 : return true;
3902 : }
3903 0 : return false;
3904 0 : }
3905 :
3906 : /* Increment the label uses for all labels present in rtx. */
3907 :
3908 : static void
3909 55650339 : mark_label_nuses (rtx x)
3910 : {
3911 55650339 : enum rtx_code code;
3912 55650339 : int i, j;
3913 55650339 : const char *fmt;
3914 :
3915 55650339 : code = GET_CODE (x);
3916 55650344 : if (code == LABEL_REF && LABEL_P (label_ref_label (x)))
3917 1 : LABEL_NUSES (label_ref_label (x))++;
3918 :
3919 55650339 : fmt = GET_RTX_FORMAT (code);
3920 137435306 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3921 : {
3922 81784967 : if (fmt[i] == 'e')
3923 43809827 : mark_label_nuses (XEXP (x, i));
3924 37975140 : else if (fmt[i] == 'E')
3925 3736732 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3926 2586735 : mark_label_nuses (XVECEXP (x, i, j));
3927 : }
3928 55650339 : }
3929 :
3930 :
3931 : /* Try splitting insns that can be split for better scheduling.
3932 : PAT is the pattern which might split.
3933 : TRIAL is the insn providing PAT.
3934 : LAST is nonzero if we should return the last insn of the sequence produced.
3935 :
3936 : If this routine succeeds in splitting, it returns the first or last
3937 : replacement insn depending on the value of LAST. Otherwise, it
3938 : returns TRIAL. If the insn to be returned can be split, it will be. */
3939 :
3940 : rtx_insn *
3941 387713667 : try_split (rtx pat, rtx_insn *trial, int last)
3942 : {
3943 387713667 : rtx_insn *before, *after;
3944 387713667 : rtx note;
3945 387713667 : rtx_insn *seq, *tem;
3946 387713667 : profile_probability probability;
3947 387713667 : rtx_insn *insn_last, *insn;
3948 387713667 : int njumps = 0;
3949 387713667 : rtx_insn *call_insn = NULL;
3950 :
3951 387713667 : if (any_condjump_p (trial)
3952 387713667 : && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3953 14698874 : split_branch_probability
3954 14698874 : = profile_probability::from_reg_br_prob_note (XINT (note, 0));
3955 : else
3956 373014793 : split_branch_probability = profile_probability::uninitialized ();
3957 :
3958 387713667 : probability = split_branch_probability;
3959 :
3960 387713667 : seq = split_insns (pat, trial);
3961 :
3962 387713667 : split_branch_probability = profile_probability::uninitialized ();
3963 :
3964 387713667 : if (!seq)
3965 : return trial;
3966 :
3967 : int split_insn_count = 0;
3968 : /* Avoid infinite loop if any insn of the result matches
3969 : the original pattern. */
3970 : insn_last = seq;
3971 9269493 : while (1)
3972 : {
3973 9269493 : if (INSN_P (insn_last)
3974 9269493 : && rtx_equal_p (PATTERN (insn_last), pat))
3975 : return trial;
3976 9268012 : split_insn_count++;
3977 9268012 : if (!NEXT_INSN (insn_last))
3978 : break;
3979 : insn_last = NEXT_INSN (insn_last);
3980 : }
3981 :
3982 : /* We're not good at redistributing frame information if
3983 : the split occurs before reload or if it results in more
3984 : than one insn. */
3985 6166875 : if (RTX_FRAME_RELATED_P (trial))
3986 : {
3987 24 : if (!reload_completed || split_insn_count != 1)
3988 : return trial;
3989 :
3990 24 : rtx_insn *new_insn = seq;
3991 24 : rtx_insn *old_insn = trial;
3992 24 : copy_frame_info_to_split_insn (old_insn, new_insn);
3993 : }
3994 :
3995 : /* We will be adding the new sequence to the function. The splitters
3996 : may have introduced invalid RTL sharing, so unshare the sequence now. */
3997 6166875 : unshare_all_rtl_in_chain (seq);
3998 :
3999 : /* Mark labels and copy flags. */
4000 15434887 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4001 : {
4002 9268012 : if (JUMP_P (insn))
4003 : {
4004 6292 : if (JUMP_P (trial))
4005 5459 : CROSSING_JUMP_P (insn) = CROSSING_JUMP_P (trial);
4006 6292 : mark_jump_label (PATTERN (insn), insn, 0);
4007 6292 : njumps++;
4008 6292 : if (probability.initialized_p ()
4009 5429 : && any_condjump_p (insn)
4010 11721 : && !find_reg_note (insn, REG_BR_PROB, 0))
4011 : {
4012 : /* We can preserve the REG_BR_PROB notes only if exactly
4013 : one jump is created, otherwise the machine description
4014 : is responsible for this step using
4015 : split_branch_probability variable. */
4016 5429 : gcc_assert (njumps == 1);
4017 5429 : add_reg_br_prob_note (insn, probability);
4018 : }
4019 : }
4020 : }
4021 :
4022 : /* If we are splitting a CALL_INSN, look for the CALL_INSN
4023 : in SEQ and copy any additional information across. */
4024 6166875 : if (CALL_P (trial))
4025 : {
4026 0 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4027 0 : if (CALL_P (insn))
4028 : {
4029 0 : gcc_assert (call_insn == NULL_RTX);
4030 0 : call_insn = insn;
4031 :
4032 : /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
4033 : target may have explicitly specified. */
4034 0 : rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
4035 0 : while (*p)
4036 0 : p = &XEXP (*p, 1);
4037 0 : *p = CALL_INSN_FUNCTION_USAGE (trial);
4038 :
4039 : /* If the old call was a sibling call, the new one must
4040 : be too. */
4041 0 : SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
4042 : }
4043 : }
4044 :
4045 : /* Copy notes, particularly those related to the CFG. */
4046 7984885 : for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
4047 : {
4048 1818010 : switch (REG_NOTE_KIND (note))
4049 : {
4050 2806 : case REG_EH_REGION:
4051 2806 : copy_reg_eh_region_note_backward (note, insn_last, NULL);
4052 2806 : break;
4053 :
4054 : case REG_NORETURN:
4055 : case REG_SETJMP:
4056 : case REG_TM:
4057 : case REG_CALL_NOCF_CHECK:
4058 : case REG_CALL_ARG_LOCATION:
4059 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4060 : {
4061 0 : if (CALL_P (insn))
4062 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4063 : }
4064 : break;
4065 :
4066 : case REG_NON_LOCAL_GOTO:
4067 : case REG_LABEL_TARGET:
4068 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4069 : {
4070 0 : if (JUMP_P (insn))
4071 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4072 : }
4073 : break;
4074 :
4075 : case REG_INC:
4076 : if (!AUTO_INC_DEC)
4077 : break;
4078 :
4079 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4080 : {
4081 : rtx reg = XEXP (note, 0);
4082 : if (!FIND_REG_INC_NOTE (insn, reg)
4083 : && find_auto_inc (PATTERN (insn), reg))
4084 : add_reg_note (insn, REG_INC, reg);
4085 : }
4086 : break;
4087 :
4088 308851 : case REG_ARGS_SIZE:
4089 308851 : fixup_args_size_notes (NULL, insn_last, get_args_size (note));
4090 308851 : break;
4091 :
4092 0 : case REG_CALL_DECL:
4093 0 : case REG_UNTYPED_CALL:
4094 0 : gcc_assert (call_insn != NULL_RTX);
4095 0 : add_reg_note (call_insn, REG_NOTE_KIND (note), XEXP (note, 0));
4096 0 : break;
4097 :
4098 : default:
4099 : break;
4100 : }
4101 : }
4102 :
4103 : /* If there are LABELS inside the split insns increment the
4104 : usage count so we don't delete the label. */
4105 6166875 : if (INSN_P (trial))
4106 : {
4107 : insn = insn_last;
4108 15434887 : while (insn != NULL_RTX)
4109 : {
4110 : /* JUMP_P insns have already been "marked" above. */
4111 9268012 : if (NONJUMP_INSN_P (insn))
4112 9253777 : mark_label_nuses (PATTERN (insn));
4113 :
4114 9268012 : insn = PREV_INSN (insn);
4115 : }
4116 : }
4117 :
4118 6166875 : before = PREV_INSN (trial);
4119 6166875 : after = NEXT_INSN (trial);
4120 :
4121 6166875 : emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
4122 :
4123 6166875 : delete_insn (trial);
4124 :
4125 : /* Recursively call try_split for each new insn created; by the
4126 : time control returns here that insn will be fully split, so
4127 : set LAST and continue from the insn after the one returned.
4128 : We can't use next_active_insn here since AFTER may be a note.
4129 : Ignore deleted insns, which can be occur if not optimizing. */
4130 21601762 : for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
4131 9268012 : if (! tem->deleted () && INSN_P (tem))
4132 9260069 : tem = try_split (PATTERN (tem), tem, 1);
4133 :
4134 : /* Return either the first or the last insn, depending on which was
4135 : requested. */
4136 6166875 : return last
4137 6166875 : ? (after ? PREV_INSN (after) : get_last_insn ())
4138 0 : : NEXT_INSN (before);
4139 : }
4140 :
4141 : /* Make and return an INSN rtx, initializing all its slots.
4142 : Store PATTERN in the pattern slots. */
4143 :
4144 : rtx_insn *
4145 125681890 : make_insn_raw (rtx pattern)
4146 : {
4147 125681890 : rtx_insn *insn;
4148 :
4149 125681890 : insn = as_a <rtx_insn *> (rtx_alloc (INSN));
4150 :
4151 125681890 : INSN_UID (insn) = cur_insn_uid++;
4152 125681890 : PATTERN (insn) = pattern;
4153 125681890 : INSN_CODE (insn) = -1;
4154 125681890 : REG_NOTES (insn) = NULL;
4155 125681890 : INSN_LOCATION (insn) = curr_insn_location ();
4156 125681890 : BLOCK_FOR_INSN (insn) = NULL;
4157 :
4158 : #ifdef ENABLE_RTL_CHECKING
4159 : if (insn
4160 : && INSN_P (insn)
4161 : && (returnjump_p (insn)
4162 : || (GET_CODE (insn) == SET
4163 : && SET_DEST (insn) == pc_rtx)))
4164 : {
4165 : warning (0, "ICE: %<emit_insn%> used where %<emit_jump_insn%> needed:");
4166 : debug_rtx (insn);
4167 : }
4168 : #endif
4169 :
4170 125681890 : return insn;
4171 : }
4172 :
4173 : /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
4174 :
4175 : static rtx_insn *
4176 50803076 : make_debug_insn_raw (rtx pattern)
4177 : {
4178 50803076 : rtx_debug_insn *insn;
4179 :
4180 50803076 : insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
4181 50803076 : INSN_UID (insn) = cur_debug_insn_uid++;
4182 50803076 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
4183 50803076 : INSN_UID (insn) = cur_insn_uid++;
4184 :
4185 50803076 : PATTERN (insn) = pattern;
4186 50803076 : INSN_CODE (insn) = -1;
4187 50803076 : REG_NOTES (insn) = NULL;
4188 50803076 : INSN_LOCATION (insn) = curr_insn_location ();
4189 50803076 : BLOCK_FOR_INSN (insn) = NULL;
4190 :
4191 50803076 : return insn;
4192 : }
4193 :
4194 : /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
4195 :
4196 : static rtx_insn *
4197 17972637 : make_jump_insn_raw (rtx pattern)
4198 : {
4199 17972637 : rtx_jump_insn *insn;
4200 :
4201 17972637 : insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
4202 17972637 : INSN_UID (insn) = cur_insn_uid++;
4203 :
4204 17972637 : PATTERN (insn) = pattern;
4205 17972637 : INSN_CODE (insn) = -1;
4206 17972637 : REG_NOTES (insn) = NULL;
4207 17972637 : JUMP_LABEL (insn) = NULL;
4208 17972637 : INSN_LOCATION (insn) = curr_insn_location ();
4209 17972637 : BLOCK_FOR_INSN (insn) = NULL;
4210 :
4211 17972637 : return insn;
4212 : }
4213 :
4214 : /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
4215 :
4216 : static rtx_insn *
4217 6296519 : make_call_insn_raw (rtx pattern)
4218 : {
4219 6296519 : rtx_call_insn *insn;
4220 :
4221 6296519 : insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
4222 6296519 : INSN_UID (insn) = cur_insn_uid++;
4223 :
4224 6296519 : PATTERN (insn) = pattern;
4225 6296519 : INSN_CODE (insn) = -1;
4226 6296519 : REG_NOTES (insn) = NULL;
4227 6296519 : CALL_INSN_FUNCTION_USAGE (insn) = NULL;
4228 6296519 : INSN_LOCATION (insn) = curr_insn_location ();
4229 6296519 : BLOCK_FOR_INSN (insn) = NULL;
4230 :
4231 6296519 : return insn;
4232 : }
4233 :
4234 : /* Like `make_insn_raw' but make a NOTE instead of an insn. */
4235 :
4236 : static rtx_note *
4237 165436789 : make_note_raw (enum insn_note subtype)
4238 : {
4239 : /* Some notes are never created this way at all. These notes are
4240 : only created by patching out insns. */
4241 165436789 : gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
4242 : && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
4243 :
4244 165436789 : rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
4245 165436789 : INSN_UID (note) = cur_insn_uid++;
4246 165436789 : NOTE_KIND (note) = subtype;
4247 165436789 : BLOCK_FOR_INSN (note) = NULL;
4248 165436789 : memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4249 165436789 : return note;
4250 : }
4251 :
4252 : /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
4253 : INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
4254 : but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
4255 :
4256 : static inline void
4257 590340675 : link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
4258 : {
4259 590340675 : SET_PREV_INSN (insn) = prev;
4260 590340675 : SET_NEXT_INSN (insn) = next;
4261 590340675 : if (prev != NULL)
4262 : {
4263 422883332 : SET_NEXT_INSN (prev) = insn;
4264 422883332 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4265 : {
4266 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4267 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
4268 : }
4269 : }
4270 590340675 : if (next != NULL)
4271 : {
4272 170059498 : SET_PREV_INSN (next) = insn;
4273 170059498 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4274 : {
4275 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4276 0 : SET_PREV_INSN (sequence->insn (0)) = insn;
4277 : }
4278 : }
4279 :
4280 590340675 : if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
4281 : {
4282 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
4283 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4284 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4285 : }
4286 590340675 : }
4287 :
4288 : /* Add INSN to the end of the doubly-linked list.
4289 : INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4290 :
4291 : void
4292 409089144 : add_insn (rtx_insn *insn)
4293 : {
4294 409089144 : rtx_insn *prev = get_last_insn ();
4295 409089144 : link_insn_into_chain (insn, prev, NULL);
4296 409089144 : if (get_insns () == NULL)
4297 167264764 : set_first_insn (insn);
4298 409089144 : set_last_insn (insn);
4299 409089144 : }
4300 :
4301 : /* Add INSN into the doubly-linked list after insn AFTER. */
4302 :
4303 : static void
4304 66042681 : add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
4305 : {
4306 66042681 : rtx_insn *next = NEXT_INSN (after);
4307 :
4308 66042681 : gcc_assert (!optimize || !after->deleted ());
4309 :
4310 66042681 : link_insn_into_chain (insn, after, next);
4311 :
4312 66042681 : if (next == NULL)
4313 : {
4314 : struct sequence_stack *seq;
4315 :
4316 11192033 : for (seq = get_current_sequence (); seq; seq = seq->next)
4317 11192033 : if (after == seq->last)
4318 : {
4319 11192033 : seq->last = insn;
4320 11192033 : break;
4321 : }
4322 : }
4323 66042681 : }
4324 :
4325 : /* Add INSN into the doubly-linked list before insn BEFORE. */
4326 :
4327 : static void
4328 115208850 : add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
4329 : {
4330 115208850 : rtx_insn *prev = PREV_INSN (before);
4331 :
4332 115208850 : gcc_assert (!optimize || !before->deleted ());
4333 :
4334 115208850 : link_insn_into_chain (insn, prev, before);
4335 :
4336 115208850 : if (prev == NULL)
4337 : {
4338 : struct sequence_stack *seq;
4339 :
4340 192579 : for (seq = get_current_sequence (); seq; seq = seq->next)
4341 192579 : if (before == seq->first)
4342 : {
4343 192579 : seq->first = insn;
4344 192579 : break;
4345 : }
4346 :
4347 192579 : gcc_assert (seq);
4348 : }
4349 115208850 : }
4350 :
4351 : /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4352 : If BB is NULL, an attempt is made to infer the bb from before.
4353 :
4354 : This and the next function should be the only functions called
4355 : to insert an insn once delay slots have been filled since only
4356 : they know how to update a SEQUENCE. */
4357 :
4358 : void
4359 64666849 : add_insn_after (rtx_insn *insn, rtx_insn *after, basic_block bb)
4360 : {
4361 64666849 : add_insn_after_nobb (insn, after);
4362 64666849 : if (!BARRIER_P (after)
4363 64635971 : && !BARRIER_P (insn)
4364 121735758 : && (bb = BLOCK_FOR_INSN (after)))
4365 : {
4366 46555818 : set_block_for_insn (insn, bb);
4367 46555818 : if (INSN_P (insn))
4368 816170 : df_insn_rescan (insn);
4369 : /* Should not happen as first in the BB is always
4370 : either NOTE or LABEL. */
4371 46555818 : if (BB_END (bb) == after
4372 : /* Avoid clobbering of structure when creating new BB. */
4373 999198 : && !BARRIER_P (insn)
4374 999198 : && !NOTE_INSN_BASIC_BLOCK_P (insn))
4375 324690 : BB_END (bb) = insn;
4376 : }
4377 64666849 : }
4378 :
4379 : /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4380 : If BB is NULL, an attempt is made to infer the bb from before.
4381 :
4382 : This and the previous function should be the only functions called
4383 : to insert an insn once delay slots have been filled since only
4384 : they know how to update a SEQUENCE. */
4385 :
4386 : void
4387 93240156 : add_insn_before (rtx_insn *insn, rtx_insn *before, basic_block bb)
4388 : {
4389 93240156 : add_insn_before_nobb (insn, before);
4390 :
4391 93240156 : if (BARRIER_P (insn))
4392 : return;
4393 :
4394 93240039 : if (!bb
4395 22519993 : && !BARRIER_P (before))
4396 22519992 : bb = BLOCK_FOR_INSN (before);
4397 :
4398 22519993 : if (bb)
4399 : {
4400 89577494 : set_block_for_insn (insn, bb);
4401 89577494 : if (INSN_P (insn))
4402 13148633 : df_insn_rescan (insn);
4403 : /* Should not happen as first in the BB is always either NOTE or
4404 : LABEL. */
4405 89577494 : gcc_assert (BB_HEAD (bb) != insn
4406 : /* Avoid clobbering of structure when creating new BB. */
4407 : || BARRIER_P (insn)
4408 : || NOTE_INSN_BASIC_BLOCK_P (insn));
4409 : }
4410 : }
4411 :
4412 : /* Replace insn with an deleted instruction note. */
4413 :
4414 : void
4415 14141709 : set_insn_deleted (rtx_insn *insn)
4416 : {
4417 14141709 : if (INSN_P (insn))
4418 14141709 : df_insn_delete (insn);
4419 14141709 : PUT_CODE (insn, NOTE);
4420 14141709 : NOTE_KIND (insn) = NOTE_INSN_DELETED;
4421 14141709 : }
4422 :
4423 :
4424 : /* Unlink INSN from the insn chain.
4425 :
4426 : This function knows how to handle sequences.
4427 :
4428 : This function does not invalidate data flow information associated with
4429 : INSN (i.e. does not call df_insn_delete). That makes this function
4430 : usable for only disconnecting an insn from the chain, and re-emit it
4431 : elsewhere later.
4432 :
4433 : To later insert INSN elsewhere in the insn chain via add_insn and
4434 : similar functions, PREV_INSN and NEXT_INSN must be nullified by
4435 : the caller. Nullifying them here breaks many insn chain walks.
4436 :
4437 : To really delete an insn and related DF information, use delete_insn. */
4438 :
4439 : void
4440 135773122 : remove_insn (rtx_insn *insn)
4441 : {
4442 135773122 : rtx_insn *next = NEXT_INSN (insn);
4443 135773122 : rtx_insn *prev = PREV_INSN (insn);
4444 135773122 : basic_block bb;
4445 :
4446 135773122 : if (prev)
4447 : {
4448 135772861 : SET_NEXT_INSN (prev) = next;
4449 135772861 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4450 : {
4451 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4452 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4453 : }
4454 : }
4455 : else
4456 : {
4457 : struct sequence_stack *seq;
4458 :
4459 261 : for (seq = get_current_sequence (); seq; seq = seq->next)
4460 261 : if (insn == seq->first)
4461 : {
4462 261 : seq->first = next;
4463 261 : break;
4464 : }
4465 :
4466 261 : gcc_assert (seq);
4467 : }
4468 :
4469 135773122 : if (next)
4470 : {
4471 133664927 : SET_PREV_INSN (next) = prev;
4472 133664927 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4473 : {
4474 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4475 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4476 : }
4477 : }
4478 : else
4479 : {
4480 : struct sequence_stack *seq;
4481 :
4482 2108195 : for (seq = get_current_sequence (); seq; seq = seq->next)
4483 2108195 : if (insn == seq->last)
4484 : {
4485 2108195 : seq->last = prev;
4486 2108195 : break;
4487 : }
4488 :
4489 2108195 : gcc_assert (seq);
4490 : }
4491 :
4492 : /* Fix up basic block boundaries, if necessary. */
4493 135773122 : if (!BARRIER_P (insn)
4494 135773122 : && (bb = BLOCK_FOR_INSN (insn)))
4495 : {
4496 132782888 : if (BB_HEAD (bb) == insn)
4497 : {
4498 : /* Never ever delete the basic block note without deleting whole
4499 : basic block. */
4500 2476365 : gcc_assert (!NOTE_P (insn));
4501 2476365 : BB_HEAD (bb) = next;
4502 : }
4503 132782888 : if (BB_END (bb) == insn)
4504 22601080 : BB_END (bb) = prev;
4505 : }
4506 135773122 : }
4507 :
4508 : /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4509 :
4510 : void
4511 6240966 : add_function_usage_to (rtx call_insn, rtx call_fusage)
4512 : {
4513 6240966 : gcc_assert (call_insn && CALL_P (call_insn));
4514 :
4515 : /* Put the register usage information on the CALL. If there is already
4516 : some usage information, put ours at the end. */
4517 6240966 : if (CALL_INSN_FUNCTION_USAGE (call_insn))
4518 : {
4519 : rtx link;
4520 :
4521 1359221 : for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4522 : link = XEXP (link, 1))
4523 : ;
4524 :
4525 601652 : XEXP (link, 1) = call_fusage;
4526 : }
4527 : else
4528 5639314 : CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4529 6240966 : }
4530 :
4531 : /* Delete all insns made since FROM.
4532 : FROM becomes the new last instruction. */
4533 :
4534 : void
4535 1254661 : delete_insns_since (rtx_insn *from)
4536 : {
4537 1254661 : if (from == 0)
4538 146595 : set_first_insn (0);
4539 : else
4540 1108066 : SET_NEXT_INSN (from) = 0;
4541 1254661 : set_last_insn (from);
4542 1254661 : }
4543 :
4544 : /* This function is deprecated, please use sequences instead.
4545 :
4546 : Move a consecutive bunch of insns to a different place in the chain.
4547 : The insns to be moved are those between FROM and TO.
4548 : They are moved to a new position after the insn AFTER.
4549 : AFTER must not be FROM or TO or any insn in between.
4550 :
4551 : This function does not know about SEQUENCEs and hence should not be
4552 : called after delay-slot filling has been done. */
4553 :
4554 : void
4555 1817378 : reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4556 : {
4557 1817378 : if (flag_checking)
4558 : {
4559 2395177 : for (rtx_insn *x = from; x != to; x = NEXT_INSN (x))
4560 577821 : gcc_assert (after != x);
4561 1817356 : gcc_assert (after != to);
4562 : }
4563 :
4564 : /* Splice this bunch out of where it is now. */
4565 1817378 : if (PREV_INSN (from))
4566 1817378 : SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4567 1817378 : if (NEXT_INSN (to))
4568 1809365 : SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4569 1817378 : if (get_last_insn () == to)
4570 8013 : set_last_insn (PREV_INSN (from));
4571 1817378 : if (get_insns () == from)
4572 0 : set_first_insn (NEXT_INSN (to));
4573 :
4574 : /* Make the new neighbors point to it and it to them. */
4575 1817378 : if (NEXT_INSN (after))
4576 1810760 : SET_PREV_INSN (NEXT_INSN (after)) = to;
4577 :
4578 1817378 : SET_NEXT_INSN (to) = NEXT_INSN (after);
4579 1817378 : SET_PREV_INSN (from) = after;
4580 1817378 : SET_NEXT_INSN (after) = from;
4581 1817378 : if (after == get_last_insn ())
4582 6618 : set_last_insn (to);
4583 1817378 : }
4584 :
4585 : /* Same as function above, but take care to update BB boundaries. */
4586 : void
4587 1172295 : reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4588 : {
4589 1172295 : rtx_insn *prev = PREV_INSN (from);
4590 1172295 : basic_block bb, bb2;
4591 :
4592 1172295 : reorder_insns_nobb (from, to, after);
4593 :
4594 1172295 : if (!BARRIER_P (after)
4595 1172295 : && (bb = BLOCK_FOR_INSN (after)))
4596 : {
4597 1165977 : rtx_insn *x;
4598 1165977 : df_set_bb_dirty (bb);
4599 :
4600 1165977 : if (!BARRIER_P (from)
4601 1165977 : && (bb2 = BLOCK_FOR_INSN (from)))
4602 : {
4603 1165977 : if (BB_END (bb2) == to)
4604 16843 : BB_END (bb2) = prev;
4605 1165977 : df_set_bb_dirty (bb2);
4606 : }
4607 :
4608 1165977 : if (BB_END (bb) == after)
4609 330859 : BB_END (bb) = to;
4610 :
4611 2388673 : for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4612 1222696 : if (!BARRIER_P (x))
4613 1222696 : df_insn_change_bb (x, bb);
4614 : }
4615 1172295 : }
4616 :
4617 :
4618 : /* Emit insn(s) of given code and pattern
4619 : at a specified place within the doubly-linked list.
4620 :
4621 : All of the emit_foo global entry points accept an object
4622 : X which is either an insn list or a PATTERN of a single
4623 : instruction.
4624 :
4625 : There are thus a few canonical ways to generate code and
4626 : emit it at a specific place in the instruction stream. For
4627 : example, consider the instruction named SPOT and the fact that
4628 : we would like to emit some instructions before SPOT. We might
4629 : do it like this:
4630 :
4631 : start_sequence ();
4632 : ... emit the new instructions ...
4633 : insns_head = end_sequence ();
4634 :
4635 : emit_insn_before (insns_head, SPOT);
4636 :
4637 : It used to be common to generate SEQUENCE rtl instead, but that
4638 : is a relic of the past which no longer occurs. The reason is that
4639 : SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4640 : generated would almost certainly die right after it was created. */
4641 :
4642 : static rtx_insn *
4643 11616865 : emit_pattern_before_noloc (rtx x, rtx_insn *before, rtx_insn *last,
4644 : basic_block bb,
4645 : rtx_insn *(*make_raw) (rtx))
4646 : {
4647 11616865 : rtx_insn *insn;
4648 :
4649 11616865 : gcc_assert (before);
4650 :
4651 11616865 : if (x == NULL_RTX)
4652 : return last;
4653 :
4654 11602521 : switch (GET_CODE (x))
4655 : {
4656 10125828 : case DEBUG_INSN:
4657 10125828 : case INSN:
4658 10125828 : case JUMP_INSN:
4659 10125828 : case CALL_INSN:
4660 10125828 : case CODE_LABEL:
4661 10125828 : case BARRIER:
4662 10125828 : case NOTE:
4663 10125828 : insn = as_a <rtx_insn *> (x);
4664 32581301 : while (insn)
4665 : {
4666 12329645 : rtx_insn *next = NEXT_INSN (insn);
4667 12329645 : add_insn_before (insn, before, bb);
4668 12329645 : last = insn;
4669 12329645 : insn = next;
4670 : }
4671 : break;
4672 :
4673 : #ifdef ENABLE_RTL_CHECKING
4674 : case SEQUENCE:
4675 : gcc_unreachable ();
4676 : break;
4677 : #endif
4678 :
4679 1476693 : default:
4680 1476693 : last = (*make_raw) (x);
4681 1476693 : add_insn_before (last, before, bb);
4682 1476693 : break;
4683 : }
4684 :
4685 : return last;
4686 : }
4687 :
4688 : /* Make X be output before the instruction BEFORE. */
4689 :
4690 : rtx_insn *
4691 452319 : emit_insn_before_noloc (rtx x, rtx_insn *before, basic_block bb)
4692 : {
4693 452319 : return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4694 : }
4695 :
4696 : /* Make an instruction with body X and code JUMP_INSN
4697 : and output it before the instruction BEFORE. */
4698 :
4699 : rtx_jump_insn *
4700 0 : emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
4701 : {
4702 0 : return as_a <rtx_jump_insn *> (
4703 : emit_pattern_before_noloc (x, before, NULL, NULL,
4704 0 : make_jump_insn_raw));
4705 : }
4706 :
4707 : /* Make an instruction with body X and code CALL_INSN
4708 : and output it before the instruction BEFORE. */
4709 :
4710 : rtx_insn *
4711 0 : emit_call_insn_before_noloc (rtx x, rtx_insn *before)
4712 : {
4713 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4714 0 : make_call_insn_raw);
4715 : }
4716 :
4717 : /* Make an instruction with body X and code DEBUG_INSN
4718 : and output it before the instruction BEFORE. */
4719 :
4720 : rtx_insn *
4721 0 : emit_debug_insn_before_noloc (rtx x, rtx_insn *before)
4722 : {
4723 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4724 0 : make_debug_insn_raw);
4725 : }
4726 :
4727 : /* Make an insn of code BARRIER
4728 : and output it before the insn BEFORE. */
4729 :
4730 : rtx_barrier *
4731 0 : emit_barrier_before (rtx_insn *before)
4732 : {
4733 0 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4734 :
4735 0 : INSN_UID (insn) = cur_insn_uid++;
4736 :
4737 0 : add_insn_before (insn, before, NULL);
4738 0 : return insn;
4739 : }
4740 :
4741 : /* Emit the label LABEL before the insn BEFORE. */
4742 :
4743 : rtx_code_label *
4744 6572132 : emit_label_before (rtx_code_label *label, rtx_insn *before)
4745 : {
4746 6572132 : gcc_checking_assert (INSN_UID (label) == 0);
4747 6572132 : INSN_UID (label) = cur_insn_uid++;
4748 6572132 : add_insn_before (label, before, NULL);
4749 6572132 : return label;
4750 : }
4751 :
4752 : /* Helper for emit_insn_after, handles lists of instructions
4753 : efficiently. */
4754 :
4755 : static rtx_insn *
4756 24535939 : emit_insn_after_1 (rtx_insn *first, rtx_insn *after, basic_block bb)
4757 : {
4758 24535939 : rtx_insn *last;
4759 24535939 : rtx_insn *after_after;
4760 24535939 : if (!bb && !BARRIER_P (after))
4761 19723173 : bb = BLOCK_FOR_INSN (after);
4762 :
4763 19723173 : if (bb)
4764 : {
4765 24535869 : df_set_bb_dirty (bb);
4766 67905616 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4767 18833878 : if (!BARRIER_P (last))
4768 : {
4769 18832254 : set_block_for_insn (last, bb);
4770 18832254 : df_insn_rescan (last);
4771 : }
4772 24535869 : if (!BARRIER_P (last))
4773 : {
4774 24535869 : set_block_for_insn (last, bb);
4775 24535869 : df_insn_rescan (last);
4776 : }
4777 24535869 : if (BB_END (bb) == after)
4778 9213240 : BB_END (bb) = last;
4779 : }
4780 : else
4781 70 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4782 0 : continue;
4783 :
4784 24535939 : after_after = NEXT_INSN (after);
4785 :
4786 24535939 : SET_NEXT_INSN (after) = first;
4787 24535939 : SET_PREV_INSN (first) = after;
4788 24535939 : SET_NEXT_INSN (last) = after_after;
4789 24535939 : if (after_after)
4790 24424179 : SET_PREV_INSN (after_after) = last;
4791 :
4792 24535939 : if (after == get_last_insn ())
4793 111760 : set_last_insn (last);
4794 :
4795 24535939 : return last;
4796 : }
4797 :
4798 : static rtx_insn *
4799 29616369 : emit_pattern_after_noloc (rtx x, rtx_insn *after, basic_block bb,
4800 : rtx_insn *(*make_raw)(rtx))
4801 : {
4802 29616369 : rtx_insn *last = after;
4803 :
4804 29616369 : gcc_assert (after);
4805 :
4806 29616369 : if (x == NULL_RTX)
4807 : return last;
4808 :
4809 29064204 : switch (GET_CODE (x))
4810 : {
4811 24535939 : case DEBUG_INSN:
4812 24535939 : case INSN:
4813 24535939 : case JUMP_INSN:
4814 24535939 : case CALL_INSN:
4815 24535939 : case CODE_LABEL:
4816 24535939 : case BARRIER:
4817 24535939 : case NOTE:
4818 24535939 : last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
4819 24535939 : break;
4820 :
4821 : #ifdef ENABLE_RTL_CHECKING
4822 : case SEQUENCE:
4823 : gcc_unreachable ();
4824 : break;
4825 : #endif
4826 :
4827 4528265 : default:
4828 4528265 : last = (*make_raw) (x);
4829 4528265 : add_insn_after (last, after, bb);
4830 4528265 : break;
4831 : }
4832 :
4833 : return last;
4834 : }
4835 :
4836 : /* Make X be output after the insn AFTER and set the BB of insn. If
4837 : BB is NULL, an attempt is made to infer the BB from AFTER. */
4838 :
4839 : rtx_insn *
4840 5044765 : emit_insn_after_noloc (rtx x, rtx_insn *after, basic_block bb)
4841 : {
4842 5044765 : return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4843 : }
4844 :
4845 :
4846 : /* Make an insn of code JUMP_INSN with body X
4847 : and output it after the insn AFTER. */
4848 :
4849 : rtx_jump_insn *
4850 1982 : emit_jump_insn_after_noloc (rtx x, rtx_insn *after)
4851 : {
4852 1982 : return as_a <rtx_jump_insn *> (
4853 1982 : emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
4854 : }
4855 :
4856 : /* Make an instruction with body X and code CALL_INSN
4857 : and output it after the instruction AFTER. */
4858 :
4859 : rtx_insn *
4860 0 : emit_call_insn_after_noloc (rtx x, rtx_insn *after)
4861 : {
4862 0 : return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4863 : }
4864 :
4865 : /* Make an instruction with body X and code CALL_INSN
4866 : and output it after the instruction AFTER. */
4867 :
4868 : rtx_insn *
4869 0 : emit_debug_insn_after_noloc (rtx x, rtx_insn *after)
4870 : {
4871 0 : return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4872 : }
4873 :
4874 : /* Make an insn of code BARRIER
4875 : and output it after the insn AFTER. */
4876 :
4877 : rtx_barrier *
4878 7567062 : emit_barrier_after (rtx_insn *after)
4879 : {
4880 7567062 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4881 :
4882 7567062 : INSN_UID (insn) = cur_insn_uid++;
4883 :
4884 7567062 : add_insn_after (insn, after, NULL);
4885 7567062 : return insn;
4886 : }
4887 :
4888 : /* Emit the label LABEL after the insn AFTER. */
4889 :
4890 : rtx_insn *
4891 0 : emit_label_after (rtx_insn *label, rtx_insn *after)
4892 : {
4893 0 : gcc_checking_assert (INSN_UID (label) == 0);
4894 0 : INSN_UID (label) = cur_insn_uid++;
4895 0 : add_insn_after (label, after, NULL);
4896 0 : return label;
4897 : }
4898 :
4899 : /* Notes require a bit of special handling: Some notes need to have their
4900 : BLOCK_FOR_INSN set, others should never have it set, and some should
4901 : have it set or clear depending on the context. */
4902 :
4903 : /* Return true iff a note of kind SUBTYPE should be emitted with routines
4904 : that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4905 : caller is asked to emit a note before BB_HEAD, or after BB_END. */
4906 :
4907 : static bool
4908 148751556 : note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
4909 : {
4910 0 : switch (subtype)
4911 : {
4912 : /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4913 : case NOTE_INSN_SWITCH_TEXT_SECTIONS:
4914 : return true;
4915 :
4916 : /* Notes for var tracking and EH region markers can appear between or
4917 : inside basic blocks. If the caller is emitting on the basic block
4918 : boundary, do not set BLOCK_FOR_INSN on the new note. */
4919 60203315 : case NOTE_INSN_VAR_LOCATION:
4920 60203315 : case NOTE_INSN_EH_REGION_BEG:
4921 60203315 : case NOTE_INSN_EH_REGION_END:
4922 0 : return on_bb_boundary_p;
4923 :
4924 : /* Otherwise, BLOCK_FOR_INSN must be set. */
4925 0 : default:
4926 0 : return false;
4927 : }
4928 : }
4929 :
4930 : /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4931 :
4932 : rtx_note *
4933 53921176 : emit_note_after (enum insn_note subtype, rtx_insn *after)
4934 : {
4935 53921176 : rtx_note *note = make_note_raw (subtype);
4936 53921176 : basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
4937 53890298 : bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
4938 :
4939 53921176 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4940 1375832 : add_insn_after_nobb (note, after);
4941 : else
4942 52545344 : add_insn_after (note, after, bb);
4943 53921176 : return note;
4944 : }
4945 :
4946 : /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4947 :
4948 : rtx_note *
4949 94830380 : emit_note_before (enum insn_note subtype, rtx_insn *before)
4950 : {
4951 94830380 : rtx_note *note = make_note_raw (subtype);
4952 94830380 : basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
4953 94830379 : bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
4954 :
4955 94830380 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4956 21968694 : add_insn_before_nobb (note, before);
4957 : else
4958 72861686 : add_insn_before (note, before, bb);
4959 94830380 : return note;
4960 : }
4961 :
4962 : /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4963 : MAKE_RAW indicates how to turn PATTERN into a real insn. */
4964 :
4965 : static rtx_insn *
4966 22414161 : emit_pattern_after_setloc (rtx pattern, rtx_insn *after, location_t loc,
4967 : rtx_insn *(*make_raw) (rtx))
4968 : {
4969 22414161 : rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4970 :
4971 22414161 : if (pattern == NULL_RTX || !loc)
4972 : return last;
4973 :
4974 15885569 : after = NEXT_INSN (after);
4975 4263070 : while (1)
4976 : {
4977 20148639 : if (active_insn_p (after)
4978 18959779 : && !JUMP_TABLE_DATA_P (after) /* FIXME */
4979 39108418 : && !INSN_LOCATION (after))
4980 18953699 : INSN_LOCATION (after) = loc;
4981 20148639 : if (after == last)
4982 : break;
4983 4263070 : after = NEXT_INSN (after);
4984 : }
4985 : return last;
4986 : }
4987 :
4988 : /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4989 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4990 : any DEBUG_INSNs. */
4991 :
4992 : static rtx_insn *
4993 10987960 : emit_pattern_after (rtx pattern, rtx_insn *after, bool skip_debug_insns,
4994 : rtx_insn *(*make_raw) (rtx))
4995 : {
4996 10987960 : rtx_insn *prev = after;
4997 :
4998 10987960 : if (skip_debug_insns)
4999 11557793 : while (DEBUG_INSN_P (prev))
5000 2117765 : prev = PREV_INSN (prev);
5001 :
5002 10987960 : if (INSN_P (prev))
5003 8832499 : return emit_pattern_after_setloc (pattern, after, INSN_LOCATION (prev),
5004 8832499 : make_raw);
5005 : else
5006 2155461 : return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
5007 : }
5008 :
5009 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5010 : rtx_insn *
5011 8407196 : emit_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5012 : {
5013 8407196 : return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
5014 : }
5015 :
5016 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5017 : rtx_insn *
5018 8796403 : emit_insn_after (rtx pattern, rtx_insn *after)
5019 : {
5020 8796403 : return emit_pattern_after (pattern, after, true, make_insn_raw);
5021 : }
5022 :
5023 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5024 : rtx_jump_insn *
5025 5174466 : emit_jump_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5026 : {
5027 5174466 : return as_a <rtx_jump_insn *> (
5028 5174466 : emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
5029 : }
5030 :
5031 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5032 : rtx_jump_insn *
5033 617927 : emit_jump_insn_after (rtx pattern, rtx_insn *after)
5034 : {
5035 617927 : return as_a <rtx_jump_insn *> (
5036 617927 : emit_pattern_after (pattern, after, true, make_jump_insn_raw));
5037 : }
5038 :
5039 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5040 : rtx_insn *
5041 0 : emit_call_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5042 : {
5043 0 : return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
5044 : }
5045 :
5046 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5047 : rtx_insn *
5048 25698 : emit_call_insn_after (rtx pattern, rtx_insn *after)
5049 : {
5050 25698 : return emit_pattern_after (pattern, after, true, make_call_insn_raw);
5051 : }
5052 :
5053 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5054 : rtx_insn *
5055 0 : emit_debug_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5056 : {
5057 0 : return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
5058 : }
5059 :
5060 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5061 : rtx_insn *
5062 1547932 : emit_debug_insn_after (rtx pattern, rtx_insn *after)
5063 : {
5064 1547932 : return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
5065 : }
5066 :
5067 : /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
5068 : MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
5069 : indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
5070 : CALL_INSN, etc. */
5071 :
5072 : static rtx_insn *
5073 10577682 : emit_pattern_before_setloc (rtx pattern, rtx_insn *before, location_t loc,
5074 : bool insnp, rtx_insn *(*make_raw) (rtx))
5075 : {
5076 10577682 : rtx_insn *first = PREV_INSN (before);
5077 10918901 : rtx_insn *last = emit_pattern_before_noloc (pattern, before,
5078 : insnp ? before : NULL,
5079 : NULL, make_raw);
5080 :
5081 10577682 : if (pattern == NULL_RTX || !loc)
5082 : return last;
5083 :
5084 9563312 : if (!first)
5085 87438 : first = get_insns ();
5086 : else
5087 9475874 : first = NEXT_INSN (first);
5088 1525307 : while (1)
5089 : {
5090 11088619 : if (active_insn_p (first)
5091 10534613 : && !JUMP_TABLE_DATA_P (first) /* FIXME */
5092 21623232 : && !INSN_LOCATION (first))
5093 10308159 : INSN_LOCATION (first) = loc;
5094 11088619 : if (first == last)
5095 : break;
5096 1525307 : first = NEXT_INSN (first);
5097 : }
5098 : return last;
5099 : }
5100 :
5101 : /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
5102 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
5103 : before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
5104 : INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
5105 :
5106 : static rtx_insn *
5107 10799325 : emit_pattern_before (rtx pattern, rtx_insn *before, bool skip_debug_insns,
5108 : bool insnp, rtx_insn *(*make_raw) (rtx))
5109 : {
5110 10799325 : rtx_insn *next = before;
5111 :
5112 10799325 : if (skip_debug_insns)
5113 10466762 : while (DEBUG_INSN_P (next))
5114 31 : next = PREV_INSN (next);
5115 :
5116 10799325 : if (INSN_P (next))
5117 10212461 : return emit_pattern_before_setloc (pattern, before, INSN_LOCATION (next),
5118 10212461 : insnp, make_raw);
5119 : else
5120 588136 : return emit_pattern_before_noloc (pattern, before,
5121 : insnp ? before : NULL,
5122 586864 : NULL, make_raw);
5123 : }
5124 :
5125 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5126 : rtx_insn *
5127 365221 : emit_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5128 : {
5129 365221 : return emit_pattern_before_setloc (pattern, before, loc, true,
5130 365221 : make_insn_raw);
5131 : }
5132 :
5133 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5134 : rtx_insn *
5135 10456834 : emit_insn_before (rtx pattern, rtx_insn *before)
5136 : {
5137 10456834 : return emit_pattern_before (pattern, before, true, true, make_insn_raw);
5138 : }
5139 :
5140 : /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5141 : rtx_jump_insn *
5142 0 : emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5143 : {
5144 0 : return as_a <rtx_jump_insn *> (
5145 : emit_pattern_before_setloc (pattern, before, loc, false,
5146 0 : make_jump_insn_raw));
5147 : }
5148 :
5149 : /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5150 : rtx_jump_insn *
5151 9897 : emit_jump_insn_before (rtx pattern, rtx_insn *before)
5152 : {
5153 9897 : return as_a <rtx_jump_insn *> (
5154 : emit_pattern_before (pattern, before, true, false,
5155 9897 : make_jump_insn_raw));
5156 : }
5157 :
5158 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5159 : rtx_insn *
5160 0 : emit_call_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5161 : {
5162 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5163 0 : make_call_insn_raw);
5164 : }
5165 :
5166 : /* Like emit_call_insn_before_noloc,
5167 : but set insn_location according to BEFORE. */
5168 : rtx_insn *
5169 0 : emit_call_insn_before (rtx pattern, rtx_insn *before)
5170 : {
5171 0 : return emit_pattern_before (pattern, before, true, false,
5172 0 : make_call_insn_raw);
5173 : }
5174 :
5175 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5176 : rtx_insn *
5177 0 : emit_debug_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5178 : {
5179 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5180 0 : make_debug_insn_raw);
5181 : }
5182 :
5183 : /* Like emit_debug_insn_before_noloc,
5184 : but set insn_location according to BEFORE. */
5185 : rtx_insn *
5186 332594 : emit_debug_insn_before (rtx pattern, rtx_insn *before)
5187 : {
5188 332594 : return emit_pattern_before (pattern, before, false, false,
5189 332594 : make_debug_insn_raw);
5190 : }
5191 :
5192 : /* Take X and emit it at the end of the doubly-linked
5193 : INSN list.
5194 :
5195 : Returns the last insn emitted. */
5196 :
5197 : rtx_insn *
5198 243599492 : emit_insn (rtx x)
5199 : {
5200 243599492 : rtx_insn *last = get_last_insn ();
5201 243599492 : rtx_insn *insn;
5202 :
5203 243599492 : if (x == NULL_RTX)
5204 : return last;
5205 :
5206 239000357 : switch (GET_CODE (x))
5207 : {
5208 117019541 : case DEBUG_INSN:
5209 117019541 : case INSN:
5210 117019541 : case JUMP_INSN:
5211 117019541 : case CALL_INSN:
5212 117019541 : case CODE_LABEL:
5213 117019541 : case BARRIER:
5214 117019541 : case NOTE:
5215 117019541 : insn = as_a <rtx_insn *> (x);
5216 397900693 : while (insn)
5217 : {
5218 163861611 : rtx_insn *next = NEXT_INSN (insn);
5219 163861611 : add_insn (insn);
5220 163861611 : last = insn;
5221 163861611 : insn = next;
5222 : }
5223 : break;
5224 :
5225 : #ifdef ENABLE_RTL_CHECKING
5226 : case JUMP_TABLE_DATA:
5227 : case SEQUENCE:
5228 : gcc_unreachable ();
5229 : break;
5230 : #endif
5231 :
5232 121980816 : default:
5233 121980816 : last = make_insn_raw (x);
5234 121980816 : add_insn (last);
5235 121980816 : break;
5236 : }
5237 :
5238 : return last;
5239 : }
5240 :
5241 : /* Make an insn of code DEBUG_INSN with pattern X
5242 : and add it to the end of the doubly-linked list. */
5243 :
5244 : rtx_insn *
5245 48922550 : emit_debug_insn (rtx x)
5246 : {
5247 48922550 : rtx_insn *last = get_last_insn ();
5248 48922550 : rtx_insn *insn;
5249 :
5250 48922550 : if (x == NULL_RTX)
5251 : return last;
5252 :
5253 48922550 : switch (GET_CODE (x))
5254 : {
5255 0 : case DEBUG_INSN:
5256 0 : case INSN:
5257 0 : case JUMP_INSN:
5258 0 : case CALL_INSN:
5259 0 : case CODE_LABEL:
5260 0 : case BARRIER:
5261 0 : case NOTE:
5262 0 : insn = as_a <rtx_insn *> (x);
5263 0 : while (insn)
5264 : {
5265 0 : rtx_insn *next = NEXT_INSN (insn);
5266 0 : add_insn (insn);
5267 0 : last = insn;
5268 0 : insn = next;
5269 : }
5270 : break;
5271 :
5272 : #ifdef ENABLE_RTL_CHECKING
5273 : case JUMP_TABLE_DATA:
5274 : case SEQUENCE:
5275 : gcc_unreachable ();
5276 : break;
5277 : #endif
5278 :
5279 48922550 : default:
5280 48922550 : last = make_debug_insn_raw (x);
5281 48922550 : add_insn (last);
5282 48922550 : break;
5283 : }
5284 :
5285 : return last;
5286 : }
5287 :
5288 : /* Make an insn of code JUMP_INSN with pattern X
5289 : and add it to the end of the doubly-linked list. */
5290 :
5291 : rtx_insn *
5292 29259065 : emit_jump_insn (rtx x)
5293 : {
5294 29259065 : rtx_insn *last = NULL;
5295 29259065 : rtx_insn *insn;
5296 :
5297 29259065 : switch (GET_CODE (x))
5298 : {
5299 11786881 : case DEBUG_INSN:
5300 11786881 : case INSN:
5301 11786881 : case JUMP_INSN:
5302 11786881 : case CALL_INSN:
5303 11786881 : case CODE_LABEL:
5304 11786881 : case BARRIER:
5305 11786881 : case NOTE:
5306 11786881 : insn = as_a <rtx_insn *> (x);
5307 44871057 : while (insn)
5308 : {
5309 21297295 : rtx_insn *next = NEXT_INSN (insn);
5310 21297295 : add_insn (insn);
5311 21297295 : last = insn;
5312 21297295 : insn = next;
5313 : }
5314 : break;
5315 :
5316 : #ifdef ENABLE_RTL_CHECKING
5317 : case JUMP_TABLE_DATA:
5318 : case SEQUENCE:
5319 : gcc_unreachable ();
5320 : break;
5321 : #endif
5322 :
5323 17472184 : default:
5324 17472184 : last = make_jump_insn_raw (x);
5325 17472184 : add_insn (last);
5326 17472184 : break;
5327 : }
5328 :
5329 29259065 : return last;
5330 : }
5331 :
5332 : /* Make an insn of code JUMP_INSN with pattern X,
5333 : add a REG_BR_PROB note that indicates very likely probability,
5334 : and add it to the end of the doubly-linked list. */
5335 :
5336 : rtx_insn *
5337 0 : emit_likely_jump_insn (rtx x)
5338 : {
5339 0 : rtx_insn *jump = emit_jump_insn (x);
5340 0 : add_reg_br_prob_note (jump, profile_probability::very_likely ());
5341 0 : return jump;
5342 : }
5343 :
5344 : /* Make an insn of code JUMP_INSN with pattern X,
5345 : add a REG_BR_PROB note that indicates very unlikely probability,
5346 : and add it to the end of the doubly-linked list. */
5347 :
5348 : rtx_insn *
5349 0 : emit_unlikely_jump_insn (rtx x)
5350 : {
5351 0 : rtx_insn *jump = emit_jump_insn (x);
5352 0 : add_reg_br_prob_note (jump, profile_probability::very_unlikely ());
5353 0 : return jump;
5354 : }
5355 :
5356 : /* Make an insn of code CALL_INSN with pattern X
5357 : and add it to the end of the doubly-linked list. */
5358 :
5359 : rtx_insn *
5360 6275222 : emit_call_insn (rtx x)
5361 : {
5362 6275222 : rtx_insn *insn;
5363 :
5364 6275222 : switch (GET_CODE (x))
5365 : {
5366 4401 : case DEBUG_INSN:
5367 4401 : case INSN:
5368 4401 : case JUMP_INSN:
5369 4401 : case CALL_INSN:
5370 4401 : case CODE_LABEL:
5371 4401 : case BARRIER:
5372 4401 : case NOTE:
5373 4401 : insn = emit_insn (x);
5374 4401 : break;
5375 :
5376 : #ifdef ENABLE_RTL_CHECKING
5377 : case SEQUENCE:
5378 : case JUMP_TABLE_DATA:
5379 : gcc_unreachable ();
5380 : break;
5381 : #endif
5382 :
5383 6270821 : default:
5384 6270821 : insn = make_call_insn_raw (x);
5385 6270821 : add_insn (insn);
5386 6270821 : break;
5387 : }
5388 :
5389 6275222 : return insn;
5390 : }
5391 :
5392 : /* Add the label LABEL to the end of the doubly-linked list. */
5393 :
5394 : rtx_code_label *
5395 8688958 : emit_label (rtx uncast_label)
5396 : {
5397 8688958 : rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
5398 :
5399 8688958 : gcc_checking_assert (INSN_UID (label) == 0);
5400 8688958 : INSN_UID (label) = cur_insn_uid++;
5401 8688958 : add_insn (label);
5402 8688958 : return label;
5403 : }
5404 :
5405 : /* Make an insn of code JUMP_TABLE_DATA
5406 : and add it to the end of the doubly-linked list. */
5407 :
5408 : rtx_jump_table_data *
5409 6318 : emit_jump_table_data (rtx table)
5410 : {
5411 6318 : rtx_jump_table_data *jump_table_data =
5412 6318 : as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
5413 6318 : INSN_UID (jump_table_data) = cur_insn_uid++;
5414 6318 : PATTERN (jump_table_data) = table;
5415 6318 : BLOCK_FOR_INSN (jump_table_data) = NULL;
5416 6318 : add_insn (jump_table_data);
5417 6318 : return jump_table_data;
5418 : }
5419 :
5420 : /* Make an insn of code BARRIER
5421 : and add it to the end of the doubly-linked list. */
5422 :
5423 : rtx_barrier *
5424 3505530 : emit_barrier (void)
5425 : {
5426 3505530 : rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
5427 3505530 : INSN_UID (barrier) = cur_insn_uid++;
5428 3505530 : add_insn (barrier);
5429 3505530 : return barrier;
5430 : }
5431 :
5432 : /* Emit a copy of note ORIG. */
5433 :
5434 : rtx_note *
5435 175876 : emit_note_copy (rtx_note *orig)
5436 : {
5437 175876 : enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
5438 175876 : rtx_note *note = make_note_raw (kind);
5439 175876 : NOTE_DATA (note) = NOTE_DATA (orig);
5440 175876 : add_insn (note);
5441 175876 : return note;
5442 : }
5443 :
5444 : /* Make an insn of code NOTE or type NOTE_NO
5445 : and add it to the end of the doubly-linked list. */
5446 :
5447 : rtx_note *
5448 16509357 : emit_note (enum insn_note kind)
5449 : {
5450 16509357 : rtx_note *note = make_note_raw (kind);
5451 16509357 : add_insn (note);
5452 16509357 : return note;
5453 : }
5454 :
5455 : /* Emit a clobber of lvalue X. */
5456 :
5457 : rtx_insn *
5458 546288 : emit_clobber (rtx x)
5459 : {
5460 : /* CONCATs should not appear in the insn stream. */
5461 546288 : if (GET_CODE (x) == CONCAT)
5462 : {
5463 0 : emit_clobber (XEXP (x, 0));
5464 0 : return emit_clobber (XEXP (x, 1));
5465 : }
5466 546288 : return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5467 : }
5468 :
5469 : /* Return a sequence of insns to clobber lvalue X. */
5470 :
5471 : rtx_insn *
5472 0 : gen_clobber (rtx x)
5473 : {
5474 0 : rtx_insn *seq;
5475 :
5476 0 : start_sequence ();
5477 0 : emit_clobber (x);
5478 0 : seq = end_sequence ();
5479 0 : return seq;
5480 : }
5481 :
5482 : /* Emit a use of rvalue X. */
5483 :
5484 : rtx_insn *
5485 791919 : emit_use (rtx x)
5486 : {
5487 : /* CONCATs should not appear in the insn stream. */
5488 791919 : if (GET_CODE (x) == CONCAT)
5489 : {
5490 0 : emit_use (XEXP (x, 0));
5491 0 : return emit_use (XEXP (x, 1));
5492 : }
5493 791919 : return emit_insn (gen_rtx_USE (VOIDmode, x));
5494 : }
5495 :
5496 : /* Return a sequence of insns to use rvalue X. */
5497 :
5498 : rtx_insn *
5499 0 : gen_use (rtx x)
5500 : {
5501 0 : rtx_insn *seq;
5502 :
5503 0 : start_sequence ();
5504 0 : emit_use (x);
5505 0 : seq = end_sequence ();
5506 0 : return seq;
5507 : }
5508 :
5509 : /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5510 : Return the set in INSN that such notes describe, or NULL if the notes
5511 : have no meaning for INSN. */
5512 :
5513 : rtx
5514 228682056 : set_for_reg_notes (rtx insn)
5515 : {
5516 228682056 : rtx pat, reg;
5517 :
5518 228682056 : if (!INSN_P (insn))
5519 : return NULL_RTX;
5520 :
5521 228677544 : pat = PATTERN (insn);
5522 228677544 : if (GET_CODE (pat) == PARALLEL)
5523 : {
5524 : /* We do not use single_set because that ignores SETs of unused
5525 : registers. REG_EQUAL and REG_EQUIV notes really do require the
5526 : PARALLEL to have a single SET. */
5527 18360147 : if (multiple_sets (insn))
5528 : return NULL_RTX;
5529 17673014 : pat = XVECEXP (pat, 0, 0);
5530 : }
5531 :
5532 227990411 : if (GET_CODE (pat) != SET)
5533 : return NULL_RTX;
5534 :
5535 128117358 : reg = SET_DEST (pat);
5536 :
5537 : /* Notes apply to the contents of a STRICT_LOW_PART. */
5538 128117358 : if (GET_CODE (reg) == STRICT_LOW_PART
5539 128111230 : || GET_CODE (reg) == ZERO_EXTRACT)
5540 8172 : reg = XEXP (reg, 0);
5541 :
5542 : /* Check that we have a register. */
5543 128117358 : if (!(REG_P (reg) || GET_CODE (reg) == SUBREG))
5544 : return NULL_RTX;
5545 :
5546 : return pat;
5547 : }
5548 :
5549 : /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5550 : note of this type already exists, remove it first. */
5551 :
5552 : rtx
5553 22727776 : set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5554 : {
5555 22727776 : rtx note = find_reg_note (insn, kind, NULL_RTX);
5556 :
5557 22727776 : switch (kind)
5558 : {
5559 22727776 : case REG_EQUAL:
5560 22727776 : case REG_EQUIV:
5561 : /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5562 22727776 : if (!set_for_reg_notes (insn) && GET_CODE (PATTERN (insn)) != USE)
5563 : return NULL_RTX;
5564 :
5565 : /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5566 : It serves no useful purpose and breaks eliminate_regs. */
5567 22693147 : if (GET_CODE (datum) == ASM_OPERANDS)
5568 : return NULL_RTX;
5569 :
5570 : /* Notes with side effects are dangerous. Even if the side-effect
5571 : initially mirrors one in PATTERN (INSN), later optimizations
5572 : might alter the way that the final register value is calculated
5573 : and so move or alter the side-effect in some way. The note would
5574 : then no longer be a valid substitution for SET_SRC. */
5575 22683702 : if (side_effects_p (datum))
5576 : return NULL_RTX;
5577 : break;
5578 :
5579 : default:
5580 : break;
5581 : }
5582 :
5583 22683236 : if (note)
5584 7733037 : XEXP (note, 0) = datum;
5585 : else
5586 : {
5587 14950199 : add_reg_note (insn, kind, datum);
5588 14950199 : note = REG_NOTES (insn);
5589 : }
5590 :
5591 22683236 : switch (kind)
5592 : {
5593 22683236 : case REG_EQUAL:
5594 22683236 : case REG_EQUIV:
5595 22683236 : df_notes_rescan (as_a <rtx_insn *> (insn));
5596 22683236 : break;
5597 : default:
5598 : break;
5599 : }
5600 :
5601 : return note;
5602 : }
5603 :
5604 : /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5605 : rtx
5606 1398529 : set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5607 : {
5608 1398529 : rtx set = set_for_reg_notes (insn);
5609 :
5610 1398529 : if (set && SET_DEST (set) == dst)
5611 1383706 : return set_unique_reg_note (insn, kind, datum);
5612 : return NULL_RTX;
5613 : }
5614 :
5615 : /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5616 : following barrier if the instruction needs one and if ALLOW_BARRIER_P
5617 : is true.
5618 :
5619 : If X is a label, it is simply added into the insn chain. */
5620 :
5621 : rtx_insn *
5622 18561779 : emit (rtx x, bool allow_barrier_p)
5623 : {
5624 18561779 : enum rtx_code code = classify_insn (x);
5625 :
5626 18561779 : switch (code)
5627 : {
5628 0 : case CODE_LABEL:
5629 0 : return emit_label (x);
5630 9265566 : case INSN:
5631 9265566 : return emit_insn (x);
5632 9290014 : case JUMP_INSN:
5633 9290014 : {
5634 9290014 : rtx_insn *insn = emit_jump_insn (x);
5635 9290014 : if (allow_barrier_p
5636 9290014 : && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
5637 0 : return emit_barrier ();
5638 : return insn;
5639 : }
5640 6199 : case CALL_INSN:
5641 6199 : return emit_call_insn (x);
5642 0 : case DEBUG_INSN:
5643 0 : return emit_debug_insn (x);
5644 0 : default:
5645 0 : gcc_unreachable ();
5646 : }
5647 : }
5648 :
5649 : /* Space for free sequence stack entries. */
5650 : static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5651 :
5652 : /* Begin emitting insns to a sequence. If this sequence will contain
5653 : something that might cause the compiler to pop arguments to function
5654 : calls (because those pops have previously been deferred; see
5655 : INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5656 : before calling this function. That will ensure that the deferred
5657 : pops are not accidentally emitted in the middle of this sequence. */
5658 :
5659 : void
5660 233995960 : start_sequence (void)
5661 : {
5662 233995960 : struct sequence_stack *tem;
5663 :
5664 233995960 : if (free_sequence_stack != NULL)
5665 : {
5666 233343919 : tem = free_sequence_stack;
5667 233343919 : free_sequence_stack = tem->next;
5668 : }
5669 : else
5670 652041 : tem = ggc_alloc<sequence_stack> ();
5671 :
5672 233995960 : tem->next = get_current_sequence ()->next;
5673 233995960 : tem->first = get_insns ();
5674 233995960 : tem->last = get_last_insn ();
5675 233995960 : get_current_sequence ()->next = tem;
5676 :
5677 233995960 : set_first_insn (0);
5678 233995960 : set_last_insn (0);
5679 233995960 : }
5680 :
5681 : /* Set up the insn chain starting with FIRST as the current sequence,
5682 : saving the previously current one. See the documentation for
5683 : start_sequence for more information about how to use this function. */
5684 :
5685 : void
5686 5419188 : push_to_sequence (rtx_insn *first)
5687 : {
5688 5419188 : rtx_insn *last;
5689 :
5690 5419188 : start_sequence ();
5691 :
5692 14257167 : for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5693 : ;
5694 :
5695 5419188 : set_first_insn (first);
5696 5419188 : set_last_insn (last);
5697 5419188 : }
5698 :
5699 : /* Like push_to_sequence, but take the last insn as an argument to avoid
5700 : looping through the list. */
5701 :
5702 : void
5703 77137 : push_to_sequence2 (rtx_insn *first, rtx_insn *last)
5704 : {
5705 77137 : start_sequence ();
5706 :
5707 77137 : set_first_insn (first);
5708 77137 : set_last_insn (last);
5709 77137 : }
5710 :
5711 : /* Set up the outer-level insn chain
5712 : as the current sequence, saving the previously current one. */
5713 :
5714 : void
5715 476 : push_topmost_sequence (void)
5716 : {
5717 476 : struct sequence_stack *top;
5718 :
5719 476 : start_sequence ();
5720 :
5721 476 : top = get_topmost_sequence ();
5722 476 : set_first_insn (top->first);
5723 476 : set_last_insn (top->last);
5724 476 : }
5725 :
5726 : /* After emitting to the outer-level insn chain, update the outer-level
5727 : insn chain, and restore the previous saved state. */
5728 :
5729 : void
5730 476 : pop_topmost_sequence (void)
5731 : {
5732 476 : struct sequence_stack *top;
5733 :
5734 476 : top = get_topmost_sequence ();
5735 476 : top->first = get_insns ();
5736 476 : top->last = get_last_insn ();
5737 :
5738 476 : end_sequence ();
5739 476 : }
5740 :
5741 : /* After emitting to a sequence, restore the previous saved state and return
5742 : the start of the completed sequence.
5743 :
5744 : If the compiler might have deferred popping arguments while
5745 : generating this sequence, and this sequence will not be immediately
5746 : inserted into the instruction stream, use do_pending_stack_adjust
5747 : before calling this function. That will ensure that the deferred
5748 : pops are inserted into this sequence, and not into some random
5749 : location in the instruction stream. See INHIBIT_DEFER_POP for more
5750 : information about deferred popping of arguments. */
5751 :
5752 : rtx_insn *
5753 233995959 : end_sequence (void)
5754 : {
5755 233995959 : rtx_insn *insns = get_insns ();
5756 :
5757 233995959 : struct sequence_stack *tem = get_current_sequence ()->next;
5758 :
5759 233995959 : set_first_insn (tem->first);
5760 233995959 : set_last_insn (tem->last);
5761 233995959 : get_current_sequence ()->next = tem->next;
5762 :
5763 233995959 : memset (tem, 0, sizeof (*tem));
5764 233995959 : tem->next = free_sequence_stack;
5765 233995959 : free_sequence_stack = tem;
5766 :
5767 233995959 : return insns;
5768 : }
5769 :
5770 : /* Return true if currently emitting into a sequence. */
5771 :
5772 : bool
5773 4934625 : in_sequence_p (void)
5774 : {
5775 4934625 : return get_current_sequence ()->next != 0;
5776 : }
5777 :
5778 : /* Put the various virtual registers into REGNO_REG_RTX. */
5779 :
5780 : static void
5781 1703905 : init_virtual_regs (void)
5782 : {
5783 1703905 : regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5784 1703905 : regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5785 1703905 : regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5786 1703905 : regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5787 1703905 : regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5788 1703905 : regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5789 1703905 : = virtual_preferred_stack_boundary_rtx;
5790 1703905 : }
5791 :
5792 :
5793 : /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5794 : static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5795 : static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5796 : static int copy_insn_n_scratches;
5797 :
5798 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5799 : copied an ASM_OPERANDS.
5800 : In that case, it is the original input-operand vector. */
5801 : static rtvec orig_asm_operands_vector;
5802 :
5803 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5804 : copied an ASM_OPERANDS.
5805 : In that case, it is the copied input-operand vector. */
5806 : static rtvec copy_asm_operands_vector;
5807 :
5808 : /* Likewise for the constraints vector. */
5809 : static rtvec orig_asm_constraints_vector;
5810 : static rtvec copy_asm_constraints_vector;
5811 :
5812 : /* Recursively create a new copy of an rtx for copy_insn.
5813 : This function differs from copy_rtx in that it handles SCRATCHes and
5814 : ASM_OPERANDs properly.
5815 : Normally, this function is not used directly; use copy_insn as front end.
5816 : However, you could first copy an insn pattern with copy_insn and then use
5817 : this function afterwards to properly copy any REG_NOTEs containing
5818 : SCRATCHes. */
5819 :
5820 : rtx
5821 22784189 : copy_insn_1 (rtx orig)
5822 : {
5823 22784189 : rtx copy;
5824 22784189 : int i, j;
5825 22784189 : RTX_CODE code;
5826 22784189 : const char *format_ptr;
5827 :
5828 22784189 : if (orig == NULL)
5829 : return NULL;
5830 :
5831 22782872 : code = GET_CODE (orig);
5832 :
5833 22782872 : switch (code)
5834 : {
5835 : case REG:
5836 : case DEBUG_EXPR:
5837 : CASE_CONST_ANY:
5838 : case SYMBOL_REF:
5839 : case CODE_LABEL:
5840 : case PC:
5841 : case RETURN:
5842 : case SIMPLE_RETURN:
5843 : return orig;
5844 1069031 : case CLOBBER:
5845 : /* Share clobbers of hard registers, but do not share pseudo reg
5846 : clobbers or clobbers of hard registers that originated as pseudos.
5847 : This is needed to allow safe register renaming. */
5848 1069031 : if (REG_P (XEXP (orig, 0))
5849 460998 : && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
5850 1530023 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0))))
5851 : return orig;
5852 : break;
5853 :
5854 : case SCRATCH:
5855 72413 : for (i = 0; i < copy_insn_n_scratches; i++)
5856 1609 : if (copy_insn_scratch_in[i] == orig)
5857 1553 : return copy_insn_scratch_out[i];
5858 : break;
5859 :
5860 106193 : case CONST:
5861 106193 : if (shared_const_p (orig))
5862 : return orig;
5863 : break;
5864 :
5865 : /* A MEM with a constant address is not sharable. The problem is that
5866 : the constant address may need to be reloaded. If the mem is shared,
5867 : then reloading one copy of this mem will cause all copies to appear
5868 : to have been reloaded. */
5869 :
5870 : default:
5871 : break;
5872 : }
5873 :
5874 : /* Copy the various flags, fields, and other information. We assume
5875 : that all fields need copying, and then clear the fields that should
5876 : not be copied. That is the sensible default behavior, and forces
5877 : us to explicitly document why we are *not* copying a flag. */
5878 10144621 : copy = shallow_copy_rtx (orig);
5879 :
5880 : /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5881 10144621 : if (INSN_P (orig))
5882 : {
5883 0 : RTX_FLAG (copy, jump) = 0;
5884 0 : RTX_FLAG (copy, call) = 0;
5885 0 : RTX_FLAG (copy, frame_related) = 0;
5886 : }
5887 :
5888 10144621 : format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5889 :
5890 27863204 : for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5891 17718583 : switch (*format_ptr++)
5892 : {
5893 14554795 : case 'e':
5894 14554795 : if (XEXP (orig, i) != NULL)
5895 14532231 : XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5896 : break;
5897 :
5898 646043 : case 'E':
5899 646043 : case 'V':
5900 646043 : if (XVEC (orig, i) == orig_asm_constraints_vector)
5901 12 : XVEC (copy, i) = copy_asm_constraints_vector;
5902 646031 : else if (XVEC (orig, i) == orig_asm_operands_vector)
5903 12 : XVEC (copy, i) = copy_asm_operands_vector;
5904 646019 : else if (XVEC (orig, i) != NULL)
5905 : {
5906 646019 : XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5907 1911758 : for (j = 0; j < XVECLEN (copy, i); j++)
5908 1265739 : XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5909 : }
5910 : break;
5911 :
5912 : case 't':
5913 : case 'w':
5914 : case 'i':
5915 : case 'L':
5916 : case 'p':
5917 : case 's':
5918 : case 'S':
5919 : case 'u':
5920 : case '0':
5921 : /* These are left unchanged. */
5922 : break;
5923 :
5924 0 : default:
5925 0 : gcc_unreachable ();
5926 : }
5927 :
5928 10144621 : if (code == SCRATCH)
5929 : {
5930 70804 : i = copy_insn_n_scratches++;
5931 70804 : gcc_assert (i < MAX_RECOG_OPERANDS);
5932 70804 : copy_insn_scratch_in[i] = orig;
5933 70804 : copy_insn_scratch_out[i] = copy;
5934 : }
5935 10073817 : else if (code == ASM_OPERANDS)
5936 : {
5937 214 : orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5938 214 : copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5939 214 : orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5940 214 : copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5941 : }
5942 :
5943 : return copy;
5944 : }
5945 :
5946 : /* Create a new copy of an rtx.
5947 : This function differs from copy_rtx in that it handles SCRATCHes and
5948 : ASM_OPERANDs properly.
5949 : INSN doesn't really have to be a full INSN; it could be just the
5950 : pattern. */
5951 : rtx
5952 3956930 : copy_insn (rtx insn)
5953 : {
5954 3956930 : copy_insn_n_scratches = 0;
5955 3956930 : orig_asm_operands_vector = 0;
5956 3956930 : orig_asm_constraints_vector = 0;
5957 3956930 : copy_asm_operands_vector = 0;
5958 3956930 : copy_asm_constraints_vector = 0;
5959 3956930 : return copy_insn_1 (insn);
5960 : }
5961 :
5962 : /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5963 : on that assumption that INSN itself remains in its original place. */
5964 :
5965 : rtx_insn *
5966 0 : copy_delay_slot_insn (rtx_insn *insn)
5967 : {
5968 : /* Copy INSN with its rtx_code, all its notes, location etc. */
5969 0 : insn = as_a <rtx_insn *> (copy_rtx (insn));
5970 0 : INSN_UID (insn) = cur_insn_uid++;
5971 0 : return insn;
5972 : }
5973 :
5974 : /* Initialize data structures and variables in this file
5975 : before generating rtl for each function. */
5976 :
5977 : void
5978 1703905 : init_emit (void)
5979 : {
5980 1703905 : set_first_insn (NULL);
5981 1703905 : set_last_insn (NULL);
5982 1703905 : if (param_min_nondebug_insn_uid)
5983 0 : cur_insn_uid = param_min_nondebug_insn_uid;
5984 : else
5985 1703905 : cur_insn_uid = 1;
5986 1703905 : cur_debug_insn_uid = 1;
5987 1703905 : reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5988 1703905 : first_label_num = label_num;
5989 1703905 : get_current_sequence ()->next = NULL;
5990 :
5991 : /* Init the tables that describe all the pseudo regs. */
5992 :
5993 1703905 : crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5994 :
5995 1703905 : crtl->emit.regno_pointer_align
5996 1703905 : = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5997 :
5998 1703905 : regno_reg_rtx
5999 1703905 : = ggc_cleared_vec_alloc<rtx> (crtl->emit.regno_pointer_align_length);
6000 :
6001 : /* Put copies of all the hard registers into regno_reg_rtx. */
6002 1703905 : memcpy (regno_reg_rtx,
6003 1703905 : initial_regno_reg_rtx,
6004 : FIRST_PSEUDO_REGISTER * sizeof (rtx));
6005 :
6006 : /* Put copies of all the virtual register rtx into regno_reg_rtx. */
6007 1703905 : init_virtual_regs ();
6008 :
6009 : /* Indicate that the virtual registers and stack locations are
6010 : all pointers. */
6011 1703905 : REG_POINTER (stack_pointer_rtx) = 1;
6012 1703905 : REG_POINTER (frame_pointer_rtx) = 1;
6013 1703905 : REG_POINTER (hard_frame_pointer_rtx) = 1;
6014 1703905 : REG_POINTER (arg_pointer_rtx) = 1;
6015 :
6016 1703905 : REG_POINTER (virtual_incoming_args_rtx) = 1;
6017 1703905 : REG_POINTER (virtual_stack_vars_rtx) = 1;
6018 1703905 : REG_POINTER (virtual_stack_dynamic_rtx) = 1;
6019 1703905 : REG_POINTER (virtual_outgoing_args_rtx) = 1;
6020 1703905 : REG_POINTER (virtual_cfa_rtx) = 1;
6021 :
6022 : #ifdef STACK_BOUNDARY
6023 1703905 : REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
6024 1703905 : REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6025 1703905 : REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6026 1703905 : REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
6027 :
6028 1703905 : REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
6029 1703905 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
6030 1703905 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
6031 1703905 : REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
6032 :
6033 1703905 : REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
6034 : #endif
6035 :
6036 : #ifdef INIT_EXPANDERS
6037 : INIT_EXPANDERS;
6038 : #endif
6039 1703905 : }
6040 :
6041 : /* Return the value of element I of CONST_VECTOR X as a wide_int. */
6042 :
6043 : wide_int
6044 1068 : const_vector_int_elt (const_rtx x, unsigned int i)
6045 : {
6046 : /* First handle elements that are directly encoded. */
6047 1068 : machine_mode elt_mode = GET_MODE_INNER (GET_MODE (x));
6048 1068 : if (i < (unsigned int) XVECLEN (x, 0))
6049 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, i), elt_mode);
6050 :
6051 : /* Identify the pattern that contains element I and work out the index of
6052 : the last encoded element for that pattern. */
6053 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6054 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6055 1068 : unsigned int count = i / npatterns;
6056 1068 : unsigned int pattern = i % npatterns;
6057 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6058 :
6059 : /* If there are no steps, the final encoded value is the right one. */
6060 1068 : if (!CONST_VECTOR_STEPPED_P (x))
6061 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, final_i), elt_mode);
6062 :
6063 : /* Otherwise work out the value from the last two encoded elements. */
6064 1068 : rtx v1 = CONST_VECTOR_ENCODED_ELT (x, final_i - npatterns);
6065 1068 : rtx v2 = CONST_VECTOR_ENCODED_ELT (x, final_i);
6066 1068 : wide_int diff = wi::sub (rtx_mode_t (v2, elt_mode),
6067 1068 : rtx_mode_t (v1, elt_mode));
6068 1068 : return wi::add (rtx_mode_t (v2, elt_mode), (count - 2) * diff);
6069 1068 : }
6070 :
6071 : /* Return the value of element I of CONST_VECTOR X. */
6072 :
6073 : rtx
6074 4648975 : const_vector_elt (const_rtx x, unsigned int i)
6075 : {
6076 : /* First handle elements that are directly encoded. */
6077 4648975 : if (i < (unsigned int) XVECLEN (x, 0))
6078 4646839 : return CONST_VECTOR_ENCODED_ELT (x, i);
6079 :
6080 : /* If there are no steps, the final encoded value is the right one. */
6081 2136 : if (!CONST_VECTOR_STEPPED_P (x))
6082 : {
6083 : /* Identify the pattern that contains element I and work out the index of
6084 : the last encoded element for that pattern. */
6085 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6086 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6087 1068 : unsigned int pattern = i % npatterns;
6088 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6089 1068 : return CONST_VECTOR_ENCODED_ELT (x, final_i);
6090 : }
6091 :
6092 : /* Otherwise work out the value from the last two encoded elements. */
6093 1068 : return immed_wide_int_const (const_vector_int_elt (x, i),
6094 2136 : GET_MODE_INNER (GET_MODE (x)));
6095 : }
6096 :
6097 : /* Return true if X is a valid element for a CONST_VECTOR of the given
6098 : mode. */
6099 :
6100 : bool
6101 546722 : valid_for_const_vector_p (machine_mode, rtx x)
6102 : {
6103 546722 : return (CONST_SCALAR_INT_P (x)
6104 : || CONST_POLY_INT_P (x)
6105 168089 : || CONST_DOUBLE_AS_FLOAT_P (x)
6106 695674 : || CONST_FIXED_P (x));
6107 : }
6108 :
6109 : /* Generate a vector constant of mode MODE in which every element has
6110 : value ELT. */
6111 :
6112 : rtx
6113 41573106 : gen_const_vec_duplicate (machine_mode mode, rtx elt)
6114 : {
6115 41573106 : rtx_vector_builder builder (mode, 1, 1);
6116 41573106 : builder.quick_push (elt);
6117 41573106 : return builder.build ();
6118 41573106 : }
6119 :
6120 : /* Return a vector rtx of mode MODE in which every element has value X.
6121 : The result will be a constant if X is constant. */
6122 :
6123 : rtx
6124 251853 : gen_vec_duplicate (machine_mode mode, rtx x)
6125 : {
6126 251853 : if (valid_for_const_vector_p (mode, x))
6127 108607 : return gen_const_vec_duplicate (mode, x);
6128 143246 : return gen_rtx_VEC_DUPLICATE (mode, x);
6129 : }
6130 :
6131 : /* A subroutine of const_vec_series_p that handles the case in which:
6132 :
6133 : (GET_CODE (X) == CONST_VECTOR
6134 : && CONST_VECTOR_NPATTERNS (X) == 1
6135 : && !CONST_VECTOR_DUPLICATE_P (X))
6136 :
6137 : is known to hold. */
6138 :
6139 : bool
6140 5755 : const_vec_series_p_1 (const_rtx x, rtx *base_out, rtx *step_out)
6141 : {
6142 : /* Stepped sequences are only defined for integers, to avoid specifying
6143 : rounding behavior. */
6144 5755 : if (GET_MODE_CLASS (GET_MODE (x)) != MODE_VECTOR_INT)
6145 : return false;
6146 :
6147 : /* A non-duplicated vector with two elements can always be seen as a
6148 : series with a nonzero step. Longer vectors must have a stepped
6149 : encoding. */
6150 5755 : if (maybe_ne (CONST_VECTOR_NUNITS (x), 2)
6151 5755 : && !CONST_VECTOR_STEPPED_P (x))
6152 : return false;
6153 :
6154 : /* Calculate the step between the first and second elements. */
6155 5751 : scalar_mode inner = GET_MODE_INNER (GET_MODE (x));
6156 5751 : rtx base = CONST_VECTOR_ELT (x, 0);
6157 11502 : rtx step = simplify_binary_operation (MINUS, inner,
6158 5751 : CONST_VECTOR_ENCODED_ELT (x, 1), base);
6159 5751 : if (rtx_equal_p (step, CONST0_RTX (inner)))
6160 : return false;
6161 :
6162 : /* If we have a stepped encoding, check that the step between the
6163 : second and third elements is the same as STEP. */
6164 5751 : if (CONST_VECTOR_STEPPED_P (x))
6165 : {
6166 9194 : rtx diff = simplify_binary_operation (MINUS, inner,
6167 : CONST_VECTOR_ENCODED_ELT (x, 2),
6168 4597 : CONST_VECTOR_ENCODED_ELT (x, 1));
6169 4597 : if (!rtx_equal_p (step, diff))
6170 : return false;
6171 : }
6172 :
6173 5751 : *base_out = base;
6174 5751 : *step_out = step;
6175 5751 : return true;
6176 : }
6177 :
6178 : /* Generate a vector constant of mode MODE in which element I has
6179 : the value BASE + I * STEP. */
6180 :
6181 : rtx
6182 645 : gen_const_vec_series (machine_mode mode, rtx base, rtx step)
6183 : {
6184 645 : gcc_assert (valid_for_const_vector_p (mode, base)
6185 : && valid_for_const_vector_p (mode, step));
6186 :
6187 645 : rtx_vector_builder builder (mode, 1, 3);
6188 645 : builder.quick_push (base);
6189 1935 : for (int i = 1; i < 3; ++i)
6190 1290 : builder.quick_push (simplify_gen_binary (PLUS, GET_MODE_INNER (mode),
6191 1290 : builder[i - 1], step));
6192 645 : return builder.build ();
6193 645 : }
6194 :
6195 : /* Generate a vector of mode MODE in which element I has the value
6196 : BASE + I * STEP. The result will be a constant if BASE and STEP
6197 : are both constants. */
6198 :
6199 : rtx
6200 4988 : gen_vec_series (machine_mode mode, rtx base, rtx step)
6201 : {
6202 4988 : if (step == const0_rtx)
6203 216 : return gen_vec_duplicate (mode, base);
6204 4772 : if (valid_for_const_vector_p (mode, base)
6205 4772 : && valid_for_const_vector_p (mode, step))
6206 0 : return gen_const_vec_series (mode, base, step);
6207 4772 : return gen_rtx_VEC_SERIES (mode, base, step);
6208 : }
6209 :
6210 : /* Generate a new vector constant for mode MODE and constant value
6211 : CONSTANT. */
6212 :
6213 : static rtx
6214 40216605 : gen_const_vector (machine_mode mode, int constant)
6215 : {
6216 40216605 : machine_mode inner = GET_MODE_INNER (mode);
6217 :
6218 40216605 : gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
6219 :
6220 40216605 : rtx el = const_tiny_rtx[constant][(int) inner];
6221 40216605 : gcc_assert (el);
6222 :
6223 40216605 : return gen_const_vec_duplicate (mode, el);
6224 : }
6225 :
6226 : /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
6227 : all elements are zero, and the one vector when all elements are one. */
6228 : rtx
6229 163768 : gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
6230 : {
6231 327536 : gcc_assert (known_eq (GET_MODE_NUNITS (mode), GET_NUM_ELEM (v)));
6232 :
6233 : /* If the values are all the same, check to see if we can use one of the
6234 : standard constant vectors. */
6235 163768 : if (rtvec_all_equal_p (v))
6236 50582 : return gen_const_vec_duplicate (mode, RTVEC_ELT (v, 0));
6237 :
6238 113186 : unsigned int nunits = GET_NUM_ELEM (v);
6239 113186 : rtx_vector_builder builder (mode, nunits, 1);
6240 666288 : for (unsigned int i = 0; i < nunits; ++i)
6241 553102 : builder.quick_push (RTVEC_ELT (v, i));
6242 113186 : return builder.build (v);
6243 113186 : }
6244 :
6245 : /* Initialise global register information required by all functions. */
6246 :
6247 : void
6248 778170 : init_emit_regs (void)
6249 : {
6250 778170 : int i;
6251 778170 : machine_mode mode;
6252 778170 : mem_attrs *attrs;
6253 :
6254 : /* Reset register attributes */
6255 778170 : reg_attrs_htab->empty ();
6256 :
6257 : /* We need reg_raw_mode, so initialize the modes now. */
6258 778170 : init_reg_modes_target ();
6259 :
6260 : /* Assign register numbers to the globally defined register rtx. */
6261 793192 : stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
6262 793192 : frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
6263 793192 : hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
6264 793192 : arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
6265 2334510 : virtual_incoming_args_rtx =
6266 793192 : gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
6267 2334510 : virtual_stack_vars_rtx =
6268 793192 : gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
6269 2334510 : virtual_stack_dynamic_rtx =
6270 793192 : gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
6271 2334510 : virtual_outgoing_args_rtx =
6272 793192 : gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
6273 793192 : virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
6274 2334510 : virtual_preferred_stack_boundary_rtx =
6275 793192 : gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
6276 :
6277 : /* Initialize RTL for commonly used hard registers. These are
6278 : copied into regno_reg_rtx as we begin to compile each function. */
6279 72369810 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6280 71591640 : initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
6281 :
6282 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
6283 : return_address_pointer_rtx
6284 : = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
6285 : #endif
6286 :
6287 778170 : pic_offset_table_rtx = NULL_RTX;
6288 778170 : if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
6289 20387 : pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
6290 :
6291 : /* Process stack-limiting command-line options. */
6292 778170 : if (opt_fstack_limit_symbol_arg != NULL)
6293 0 : stack_limit_rtx
6294 0 : = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (opt_fstack_limit_symbol_arg));
6295 778170 : if (opt_fstack_limit_register_no >= 0)
6296 0 : stack_limit_rtx = gen_rtx_REG (Pmode, opt_fstack_limit_register_no);
6297 :
6298 97271250 : for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
6299 : {
6300 96493080 : mode = (machine_mode) i;
6301 96493080 : attrs = ggc_cleared_alloc<mem_attrs> ();
6302 96493080 : attrs->align = BITS_PER_UNIT;
6303 96493080 : attrs->addrspace = ADDR_SPACE_GENERIC;
6304 96493080 : if (mode != BLKmode && mode != VOIDmode)
6305 : {
6306 94936740 : attrs->size_known_p = true;
6307 189873480 : attrs->size = GET_MODE_SIZE (mode);
6308 94936740 : if (STRICT_ALIGNMENT)
6309 : attrs->align = GET_MODE_ALIGNMENT (mode);
6310 : }
6311 96493080 : mode_mem_attrs[i] = attrs;
6312 : }
6313 :
6314 778170 : split_branch_probability = profile_probability::uninitialized ();
6315 778170 : }
6316 :
6317 : /* Initialize global machine_mode variables. */
6318 :
6319 : void
6320 288463 : init_derived_machine_modes (void)
6321 : {
6322 288463 : opt_scalar_int_mode mode_iter, opt_byte_mode, opt_word_mode;
6323 2307704 : FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
6324 : {
6325 2019241 : scalar_int_mode mode = mode_iter.require ();
6326 :
6327 2307704 : if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
6328 2019241 : && !opt_byte_mode.exists ())
6329 288463 : opt_byte_mode = mode;
6330 :
6331 4038482 : if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
6332 2019241 : && !opt_word_mode.exists ())
6333 288463 : opt_word_mode = mode;
6334 : }
6335 :
6336 288463 : byte_mode = opt_byte_mode.require ();
6337 288463 : word_mode = opt_word_mode.require ();
6338 288463 : ptr_mode = as_a <scalar_int_mode>
6339 302941 : (mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0).require ());
6340 288463 : }
6341 :
6342 : /* Create some permanent unique rtl objects shared between all functions. */
6343 :
6344 : void
6345 281235 : init_emit_once (void)
6346 : {
6347 281235 : int i;
6348 281235 : machine_mode mode;
6349 281235 : scalar_float_mode double_mode;
6350 281235 : opt_scalar_mode smode_iter;
6351 :
6352 : /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
6353 : CONST_FIXED, and memory attribute hash tables. */
6354 281235 : const_int_htab = hash_table<const_int_hasher>::create_ggc (37);
6355 :
6356 : #if TARGET_SUPPORTS_WIDE_INT
6357 281235 : const_wide_int_htab = hash_table<const_wide_int_hasher>::create_ggc (37);
6358 : #endif
6359 281235 : const_double_htab = hash_table<const_double_hasher>::create_ggc (37);
6360 :
6361 281235 : if (NUM_POLY_INT_COEFFS > 1)
6362 : const_poly_int_htab = hash_table<const_poly_int_hasher>::create_ggc (37);
6363 :
6364 281235 : const_fixed_htab = hash_table<const_fixed_hasher>::create_ggc (37);
6365 :
6366 281235 : reg_attrs_htab = hash_table<reg_attr_hasher>::create_ggc (37);
6367 :
6368 : #ifdef INIT_EXPANDERS
6369 : /* This is to initialize {init|mark|free}_machine_status before the first
6370 : call to push_function_context_to. This is needed by the Chill front
6371 : end which calls push_function_context_to before the first call to
6372 : init_function_start. */
6373 : INIT_EXPANDERS;
6374 : #endif
6375 :
6376 : /* Create the unique rtx's for certain rtx codes and operand values. */
6377 :
6378 : /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
6379 : tries to use these variables. */
6380 36560550 : for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
6381 72558630 : const_int_rtx[i + MAX_SAVED_CONST_INT] =
6382 36279315 : gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
6383 :
6384 281235 : if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
6385 : && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
6386 281235 : const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
6387 : else
6388 : const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
6389 :
6390 281235 : mode = targetm.c.mode_for_floating_type (TI_DOUBLE_TYPE);
6391 281235 : double_mode = as_a<scalar_float_mode> (mode);
6392 :
6393 281235 : real_from_integer (&dconst0, double_mode, 0, SIGNED);
6394 281235 : real_from_integer (&dconst1, double_mode, 1, SIGNED);
6395 281235 : real_from_integer (&dconst2, double_mode, 2, SIGNED);
6396 :
6397 281235 : dconstm0 = dconst0;
6398 281235 : dconstm0.sign = 1;
6399 :
6400 281235 : dconstm1 = dconst1;
6401 281235 : dconstm1.sign = 1;
6402 :
6403 281235 : dconsthalf = dconst1;
6404 281235 : SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
6405 :
6406 281235 : real_inf (&dconstinf);
6407 281235 : real_inf (&dconstninf, true);
6408 :
6409 1124940 : for (i = 0; i < 3; i++)
6410 : {
6411 843705 : const REAL_VALUE_TYPE *const r =
6412 : (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
6413 :
6414 5905935 : FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
6415 5062230 : const_tiny_rtx[i][(int) mode] =
6416 5062230 : const_double_from_real_value (*r, mode);
6417 :
6418 3374820 : FOR_EACH_MODE_IN_CLASS (mode, MODE_DECIMAL_FLOAT)
6419 2531115 : const_tiny_rtx[i][(int) mode] =
6420 2531115 : const_double_from_real_value (*r, mode);
6421 :
6422 843705 : const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
6423 :
6424 6749640 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6425 5905935 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6426 :
6427 2531115 : for (mode = MIN_MODE_PARTIAL_INT;
6428 3374820 : mode <= MAX_MODE_PARTIAL_INT;
6429 2531115 : mode = (machine_mode)((int)(mode) + 1))
6430 2531115 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6431 : }
6432 :
6433 281235 : const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
6434 :
6435 2249880 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6436 1968645 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6437 :
6438 : /* For BImode, 1 and -1 are unsigned and signed interpretations
6439 : of the same value. */
6440 281235 : for (mode = MIN_MODE_BOOL;
6441 562470 : mode <= MAX_MODE_BOOL;
6442 281235 : mode = (machine_mode)((int)(mode) + 1))
6443 : {
6444 281235 : const_tiny_rtx[0][(int) mode] = const0_rtx;
6445 281235 : if (mode == BImode)
6446 : {
6447 281235 : const_tiny_rtx[1][(int) mode] = const_true_rtx;
6448 281235 : const_tiny_rtx[3][(int) mode] = const_true_rtx;
6449 : }
6450 : else
6451 : {
6452 : const_tiny_rtx[1][(int) mode] = const1_rtx;
6453 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6454 : }
6455 : }
6456 :
6457 843705 : for (mode = MIN_MODE_PARTIAL_INT;
6458 1124940 : mode <= MAX_MODE_PARTIAL_INT;
6459 843705 : mode = (machine_mode)((int)(mode) + 1))
6460 843705 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6461 :
6462 3093585 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_INT)
6463 : {
6464 2812350 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6465 2812350 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6466 : }
6467 :
6468 1968645 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT)
6469 : {
6470 1687410 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6471 1687410 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6472 : }
6473 :
6474 281235 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_BOOL)
6475 : {
6476 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6477 0 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6478 0 : if (GET_MODE_INNER (mode) == BImode)
6479 : /* As for BImode, "all 1" and "all -1" are unsigned and signed
6480 : interpretations of the same value. */
6481 0 : const_tiny_rtx[1][(int) mode] = const_tiny_rtx[3][(int) mode];
6482 : else
6483 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6484 : }
6485 :
6486 8999520 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)
6487 : {
6488 8718285 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6489 8718285 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6490 8718285 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6491 : }
6492 :
6493 7312110 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FLOAT)
6494 : {
6495 7030875 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6496 7030875 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6497 : }
6498 :
6499 1687410 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_FRACT)
6500 : {
6501 1406175 : scalar_mode smode = smode_iter.require ();
6502 1406175 : FCONST0 (smode).data.high = 0;
6503 1406175 : FCONST0 (smode).data.low = 0;
6504 1406175 : FCONST0 (smode).mode = smode;
6505 2812350 : const_tiny_rtx[0][(int) smode]
6506 1406175 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6507 : }
6508 :
6509 1687410 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UFRACT)
6510 : {
6511 1406175 : scalar_mode smode = smode_iter.require ();
6512 1406175 : FCONST0 (smode).data.high = 0;
6513 1406175 : FCONST0 (smode).data.low = 0;
6514 1406175 : FCONST0 (smode).mode = smode;
6515 2812350 : const_tiny_rtx[0][(int) smode]
6516 1406175 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6517 : }
6518 :
6519 1406175 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_ACCUM)
6520 : {
6521 1124940 : scalar_mode smode = smode_iter.require ();
6522 1124940 : FCONST0 (smode).data.high = 0;
6523 1124940 : FCONST0 (smode).data.low = 0;
6524 1124940 : FCONST0 (smode).mode = smode;
6525 2249880 : const_tiny_rtx[0][(int) smode]
6526 1124940 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6527 :
6528 : /* We store the value 1. */
6529 1124940 : FCONST1 (smode).data.high = 0;
6530 1124940 : FCONST1 (smode).data.low = 0;
6531 1124940 : FCONST1 (smode).mode = smode;
6532 2249880 : FCONST1 (smode).data
6533 1124940 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6534 : HOST_BITS_PER_DOUBLE_INT,
6535 1124940 : SIGNED_FIXED_POINT_MODE_P (smode));
6536 2249880 : const_tiny_rtx[1][(int) smode]
6537 1124940 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6538 : }
6539 :
6540 1406175 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UACCUM)
6541 : {
6542 1124940 : scalar_mode smode = smode_iter.require ();
6543 1124940 : FCONST0 (smode).data.high = 0;
6544 1124940 : FCONST0 (smode).data.low = 0;
6545 1124940 : FCONST0 (smode).mode = smode;
6546 2249880 : const_tiny_rtx[0][(int) smode]
6547 1124940 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6548 :
6549 : /* We store the value 1. */
6550 1124940 : FCONST1 (smode).data.high = 0;
6551 1124940 : FCONST1 (smode).data.low = 0;
6552 1124940 : FCONST1 (smode).mode = smode;
6553 2249880 : FCONST1 (smode).data
6554 1124940 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6555 : HOST_BITS_PER_DOUBLE_INT,
6556 1124940 : SIGNED_FIXED_POINT_MODE_P (smode));
6557 2249880 : const_tiny_rtx[1][(int) smode]
6558 1124940 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6559 : }
6560 :
6561 281235 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FRACT)
6562 : {
6563 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6564 : }
6565 :
6566 281235 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UFRACT)
6567 : {
6568 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6569 : }
6570 :
6571 281235 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_ACCUM)
6572 : {
6573 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6574 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6575 : }
6576 :
6577 281235 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UACCUM)
6578 : {
6579 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6580 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6581 : }
6582 :
6583 34591905 : for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
6584 34310670 : if (GET_MODE_CLASS ((machine_mode) i) == MODE_CC)
6585 3374820 : const_tiny_rtx[0][i] = const0_rtx;
6586 :
6587 281235 : pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
6588 281235 : ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
6589 281235 : simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
6590 281235 : invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
6591 : /*prev_insn=*/NULL,
6592 : /*next_insn=*/NULL,
6593 : /*bb=*/NULL,
6594 : /*pattern=*/NULL_RTX,
6595 : /*location=*/-1,
6596 : CODE_FOR_nothing,
6597 : /*reg_notes=*/NULL_RTX);
6598 281235 : }
6599 :
6600 : /* Produce exact duplicate of insn INSN after AFTER.
6601 : Care updating of libcall regions if present. */
6602 :
6603 : rtx_insn *
6604 3737872 : emit_copy_of_insn_after (rtx_insn *insn, rtx_insn *after)
6605 : {
6606 3737872 : rtx_insn *new_rtx;
6607 3737872 : rtx link;
6608 :
6609 3737872 : switch (GET_CODE (insn))
6610 : {
6611 1741708 : case INSN:
6612 1741708 : new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6613 1741708 : break;
6614 :
6615 499964 : case JUMP_INSN:
6616 499964 : new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6617 499964 : CROSSING_JUMP_P (new_rtx) = CROSSING_JUMP_P (insn);
6618 499964 : break;
6619 :
6620 1470502 : case DEBUG_INSN:
6621 1470502 : new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6622 1470502 : break;
6623 :
6624 25698 : case CALL_INSN:
6625 25698 : new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6626 25698 : if (CALL_INSN_FUNCTION_USAGE (insn))
6627 22564 : CALL_INSN_FUNCTION_USAGE (new_rtx)
6628 22564 : = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6629 25698 : SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6630 25698 : RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6631 25698 : RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6632 25698 : RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6633 25698 : = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6634 25698 : break;
6635 :
6636 0 : default:
6637 0 : gcc_unreachable ();
6638 : }
6639 :
6640 : /* Update LABEL_NUSES. */
6641 3737872 : if (NONDEBUG_INSN_P (insn))
6642 2267370 : mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6643 :
6644 3737872 : INSN_LOCATION (new_rtx) = INSN_LOCATION (insn);
6645 :
6646 : /* If the old insn is frame related, then so is the new one. This is
6647 : primarily needed for IA-64 unwind info which marks epilogue insns,
6648 : which may be duplicated by the basic block reordering code. */
6649 3737872 : RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6650 :
6651 : /* Locate the end of existing REG_NOTES in NEW_RTX. */
6652 3737872 : rtx *ptail = ®_NOTES (new_rtx);
6653 3737878 : while (*ptail != NULL_RTX)
6654 6 : ptail = &XEXP (*ptail, 1);
6655 :
6656 : /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6657 : will make them. REG_LABEL_TARGETs are created there too, but are
6658 : supposed to be sticky, so we copy them. */
6659 6115279 : for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6660 2377407 : if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6661 : {
6662 2377401 : *ptail = duplicate_reg_note (link);
6663 2377401 : ptail = &XEXP (*ptail, 1);
6664 : }
6665 :
6666 3737872 : INSN_CODE (new_rtx) = INSN_CODE (insn);
6667 3737872 : return new_rtx;
6668 : }
6669 :
6670 : static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6671 : rtx
6672 4495930 : gen_hard_reg_clobber (machine_mode mode, unsigned int regno)
6673 : {
6674 4495930 : if (hard_reg_clobbers[mode][regno])
6675 : return hard_reg_clobbers[mode][regno];
6676 : else
6677 188335 : return (hard_reg_clobbers[mode][regno] =
6678 376670 : gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6679 : }
6680 :
6681 : location_t prologue_location;
6682 : location_t epilogue_location;
6683 :
6684 : /* Hold current location information and last location information, so the
6685 : datastructures are built lazily only when some instructions in given
6686 : place are needed. */
6687 : static location_t curr_location;
6688 :
6689 : /* Allocate insn location datastructure. */
6690 : void
6691 1716653 : insn_locations_init (void)
6692 : {
6693 1716653 : prologue_location = epilogue_location = 0;
6694 1716653 : curr_location = UNKNOWN_LOCATION;
6695 1716653 : }
6696 :
6697 : /* At the end of emit stage, clear current location. */
6698 : void
6699 1484022 : insn_locations_finalize (void)
6700 : {
6701 1484022 : epilogue_location = curr_location;
6702 1484022 : curr_location = UNKNOWN_LOCATION;
6703 1484022 : }
6704 :
6705 : /* Set current location. */
6706 : void
6707 149373252 : set_curr_insn_location (location_t location)
6708 : {
6709 149373252 : curr_location = location;
6710 149373252 : }
6711 :
6712 : /* Get current location. */
6713 : location_t
6714 261828771 : curr_insn_location (void)
6715 : {
6716 261828771 : return curr_location;
6717 : }
6718 :
6719 : /* Set the location of the insn chain starting at INSN to LOC. */
6720 : void
6721 3604566 : set_insn_locations (rtx_insn *insn, location_t loc)
6722 : {
6723 16193790 : while (insn)
6724 : {
6725 12589224 : if (INSN_P (insn))
6726 10646915 : INSN_LOCATION (insn) = loc;
6727 12589224 : insn = NEXT_INSN (insn);
6728 : }
6729 3604566 : }
6730 :
6731 : /* Return lexical scope block insn belongs to. */
6732 : tree
6733 48646255 : insn_scope (const rtx_insn *insn)
6734 : {
6735 48646255 : return LOCATION_BLOCK (INSN_LOCATION (insn));
6736 : }
6737 :
6738 : /* Return line number of the statement that produced this insn. */
6739 : int
6740 0 : insn_line (const rtx_insn *insn)
6741 : {
6742 0 : return LOCATION_LINE (INSN_LOCATION (insn));
6743 : }
6744 :
6745 : /* Return source file of the statement that produced this insn. */
6746 : const char *
6747 0 : insn_file (const rtx_insn *insn)
6748 : {
6749 0 : return LOCATION_FILE (INSN_LOCATION (insn));
6750 : }
6751 :
6752 : /* Return expanded location of the statement that produced this insn. */
6753 : expanded_location
6754 83817424 : insn_location (const rtx_insn *insn)
6755 : {
6756 83817424 : return expand_location (INSN_LOCATION (insn));
6757 : }
6758 :
6759 : /* Return true if memory model MODEL requires a pre-operation (release-style)
6760 : barrier or a post-operation (acquire-style) barrier. While not universal,
6761 : this function matches behavior of several targets. */
6762 :
6763 : bool
6764 0 : need_atomic_barrier_p (enum memmodel model, bool pre)
6765 : {
6766 0 : switch (model & MEMMODEL_BASE_MASK)
6767 : {
6768 : case MEMMODEL_RELAXED:
6769 : case MEMMODEL_CONSUME:
6770 : return false;
6771 0 : case MEMMODEL_RELEASE:
6772 0 : return pre;
6773 0 : case MEMMODEL_ACQUIRE:
6774 0 : return !pre;
6775 0 : case MEMMODEL_ACQ_REL:
6776 0 : case MEMMODEL_SEQ_CST:
6777 0 : return true;
6778 0 : default:
6779 0 : gcc_unreachable ();
6780 : }
6781 : }
6782 :
6783 : /* Return a constant shift amount for shifting a value of mode MODE
6784 : by VALUE bits. */
6785 :
6786 : rtx
6787 209585756 : gen_int_shift_amount (machine_mode, poly_int64 value)
6788 : {
6789 : /* Use a 64-bit mode, to avoid any truncation.
6790 :
6791 : ??? Perhaps this should be automatically derived from the .md files
6792 : instead, or perhaps have a target hook. */
6793 209585756 : scalar_int_mode shift_mode = (BITS_PER_UNIT == 8
6794 : ? DImode
6795 : : int_mode_for_size (64, 0).require ());
6796 209585756 : return gen_int_mode (value, shift_mode);
6797 : }
6798 :
6799 : namespace {
6800 : /* Helper class for expanding an rtx using the encoding generated by
6801 : genemit.cc. The code needs to be kept in sync with there. */
6802 :
6803 : class rtx_expander
6804 : {
6805 : public:
6806 : rtx_expander (const uint8_t *, rtx *);
6807 :
6808 : rtx get_rtx ();
6809 : rtvec get_rtvec ();
6810 : void expand_seq ();
6811 :
6812 : protected:
6813 : uint64_t get_uint ();
6814 83386788 : machine_mode get_mode () { return machine_mode (get_uint ()); }
6815 : char *get_string ();
6816 : rtx get_shared_operand ();
6817 : rtx get_unshared_operand ();
6818 :
6819 : rtx get_rtx (expand_opcode);
6820 : rtx get_rtx (rtx_code, machine_mode);
6821 :
6822 : /* Points to the first unread byte. */
6823 : const uint8_t *m_seq;
6824 :
6825 : /* The operands passed to the gen_* function. */
6826 : rtx *m_operands;
6827 :
6828 : /* A bitmap of operands that have already been used to replace a
6829 : MATCH_OPERAND or MATCH_DUP. In order to ensure correct sharing,
6830 : further replacements need to use a copy of the operand, rather than
6831 : the original rtx. */
6832 : bbitmap<MAX_RECOG_OPERANDS> m_used;
6833 : };
6834 : }
6835 :
6836 24845238 : rtx_expander::rtx_expander (const uint8_t *seq, rtx *operands)
6837 24845238 : : m_seq (seq), m_operands (operands), m_used ()
6838 0 : {}
6839 :
6840 : /* Read and return the next encoded "BEB128" integer. */
6841 :
6842 : inline uint64_t
6843 241871780 : rtx_expander::get_uint ()
6844 : {
6845 241871780 : const uint8_t *seq = m_seq;
6846 241871780 : uint64_t res = 0;
6847 243899743 : do
6848 243899743 : res = (res << 7) | (*seq & 127);
6849 243899743 : while (*seq++ >= 128);
6850 241871780 : m_seq = seq;
6851 241871780 : return res;
6852 : }
6853 :
6854 : /* Read an operand number and return the associated operand rtx,
6855 : without copying it. */
6856 :
6857 : rtx
6858 969696 : rtx_expander::get_shared_operand ()
6859 : {
6860 969696 : return m_operands[get_uint ()];
6861 : }
6862 :
6863 : /* Read an operand number and return a correctly-shared instance of
6864 : the associated operand rtx. This can be either the original rtx
6865 : or a copy. */
6866 :
6867 : rtx
6868 44268080 : rtx_expander::get_unshared_operand ()
6869 : {
6870 44268080 : auto opno = get_uint ();
6871 44268080 : auto mask = m_used.from_index (opno);
6872 44268080 : if (m_used & mask)
6873 2845819 : return copy_rtx (m_operands[opno]);
6874 :
6875 41422261 : m_used |= mask;
6876 41422261 : return m_operands[opno];
6877 : }
6878 :
6879 : /* Read an encoded rtx. */
6880 :
6881 : rtx
6882 126292039 : rtx_expander::get_rtx ()
6883 : {
6884 126292039 : auto FIRST_CODE = (unsigned) expand_opcode::FIRST_CODE;
6885 126292039 : auto opcode = get_uint ();
6886 126292039 : if (opcode < FIRST_CODE)
6887 49733706 : return get_rtx (expand_opcode (opcode));
6888 76558333 : return get_rtx (rtx_code (opcode - FIRST_CODE), NUM_MACHINE_MODES);
6889 : }
6890 :
6891 : /* Read an encoded rtx that starts with the given opcode. */
6892 :
6893 : rtx
6894 49733706 : rtx_expander::get_rtx (expand_opcode opcode)
6895 : {
6896 49733706 : switch (opcode)
6897 : {
6898 : case expand_opcode::NO_RTX:
6899 : return NULL_RTX;
6900 :
6901 44268080 : case expand_opcode::MATCH_OPERAND:
6902 44268080 : return get_unshared_operand ();
6903 :
6904 42540 : case expand_opcode::MATCH_OPERATOR_WITH_MODE:
6905 42540 : {
6906 42540 : auto mode = get_mode ();
6907 42540 : auto op = get_shared_operand ();
6908 42540 : return get_rtx (GET_CODE (op), mode);
6909 : }
6910 :
6911 925322 : case expand_opcode::MATCH_OPERATOR:
6912 925322 : {
6913 925322 : auto op = get_shared_operand ();
6914 925322 : return get_rtx (GET_CODE (op), GET_MODE (op));
6915 : }
6916 :
6917 1834 : case expand_opcode::MATCH_PARALLEL:
6918 1834 : return get_shared_operand ();
6919 :
6920 4495930 : case expand_opcode::CLOBBER_REG:
6921 4495930 : {
6922 4495930 : auto mode = get_mode ();
6923 4495930 : auto regno = get_uint ();
6924 4495930 : return gen_hard_reg_clobber (mode, regno);
6925 : }
6926 :
6927 : case expand_opcode::FIRST_CODE:
6928 : break;
6929 : }
6930 0 : gcc_unreachable ();
6931 : }
6932 :
6933 : /* Read the rest of an rtx of code CODE. If such rtxes are not always
6934 : VOIDmode, MODE is the mode that the rtx should have, or NUM_MACHINE_MODES
6935 : if the mode is encoded at the current iterator position. */
6936 :
6937 : rtx
6938 77526195 : rtx_expander::get_rtx (rtx_code code, machine_mode mode)
6939 : {
6940 77526195 : switch (code)
6941 : {
6942 : /* Please keep the cases below in sync with gengenrtl.cc:special_rtx. */
6943 :
6944 0 : case EXPR_LIST:
6945 0 : case INSN_LIST:
6946 0 : case INSN:
6947 0 : gcc_unreachable ();
6948 :
6949 4825077 : case CONST_INT:
6950 9650154 : return GEN_INT (get_uint ());
6951 :
6952 1872871 : case REG:
6953 1872871 : if (mode == NUM_MACHINE_MODES)
6954 3745742 : mode = get_mode ();
6955 3745742 : return gen_rtx_REG (mode, get_uint ());
6956 :
6957 53282 : case SUBREG:
6958 53282 : {
6959 53282 : if (mode == NUM_MACHINE_MODES)
6960 106564 : mode = get_mode ();
6961 53282 : auto reg = get_rtx ();
6962 53282 : auto byte = get_uint ();
6963 53282 : return gen_rtx_SUBREG (mode, reg, byte);
6964 : }
6965 :
6966 2462996 : case MEM:
6967 2462996 : if (mode == NUM_MACHINE_MODES)
6968 4925992 : mode = get_mode ();
6969 2462996 : return gen_rtx_MEM (mode, get_rtx ());
6970 :
6971 9349864 : case PC:
6972 9349864 : return pc_rtx;
6973 :
6974 0 : case RETURN:
6975 0 : return ret_rtx;
6976 :
6977 1580425 : case SIMPLE_RETURN:
6978 1580425 : return simple_return_rtx;
6979 :
6980 1887 : case CONST_VECTOR:
6981 1887 : if (mode == NUM_MACHINE_MODES)
6982 3774 : mode = get_mode ();
6983 1887 : return gen_rtx_CONST_VECTOR (mode, get_rtvec ());
6984 :
6985 : /* Please keep the cases below in sync with
6986 : gengenrtl.cc:excluded_rtx. */
6987 :
6988 0 : case VAR_LOCATION:
6989 0 : gcc_unreachable ();
6990 :
6991 0 : case CONST_DOUBLE:
6992 : /* genemit.cc only accepts zero const_doubles. */
6993 0 : if (mode == NUM_MACHINE_MODES)
6994 0 : mode = get_mode ();
6995 0 : return CONST0_RTX (mode);
6996 :
6997 0 : case CONST_WIDE_INT:
6998 0 : case CONST_POLY_INT:
6999 0 : case CONST_FIXED:
7000 0 : gcc_unreachable ();
7001 :
7002 57379793 : default:
7003 57379793 : break;
7004 : }
7005 :
7006 57379793 : rtx x = rtx_alloc (code);
7007 57379793 : if (!always_void_p (code))
7008 : {
7009 33731750 : if (mode == NUM_MACHINE_MODES)
7010 65527776 : mode = get_mode ();
7011 33731750 : PUT_MODE_RAW (x, mode);
7012 : }
7013 :
7014 57379793 : const char *fmt = GET_RTX_FORMAT (code);
7015 148216157 : for (unsigned int i = 0; fmt[i]; ++i)
7016 90836364 : switch (fmt[i])
7017 : {
7018 : /* Please keep these cases in sync with
7019 : gengenrtl.cc:type_from_format. */
7020 :
7021 1812711 : case 'i':
7022 1812711 : XINT (x, i) = get_uint ();
7023 1812711 : break;
7024 :
7025 0 : case 'L':
7026 0 : case 'w':
7027 0 : case 'p':
7028 0 : case 's':
7029 0 : gcc_unreachable ();
7030 :
7031 81739681 : case 'e': case 'u':
7032 81739681 : XEXP (x, i) = get_rtx ();
7033 81739681 : break;
7034 :
7035 7283972 : case 'E':
7036 7283972 : XVEC (x, i) = get_rtvec ();
7037 7283972 : break;
7038 :
7039 0 : case 't':
7040 0 : case 'B':
7041 0 : default:
7042 0 : gcc_unreachable ();
7043 : }
7044 :
7045 : return x;
7046 : }
7047 :
7048 : /* Read an encoded rtvec. */
7049 :
7050 : rtvec
7051 7285859 : rtx_expander::get_rtvec ()
7052 : {
7053 7285859 : unsigned int len = get_uint ();
7054 7285859 : rtvec v = rtvec_alloc (len);
7055 23428916 : for (unsigned int i = 0; i < len; ++i)
7056 16143057 : RTVEC_ELT (v, i) = get_rtx ();
7057 7285859 : return v;
7058 : }
7059 :
7060 : /* Read and emit an encoded sequence of instructions. */
7061 :
7062 : void
7063 8302841 : rtx_expander::expand_seq ()
7064 : {
7065 8302841 : unsigned int len = get_uint ();
7066 17653467 : for (unsigned int i = 0; i < len; ++i)
7067 9350626 : emit (get_rtx (), i < len - 1);
7068 8302841 : }
7069 :
7070 : /* Read an rtx from the bytecode in SEQ, which was generated by genemit.cc.
7071 : Replace operand placeholders with the values given in OPERANDS. */
7072 :
7073 : rtx
7074 16542397 : expand_rtx (const uint8_t *seq, rtx *operands)
7075 : {
7076 16542397 : return rtx_expander (seq, operands).get_rtx ();
7077 : }
7078 :
7079 : /* Read and emit a sequence of instructions from the bytecode in SEQ,
7080 : which was generated by genemit.cc. Replace operand placeholders with
7081 : the values given in OPERANDS. */
7082 :
7083 : rtx_insn *
7084 8302841 : complete_seq (const uint8_t *seq, rtx *operands)
7085 : {
7086 8302841 : rtx_expander (seq, operands).expand_seq ();
7087 8302841 : return end_sequence ();
7088 : }
7089 :
7090 : /* Initialize fields of rtl_data related to stack alignment. */
7091 :
7092 : void
7093 1482361 : rtl_data::init_stack_alignment ()
7094 : {
7095 1482361 : stack_alignment_needed = STACK_BOUNDARY;
7096 1482361 : max_used_stack_slot_alignment = STACK_BOUNDARY;
7097 1482361 : stack_alignment_estimated = 0;
7098 1482361 : preferred_stack_boundary = STACK_BOUNDARY;
7099 1482361 : }
7100 :
7101 :
7102 : #include "gt-emit-rtl.h"
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