Line data Source code
1 : /* Emit RTL for the GCC expander.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 :
21 : /* Middle-to-low level generation of rtx code and insns.
22 :
23 : This file contains support functions for creating rtl expressions
24 : and manipulating them in the doubly-linked chain of insns.
25 :
26 : The patterns of the insns are created by machine-dependent
27 : routines in insn-emit.cc, which is generated automatically from
28 : the machine description. These routines make the individual rtx's
29 : of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 : which are automatically generated from rtl.def; what is machine
31 : dependent is the kind of rtx's they make and what arguments they
32 : use. */
33 :
34 : #include "config.h"
35 : #include "system.h"
36 : #include "coretypes.h"
37 : #include "memmodel.h"
38 : #include "backend.h"
39 : #include "target.h"
40 : #include "rtl.h"
41 : #include "tree.h"
42 : #include "df.h"
43 : #include "tm_p.h"
44 : #include "stringpool.h"
45 : #include "insn-config.h"
46 : #include "regs.h"
47 : #include "emit-rtl.h"
48 : #include "recog.h"
49 : #include "diagnostic-core.h"
50 : #include "alias.h"
51 : #include "fold-const.h"
52 : #include "varasm.h"
53 : #include "cfgrtl.h"
54 : #include "tree-eh.h"
55 : #include "explow.h"
56 : #include "expr.h"
57 : #include "builtins.h"
58 : #include "rtl-iter.h"
59 : #include "stor-layout.h"
60 : #include "opts.h"
61 : #include "optabs.h"
62 : #include "predict.h"
63 : #include "rtx-vector-builder.h"
64 : #include "gimple.h"
65 : #include "gimple-ssa.h"
66 : #include "bbitmap.h"
67 :
68 : struct target_rtl default_target_rtl;
69 : #if SWITCHABLE_TARGET
70 : struct target_rtl *this_target_rtl = &default_target_rtl;
71 : #endif
72 :
73 : #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
74 :
75 : /* Commonly used modes. */
76 :
77 : scalar_int_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
78 : scalar_int_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
79 : scalar_int_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
80 :
81 : /* Datastructures maintained for currently processed function in RTL form. */
82 :
83 : struct rtl_data x_rtl;
84 :
85 : /* Indexed by pseudo register number, gives the rtx for that pseudo.
86 : Allocated in parallel with regno_pointer_align.
87 : FIXME: We could put it into emit_status struct, but gengtype is not able to deal
88 : with length attribute nested in top level structures. */
89 :
90 : rtx * regno_reg_rtx;
91 :
92 : /* This is *not* reset after each function. It gives each CODE_LABEL
93 : in the entire compilation a unique label number. */
94 :
95 : static GTY(()) int label_num = 1;
96 :
97 : /* We record floating-point CONST_DOUBLEs in each floating-point mode for
98 : the values of 0, 1, and 2. For the integer entries and VOIDmode, we
99 : record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
100 : is set only for MODE_INT and MODE_VECTOR_INT modes. */
101 :
102 : rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 :
104 : rtx const_true_rtx;
105 :
106 : REAL_VALUE_TYPE dconst0;
107 : REAL_VALUE_TYPE dconst1;
108 : REAL_VALUE_TYPE dconst2;
109 : REAL_VALUE_TYPE dconstm0;
110 : REAL_VALUE_TYPE dconstm1;
111 : REAL_VALUE_TYPE dconsthalf;
112 : REAL_VALUE_TYPE dconstinf;
113 : REAL_VALUE_TYPE dconstninf;
114 :
115 : /* Record fixed-point constant 0 and 1. */
116 : FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
117 : FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
118 :
119 : /* We make one copy of (const_int C) where C is in
120 : [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
121 : to save space during the compilation and simplify comparisons of
122 : integers. */
123 :
124 : rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
125 :
126 : /* Standard pieces of rtx, to be substituted directly into things. */
127 : rtx pc_rtx;
128 : rtx ret_rtx;
129 : rtx simple_return_rtx;
130 :
131 : /* Marker used for denoting an INSN, which should never be accessed (i.e.,
132 : this pointer should normally never be dereferenced), but is required to be
133 : distinct from NULL_RTX. Currently used by peephole2 pass. */
134 : rtx_insn *invalid_insn_rtx;
135 :
136 : /* A hash table storing CONST_INTs whose absolute value is greater
137 : than MAX_SAVED_CONST_INT. */
138 :
139 : struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
140 : {
141 : typedef HOST_WIDE_INT compare_type;
142 :
143 : static hashval_t hash (rtx i);
144 : static bool equal (rtx i, HOST_WIDE_INT h);
145 : };
146 :
147 : static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
148 :
149 : struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
150 : {
151 : static hashval_t hash (rtx x);
152 : static bool equal (rtx x, rtx y);
153 : };
154 :
155 : static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
156 :
157 : struct const_poly_int_hasher : ggc_cache_ptr_hash<rtx_def>
158 : {
159 : typedef std::pair<machine_mode, poly_wide_int_ref> compare_type;
160 :
161 : static hashval_t hash (rtx x);
162 : static bool equal (rtx x, const compare_type &y);
163 : };
164 :
165 : static GTY ((cache)) hash_table<const_poly_int_hasher> *const_poly_int_htab;
166 :
167 : /* A hash table storing register attribute structures. */
168 : struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
169 : {
170 : static hashval_t hash (reg_attrs *x);
171 : static bool equal (reg_attrs *a, reg_attrs *b);
172 : };
173 :
174 : static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
175 :
176 : /* A hash table storing all CONST_DOUBLEs. */
177 : struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
178 : {
179 : static hashval_t hash (rtx x);
180 : static bool equal (rtx x, rtx y);
181 : };
182 :
183 : static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
184 :
185 : /* A hash table storing all CONST_FIXEDs. */
186 : struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
187 : {
188 : static hashval_t hash (rtx x);
189 : static bool equal (rtx x, rtx y);
190 : };
191 :
192 : static GTY ((cache)) hash_table<const_fixed_hasher> *const_fixed_htab;
193 :
194 : #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
195 : #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
196 : #define first_label_num (crtl->emit.x_first_label_num)
197 :
198 : static void set_used_decls (tree);
199 : static void mark_label_nuses (rtx);
200 : #if TARGET_SUPPORTS_WIDE_INT
201 : static rtx lookup_const_wide_int (rtx);
202 : #endif
203 : static rtx lookup_const_double (rtx);
204 : static rtx lookup_const_fixed (rtx);
205 : static rtx gen_const_vector (machine_mode, int);
206 : static void copy_rtx_if_shared_1 (rtx *orig);
207 :
208 : /* Probability of the conditional branch currently proceeded by try_split. */
209 : profile_probability split_branch_probability;
210 :
211 : /* Returns a hash code for X (which is a really a CONST_INT). */
212 :
213 : hashval_t
214 3490446503 : const_int_hasher::hash (rtx x)
215 : {
216 3490446503 : return (hashval_t) INTVAL (x);
217 : }
218 :
219 : /* Returns true if the value represented by X (which is really a
220 : CONST_INT) is the same as that given by Y (which is really a
221 : HOST_WIDE_INT *). */
222 :
223 : bool
224 4409935867 : const_int_hasher::equal (rtx x, HOST_WIDE_INT y)
225 : {
226 4409935867 : return (INTVAL (x) == y);
227 : }
228 :
229 : #if TARGET_SUPPORTS_WIDE_INT
230 : /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
231 :
232 : hashval_t
233 1473554 : const_wide_int_hasher::hash (rtx x)
234 : {
235 1473554 : int i;
236 1473554 : unsigned HOST_WIDE_INT hash = 0;
237 1473554 : const_rtx xr = x;
238 :
239 4447284 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
240 2973730 : hash += CONST_WIDE_INT_ELT (xr, i);
241 :
242 1473554 : return (hashval_t) hash;
243 : }
244 :
245 : /* Returns true if the value represented by X (which is really a
246 : CONST_WIDE_INT) is the same as that given by Y (which is really a
247 : CONST_WIDE_INT). */
248 :
249 : bool
250 1501497 : const_wide_int_hasher::equal (rtx x, rtx y)
251 : {
252 1501497 : int i;
253 1501497 : const_rtx xr = x;
254 1501497 : const_rtx yr = y;
255 1501497 : if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
256 : return false;
257 :
258 2600161 : for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
259 2079777 : if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
260 : return false;
261 :
262 : return true;
263 : }
264 : #endif
265 :
266 : /* Returns a hash code for CONST_POLY_INT X. */
267 :
268 : hashval_t
269 0 : const_poly_int_hasher::hash (rtx x)
270 : {
271 0 : inchash::hash h;
272 0 : h.add_int (GET_MODE (x));
273 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
274 0 : h.add_wide_int (CONST_POLY_INT_COEFFS (x)[i]);
275 0 : return h.end ();
276 : }
277 :
278 : /* Returns true if CONST_POLY_INT X is an rtx representation of Y. */
279 :
280 : bool
281 0 : const_poly_int_hasher::equal (rtx x, const compare_type &y)
282 : {
283 0 : if (GET_MODE (x) != y.first)
284 : return false;
285 0 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
286 0 : if (CONST_POLY_INT_COEFFS (x)[i] != y.second.coeffs[i])
287 : return false;
288 : return true;
289 : }
290 :
291 : /* Returns a hash code for X (which is really a CONST_DOUBLE). */
292 : hashval_t
293 18783278 : const_double_hasher::hash (rtx x)
294 : {
295 18783278 : const_rtx const value = x;
296 18783278 : hashval_t h;
297 :
298 18783278 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
299 : h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
300 : else
301 : {
302 18783278 : h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
303 : /* MODE is used in the comparison, so it should be in the hash. */
304 18783278 : h ^= GET_MODE (value);
305 : }
306 18783278 : return h;
307 : }
308 :
309 : /* Returns true if the value represented by X (really a ...)
310 : is the same as that represented by Y (really a ...) */
311 : bool
312 12956408 : const_double_hasher::equal (rtx x, rtx y)
313 : {
314 12956408 : const_rtx const a = x, b = y;
315 :
316 12956408 : if (GET_MODE (a) != GET_MODE (b))
317 : return false;
318 4672259 : if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
319 : return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
320 : && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
321 : else
322 4672259 : return real_identical (CONST_DOUBLE_REAL_VALUE (a),
323 4672259 : CONST_DOUBLE_REAL_VALUE (b));
324 : }
325 :
326 : /* Returns a hash code for X (which is really a CONST_FIXED). */
327 :
328 : hashval_t
329 12057705 : const_fixed_hasher::hash (rtx x)
330 : {
331 12057705 : const_rtx const value = x;
332 12057705 : hashval_t h;
333 :
334 12057705 : h = fixed_hash (CONST_FIXED_VALUE (value));
335 : /* MODE is used in the comparison, so it should be in the hash. */
336 12057705 : h ^= GET_MODE (value);
337 12057705 : return h;
338 : }
339 :
340 : /* Returns true if the value represented by X is the same as that
341 : represented by Y. */
342 :
343 : bool
344 6032394 : const_fixed_hasher::equal (rtx x, rtx y)
345 : {
346 6032394 : const_rtx const a = x, b = y;
347 :
348 6032394 : if (GET_MODE (a) != GET_MODE (b))
349 : return false;
350 573996 : return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
351 : }
352 :
353 : /* Return true if the given memory attributes are equal. */
354 :
355 : bool
356 236155155 : mem_attrs_eq_p (const class mem_attrs *p, const class mem_attrs *q)
357 : {
358 236155155 : if (p == q)
359 : return true;
360 233116958 : if (!p || !q)
361 : return false;
362 232505590 : return (p->alias == q->alias
363 146301978 : && p->offset_known_p == q->offset_known_p
364 116085780 : && (!p->offset_known_p || known_eq (p->offset, q->offset))
365 100026475 : && p->size_known_p == q->size_known_p
366 96646182 : && (!p->size_known_p || known_eq (p->size, q->size))
367 83215066 : && p->align == q->align
368 68533173 : && p->addrspace == q->addrspace
369 300756082 : && (p->expr == q->expr
370 32484591 : || (p->expr != NULL_TREE && q->expr != NULL_TREE
371 25247180 : && operand_equal_p (p->expr, q->expr, 0))));
372 : }
373 :
374 : /* Set MEM's memory attributes so that they are the same as ATTRS. */
375 :
376 : static void
377 103025076 : set_mem_attrs (rtx mem, mem_attrs *attrs)
378 : {
379 : /* If everything is the default, we can just clear the attributes. */
380 103025076 : if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
381 : {
382 3362179 : MEM_ATTRS (mem) = 0;
383 3362179 : return;
384 : }
385 :
386 99662897 : if (!MEM_ATTRS (mem)
387 99662897 : || !mem_attrs_eq_p (attrs, MEM_ATTRS (mem)))
388 : {
389 76084343 : MEM_ATTRS (mem) = ggc_alloc<mem_attrs> ();
390 76084343 : memcpy (MEM_ATTRS (mem), attrs, sizeof (mem_attrs));
391 : }
392 : }
393 :
394 : /* Returns a hash code for X (which is a really a reg_attrs *). */
395 :
396 : hashval_t
397 320491639 : reg_attr_hasher::hash (reg_attrs *x)
398 : {
399 320491639 : const reg_attrs *const p = x;
400 :
401 320491639 : inchash::hash h;
402 320491639 : h.add_ptr (p->decl);
403 320491639 : h.add_poly_hwi (p->offset);
404 320491639 : return h.end ();
405 : }
406 :
407 : /* Returns true if the value represented by X is the same as that given by
408 : Y. */
409 :
410 : bool
411 309392618 : reg_attr_hasher::equal (reg_attrs *x, reg_attrs *y)
412 : {
413 309392618 : const reg_attrs *const p = x;
414 309392618 : const reg_attrs *const q = y;
415 :
416 309392618 : return (p->decl == q->decl && known_eq (p->offset, q->offset));
417 : }
418 : /* Allocate a new reg_attrs structure and insert it into the hash table if
419 : one identical to it is not already in the table. We are doing this for
420 : MEM of mode MODE. */
421 :
422 : static reg_attrs *
423 66614427 : get_reg_attrs (tree decl, poly_int64 offset)
424 : {
425 66614427 : reg_attrs attrs;
426 :
427 : /* If everything is the default, we can just return zero. */
428 66614427 : if (decl == 0 && known_eq (offset, 0))
429 : return 0;
430 :
431 60910716 : attrs.decl = decl;
432 60910716 : attrs.offset = offset;
433 :
434 60910716 : reg_attrs **slot = reg_attrs_htab->find_slot (&attrs, INSERT);
435 60910716 : if (*slot == 0)
436 : {
437 30769544 : *slot = ggc_alloc<reg_attrs> ();
438 30769544 : memcpy (*slot, &attrs, sizeof (reg_attrs));
439 : }
440 :
441 60910716 : return *slot;
442 : }
443 :
444 :
445 : #if !HAVE_blockage
446 : /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
447 : and to block register equivalences to be seen across this insn. */
448 :
449 : rtx
450 : gen_blockage (void)
451 : {
452 : rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
453 : MEM_VOLATILE_P (x) = true;
454 : return x;
455 : }
456 : #endif
457 :
458 :
459 : /* Set the mode and register number of X to MODE and REGNO. */
460 :
461 : void
462 1763583235 : set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
463 : {
464 1763583235 : unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
465 1763583235 : ? hard_regno_nregs (regno, mode)
466 1330287693 : : 1);
467 1763583235 : PUT_MODE_RAW (x, mode);
468 1763583235 : set_regno_raw (x, regno, nregs);
469 1763583235 : }
470 :
471 : /* Initialize a fresh REG rtx with mode MODE and register REGNO. */
472 :
473 : rtx
474 359765009 : init_raw_REG (rtx x, machine_mode mode, unsigned int regno)
475 : {
476 359765009 : set_mode_and_regno (x, mode, regno);
477 359765009 : REG_ATTRS (x) = NULL;
478 359765009 : ORIGINAL_REGNO (x) = regno;
479 359765009 : return x;
480 : }
481 :
482 : /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
483 : don't attempt to share with the various global pieces of rtl (such as
484 : frame_pointer_rtx). */
485 :
486 : rtx
487 357600305 : gen_raw_REG (machine_mode mode, unsigned int regno)
488 : {
489 357600305 : rtx x = rtx_alloc (REG MEM_STAT_INFO);
490 357600305 : init_raw_REG (x, mode, regno);
491 357600305 : return x;
492 : }
493 :
494 : /* There are some RTL codes that require special attention; the generation
495 : functions do the raw handling. If you add to this list, modify
496 : special_rtx in gengenrtl.cc as well. */
497 :
498 : rtx_expr_list *
499 210257496 : gen_rtx_EXPR_LIST (machine_mode mode, rtx expr, rtx expr_list)
500 : {
501 210257496 : return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
502 210257496 : expr_list));
503 : }
504 :
505 : rtx_insn_list *
506 97907373 : gen_rtx_INSN_LIST (machine_mode mode, rtx insn, rtx insn_list)
507 : {
508 97907373 : return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
509 97907373 : insn_list));
510 : }
511 :
512 : rtx_insn *
513 840585 : gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
514 : basic_block bb, rtx pattern, location_t location, int code,
515 : rtx reg_notes)
516 : {
517 840585 : return as_a <rtx_insn *> (gen_rtx_fmt_uuBeLie (INSN, mode,
518 : prev_insn, next_insn,
519 : bb, pattern, location, code,
520 840585 : reg_notes));
521 : }
522 :
523 : rtx
524 1348528707 : gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
525 : {
526 1348528707 : if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
527 873763664 : return const_int_rtx[arg + MAX_SAVED_CONST_INT];
528 :
529 : #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
530 : if (const_true_rtx && arg == STORE_FLAG_VALUE)
531 : return const_true_rtx;
532 : #endif
533 :
534 : /* Look up the CONST_INT in the hash table. */
535 474765043 : rtx *slot = const_int_htab->find_slot_with_hash (arg, (hashval_t) arg,
536 : INSERT);
537 474765043 : if (*slot == 0)
538 35780285 : *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
539 :
540 474765043 : return *slot;
541 : }
542 :
543 : /* Return a CONST_INT, CONST_POLY_INT, or CONST_VECTOR containing the given
544 : value. In the case of a vector, the value will be duplicated. */
545 :
546 : rtx
547 1262521127 : gen_int_mode (poly_int64 c, machine_mode mode)
548 : {
549 1262521127 : machine_mode s_mode = (VECTOR_MODE_P (mode) ? GET_MODE_INNER (mode) : mode);
550 1262521127 : rtx val;
551 :
552 1262521127 : c = trunc_int_for_mode (c, s_mode);
553 1262521127 : if (c.is_constant ())
554 1262521127 : val = GEN_INT (c.coeffs[0]);
555 : else
556 : {
557 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (s_mode));
558 : val = immed_wide_int_const (poly_wide_int::from (c, prec, SIGNED),
559 : s_mode);
560 : }
561 :
562 1262521127 : if (VECTOR_MODE_P (mode))
563 0 : val = gen_const_vec_duplicate (mode, val);
564 :
565 1262521127 : return val;
566 : }
567 :
568 : /* CONST_DOUBLEs might be created from pairs of integers, or from
569 : REAL_VALUE_TYPEs. Also, their length is known only at run time,
570 : so we cannot use gen_rtx_raw_CONST_DOUBLE. */
571 :
572 : /* Determine whether REAL, a CONST_DOUBLE, already exists in the
573 : hash table. If so, return its counterpart; otherwise add it
574 : to the hash table and return it. */
575 : static rtx
576 9969577 : lookup_const_double (rtx real)
577 : {
578 9969577 : rtx *slot = const_double_htab->find_slot (real, INSERT);
579 9969577 : if (*slot == 0)
580 7953778 : *slot = real;
581 :
582 9969577 : return *slot;
583 : }
584 :
585 : /* Return a CONST_DOUBLE rtx for a floating-point value specified by
586 : VALUE in mode MODE. */
587 : rtx
588 9969577 : const_double_from_real_value (REAL_VALUE_TYPE value, machine_mode mode)
589 : {
590 9969577 : rtx real = rtx_alloc (CONST_DOUBLE);
591 9969577 : PUT_MODE (real, mode);
592 :
593 9969577 : real->u.rv = value;
594 :
595 9969577 : return lookup_const_double (real);
596 : }
597 :
598 : /* Determine whether FIXED, a CONST_FIXED, already exists in the
599 : hash table. If so, return its counterpart; otherwise add it
600 : to the hash table and return it. */
601 :
602 : static rtx
603 7459842 : lookup_const_fixed (rtx fixed)
604 : {
605 7459842 : rtx *slot = const_fixed_htab->find_slot (fixed, INSERT);
606 7459842 : if (*slot == 0)
607 7459842 : *slot = fixed;
608 :
609 7459842 : return *slot;
610 : }
611 :
612 : /* Return a CONST_FIXED rtx for a fixed-point value specified by
613 : VALUE in mode MODE. */
614 :
615 : rtx
616 7459842 : const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, machine_mode mode)
617 : {
618 7459842 : rtx fixed = rtx_alloc (CONST_FIXED);
619 7459842 : PUT_MODE (fixed, mode);
620 :
621 7459842 : fixed->u.fv = value;
622 :
623 7459842 : return lookup_const_fixed (fixed);
624 : }
625 :
626 : #if TARGET_SUPPORTS_WIDE_INT == 0
627 : /* Constructs double_int from rtx CST. */
628 :
629 : double_int
630 : rtx_to_double_int (const_rtx cst)
631 : {
632 : double_int r;
633 :
634 : if (CONST_INT_P (cst))
635 : r = double_int::from_shwi (INTVAL (cst));
636 : else if (CONST_DOUBLE_AS_INT_P (cst))
637 : {
638 : r.low = CONST_DOUBLE_LOW (cst);
639 : r.high = CONST_DOUBLE_HIGH (cst);
640 : }
641 : else
642 : gcc_unreachable ();
643 :
644 : return r;
645 : }
646 : #endif
647 :
648 : #if TARGET_SUPPORTS_WIDE_INT
649 : /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
650 : If so, return its counterpart; otherwise add it to the hash table and
651 : return it. */
652 :
653 : static rtx
654 580036 : lookup_const_wide_int (rtx wint)
655 : {
656 580036 : rtx *slot = const_wide_int_htab->find_slot (wint, INSERT);
657 580036 : if (*slot == 0)
658 59652 : *slot = wint;
659 :
660 580036 : return *slot;
661 : }
662 : #endif
663 :
664 : /* Return an rtx constant for V, given that the constant has mode MODE.
665 : The returned rtx will be a CONST_INT if V fits, otherwise it will be
666 : a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
667 : (if TARGET_SUPPORTS_WIDE_INT). */
668 :
669 : static rtx
670 663703661 : immed_wide_int_const_1 (const wide_int_ref &v, machine_mode mode)
671 : {
672 663703661 : unsigned int len = v.get_len ();
673 : /* Not scalar_int_mode because we also allow pointer bound modes. */
674 663703661 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
675 :
676 : /* Allow truncation but not extension since we do not know if the
677 : number is signed or unsigned. */
678 663703661 : gcc_assert (prec <= v.get_precision ());
679 :
680 663703661 : if (len < 2 || prec <= HOST_BITS_PER_WIDE_INT)
681 663123625 : return gen_int_mode (v.elt (0), mode);
682 :
683 : #if TARGET_SUPPORTS_WIDE_INT
684 580036 : {
685 580036 : unsigned int i;
686 580036 : rtx value;
687 580036 : unsigned int blocks_needed
688 580036 : = (prec + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT;
689 :
690 580036 : if (len > blocks_needed)
691 : len = blocks_needed;
692 :
693 580036 : value = const_wide_int_alloc (len);
694 :
695 : /* It is so tempting to just put the mode in here. Must control
696 : myself ... */
697 580036 : PUT_MODE (value, VOIDmode);
698 580036 : CWI_PUT_NUM_ELEM (value, len);
699 :
700 1747799 : for (i = 0; i < len; i++)
701 1167763 : CONST_WIDE_INT_ELT (value, i) = v.elt (i);
702 :
703 580036 : return lookup_const_wide_int (value);
704 : }
705 : #else
706 : return immed_double_const (v.elt (0), v.elt (1), mode);
707 : #endif
708 : }
709 :
710 : #if TARGET_SUPPORTS_WIDE_INT == 0
711 : /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
712 : of ints: I0 is the low-order word and I1 is the high-order word.
713 : For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
714 : implied upper bits are copies of the high bit of i1. The value
715 : itself is neither signed nor unsigned. Do not use this routine for
716 : non-integer modes; convert to REAL_VALUE_TYPE and use
717 : const_double_from_real_value. */
718 :
719 : rtx
720 : immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode)
721 : {
722 : rtx value;
723 : unsigned int i;
724 :
725 : /* There are the following cases (note that there are no modes with
726 : HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
727 :
728 : 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
729 : gen_int_mode.
730 : 2) If the value of the integer fits into HOST_WIDE_INT anyway
731 : (i.e., i1 consists only from copies of the sign bit, and sign
732 : of i0 and i1 are the same), then we return a CONST_INT for i0.
733 : 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
734 : scalar_mode smode;
735 : if (is_a <scalar_mode> (mode, &smode)
736 : && GET_MODE_BITSIZE (smode) <= HOST_BITS_PER_WIDE_INT)
737 : return gen_int_mode (i0, mode);
738 :
739 : /* If this integer fits in one word, return a CONST_INT. */
740 : if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
741 : return GEN_INT (i0);
742 :
743 : /* We use VOIDmode for integers. */
744 : value = rtx_alloc (CONST_DOUBLE);
745 : PUT_MODE (value, VOIDmode);
746 :
747 : CONST_DOUBLE_LOW (value) = i0;
748 : CONST_DOUBLE_HIGH (value) = i1;
749 :
750 : for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
751 : XWINT (value, i) = 0;
752 :
753 : return lookup_const_double (value);
754 : }
755 : #endif
756 :
757 : /* Return an rtx representation of C in mode MODE. */
758 :
759 : rtx
760 663703661 : immed_wide_int_const (const poly_wide_int_ref &c, machine_mode mode)
761 : {
762 663703661 : if (c.is_constant ())
763 663703661 : return immed_wide_int_const_1 (c.coeffs[0], mode);
764 :
765 : /* Not scalar_int_mode because we also allow pointer bound modes. */
766 : unsigned int prec = GET_MODE_PRECISION (as_a <scalar_mode> (mode));
767 :
768 : /* Allow truncation but not extension since we do not know if the
769 : number is signed or unsigned. */
770 : gcc_assert (prec <= c.coeffs[0].get_precision ());
771 : poly_wide_int newc = poly_wide_int::from (c, prec, SIGNED);
772 :
773 : /* See whether we already have an rtx for this constant. */
774 : inchash::hash h;
775 : h.add_int (mode);
776 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
777 : h.add_wide_int (newc.coeffs[i]);
778 : const_poly_int_hasher::compare_type typed_value (mode, newc);
779 : rtx *slot = const_poly_int_htab->find_slot_with_hash (typed_value,
780 : h.end (), INSERT);
781 : rtx x = *slot;
782 : if (x)
783 : return x;
784 :
785 : /* Create a new rtx. There's a choice to be made here between installing
786 : the actual mode of the rtx or leaving it as VOIDmode (for consistency
787 : with CONST_INT). In practice the handling of the codes is different
788 : enough that we get no benefit from using VOIDmode, and various places
789 : assume that VOIDmode implies CONST_INT. Using the real mode seems like
790 : the right long-term direction anyway. */
791 : typedef trailing_wide_ints<NUM_POLY_INT_COEFFS> twi;
792 : size_t extra_size = twi::extra_size (prec);
793 : x = rtx_alloc_v (CONST_POLY_INT,
794 : sizeof (struct const_poly_int_def) + extra_size);
795 : PUT_MODE (x, mode);
796 : CONST_POLY_INT_COEFFS (x).set_precision (prec);
797 : for (unsigned int i = 0; i < NUM_POLY_INT_COEFFS; ++i)
798 : CONST_POLY_INT_COEFFS (x)[i] = newc.coeffs[i];
799 :
800 : *slot = x;
801 : return x;
802 : }
803 :
804 : rtx
805 197137969 : gen_rtx_REG (machine_mode mode, unsigned int regno)
806 : {
807 : /* In case the MD file explicitly references the frame pointer, have
808 : all such references point to the same frame pointer. This is
809 : used during frame pointer elimination to distinguish the explicit
810 : references to these registers from pseudos that happened to be
811 : assigned to them.
812 :
813 : If we have eliminated the frame pointer or arg pointer, we will
814 : be using it as a normal register, for example as a spill
815 : register. In such cases, we might be accessing it in a mode that
816 : is not Pmode and therefore cannot use the pre-allocated rtx.
817 :
818 : Also don't do this when we are making new REGs in reload, since
819 : we don't want to get confused with the real pointers. */
820 :
821 211730453 : if (mode == Pmode && !reload_in_progress && !lra_in_progress)
822 : {
823 63926652 : if (regno == FRAME_POINTER_REGNUM
824 3038584 : && (!reload_completed || frame_pointer_needed))
825 3038584 : return frame_pointer_rtx;
826 :
827 60888068 : if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
828 : && regno == HARD_FRAME_POINTER_REGNUM
829 4348178 : && (!reload_completed || frame_pointer_needed))
830 3819053 : return hard_frame_pointer_rtx;
831 : #if !HARD_FRAME_POINTER_IS_ARG_POINTER
832 57069015 : if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
833 : && regno == ARG_POINTER_REGNUM)
834 3043023 : return arg_pointer_rtx;
835 : #endif
836 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
837 : if (regno == RETURN_ADDRESS_POINTER_REGNUM)
838 : return return_address_pointer_rtx;
839 : #endif
840 54025992 : if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
841 0 : && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
842 54025992 : && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
843 0 : return pic_offset_table_rtx;
844 54025992 : if (regno == STACK_POINTER_REGNUM)
845 4068798 : return stack_pointer_rtx;
846 : }
847 :
848 : #if 0
849 : /* If the per-function register table has been set up, try to re-use
850 : an existing entry in that table to avoid useless generation of RTL.
851 :
852 : This code is disabled for now until we can fix the various backends
853 : which depend on having non-shared hard registers in some cases. Long
854 : term we want to re-enable this code as it can significantly cut down
855 : on the amount of useless RTL that gets generated.
856 :
857 : We'll also need to fix some code that runs after reload that wants to
858 : set ORIGINAL_REGNO. */
859 :
860 : if (cfun
861 : && cfun->emit
862 : && regno_reg_rtx
863 : && regno < FIRST_PSEUDO_REGISTER
864 : && reg_raw_mode[regno] == mode)
865 : return regno_reg_rtx[regno];
866 : #endif
867 :
868 183168511 : return gen_raw_REG (mode, regno);
869 : }
870 :
871 : rtx
872 255234706 : gen_rtx_MEM (machine_mode mode, rtx addr)
873 : {
874 255234706 : rtx rt = gen_rtx_raw_MEM (mode, addr);
875 :
876 : /* This field is not cleared by the mere allocation of the rtx, so
877 : we clear it here. */
878 255234706 : MEM_ATTRS (rt) = 0;
879 :
880 255234706 : return rt;
881 : }
882 :
883 : /* Generate a memory referring to non-trapping constant memory. */
884 :
885 : rtx
886 2149720 : gen_const_mem (machine_mode mode, rtx addr)
887 : {
888 2149720 : rtx mem = gen_rtx_MEM (mode, addr);
889 2149720 : MEM_READONLY_P (mem) = 1;
890 2149720 : MEM_NOTRAP_P (mem) = 1;
891 2149720 : return mem;
892 : }
893 :
894 : /* Generate a MEM referring to fixed portions of the frame, e.g., register
895 : save areas. */
896 :
897 : rtx
898 1234758 : gen_frame_mem (machine_mode mode, rtx addr)
899 : {
900 1234758 : rtx mem = gen_rtx_MEM (mode, addr);
901 1234758 : MEM_NOTRAP_P (mem) = 1;
902 1234758 : set_mem_alias_set (mem, get_frame_alias_set ());
903 1234758 : return mem;
904 : }
905 :
906 : /* Generate a MEM referring to a temporary use of the stack, not part
907 : of the fixed stack frame. For example, something which is pushed
908 : by a target splitter. */
909 : rtx
910 0 : gen_tmp_stack_mem (machine_mode mode, rtx addr)
911 : {
912 0 : rtx mem = gen_rtx_MEM (mode, addr);
913 0 : MEM_NOTRAP_P (mem) = 1;
914 0 : if (!cfun->calls_alloca)
915 0 : set_mem_alias_set (mem, get_frame_alias_set ());
916 0 : return mem;
917 : }
918 :
919 : /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
920 : this construct would be valid, and false otherwise. */
921 :
922 : bool
923 51425959 : validate_subreg (machine_mode omode, machine_mode imode,
924 : const_rtx reg, poly_uint64 offset)
925 : {
926 102851918 : poly_uint64 isize = GET_MODE_SIZE (imode);
927 102851918 : poly_uint64 osize = GET_MODE_SIZE (omode);
928 :
929 : /* The sizes must be ordered, so that we know whether the subreg
930 : is partial, paradoxical or complete. */
931 51425959 : if (!ordered_p (isize, osize))
932 : return false;
933 :
934 : /* All subregs must be aligned. */
935 51425959 : if (!multiple_p (offset, osize))
936 : return false;
937 :
938 : /* The subreg offset cannot be outside the inner object. */
939 51425939 : if (maybe_ge (offset, isize))
940 : return false;
941 :
942 51425939 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode);
943 :
944 : /* ??? This should not be here. Temporarily continue to allow word_mode
945 : subregs of anything. The most common offender is (subreg:SI (reg:DF)).
946 : Generally, backends are doing something sketchy but it'll take time to
947 : fix them all. */
948 51425939 : if (omode == word_mode)
949 : ;
950 : /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
951 : is the culprit here, and not the backends. */
952 31813102 : else if (known_ge (osize, regsize) && known_ge (isize, osize))
953 : ;
954 : /* Allow component subregs of complex and vector. Though given the below
955 : extraction rules, it's not always clear what that means. */
956 25382426 : else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
957 26588833 : && GET_MODE_INNER (imode) == omode)
958 : ;
959 : /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
960 : i.e. (subreg:V4SF (reg:SF) 0) or (subreg:V4SF (reg:V2SF) 0). This
961 : surely isn't the cleanest way to represent this. It's questionable
962 : if this ought to be represented at all -- why can't this all be hidden
963 : in post-reload splitters that make arbitrarily mode changes to the
964 : registers themselves. */
965 23928823 : else if (VECTOR_MODE_P (omode)
966 26209155 : && GET_MODE_UNIT_SIZE (omode) == GET_MODE_UNIT_SIZE (imode))
967 : ;
968 : /* Subregs involving floating point modes are not allowed to
969 : change size unless it's an insert into a complex mode.
970 : Therefore (subreg:DI (reg:DF) 0) and (subreg:CS (reg:SF) 0) are fine, but
971 : (subreg:SI (reg:DF) 0) isn't. */
972 23825087 : else if ((FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
973 326196 : && !COMPLEX_MODE_P (omode))
974 : {
975 326034 : if (! (known_eq (isize, osize)
976 : /* LRA can use subreg to store a floating point value in
977 : an integer mode. Although the floating point and the
978 : integer modes need the same number of hard registers,
979 : the size of floating point mode can be less than the
980 : integer mode. LRA also uses subregs for a register
981 : should be used in different mode in on insn. */
982 72978 : || lra_in_progress))
983 : return false;
984 : }
985 :
986 : /* Paradoxical subregs must have offset zero. */
987 51354962 : if (maybe_gt (osize, isize) && !known_eq (offset, 0U))
988 : return false;
989 :
990 : /* Verify that the offset is representable. */
991 :
992 : /* Ensure that subregs of hard registers can be folded. In other words,
993 : the hardware register must be valid in the subreg's outer mode,
994 : and consequently the subreg can be replaced with a hardware register. */
995 51354962 : if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
996 : {
997 314951 : unsigned int regno = REGNO (reg);
998 :
999 314951 : if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
1000 609165 : && GET_MODE_INNER (imode) == omode)
1001 : ;
1002 116448 : else if (!REG_CAN_CHANGE_MODE_P (regno, imode, omode))
1003 : return false;
1004 :
1005 : /* Pass true to allow_stack_regs because targets like x86
1006 : expect to be able to take subregs of the stack pointer. */
1007 314854 : return simplify_subreg_regno (regno, imode, offset, omode, true) >= 0;
1008 : }
1009 : /* Do not allow normal SUBREG with stricter alignment than the inner MEM.
1010 :
1011 : PR120329: Combine can create paradoxical mem subregs even for
1012 : strict-alignment targets. Allow it until combine is fixed. */
1013 51040011 : else if (reg && MEM_P (reg) && STRICT_ALIGNMENT
1014 : && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)
1015 : && known_le (osize, isize))
1016 : return false;
1017 :
1018 : /* If ISIZE is greater than REGSIZE, the inner value is split into blocks
1019 : of size REGSIZE. The outer size must then be ordered wrt REGSIZE,
1020 : otherwise we wouldn't know at compile time how many blocks the
1021 : outer mode occupies. */
1022 51040011 : if (maybe_gt (isize, regsize) && !ordered_p (osize, regsize))
1023 : return false;
1024 :
1025 : /* For normal pseudo registers, we want most of the same checks. Namely:
1026 :
1027 : Assume that the pseudo register will be allocated to hard registers
1028 : that can hold REGSIZE bytes each. If OSIZE is not a multiple of REGSIZE,
1029 : the remainder must correspond to the lowpart of the containing hard
1030 : register. If BYTES_BIG_ENDIAN, the lowpart is at the highest offset,
1031 : otherwise it is at the lowest offset.
1032 :
1033 : Given that we've already checked the mode and offset alignment,
1034 : we only have to check subblock subregs here.
1035 :
1036 : For paradoxical little-endian registers, this check is redundant. The
1037 : offset has already been validated to be zero.
1038 :
1039 : For paradoxical big-endian registers, this check is not valid
1040 : because the offset is zero. */
1041 51040011 : if (maybe_lt (osize, regsize)
1042 24494021 : && known_le (osize, isize)
1043 68236171 : && ! (lra_in_progress && (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))))
1044 : {
1045 : /* It is invalid for the target to pick a register size for a mode
1046 : that isn't ordered wrt to the size of that mode. */
1047 17182096 : poly_uint64 block_size = ordered_min (isize, regsize);
1048 17182096 : unsigned int start_reg;
1049 17182096 : poly_uint64 offset_within_reg;
1050 17182096 : if (!can_div_trunc_p (offset, block_size, &start_reg, &offset_within_reg)
1051 17182096 : || (BYTES_BIG_ENDIAN
1052 : ? maybe_ne (offset_within_reg, block_size - osize)
1053 17182096 : : maybe_ne (offset_within_reg, 0U)))
1054 4278 : return false;
1055 : }
1056 : return true;
1057 : }
1058 :
1059 : rtx
1060 25507425 : gen_rtx_SUBREG (machine_mode mode, rtx reg, poly_uint64 offset)
1061 : {
1062 25507425 : gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
1063 25507425 : return gen_rtx_raw_SUBREG (mode, reg, offset);
1064 : }
1065 :
1066 : /* Generate a SUBREG representing the least-significant part of REG if MODE
1067 : is smaller than mode of REG, otherwise paradoxical SUBREG. */
1068 :
1069 : rtx
1070 600657 : gen_lowpart_SUBREG (machine_mode mode, rtx reg)
1071 : {
1072 600657 : machine_mode inmode;
1073 :
1074 600657 : inmode = GET_MODE (reg);
1075 600657 : if (inmode == VOIDmode)
1076 0 : inmode = mode;
1077 600657 : return gen_rtx_SUBREG (mode, reg,
1078 600657 : subreg_lowpart_offset (mode, inmode));
1079 : }
1080 :
1081 : rtx
1082 111629950 : gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
1083 : enum var_init_status status)
1084 : {
1085 111629950 : rtx x = gen_rtx_fmt_te (VAR_LOCATION, mode, decl, loc);
1086 111629950 : PAT_VAR_LOCATION_STATUS (x) = status;
1087 111629950 : return x;
1088 : }
1089 :
1090 :
1091 : /* Create an rtvec and stores within it the RTXen passed in the arguments. */
1092 :
1093 : rtvec
1094 25151953 : gen_rtvec (int n, ...)
1095 : {
1096 25151953 : int i;
1097 25151953 : rtvec rt_val;
1098 25151953 : va_list p;
1099 :
1100 25151953 : va_start (p, n);
1101 :
1102 : /* Don't allocate an empty rtvec... */
1103 25151953 : if (n == 0)
1104 : {
1105 0 : va_end (p);
1106 0 : return NULL_RTVEC;
1107 : }
1108 :
1109 25151953 : rt_val = rtvec_alloc (n);
1110 :
1111 95738355 : for (i = 0; i < n; i++)
1112 45434449 : rt_val->elem[i] = va_arg (p, rtx);
1113 :
1114 25151953 : va_end (p);
1115 25151953 : return rt_val;
1116 : }
1117 :
1118 : rtvec
1119 471619 : gen_rtvec_v (int n, rtx *argp)
1120 : {
1121 471619 : int i;
1122 471619 : rtvec rt_val;
1123 :
1124 : /* Don't allocate an empty rtvec... */
1125 471619 : if (n == 0)
1126 : return NULL_RTVEC;
1127 :
1128 471619 : rt_val = rtvec_alloc (n);
1129 :
1130 2144188 : for (i = 0; i < n; i++)
1131 1200950 : rt_val->elem[i] = *argp++;
1132 :
1133 : return rt_val;
1134 : }
1135 :
1136 : rtvec
1137 0 : gen_rtvec_v (int n, rtx_insn **argp)
1138 : {
1139 0 : int i;
1140 0 : rtvec rt_val;
1141 :
1142 : /* Don't allocate an empty rtvec... */
1143 0 : if (n == 0)
1144 : return NULL_RTVEC;
1145 :
1146 0 : rt_val = rtvec_alloc (n);
1147 :
1148 0 : for (i = 0; i < n; i++)
1149 0 : rt_val->elem[i] = *argp++;
1150 :
1151 : return rt_val;
1152 : }
1153 :
1154 :
1155 : /* Return the number of bytes between the start of an OUTER_MODE
1156 : in-memory value and the start of an INNER_MODE in-memory value,
1157 : given that the former is a lowpart of the latter. It may be a
1158 : paradoxical lowpart, in which case the offset will be negative
1159 : on big-endian targets. */
1160 :
1161 : poly_int64
1162 75354626 : byte_lowpart_offset (machine_mode outer_mode,
1163 : machine_mode inner_mode)
1164 : {
1165 75354626 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1166 3878932 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1167 : else
1168 71475694 : return subreg_lowpart_offset (outer_mode, inner_mode);
1169 : }
1170 :
1171 : /* Return the offset of (subreg:OUTER_MODE (mem:INNER_MODE X) OFFSET)
1172 : from address X. For paradoxical big-endian subregs this is a
1173 : negative value, otherwise it's the same as OFFSET. */
1174 :
1175 : poly_int64
1176 12499767 : subreg_memory_offset (machine_mode outer_mode, machine_mode inner_mode,
1177 : poly_uint64 offset)
1178 : {
1179 12499767 : if (paradoxical_subreg_p (outer_mode, inner_mode))
1180 : {
1181 3426690 : gcc_assert (known_eq (offset, 0U));
1182 3426690 : return -subreg_lowpart_offset (inner_mode, outer_mode);
1183 : }
1184 9073077 : return offset;
1185 : }
1186 :
1187 : /* As above, but return the offset that existing subreg X would have
1188 : if SUBREG_REG (X) were stored in memory. The only significant thing
1189 : about the current SUBREG_REG is its mode. */
1190 :
1191 : poly_int64
1192 682684 : subreg_memory_offset (const_rtx x)
1193 : {
1194 1365368 : return subreg_memory_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
1195 682684 : SUBREG_BYTE (x));
1196 : }
1197 :
1198 : /* Generate a REG rtx for a new pseudo register of mode MODE.
1199 : This pseudo is assigned the next sequential register number. */
1200 :
1201 : rtx
1202 69413064 : gen_reg_rtx (machine_mode mode)
1203 : {
1204 69413064 : rtx val;
1205 69413064 : unsigned int align = GET_MODE_ALIGNMENT (mode);
1206 :
1207 69413064 : gcc_assert (can_create_pseudo_p ());
1208 :
1209 : /* If a virtual register with bigger mode alignment is generated,
1210 : increase stack alignment estimation because it might be spilled
1211 : to stack later. */
1212 69413064 : if (SUPPORTS_STACK_ALIGNMENT
1213 69413064 : && crtl->stack_alignment_estimated < align
1214 376698 : && !crtl->stack_realign_processed)
1215 : {
1216 375631 : unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
1217 375631 : if (crtl->stack_alignment_estimated < min_align)
1218 375631 : crtl->stack_alignment_estimated = min_align;
1219 : }
1220 :
1221 69413064 : if (generating_concat_p
1222 52293413 : && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
1223 52293413 : || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
1224 : {
1225 : /* For complex modes, don't make a single pseudo.
1226 : Instead, make a CONCAT of two pseudos.
1227 : This allows noncontiguous allocation of the real and imaginary parts,
1228 : which makes much better code. Besides, allocating DCmode
1229 : pseudos overstrains reload on some machines like the 386. */
1230 225422 : rtx realpart, imagpart;
1231 225422 : machine_mode partmode = GET_MODE_INNER (mode);
1232 :
1233 225422 : realpart = gen_reg_rtx (partmode);
1234 225422 : imagpart = gen_reg_rtx (partmode);
1235 225422 : return gen_rtx_CONCAT (mode, realpart, imagpart);
1236 : }
1237 :
1238 : /* Do not call gen_reg_rtx with uninitialized crtl. */
1239 69187642 : gcc_assert (crtl->emit.regno_pointer_align_length);
1240 :
1241 69187642 : crtl->emit.ensure_regno_capacity ();
1242 69187642 : gcc_assert (reg_rtx_no < crtl->emit.regno_pointer_align_length);
1243 :
1244 69187642 : val = gen_raw_REG (mode, reg_rtx_no);
1245 69187642 : regno_reg_rtx[reg_rtx_no++] = val;
1246 69187642 : return val;
1247 : }
1248 :
1249 : /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1250 : enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1251 :
1252 : void
1253 69188868 : emit_status::ensure_regno_capacity ()
1254 : {
1255 69188868 : int old_size = regno_pointer_align_length;
1256 :
1257 69188868 : if (reg_rtx_no < old_size)
1258 : return;
1259 :
1260 182586 : int new_size = old_size * 2;
1261 182586 : while (reg_rtx_no >= new_size)
1262 0 : new_size *= 2;
1263 :
1264 182586 : char *tmp = XRESIZEVEC (char, regno_pointer_align, new_size);
1265 182586 : memset (tmp + old_size, 0, new_size - old_size);
1266 182586 : regno_pointer_align = (unsigned char *) tmp;
1267 :
1268 182586 : rtx *new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, new_size);
1269 182586 : memset (new1 + old_size, 0, (new_size - old_size) * sizeof (rtx));
1270 182586 : regno_reg_rtx = new1;
1271 :
1272 182586 : crtl->emit.regno_pointer_align_length = new_size;
1273 : }
1274 :
1275 : /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1276 :
1277 : bool
1278 11892 : reg_is_parm_p (rtx reg)
1279 : {
1280 11892 : tree decl;
1281 :
1282 11892 : gcc_assert (REG_P (reg));
1283 11892 : decl = REG_EXPR (reg);
1284 9446 : return (decl && TREE_CODE (decl) == PARM_DECL);
1285 : }
1286 :
1287 : /* Update NEW with the same attributes as REG, but with OFFSET added
1288 : to the REG_OFFSET. */
1289 :
1290 : static void
1291 18634420 : update_reg_offset (rtx new_rtx, rtx reg, poly_int64 offset)
1292 : {
1293 18634420 : REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
1294 18634420 : REG_OFFSET (reg) + offset);
1295 18634420 : }
1296 :
1297 : /* Generate a register with same attributes as REG, but with OFFSET
1298 : added to the REG_OFFSET. */
1299 :
1300 : rtx
1301 11016785 : gen_rtx_REG_offset (rtx reg, machine_mode mode, unsigned int regno,
1302 : poly_int64 offset)
1303 : {
1304 : /* Use gen_raw_REG rather than gen_rtx_REG, because otherwise we'd
1305 : overwrite REG_ATTRS (and in the callers often ORIGINAL_REGNO too)
1306 : of the shared REG rtxes like stack_pointer_rtx etc. This should
1307 : happen only for SUBREGs from DEBUG_INSNs, RA should ensure
1308 : multi-word registers don't overlap the special registers like
1309 : stack pointer. */
1310 11016785 : rtx new_rtx = gen_raw_REG (mode, regno);
1311 :
1312 11016785 : update_reg_offset (new_rtx, reg, offset);
1313 11016785 : return new_rtx;
1314 : }
1315 :
1316 : /* Generate a new pseudo-register with the same attributes as REG, but
1317 : with OFFSET added to the REG_OFFSET. */
1318 :
1319 : rtx
1320 636042 : gen_reg_rtx_offset (rtx reg, machine_mode mode, int offset)
1321 : {
1322 636042 : rtx new_rtx = gen_reg_rtx (mode);
1323 :
1324 636042 : update_reg_offset (new_rtx, reg, offset);
1325 636042 : return new_rtx;
1326 : }
1327 :
1328 : /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1329 : new register is a (possibly paradoxical) lowpart of the old one. */
1330 :
1331 : void
1332 2871716 : adjust_reg_mode (rtx reg, machine_mode mode)
1333 : {
1334 2871716 : update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
1335 2871716 : PUT_MODE (reg, mode);
1336 2871716 : }
1337 :
1338 : /* Copy REG's attributes from X, if X has any attributes. If REG and X
1339 : have different modes, REG is a (possibly paradoxical) lowpart of X. */
1340 :
1341 : void
1342 76639983 : set_reg_attrs_from_value (rtx reg, rtx x)
1343 : {
1344 76639983 : poly_int64 offset;
1345 76639983 : bool can_be_reg_pointer = true;
1346 :
1347 : /* Don't call mark_reg_pointer for incompatible pointer sign
1348 : extension. */
1349 76639983 : while (GET_CODE (x) == SIGN_EXTEND
1350 : || GET_CODE (x) == ZERO_EXTEND
1351 77691077 : || GET_CODE (x) == TRUNCATE
1352 77691077 : || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
1353 : {
1354 : #if defined(POINTERS_EXTEND_UNSIGNED)
1355 1051094 : if (((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
1356 : || (GET_CODE (x) == ZERO_EXTEND && ! POINTERS_EXTEND_UNSIGNED)
1357 491398 : || (paradoxical_subreg_p (x)
1358 17949 : && ! (SUBREG_PROMOTED_VAR_P (x)
1359 0 : && SUBREG_CHECK_PROMOTED_SIGN (x,
1360 : POINTERS_EXTEND_UNSIGNED))))
1361 1069043 : && !targetm.have_ptr_extend ())
1362 : can_be_reg_pointer = false;
1363 : #endif
1364 1051094 : x = XEXP (x, 0);
1365 : }
1366 :
1367 : /* Hard registers can be reused for multiple purposes within the same
1368 : function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1369 : on them is wrong. */
1370 76639983 : if (HARD_REGISTER_P (reg))
1371 49791681 : return;
1372 :
1373 26848302 : offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1374 26848302 : if (MEM_P (x))
1375 : {
1376 5711569 : if (MEM_OFFSET_KNOWN_P (x))
1377 2710086 : REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1378 2710086 : MEM_OFFSET (x) + offset);
1379 5245347 : if (can_be_reg_pointer && MEM_POINTER (x))
1380 674100 : mark_reg_pointer (reg, 0);
1381 : }
1382 21602955 : else if (REG_P (x))
1383 : {
1384 7047383 : if (REG_ATTRS (x))
1385 4109877 : update_reg_offset (reg, x, offset);
1386 7047383 : if (can_be_reg_pointer && REG_POINTER (x))
1387 1955667 : mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1388 : }
1389 : }
1390 :
1391 : /* Generate a REG rtx for a new pseudo register, copying the mode
1392 : and attributes from X. */
1393 :
1394 : rtx
1395 573454 : gen_reg_rtx_and_attrs (rtx x)
1396 : {
1397 573454 : rtx reg = gen_reg_rtx (GET_MODE (x));
1398 573454 : set_reg_attrs_from_value (reg, x);
1399 573454 : return reg;
1400 : }
1401 :
1402 : /* Set the register attributes for registers contained in PARM_RTX.
1403 : Use needed values from memory attributes of MEM. */
1404 :
1405 : void
1406 110335 : set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1407 : {
1408 110335 : if (REG_P (parm_rtx))
1409 110335 : set_reg_attrs_from_value (parm_rtx, mem);
1410 0 : else if (GET_CODE (parm_rtx) == PARALLEL)
1411 : {
1412 : /* Check for a NULL entry in the first slot, used to indicate that the
1413 : parameter goes both on the stack and in registers. */
1414 0 : int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1415 0 : for (; i < XVECLEN (parm_rtx, 0); i++)
1416 : {
1417 0 : rtx x = XVECEXP (parm_rtx, 0, i);
1418 0 : if (REG_P (XEXP (x, 0)))
1419 0 : REG_ATTRS (XEXP (x, 0))
1420 0 : = get_reg_attrs (MEM_EXPR (mem),
1421 0 : INTVAL (XEXP (x, 1)));
1422 : }
1423 : }
1424 110335 : }
1425 :
1426 : /* Set the REG_ATTRS for registers in value X, given that X represents
1427 : decl T. */
1428 :
1429 : void
1430 67952661 : set_reg_attrs_for_decl_rtl (tree t, rtx x)
1431 : {
1432 67952661 : if (!t)
1433 : return;
1434 67952465 : tree tdecl = t;
1435 67952465 : if (GET_CODE (x) == SUBREG)
1436 : {
1437 621 : gcc_assert (subreg_lowpart_p (x));
1438 621 : x = SUBREG_REG (x);
1439 : }
1440 67952465 : if (REG_P (x))
1441 44697490 : REG_ATTRS (x)
1442 44697490 : = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1443 44697490 : DECL_P (tdecl)
1444 21867299 : ? DECL_MODE (tdecl)
1445 22830191 : : TYPE_MODE (TREE_TYPE (tdecl))));
1446 67952465 : if (GET_CODE (x) == CONCAT)
1447 : {
1448 228809 : if (REG_P (XEXP (x, 0)))
1449 228809 : REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1450 228809 : if (REG_P (XEXP (x, 1)))
1451 228809 : REG_ATTRS (XEXP (x, 1))
1452 457618 : = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1453 : }
1454 67952465 : if (GET_CODE (x) == PARALLEL)
1455 : {
1456 61635 : int i, start;
1457 :
1458 : /* Check for a NULL entry, used to indicate that the parameter goes
1459 : both on the stack and in registers. */
1460 61635 : if (XEXP (XVECEXP (x, 0, 0), 0))
1461 : start = 0;
1462 : else
1463 0 : start = 1;
1464 :
1465 176448 : for (i = start; i < XVECLEN (x, 0); i++)
1466 : {
1467 114813 : rtx y = XVECEXP (x, 0, i);
1468 114813 : if (REG_P (XEXP (y, 0)))
1469 114813 : REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1470 : }
1471 : }
1472 : }
1473 :
1474 : /* Assign the RTX X to declaration T. */
1475 :
1476 : void
1477 654127861 : set_decl_rtl (tree t, rtx x)
1478 : {
1479 654127861 : DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1480 654127861 : if (x)
1481 34267556 : set_reg_attrs_for_decl_rtl (t, x);
1482 654127861 : }
1483 :
1484 : /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1485 : if the ABI requires the parameter to be passed by reference. */
1486 :
1487 : void
1488 3259865 : set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1489 : {
1490 3259865 : DECL_INCOMING_RTL (t) = x;
1491 3259865 : if (x && !by_reference_p)
1492 3254899 : set_reg_attrs_for_decl_rtl (t, x);
1493 3259865 : }
1494 :
1495 : /* Identify REG (which may be a CONCAT) as a user register. */
1496 :
1497 : void
1498 6413087 : mark_user_reg (rtx reg)
1499 : {
1500 6413087 : if (GET_CODE (reg) == CONCAT)
1501 : {
1502 3344 : REG_USERVAR_P (XEXP (reg, 0)) = 1;
1503 3344 : REG_USERVAR_P (XEXP (reg, 1)) = 1;
1504 : }
1505 : else
1506 : {
1507 6409743 : gcc_assert (REG_P (reg));
1508 6409743 : REG_USERVAR_P (reg) = 1;
1509 : }
1510 6413087 : }
1511 :
1512 : /* Identify REG as a probable pointer register and show its alignment
1513 : as ALIGN, if nonzero. */
1514 :
1515 : void
1516 17547095 : mark_reg_pointer (rtx reg, int align)
1517 : {
1518 17547095 : if (! REG_POINTER (reg))
1519 : {
1520 11129207 : REG_POINTER (reg) = 1;
1521 :
1522 11129207 : if (align)
1523 9656240 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1524 : }
1525 6417888 : else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1526 : /* We can no-longer be sure just how aligned this pointer is. */
1527 1330102 : REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1528 17547095 : }
1529 :
1530 : /* Return 1 plus largest pseudo reg number used in the current function. */
1531 :
1532 : int
1533 7194627093 : max_reg_num (void)
1534 : {
1535 7194627093 : return reg_rtx_no;
1536 : }
1537 :
1538 : /* Return 1 + the largest label number used so far in the current function. */
1539 :
1540 : int
1541 4110205 : max_label_num (void)
1542 : {
1543 4110205 : return label_num;
1544 : }
1545 :
1546 : /* Return first label number used in this function (if any were used). */
1547 :
1548 : int
1549 2592372 : get_first_label_num (void)
1550 : {
1551 2592372 : return first_label_num;
1552 : }
1553 :
1554 : /* If the rtx for label was created during the expansion of a nested
1555 : function, then first_label_num won't include this label number.
1556 : Fix this now so that array indices work later. */
1557 :
1558 : void
1559 27101 : maybe_set_first_label_num (rtx_code_label *x)
1560 : {
1561 27101 : if (CODE_LABEL_NUMBER (x) < first_label_num)
1562 389 : first_label_num = CODE_LABEL_NUMBER (x);
1563 27101 : }
1564 :
1565 : /* For use by the RTL function loader, when mingling with normal
1566 : functions.
1567 : Ensure that label_num is greater than the label num of X, to avoid
1568 : duplicate labels in the generated assembler. */
1569 :
1570 : void
1571 28 : maybe_set_max_label_num (rtx_code_label *x)
1572 : {
1573 28 : if (CODE_LABEL_NUMBER (x) >= label_num)
1574 24 : label_num = CODE_LABEL_NUMBER (x) + 1;
1575 28 : }
1576 :
1577 :
1578 : /* Return a value representing some low-order bits of X, where the number
1579 : of low-order bits is given by MODE. Note that no conversion is done
1580 : between floating-point and fixed-point values, rather, the bit
1581 : representation is returned.
1582 :
1583 : This function handles the cases in common between gen_lowpart, below,
1584 : and two variants in cse.cc and combine.cc. These are the cases that can
1585 : be safely handled at all points in the compilation.
1586 :
1587 : If this is not a case we can handle, return 0. */
1588 :
1589 : rtx
1590 53865721 : gen_lowpart_common (machine_mode mode, rtx x)
1591 : {
1592 107757008 : poly_uint64 msize = GET_MODE_SIZE (mode);
1593 53878504 : machine_mode innermode;
1594 :
1595 : /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1596 : so we have to make one up. Yuk. */
1597 53878504 : innermode = GET_MODE (x);
1598 53878504 : if (CONST_INT_P (x)
1599 53878504 : && known_le (msize * BITS_PER_UNIT,
1600 : (unsigned HOST_WIDE_INT) HOST_BITS_PER_WIDE_INT))
1601 16082338 : innermode = int_mode_for_size (HOST_BITS_PER_WIDE_INT, 0).require ();
1602 37796166 : else if (innermode == VOIDmode)
1603 195782 : innermode = int_mode_for_size (HOST_BITS_PER_DOUBLE_INT, 0).require ();
1604 :
1605 53878504 : gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1606 :
1607 53878504 : if (innermode == mode)
1608 : return x;
1609 :
1610 : /* The size of the outer and inner modes must be ordered. */
1611 61731746 : poly_uint64 xsize = GET_MODE_SIZE (innermode);
1612 30865873 : if (!ordered_p (msize, xsize))
1613 : return 0;
1614 :
1615 30865873 : if (SCALAR_FLOAT_MODE_P (mode))
1616 : {
1617 : /* Don't allow paradoxical FLOAT_MODE subregs. */
1618 267126 : if (maybe_gt (msize, xsize))
1619 : return 0;
1620 : }
1621 : else
1622 : {
1623 : /* MODE must occupy no more of the underlying registers than X. */
1624 30598747 : poly_uint64 regsize = REGMODE_NATURAL_SIZE (innermode);
1625 30598747 : unsigned int mregs, xregs;
1626 30598747 : if (!can_div_away_from_zero_p (msize, regsize, &mregs)
1627 30598747 : || !can_div_away_from_zero_p (xsize, regsize, &xregs)
1628 30598747 : || mregs > xregs)
1629 1242 : return 0;
1630 : }
1631 :
1632 30864631 : scalar_int_mode int_mode, int_innermode, from_mode;
1633 30864631 : if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1634 168561 : && is_a <scalar_int_mode> (mode, &int_mode)
1635 30864631 : && is_a <scalar_int_mode> (innermode, &int_innermode)
1636 31033144 : && is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &from_mode))
1637 : {
1638 : /* If we are getting the low-order part of something that has been
1639 : sign- or zero-extended, we can either just use the object being
1640 : extended or make a narrower extension. If we want an even smaller
1641 : piece than the size of the object being extended, call ourselves
1642 : recursively.
1643 :
1644 : This case is used mostly by combine and cse. */
1645 :
1646 168513 : if (from_mode == int_mode)
1647 : return XEXP (x, 0);
1648 49956 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (from_mode))
1649 : return gen_lowpart_common (int_mode, XEXP (x, 0));
1650 11607 : else if (GET_MODE_SIZE (int_mode) < GET_MODE_SIZE (int_innermode))
1651 3600 : return gen_rtx_fmt_e (GET_CODE (x), int_mode, XEXP (x, 0));
1652 : }
1653 30696118 : else if (GET_CODE (x) == SUBREG || REG_P (x)
1654 : || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1655 17358908 : || CONST_DOUBLE_AS_FLOAT_P (x) || CONST_SCALAR_INT_P (x)
1656 : || CONST_POLY_INT_P (x))
1657 20576909 : return lowpart_subreg (mode, x, innermode);
1658 :
1659 : /* Otherwise, we can't do this. */
1660 : return 0;
1661 : }
1662 :
1663 : rtx
1664 11675 : gen_highpart (machine_mode mode, rtx x)
1665 : {
1666 23350 : poly_uint64 msize = GET_MODE_SIZE (mode);
1667 11675 : rtx result;
1668 :
1669 : /* This case loses if X is a subreg. To catch bugs early,
1670 : complain if an invalid MODE is used even in other cases. */
1671 13410 : gcc_assert (known_le (msize, (unsigned int) UNITS_PER_WORD)
1672 : || known_eq (msize, GET_MODE_UNIT_SIZE (GET_MODE (x))));
1673 :
1674 : /* gen_lowpart_common handles a lot of special cases due to needing to handle
1675 : paradoxical subregs; it only calls simplify_gen_subreg when certain that
1676 : it will produce something meaningful. The only case we need to handle
1677 : specially here is MEM. */
1678 11675 : if (MEM_P (x))
1679 : {
1680 106 : poly_int64 offset = subreg_highpart_offset (mode, GET_MODE (x));
1681 106 : return adjust_address (x, mode, offset);
1682 : }
1683 :
1684 11569 : result = simplify_gen_subreg (mode, x, GET_MODE (x),
1685 11569 : subreg_highpart_offset (mode, GET_MODE (x)));
1686 : /* Since we handle MEM directly above, we should never get a MEM back
1687 : from simplify_gen_subreg. */
1688 11569 : gcc_assert (result && !MEM_P (result));
1689 :
1690 : return result;
1691 : }
1692 :
1693 : /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1694 : be VOIDmode constant. */
1695 : rtx
1696 0 : gen_highpart_mode (machine_mode outermode, machine_mode innermode, rtx exp)
1697 : {
1698 0 : if (GET_MODE (exp) != VOIDmode)
1699 : {
1700 0 : gcc_assert (GET_MODE (exp) == innermode);
1701 0 : return gen_highpart (outermode, exp);
1702 : }
1703 0 : return simplify_gen_subreg (outermode, exp, innermode,
1704 0 : subreg_highpart_offset (outermode, innermode));
1705 : }
1706 :
1707 : /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1708 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1709 :
1710 : poly_uint64
1711 236636894 : subreg_size_lowpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1712 : {
1713 236636894 : gcc_checking_assert (ordered_p (outer_bytes, inner_bytes));
1714 236636894 : if (maybe_gt (outer_bytes, inner_bytes))
1715 : /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1716 : return 0;
1717 :
1718 236636894 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1719 : return inner_bytes - outer_bytes;
1720 236636894 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1721 236636894 : return 0;
1722 : else
1723 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes, 0);
1724 : }
1725 :
1726 : /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1727 : OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1728 :
1729 : poly_uint64
1730 46155 : subreg_size_highpart_offset (poly_uint64 outer_bytes, poly_uint64 inner_bytes)
1731 : {
1732 46155 : gcc_assert (known_ge (inner_bytes, outer_bytes));
1733 :
1734 : if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1735 : return 0;
1736 : else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1737 46155 : return inner_bytes - outer_bytes;
1738 : else
1739 : return subreg_size_offset_from_lsb (outer_bytes, inner_bytes,
1740 : (inner_bytes - outer_bytes)
1741 : * BITS_PER_UNIT);
1742 : }
1743 :
1744 : /* Return true iff X, assumed to be a SUBREG,
1745 : refers to the least significant part of its containing reg.
1746 : If X is not a SUBREG, always return true (it is its own low part!). */
1747 :
1748 : bool
1749 54803150 : subreg_lowpart_p (const_rtx x)
1750 : {
1751 54803150 : if (GET_CODE (x) != SUBREG)
1752 : return true;
1753 54803150 : else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1754 : return false;
1755 :
1756 54803150 : return known_eq (subreg_lowpart_offset (GET_MODE (x),
1757 : GET_MODE (SUBREG_REG (x))),
1758 : SUBREG_BYTE (x));
1759 : }
1760 :
1761 : /* Return subword OFFSET of operand OP.
1762 : The word number, OFFSET, is interpreted as the word number starting
1763 : at the low-order address. OFFSET 0 is the low-order word if not
1764 : WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1765 :
1766 : If we cannot extract the required word, we return zero. Otherwise,
1767 : an rtx corresponding to the requested word will be returned.
1768 :
1769 : VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1770 : reload has completed, a valid address will always be returned. After
1771 : reload, if a valid address cannot be returned, we return zero.
1772 :
1773 : If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1774 : it is the responsibility of the caller.
1775 :
1776 : MODE is the mode of OP in case it is a CONST_INT.
1777 :
1778 : ??? This is still rather broken for some cases. The problem for the
1779 : moment is that all callers of this thing provide no 'goal mode' to
1780 : tell us to work with. This exists because all callers were written
1781 : in a word based SUBREG world.
1782 : Now use of this function can be deprecated by simplify_subreg in most
1783 : cases.
1784 : */
1785 :
1786 : rtx
1787 86444 : operand_subword (rtx op, poly_uint64 offset, int validate_address,
1788 : machine_mode mode)
1789 : {
1790 86444 : if (mode == VOIDmode)
1791 3030 : mode = GET_MODE (op);
1792 :
1793 3030 : gcc_assert (mode != VOIDmode);
1794 :
1795 : /* If OP is narrower than a word, fail. */
1796 86444 : if (mode != BLKmode
1797 188030 : && maybe_lt (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1798 : return 0;
1799 :
1800 : /* If we want a word outside OP, return zero. */
1801 86444 : if (mode != BLKmode
1802 188030 : && maybe_gt ((offset + 1) * UNITS_PER_WORD, GET_MODE_SIZE (mode)))
1803 0 : return const0_rtx;
1804 :
1805 : /* Form a new MEM at the requested address. */
1806 86444 : if (MEM_P (op))
1807 : {
1808 11285 : rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1809 :
1810 9949 : if (! validate_address)
1811 : return new_rtx;
1812 :
1813 9949 : else if (reload_completed)
1814 : {
1815 0 : if (! strict_memory_address_addr_space_p (word_mode,
1816 : XEXP (new_rtx, 0),
1817 0 : MEM_ADDR_SPACE (op)))
1818 : return 0;
1819 : }
1820 : else
1821 9949 : return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1822 : }
1823 :
1824 : /* Rest can be handled by simplify_subreg. */
1825 93412 : return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1826 : }
1827 :
1828 : /* Similar to `operand_subword', but never return 0. If we can't
1829 : extract the required subword, put OP into a register and try again.
1830 : The second attempt must succeed. We always validate the address in
1831 : this case.
1832 :
1833 : MODE is the mode of OP, in case it is CONST_INT. */
1834 :
1835 : rtx
1836 65080 : operand_subword_force (rtx op, poly_uint64 offset, machine_mode mode)
1837 : {
1838 65080 : rtx result = operand_subword (op, offset, 1, mode);
1839 :
1840 65080 : if (result)
1841 : return result;
1842 :
1843 0 : if (mode != BLKmode && mode != VOIDmode)
1844 : {
1845 : /* If this is a register which cannot be accessed by words, copy it
1846 : to a pseudo register. */
1847 0 : if (REG_P (op))
1848 0 : op = copy_to_reg (op);
1849 : else
1850 0 : op = force_reg (mode, op);
1851 : }
1852 :
1853 0 : result = operand_subword (op, offset, 1, mode);
1854 0 : gcc_assert (result);
1855 :
1856 : return result;
1857 : }
1858 :
1859 32687589 : mem_attrs::mem_attrs ()
1860 32687589 : : expr (NULL_TREE),
1861 32687589 : offset (0),
1862 32687589 : size (0),
1863 32687589 : alias (0),
1864 32687589 : align (0),
1865 32687589 : addrspace (ADDR_SPACE_GENERIC),
1866 32687589 : offset_known_p (false),
1867 32687589 : size_known_p (false)
1868 32687589 : {}
1869 :
1870 : /* Returns true if both MEM_EXPR can be considered equal
1871 : and false otherwise. */
1872 :
1873 : bool
1874 45797 : mem_expr_equal_p (const_tree expr1, const_tree expr2)
1875 : {
1876 45797 : if (expr1 == expr2)
1877 : return true;
1878 :
1879 45192 : if (! expr1 || ! expr2)
1880 : return false;
1881 :
1882 35301 : if (TREE_CODE (expr1) != TREE_CODE (expr2))
1883 : return false;
1884 :
1885 33699 : return operand_equal_p (expr1, expr2, 0);
1886 : }
1887 :
1888 : /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1889 : bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1890 : -1 if not known. */
1891 :
1892 : int
1893 22 : get_mem_align_offset (rtx mem, unsigned int align)
1894 : {
1895 22 : tree expr;
1896 22 : poly_uint64 offset;
1897 :
1898 : /* This function can't use
1899 : if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1900 : || (MAX (MEM_ALIGN (mem),
1901 : MAX (align, get_object_alignment (MEM_EXPR (mem))))
1902 : < align))
1903 : return -1;
1904 : else
1905 : return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1906 : for two reasons:
1907 : - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1908 : for <variable>. get_inner_reference doesn't handle it and
1909 : even if it did, the alignment in that case needs to be determined
1910 : from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1911 : - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1912 : isn't sufficiently aligned, the object it is in might be. */
1913 22 : gcc_assert (MEM_P (mem));
1914 22 : expr = MEM_EXPR (mem);
1915 22 : if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1916 : return -1;
1917 :
1918 21 : offset = MEM_OFFSET (mem);
1919 21 : if (DECL_P (expr))
1920 : {
1921 2 : if (DECL_ALIGN (expr) < align)
1922 : return -1;
1923 : }
1924 19 : else if (INDIRECT_REF_P (expr))
1925 : {
1926 0 : if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1927 : return -1;
1928 : }
1929 19 : else if (TREE_CODE (expr) == COMPONENT_REF)
1930 : {
1931 0 : while (1)
1932 : {
1933 0 : tree inner = TREE_OPERAND (expr, 0);
1934 0 : tree field = TREE_OPERAND (expr, 1);
1935 0 : tree byte_offset = component_ref_field_offset (expr);
1936 0 : tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1937 :
1938 0 : poly_uint64 suboffset;
1939 0 : if (!byte_offset
1940 0 : || !poly_int_tree_p (byte_offset, &suboffset)
1941 0 : || !tree_fits_uhwi_p (bit_offset))
1942 0 : return -1;
1943 :
1944 0 : offset += suboffset;
1945 0 : offset += tree_to_uhwi (bit_offset) / BITS_PER_UNIT;
1946 :
1947 0 : if (inner == NULL_TREE)
1948 : {
1949 0 : if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1950 : < (unsigned int) align)
1951 : return -1;
1952 0 : break;
1953 : }
1954 0 : else if (DECL_P (inner))
1955 : {
1956 0 : if (DECL_ALIGN (inner) < align)
1957 : return -1;
1958 : break;
1959 : }
1960 0 : else if (TREE_CODE (inner) != COMPONENT_REF)
1961 : return -1;
1962 0 : expr = inner;
1963 0 : }
1964 : }
1965 : else
1966 : return -1;
1967 :
1968 0 : HOST_WIDE_INT misalign;
1969 0 : if (!known_misalignment (offset, align / BITS_PER_UNIT, &misalign))
1970 : return -1;
1971 0 : return misalign;
1972 : }
1973 :
1974 : /* Given REF (a MEM) and T, either the type of X or the expression
1975 : corresponding to REF, set the memory attributes. OBJECTP is nonzero
1976 : if we are making a new object of this type. BITPOS is nonzero if
1977 : there is an offset outstanding on T that will be applied later.
1978 : MAY_STORE_P is true when REF can be the destination of a store. */
1979 :
1980 : void
1981 32687589 : set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1982 : poly_int64 bitpos, bool may_store_p)
1983 : {
1984 32687589 : poly_int64 apply_bitpos = 0;
1985 32687589 : tree type;
1986 32687589 : class mem_attrs attrs, *defattrs, *refattrs;
1987 32687589 : addr_space_t as;
1988 :
1989 : /* It can happen that type_for_mode was given a mode for which there
1990 : is no language-level type. In which case it returns NULL, which
1991 : we can see here. */
1992 32687589 : if (t == NULL_TREE)
1993 0 : return;
1994 :
1995 32687589 : type = TYPE_P (t) ? t : TREE_TYPE (t);
1996 32687589 : if (type == error_mark_node)
1997 : return;
1998 :
1999 : /* If we have already set DECL_RTL = ref, get_alias_set will get the
2000 : wrong answer, as it assumes that DECL_RTL already has the right alias
2001 : info. Callers should not set DECL_RTL until after the call to
2002 : set_mem_attributes. */
2003 32687589 : gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
2004 :
2005 : /* Get the alias set from the expression or type (perhaps using a
2006 : front-end routine) and use it. */
2007 32687589 : attrs.alias = get_alias_set (t);
2008 :
2009 32687589 : MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
2010 32687589 : MEM_POINTER (ref) = POINTER_TYPE_P (type);
2011 :
2012 : /* Default values from pre-existing memory attributes if present. */
2013 32687589 : refattrs = MEM_ATTRS (ref);
2014 32687589 : if (refattrs)
2015 : {
2016 : /* ??? Can this ever happen? Calling this routine on a MEM that
2017 : already carries memory attributes should probably be invalid. */
2018 13254590 : attrs.expr = refattrs->expr;
2019 13254590 : attrs.offset_known_p = refattrs->offset_known_p;
2020 13254590 : attrs.offset = refattrs->offset;
2021 13254590 : attrs.size_known_p = refattrs->size_known_p;
2022 13254590 : attrs.size = refattrs->size;
2023 13254590 : attrs.align = refattrs->align;
2024 : }
2025 :
2026 : /* Otherwise, default values from the mode of the MEM reference. */
2027 : else
2028 : {
2029 19432999 : defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
2030 19432999 : gcc_assert (!defattrs->expr);
2031 19432999 : gcc_assert (!defattrs->offset_known_p);
2032 :
2033 : /* Respect mode size. */
2034 19432999 : attrs.size_known_p = defattrs->size_known_p;
2035 19432999 : attrs.size = defattrs->size;
2036 : /* ??? Is this really necessary? We probably should always get
2037 : the size from the type below. */
2038 :
2039 : /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
2040 : if T is an object, always compute the object alignment below. */
2041 19432999 : if (TYPE_P (t))
2042 2040284 : attrs.align = defattrs->align;
2043 : else
2044 17392715 : attrs.align = BITS_PER_UNIT;
2045 : /* ??? If T is a type, respecting mode alignment may *also* be wrong
2046 : e.g. if the type carries an alignment attribute. Should we be
2047 : able to simply always use TYPE_ALIGN? */
2048 : }
2049 :
2050 : /* We can set the alignment from the type if we are making an object or if
2051 : this is an INDIRECT_REF. */
2052 32687589 : if (objectp || TREE_CODE (t) == INDIRECT_REF)
2053 9982644 : attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
2054 :
2055 : /* If the size is known, we can set that. */
2056 32687589 : tree new_size = TYPE_SIZE_UNIT (type);
2057 :
2058 : /* The address-space is that of the type. */
2059 32687589 : as = TYPE_ADDR_SPACE (type);
2060 :
2061 : /* If T is not a type, we may be able to deduce some more information about
2062 : the expression. */
2063 32687589 : if (! TYPE_P (t))
2064 : {
2065 30641006 : tree base;
2066 :
2067 30641006 : if (TREE_THIS_VOLATILE (t))
2068 179617 : MEM_VOLATILE_P (ref) = 1;
2069 :
2070 : /* Now remove any conversions: they don't change what the underlying
2071 : object is. Likewise for SAVE_EXPR. */
2072 30645717 : while (CONVERT_EXPR_P (t)
2073 : || TREE_CODE (t) == VIEW_CONVERT_EXPR
2074 30645717 : || TREE_CODE (t) == SAVE_EXPR)
2075 4711 : t = TREE_OPERAND (t, 0);
2076 :
2077 : /* Note whether this expression can trap. */
2078 30641006 : MEM_NOTRAP_P (ref)
2079 30641006 : = !(may_store_p ? lhs_could_trap_p (t) : tree_could_trap_p (t));
2080 :
2081 30641006 : base = get_base_address (t);
2082 30641006 : if (base)
2083 : {
2084 30641006 : if (DECL_P (base)
2085 17488914 : && TREE_READONLY (base)
2086 2247060 : && (TREE_STATIC (base) || DECL_EXTERNAL (base))
2087 32535892 : && !TREE_THIS_VOLATILE (base))
2088 1894507 : MEM_READONLY_P (ref) = 1;
2089 :
2090 : /* Mark static const strings readonly as well. */
2091 30641006 : if (TREE_CODE (base) == STRING_CST
2092 314293 : && TREE_READONLY (base)
2093 30930223 : && TREE_STATIC (base))
2094 289217 : MEM_READONLY_P (ref) = 1;
2095 :
2096 : /* Address-space information is on the base object. */
2097 30641006 : if (TREE_CODE (base) == MEM_REF
2098 30641006 : || TREE_CODE (base) == TARGET_MEM_REF)
2099 12837787 : as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
2100 : 0))));
2101 : else
2102 17803219 : as = TYPE_ADDR_SPACE (TREE_TYPE (base));
2103 : }
2104 :
2105 : /* If this expression uses it's parent's alias set, mark it such
2106 : that we won't change it. */
2107 30641006 : if (component_uses_parent_alias_set_from (t) != NULL_TREE)
2108 1204687 : MEM_KEEP_ALIAS_SET_P (ref) = 1;
2109 :
2110 : /* If this is a decl, set the attributes of the MEM from it. */
2111 30641006 : if (DECL_P (t))
2112 : {
2113 7969022 : attrs.expr = t;
2114 7969022 : attrs.offset_known_p = true;
2115 7969022 : attrs.offset = 0;
2116 7969022 : apply_bitpos = bitpos;
2117 7969022 : new_size = DECL_SIZE_UNIT (t);
2118 : }
2119 :
2120 : /* ??? If we end up with a constant or a descriptor do not
2121 : record a MEM_EXPR. */
2122 22671984 : else if (CONSTANT_CLASS_P (t)
2123 22554100 : || TREE_CODE (t) == CONSTRUCTOR)
2124 : ;
2125 :
2126 : /* If this is a field reference, record it. */
2127 22554100 : else if (TREE_CODE (t) == COMPONENT_REF)
2128 : {
2129 10269223 : attrs.expr = t;
2130 10269223 : attrs.offset_known_p = true;
2131 10269223 : attrs.offset = 0;
2132 10269223 : apply_bitpos = bitpos;
2133 10269223 : if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
2134 66387 : new_size = DECL_SIZE_UNIT (TREE_OPERAND (t, 1));
2135 : }
2136 :
2137 : /* Else record it. */
2138 : else
2139 : {
2140 12284877 : gcc_assert (handled_component_p (t)
2141 : || TREE_CODE (t) == MEM_REF
2142 : || TREE_CODE (t) == TARGET_MEM_REF);
2143 12284877 : attrs.expr = t;
2144 12284877 : attrs.offset_known_p = true;
2145 12284877 : attrs.offset = 0;
2146 12284877 : apply_bitpos = bitpos;
2147 : }
2148 :
2149 : /* If this is a reference based on a partitioned decl replace the
2150 : base with a MEM_REF of the pointer representative we created
2151 : during stack slot partitioning. */
2152 30641006 : if (attrs.expr
2153 30523122 : && VAR_P (base)
2154 14380555 : && ! is_global_var (base)
2155 39637508 : && cfun->gimple_df->decls_to_pointers != NULL)
2156 : {
2157 4244598 : tree *namep = cfun->gimple_df->decls_to_pointers->get (base);
2158 4244598 : if (namep)
2159 : {
2160 2516359 : attrs.expr = unshare_expr (attrs.expr);
2161 2516359 : tree *orig_base = &attrs.expr;
2162 5314320 : while (handled_component_p (*orig_base))
2163 2797961 : orig_base = &TREE_OPERAND (*orig_base, 0);
2164 2516359 : if (TREE_CODE (*orig_base) == MEM_REF
2165 2516359 : || TREE_CODE (*orig_base) == TARGET_MEM_REF)
2166 771104 : TREE_OPERAND (*orig_base, 0) = *namep;
2167 : else
2168 : {
2169 1745255 : tree aptrt = reference_alias_ptr_type (*orig_base);
2170 1745255 : *orig_base = build2 (MEM_REF, TREE_TYPE (*orig_base),
2171 : *namep, build_int_cst (aptrt, 0));
2172 : }
2173 : }
2174 : }
2175 :
2176 : /* Compute the alignment. */
2177 30641006 : unsigned int obj_align;
2178 30641006 : unsigned HOST_WIDE_INT obj_bitpos;
2179 30641006 : get_object_alignment_1 (t, &obj_align, &obj_bitpos);
2180 30641006 : unsigned int diff_align = known_alignment (obj_bitpos - bitpos);
2181 30641006 : if (diff_align != 0)
2182 4003885 : obj_align = MIN (obj_align, diff_align);
2183 30641006 : attrs.align = MAX (attrs.align, obj_align);
2184 : }
2185 :
2186 32687589 : poly_uint64 const_size;
2187 32687589 : if (poly_int_tree_p (new_size, &const_size))
2188 : {
2189 32039384 : attrs.size_known_p = true;
2190 32039384 : attrs.size = const_size;
2191 : }
2192 :
2193 : /* If we modified OFFSET based on T, then subtract the outstanding
2194 : bit position offset. Similarly, increase the size of the accessed
2195 : object to contain the negative offset. */
2196 32687589 : if (maybe_ne (apply_bitpos, 0))
2197 : {
2198 2826814 : gcc_assert (attrs.offset_known_p);
2199 2826814 : poly_int64 bytepos = bits_to_bytes_round_down (apply_bitpos);
2200 2826814 : attrs.offset -= bytepos;
2201 2826814 : if (attrs.size_known_p)
2202 32687589 : attrs.size += bytepos;
2203 : }
2204 :
2205 : /* Now set the attributes we computed above. */
2206 32687589 : attrs.addrspace = as;
2207 32687589 : set_mem_attrs (ref, &attrs);
2208 : }
2209 :
2210 : void
2211 28541161 : set_mem_attributes (rtx ref, tree t, int objectp, bool may_store_p)
2212 : {
2213 28541161 : set_mem_attributes_minus_bitpos (ref, t, objectp, 0, may_store_p);
2214 28541161 : }
2215 :
2216 : /* Set the alias set of MEM to SET. */
2217 :
2218 : void
2219 7866696 : set_mem_alias_set (rtx mem, alias_set_type set)
2220 : {
2221 : /* If the new and old alias sets don't conflict, something is wrong. */
2222 10993134 : gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
2223 7866696 : mem_attrs attrs (*get_mem_attrs (mem));
2224 7866696 : attrs.alias = set;
2225 7866696 : set_mem_attrs (mem, &attrs);
2226 7866696 : }
2227 :
2228 : /* Set the address space of MEM to ADDRSPACE (target-defined). */
2229 :
2230 : void
2231 10448530 : set_mem_addr_space (rtx mem, addr_space_t addrspace)
2232 : {
2233 10448530 : mem_attrs attrs (*get_mem_attrs (mem));
2234 10448530 : attrs.addrspace = addrspace;
2235 10448530 : set_mem_attrs (mem, &attrs);
2236 10448530 : }
2237 :
2238 : /* Set the alignment of MEM to ALIGN bits. */
2239 :
2240 : void
2241 12827416 : set_mem_align (rtx mem, unsigned int align)
2242 : {
2243 12827416 : mem_attrs attrs (*get_mem_attrs (mem));
2244 12827416 : attrs.align = align;
2245 12827416 : set_mem_attrs (mem, &attrs);
2246 12827416 : }
2247 :
2248 : /* Set the expr for MEM to EXPR. */
2249 :
2250 : void
2251 7182135 : set_mem_expr (rtx mem, tree expr)
2252 : {
2253 7182135 : mem_attrs attrs (*get_mem_attrs (mem));
2254 7182135 : attrs.expr = expr;
2255 7182135 : set_mem_attrs (mem, &attrs);
2256 7182135 : }
2257 :
2258 : /* Set the offset of MEM to OFFSET. */
2259 :
2260 : void
2261 134 : set_mem_offset (rtx mem, poly_int64 offset)
2262 : {
2263 134 : mem_attrs attrs (*get_mem_attrs (mem));
2264 134 : attrs.offset_known_p = true;
2265 134 : attrs.offset = offset;
2266 134 : set_mem_attrs (mem, &attrs);
2267 134 : }
2268 :
2269 : /* Clear the offset of MEM. */
2270 :
2271 : void
2272 92165 : clear_mem_offset (rtx mem)
2273 : {
2274 92165 : mem_attrs attrs (*get_mem_attrs (mem));
2275 92165 : attrs.offset_known_p = false;
2276 92165 : set_mem_attrs (mem, &attrs);
2277 92165 : }
2278 :
2279 : /* Set the size of MEM to SIZE. */
2280 :
2281 : void
2282 2501307 : set_mem_size (rtx mem, poly_int64 size)
2283 : {
2284 2501307 : mem_attrs attrs (*get_mem_attrs (mem));
2285 2501307 : attrs.size_known_p = true;
2286 2501307 : attrs.size = size;
2287 2501307 : set_mem_attrs (mem, &attrs);
2288 2501307 : }
2289 :
2290 : /* Clear the size of MEM. */
2291 :
2292 : void
2293 599 : clear_mem_size (rtx mem)
2294 : {
2295 599 : mem_attrs attrs (*get_mem_attrs (mem));
2296 599 : attrs.size_known_p = false;
2297 599 : set_mem_attrs (mem, &attrs);
2298 599 : }
2299 :
2300 : /* Return a memory reference like MEMREF, but with its mode changed to MODE
2301 : and its address changed to ADDR. (VOIDmode means don't change the mode.
2302 : NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2303 : returned memory location is required to be valid. INPLACE is true if any
2304 : changes can be made directly to MEMREF or false if MEMREF must be treated
2305 : as immutable.
2306 :
2307 : The memory attributes are not changed. */
2308 :
2309 : static rtx
2310 509001638 : change_address_1 (rtx memref, machine_mode mode, rtx addr, int validate,
2311 : bool inplace)
2312 : {
2313 509001638 : addr_space_t as;
2314 509001638 : rtx new_rtx;
2315 :
2316 509001638 : gcc_assert (MEM_P (memref));
2317 509001638 : as = MEM_ADDR_SPACE (memref);
2318 509001638 : if (mode == VOIDmode)
2319 481845291 : mode = GET_MODE (memref);
2320 509001638 : if (addr == 0)
2321 64 : addr = XEXP (memref, 0);
2322 488411318 : if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2323 855513957 : && (!validate || memory_address_addr_space_p (mode, addr, as)))
2324 : return memref;
2325 :
2326 : /* Don't validate address for LRA. LRA can make the address valid
2327 : by itself in most efficient way. */
2328 162613707 : if (validate && !lra_in_progress)
2329 : {
2330 23360933 : if (reload_in_progress || reload_completed)
2331 3858251 : gcc_assert (memory_address_addr_space_p (mode, addr, as));
2332 : else
2333 19502682 : addr = memory_address_addr_space (mode, addr, as);
2334 : }
2335 :
2336 162613707 : if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2337 : return memref;
2338 :
2339 158475140 : if (inplace)
2340 : {
2341 260984 : XEXP (memref, 0) = addr;
2342 260984 : return memref;
2343 : }
2344 :
2345 158214156 : new_rtx = gen_rtx_MEM (mode, addr);
2346 158214156 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2347 158214156 : return new_rtx;
2348 : }
2349 :
2350 : /* Version of change_address that takes a validate parameter. */
2351 :
2352 : static rtx
2353 257729 : change_address (rtx memref, machine_mode mode, rtx addr, int validate)
2354 : {
2355 257729 : rtx new_rtx = change_address_1 (memref, mode, addr, validate, false);
2356 257729 : machine_mode mmode = GET_MODE (new_rtx);
2357 257729 : class mem_attrs *defattrs;
2358 :
2359 257729 : mem_attrs attrs (*get_mem_attrs (memref));
2360 257729 : defattrs = mode_mem_attrs[(int) mmode];
2361 257729 : attrs.expr = NULL_TREE;
2362 257729 : attrs.offset_known_p = false;
2363 257729 : attrs.size_known_p = defattrs->size_known_p;
2364 257729 : attrs.size = defattrs->size;
2365 257729 : attrs.align = defattrs->align;
2366 :
2367 : /* If there are no changes, just return the original memory reference. */
2368 257729 : if (new_rtx == memref)
2369 : {
2370 57206 : if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2371 : return new_rtx;
2372 :
2373 56110 : new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2374 56110 : MEM_COPY_ATTRIBUTES (new_rtx, memref);
2375 : }
2376 :
2377 256633 : set_mem_attrs (new_rtx, &attrs);
2378 256633 : return new_rtx;
2379 : }
2380 :
2381 : /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2382 : way we are changing MEMREF, so we only preserve the alias set. */
2383 :
2384 : rtx
2385 257729 : change_address (rtx memref, machine_mode mode, rtx addr)
2386 : {
2387 257729 : return change_address (memref, mode, addr, true);
2388 : }
2389 :
2390 : /* Like change_address_1 with VALIDATE zero, but we are not saying in what
2391 : way we are changing MEMREF, so we only preserve the alias set. */
2392 :
2393 : rtx
2394 0 : change_address_nv (rtx memref, machine_mode mode, rtx addr)
2395 : {
2396 0 : return change_address (memref, mode, addr, false);
2397 : }
2398 :
2399 : /* Return a memory reference like MEMREF, but with its mode changed
2400 : to MODE and its address offset by OFFSET bytes. If VALIDATE is
2401 : nonzero, the memory address is forced to be valid.
2402 : If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2403 : and the caller is responsible for adjusting MEMREF base register.
2404 : If ADJUST_OBJECT is zero, the underlying object associated with the
2405 : memory reference is left unchanged and the caller is responsible for
2406 : dealing with it. Otherwise, if the new memory reference is outside
2407 : the underlying object, even partially, then the object is dropped.
2408 : SIZE, if nonzero, is the size of an access in cases where MODE
2409 : has no inherent size. */
2410 :
2411 : rtx
2412 36279996 : adjust_address_1 (rtx memref, machine_mode mode, poly_int64 offset,
2413 : int validate, int adjust_address, int adjust_object,
2414 : poly_int64 size)
2415 : {
2416 36279996 : rtx addr = XEXP (memref, 0);
2417 36279996 : rtx new_rtx;
2418 36279996 : machine_mode address_mode;
2419 36279996 : class mem_attrs attrs (*get_mem_attrs (memref)), *defattrs;
2420 36279996 : unsigned HOST_WIDE_INT max_align;
2421 : #ifdef POINTERS_EXTEND_UNSIGNED
2422 36279996 : scalar_int_mode pointer_mode
2423 36279996 : = targetm.addr_space.pointer_mode (attrs.addrspace);
2424 : #endif
2425 :
2426 : /* VOIDmode means no mode change for change_address_1. */
2427 36279996 : if (mode == VOIDmode)
2428 17452 : mode = GET_MODE (memref);
2429 :
2430 : /* Take the size of non-BLKmode accesses from the mode. */
2431 36279996 : defattrs = mode_mem_attrs[(int) mode];
2432 36279996 : if (defattrs->size_known_p)
2433 29809207 : size = defattrs->size;
2434 :
2435 : /* If there are no changes, just return the original memory reference. */
2436 36279996 : if (mode == GET_MODE (memref)
2437 15818315 : && known_eq (offset, 0)
2438 9382032 : && (known_eq (size, 0)
2439 3825873 : || (attrs.size_known_p && known_eq (attrs.size, size)))
2440 50636628 : && (!validate || memory_address_addr_space_p (mode, addr,
2441 4975248 : attrs.addrspace)))
2442 : return memref;
2443 :
2444 : /* ??? Prefer to create garbage instead of creating shared rtl.
2445 : This may happen even if offset is nonzero -- consider
2446 : (plus (plus reg reg) const_int) -- so do this always. */
2447 26898618 : addr = copy_rtx (addr);
2448 :
2449 : /* Convert a possibly large offset to a signed value within the
2450 : range of the target address space. */
2451 26898618 : address_mode = get_address_mode (memref);
2452 26898618 : if (!VECTOR_MODE_P (address_mode))
2453 26898618 : offset = trunc_int_for_mode (offset, address_mode);
2454 : else
2455 0 : offset = trunc_int_for_mode (offset, GET_MODE_INNER (address_mode));
2456 :
2457 26898618 : if (adjust_address)
2458 : {
2459 : /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2460 : object, we can merge it into the LO_SUM. */
2461 26867571 : if (GET_MODE (memref) != BLKmode
2462 12225085 : && GET_CODE (addr) == LO_SUM
2463 26867571 : && known_in_range_p (offset,
2464 0 : 0, (GET_MODE_ALIGNMENT (GET_MODE (memref))
2465 0 : / BITS_PER_UNIT)))
2466 0 : addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2467 : plus_constant (address_mode,
2468 : XEXP (addr, 1), offset));
2469 : #ifdef POINTERS_EXTEND_UNSIGNED
2470 : /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2471 : in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2472 : the fact that pointers are not allowed to overflow. */
2473 26867571 : else if (POINTERS_EXTEND_UNSIGNED > 0
2474 26867571 : && GET_CODE (addr) == ZERO_EXTEND
2475 12 : && GET_MODE (XEXP (addr, 0)) == pointer_mode
2476 26867573 : && known_eq (trunc_int_for_mode (offset, pointer_mode), offset))
2477 2 : addr = gen_rtx_ZERO_EXTEND (address_mode,
2478 : plus_constant (pointer_mode,
2479 : XEXP (addr, 0), offset));
2480 : #endif
2481 : else
2482 26867569 : addr = plus_constant (address_mode, addr, offset);
2483 : }
2484 :
2485 26898618 : new_rtx = change_address_1 (memref, mode, addr, validate, false);
2486 :
2487 : /* If the address is a REG, change_address_1 rightfully returns memref,
2488 : but this would destroy memref's MEM_ATTRS. */
2489 26898618 : if (new_rtx == memref && maybe_ne (offset, 0))
2490 31002 : new_rtx = copy_rtx (new_rtx);
2491 :
2492 : /* Conservatively drop the object if we don't know where we start from. */
2493 26898618 : if (adjust_object && (!attrs.offset_known_p || !attrs.size_known_p))
2494 : {
2495 1661 : attrs.expr = NULL_TREE;
2496 1661 : attrs.alias = 0;
2497 : }
2498 :
2499 : /* Compute the new values of the memory attributes due to this adjustment.
2500 : We add the offsets and update the alignment. */
2501 26898618 : if (attrs.offset_known_p)
2502 : {
2503 23037410 : attrs.offset += offset;
2504 :
2505 : /* Drop the object if the new left end is not within its bounds. */
2506 23037410 : if (adjust_object && maybe_lt (attrs.offset, 0))
2507 : {
2508 25711 : attrs.expr = NULL_TREE;
2509 25711 : attrs.alias = 0;
2510 : }
2511 : }
2512 :
2513 : /* Compute the new alignment by taking the MIN of the alignment and the
2514 : lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2515 : if zero. */
2516 26898618 : if (maybe_ne (offset, 0))
2517 : {
2518 12350958 : max_align = known_alignment (offset) * BITS_PER_UNIT;
2519 12350958 : attrs.align = MIN (attrs.align, max_align);
2520 : }
2521 :
2522 26898618 : if (maybe_ne (size, 0))
2523 : {
2524 : /* Drop the object if the new right end is not within its bounds. */
2525 26145496 : if (adjust_object && maybe_gt (offset + size, attrs.size))
2526 : {
2527 64949 : attrs.expr = NULL_TREE;
2528 64949 : attrs.alias = 0;
2529 : }
2530 26145496 : attrs.size_known_p = true;
2531 26145496 : attrs.size = size;
2532 : }
2533 753122 : else if (attrs.size_known_p)
2534 : {
2535 746735 : gcc_assert (!adjust_object);
2536 26898618 : attrs.size -= offset;
2537 : /* ??? The store_by_pieces machinery generates negative sizes,
2538 : so don't assert for that here. */
2539 : }
2540 :
2541 26898618 : set_mem_attrs (new_rtx, &attrs);
2542 :
2543 26898618 : return new_rtx;
2544 : }
2545 :
2546 : /* Return a memory reference like MEMREF, but with its mode changed
2547 : to MODE and its address changed to ADDR, which is assumed to be
2548 : MEMREF offset by OFFSET bytes. If VALIDATE is
2549 : nonzero, the memory address is forced to be valid. */
2550 :
2551 : rtx
2552 61140 : adjust_automodify_address_1 (rtx memref, machine_mode mode, rtx addr,
2553 : poly_int64 offset, int validate)
2554 : {
2555 61140 : memref = change_address_1 (memref, VOIDmode, addr, validate, false);
2556 61140 : return adjust_address_1 (memref, mode, offset, validate, 0, 0, 0);
2557 : }
2558 :
2559 : /* Return a memory reference like MEMREF, but whose address is changed by
2560 : adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2561 : known to be in OFFSET (possibly 1). */
2562 :
2563 : rtx
2564 774013 : offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2565 : {
2566 774013 : rtx new_rtx, addr = XEXP (memref, 0);
2567 774013 : machine_mode address_mode;
2568 774013 : class mem_attrs *defattrs;
2569 :
2570 774013 : mem_attrs attrs (*get_mem_attrs (memref));
2571 774013 : address_mode = get_address_mode (memref);
2572 774013 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2573 :
2574 : /* At this point we don't know _why_ the address is invalid. It
2575 : could have secondary memory references, multiplies or anything.
2576 :
2577 : However, if we did go and rearrange things, we can wind up not
2578 : being able to recognize the magic around pic_offset_table_rtx.
2579 : This stuff is fragile, and is yet another example of why it is
2580 : bad to expose PIC machinery too early. */
2581 1546290 : if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2582 774013 : attrs.addrspace)
2583 138554 : && GET_CODE (addr) == PLUS
2584 824591 : && XEXP (addr, 0) == pic_offset_table_rtx)
2585 : {
2586 1736 : addr = force_reg (GET_MODE (addr), addr);
2587 1736 : new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2588 : }
2589 :
2590 774013 : update_temp_slot_address (XEXP (memref, 0), new_rtx);
2591 774013 : new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1, false);
2592 :
2593 : /* If there are no changes, just return the original memory reference. */
2594 774013 : if (new_rtx == memref)
2595 : return new_rtx;
2596 :
2597 : /* Update the alignment to reflect the offset. Reset the offset, which
2598 : we don't know. */
2599 774013 : defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2600 774013 : attrs.offset_known_p = false;
2601 774013 : attrs.size_known_p = defattrs->size_known_p;
2602 774013 : attrs.size = defattrs->size;
2603 774013 : attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2604 774013 : set_mem_attrs (new_rtx, &attrs);
2605 774013 : return new_rtx;
2606 : }
2607 :
2608 : /* Return a memory reference like MEMREF, but with its address changed to
2609 : ADDR. The caller is asserting that the actual piece of memory pointed
2610 : to is the same, just the form of the address is being changed, such as
2611 : by putting something into a register. INPLACE is true if any changes
2612 : can be made directly to MEMREF or false if MEMREF must be treated as
2613 : immutable. */
2614 :
2615 : rtx
2616 13016057 : replace_equiv_address (rtx memref, rtx addr, bool inplace)
2617 : {
2618 : /* change_address_1 copies the memory attribute structure without change
2619 : and that's exactly what we want here. */
2620 13016057 : update_temp_slot_address (XEXP (memref, 0), addr);
2621 13016057 : return change_address_1 (memref, VOIDmode, addr, 1, inplace);
2622 : }
2623 :
2624 : /* Likewise, but the reference is not required to be valid. */
2625 :
2626 : rtx
2627 467994081 : replace_equiv_address_nv (rtx memref, rtx addr, bool inplace)
2628 : {
2629 467994081 : return change_address_1 (memref, VOIDmode, addr, 0, inplace);
2630 : }
2631 :
2632 :
2633 : /* Emit insns to reload VALUE into a new register. VALUE is an
2634 : auto-increment or auto-decrement RTX whose operand is a register or
2635 : memory location; so reloading involves incrementing that location.
2636 :
2637 : INC_AMOUNT is the number to increment or decrement by (always
2638 : positive and ignored for POST_MODIFY/PRE_MODIFY).
2639 :
2640 : Return a pseudo containing the result. */
2641 : rtx
2642 0 : address_reload_context::emit_autoinc (rtx value, poly_int64 inc_amount)
2643 : {
2644 : /* Since we're going to call recog, and might be called within recog,
2645 : we need to ensure we save and restore recog_data. */
2646 0 : recog_state_saver recog_save;
2647 :
2648 : /* REG or MEM to be copied and incremented. */
2649 0 : rtx incloc = XEXP (value, 0);
2650 :
2651 0 : const rtx_code code = GET_CODE (value);
2652 0 : const bool post_p
2653 0 : = code == POST_DEC || code == POST_INC || code == POST_MODIFY;
2654 :
2655 0 : bool plus_p = true;
2656 0 : rtx inc;
2657 0 : if (code == PRE_MODIFY || code == POST_MODIFY)
2658 : {
2659 0 : gcc_assert (GET_CODE (XEXP (value, 1)) == PLUS
2660 : || GET_CODE (XEXP (value, 1)) == MINUS);
2661 0 : gcc_assert (rtx_equal_p (XEXP (XEXP (value, 1), 0), XEXP (value, 0)));
2662 0 : plus_p = GET_CODE (XEXP (value, 1)) == PLUS;
2663 0 : inc = XEXP (XEXP (value, 1), 1);
2664 : }
2665 : else
2666 : {
2667 0 : if (code == PRE_DEC || code == POST_DEC)
2668 0 : inc_amount = -inc_amount;
2669 :
2670 0 : inc = gen_int_mode (inc_amount, GET_MODE (value));
2671 : }
2672 :
2673 0 : rtx result;
2674 0 : if (!post_p && REG_P (incloc))
2675 : result = incloc;
2676 : else
2677 : {
2678 0 : result = get_reload_reg ();
2679 : /* First copy the location to the result register. */
2680 0 : emit_insn (gen_move_insn (result, incloc));
2681 : }
2682 :
2683 : /* See if we can directly increment INCLOC. */
2684 0 : rtx_insn *last = get_last_insn ();
2685 0 : rtx_insn *add_insn = emit_insn (plus_p
2686 0 : ? gen_add2_insn (incloc, inc)
2687 0 : : gen_sub2_insn (incloc, inc));
2688 0 : const int icode = recog_memoized (add_insn);
2689 0 : if (icode >= 0)
2690 : {
2691 0 : if (!post_p && result != incloc)
2692 0 : emit_insn (gen_move_insn (result, incloc));
2693 : return result;
2694 : }
2695 0 : delete_insns_since (last);
2696 :
2697 : /* If couldn't do the increment directly, must increment in RESULT.
2698 : The way we do this depends on whether this is pre- or
2699 : post-increment. For pre-increment, copy INCLOC to the reload
2700 : register, increment it there, then save back. */
2701 0 : if (!post_p)
2702 : {
2703 0 : if (incloc != result)
2704 0 : emit_insn (gen_move_insn (result, incloc));
2705 0 : if (plus_p)
2706 0 : emit_insn (gen_add2_insn (result, inc));
2707 : else
2708 0 : emit_insn (gen_sub2_insn (result, inc));
2709 0 : if (incloc != result)
2710 0 : emit_insn (gen_move_insn (incloc, result));
2711 : }
2712 : else
2713 : {
2714 : /* Post-increment.
2715 :
2716 : Because this might be a jump insn or a compare, and because
2717 : RESULT may not be available after the insn in an input
2718 : reload, we must do the incrementing before the insn being
2719 : reloaded for.
2720 :
2721 : We have already copied INCLOC to RESULT. Increment the copy in
2722 : RESULT, save that back, then decrement RESULT so it has
2723 : the original value. */
2724 0 : if (plus_p)
2725 0 : emit_insn (gen_add2_insn (result, inc));
2726 : else
2727 0 : emit_insn (gen_sub2_insn (result, inc));
2728 0 : emit_insn (gen_move_insn (incloc, result));
2729 : /* Restore non-modified value for the result. We prefer this
2730 : way because it does not require an additional hard
2731 : register. */
2732 0 : if (plus_p)
2733 : {
2734 0 : poly_int64 offset;
2735 0 : if (poly_int_rtx_p (inc, &offset))
2736 0 : emit_insn (gen_add2_insn (result,
2737 : gen_int_mode (-offset,
2738 0 : GET_MODE (result))));
2739 : else
2740 0 : emit_insn (gen_sub2_insn (result, inc));
2741 : }
2742 : else
2743 0 : emit_insn (gen_add2_insn (result, inc));
2744 : }
2745 : return result;
2746 0 : }
2747 :
2748 : /* Return a memory reference like MEM, but with the address reloaded into a
2749 : pseudo register. */
2750 :
2751 : rtx
2752 0 : force_reload_address (rtx mem)
2753 : {
2754 0 : rtx addr = XEXP (mem, 0);
2755 0 : if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
2756 : {
2757 0 : const auto size = GET_MODE_SIZE (GET_MODE (mem));
2758 0 : addr = address_reload_context ().emit_autoinc (addr, size);
2759 : }
2760 : else
2761 0 : addr = force_reg (Pmode, addr);
2762 :
2763 0 : return replace_equiv_address (mem, addr);
2764 : }
2765 :
2766 : /* Return a memory reference like MEMREF, but with its mode widened to
2767 : MODE and offset by OFFSET. This would be used by targets that e.g.
2768 : cannot issue QImode memory operations and have to use SImode memory
2769 : operations plus masking logic. */
2770 :
2771 : rtx
2772 47 : widen_memory_access (rtx memref, machine_mode mode, poly_int64 offset)
2773 : {
2774 47 : rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1, 0, 0);
2775 94 : poly_uint64 size = GET_MODE_SIZE (mode);
2776 :
2777 : /* If there are no changes, just return the original memory reference. */
2778 47 : if (new_rtx == memref)
2779 : return new_rtx;
2780 :
2781 47 : mem_attrs attrs (*get_mem_attrs (new_rtx));
2782 :
2783 : /* If we don't know what offset we were at within the expression, then
2784 : we can't know if we've overstepped the bounds. */
2785 47 : if (! attrs.offset_known_p)
2786 5 : attrs.expr = NULL_TREE;
2787 :
2788 47 : while (attrs.expr)
2789 : {
2790 42 : if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2791 : {
2792 0 : tree field = TREE_OPERAND (attrs.expr, 1);
2793 0 : tree offset = component_ref_field_offset (attrs.expr);
2794 :
2795 0 : if (! DECL_SIZE_UNIT (field))
2796 : {
2797 0 : attrs.expr = NULL_TREE;
2798 0 : break;
2799 : }
2800 :
2801 : /* Is the field at least as large as the access? If so, ok,
2802 : otherwise strip back to the containing structure. */
2803 0 : if (poly_int_tree_p (DECL_SIZE_UNIT (field))
2804 0 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (field)), size)
2805 0 : && known_ge (attrs.offset, 0))
2806 : break;
2807 :
2808 0 : poly_uint64 suboffset;
2809 0 : if (!poly_int_tree_p (offset, &suboffset))
2810 : {
2811 0 : attrs.expr = NULL_TREE;
2812 0 : break;
2813 : }
2814 :
2815 0 : attrs.expr = TREE_OPERAND (attrs.expr, 0);
2816 0 : attrs.offset += suboffset;
2817 0 : attrs.offset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
2818 0 : / BITS_PER_UNIT);
2819 : }
2820 : /* Similarly for the decl. */
2821 42 : else if (DECL_P (attrs.expr)
2822 12 : && DECL_SIZE_UNIT (attrs.expr)
2823 7 : && poly_int_tree_p (DECL_SIZE_UNIT (attrs.expr))
2824 7 : && known_ge (wi::to_poly_offset (DECL_SIZE_UNIT (attrs.expr)),
2825 : size)
2826 42 : && known_ge (attrs.offset, 0))
2827 : break;
2828 : else
2829 : {
2830 : /* The widened memory access overflows the expression, which means
2831 : that it could alias another expression. Zap it. */
2832 42 : attrs.expr = NULL_TREE;
2833 42 : break;
2834 : }
2835 : }
2836 :
2837 47 : if (! attrs.expr)
2838 47 : attrs.offset_known_p = false;
2839 :
2840 : /* The widened memory may alias other stuff, so zap the alias set. */
2841 : /* ??? Maybe use get_alias_set on any remaining expression. */
2842 47 : attrs.alias = 0;
2843 47 : attrs.size_known_p = true;
2844 47 : attrs.size = size;
2845 47 : set_mem_attrs (new_rtx, &attrs);
2846 47 : return new_rtx;
2847 : }
2848 :
2849 : /* A fake decl that is used as the MEM_EXPR of spill slots. */
2850 : static GTY(()) tree spill_slot_decl;
2851 :
2852 : tree
2853 829485756 : get_spill_slot_decl (bool force_build_p)
2854 : {
2855 829485756 : tree d = spill_slot_decl;
2856 829485756 : rtx rd;
2857 :
2858 829485756 : if (d || !force_build_p)
2859 : return d;
2860 :
2861 31072 : d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2862 : VAR_DECL, get_identifier ("%sfp"), void_type_node);
2863 31072 : DECL_ARTIFICIAL (d) = 1;
2864 31072 : DECL_IGNORED_P (d) = 1;
2865 31072 : TREE_USED (d) = 1;
2866 31072 : spill_slot_decl = d;
2867 :
2868 31072 : rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2869 31072 : MEM_NOTRAP_P (rd) = 1;
2870 31072 : mem_attrs attrs (*mode_mem_attrs[(int) BLKmode]);
2871 31072 : attrs.alias = new_alias_set ();
2872 31072 : attrs.expr = d;
2873 31072 : set_mem_attrs (rd, &attrs);
2874 31072 : SET_DECL_RTL (d, rd);
2875 :
2876 31072 : return d;
2877 : }
2878 :
2879 : /* Given MEM, a result from assign_stack_local, fill in the memory
2880 : attributes as appropriate for a register allocator spill slot.
2881 : These slots are not aliasable by other memory. We arrange for
2882 : them all to use a single MEM_EXPR, so that the aliasing code can
2883 : work properly in the case of shared spill slots. */
2884 :
2885 : void
2886 1458122 : set_mem_attrs_for_spill (rtx mem)
2887 : {
2888 1458122 : rtx addr;
2889 :
2890 1458122 : mem_attrs attrs (*get_mem_attrs (mem));
2891 1458122 : attrs.expr = get_spill_slot_decl (true);
2892 1458122 : attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2893 1458122 : attrs.addrspace = ADDR_SPACE_GENERIC;
2894 :
2895 : /* We expect the incoming memory to be of the form:
2896 : (mem:MODE (plus (reg sfp) (const_int offset)))
2897 : with perhaps the plus missing for offset = 0. */
2898 1458122 : addr = XEXP (mem, 0);
2899 1458122 : attrs.offset_known_p = true;
2900 1458122 : strip_offset (addr, &attrs.offset);
2901 :
2902 1458122 : set_mem_attrs (mem, &attrs);
2903 1458122 : MEM_NOTRAP_P (mem) = 1;
2904 1458122 : }
2905 :
2906 : /* Return a newly created CODE_LABEL rtx with a unique label number. */
2907 :
2908 : rtx_code_label *
2909 15724379 : gen_label_rtx (void)
2910 : {
2911 15724379 : return as_a <rtx_code_label *> (
2912 : gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
2913 15724379 : NULL, label_num++, NULL));
2914 : }
2915 :
2916 : /* For procedure integration. */
2917 :
2918 : /* Install new pointers to the first and last insns in the chain.
2919 : Also, set cur_insn_uid to one higher than the last in use.
2920 : Used for an inline-procedure after copying the insn chain. */
2921 :
2922 : void
2923 8 : set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
2924 : {
2925 8 : rtx_insn *insn;
2926 :
2927 8 : set_first_insn (first);
2928 8 : set_last_insn (last);
2929 8 : cur_insn_uid = 0;
2930 :
2931 8 : if (param_min_nondebug_insn_uid || MAY_HAVE_DEBUG_INSNS)
2932 : {
2933 0 : int debug_count = 0;
2934 :
2935 0 : cur_insn_uid = param_min_nondebug_insn_uid - 1;
2936 0 : cur_debug_insn_uid = 0;
2937 :
2938 0 : for (insn = first; insn; insn = NEXT_INSN (insn))
2939 0 : if (INSN_UID (insn) < param_min_nondebug_insn_uid)
2940 0 : cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2941 : else
2942 : {
2943 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2944 0 : if (DEBUG_INSN_P (insn))
2945 0 : debug_count++;
2946 : }
2947 :
2948 0 : if (debug_count)
2949 0 : cur_debug_insn_uid = param_min_nondebug_insn_uid + debug_count;
2950 : else
2951 0 : cur_debug_insn_uid++;
2952 : }
2953 : else
2954 8 : for (insn = first; insn; insn = NEXT_INSN (insn))
2955 0 : cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2956 :
2957 8 : cur_insn_uid++;
2958 8 : }
2959 :
2960 : /* Go through all the RTL insn bodies and copy any invalid shared
2961 : structure. This routine should only be called once. */
2962 :
2963 : static void
2964 3032621 : unshare_all_rtl_1 (rtx_insn *insn)
2965 : {
2966 : /* Unshare just about everything else. */
2967 3032621 : unshare_all_rtl_in_chain (insn);
2968 :
2969 : /* Make sure the addresses of stack slots found outside the insn chain
2970 : (such as, in DECL_RTL of a variable) are not shared
2971 : with the insn chain.
2972 :
2973 : This special care is necessary when the stack slot MEM does not
2974 : actually appear in the insn chain. If it does appear, its address
2975 : is unshared from all else at that point. */
2976 3032621 : unsigned int i;
2977 3032621 : rtx temp;
2978 9336134 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2979 3270892 : (*stack_slot_list)[i] = copy_rtx_if_shared (temp);
2980 3032621 : }
2981 :
2982 : /* Go through all the RTL insn bodies and copy any invalid shared
2983 : structure, again. This is a fairly expensive thing to do so it
2984 : should be done sparingly. */
2985 :
2986 : void
2987 1515921 : unshare_all_rtl_again (rtx_insn *insn)
2988 : {
2989 1515921 : rtx_insn *p;
2990 1515921 : tree decl;
2991 :
2992 176937443 : for (p = insn; p; p = NEXT_INSN (p))
2993 175421522 : if (INSN_P (p))
2994 : {
2995 139374052 : reset_used_flags (PATTERN (p));
2996 139374052 : reset_used_flags (REG_NOTES (p));
2997 139374052 : if (CALL_P (p))
2998 6215026 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2999 : }
3000 :
3001 : /* Make sure that virtual stack slots are not shared. */
3002 1515921 : set_used_decls (DECL_INITIAL (cfun->decl));
3003 :
3004 : /* Make sure that virtual parameters are not shared. */
3005 4685314 : for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
3006 3169393 : set_used_flags (DECL_RTL (decl));
3007 :
3008 : rtx temp;
3009 : unsigned int i;
3010 3946205 : FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
3011 2430284 : reset_used_flags (temp);
3012 :
3013 1515921 : unshare_all_rtl_1 (insn);
3014 1515921 : }
3015 :
3016 : void
3017 1516700 : unshare_all_rtl (void)
3018 : {
3019 1516700 : unshare_all_rtl_1 (get_insns ());
3020 :
3021 4686650 : for (tree decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
3022 : {
3023 3169950 : if (DECL_RTL_SET_P (decl))
3024 3169950 : SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
3025 3169950 : DECL_INCOMING_RTL (decl) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl));
3026 : }
3027 1516700 : }
3028 :
3029 :
3030 : /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
3031 : Recursively does the same for subexpressions. */
3032 :
3033 : static void
3034 58307465394 : verify_rtx_sharing (rtx orig, rtx insn)
3035 : {
3036 58307465394 : rtx x = orig;
3037 58307465394 : int i;
3038 58307465394 : enum rtx_code code;
3039 58307465394 : const char *format_ptr;
3040 :
3041 58307465394 : if (x == 0)
3042 : return;
3043 :
3044 48249922830 : code = GET_CODE (x);
3045 :
3046 : /* These types may be freely shared. */
3047 :
3048 48249922830 : switch (code)
3049 : {
3050 : case REG:
3051 : case DEBUG_EXPR:
3052 : case VALUE:
3053 : CASE_CONST_ANY:
3054 : case SYMBOL_REF:
3055 : case LABEL_REF:
3056 : case CODE_LABEL:
3057 : case PC:
3058 : case RETURN:
3059 : case SIMPLE_RETURN:
3060 : case SCRATCH:
3061 : /* SCRATCH must be shared because they represent distinct values. */
3062 : return;
3063 2104243702 : case CLOBBER:
3064 : /* Share clobbers of hard registers, but do not share pseudo reg
3065 : clobbers or clobbers of hard registers that originated as pseudos.
3066 : This is needed to allow safe register renaming. */
3067 2104243702 : if (REG_P (XEXP (x, 0))
3068 739163164 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3069 2840276691 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3070 : return;
3071 : break;
3072 :
3073 36932586 : case CONST:
3074 36932586 : if (shared_const_p (orig))
3075 : return;
3076 : break;
3077 :
3078 2827146657 : case MEM:
3079 : /* A MEM is allowed to be shared if its address is constant. */
3080 2827146657 : if (CONSTANT_ADDRESS_P (XEXP (x, 0))
3081 2827146657 : || reload_completed || reload_in_progress)
3082 : return;
3083 :
3084 : break;
3085 :
3086 : default:
3087 : break;
3088 : }
3089 :
3090 : /* This rtx may not be shared. If it has already been seen,
3091 : replace it with a copy of itself. */
3092 23474488013 : if (flag_checking && RTX_FLAG (x, used))
3093 : {
3094 0 : error ("invalid rtl sharing found in the insn");
3095 0 : debug_rtx (insn);
3096 0 : error ("shared rtx");
3097 0 : debug_rtx (x);
3098 0 : internal_error ("internal consistency failure");
3099 : }
3100 23474488013 : gcc_assert (!RTX_FLAG (x, used));
3101 :
3102 23474488013 : RTX_FLAG (x, used) = 1;
3103 :
3104 : /* Now scan the subexpressions recursively. */
3105 :
3106 23474488013 : format_ptr = GET_RTX_FORMAT (code);
3107 :
3108 65803458187 : for (i = 0; i < GET_RTX_LENGTH (code); i++)
3109 : {
3110 42328970174 : switch (*format_ptr++)
3111 : {
3112 36856068604 : case 'e':
3113 36856068604 : verify_rtx_sharing (XEXP (x, i), insn);
3114 36856068604 : break;
3115 :
3116 919861951 : case 'E':
3117 919861951 : if (XVEC (x, i) != NULL)
3118 : {
3119 919861951 : int j;
3120 919861951 : int len = XVECLEN (x, i);
3121 :
3122 2785118615 : for (j = 0; j < len; j++)
3123 : {
3124 : /* We allow sharing of ASM_OPERANDS inside single
3125 : instruction. */
3126 1865256664 : if (j && GET_CODE (XVECEXP (x, i, j)) == SET
3127 56719105 : && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
3128 : == ASM_OPERANDS))
3129 3250209 : verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
3130 : else
3131 1862006455 : verify_rtx_sharing (XVECEXP (x, i, j), insn);
3132 : }
3133 : }
3134 : break;
3135 : }
3136 : }
3137 : }
3138 :
3139 : /* Reset used-flags for INSN. */
3140 :
3141 : static void
3142 19159561274 : reset_insn_used_flags (rtx insn)
3143 : {
3144 19159561274 : gcc_assert (INSN_P (insn));
3145 19159561274 : reset_used_flags (PATTERN (insn));
3146 19159561274 : reset_used_flags (REG_NOTES (insn));
3147 19159561274 : if (CALL_P (insn))
3148 853157704 : reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn));
3149 19159561274 : }
3150 :
3151 : /* Go through all the RTL insn bodies and clear all the USED bits. */
3152 :
3153 : static void
3154 193073858 : reset_all_used_flags (void)
3155 : {
3156 193073858 : rtx_insn *p;
3157 :
3158 25885533832 : for (p = get_insns (); p; p = NEXT_INSN (p))
3159 25692459974 : if (INSN_P (p))
3160 : {
3161 19159561274 : rtx pat = PATTERN (p);
3162 19159561274 : if (rtx_sequence *seq = dyn_cast<rtx_sequence *> (pat))
3163 : {
3164 0 : gcc_assert (REG_NOTES (p) == NULL);
3165 0 : for (int i = 0; i < seq->len (); i++)
3166 : {
3167 0 : rtx insn = seq->element (i);
3168 0 : if (INSN_P (insn))
3169 0 : reset_insn_used_flags (insn);
3170 : }
3171 : }
3172 : else
3173 19159561274 : reset_insn_used_flags (p);
3174 : }
3175 193073858 : }
3176 :
3177 : /* Verify sharing in INSN. */
3178 :
3179 : static void
3180 9579780637 : verify_insn_sharing (rtx insn)
3181 : {
3182 9579780637 : gcc_assert (INSN_P (insn));
3183 9579780637 : verify_rtx_sharing (PATTERN (insn), insn);
3184 9579780637 : verify_rtx_sharing (REG_NOTES (insn), insn);
3185 9579780637 : if (CALL_P (insn))
3186 426578852 : verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn), insn);
3187 9579780637 : }
3188 :
3189 : /* Go through all the RTL insn bodies and check that there is no unexpected
3190 : sharing in between the subexpressions. */
3191 :
3192 : DEBUG_FUNCTION void
3193 96536929 : verify_rtl_sharing (void)
3194 : {
3195 96536929 : rtx_insn *p;
3196 :
3197 96536929 : timevar_push (TV_VERIFY_RTL_SHARING);
3198 :
3199 96536929 : reset_all_used_flags ();
3200 :
3201 12942766916 : for (p = get_insns (); p; p = NEXT_INSN (p))
3202 12846229987 : if (INSN_P (p))
3203 : {
3204 9579780637 : rtx pat = PATTERN (p);
3205 9579780637 : if (rtx_sequence *seq = dyn_cast<rtx_sequence *> (pat))
3206 0 : for (int i = 0; i < seq->len (); i++)
3207 : {
3208 0 : rtx insn = seq->element (i);
3209 0 : if (INSN_P (insn))
3210 0 : verify_insn_sharing (insn);
3211 : }
3212 : else
3213 9579780637 : verify_insn_sharing (p);
3214 : }
3215 :
3216 96536929 : reset_all_used_flags ();
3217 :
3218 96536929 : timevar_pop (TV_VERIFY_RTL_SHARING);
3219 96536929 : }
3220 :
3221 : /* Go through all the RTL insn bodies and copy any invalid shared structure.
3222 : Assumes the mark bits are cleared at entry. */
3223 :
3224 : void
3225 9601819 : unshare_all_rtl_in_chain (rtx_insn *insn)
3226 : {
3227 377056277 : for (; insn; insn = NEXT_INSN (insn))
3228 367454458 : if (INSN_P (insn))
3229 : {
3230 301394153 : PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
3231 301394153 : REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
3232 301394153 : if (CALL_P (insn))
3233 12422941 : CALL_INSN_FUNCTION_USAGE (insn)
3234 12422941 : = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
3235 : }
3236 9601819 : }
3237 :
3238 : /* Go through all virtual stack slots of a function and mark them as
3239 : shared. We never replace the DECL_RTLs themselves with a copy,
3240 : but expressions mentioned into a DECL_RTL cannot be shared with
3241 : expressions in the instruction stream.
3242 :
3243 : Note that reload may convert pseudo registers into memories in-place.
3244 : Pseudo registers are always shared, but MEMs never are. Thus if we
3245 : reset the used flags on MEMs in the instruction stream, we must set
3246 : them again on MEMs that appear in DECL_RTLs. */
3247 :
3248 : static void
3249 17760729 : set_used_decls (tree blk)
3250 : {
3251 17760729 : tree t;
3252 :
3253 : /* Mark decls. */
3254 38710174 : for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
3255 20949445 : if (DECL_RTL_SET_P (t))
3256 2340419 : set_used_flags (DECL_RTL (t));
3257 :
3258 : /* Now process sub-blocks. */
3259 34005537 : for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
3260 16244808 : set_used_decls (t);
3261 17760729 : }
3262 :
3263 : /* Mark ORIG as in use, and return a copy of it if it was already in use.
3264 : Recursively does the same for subexpressions. Uses
3265 : copy_rtx_if_shared_1 to reduce stack space. */
3266 :
3267 : rtx
3268 653033114 : copy_rtx_if_shared (rtx orig)
3269 : {
3270 653033114 : copy_rtx_if_shared_1 (&orig);
3271 653033114 : return orig;
3272 : }
3273 :
3274 : /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
3275 : use. Recursively does the same for subexpressions. */
3276 :
3277 : static void
3278 1133098975 : copy_rtx_if_shared_1 (rtx *orig1)
3279 : {
3280 1133098975 : rtx x;
3281 1133098975 : int i;
3282 1133098975 : enum rtx_code code;
3283 1133098975 : rtx *last_ptr;
3284 1133098975 : const char *format_ptr;
3285 1133098975 : int copied = 0;
3286 1871585400 : int length;
3287 :
3288 : /* Repeat is used to turn tail-recursion into iteration. */
3289 1871585400 : repeat:
3290 1871585400 : x = *orig1;
3291 :
3292 1871585400 : if (x == 0)
3293 : return;
3294 :
3295 1536855833 : code = GET_CODE (x);
3296 :
3297 : /* These types may be freely shared. */
3298 :
3299 1536855833 : switch (code)
3300 : {
3301 : case REG:
3302 : case DEBUG_EXPR:
3303 : case VALUE:
3304 : CASE_CONST_ANY:
3305 : case SYMBOL_REF:
3306 : case LABEL_REF:
3307 : case CODE_LABEL:
3308 : case PC:
3309 : case RETURN:
3310 : case SIMPLE_RETURN:
3311 : case SCRATCH:
3312 : /* SCRATCH must be shared because they represent distinct values. */
3313 : return;
3314 64815683 : case CLOBBER:
3315 : /* Share clobbers of hard registers, but do not share pseudo reg
3316 : clobbers or clobbers of hard registers that originated as pseudos.
3317 : This is needed to allow safe register renaming. */
3318 64815683 : if (REG_P (XEXP (x, 0))
3319 26422423 : && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3320 91059461 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3321 : return;
3322 : break;
3323 :
3324 5696860 : case CONST:
3325 5696860 : if (shared_const_p (x))
3326 : return;
3327 : break;
3328 :
3329 : case DEBUG_INSN:
3330 : case INSN:
3331 : case JUMP_INSN:
3332 : case CALL_INSN:
3333 : case NOTE:
3334 : case BARRIER:
3335 : /* The chain of insns is not being copied. */
3336 : return;
3337 :
3338 : default:
3339 : break;
3340 : }
3341 :
3342 : /* This rtx may not be shared. If it has already been seen,
3343 : replace it with a copy of itself. */
3344 :
3345 767022103 : if (RTX_FLAG (x, used))
3346 : {
3347 4948257 : x = shallow_copy_rtx (x);
3348 4948257 : copied = 1;
3349 : }
3350 767022103 : RTX_FLAG (x, used) = 1;
3351 :
3352 : /* Now scan the subexpressions recursively.
3353 : We can store any replaced subexpressions directly into X
3354 : since we know X is not shared! Any vectors in X
3355 : must be copied if X was copied. */
3356 :
3357 767022103 : format_ptr = GET_RTX_FORMAT (code);
3358 767022103 : length = GET_RTX_LENGTH (code);
3359 767022103 : last_ptr = NULL;
3360 :
3361 2159647894 : for (i = 0; i < length; i++)
3362 : {
3363 1392625791 : switch (*format_ptr++)
3364 : {
3365 1155205146 : case 'e':
3366 1155205146 : if (last_ptr)
3367 448228296 : copy_rtx_if_shared_1 (last_ptr);
3368 1155205146 : last_ptr = &XEXP (x, i);
3369 1155205146 : break;
3370 :
3371 32171012 : case 'E':
3372 32171012 : if (XVEC (x, i) != NULL)
3373 : {
3374 32171012 : int j;
3375 32171012 : int len = XVECLEN (x, i);
3376 :
3377 : /* Copy the vector iff I copied the rtx and the length
3378 : is nonzero. */
3379 32171012 : if (copied && len > 0)
3380 1375 : XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
3381 :
3382 : /* Call recursively on all inside the vector. */
3383 95518152 : for (j = 0; j < len; j++)
3384 : {
3385 63347140 : if (last_ptr)
3386 31837565 : copy_rtx_if_shared_1 (last_ptr);
3387 63347140 : last_ptr = &XVECEXP (x, i, j);
3388 : }
3389 : }
3390 : break;
3391 : }
3392 : }
3393 767022103 : *orig1 = x;
3394 767022103 : if (last_ptr)
3395 : {
3396 738486425 : orig1 = last_ptr;
3397 738486425 : goto repeat;
3398 : }
3399 : }
3400 :
3401 : /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3402 :
3403 : static void
3404 82035179702 : mark_used_flags (rtx x, int flag)
3405 : {
3406 >12765*10^7 : int i, j;
3407 >12765*10^7 : enum rtx_code code;
3408 >12765*10^7 : const char *format_ptr;
3409 >12765*10^7 : int length;
3410 :
3411 : /* Repeat is used to turn tail-recursion into iteration. */
3412 >12765*10^7 : repeat:
3413 >12765*10^7 : if (x == 0)
3414 : return;
3415 :
3416 >10737*10^7 : code = GET_CODE (x);
3417 :
3418 : /* These types may be freely shared so we needn't do any resetting
3419 : for them. */
3420 :
3421 >10737*10^7 : switch (code)
3422 : {
3423 : case REG:
3424 : case DEBUG_EXPR:
3425 : case VALUE:
3426 : CASE_CONST_ANY:
3427 : case SYMBOL_REF:
3428 : case CODE_LABEL:
3429 : case PC:
3430 : case RETURN:
3431 : case SIMPLE_RETURN:
3432 : return;
3433 :
3434 : case DEBUG_INSN:
3435 : case INSN:
3436 : case JUMP_INSN:
3437 : case CALL_INSN:
3438 : case NOTE:
3439 : case LABEL_REF:
3440 : case BARRIER:
3441 : /* The chain of insns is not being copied. */
3442 : return;
3443 :
3444 55539298268 : default:
3445 55539298268 : break;
3446 : }
3447 :
3448 55539298268 : RTX_FLAG (x, used) = flag;
3449 :
3450 55539298268 : format_ptr = GET_RTX_FORMAT (code);
3451 55539298268 : length = GET_RTX_LENGTH (code);
3452 :
3453 >10937*10^7 : for (i = 0; i < length; i++)
3454 : {
3455 99457115406 : switch (*format_ptr++)
3456 : {
3457 84356904799 : case 'e':
3458 84356904799 : if (i == length-1)
3459 : {
3460 45618276226 : x = XEXP (x, i);
3461 45618276226 : goto repeat;
3462 : }
3463 38738628573 : mark_used_flags (XEXP (x, i), flag);
3464 38738628573 : break;
3465 :
3466 : case 'E':
3467 5702530556 : for (j = 0; j < XVECLEN (x, i); j++)
3468 3804267546 : mark_used_flags (XVECEXP (x, i, j), flag);
3469 : break;
3470 : }
3471 : }
3472 : }
3473 :
3474 : /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3475 : to look for shared sub-parts. */
3476 :
3477 : void
3478 39484747558 : reset_used_flags (rtx x)
3479 : {
3480 39484747558 : mark_used_flags (x, 0);
3481 39484747558 : }
3482 :
3483 : /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3484 : to look for shared sub-parts. */
3485 :
3486 : void
3487 7536025 : set_used_flags (rtx x)
3488 : {
3489 7536025 : mark_used_flags (x, 1);
3490 7536025 : }
3491 :
3492 : /* Copy X if necessary so that it won't be altered by changes in OTHER.
3493 : Return X or the rtx for the pseudo reg the value of X was copied into.
3494 : OTHER must be valid as a SET_DEST. */
3495 :
3496 : rtx
3497 0 : make_safe_from (rtx x, rtx other)
3498 : {
3499 0 : while (1)
3500 0 : switch (GET_CODE (other))
3501 : {
3502 0 : case SUBREG:
3503 0 : other = SUBREG_REG (other);
3504 0 : break;
3505 0 : case STRICT_LOW_PART:
3506 0 : case SIGN_EXTEND:
3507 0 : case ZERO_EXTEND:
3508 0 : other = XEXP (other, 0);
3509 0 : break;
3510 0 : default:
3511 0 : goto done;
3512 : }
3513 0 : done:
3514 0 : if ((MEM_P (other)
3515 0 : && ! CONSTANT_P (x)
3516 0 : && !REG_P (x)
3517 0 : && GET_CODE (x) != SUBREG)
3518 0 : || (REG_P (other)
3519 0 : && (REGNO (other) < FIRST_PSEUDO_REGISTER
3520 0 : || reg_mentioned_p (other, x))))
3521 : {
3522 0 : rtx temp = gen_reg_rtx (GET_MODE (x));
3523 0 : emit_move_insn (temp, x);
3524 0 : return temp;
3525 : }
3526 : return x;
3527 : }
3528 :
3529 : /* Emission of insns (adding them to the doubly-linked list). */
3530 :
3531 : /* Return the last insn emitted, even if it is in a sequence now pushed. */
3532 :
3533 : rtx_insn *
3534 0 : get_last_insn_anywhere (void)
3535 : {
3536 0 : struct sequence_stack *seq;
3537 0 : for (seq = get_current_sequence (); seq; seq = seq->next)
3538 0 : if (seq->last != 0)
3539 : return seq->last;
3540 : return 0;
3541 : }
3542 :
3543 : /* Return the first nonnote insn emitted in current sequence or current
3544 : function. This routine looks inside SEQUENCEs. */
3545 :
3546 : rtx_insn *
3547 0 : get_first_nonnote_insn (void)
3548 : {
3549 0 : rtx_insn *insn = get_insns ();
3550 :
3551 0 : if (insn)
3552 : {
3553 0 : if (NOTE_P (insn))
3554 0 : for (insn = next_insn (insn);
3555 0 : insn && NOTE_P (insn);
3556 0 : insn = next_insn (insn))
3557 0 : continue;
3558 : else
3559 : {
3560 0 : rtx_sequence *seq;
3561 0 : if (NONJUMP_INSN_P (insn)
3562 0 : && (seq = dyn_cast<rtx_sequence *> (PATTERN (insn))))
3563 0 : insn = seq->insn (0);
3564 : }
3565 : }
3566 :
3567 0 : return insn;
3568 : }
3569 :
3570 : /* Return the last nonnote insn emitted in current sequence or current
3571 : function. This routine looks inside SEQUENCEs. */
3572 :
3573 : rtx_insn *
3574 0 : get_last_nonnote_insn (void)
3575 : {
3576 0 : rtx_insn *insn = get_last_insn ();
3577 :
3578 0 : if (insn)
3579 : {
3580 0 : if (NOTE_P (insn))
3581 0 : for (insn = previous_insn (insn);
3582 0 : insn && NOTE_P (insn);
3583 0 : insn = previous_insn (insn))
3584 0 : continue;
3585 : else
3586 : {
3587 0 : if (NONJUMP_INSN_P (insn))
3588 0 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3589 0 : insn = seq->insn (seq->len () - 1);
3590 : }
3591 : }
3592 :
3593 0 : return insn;
3594 : }
3595 :
3596 : /* Return the number of actual (non-debug) insns emitted in this
3597 : function. */
3598 :
3599 : int
3600 3583705 : get_max_insn_count (void)
3601 : {
3602 3583705 : int n = cur_insn_uid;
3603 :
3604 : /* The table size must be stable across -g, to avoid codegen
3605 : differences due to debug insns, and not be affected by
3606 : -fmin-insn-uid, to avoid excessive table size and to simplify
3607 : debugging of -fcompare-debug failures. */
3608 3583705 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
3609 3583705 : n -= cur_debug_insn_uid;
3610 : else
3611 0 : n -= param_min_nondebug_insn_uid;
3612 :
3613 3583705 : return n;
3614 : }
3615 :
3616 :
3617 : /* Return the next insn. If it is a SEQUENCE, return the first insn
3618 : of the sequence. */
3619 :
3620 : rtx_insn *
3621 133626774 : next_insn (rtx_insn *insn)
3622 : {
3623 133626774 : if (insn)
3624 : {
3625 133626774 : insn = NEXT_INSN (insn);
3626 133314102 : if (insn && NONJUMP_INSN_P (insn)
3627 148002420 : && GET_CODE (PATTERN (insn)) == SEQUENCE)
3628 0 : insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3629 : }
3630 :
3631 133626774 : return insn;
3632 : }
3633 :
3634 : /* Return the previous insn. If it is a SEQUENCE, return the last insn
3635 : of the sequence. */
3636 :
3637 : rtx_insn *
3638 72052 : previous_insn (rtx_insn *insn)
3639 : {
3640 72052 : if (insn)
3641 : {
3642 72052 : insn = PREV_INSN (insn);
3643 72052 : if (insn && NONJUMP_INSN_P (insn))
3644 8670 : if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3645 0 : insn = seq->insn (seq->len () - 1);
3646 : }
3647 :
3648 72052 : return insn;
3649 : }
3650 :
3651 : /* Return the next insn after INSN that is not a NOTE. This routine does not
3652 : look inside SEQUENCEs. */
3653 :
3654 : rtx_insn *
3655 551297 : next_nonnote_insn (rtx_insn *insn)
3656 : {
3657 574830 : while (insn)
3658 : {
3659 574830 : insn = NEXT_INSN (insn);
3660 574830 : if (insn == 0 || !NOTE_P (insn))
3661 : break;
3662 : }
3663 :
3664 551297 : return insn;
3665 : }
3666 :
3667 : /* Return the next insn after INSN that is not a DEBUG_INSN. This
3668 : routine does not look inside SEQUENCEs. */
3669 :
3670 : rtx_insn *
3671 6168273 : next_nondebug_insn (rtx_insn *insn)
3672 : {
3673 8607190 : while (insn)
3674 : {
3675 8607190 : insn = NEXT_INSN (insn);
3676 8607190 : if (insn == 0 || !DEBUG_INSN_P (insn))
3677 : break;
3678 : }
3679 :
3680 6168273 : return insn;
3681 : }
3682 :
3683 : /* Return the previous insn before INSN that is not a NOTE. This routine does
3684 : not look inside SEQUENCEs. */
3685 :
3686 : rtx_insn *
3687 96560115 : prev_nonnote_insn (rtx_insn *insn)
3688 : {
3689 101529632 : while (insn)
3690 : {
3691 101529632 : insn = PREV_INSN (insn);
3692 101529632 : if (insn == 0 || !NOTE_P (insn))
3693 : break;
3694 : }
3695 :
3696 96560115 : return insn;
3697 : }
3698 :
3699 : /* Return the previous insn before INSN that is not a DEBUG_INSN.
3700 : This routine does not look inside SEQUENCEs. */
3701 :
3702 : rtx_insn *
3703 2083598 : prev_nondebug_insn (rtx_insn *insn)
3704 : {
3705 4541531 : while (insn)
3706 : {
3707 4541531 : insn = PREV_INSN (insn);
3708 4541531 : if (insn == 0 || !DEBUG_INSN_P (insn))
3709 : break;
3710 : }
3711 :
3712 2083598 : return insn;
3713 : }
3714 :
3715 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3716 : This routine does not look inside SEQUENCEs. */
3717 :
3718 : rtx_insn *
3719 52592975 : next_nonnote_nondebug_insn (rtx_insn *insn)
3720 : {
3721 72043422 : while (insn)
3722 : {
3723 72043422 : insn = NEXT_INSN (insn);
3724 72043422 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3725 : break;
3726 : }
3727 :
3728 52592975 : return insn;
3729 : }
3730 :
3731 : /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN,
3732 : but stop the search before we enter another basic block. This
3733 : routine does not look inside SEQUENCEs.
3734 : NOTE: This can potentially bleed into next BB. If current insn is
3735 : last insn of BB, followed by a code_label before the start of
3736 : the next BB, code_label will be returned. But this is the
3737 : behavior rest of gcc assumes/relies on e.g. get_last_bb_insn. */
3738 :
3739 : rtx_insn *
3740 7657511 : next_nonnote_nondebug_insn_bb (rtx_insn *insn)
3741 : {
3742 7689749 : while (insn)
3743 : {
3744 7689749 : insn = NEXT_INSN (insn);
3745 7689749 : if (insn == 0)
3746 : break;
3747 7459792 : if (DEBUG_INSN_P (insn))
3748 0 : continue;
3749 7459792 : if (!NOTE_P (insn))
3750 : break;
3751 2183613 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3752 : return NULL;
3753 : }
3754 :
3755 : return insn;
3756 : }
3757 :
3758 : /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3759 : This routine does not look inside SEQUENCEs. */
3760 :
3761 : rtx_insn *
3762 146562709 : prev_nonnote_nondebug_insn (rtx_insn *insn)
3763 : {
3764 276400268 : while (insn)
3765 : {
3766 276400268 : insn = PREV_INSN (insn);
3767 276400268 : if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3768 : break;
3769 : }
3770 :
3771 146562709 : return insn;
3772 : }
3773 :
3774 : /* Return the previous insn before INSN that is not a NOTE nor
3775 : DEBUG_INSN, but stop the search before we enter another basic
3776 : block. This routine does not look inside SEQUENCEs. */
3777 :
3778 : rtx_insn *
3779 71555246 : prev_nonnote_nondebug_insn_bb (rtx_insn *insn)
3780 : {
3781 143455280 : while (insn)
3782 : {
3783 143455280 : insn = PREV_INSN (insn);
3784 143455280 : if (insn == 0)
3785 : break;
3786 143455276 : if (DEBUG_INSN_P (insn))
3787 62250245 : continue;
3788 81205031 : if (!NOTE_P (insn))
3789 : break;
3790 21772799 : if (NOTE_INSN_BASIC_BLOCK_P (insn))
3791 : return NULL;
3792 : }
3793 :
3794 : return insn;
3795 : }
3796 :
3797 : /* Return the next INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN after INSN;
3798 : or 0, if there is none. This routine does not look inside
3799 : SEQUENCEs. */
3800 :
3801 : rtx_insn *
3802 4502305 : next_real_insn (rtx_insn *insn)
3803 : {
3804 4570787 : while (insn)
3805 : {
3806 4570787 : insn = NEXT_INSN (insn);
3807 4570787 : if (insn == 0 || INSN_P (insn))
3808 : break;
3809 : }
3810 :
3811 4502305 : return insn;
3812 : }
3813 :
3814 : /* Return the last INSN, CALL_INSN, JUMP_INSN or DEBUG_INSN before INSN;
3815 : or 0, if there is none. This routine does not look inside
3816 : SEQUENCEs. */
3817 :
3818 : rtx_insn *
3819 999775 : prev_real_insn (rtx_insn *insn)
3820 : {
3821 2952204 : while (insn)
3822 : {
3823 2952204 : insn = PREV_INSN (insn);
3824 2952204 : if (insn == 0 || INSN_P (insn))
3825 : break;
3826 : }
3827 :
3828 999775 : return insn;
3829 : }
3830 :
3831 : /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3832 : or 0, if there is none. This routine does not look inside
3833 : SEQUENCEs. */
3834 :
3835 : rtx_insn *
3836 0 : next_real_nondebug_insn (rtx uncast_insn)
3837 : {
3838 0 : rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
3839 :
3840 0 : while (insn)
3841 : {
3842 0 : insn = NEXT_INSN (insn);
3843 0 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3844 : break;
3845 : }
3846 :
3847 0 : return insn;
3848 : }
3849 :
3850 : /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3851 : or 0, if there is none. This routine does not look inside
3852 : SEQUENCEs. */
3853 :
3854 : rtx_insn *
3855 5126510 : prev_real_nondebug_insn (rtx_insn *insn)
3856 : {
3857 15938001 : while (insn)
3858 : {
3859 15938001 : insn = PREV_INSN (insn);
3860 15938001 : if (insn == 0 || NONDEBUG_INSN_P (insn))
3861 : break;
3862 : }
3863 :
3864 5126510 : return insn;
3865 : }
3866 :
3867 : /* Return the last CALL_INSN in the current list, or 0 if there is none.
3868 : This routine does not look inside SEQUENCEs. */
3869 :
3870 : rtx_call_insn *
3871 12411993 : last_call_insn (void)
3872 : {
3873 12411993 : rtx_insn *insn;
3874 :
3875 12539361 : for (insn = get_last_insn ();
3876 12539361 : insn && !CALL_P (insn);
3877 127368 : insn = PREV_INSN (insn))
3878 : ;
3879 :
3880 12411993 : return safe_as_a <rtx_call_insn *> (insn);
3881 : }
3882 :
3883 : bool
3884 1208727147 : active_insn_p (const rtx_insn *insn)
3885 : {
3886 1208727147 : return (CALL_P (insn) || JUMP_P (insn)
3887 1208727147 : || JUMP_TABLE_DATA_P (insn) /* FIXME */
3888 1208727147 : || (NONJUMP_INSN_P (insn)
3889 704556596 : && (! reload_completed
3890 499960009 : || (GET_CODE (PATTERN (insn)) != USE
3891 498344356 : && GET_CODE (PATTERN (insn)) != CLOBBER))));
3892 : }
3893 :
3894 : /* Find the next insn after INSN that really does something. This routine
3895 : does not look inside SEQUENCEs. After reload this also skips over
3896 : standalone USE and CLOBBER insn. */
3897 :
3898 : rtx_insn *
3899 116009096 : next_active_insn (rtx_insn *insn)
3900 : {
3901 263381259 : while (insn)
3902 : {
3903 263381259 : insn = NEXT_INSN (insn);
3904 379390355 : if (insn == 0 || active_insn_p (insn))
3905 : break;
3906 : }
3907 :
3908 116009096 : return insn;
3909 : }
3910 :
3911 : /* Find the last insn before INSN that really does something. This routine
3912 : does not look inside SEQUENCEs. After reload this also skips over
3913 : standalone USE and CLOBBER insn. */
3914 :
3915 : rtx_insn *
3916 46323 : prev_active_insn (rtx_insn *insn)
3917 : {
3918 138046 : while (insn)
3919 : {
3920 138046 : insn = PREV_INSN (insn);
3921 184369 : if (insn == 0 || active_insn_p (insn))
3922 : break;
3923 : }
3924 :
3925 46323 : return insn;
3926 : }
3927 :
3928 : /* Find a RTX_AUTOINC class rtx which matches DATA. */
3929 :
3930 : static int
3931 0 : find_auto_inc (const_rtx x, const_rtx reg)
3932 : {
3933 0 : subrtx_iterator::array_type array;
3934 0 : FOR_EACH_SUBRTX (iter, array, x, NONCONST)
3935 : {
3936 0 : const_rtx x = *iter;
3937 0 : if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC
3938 0 : && rtx_equal_p (reg, XEXP (x, 0)))
3939 0 : return true;
3940 : }
3941 0 : return false;
3942 0 : }
3943 :
3944 : /* Increment the label uses for all labels present in rtx. */
3945 :
3946 : static void
3947 56973296 : mark_label_nuses (rtx x)
3948 : {
3949 56973296 : enum rtx_code code;
3950 56973296 : int i, j;
3951 56973296 : const char *fmt;
3952 :
3953 56973296 : code = GET_CODE (x);
3954 56973301 : if (code == LABEL_REF && LABEL_P (label_ref_label (x)))
3955 1 : LABEL_NUSES (label_ref_label (x))++;
3956 :
3957 56973296 : fmt = GET_RTX_FORMAT (code);
3958 140549745 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3959 : {
3960 83576449 : if (fmt[i] == 'e')
3961 44764216 : mark_label_nuses (XEXP (x, i));
3962 38812233 : else if (fmt[i] == 'E')
3963 3935205 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3964 2727340 : mark_label_nuses (XVECEXP (x, i, j));
3965 : }
3966 56973296 : }
3967 :
3968 :
3969 : /* Try splitting insns that can be split for better scheduling.
3970 : PAT is the pattern which might split.
3971 : TRIAL is the insn providing PAT.
3972 : LAST is nonzero if we should return the last insn of the sequence produced.
3973 :
3974 : If this routine succeeds in splitting, it returns the first or last
3975 : replacement insn depending on the value of LAST. Otherwise, it
3976 : returns TRIAL. If the insn to be returned can be split, it will be. */
3977 :
3978 : rtx_insn *
3979 411420419 : try_split (rtx pat, rtx_insn *trial, int last)
3980 : {
3981 411420419 : rtx_insn *before, *after;
3982 411420419 : rtx note;
3983 411420419 : rtx_insn *seq, *tem;
3984 411420419 : profile_probability probability;
3985 411420419 : rtx_insn *insn_last, *insn;
3986 411420419 : int njumps = 0;
3987 411420419 : rtx_insn *call_insn = NULL;
3988 :
3989 411420419 : if (any_condjump_p (trial)
3990 411420419 : && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3991 15069754 : split_branch_probability
3992 15069754 : = profile_probability::from_reg_br_prob_note (XINT (note, 0));
3993 : else
3994 396350665 : split_branch_probability = profile_probability::uninitialized ();
3995 :
3996 411420419 : probability = split_branch_probability;
3997 :
3998 411420419 : seq = split_insns (pat, trial);
3999 :
4000 411420419 : split_branch_probability = profile_probability::uninitialized ();
4001 :
4002 411420419 : if (!seq)
4003 : return trial;
4004 :
4005 : int split_insn_count = 0;
4006 : /* Avoid infinite loop if any insn of the result matches
4007 : the original pattern. */
4008 : insn_last = seq;
4009 9497642 : while (1)
4010 : {
4011 9497642 : if (INSN_P (insn_last)
4012 9497642 : && rtx_equal_p (PATTERN (insn_last), pat))
4013 : return trial;
4014 9496124 : split_insn_count++;
4015 9496124 : if (!NEXT_INSN (insn_last))
4016 : break;
4017 : insn_last = NEXT_INSN (insn_last);
4018 : }
4019 :
4020 : /* We're not good at redistributing frame information if
4021 : the split occurs before reload or if it results in more
4022 : than one insn. */
4023 6287331 : if (RTX_FRAME_RELATED_P (trial))
4024 : {
4025 37 : if (!reload_completed || split_insn_count != 1)
4026 : return trial;
4027 :
4028 37 : rtx_insn *new_insn = seq;
4029 37 : rtx_insn *old_insn = trial;
4030 37 : copy_frame_info_to_split_insn (old_insn, new_insn);
4031 : }
4032 :
4033 : /* We will be adding the new sequence to the function. The splitters
4034 : may have introduced invalid RTL sharing, so unshare the sequence now. */
4035 6287331 : unshare_all_rtl_in_chain (seq);
4036 :
4037 : /* Mark labels and copy flags. */
4038 22070786 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4039 : {
4040 9496124 : if (JUMP_P (insn))
4041 : {
4042 6197 : if (JUMP_P (trial))
4043 5353 : CROSSING_JUMP_P (insn) = CROSSING_JUMP_P (trial);
4044 6197 : mark_jump_label (PATTERN (insn), insn, 0);
4045 6197 : njumps++;
4046 6197 : if (probability.initialized_p ()
4047 5323 : && any_condjump_p (insn)
4048 11520 : && !find_reg_note (insn, REG_BR_PROB, 0))
4049 : {
4050 : /* We can preserve the REG_BR_PROB notes only if exactly
4051 : one jump is created, otherwise the machine description
4052 : is responsible for this step using
4053 : split_branch_probability variable. */
4054 5323 : gcc_assert (njumps == 1);
4055 5323 : add_reg_br_prob_note (insn, probability);
4056 : }
4057 : }
4058 : }
4059 :
4060 : /* If we are splitting a CALL_INSN, look for the CALL_INSN
4061 : in SEQ and copy any additional information across. */
4062 6287331 : if (CALL_P (trial))
4063 : {
4064 0 : for (insn = insn_last; insn ; insn = PREV_INSN (insn))
4065 0 : if (CALL_P (insn))
4066 : {
4067 0 : gcc_assert (call_insn == NULL_RTX);
4068 0 : call_insn = insn;
4069 :
4070 : /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
4071 : target may have explicitly specified. */
4072 0 : rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
4073 0 : while (*p)
4074 0 : p = &XEXP (*p, 1);
4075 0 : *p = CALL_INSN_FUNCTION_USAGE (trial);
4076 :
4077 : /* Preserve the ABI information from the original call. */
4078 0 : CALL_INSN_ABI_ID (insn) = CALL_INSN_ABI_ID (trial);
4079 :
4080 : /* If the old call was a sibling call, the new one must
4081 : be too. */
4082 0 : SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
4083 : }
4084 : }
4085 :
4086 : /* Copy notes, particularly those related to the CFG. */
4087 8159636 : for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
4088 : {
4089 1872305 : switch (REG_NOTE_KIND (note))
4090 : {
4091 2790 : case REG_EH_REGION:
4092 2790 : copy_reg_eh_region_note_backward (note, insn_last, NULL);
4093 2790 : break;
4094 :
4095 : case REG_NORETURN:
4096 : case REG_SETJMP:
4097 : case REG_TM:
4098 : case REG_CALL_NOCF_CHECK:
4099 : case REG_CALL_ARG_LOCATION:
4100 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4101 : {
4102 0 : if (CALL_P (insn))
4103 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4104 : }
4105 : break;
4106 :
4107 : case REG_NON_LOCAL_GOTO:
4108 : case REG_LABEL_TARGET:
4109 0 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4110 : {
4111 0 : if (JUMP_P (insn))
4112 0 : add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
4113 : }
4114 : break;
4115 :
4116 : case REG_INC:
4117 : if (!AUTO_INC_DEC)
4118 : break;
4119 :
4120 : for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
4121 : {
4122 : rtx reg = XEXP (note, 0);
4123 : if (!FIND_REG_INC_NOTE (insn, reg)
4124 : && find_auto_inc (PATTERN (insn), reg))
4125 : add_reg_note (insn, REG_INC, reg);
4126 : }
4127 : break;
4128 :
4129 306019 : case REG_ARGS_SIZE:
4130 306019 : fixup_args_size_notes (NULL, insn_last, get_args_size (note));
4131 306019 : break;
4132 :
4133 0 : case REG_CALL_DECL:
4134 0 : case REG_UNTYPED_CALL:
4135 0 : gcc_assert (call_insn != NULL_RTX);
4136 0 : add_reg_note (call_insn, REG_NOTE_KIND (note), XEXP (note, 0));
4137 0 : break;
4138 :
4139 : default:
4140 : break;
4141 : }
4142 : }
4143 :
4144 : /* If there are LABELS inside the split insns increment the
4145 : usage count so we don't delete the label. */
4146 6287331 : if (INSN_P (trial))
4147 : {
4148 : insn = insn_last;
4149 15783455 : while (insn != NULL_RTX)
4150 : {
4151 : /* JUMP_P insns have already been "marked" above. */
4152 9496124 : if (NONJUMP_INSN_P (insn))
4153 9481740 : mark_label_nuses (PATTERN (insn));
4154 :
4155 9496124 : insn = PREV_INSN (insn);
4156 : }
4157 : }
4158 :
4159 6287331 : before = PREV_INSN (trial);
4160 6287331 : after = NEXT_INSN (trial);
4161 :
4162 6287331 : emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
4163 :
4164 6287331 : delete_insn (trial);
4165 :
4166 : /* Recursively call try_split for each new insn created; by the
4167 : time control returns here that insn will be fully split, so
4168 : set LAST and continue from the insn after the one returned.
4169 : We can't use next_active_insn here since AFTER may be a note.
4170 : Ignore deleted insns, which can be occur if not optimizing. */
4171 22070786 : for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
4172 9496124 : if (! tem->deleted () && INSN_P (tem))
4173 9487937 : tem = try_split (PATTERN (tem), tem, 1);
4174 :
4175 : /* Return either the first or the last insn, depending on which was
4176 : requested. */
4177 6287331 : return last
4178 6287331 : ? (after ? PREV_INSN (after) : get_last_insn ())
4179 0 : : NEXT_INSN (before);
4180 : }
4181 :
4182 : /* Make and return an INSN rtx, initializing all its slots.
4183 : Store PATTERN in the pattern slots. */
4184 :
4185 : rtx_insn *
4186 129370631 : make_insn_raw (rtx pattern)
4187 : {
4188 129370631 : rtx_insn *insn;
4189 :
4190 129370631 : insn = as_a <rtx_insn *> (rtx_alloc (INSN));
4191 :
4192 129370631 : INSN_UID (insn) = cur_insn_uid++;
4193 129370631 : PATTERN (insn) = pattern;
4194 129370631 : INSN_CODE (insn) = -1;
4195 129370631 : REG_NOTES (insn) = NULL;
4196 129370631 : INSN_LOCATION (insn) = curr_insn_location ();
4197 129370631 : BLOCK_FOR_INSN (insn) = NULL;
4198 :
4199 : #ifdef ENABLE_RTL_CHECKING
4200 : if (insn
4201 : && INSN_P (insn)
4202 : && (returnjump_p (insn)
4203 : || (GET_CODE (insn) == SET
4204 : && SET_DEST (insn) == pc_rtx)))
4205 : {
4206 : warning (0, "ICE: %<emit_insn%> used where %<emit_jump_insn%> needed:");
4207 : debug_rtx (insn);
4208 : }
4209 : #endif
4210 :
4211 129370631 : return insn;
4212 : }
4213 :
4214 : /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
4215 :
4216 : static rtx_insn *
4217 56714166 : make_debug_insn_raw (rtx pattern)
4218 : {
4219 56714166 : rtx_debug_insn *insn;
4220 :
4221 56714166 : insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
4222 56714166 : INSN_UID (insn) = cur_debug_insn_uid++;
4223 56714166 : if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
4224 56714166 : INSN_UID (insn) = cur_insn_uid++;
4225 :
4226 56714166 : PATTERN (insn) = pattern;
4227 56714166 : INSN_CODE (insn) = -1;
4228 56714166 : REG_NOTES (insn) = NULL;
4229 56714166 : INSN_LOCATION (insn) = curr_insn_location ();
4230 56714166 : BLOCK_FOR_INSN (insn) = NULL;
4231 :
4232 56714166 : return insn;
4233 : }
4234 :
4235 : /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
4236 :
4237 : static rtx_insn *
4238 18579955 : make_jump_insn_raw (rtx pattern)
4239 : {
4240 18579955 : rtx_jump_insn *insn;
4241 :
4242 18579955 : insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
4243 18579955 : INSN_UID (insn) = cur_insn_uid++;
4244 :
4245 18579955 : PATTERN (insn) = pattern;
4246 18579955 : INSN_CODE (insn) = -1;
4247 18579955 : REG_NOTES (insn) = NULL;
4248 18579955 : JUMP_LABEL (insn) = NULL;
4249 18579955 : INSN_LOCATION (insn) = curr_insn_location ();
4250 18579955 : BLOCK_FOR_INSN (insn) = NULL;
4251 :
4252 18579955 : return insn;
4253 : }
4254 :
4255 : /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
4256 :
4257 : static rtx_insn *
4258 6521302 : make_call_insn_raw (rtx pattern)
4259 : {
4260 6521302 : rtx_call_insn *insn;
4261 :
4262 6521302 : insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
4263 6521302 : INSN_UID (insn) = cur_insn_uid++;
4264 :
4265 6521302 : PATTERN (insn) = pattern;
4266 6521302 : INSN_CODE (insn) = -1;
4267 6521302 : REG_NOTES (insn) = NULL;
4268 6521302 : CALL_INSN_FUNCTION_USAGE (insn) = NULL;
4269 6521302 : CALL_INSN_ABI_ID (insn) = 0;
4270 6521302 : INSN_LOCATION (insn) = curr_insn_location ();
4271 6521302 : BLOCK_FOR_INSN (insn) = NULL;
4272 :
4273 6521302 : return insn;
4274 : }
4275 :
4276 : /* Like `make_insn_raw' but make a NOTE instead of an insn. */
4277 :
4278 : static rtx_note *
4279 181325301 : make_note_raw (enum insn_note subtype)
4280 : {
4281 : /* Some notes are never created this way at all. These notes are
4282 : only created by patching out insns. */
4283 181325301 : gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
4284 : && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
4285 :
4286 181325301 : rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
4287 181325301 : INSN_UID (note) = cur_insn_uid++;
4288 181325301 : NOTE_KIND (note) = subtype;
4289 181325301 : BLOCK_FOR_INSN (note) = NULL;
4290 181325301 : memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4291 181325301 : return note;
4292 : }
4293 :
4294 : /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
4295 : INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
4296 : but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
4297 :
4298 : static inline void
4299 623996383 : link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
4300 : {
4301 623996383 : SET_PREV_INSN (insn) = prev;
4302 623996383 : SET_NEXT_INSN (insn) = next;
4303 623996383 : if (prev != NULL)
4304 : {
4305 451232339 : SET_NEXT_INSN (prev) = insn;
4306 451232339 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4307 : {
4308 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4309 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
4310 : }
4311 : }
4312 623996383 : if (next != NULL)
4313 : {
4314 186511478 : SET_PREV_INSN (next) = insn;
4315 186511478 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4316 : {
4317 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4318 0 : SET_PREV_INSN (sequence->insn (0)) = insn;
4319 : }
4320 : }
4321 :
4322 623996383 : if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
4323 : {
4324 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
4325 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4326 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4327 : }
4328 623996383 : }
4329 :
4330 : /* Add INSN to the end of the doubly-linked list.
4331 : INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4332 :
4333 : void
4334 426037156 : add_insn (rtx_insn *insn)
4335 : {
4336 426037156 : rtx_insn *prev = get_last_insn ();
4337 426037156 : link_insn_into_chain (insn, prev, NULL);
4338 426037156 : if (get_insns () == NULL)
4339 172573989 : set_first_insn (insn);
4340 426037156 : set_last_insn (insn);
4341 426037156 : }
4342 :
4343 : /* Add INSN into the doubly-linked list after insn AFTER. */
4344 :
4345 : static void
4346 73196233 : add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
4347 : {
4348 73196233 : rtx_insn *next = NEXT_INSN (after);
4349 :
4350 73196233 : gcc_assert (!optimize || !after->deleted ());
4351 :
4352 73196233 : link_insn_into_chain (insn, after, next);
4353 :
4354 73196233 : if (next == NULL)
4355 : {
4356 : struct sequence_stack *seq;
4357 :
4358 11447749 : for (seq = get_current_sequence (); seq; seq = seq->next)
4359 11447749 : if (after == seq->last)
4360 : {
4361 11447749 : seq->last = insn;
4362 11447749 : break;
4363 : }
4364 : }
4365 73196233 : }
4366 :
4367 : /* Add INSN into the doubly-linked list before insn BEFORE. */
4368 :
4369 : static void
4370 124762994 : add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
4371 : {
4372 124762994 : rtx_insn *prev = PREV_INSN (before);
4373 :
4374 124762994 : gcc_assert (!optimize || !before->deleted ());
4375 :
4376 124762994 : link_insn_into_chain (insn, prev, before);
4377 :
4378 124762994 : if (prev == NULL)
4379 : {
4380 : struct sequence_stack *seq;
4381 :
4382 190055 : for (seq = get_current_sequence (); seq; seq = seq->next)
4383 190055 : if (before == seq->first)
4384 : {
4385 190055 : seq->first = insn;
4386 190055 : break;
4387 : }
4388 :
4389 190055 : gcc_assert (seq);
4390 : }
4391 124762994 : }
4392 :
4393 : /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4394 : If BB is NULL, an attempt is made to infer the bb from before.
4395 :
4396 : This and the next function should be the only functions called
4397 : to insert an insn once delay slots have been filled since only
4398 : they know how to update a SEQUENCE. */
4399 :
4400 : void
4401 71680454 : add_insn_after (rtx_insn *insn, rtx_insn *after, basic_block bb)
4402 : {
4403 71680454 : add_insn_after_nobb (insn, after);
4404 71680454 : if (!BARRIER_P (after)
4405 71649147 : && !BARRIER_P (insn)
4406 135459525 : && (bb = BLOCK_FOR_INSN (after)))
4407 : {
4408 53017406 : set_block_for_insn (insn, bb);
4409 53017406 : if (INSN_P (insn))
4410 844538 : df_insn_rescan (insn);
4411 : /* Should not happen as first in the BB is always
4412 : either NOTE or LABEL. */
4413 53017406 : if (BB_END (bb) == after
4414 : /* Avoid clobbering of structure when creating new BB. */
4415 1012247 : && !BARRIER_P (insn)
4416 1012247 : && !NOTE_INSN_BASIC_BLOCK_P (insn))
4417 327273 : BB_END (bb) = insn;
4418 : }
4419 71680454 : }
4420 :
4421 : /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4422 : If BB is NULL, an attempt is made to infer the bb from before.
4423 :
4424 : This and the previous function should be the only functions called
4425 : to insert an insn once delay slots have been filled since only
4426 : they know how to update a SEQUENCE. */
4427 :
4428 : void
4429 100486729 : add_insn_before (rtx_insn *insn, rtx_insn *before, basic_block bb)
4430 : {
4431 100486729 : add_insn_before_nobb (insn, before);
4432 :
4433 100486729 : if (BARRIER_P (insn))
4434 : return;
4435 :
4436 100486612 : if (!bb
4437 23416326 : && !BARRIER_P (before))
4438 23416325 : bb = BLOCK_FOR_INSN (before);
4439 :
4440 23416326 : if (bb)
4441 : {
4442 96743351 : set_block_for_insn (insn, bb);
4443 96743351 : if (INSN_P (insn))
4444 13871942 : df_insn_rescan (insn);
4445 : /* Should not happen as first in the BB is always either NOTE or
4446 : LABEL. */
4447 96743351 : gcc_assert (BB_HEAD (bb) != insn
4448 : /* Avoid clobbering of structure when creating new BB. */
4449 : || BARRIER_P (insn)
4450 : || NOTE_INSN_BASIC_BLOCK_P (insn));
4451 : }
4452 : }
4453 :
4454 : /* Replace insn with an deleted instruction note. */
4455 :
4456 : void
4457 14480305 : set_insn_deleted (rtx_insn *insn)
4458 : {
4459 14480305 : if (INSN_P (insn))
4460 14480305 : df_insn_delete (insn);
4461 14480305 : PUT_CODE (insn, NOTE);
4462 14480305 : NOTE_KIND (insn) = NOTE_INSN_DELETED;
4463 14480305 : }
4464 :
4465 :
4466 : /* Unlink INSN from the insn chain.
4467 :
4468 : This function knows how to handle sequences.
4469 :
4470 : This function does not invalidate data flow information associated with
4471 : INSN (i.e. does not call df_insn_delete). That makes this function
4472 : usable for only disconnecting an insn from the chain, and re-emit it
4473 : elsewhere later.
4474 :
4475 : To later insert INSN elsewhere in the insn chain via add_insn and
4476 : similar functions, PREV_INSN and NEXT_INSN must be nullified by
4477 : the caller. Nullifying them here breaks many insn chain walks.
4478 :
4479 : To really delete an insn and related DF information, use delete_insn. */
4480 :
4481 : void
4482 144441474 : remove_insn (rtx_insn *insn)
4483 : {
4484 144441474 : rtx_insn *next = NEXT_INSN (insn);
4485 144441474 : rtx_insn *prev = PREV_INSN (insn);
4486 144441474 : basic_block bb;
4487 :
4488 144441474 : if (prev)
4489 : {
4490 144441215 : SET_NEXT_INSN (prev) = next;
4491 144441215 : if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4492 : {
4493 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4494 0 : SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4495 : }
4496 : }
4497 : else
4498 : {
4499 : struct sequence_stack *seq;
4500 :
4501 259 : for (seq = get_current_sequence (); seq; seq = seq->next)
4502 259 : if (insn == seq->first)
4503 : {
4504 259 : seq->first = next;
4505 259 : break;
4506 : }
4507 :
4508 259 : gcc_assert (seq);
4509 : }
4510 :
4511 144441474 : if (next)
4512 : {
4513 142299342 : SET_PREV_INSN (next) = prev;
4514 142299342 : if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4515 : {
4516 0 : rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4517 0 : SET_PREV_INSN (sequence->insn (0)) = prev;
4518 : }
4519 : }
4520 : else
4521 : {
4522 : struct sequence_stack *seq;
4523 :
4524 2142132 : for (seq = get_current_sequence (); seq; seq = seq->next)
4525 2142132 : if (insn == seq->last)
4526 : {
4527 2142132 : seq->last = prev;
4528 2142132 : break;
4529 : }
4530 :
4531 2142132 : gcc_assert (seq);
4532 : }
4533 :
4534 : /* Fix up basic block boundaries, if necessary. */
4535 144441474 : if (!BARRIER_P (insn)
4536 144441474 : && (bb = BLOCK_FOR_INSN (insn)))
4537 : {
4538 141357824 : if (BB_HEAD (bb) == insn)
4539 : {
4540 : /* Never ever delete the basic block note without deleting whole
4541 : basic block. */
4542 2497422 : gcc_assert (!NOTE_P (insn));
4543 2497422 : BB_HEAD (bb) = next;
4544 : }
4545 141357824 : if (BB_END (bb) == insn)
4546 24075323 : BB_END (bb) = prev;
4547 : }
4548 144441474 : }
4549 :
4550 : /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4551 :
4552 : void
4553 6466234 : add_function_usage_to (rtx call_insn, rtx call_fusage)
4554 : {
4555 6466234 : gcc_assert (call_insn && CALL_P (call_insn));
4556 :
4557 : /* Put the register usage information on the CALL. If there is already
4558 : some usage information, put ours at the end. */
4559 6466234 : if (CALL_INSN_FUNCTION_USAGE (call_insn))
4560 : {
4561 : rtx link;
4562 :
4563 569263 : for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4564 : link = XEXP (link, 1))
4565 : ;
4566 :
4567 569262 : XEXP (link, 1) = call_fusage;
4568 : }
4569 : else
4570 5896972 : CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4571 6466234 : }
4572 :
4573 : /* Delete all insns made since FROM.
4574 : FROM becomes the new last instruction. */
4575 :
4576 : void
4577 1324348 : delete_insns_since (rtx_insn *from)
4578 : {
4579 1324348 : if (from == 0)
4580 142231 : set_first_insn (0);
4581 : else
4582 1182117 : SET_NEXT_INSN (from) = 0;
4583 1324348 : set_last_insn (from);
4584 1324348 : }
4585 :
4586 : /* This function is deprecated, please use sequences instead.
4587 :
4588 : Move a consecutive bunch of insns to a different place in the chain.
4589 : The insns to be moved are those between FROM and TO.
4590 : They are moved to a new position after the insn AFTER.
4591 : AFTER must not be FROM or TO or any insn in between.
4592 :
4593 : This function does not know about SEQUENCEs and hence should not be
4594 : called after delay-slot filling has been done. */
4595 :
4596 : void
4597 1860507 : reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4598 : {
4599 1860507 : if (flag_checking)
4600 : {
4601 2480113 : for (rtx_insn *x = from; x != to; x = NEXT_INSN (x))
4602 619629 : gcc_assert (after != x);
4603 1860484 : gcc_assert (after != to);
4604 : }
4605 :
4606 : /* Splice this bunch out of where it is now. */
4607 1860507 : if (PREV_INSN (from))
4608 1860507 : SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4609 1860507 : if (NEXT_INSN (to))
4610 1851335 : SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4611 1860507 : if (get_last_insn () == to)
4612 9172 : set_last_insn (PREV_INSN (from));
4613 1860507 : if (get_insns () == from)
4614 0 : set_first_insn (NEXT_INSN (to));
4615 :
4616 : /* Make the new neighbors point to it and it to them. */
4617 1860507 : if (NEXT_INSN (after))
4618 1852793 : SET_PREV_INSN (NEXT_INSN (after)) = to;
4619 :
4620 1860507 : SET_NEXT_INSN (to) = NEXT_INSN (after);
4621 1860507 : SET_PREV_INSN (from) = after;
4622 1860507 : SET_NEXT_INSN (after) = from;
4623 1860507 : if (after == get_last_insn ())
4624 7714 : set_last_insn (to);
4625 1860507 : }
4626 :
4627 : /* Same as function above, but take care to update BB boundaries. */
4628 : void
4629 1198859 : reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4630 : {
4631 1198859 : rtx_insn *prev = PREV_INSN (from);
4632 1198859 : basic_block bb, bb2;
4633 :
4634 1198859 : reorder_insns_nobb (from, to, after);
4635 :
4636 1198859 : if (!BARRIER_P (after)
4637 1198859 : && (bb = BLOCK_FOR_INSN (after)))
4638 : {
4639 1191398 : rtx_insn *x;
4640 1191398 : df_set_bb_dirty (bb);
4641 :
4642 1191398 : if (!BARRIER_P (from)
4643 1191398 : && (bb2 = BLOCK_FOR_INSN (from)))
4644 : {
4645 1191398 : if (BB_END (bb2) == to)
4646 19403 : BB_END (bb2) = prev;
4647 1191398 : df_set_bb_dirty (bb2);
4648 : }
4649 :
4650 1191398 : if (BB_END (bb) == after)
4651 337818 : BB_END (bb) = to;
4652 :
4653 2438717 : for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4654 1247319 : if (!BARRIER_P (x))
4655 1247319 : df_insn_change_bb (x, bb);
4656 : }
4657 1198859 : }
4658 :
4659 :
4660 : /* Emit insn(s) of given code and pattern
4661 : at a specified place within the doubly-linked list.
4662 :
4663 : All of the emit_foo global entry points accept an object
4664 : X which is either an insn list or a PATTERN of a single
4665 : instruction.
4666 :
4667 : There are thus a few canonical ways to generate code and
4668 : emit it at a specific place in the instruction stream. For
4669 : example, consider the instruction named SPOT and the fact that
4670 : we would like to emit some instructions before SPOT. We might
4671 : do it like this:
4672 :
4673 : start_sequence ();
4674 : ... emit the new instructions ...
4675 : insns_head = end_sequence ();
4676 :
4677 : emit_insn_before (insns_head, SPOT);
4678 :
4679 : It used to be common to generate SEQUENCE rtl instead, but that
4680 : is a relic of the past which no longer occurs. The reason is that
4681 : SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4682 : generated would almost certainly die right after it was created. */
4683 :
4684 : static rtx_insn *
4685 12103064 : emit_pattern_before_noloc (rtx x, rtx_insn *before, rtx_insn *last,
4686 : basic_block bb,
4687 : rtx_insn *(*make_raw) (rtx))
4688 : {
4689 12103064 : rtx_insn *insn;
4690 :
4691 12103064 : gcc_assert (before);
4692 :
4693 12103064 : if (x == NULL_RTX)
4694 : return last;
4695 :
4696 12087269 : switch (GET_CODE (x))
4697 : {
4698 10555376 : case DEBUG_INSN:
4699 10555376 : case INSN:
4700 10555376 : case JUMP_INSN:
4701 10555376 : case CALL_INSN:
4702 10555376 : case CODE_LABEL:
4703 10555376 : case BARRIER:
4704 10555376 : case NOTE:
4705 10555376 : insn = as_a <rtx_insn *> (x);
4706 34135354 : while (insn)
4707 : {
4708 13024602 : rtx_insn *next = NEXT_INSN (insn);
4709 13024602 : add_insn_before (insn, before, bb);
4710 13024602 : last = insn;
4711 13024602 : insn = next;
4712 : }
4713 : break;
4714 :
4715 : #ifdef ENABLE_RTL_CHECKING
4716 : case SEQUENCE:
4717 : gcc_unreachable ();
4718 : break;
4719 : #endif
4720 :
4721 1531893 : default:
4722 1531893 : last = (*make_raw) (x);
4723 1531893 : add_insn_before (last, before, bb);
4724 1531893 : break;
4725 : }
4726 :
4727 : return last;
4728 : }
4729 :
4730 : /* Make X be output before the instruction BEFORE. */
4731 :
4732 : rtx_insn *
4733 484326 : emit_insn_before_noloc (rtx x, rtx_insn *before, basic_block bb)
4734 : {
4735 484326 : return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4736 : }
4737 :
4738 : /* Make an instruction with body X and code JUMP_INSN
4739 : and output it before the instruction BEFORE. */
4740 :
4741 : rtx_jump_insn *
4742 0 : emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
4743 : {
4744 0 : return as_a <rtx_jump_insn *> (
4745 : emit_pattern_before_noloc (x, before, NULL, NULL,
4746 0 : make_jump_insn_raw));
4747 : }
4748 :
4749 : /* Make an instruction with body X and code CALL_INSN
4750 : and output it before the instruction BEFORE. */
4751 :
4752 : rtx_insn *
4753 0 : emit_call_insn_before_noloc (rtx x, rtx_insn *before)
4754 : {
4755 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4756 0 : make_call_insn_raw);
4757 : }
4758 :
4759 : /* Make an instruction with body X and code DEBUG_INSN
4760 : and output it before the instruction BEFORE. */
4761 :
4762 : rtx_insn *
4763 0 : emit_debug_insn_before_noloc (rtx x, rtx_insn *before)
4764 : {
4765 0 : return emit_pattern_before_noloc (x, before, NULL, NULL,
4766 0 : make_debug_insn_raw);
4767 : }
4768 :
4769 : /* Make an insn of code BARRIER
4770 : and output it before the insn BEFORE. */
4771 :
4772 : rtx_barrier *
4773 0 : emit_barrier_before (rtx_insn *before)
4774 : {
4775 0 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4776 :
4777 0 : INSN_UID (insn) = cur_insn_uid++;
4778 :
4779 0 : add_insn_before (insn, before, NULL);
4780 0 : return insn;
4781 : }
4782 :
4783 : /* Emit the label LABEL before the insn BEFORE. */
4784 :
4785 : rtx_code_label *
4786 6743304 : emit_label_before (rtx_code_label *label, rtx_insn *before)
4787 : {
4788 6743304 : gcc_checking_assert (INSN_UID (label) == 0);
4789 6743304 : INSN_UID (label) = cur_insn_uid++;
4790 6743304 : add_insn_before (label, before, NULL);
4791 6743304 : return label;
4792 : }
4793 :
4794 : /* Helper for emit_insn_after, handles lists of instructions
4795 : efficiently. */
4796 :
4797 : static rtx_insn *
4798 25035056 : emit_insn_after_1 (rtx_insn *first, rtx_insn *after, basic_block bb)
4799 : {
4800 25035056 : rtx_insn *last;
4801 25035056 : rtx_insn *after_after;
4802 25035056 : if (!bb && !BARRIER_P (after))
4803 20346920 : bb = BLOCK_FOR_INSN (after);
4804 :
4805 20346920 : if (bb)
4806 : {
4807 25034981 : df_set_bb_dirty (bb);
4808 69030856 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4809 18960894 : if (!BARRIER_P (last))
4810 : {
4811 18959198 : set_block_for_insn (last, bb);
4812 18959198 : df_insn_rescan (last);
4813 : }
4814 25034981 : if (!BARRIER_P (last))
4815 : {
4816 25034981 : set_block_for_insn (last, bb);
4817 25034981 : df_insn_rescan (last);
4818 : }
4819 25034981 : if (BB_END (bb) == after)
4820 9293544 : BB_END (bb) = last;
4821 : }
4822 : else
4823 75 : for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4824 0 : continue;
4825 :
4826 25035056 : after_after = NEXT_INSN (after);
4827 :
4828 25035056 : SET_NEXT_INSN (after) = first;
4829 25035056 : SET_PREV_INSN (first) = after;
4830 25035056 : SET_NEXT_INSN (last) = after_after;
4831 25035056 : if (after_after)
4832 24922130 : SET_PREV_INSN (after_after) = last;
4833 :
4834 25035056 : if (after == get_last_insn ())
4835 112926 : set_last_insn (last);
4836 :
4837 25035056 : return last;
4838 : }
4839 :
4840 : static rtx_insn *
4841 30151947 : emit_pattern_after_noloc (rtx x, rtx_insn *after, basic_block bb,
4842 : rtx_insn *(*make_raw)(rtx))
4843 : {
4844 30151947 : rtx_insn *last = after;
4845 :
4846 30151947 : gcc_assert (after);
4847 :
4848 30151947 : if (x == NULL_RTX)
4849 : return last;
4850 :
4851 29589114 : switch (GET_CODE (x))
4852 : {
4853 25035056 : case DEBUG_INSN:
4854 25035056 : case INSN:
4855 25035056 : case JUMP_INSN:
4856 25035056 : case CALL_INSN:
4857 25035056 : case CODE_LABEL:
4858 25035056 : case BARRIER:
4859 25035056 : case NOTE:
4860 25035056 : last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
4861 25035056 : break;
4862 :
4863 : #ifdef ENABLE_RTL_CHECKING
4864 : case SEQUENCE:
4865 : gcc_unreachable ();
4866 : break;
4867 : #endif
4868 :
4869 4554058 : default:
4870 4554058 : last = (*make_raw) (x);
4871 4554058 : add_insn_after (last, after, bb);
4872 4554058 : break;
4873 : }
4874 :
4875 : return last;
4876 : }
4877 :
4878 : /* Make X be output after the insn AFTER and set the BB of insn. If
4879 : BB is NULL, an attempt is made to infer the BB from AFTER. */
4880 :
4881 : rtx_insn *
4882 4922940 : emit_insn_after_noloc (rtx x, rtx_insn *after, basic_block bb)
4883 : {
4884 4922940 : return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4885 : }
4886 :
4887 :
4888 : /* Make an insn of code JUMP_INSN with body X
4889 : and output it after the insn AFTER. */
4890 :
4891 : rtx_jump_insn *
4892 2357 : emit_jump_insn_after_noloc (rtx x, rtx_insn *after)
4893 : {
4894 2357 : return as_a <rtx_jump_insn *> (
4895 2357 : emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
4896 : }
4897 :
4898 : /* Make an instruction with body X and code CALL_INSN
4899 : and output it after the instruction AFTER. */
4900 :
4901 : rtx_insn *
4902 0 : emit_call_insn_after_noloc (rtx x, rtx_insn *after)
4903 : {
4904 0 : return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4905 : }
4906 :
4907 : /* Make an instruction with body X and code CALL_INSN
4908 : and output it after the instruction AFTER. */
4909 :
4910 : rtx_insn *
4911 0 : emit_debug_insn_after_noloc (rtx x, rtx_insn *after)
4912 : {
4913 0 : return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4914 : }
4915 :
4916 : /* Make an insn of code BARRIER
4917 : and output it after the insn AFTER. */
4918 :
4919 : rtx_barrier *
4920 7870076 : emit_barrier_after (rtx_insn *after)
4921 : {
4922 7870076 : rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4923 :
4924 7870076 : INSN_UID (insn) = cur_insn_uid++;
4925 :
4926 7870076 : add_insn_after (insn, after, NULL);
4927 7870076 : return insn;
4928 : }
4929 :
4930 : /* Emit the label LABEL after the insn AFTER. */
4931 :
4932 : rtx_insn *
4933 0 : emit_label_after (rtx_insn *label, rtx_insn *after)
4934 : {
4935 0 : gcc_checking_assert (INSN_UID (label) == 0);
4936 0 : INSN_UID (label) = cur_insn_uid++;
4937 0 : add_insn_after (label, after, NULL);
4938 0 : return label;
4939 : }
4940 :
4941 : /* Notes require a bit of special handling: Some notes need to have their
4942 : BLOCK_FOR_INSN set, others should never have it set, and some should
4943 : have it set or clear depending on the context. */
4944 :
4945 : /* Return true iff a note of kind SUBTYPE should be emitted with routines
4946 : that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4947 : caller is asked to emit a note before BB_HEAD, or after BB_END. */
4948 :
4949 : static bool
4950 164210317 : note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
4951 : {
4952 0 : switch (subtype)
4953 : {
4954 : /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4955 : case NOTE_INSN_SWITCH_TEXT_SECTIONS:
4956 : return true;
4957 :
4958 : /* Notes for var tracking and EH region markers can appear between or
4959 : inside basic blocks. If the caller is emitting on the basic block
4960 : boundary, do not set BLOCK_FOR_INSN on the new note. */
4961 69539792 : case NOTE_INSN_VAR_LOCATION:
4962 69539792 : case NOTE_INSN_EH_REGION_BEG:
4963 69539792 : case NOTE_INSN_EH_REGION_END:
4964 0 : return on_bb_boundary_p;
4965 :
4966 : /* Otherwise, BLOCK_FOR_INSN must be set. */
4967 0 : default:
4968 0 : return false;
4969 : }
4970 : }
4971 :
4972 : /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4973 :
4974 : rtx_note *
4975 60747122 : emit_note_after (enum insn_note subtype, rtx_insn *after)
4976 : {
4977 60747122 : rtx_note *note = make_note_raw (subtype);
4978 60747122 : basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
4979 60715815 : bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
4980 :
4981 60747122 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4982 1515779 : add_insn_after_nobb (note, after);
4983 : else
4984 59231343 : add_insn_after (note, after, bb);
4985 60747122 : return note;
4986 : }
4987 :
4988 : /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4989 :
4990 : rtx_note *
4991 103463195 : emit_note_before (enum insn_note subtype, rtx_insn *before)
4992 : {
4993 103463195 : rtx_note *note = make_note_raw (subtype);
4994 103463195 : basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
4995 103463194 : bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
4996 :
4997 103463195 : if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4998 24276265 : add_insn_before_nobb (note, before);
4999 : else
5000 79186930 : add_insn_before (note, before, bb);
5001 103463195 : return note;
5002 : }
5003 :
5004 : /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
5005 : MAKE_RAW indicates how to turn PATTERN into a real insn. */
5006 :
5007 : static rtx_insn *
5008 23008670 : emit_pattern_after_setloc (rtx pattern, rtx_insn *after, location_t loc,
5009 : rtx_insn *(*make_raw) (rtx))
5010 : {
5011 23008670 : rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
5012 :
5013 23008670 : if (pattern == NULL_RTX || !loc)
5014 : return last;
5015 :
5016 16241892 : after = NEXT_INSN (after);
5017 4405100 : while (1)
5018 : {
5019 20646992 : if (active_insn_p (after)
5020 19431492 : && !JUMP_TABLE_DATA_P (after) /* FIXME */
5021 40078484 : && !INSN_LOCATION (after))
5022 19425388 : INSN_LOCATION (after) = loc;
5023 20646992 : if (after == last)
5024 : break;
5025 4405100 : after = NEXT_INSN (after);
5026 : }
5027 : return last;
5028 : }
5029 :
5030 : /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
5031 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
5032 : any DEBUG_INSNs. */
5033 :
5034 : static rtx_insn *
5035 11246275 : emit_pattern_after (rtx pattern, rtx_insn *after, bool skip_debug_insns,
5036 : rtx_insn *(*make_raw) (rtx))
5037 : {
5038 11246275 : rtx_insn *prev = after;
5039 :
5040 11246275 : if (skip_debug_insns)
5041 11837464 : while (DEBUG_INSN_P (prev))
5042 2160871 : prev = PREV_INSN (prev);
5043 :
5044 11246275 : if (INSN_P (prev))
5045 9028295 : return emit_pattern_after_setloc (pattern, after, INSN_LOCATION (prev),
5046 9028295 : make_raw);
5047 : else
5048 2217980 : return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
5049 : }
5050 :
5051 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5052 : rtx_insn *
5053 8573024 : emit_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5054 : {
5055 8573024 : return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
5056 : }
5057 :
5058 : /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5059 : rtx_insn *
5060 9024028 : emit_insn_after (rtx pattern, rtx_insn *after)
5061 : {
5062 9024028 : return emit_pattern_after (pattern, after, true, make_insn_raw);
5063 : }
5064 :
5065 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5066 : rtx_jump_insn *
5067 5407351 : emit_jump_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5068 : {
5069 5407351 : return as_a <rtx_jump_insn *> (
5070 5407351 : emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
5071 : }
5072 :
5073 : /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5074 : rtx_jump_insn *
5075 626640 : emit_jump_insn_after (rtx pattern, rtx_insn *after)
5076 : {
5077 626640 : return as_a <rtx_jump_insn *> (
5078 626640 : emit_pattern_after (pattern, after, true, make_jump_insn_raw));
5079 : }
5080 :
5081 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5082 : rtx_insn *
5083 0 : emit_call_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5084 : {
5085 0 : return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
5086 : }
5087 :
5088 : /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5089 : rtx_insn *
5090 25925 : emit_call_insn_after (rtx pattern, rtx_insn *after)
5091 : {
5092 25925 : return emit_pattern_after (pattern, after, true, make_call_insn_raw);
5093 : }
5094 :
5095 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
5096 : rtx_insn *
5097 0 : emit_debug_insn_after_setloc (rtx pattern, rtx_insn *after, location_t loc)
5098 : {
5099 0 : return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
5100 : }
5101 :
5102 : /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
5103 : rtx_insn *
5104 1569682 : emit_debug_insn_after (rtx pattern, rtx_insn *after)
5105 : {
5106 1569682 : return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
5107 : }
5108 :
5109 : /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
5110 : MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
5111 : indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
5112 : CALL_INSN, etc. */
5113 :
5114 : static rtx_insn *
5115 11020996 : emit_pattern_before_setloc (rtx pattern, rtx_insn *before, location_t loc,
5116 : bool insnp, rtx_insn *(*make_raw) (rtx))
5117 : {
5118 11020996 : rtx_insn *first = PREV_INSN (before);
5119 11369809 : rtx_insn *last = emit_pattern_before_noloc (pattern, before,
5120 : insnp ? before : NULL,
5121 : NULL, make_raw);
5122 :
5123 11020996 : if (pattern == NULL_RTX || !loc)
5124 : return last;
5125 :
5126 9997892 : if (!first)
5127 91549 : first = get_insns ();
5128 : else
5129 9906343 : first = NEXT_INSN (first);
5130 1711080 : while (1)
5131 : {
5132 11708972 : if (active_insn_p (first)
5133 11114105 : && !JUMP_TABLE_DATA_P (first) /* FIXME */
5134 22823077 : && !INSN_LOCATION (first))
5135 10862924 : INSN_LOCATION (first) = loc;
5136 11708972 : if (first == last)
5137 : break;
5138 1711080 : first = NEXT_INSN (first);
5139 : }
5140 : return last;
5141 : }
5142 :
5143 : /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
5144 : into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
5145 : before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
5146 : INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
5147 :
5148 : static rtx_insn *
5149 11210189 : emit_pattern_before (rtx pattern, rtx_insn *before, bool skip_debug_insns,
5150 : bool insnp, rtx_insn *(*make_raw) (rtx))
5151 : {
5152 11210189 : rtx_insn *next = before;
5153 :
5154 11210189 : if (skip_debug_insns)
5155 10870292 : while (DEBUG_INSN_P (next))
5156 34 : next = PREV_INSN (next);
5157 :
5158 11210189 : if (INSN_P (next))
5159 10612447 : return emit_pattern_before_setloc (pattern, before, INSN_LOCATION (next),
5160 10612447 : insnp, make_raw);
5161 : else
5162 598908 : return emit_pattern_before_noloc (pattern, before,
5163 : insnp ? before : NULL,
5164 597742 : NULL, make_raw);
5165 : }
5166 :
5167 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5168 : rtx_insn *
5169 408549 : emit_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5170 : {
5171 408549 : return emit_pattern_before_setloc (pattern, before, loc, true,
5172 408549 : make_insn_raw);
5173 : }
5174 :
5175 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5176 : rtx_insn *
5177 10860210 : emit_insn_before (rtx pattern, rtx_insn *before)
5178 : {
5179 10860210 : return emit_pattern_before (pattern, before, true, true, make_insn_raw);
5180 : }
5181 :
5182 : /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5183 : rtx_jump_insn *
5184 0 : emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5185 : {
5186 0 : return as_a <rtx_jump_insn *> (
5187 : emit_pattern_before_setloc (pattern, before, loc, false,
5188 0 : make_jump_insn_raw));
5189 : }
5190 :
5191 : /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
5192 : rtx_jump_insn *
5193 10048 : emit_jump_insn_before (rtx pattern, rtx_insn *before)
5194 : {
5195 10048 : return as_a <rtx_jump_insn *> (
5196 : emit_pattern_before (pattern, before, true, false,
5197 10048 : make_jump_insn_raw));
5198 : }
5199 :
5200 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5201 : rtx_insn *
5202 0 : emit_call_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5203 : {
5204 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5205 0 : make_call_insn_raw);
5206 : }
5207 :
5208 : /* Like emit_call_insn_before_noloc,
5209 : but set insn_location according to BEFORE. */
5210 : rtx_insn *
5211 0 : emit_call_insn_before (rtx pattern, rtx_insn *before)
5212 : {
5213 0 : return emit_pattern_before (pattern, before, true, false,
5214 0 : make_call_insn_raw);
5215 : }
5216 :
5217 : /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
5218 : rtx_insn *
5219 0 : emit_debug_insn_before_setloc (rtx pattern, rtx_insn *before, location_t loc)
5220 : {
5221 0 : return emit_pattern_before_setloc (pattern, before, loc, false,
5222 0 : make_debug_insn_raw);
5223 : }
5224 :
5225 : /* Like emit_debug_insn_before_noloc,
5226 : but set insn_location according to BEFORE. */
5227 : rtx_insn *
5228 339931 : emit_debug_insn_before (rtx pattern, rtx_insn *before)
5229 : {
5230 339931 : return emit_pattern_before (pattern, before, false, false,
5231 339931 : make_debug_insn_raw);
5232 : }
5233 :
5234 : /* Take X and emit it at the end of the doubly-linked
5235 : INSN list.
5236 :
5237 : Returns the last insn emitted. */
5238 :
5239 : rtx_insn *
5240 251246996 : emit_insn (rtx x)
5241 : {
5242 251246996 : rtx_insn *last = get_last_insn ();
5243 251246996 : rtx_insn *insn;
5244 :
5245 251246996 : if (x == NULL_RTX)
5246 : return last;
5247 :
5248 246505740 : switch (GET_CODE (x))
5249 : {
5250 120907240 : case DEBUG_INSN:
5251 120907240 : case INSN:
5252 120907240 : case JUMP_INSN:
5253 120907240 : case CALL_INSN:
5254 120907240 : case CODE_LABEL:
5255 120907240 : case BARRIER:
5256 120907240 : case NOTE:
5257 120907240 : insn = as_a <rtx_insn *> (x);
5258 410831437 : while (insn)
5259 : {
5260 169016957 : rtx_insn *next = NEXT_INSN (insn);
5261 169016957 : add_insn (insn);
5262 169016957 : last = insn;
5263 169016957 : insn = next;
5264 : }
5265 : break;
5266 :
5267 : #ifdef ENABLE_RTL_CHECKING
5268 : case JUMP_TABLE_DATA:
5269 : case SEQUENCE:
5270 : gcc_unreachable ();
5271 : break;
5272 : #endif
5273 :
5274 125598500 : default:
5275 125598500 : last = make_insn_raw (x);
5276 125598500 : add_insn (last);
5277 125598500 : break;
5278 : }
5279 :
5280 : return last;
5281 : }
5282 :
5283 : /* Make an insn of code DEBUG_INSN with pattern X
5284 : and add it to the end of the doubly-linked list. */
5285 :
5286 : rtx_insn *
5287 54804553 : emit_debug_insn (rtx x)
5288 : {
5289 54804553 : rtx_insn *last = get_last_insn ();
5290 54804553 : rtx_insn *insn;
5291 :
5292 54804553 : if (x == NULL_RTX)
5293 : return last;
5294 :
5295 54804553 : switch (GET_CODE (x))
5296 : {
5297 0 : case DEBUG_INSN:
5298 0 : case INSN:
5299 0 : case JUMP_INSN:
5300 0 : case CALL_INSN:
5301 0 : case CODE_LABEL:
5302 0 : case BARRIER:
5303 0 : case NOTE:
5304 0 : insn = as_a <rtx_insn *> (x);
5305 0 : while (insn)
5306 : {
5307 0 : rtx_insn *next = NEXT_INSN (insn);
5308 0 : add_insn (insn);
5309 0 : last = insn;
5310 0 : insn = next;
5311 : }
5312 : break;
5313 :
5314 : #ifdef ENABLE_RTL_CHECKING
5315 : case JUMP_TABLE_DATA:
5316 : case SEQUENCE:
5317 : gcc_unreachable ();
5318 : break;
5319 : #endif
5320 :
5321 54804553 : default:
5322 54804553 : last = make_debug_insn_raw (x);
5323 54804553 : add_insn (last);
5324 54804553 : break;
5325 : }
5326 :
5327 : return last;
5328 : }
5329 :
5330 : /* Make an insn of code JUMP_INSN with pattern X
5331 : and add it to the end of the doubly-linked list. */
5332 :
5333 : rtx_insn *
5334 30212358 : emit_jump_insn (rtx x)
5335 : {
5336 30212358 : rtx_insn *last = NULL;
5337 30212358 : rtx_insn *insn;
5338 :
5339 30212358 : switch (GET_CODE (x))
5340 : {
5341 12134594 : case DEBUG_INSN:
5342 12134594 : case INSN:
5343 12134594 : case JUMP_INSN:
5344 12134594 : case CALL_INSN:
5345 12134594 : case CODE_LABEL:
5346 12134594 : case BARRIER:
5347 12134594 : case NOTE:
5348 12134594 : insn = as_a <rtx_insn *> (x);
5349 46146975 : while (insn)
5350 : {
5351 21877787 : rtx_insn *next = NEXT_INSN (insn);
5352 21877787 : add_insn (insn);
5353 21877787 : last = insn;
5354 21877787 : insn = next;
5355 : }
5356 : break;
5357 :
5358 : #ifdef ENABLE_RTL_CHECKING
5359 : case JUMP_TABLE_DATA:
5360 : case SEQUENCE:
5361 : gcc_unreachable ();
5362 : break;
5363 : #endif
5364 :
5365 18077764 : default:
5366 18077764 : last = make_jump_insn_raw (x);
5367 18077764 : add_insn (last);
5368 18077764 : break;
5369 : }
5370 :
5371 30212358 : return last;
5372 : }
5373 :
5374 : /* Make an insn of code JUMP_INSN with pattern X,
5375 : add a REG_BR_PROB note that indicates very likely probability,
5376 : and add it to the end of the doubly-linked list. */
5377 :
5378 : rtx_insn *
5379 0 : emit_likely_jump_insn (rtx x)
5380 : {
5381 0 : rtx_insn *jump = emit_jump_insn (x);
5382 0 : add_reg_br_prob_note (jump, profile_probability::very_likely ());
5383 0 : return jump;
5384 : }
5385 :
5386 : /* Make an insn of code JUMP_INSN with pattern X,
5387 : add a REG_BR_PROB note that indicates very unlikely probability,
5388 : and add it to the end of the doubly-linked list. */
5389 :
5390 : rtx_insn *
5391 0 : emit_unlikely_jump_insn (rtx x)
5392 : {
5393 0 : rtx_insn *jump = emit_jump_insn (x);
5394 0 : add_reg_br_prob_note (jump, profile_probability::very_unlikely ());
5395 0 : return jump;
5396 : }
5397 :
5398 : /* Make an insn of code CALL_INSN with pattern X
5399 : and add it to the end of the doubly-linked list. */
5400 :
5401 : rtx_insn *
5402 6499790 : emit_call_insn (rtx x)
5403 : {
5404 6499790 : rtx_insn *insn;
5405 :
5406 6499790 : switch (GET_CODE (x))
5407 : {
5408 4413 : case DEBUG_INSN:
5409 4413 : case INSN:
5410 4413 : case JUMP_INSN:
5411 4413 : case CALL_INSN:
5412 4413 : case CODE_LABEL:
5413 4413 : case BARRIER:
5414 4413 : case NOTE:
5415 4413 : insn = emit_insn (x);
5416 4413 : break;
5417 :
5418 : #ifdef ENABLE_RTL_CHECKING
5419 : case SEQUENCE:
5420 : case JUMP_TABLE_DATA:
5421 : gcc_unreachable ();
5422 : break;
5423 : #endif
5424 :
5425 6495377 : default:
5426 6495377 : insn = make_call_insn_raw (x);
5427 6495377 : add_insn (insn);
5428 6495377 : break;
5429 : }
5430 :
5431 6499790 : return insn;
5432 : }
5433 :
5434 : /* Add the label LABEL to the end of the doubly-linked list. */
5435 :
5436 : rtx_code_label *
5437 8978713 : emit_label (rtx uncast_label)
5438 : {
5439 8978713 : rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
5440 :
5441 8978713 : gcc_checking_assert (INSN_UID (label) == 0);
5442 8978713 : INSN_UID (label) = cur_insn_uid++;
5443 8978713 : add_insn (label);
5444 8978713 : return label;
5445 : }
5446 :
5447 : /* Make an insn of code JUMP_TABLE_DATA
5448 : and add it to the end of the doubly-linked list. */
5449 :
5450 : rtx_jump_table_data *
5451 7461 : emit_jump_table_data (rtx table)
5452 : {
5453 7461 : rtx_jump_table_data *jump_table_data =
5454 7461 : as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
5455 7461 : INSN_UID (jump_table_data) = cur_insn_uid++;
5456 7461 : PATTERN (jump_table_data) = table;
5457 7461 : BLOCK_FOR_INSN (jump_table_data) = NULL;
5458 7461 : add_insn (jump_table_data);
5459 7461 : return jump_table_data;
5460 : }
5461 :
5462 : /* Make an insn of code BARRIER
5463 : and add it to the end of the doubly-linked list. */
5464 :
5465 : rtx_barrier *
5466 3652122 : emit_barrier (void)
5467 : {
5468 3652122 : rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
5469 3652122 : INSN_UID (barrier) = cur_insn_uid++;
5470 3652122 : add_insn (barrier);
5471 3652122 : return barrier;
5472 : }
5473 :
5474 : /* Emit a copy of note ORIG. */
5475 :
5476 : rtx_note *
5477 176833 : emit_note_copy (rtx_note *orig)
5478 : {
5479 176833 : enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
5480 176833 : rtx_note *note = make_note_raw (kind);
5481 176833 : NOTE_DATA (note) = NOTE_DATA (orig);
5482 176833 : add_insn (note);
5483 176833 : return note;
5484 : }
5485 :
5486 : /* Make an insn of code NOTE or type NOTE_NO
5487 : and add it to the end of the doubly-linked list. */
5488 :
5489 : rtx_note *
5490 16938151 : emit_note (enum insn_note kind)
5491 : {
5492 16938151 : rtx_note *note = make_note_raw (kind);
5493 16938151 : add_insn (note);
5494 16938151 : return note;
5495 : }
5496 :
5497 : /* Emit a clobber of lvalue X. */
5498 :
5499 : rtx_insn *
5500 555480 : emit_clobber (rtx x)
5501 : {
5502 : /* CONCATs should not appear in the insn stream. */
5503 555480 : if (GET_CODE (x) == CONCAT)
5504 : {
5505 0 : emit_clobber (XEXP (x, 0));
5506 0 : return emit_clobber (XEXP (x, 1));
5507 : }
5508 555480 : return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5509 : }
5510 :
5511 : /* Return a sequence of insns to clobber lvalue X. */
5512 :
5513 : rtx_insn *
5514 0 : gen_clobber (rtx x)
5515 : {
5516 0 : rtx_insn *seq;
5517 :
5518 0 : start_sequence ();
5519 0 : emit_clobber (x);
5520 0 : seq = end_sequence ();
5521 0 : return seq;
5522 : }
5523 :
5524 : /* Emit a use of rvalue X. */
5525 :
5526 : rtx_insn *
5527 810707 : emit_use (rtx x)
5528 : {
5529 : /* CONCATs should not appear in the insn stream. */
5530 810707 : if (GET_CODE (x) == CONCAT)
5531 : {
5532 0 : emit_use (XEXP (x, 0));
5533 0 : return emit_use (XEXP (x, 1));
5534 : }
5535 810707 : return emit_insn (gen_rtx_USE (VOIDmode, x));
5536 : }
5537 :
5538 : /* Return a sequence of insns to use rvalue X. */
5539 :
5540 : rtx_insn *
5541 0 : gen_use (rtx x)
5542 : {
5543 0 : rtx_insn *seq;
5544 :
5545 0 : start_sequence ();
5546 0 : emit_use (x);
5547 0 : seq = end_sequence ();
5548 0 : return seq;
5549 : }
5550 :
5551 : /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5552 : Return the set in INSN that such notes describe, or NULL if the notes
5553 : have no meaning for INSN. */
5554 :
5555 : rtx
5556 244890104 : set_for_reg_notes (rtx_insn *insn)
5557 : {
5558 244890104 : rtx pat, reg;
5559 :
5560 244890104 : if (!INSN_P (insn))
5561 : return NULL_RTX;
5562 :
5563 244884558 : pat = PATTERN (insn);
5564 244884558 : if (GET_CODE (pat) == PARALLEL)
5565 : {
5566 : /* We do not use single_set because that ignores SETs of unused
5567 : registers. REG_EQUAL and REG_EQUIV notes really do require the
5568 : PARALLEL to have a single SET. */
5569 19028695 : if (multiple_sets (insn))
5570 : return NULL_RTX;
5571 18310488 : pat = XVECEXP (pat, 0, 0);
5572 : }
5573 :
5574 244166351 : if (GET_CODE (pat) != SET)
5575 : return NULL_RTX;
5576 :
5577 133002200 : reg = SET_DEST (pat);
5578 :
5579 : /* Notes apply to the contents of a STRICT_LOW_PART. */
5580 133002200 : if (GET_CODE (reg) == STRICT_LOW_PART
5581 132995786 : || GET_CODE (reg) == ZERO_EXTRACT)
5582 8557 : reg = XEXP (reg, 0);
5583 :
5584 : /* Check that we have a register. */
5585 133002200 : if (!(REG_P (reg) || GET_CODE (reg) == SUBREG))
5586 35399033 : return NULL_RTX;
5587 :
5588 : return pat;
5589 : }
5590 :
5591 : /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5592 : note of this type already exists, remove it first. */
5593 :
5594 : rtx
5595 23989153 : set_unique_reg_note (rtx_insn *insn, enum reg_note kind, rtx datum)
5596 : {
5597 23989153 : rtx note = find_reg_note (insn, kind, NULL_RTX);
5598 :
5599 23989153 : switch (kind)
5600 : {
5601 23989153 : case REG_EQUAL:
5602 23989153 : case REG_EQUIV:
5603 : /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5604 23989153 : if (!set_for_reg_notes (insn) && GET_CODE (PATTERN (insn)) != USE)
5605 : return NULL_RTX;
5606 :
5607 : /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5608 : It serves no useful purpose and breaks eliminate_regs. */
5609 23954830 : if (GET_CODE (datum) == ASM_OPERANDS)
5610 : return NULL_RTX;
5611 :
5612 : /* Notes with side effects are dangerous. Even if the side-effect
5613 : initially mirrors one in PATTERN (INSN), later optimizations
5614 : might alter the way that the final register value is calculated
5615 : and so move or alter the side-effect in some way. The note would
5616 : then no longer be a valid substitution for SET_SRC. */
5617 23945383 : if (side_effects_p (datum))
5618 : return NULL_RTX;
5619 : break;
5620 :
5621 : default:
5622 : break;
5623 : }
5624 :
5625 23944917 : if (note)
5626 8144305 : XEXP (note, 0) = datum;
5627 : else
5628 : {
5629 15800612 : add_reg_note (insn, kind, datum);
5630 15800612 : note = REG_NOTES (insn);
5631 : }
5632 :
5633 23944917 : switch (kind)
5634 : {
5635 23944917 : case REG_EQUAL:
5636 23944917 : case REG_EQUIV:
5637 23944917 : df_notes_rescan (insn);
5638 23944917 : break;
5639 : default:
5640 : break;
5641 : }
5642 :
5643 : return note;
5644 : }
5645 :
5646 : /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5647 : rtx
5648 1400484 : set_dst_reg_note (rtx_insn *insn, enum reg_note kind, rtx datum, rtx dst)
5649 : {
5650 1400484 : rtx set = set_for_reg_notes (insn);
5651 :
5652 1400484 : if (set && SET_DEST (set) == dst)
5653 1383661 : return set_unique_reg_note (insn, kind, datum);
5654 : return NULL_RTX;
5655 : }
5656 :
5657 : /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5658 : following barrier if the instruction needs one and if ALLOW_BARRIER_P
5659 : is true.
5660 :
5661 : If X is a label, it is simply added into the insn chain. */
5662 :
5663 : rtx_insn *
5664 19079877 : emit (rtx x, bool allow_barrier_p)
5665 : {
5666 19079877 : enum rtx_code code = classify_insn (x);
5667 :
5668 19079877 : switch (code)
5669 : {
5670 0 : case CODE_LABEL:
5671 0 : return emit_label (x);
5672 9399688 : case INSN:
5673 9399688 : return emit_insn (x);
5674 9673944 : case JUMP_INSN:
5675 9673944 : {
5676 9673944 : rtx_insn *insn = emit_jump_insn (x);
5677 9673944 : if (allow_barrier_p
5678 9673944 : && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
5679 0 : return emit_barrier ();
5680 : return insn;
5681 : }
5682 6245 : case CALL_INSN:
5683 6245 : return emit_call_insn (x);
5684 0 : case DEBUG_INSN:
5685 0 : return emit_debug_insn (x);
5686 0 : default:
5687 0 : gcc_unreachable ();
5688 : }
5689 : }
5690 :
5691 : /* Space for free sequence stack entries. */
5692 : static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5693 :
5694 : /* Begin emitting insns to a sequence. If this sequence will contain
5695 : something that might cause the compiler to pop arguments to function
5696 : calls (because those pops have previously been deferred; see
5697 : INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5698 : before calling this function. That will ensure that the deferred
5699 : pops are not accidentally emitted in the middle of this sequence. */
5700 :
5701 : void
5702 242299612 : start_sequence (void)
5703 : {
5704 242299612 : struct sequence_stack *tem;
5705 :
5706 242299612 : if (free_sequence_stack != NULL)
5707 : {
5708 241627179 : tem = free_sequence_stack;
5709 241627179 : free_sequence_stack = tem->next;
5710 : }
5711 : else
5712 672433 : tem = ggc_alloc<sequence_stack> ();
5713 :
5714 242299612 : tem->next = get_current_sequence ()->next;
5715 242299612 : tem->first = get_insns ();
5716 242299612 : tem->last = get_last_insn ();
5717 242299612 : get_current_sequence ()->next = tem;
5718 :
5719 242299612 : set_first_insn (0);
5720 242299612 : set_last_insn (0);
5721 242299612 : }
5722 :
5723 : /* Set up the insn chain starting with FIRST as the current sequence,
5724 : saving the previously current one. See the documentation for
5725 : start_sequence for more information about how to use this function. */
5726 :
5727 : void
5728 5668516 : push_to_sequence (rtx_insn *first)
5729 : {
5730 5668516 : rtx_insn *last;
5731 :
5732 5668516 : start_sequence ();
5733 :
5734 14950436 : for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5735 : ;
5736 :
5737 5668516 : set_first_insn (first);
5738 5668516 : set_last_insn (last);
5739 5668516 : }
5740 :
5741 : /* Like push_to_sequence, but take the last insn as an argument to avoid
5742 : looping through the list. */
5743 :
5744 : void
5745 79093 : push_to_sequence2 (rtx_insn *first, rtx_insn *last)
5746 : {
5747 79093 : start_sequence ();
5748 :
5749 79093 : set_first_insn (first);
5750 79093 : set_last_insn (last);
5751 79093 : }
5752 :
5753 : /* Set up the outer-level insn chain
5754 : as the current sequence, saving the previously current one. */
5755 :
5756 : void
5757 476 : push_topmost_sequence (void)
5758 : {
5759 476 : struct sequence_stack *top;
5760 :
5761 476 : start_sequence ();
5762 :
5763 476 : top = get_topmost_sequence ();
5764 476 : set_first_insn (top->first);
5765 476 : set_last_insn (top->last);
5766 476 : }
5767 :
5768 : /* After emitting to the outer-level insn chain, update the outer-level
5769 : insn chain, and restore the previous saved state. */
5770 :
5771 : void
5772 476 : pop_topmost_sequence (void)
5773 : {
5774 476 : struct sequence_stack *top;
5775 :
5776 476 : top = get_topmost_sequence ();
5777 476 : top->first = get_insns ();
5778 476 : top->last = get_last_insn ();
5779 :
5780 476 : end_sequence ();
5781 476 : }
5782 :
5783 : /* After emitting to a sequence, restore the previous saved state and return
5784 : the start of the completed sequence.
5785 :
5786 : If the compiler might have deferred popping arguments while
5787 : generating this sequence, and this sequence will not be immediately
5788 : inserted into the instruction stream, use do_pending_stack_adjust
5789 : before calling this function. That will ensure that the deferred
5790 : pops are inserted into this sequence, and not into some random
5791 : location in the instruction stream. See INHIBIT_DEFER_POP for more
5792 : information about deferred popping of arguments. */
5793 :
5794 : rtx_insn *
5795 242299610 : end_sequence (void)
5796 : {
5797 242299610 : rtx_insn *insns = get_insns ();
5798 :
5799 242299610 : struct sequence_stack *tem = get_current_sequence ()->next;
5800 :
5801 242299610 : set_first_insn (tem->first);
5802 242299610 : set_last_insn (tem->last);
5803 242299610 : get_current_sequence ()->next = tem->next;
5804 :
5805 242299610 : memset (tem, 0, sizeof (*tem));
5806 242299610 : tem->next = free_sequence_stack;
5807 242299610 : free_sequence_stack = tem;
5808 :
5809 242299610 : return insns;
5810 : }
5811 :
5812 : /* Return true if currently emitting into a sequence. */
5813 :
5814 : bool
5815 5054294 : in_sequence_p (void)
5816 : {
5817 5054294 : return get_current_sequence ()->next != 0;
5818 : }
5819 :
5820 : /* Put the various virtual registers into REGNO_REG_RTX. */
5821 :
5822 : static void
5823 1742844 : init_virtual_regs (void)
5824 : {
5825 1742844 : regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5826 1742844 : regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5827 1742844 : regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5828 1742844 : regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5829 1742844 : regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5830 1742844 : regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5831 1742844 : = virtual_preferred_stack_boundary_rtx;
5832 1742844 : }
5833 :
5834 :
5835 : /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5836 : static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5837 : static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5838 : static int copy_insn_n_scratches;
5839 :
5840 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5841 : copied an ASM_OPERANDS.
5842 : In that case, it is the original input-operand vector. */
5843 : static rtvec orig_asm_operands_vector;
5844 :
5845 : /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5846 : copied an ASM_OPERANDS.
5847 : In that case, it is the copied input-operand vector. */
5848 : static rtvec copy_asm_operands_vector;
5849 :
5850 : /* Likewise for the constraints vector. */
5851 : static rtvec orig_asm_constraints_vector;
5852 : static rtvec copy_asm_constraints_vector;
5853 :
5854 : /* Recursively create a new copy of an rtx for copy_insn.
5855 : This function differs from copy_rtx in that it handles SCRATCHes and
5856 : ASM_OPERANDs properly.
5857 : Normally, this function is not used directly; use copy_insn as front end.
5858 : However, you could first copy an insn pattern with copy_insn and then use
5859 : this function afterwards to properly copy any REG_NOTEs containing
5860 : SCRATCHes. */
5861 :
5862 : rtx
5863 21944440 : copy_insn_1 (rtx orig)
5864 : {
5865 21944440 : rtx copy;
5866 21944440 : int i, j;
5867 21944440 : RTX_CODE code;
5868 21944440 : const char *format_ptr;
5869 :
5870 21944440 : if (orig == NULL)
5871 : return NULL;
5872 :
5873 21942843 : code = GET_CODE (orig);
5874 :
5875 21942843 : switch (code)
5876 : {
5877 : case REG:
5878 : case DEBUG_EXPR:
5879 : CASE_CONST_ANY:
5880 : case SYMBOL_REF:
5881 : case CODE_LABEL:
5882 : case PC:
5883 : case RETURN:
5884 : case SIMPLE_RETURN:
5885 : return orig;
5886 1077464 : case CLOBBER:
5887 : /* Share clobbers of hard registers, but do not share pseudo reg
5888 : clobbers or clobbers of hard registers that originated as pseudos.
5889 : This is needed to allow safe register renaming. */
5890 1077464 : if (REG_P (XEXP (orig, 0))
5891 451676 : && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
5892 1529134 : && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0))))
5893 : return orig;
5894 : break;
5895 :
5896 : case SCRATCH:
5897 73093 : for (i = 0; i < copy_insn_n_scratches; i++)
5898 1555 : if (copy_insn_scratch_in[i] == orig)
5899 1527 : return copy_insn_scratch_out[i];
5900 : break;
5901 :
5902 103529 : case CONST:
5903 103529 : if (shared_const_p (orig))
5904 : return orig;
5905 : break;
5906 :
5907 : /* A MEM with a constant address is not sharable. The problem is that
5908 : the constant address may need to be reloaded. If the mem is shared,
5909 : then reloading one copy of this mem will cause all copies to appear
5910 : to have been reloaded. */
5911 :
5912 : default:
5913 : break;
5914 : }
5915 :
5916 : /* Copy the various flags, fields, and other information. We assume
5917 : that all fields need copying, and then clear the fields that should
5918 : not be copied. That is the sensible default behavior, and forces
5919 : us to explicitly document why we are *not* copying a flag. */
5920 9806742 : copy = shallow_copy_rtx (orig);
5921 :
5922 : /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5923 9806742 : if (INSN_P (orig))
5924 : {
5925 0 : RTX_FLAG (copy, jump) = 0;
5926 0 : RTX_FLAG (copy, call) = 0;
5927 0 : RTX_FLAG (copy, frame_related) = 0;
5928 : }
5929 :
5930 9806742 : format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5931 :
5932 26845221 : for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5933 17038479 : switch (*format_ptr++)
5934 : {
5935 13889707 : case 'e':
5936 13889707 : if (XEXP (orig, i) != NULL)
5937 13866268 : XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5938 : break;
5939 :
5940 636548 : case 'E':
5941 636548 : case 'V':
5942 636548 : if (XVEC (orig, i) == orig_asm_constraints_vector)
5943 12 : XVEC (copy, i) = copy_asm_constraints_vector;
5944 636536 : else if (XVEC (orig, i) == orig_asm_operands_vector)
5945 12 : XVEC (copy, i) = copy_asm_operands_vector;
5946 636524 : else if (XVEC (orig, i) != NULL)
5947 : {
5948 636524 : XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5949 1879711 : for (j = 0; j < XVECLEN (copy, i); j++)
5950 1243187 : XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5951 : }
5952 : break;
5953 :
5954 : case 't':
5955 : case 'w':
5956 : case 'i':
5957 : case 'L':
5958 : case 'p':
5959 : case 's':
5960 : case 'S':
5961 : case 'u':
5962 : case '0':
5963 : /* These are left unchanged. */
5964 : break;
5965 :
5966 0 : default:
5967 0 : gcc_unreachable ();
5968 : }
5969 :
5970 9806742 : if (code == SCRATCH)
5971 : {
5972 71538 : i = copy_insn_n_scratches++;
5973 71538 : gcc_assert (i < MAX_RECOG_OPERANDS);
5974 71538 : copy_insn_scratch_in[i] = orig;
5975 71538 : copy_insn_scratch_out[i] = copy;
5976 : }
5977 9735204 : else if (code == ASM_OPERANDS)
5978 : {
5979 226 : orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5980 226 : copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5981 226 : orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5982 226 : copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5983 : }
5984 :
5985 : return copy;
5986 : }
5987 :
5988 : /* Create a new copy of an rtx.
5989 : This function differs from copy_rtx in that it handles SCRATCHes and
5990 : ASM_OPERANDs properly.
5991 : INSN doesn't really have to be a full INSN; it could be just the
5992 : pattern. */
5993 : rtx
5994 3802115 : copy_insn (rtx insn)
5995 : {
5996 3802115 : copy_insn_n_scratches = 0;
5997 3802115 : orig_asm_operands_vector = 0;
5998 3802115 : orig_asm_constraints_vector = 0;
5999 3802115 : copy_asm_operands_vector = 0;
6000 3802115 : copy_asm_constraints_vector = 0;
6001 3802115 : return copy_insn_1 (insn);
6002 : }
6003 :
6004 : /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
6005 : on that assumption that INSN itself remains in its original place. */
6006 :
6007 : rtx_insn *
6008 0 : copy_delay_slot_insn (rtx_insn *insn)
6009 : {
6010 : /* Copy INSN with its rtx_code, all its notes, location etc. */
6011 0 : insn = as_a <rtx_insn *> (copy_rtx (insn));
6012 0 : INSN_UID (insn) = cur_insn_uid++;
6013 0 : return insn;
6014 : }
6015 :
6016 : /* Initialize data structures and variables in this file
6017 : before generating rtl for each function. */
6018 :
6019 : void
6020 1742844 : init_emit (void)
6021 : {
6022 1742844 : set_first_insn (NULL);
6023 1742844 : set_last_insn (NULL);
6024 1742844 : if (param_min_nondebug_insn_uid)
6025 : cur_insn_uid = param_min_nondebug_insn_uid;
6026 : else
6027 1742844 : cur_insn_uid = 1;
6028 1742844 : cur_debug_insn_uid = 1;
6029 1742844 : reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
6030 1742844 : first_label_num = label_num;
6031 1742844 : get_current_sequence ()->next = NULL;
6032 :
6033 : /* Init the tables that describe all the pseudo regs. */
6034 :
6035 1742844 : crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
6036 :
6037 1742844 : crtl->emit.regno_pointer_align
6038 1742844 : = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
6039 :
6040 1742844 : regno_reg_rtx
6041 1742844 : = ggc_cleared_vec_alloc<rtx> (crtl->emit.regno_pointer_align_length);
6042 :
6043 : /* Put copies of all the hard registers into regno_reg_rtx. */
6044 1742844 : memcpy (regno_reg_rtx,
6045 1742844 : initial_regno_reg_rtx,
6046 : FIRST_PSEUDO_REGISTER * sizeof (rtx));
6047 :
6048 : /* Put copies of all the virtual register rtx into regno_reg_rtx. */
6049 1742844 : init_virtual_regs ();
6050 :
6051 : /* Indicate that the virtual registers and stack locations are
6052 : all pointers. */
6053 1742844 : REG_POINTER (stack_pointer_rtx) = 1;
6054 1742844 : REG_POINTER (frame_pointer_rtx) = 1;
6055 1742844 : REG_POINTER (hard_frame_pointer_rtx) = 1;
6056 1742844 : REG_POINTER (arg_pointer_rtx) = 1;
6057 :
6058 1742844 : REG_POINTER (virtual_incoming_args_rtx) = 1;
6059 1742844 : REG_POINTER (virtual_stack_vars_rtx) = 1;
6060 1742844 : REG_POINTER (virtual_stack_dynamic_rtx) = 1;
6061 1742844 : REG_POINTER (virtual_outgoing_args_rtx) = 1;
6062 1742844 : REG_POINTER (virtual_cfa_rtx) = 1;
6063 :
6064 : #ifdef STACK_BOUNDARY
6065 1742844 : REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
6066 1742844 : REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6067 1742844 : REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
6068 1742844 : REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
6069 :
6070 1742844 : REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
6071 1742844 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
6072 1742844 : REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
6073 1742844 : REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
6074 :
6075 1742844 : REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
6076 : #endif
6077 :
6078 : #ifdef INIT_EXPANDERS
6079 : INIT_EXPANDERS;
6080 : #endif
6081 1742844 : }
6082 :
6083 : /* Return the value of element I of CONST_VECTOR X as a wide_int. */
6084 :
6085 : wide_int
6086 1068 : const_vector_int_elt (const_rtx x, unsigned int i)
6087 : {
6088 : /* First handle elements that are directly encoded. */
6089 1068 : machine_mode elt_mode = GET_MODE_INNER (GET_MODE (x));
6090 1068 : if (i < (unsigned int) XVECLEN (x, 0))
6091 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, i), elt_mode);
6092 :
6093 : /* Identify the pattern that contains element I and work out the index of
6094 : the last encoded element for that pattern. */
6095 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6096 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6097 1068 : unsigned int count = i / npatterns;
6098 1068 : unsigned int pattern = i % npatterns;
6099 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6100 :
6101 : /* If there are no steps, the final encoded value is the right one. */
6102 1068 : if (!CONST_VECTOR_STEPPED_P (x))
6103 0 : return rtx_mode_t (CONST_VECTOR_ENCODED_ELT (x, final_i), elt_mode);
6104 :
6105 : /* Otherwise work out the value from the last two encoded elements. */
6106 1068 : rtx v1 = CONST_VECTOR_ENCODED_ELT (x, final_i - npatterns);
6107 1068 : rtx v2 = CONST_VECTOR_ENCODED_ELT (x, final_i);
6108 1068 : wide_int diff = wi::sub (rtx_mode_t (v2, elt_mode),
6109 1068 : rtx_mode_t (v1, elt_mode));
6110 1068 : return wi::add (rtx_mode_t (v2, elt_mode), (count - 2) * diff);
6111 1068 : }
6112 :
6113 : /* Return the value of element I of CONST_VECTOR X. */
6114 :
6115 : rtx
6116 4891318 : const_vector_elt (const_rtx x, unsigned int i)
6117 : {
6118 : /* First handle elements that are directly encoded. */
6119 4891318 : if (i < (unsigned int) XVECLEN (x, 0))
6120 4889182 : return CONST_VECTOR_ENCODED_ELT (x, i);
6121 :
6122 : /* If there are no steps, the final encoded value is the right one. */
6123 2136 : if (!CONST_VECTOR_STEPPED_P (x))
6124 : {
6125 : /* Identify the pattern that contains element I and work out the index of
6126 : the last encoded element for that pattern. */
6127 1068 : unsigned int encoded_nelts = const_vector_encoded_nelts (x);
6128 1068 : unsigned int npatterns = CONST_VECTOR_NPATTERNS (x);
6129 1068 : unsigned int pattern = i % npatterns;
6130 1068 : unsigned int final_i = encoded_nelts - npatterns + pattern;
6131 1068 : return CONST_VECTOR_ENCODED_ELT (x, final_i);
6132 : }
6133 :
6134 : /* Otherwise work out the value from the last two encoded elements. */
6135 1068 : return immed_wide_int_const (const_vector_int_elt (x, i),
6136 2136 : GET_MODE_INNER (GET_MODE (x)));
6137 : }
6138 :
6139 : /* Return true if X is a valid element for a CONST_VECTOR of the given
6140 : mode. */
6141 :
6142 : bool
6143 585931 : valid_for_const_vector_p (machine_mode, rtx x)
6144 : {
6145 585931 : return (CONST_SCALAR_INT_P (x)
6146 : || CONST_POLY_INT_P (x)
6147 175497 : || CONST_DOUBLE_AS_FLOAT_P (x)
6148 741820 : || CONST_FIXED_P (x));
6149 : }
6150 :
6151 : /* Generate a vector constant of mode MODE in which every element has
6152 : value ELT. */
6153 :
6154 : rtx
6155 42462679 : gen_const_vec_duplicate (machine_mode mode, rtx elt)
6156 : {
6157 42462679 : rtx_vector_builder builder (mode, 1, 1);
6158 42462679 : builder.quick_push (elt);
6159 42462679 : return builder.build ();
6160 42462679 : }
6161 :
6162 : /* Return a vector rtx of mode MODE in which every element has value X.
6163 : The result will be a constant if X is constant. */
6164 :
6165 : rtx
6166 266589 : gen_vec_duplicate (machine_mode mode, rtx x)
6167 : {
6168 266589 : if (valid_for_const_vector_p (mode, x))
6169 116452 : return gen_const_vec_duplicate (mode, x);
6170 150137 : return gen_rtx_VEC_DUPLICATE (mode, x);
6171 : }
6172 :
6173 : /* A subroutine of const_vec_series_p that handles the case in which:
6174 :
6175 : (GET_CODE (X) == CONST_VECTOR
6176 : && CONST_VECTOR_NPATTERNS (X) == 1
6177 : && !CONST_VECTOR_DUPLICATE_P (X))
6178 :
6179 : is known to hold. */
6180 :
6181 : bool
6182 5860 : const_vec_series_p_1 (const_rtx x, rtx *base_out, rtx *step_out)
6183 : {
6184 : /* Stepped sequences are only defined for integers, to avoid specifying
6185 : rounding behavior. */
6186 5860 : if (GET_MODE_CLASS (GET_MODE (x)) != MODE_VECTOR_INT)
6187 : return false;
6188 :
6189 : /* A non-duplicated vector with two elements can always be seen as a
6190 : series with a nonzero step. Longer vectors must have a stepped
6191 : encoding. */
6192 5860 : if (maybe_ne (CONST_VECTOR_NUNITS (x), 2)
6193 5860 : && !CONST_VECTOR_STEPPED_P (x))
6194 : return false;
6195 :
6196 : /* Calculate the step between the first and second elements. */
6197 5856 : scalar_mode inner = GET_MODE_INNER (GET_MODE (x));
6198 5856 : rtx base = CONST_VECTOR_ELT (x, 0);
6199 11712 : rtx step = simplify_binary_operation (MINUS, inner,
6200 5856 : CONST_VECTOR_ENCODED_ELT (x, 1), base);
6201 5856 : if (rtx_equal_p (step, CONST0_RTX (inner)))
6202 : return false;
6203 :
6204 : /* If we have a stepped encoding, check that the step between the
6205 : second and third elements is the same as STEP. */
6206 5856 : if (CONST_VECTOR_STEPPED_P (x))
6207 : {
6208 9330 : rtx diff = simplify_binary_operation (MINUS, inner,
6209 : CONST_VECTOR_ENCODED_ELT (x, 2),
6210 4665 : CONST_VECTOR_ENCODED_ELT (x, 1));
6211 4665 : if (!rtx_equal_p (step, diff))
6212 : return false;
6213 : }
6214 :
6215 5856 : *base_out = base;
6216 5856 : *step_out = step;
6217 5856 : return true;
6218 : }
6219 :
6220 : /* Generate a vector constant of mode MODE in which element I has
6221 : the value BASE + I * STEP. */
6222 :
6223 : rtx
6224 645 : gen_const_vec_series (machine_mode mode, rtx base, rtx step)
6225 : {
6226 645 : gcc_assert (valid_for_const_vector_p (mode, base)
6227 : && valid_for_const_vector_p (mode, step));
6228 :
6229 645 : rtx_vector_builder builder (mode, 1, 3);
6230 645 : builder.quick_push (base);
6231 2580 : for (int i = 1; i < 3; ++i)
6232 1290 : builder.quick_push (simplify_gen_binary (PLUS, GET_MODE_INNER (mode),
6233 1290 : builder[i - 1], step));
6234 645 : return builder.build ();
6235 645 : }
6236 :
6237 : /* Generate a vector of mode MODE in which element I has the value
6238 : BASE + I * STEP. The result will be a constant if BASE and STEP
6239 : are both constants. */
6240 :
6241 : rtx
6242 5033 : gen_vec_series (machine_mode mode, rtx base, rtx step)
6243 : {
6244 5033 : if (step == const0_rtx)
6245 211 : return gen_vec_duplicate (mode, base);
6246 4822 : if (valid_for_const_vector_p (mode, base)
6247 4822 : && valid_for_const_vector_p (mode, step))
6248 0 : return gen_const_vec_series (mode, base, step);
6249 4822 : return gen_rtx_VEC_SERIES (mode, base, step);
6250 : }
6251 :
6252 : /* Generate a new vector constant for mode MODE and constant value
6253 : CONSTANT. */
6254 :
6255 : static rtx
6256 41029131 : gen_const_vector (machine_mode mode, int constant)
6257 : {
6258 41029131 : machine_mode inner = GET_MODE_INNER (mode);
6259 :
6260 41029131 : gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
6261 :
6262 41029131 : rtx el = const_tiny_rtx[constant][(int) inner];
6263 41029131 : gcc_assert (el);
6264 :
6265 41029131 : return gen_const_vec_duplicate (mode, el);
6266 : }
6267 :
6268 : /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
6269 : all elements are zero, and the one vector when all elements are one. */
6270 : rtx
6271 175361 : gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
6272 : {
6273 350722 : gcc_assert (known_eq (GET_MODE_NUNITS (mode), GET_NUM_ELEM (v)));
6274 :
6275 : /* If the values are all the same, check to see if we can use one of the
6276 : standard constant vectors. */
6277 175361 : if (rtvec_all_equal_p (v))
6278 56190 : return gen_const_vec_duplicate (mode, RTVEC_ELT (v, 0));
6279 :
6280 119171 : unsigned int nunits = GET_NUM_ELEM (v);
6281 119171 : rtx_vector_builder builder (mode, nunits, 1);
6282 814606 : for (unsigned int i = 0; i < nunits; ++i)
6283 576264 : builder.quick_push (RTVEC_ELT (v, i));
6284 119171 : return builder.build (v);
6285 119171 : }
6286 :
6287 : /* Initialise global register information required by all functions. */
6288 :
6289 : void
6290 790916 : init_emit_regs (void)
6291 : {
6292 790916 : int i;
6293 790916 : machine_mode mode;
6294 790916 : mem_attrs *attrs;
6295 :
6296 : /* Reset register attributes */
6297 790916 : reg_attrs_htab->empty ();
6298 :
6299 : /* We need reg_raw_mode, so initialize the modes now. */
6300 790916 : init_reg_modes_target ();
6301 :
6302 : /* Assign register numbers to the globally defined register rtx. */
6303 806019 : stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
6304 806019 : frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
6305 806019 : hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
6306 806019 : arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
6307 2372748 : virtual_incoming_args_rtx =
6308 806019 : gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
6309 2372748 : virtual_stack_vars_rtx =
6310 806019 : gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
6311 2372748 : virtual_stack_dynamic_rtx =
6312 806019 : gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
6313 2372748 : virtual_outgoing_args_rtx =
6314 806019 : gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
6315 806019 : virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
6316 2372748 : virtual_preferred_stack_boundary_rtx =
6317 806019 : gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
6318 :
6319 : /* Initialize RTL for commonly used hard registers. These are
6320 : copied into regno_reg_rtx as we begin to compile each function. */
6321 75137020 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6322 74346104 : initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
6323 :
6324 : #ifdef RETURN_ADDRESS_POINTER_REGNUM
6325 : return_address_pointer_rtx
6326 : = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
6327 : #endif
6328 :
6329 790916 : pic_offset_table_rtx = NULL_RTX;
6330 790916 : if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
6331 20530 : pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
6332 :
6333 : /* Process stack-limiting command-line options. */
6334 790916 : if (opt_fstack_limit_symbol_arg != NULL)
6335 0 : stack_limit_rtx
6336 0 : = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (opt_fstack_limit_symbol_arg));
6337 790916 : if (opt_fstack_limit_register_no >= 0)
6338 0 : stack_limit_rtx = gen_rtx_REG (Pmode, opt_fstack_limit_register_no);
6339 :
6340 98864500 : for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
6341 : {
6342 98073584 : mode = (machine_mode) i;
6343 98073584 : attrs = ggc_cleared_alloc<mem_attrs> ();
6344 98073584 : attrs->align = BITS_PER_UNIT;
6345 98073584 : attrs->addrspace = ADDR_SPACE_GENERIC;
6346 98073584 : if (mode != BLKmode && mode != VOIDmode)
6347 : {
6348 96491752 : attrs->size_known_p = true;
6349 192983504 : attrs->size = GET_MODE_SIZE (mode);
6350 96491752 : if (STRICT_ALIGNMENT)
6351 : attrs->align = GET_MODE_ALIGNMENT (mode);
6352 : }
6353 98073584 : mode_mem_attrs[i] = attrs;
6354 : }
6355 :
6356 790916 : split_branch_probability = profile_probability::uninitialized ();
6357 790916 : }
6358 :
6359 : /* Initialize global machine_mode variables. */
6360 :
6361 : void
6362 294240 : init_derived_machine_modes (void)
6363 : {
6364 294240 : opt_scalar_int_mode mode_iter, opt_byte_mode, opt_word_mode;
6365 2353920 : FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
6366 : {
6367 2059680 : scalar_int_mode mode = mode_iter.require ();
6368 :
6369 2353920 : if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
6370 2059680 : && !opt_byte_mode.exists ())
6371 294240 : opt_byte_mode = mode;
6372 :
6373 4119360 : if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
6374 2059680 : && !opt_word_mode.exists ())
6375 294240 : opt_word_mode = mode;
6376 : }
6377 :
6378 294240 : byte_mode = opt_byte_mode.require ();
6379 294240 : word_mode = opt_word_mode.require ();
6380 294240 : ptr_mode = as_a <scalar_int_mode>
6381 308686 : (mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0).require ());
6382 294240 : }
6383 :
6384 : /* Create some permanent unique rtl objects shared between all functions. */
6385 :
6386 : void
6387 286917 : init_emit_once (void)
6388 : {
6389 286917 : int i;
6390 286917 : machine_mode mode;
6391 286917 : scalar_float_mode double_mode;
6392 286917 : opt_scalar_mode smode_iter;
6393 :
6394 : /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
6395 : CONST_FIXED, and memory attribute hash tables. */
6396 286917 : const_int_htab = hash_table<const_int_hasher>::create_ggc (37);
6397 :
6398 : #if TARGET_SUPPORTS_WIDE_INT
6399 286917 : const_wide_int_htab = hash_table<const_wide_int_hasher>::create_ggc (37);
6400 : #endif
6401 286917 : const_double_htab = hash_table<const_double_hasher>::create_ggc (37);
6402 :
6403 286917 : if (NUM_POLY_INT_COEFFS > 1)
6404 : const_poly_int_htab = hash_table<const_poly_int_hasher>::create_ggc (37);
6405 :
6406 286917 : const_fixed_htab = hash_table<const_fixed_hasher>::create_ggc (37);
6407 :
6408 286917 : reg_attrs_htab = hash_table<reg_attr_hasher>::create_ggc (37);
6409 :
6410 : #ifdef INIT_EXPANDERS
6411 : /* This is to initialize {init|mark|free}_machine_status before the first
6412 : call to push_function_context_to. This is needed by the Chill front
6413 : end which calls push_function_context_to before the first call to
6414 : init_function_start. */
6415 : INIT_EXPANDERS;
6416 : #endif
6417 :
6418 : /* Create the unique rtx's for certain rtx codes and operand values. */
6419 :
6420 : /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
6421 : tries to use these variables. */
6422 37299210 : for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
6423 74024586 : const_int_rtx[i + MAX_SAVED_CONST_INT] =
6424 37012293 : gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
6425 :
6426 286917 : if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
6427 : && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
6428 286917 : const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
6429 : else
6430 : const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
6431 :
6432 286917 : mode = targetm.c.mode_for_floating_type (TI_DOUBLE_TYPE);
6433 286917 : double_mode = as_a<scalar_float_mode> (mode);
6434 :
6435 286917 : real_from_integer (&dconst0, double_mode, 0, SIGNED);
6436 286917 : real_from_integer (&dconst1, double_mode, 1, SIGNED);
6437 286917 : real_from_integer (&dconst2, double_mode, 2, SIGNED);
6438 :
6439 286917 : dconstm0 = dconst0;
6440 286917 : dconstm0.sign = 1;
6441 :
6442 286917 : dconstm1 = dconst1;
6443 286917 : dconstm1.sign = 1;
6444 :
6445 286917 : dconsthalf = dconst1;
6446 286917 : SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
6447 :
6448 286917 : real_inf (&dconstinf);
6449 286917 : real_inf (&dconstninf, true);
6450 :
6451 1434585 : for (i = 0; i < 3; i++)
6452 : {
6453 860751 : const REAL_VALUE_TYPE *const r =
6454 : (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
6455 :
6456 6025257 : FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
6457 5164506 : const_tiny_rtx[i][(int) mode] =
6458 5164506 : const_double_from_real_value (*r, mode);
6459 :
6460 3443004 : FOR_EACH_MODE_IN_CLASS (mode, MODE_DECIMAL_FLOAT)
6461 2582253 : const_tiny_rtx[i][(int) mode] =
6462 2582253 : const_double_from_real_value (*r, mode);
6463 :
6464 860751 : const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
6465 :
6466 6886008 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6467 6025257 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6468 :
6469 2582253 : for (mode = MIN_MODE_PARTIAL_INT;
6470 3443004 : mode <= MAX_MODE_PARTIAL_INT;
6471 2582253 : mode = (machine_mode)((int)(mode) + 1))
6472 2582253 : const_tiny_rtx[i][(int) mode] = GEN_INT (i);
6473 : }
6474 :
6475 286917 : const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
6476 :
6477 2295336 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
6478 2008419 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6479 :
6480 : /* For BImode, 1 and -1 are unsigned and signed interpretations
6481 : of the same value. */
6482 286917 : for (mode = MIN_MODE_BOOL;
6483 573834 : mode <= MAX_MODE_BOOL;
6484 286917 : mode = (machine_mode)((int)(mode) + 1))
6485 : {
6486 286917 : const_tiny_rtx[0][(int) mode] = const0_rtx;
6487 286917 : if (mode == BImode)
6488 : {
6489 286917 : const_tiny_rtx[1][(int) mode] = const_true_rtx;
6490 286917 : const_tiny_rtx[3][(int) mode] = const_true_rtx;
6491 : }
6492 : else
6493 : {
6494 : const_tiny_rtx[1][(int) mode] = const1_rtx;
6495 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6496 : }
6497 : }
6498 :
6499 860751 : for (mode = MIN_MODE_PARTIAL_INT;
6500 1147668 : mode <= MAX_MODE_PARTIAL_INT;
6501 860751 : mode = (machine_mode)((int)(mode) + 1))
6502 860751 : const_tiny_rtx[3][(int) mode] = constm1_rtx;
6503 :
6504 3156087 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_INT)
6505 : {
6506 2869170 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6507 2869170 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6508 : }
6509 :
6510 2008419 : FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT)
6511 : {
6512 1721502 : rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6513 1721502 : const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6514 : }
6515 :
6516 286917 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_BOOL)
6517 : {
6518 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6519 0 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6520 0 : if (GET_MODE_INNER (mode) == BImode)
6521 : /* As for BImode, "all 1" and "all -1" are unsigned and signed
6522 : interpretations of the same value. */
6523 : const_tiny_rtx[1][(int) mode] = const_tiny_rtx[3][(int) mode];
6524 : else
6525 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6526 : }
6527 :
6528 9181344 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)
6529 : {
6530 8894427 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6531 8894427 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6532 8894427 : const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6533 : }
6534 :
6535 7459842 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FLOAT)
6536 : {
6537 7172925 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6538 7172925 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6539 : }
6540 :
6541 1721502 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_FRACT)
6542 : {
6543 1434585 : scalar_mode smode = smode_iter.require ();
6544 1434585 : FCONST0 (smode).data.high = 0;
6545 1434585 : FCONST0 (smode).data.low = 0;
6546 1434585 : FCONST0 (smode).mode = smode;
6547 2869170 : const_tiny_rtx[0][(int) smode]
6548 1434585 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6549 : }
6550 :
6551 1721502 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UFRACT)
6552 : {
6553 1434585 : scalar_mode smode = smode_iter.require ();
6554 1434585 : FCONST0 (smode).data.high = 0;
6555 1434585 : FCONST0 (smode).data.low = 0;
6556 1434585 : FCONST0 (smode).mode = smode;
6557 2869170 : const_tiny_rtx[0][(int) smode]
6558 1434585 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6559 : }
6560 :
6561 1434585 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_ACCUM)
6562 : {
6563 1147668 : scalar_mode smode = smode_iter.require ();
6564 1147668 : FCONST0 (smode).data.high = 0;
6565 1147668 : FCONST0 (smode).data.low = 0;
6566 1147668 : FCONST0 (smode).mode = smode;
6567 2295336 : const_tiny_rtx[0][(int) smode]
6568 1147668 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6569 :
6570 : /* We store the value 1. */
6571 1147668 : FCONST1 (smode).data.high = 0;
6572 1147668 : FCONST1 (smode).data.low = 0;
6573 1147668 : FCONST1 (smode).mode = smode;
6574 1147668 : FCONST1 (smode).data
6575 1147668 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6576 : HOST_BITS_PER_DOUBLE_INT,
6577 1147668 : SIGNED_FIXED_POINT_MODE_P (smode));
6578 2295336 : const_tiny_rtx[1][(int) smode]
6579 1147668 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6580 : }
6581 :
6582 1434585 : FOR_EACH_MODE_IN_CLASS (smode_iter, MODE_UACCUM)
6583 : {
6584 1147668 : scalar_mode smode = smode_iter.require ();
6585 1147668 : FCONST0 (smode).data.high = 0;
6586 1147668 : FCONST0 (smode).data.low = 0;
6587 1147668 : FCONST0 (smode).mode = smode;
6588 2295336 : const_tiny_rtx[0][(int) smode]
6589 1147668 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode), smode);
6590 :
6591 : /* We store the value 1. */
6592 1147668 : FCONST1 (smode).data.high = 0;
6593 1147668 : FCONST1 (smode).data.low = 0;
6594 1147668 : FCONST1 (smode).mode = smode;
6595 1147668 : FCONST1 (smode).data
6596 1147668 : = double_int_one.lshift (GET_MODE_FBIT (smode),
6597 : HOST_BITS_PER_DOUBLE_INT,
6598 1147668 : SIGNED_FIXED_POINT_MODE_P (smode));
6599 2295336 : const_tiny_rtx[1][(int) smode]
6600 1147668 : = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode), smode);
6601 : }
6602 :
6603 286917 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FRACT)
6604 : {
6605 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6606 : }
6607 :
6608 286917 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UFRACT)
6609 : {
6610 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6611 : }
6612 :
6613 286917 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_ACCUM)
6614 : {
6615 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6616 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6617 : }
6618 :
6619 286917 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_UACCUM)
6620 : {
6621 0 : const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6622 0 : const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6623 : }
6624 :
6625 35290791 : for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
6626 35003874 : if (GET_MODE_CLASS ((machine_mode) i) == MODE_CC)
6627 3443004 : const_tiny_rtx[0][i] = const0_rtx;
6628 :
6629 286917 : pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
6630 286917 : ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
6631 286917 : simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
6632 286917 : invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
6633 : /*prev_insn=*/NULL,
6634 : /*next_insn=*/NULL,
6635 : /*bb=*/NULL,
6636 : /*pattern=*/NULL_RTX,
6637 : /*location=*/-1,
6638 : CODE_FOR_nothing,
6639 : /*reg_notes=*/NULL_RTX);
6640 286917 : }
6641 :
6642 : /* Produce exact duplicate of insn INSN after AFTER.
6643 : Care updating of libcall regions if present. */
6644 :
6645 : rtx_insn *
6646 3734117 : emit_copy_of_insn_after (rtx_insn *insn, rtx_insn *after)
6647 : {
6648 3734117 : rtx_insn *new_rtx;
6649 3734117 : rtx link;
6650 :
6651 3734117 : switch (GET_CODE (insn))
6652 : {
6653 1714492 : case INSN:
6654 1714492 : new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6655 1714492 : break;
6656 :
6657 501703 : case JUMP_INSN:
6658 501703 : new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6659 501703 : CROSSING_JUMP_P (new_rtx) = CROSSING_JUMP_P (insn);
6660 501703 : break;
6661 :
6662 1491997 : case DEBUG_INSN:
6663 1491997 : new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6664 1491997 : break;
6665 :
6666 25925 : case CALL_INSN:
6667 25925 : new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6668 25925 : if (CALL_INSN_FUNCTION_USAGE (insn))
6669 23439 : CALL_INSN_FUNCTION_USAGE (new_rtx)
6670 23439 : = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6671 25925 : CALL_INSN_ABI_ID (new_rtx) = CALL_INSN_ABI_ID (insn);
6672 25925 : SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6673 25925 : RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6674 25925 : RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6675 25925 : RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6676 25925 : = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6677 25925 : break;
6678 :
6679 0 : default:
6680 0 : gcc_unreachable ();
6681 : }
6682 :
6683 : /* Update LABEL_NUSES. */
6684 3734117 : if (NONDEBUG_INSN_P (insn))
6685 2242120 : mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6686 :
6687 3734117 : INSN_LOCATION (new_rtx) = INSN_LOCATION (insn);
6688 :
6689 : /* If the old insn is frame related, then so is the new one. This is
6690 : primarily needed for IA-64 unwind info which marks epilogue insns,
6691 : which may be duplicated by the basic block reordering code. */
6692 3734117 : RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6693 :
6694 : /* Locate the end of existing REG_NOTES in NEW_RTX. */
6695 3734117 : rtx *ptail = ®_NOTES (new_rtx);
6696 3734123 : while (*ptail != NULL_RTX)
6697 6 : ptail = &XEXP (*ptail, 1);
6698 :
6699 : /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6700 : will make them. REG_LABEL_TARGETs are created there too, but are
6701 : supposed to be sticky, so we copy them. */
6702 6057237 : for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6703 2323120 : if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6704 : {
6705 2323114 : *ptail = duplicate_reg_note (link);
6706 2323114 : ptail = &XEXP (*ptail, 1);
6707 : }
6708 :
6709 3734117 : INSN_CODE (new_rtx) = INSN_CODE (insn);
6710 3734117 : return new_rtx;
6711 : }
6712 :
6713 : static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6714 : rtx
6715 4635204 : gen_hard_reg_clobber (machine_mode mode, unsigned int regno)
6716 : {
6717 4635204 : if (hard_reg_clobbers[mode][regno])
6718 : return hard_reg_clobbers[mode][regno];
6719 : else
6720 192685 : return (hard_reg_clobbers[mode][regno] =
6721 385370 : gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6722 : }
6723 :
6724 : location_t prologue_location;
6725 : location_t epilogue_location;
6726 :
6727 : /* Hold current location information and last location information, so the
6728 : datastructures are built lazily only when some instructions in given
6729 : place are needed. */
6730 : static location_t curr_location;
6731 :
6732 : /* Allocate insn location datastructure. */
6733 : void
6734 1756150 : insn_locations_init (void)
6735 : {
6736 1756150 : prologue_location = epilogue_location = 0;
6737 1756150 : curr_location = UNKNOWN_LOCATION;
6738 1756150 : }
6739 :
6740 : /* At the end of emit stage, clear current location. */
6741 : void
6742 1518604 : insn_locations_finalize (void)
6743 : {
6744 1518604 : epilogue_location = curr_location;
6745 1518604 : curr_location = UNKNOWN_LOCATION;
6746 1518604 : }
6747 :
6748 : /* Set current location. */
6749 : void
6750 160111191 : set_curr_insn_location (location_t location)
6751 : {
6752 160111191 : curr_location = location;
6753 160111191 : }
6754 :
6755 : /* Get current location. */
6756 : location_t
6757 275305429 : curr_insn_location (void)
6758 : {
6759 275305429 : return curr_location;
6760 : }
6761 :
6762 : /* Set the location of the insn chain starting at INSN to LOC. */
6763 : void
6764 3676406 : set_insn_locations (rtx_insn *insn, location_t loc)
6765 : {
6766 16483659 : while (insn)
6767 : {
6768 12807253 : if (INSN_P (insn))
6769 10834046 : INSN_LOCATION (insn) = loc;
6770 12807253 : insn = NEXT_INSN (insn);
6771 : }
6772 3676406 : }
6773 :
6774 : /* Return lexical scope block insn belongs to. */
6775 : tree
6776 50576910 : insn_scope (const rtx_insn *insn)
6777 : {
6778 50576910 : return LOCATION_BLOCK (INSN_LOCATION (insn));
6779 : }
6780 :
6781 : /* Return line number of the statement that produced this insn. */
6782 : int
6783 0 : insn_line (const rtx_insn *insn)
6784 : {
6785 0 : return LOCATION_LINE (INSN_LOCATION (insn));
6786 : }
6787 :
6788 : /* Return source file of the statement that produced this insn. */
6789 : const char *
6790 0 : insn_file (const rtx_insn *insn)
6791 : {
6792 0 : return LOCATION_FILE (INSN_LOCATION (insn));
6793 : }
6794 :
6795 : /* Return expanded location of the statement that produced this insn. */
6796 : expanded_location
6797 86018278 : insn_location (const rtx_insn *insn)
6798 : {
6799 86018278 : return expand_location (INSN_LOCATION (insn));
6800 : }
6801 :
6802 : /* Return true if memory model MODEL requires a pre-operation (release-style)
6803 : barrier or a post-operation (acquire-style) barrier. While not universal,
6804 : this function matches behavior of several targets. */
6805 :
6806 : bool
6807 0 : need_atomic_barrier_p (enum memmodel model, bool pre)
6808 : {
6809 0 : switch (model & MEMMODEL_BASE_MASK)
6810 : {
6811 : case MEMMODEL_RELAXED:
6812 : case MEMMODEL_CONSUME:
6813 : return false;
6814 0 : case MEMMODEL_RELEASE:
6815 0 : return pre;
6816 0 : case MEMMODEL_ACQUIRE:
6817 0 : return !pre;
6818 0 : case MEMMODEL_ACQ_REL:
6819 0 : case MEMMODEL_SEQ_CST:
6820 0 : return true;
6821 0 : default:
6822 0 : gcc_unreachable ();
6823 : }
6824 : }
6825 :
6826 : /* Return a constant shift amount for shifting a value of mode MODE
6827 : by VALUE bits. */
6828 :
6829 : rtx
6830 213639898 : gen_int_shift_amount (machine_mode, poly_int64 value)
6831 : {
6832 : /* Use a 64-bit mode, to avoid any truncation.
6833 :
6834 : ??? Perhaps this should be automatically derived from the .md files
6835 : instead, or perhaps have a target hook. */
6836 213639898 : scalar_int_mode shift_mode = (BITS_PER_UNIT == 8
6837 : ? DImode
6838 : : int_mode_for_size (64, 0).require ());
6839 213639898 : return gen_int_mode (value, shift_mode);
6840 : }
6841 :
6842 : namespace {
6843 : /* Helper class for expanding an rtx using the encoding generated by
6844 : genemit.cc. The code needs to be kept in sync with there. */
6845 :
6846 : class rtx_expander
6847 : {
6848 : public:
6849 : rtx_expander (const uint8_t *, rtx *);
6850 :
6851 : rtx get_rtx ();
6852 : rtvec get_rtvec ();
6853 : void expand_seq ();
6854 :
6855 : protected:
6856 : uint64_t get_uint ();
6857 86671200 : machine_mode get_mode () { return machine_mode (get_uint ()); }
6858 : char *get_string ();
6859 : rtx get_shared_operand ();
6860 : rtx get_unshared_operand ();
6861 :
6862 : rtx get_rtx (expand_opcode);
6863 : rtx get_rtx (rtx_code, machine_mode);
6864 :
6865 : /* Points to the first unread byte. */
6866 : const uint8_t *m_seq;
6867 :
6868 : /* The operands passed to the gen_* function. */
6869 : rtx *m_operands;
6870 :
6871 : /* A bitmap of operands that have already been used to replace a
6872 : MATCH_OPERAND or MATCH_DUP. In order to ensure correct sharing,
6873 : further replacements need to use a copy of the operand, rather than
6874 : the original rtx. */
6875 : bbitmap<MAX_RECOG_OPERANDS> m_used;
6876 : };
6877 : }
6878 :
6879 25705495 : rtx_expander::rtx_expander (const uint8_t *seq, rtx *operands)
6880 25705495 : : m_seq (seq), m_operands (operands), m_used ()
6881 0 : {}
6882 :
6883 : /* Read and return the next encoded "BEB128" integer. */
6884 :
6885 : inline uint64_t
6886 250615810 : rtx_expander::get_uint ()
6887 : {
6888 250615810 : const uint8_t *seq = m_seq;
6889 250615810 : uint64_t res = 0;
6890 252860612 : do
6891 252860612 : res = (res << 7) | (*seq & 127);
6892 252860612 : while (*seq++ >= 128);
6893 250615810 : m_seq = seq;
6894 250615810 : return res;
6895 : }
6896 :
6897 : /* Read an operand number and return the associated operand rtx,
6898 : without copying it. */
6899 :
6900 : rtx
6901 887766 : rtx_expander::get_shared_operand ()
6902 : {
6903 887766 : return m_operands[get_uint ()];
6904 : }
6905 :
6906 : /* Read an operand number and return a correctly-shared instance of
6907 : the associated operand rtx. This can be either the original rtx
6908 : or a copy. */
6909 :
6910 : rtx
6911 46042275 : rtx_expander::get_unshared_operand ()
6912 : {
6913 46042275 : auto opno = get_uint ();
6914 46042275 : auto mask = m_used.from_index (opno);
6915 46042275 : if (m_used & mask)
6916 2968152 : return copy_rtx (m_operands[opno]);
6917 :
6918 43074123 : m_used |= mask;
6919 43074123 : return m_operands[opno];
6920 : }
6921 :
6922 : /* Read an encoded rtx. */
6923 :
6924 : rtx
6925 130987331 : rtx_expander::get_rtx ()
6926 : {
6927 130987331 : auto FIRST_CODE = (unsigned) expand_opcode::FIRST_CODE;
6928 130987331 : auto opcode = get_uint ();
6929 130987331 : if (opcode < FIRST_CODE)
6930 51565245 : return get_rtx (expand_opcode (opcode));
6931 79422086 : return get_rtx (rtx_code (opcode - FIRST_CODE), NUM_MACHINE_MODES);
6932 : }
6933 :
6934 : /* Read an encoded rtx that starts with the given opcode. */
6935 :
6936 : rtx
6937 51565245 : rtx_expander::get_rtx (expand_opcode opcode)
6938 : {
6939 51565245 : switch (opcode)
6940 : {
6941 : case expand_opcode::NO_RTX:
6942 : return NULL_RTX;
6943 :
6944 46042275 : case expand_opcode::MATCH_OPERAND:
6945 46042275 : return get_unshared_operand ();
6946 :
6947 42565 : case expand_opcode::MATCH_OPERATOR_WITH_MODE:
6948 42565 : {
6949 42565 : auto mode = get_mode ();
6950 42565 : auto op = get_shared_operand ();
6951 42565 : return get_rtx (GET_CODE (op), mode);
6952 : }
6953 :
6954 843390 : case expand_opcode::MATCH_OPERATOR:
6955 843390 : {
6956 843390 : auto op = get_shared_operand ();
6957 843390 : return get_rtx (GET_CODE (op), GET_MODE (op));
6958 : }
6959 :
6960 1811 : case expand_opcode::MATCH_PARALLEL:
6961 1811 : return get_shared_operand ();
6962 :
6963 4635204 : case expand_opcode::CLOBBER_REG:
6964 4635204 : {
6965 4635204 : auto mode = get_mode ();
6966 4635204 : auto regno = get_uint ();
6967 4635204 : return gen_hard_reg_clobber (mode, regno);
6968 : }
6969 :
6970 : case expand_opcode::FIRST_CODE:
6971 : break;
6972 : }
6973 0 : gcc_unreachable ();
6974 : }
6975 :
6976 : /* Read the rest of an rtx of code CODE. If such rtxes are not always
6977 : VOIDmode, MODE is the mode that the rtx should have, or NUM_MACHINE_MODES
6978 : if the mode is encoded at the current iterator position. */
6979 :
6980 : rtx
6981 80308041 : rtx_expander::get_rtx (rtx_code code, machine_mode mode)
6982 : {
6983 80308041 : switch (code)
6984 : {
6985 : /* Please keep the cases below in sync with gengenrtl.cc:special_rtx. */
6986 :
6987 0 : case EXPR_LIST:
6988 0 : case INSN_LIST:
6989 0 : case INSN:
6990 0 : gcc_unreachable ();
6991 :
6992 4908860 : case CONST_INT:
6993 9817720 : return GEN_INT (get_uint ());
6994 :
6995 1924926 : case REG:
6996 1924926 : if (mode == NUM_MACHINE_MODES)
6997 3849852 : mode = get_mode ();
6998 3849852 : return gen_rtx_REG (mode, get_uint ());
6999 :
7000 51599 : case SUBREG:
7001 51599 : {
7002 51599 : if (mode == NUM_MACHINE_MODES)
7003 103198 : mode = get_mode ();
7004 51599 : auto reg = get_rtx ();
7005 51599 : auto byte = get_uint ();
7006 51599 : return gen_rtx_SUBREG (mode, reg, byte);
7007 : }
7008 :
7009 2513046 : case MEM:
7010 2513046 : if (mode == NUM_MACHINE_MODES)
7011 5026092 : mode = get_mode ();
7012 2513046 : return gen_rtx_MEM (mode, get_rtx ());
7013 :
7014 9751334 : case PC:
7015 9751334 : return pc_rtx;
7016 :
7017 0 : case RETURN:
7018 0 : return ret_rtx;
7019 :
7020 1616887 : case SIMPLE_RETURN:
7021 1616887 : return simple_return_rtx;
7022 :
7023 1919 : case CONST_VECTOR:
7024 1919 : if (mode == NUM_MACHINE_MODES)
7025 3838 : mode = get_mode ();
7026 1919 : return gen_rtx_CONST_VECTOR (mode, get_rtvec ());
7027 :
7028 : /* Please keep the cases below in sync with
7029 : gengenrtl.cc:excluded_rtx. */
7030 :
7031 0 : case VAR_LOCATION:
7032 0 : gcc_unreachable ();
7033 :
7034 0 : case CONST_DOUBLE:
7035 : /* genemit.cc only accepts zero const_doubles. */
7036 0 : if (mode == NUM_MACHINE_MODES)
7037 0 : mode = get_mode ();
7038 0 : return CONST0_RTX (mode);
7039 :
7040 0 : case CONST_WIDE_INT:
7041 0 : case CONST_POLY_INT:
7042 0 : case CONST_FIXED:
7043 0 : gcc_unreachable ();
7044 :
7045 59539470 : default:
7046 59539470 : break;
7047 : }
7048 :
7049 59539470 : rtx x = rtx_alloc (code);
7050 59539470 : if (!always_void_p (code))
7051 : {
7052 35052296 : if (mode == NUM_MACHINE_MODES)
7053 68332682 : mode = get_mode ();
7054 35052296 : PUT_MODE_RAW (x, mode);
7055 : }
7056 :
7057 59539470 : const char *fmt = GET_RTX_FORMAT (code);
7058 153877957 : for (unsigned int i = 0; fmt[i]; ++i)
7059 94338487 : switch (fmt[i])
7060 : {
7061 : /* Please keep these cases in sync with
7062 : gengenrtl.cc:type_from_format. */
7063 :
7064 1864363 : case 'i':
7065 1864363 : XINT (x, i) = get_uint ();
7066 1864363 : break;
7067 :
7068 0 : case 'L':
7069 0 : case 'w':
7070 0 : case 'p':
7071 0 : case 's':
7072 0 : gcc_unreachable ();
7073 :
7074 84935905 : case 'e': case 'u':
7075 84935905 : XEXP (x, i) = get_rtx ();
7076 84935905 : break;
7077 :
7078 7538219 : case 'E':
7079 7538219 : XVEC (x, i) = get_rtvec ();
7080 7538219 : break;
7081 :
7082 0 : case 't':
7083 0 : case 'B':
7084 0 : default:
7085 0 : gcc_unreachable ();
7086 : }
7087 :
7088 : return x;
7089 : }
7090 :
7091 : /* Read an encoded rtvec. */
7092 :
7093 : rtvec
7094 7540138 : rtx_expander::get_rtvec ()
7095 : {
7096 7540138 : unsigned int len = get_uint ();
7097 7540138 : rtvec v = rtvec_alloc (len);
7098 31812351 : for (unsigned int i = 0; i < len; ++i)
7099 16732075 : RTVEC_ELT (v, i) = get_rtx ();
7100 7540138 : return v;
7101 : }
7102 :
7103 : /* Read and emit an encoded sequence of instructions. */
7104 :
7105 : void
7106 8437748 : rtx_expander::expand_seq ()
7107 : {
7108 8437748 : unsigned int len = get_uint ();
7109 17924707 : for (unsigned int i = 0; i < len; ++i)
7110 9486959 : emit (get_rtx (), i < len - 1);
7111 8437748 : }
7112 :
7113 : /* Read an rtx from the bytecode in SEQ, which was generated by genemit.cc.
7114 : Replace operand placeholders with the values given in OPERANDS. */
7115 :
7116 : rtx
7117 17267747 : expand_rtx (const uint8_t *seq, rtx *operands)
7118 : {
7119 17267747 : return rtx_expander (seq, operands).get_rtx ();
7120 : }
7121 :
7122 : /* Read and emit a sequence of instructions from the bytecode in SEQ,
7123 : which was generated by genemit.cc. Replace operand placeholders with
7124 : the values given in OPERANDS. */
7125 :
7126 : rtx_insn *
7127 8437748 : complete_seq (const uint8_t *seq, rtx *operands)
7128 : {
7129 8437748 : rtx_expander (seq, operands).expand_seq ();
7130 8437748 : return end_sequence ();
7131 : }
7132 :
7133 : /* Note in the dump file that WHAT, which names a define_split or a
7134 : define_peephole2 and where it came from, is being applied. genemit.cc
7135 : emits a call to this rather than the test and the fprintf, so that the
7136 : dump is written out once instead of once per pattern. */
7137 :
7138 : void
7139 8589790 : note_split (const char *what)
7140 : {
7141 8589790 : if (dump_file)
7142 117 : fprintf (dump_file, "Splitting with %s\n", what);
7143 8589790 : }
7144 :
7145 : /* Initialize fields of rtl_data related to stack alignment. */
7146 :
7147 : void
7148 1516805 : rtl_data::init_stack_alignment ()
7149 : {
7150 1516805 : stack_alignment_needed = STACK_BOUNDARY;
7151 1516805 : max_used_stack_slot_alignment = STACK_BOUNDARY;
7152 1516805 : stack_alignment_estimated = 0;
7153 1516805 : preferred_stack_boundary = STACK_BOUNDARY;
7154 1516805 : }
7155 :
7156 :
7157 : #include "gt-emit-rtl.h"
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