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1 : : /* RTL dead zero/sign extension (code) elimination.
2 : : Copyright (C) 2000-2025 Free Software Foundation, Inc.
3 : :
4 : : This file is part of GCC.
5 : :
6 : : GCC is free software; you can redistribute it and/or modify it under
7 : : the terms of the GNU General Public License as published by the Free
8 : : Software Foundation; either version 3, or (at your option) any later
9 : : version.
10 : :
11 : : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : : for more details.
15 : :
16 : : You should have received a copy of the GNU General Public License
17 : : along with GCC; see the file COPYING3. If not see
18 : : <http://www.gnu.org/licenses/>. */
19 : :
20 : : #include "config.h"
21 : : #include "system.h"
22 : : #include "coretypes.h"
23 : : #include "backend.h"
24 : : #include "rtl.h"
25 : : #include "tree.h"
26 : : #include "memmodel.h"
27 : : #include "insn-config.h"
28 : : #include "emit-rtl.h"
29 : : #include "recog.h"
30 : : #include "cfganal.h"
31 : : #include "tree-pass.h"
32 : : #include "cfgrtl.h"
33 : : #include "rtl-iter.h"
34 : : #include "df.h"
35 : : #include "print-rtl.h"
36 : : #include "dbgcnt.h"
37 : : #include "diagnostic-core.h"
38 : : #include "target.h"
39 : :
40 : : /* These should probably move into a C++ class. */
41 : : static vec<bitmap_head> livein;
42 : : static bitmap all_blocks;
43 : : static bitmap livenow;
44 : : static bitmap changed_pseudos;
45 : : static bool modify;
46 : :
47 : : /* We consider four bit groups for liveness:
48 : : bit 0..7 (least significant byte)
49 : : bit 8..15 (second least significant byte)
50 : : bit 16..31
51 : : bit 32..BITS_PER_WORD-1 */
52 : :
53 : : /* For the given REG, return the number of bit groups implied by the
54 : : size of the REG's mode, up to a maximum of 4 (number of bit groups
55 : : tracked by this pass).
56 : :
57 : : For partial integer and variable sized modes also return 4. This
58 : : could possibly be refined for something like PSI mode, but it
59 : : does not seem worth the effort. */
60 : :
61 : : static int
62 : 238477568 : group_limit (const_rtx reg)
63 : : {
64 : 238477568 : machine_mode mode = GET_MODE (reg);
65 : :
66 : 238477568 : if (!GET_MODE_BITSIZE (mode).is_constant ())
67 : : return 4;
68 : :
69 : 238477568 : int size = GET_MODE_SIZE (mode).to_constant ();
70 : :
71 : 238477568 : size = exact_log2 (size);
72 : :
73 : 238387942 : if (size < 0)
74 : : return 4;
75 : :
76 : 238387942 : size++;
77 : 238387942 : return (size > 4 ? 4 : size);
78 : : }
79 : :
80 : : /* Make all bit groups live for REGNO in bitmap BMAP. For hard regs,
81 : : we assume all groups are live. For a pseudo we consider the size
82 : : of the pseudo to avoid creating unnecessarily live chunks of data. */
83 : :
84 : : static void
85 : 4703125 : make_reg_live (bitmap bmap, int regno)
86 : : {
87 : 4703125 : int limit;
88 : :
89 : : /* For pseudos we can use the mode to limit how many bit groups
90 : : are marked as live since a pseudo only has one mode. Hard
91 : : registers have to be handled more conservatively. */
92 : 4703125 : if (regno > FIRST_PSEUDO_REGISTER)
93 : : {
94 : 875528 : rtx reg = regno_reg_rtx[regno];
95 : 875528 : limit = group_limit (reg);
96 : : }
97 : : else
98 : : limit = 4;
99 : :
100 : 23180965 : for (int i = 0; i < limit; i++)
101 : 18477840 : bitmap_set_bit (bmap, regno * 4 + i);
102 : 4703125 : }
103 : :
104 : : /* Note this pass could be used to narrow memory loads too. It's
105 : : not clear if that's profitable or not in general. */
106 : :
107 : : #define UNSPEC_P(X) (GET_CODE (X) == UNSPEC || GET_CODE (X) == UNSPEC_VOLATILE)
108 : :
109 : : /* If we know the destination of CODE only uses some low bits
110 : : (say just the QI bits of an SI operation), then return true
111 : : if we can propagate the need for just the subset of bits
112 : : from the destination to the sources.
113 : :
114 : : FIXME: This is safe for operands 1 and 2 of an IF_THEN_ELSE, but not
115 : : operand 0. Thus is likely would need some special casing to handle. */
116 : :
117 : : static bool
118 : 145378503 : safe_for_live_propagation (rtx_code code)
119 : : {
120 : : /* First handle rtx classes which as a whole are known to
121 : : be either safe or unsafe. */
122 : 145378503 : switch (GET_RTX_CLASS (code))
123 : : {
124 : : case RTX_OBJ:
125 : : case RTX_CONST_OBJ:
126 : : return true;
127 : :
128 : : case RTX_COMPARE:
129 : : case RTX_COMM_COMPARE:
130 : : case RTX_TERNARY:
131 : : return false;
132 : :
133 : 74983006 : default:
134 : 74983006 : break;
135 : : }
136 : :
137 : : /* What's left are specific codes. We only need to identify those
138 : : which are safe. */
139 : 74983006 : switch (code)
140 : : {
141 : : /* These are trivially safe. */
142 : : case SUBREG:
143 : : case NOT:
144 : : case ZERO_EXTEND:
145 : : case SIGN_EXTEND:
146 : : case TRUNCATE:
147 : : case PLUS:
148 : : case MINUS:
149 : : case MULT:
150 : : case SMUL_HIGHPART:
151 : : case UMUL_HIGHPART:
152 : : case AND:
153 : : case IOR:
154 : : case XOR:
155 : : return true;
156 : :
157 : : /* We can propagate for the shifted operand, but not the shift
158 : : count. The count is handled specially. */
159 : : case ASHIFT:
160 : : case LSHIFTRT:
161 : : case ASHIFTRT:
162 : : case SS_ASHIFT:
163 : : case US_ASHIFT:
164 : : return true;
165 : :
166 : : /* There may be other safe codes. If so they can be added
167 : : individually when discovered. */
168 : : default:
169 : : return false;
170 : : }
171 : : }
172 : :
173 : : /* Clear bits in LIVENOW and set bits in LIVE_TMP for objects
174 : : set/clobbered by OBJ contained in INSN.
175 : :
176 : : Conceptually it is always safe to ignore a particular destination
177 : : here as that will result in more chunks of data being considered
178 : : live. That's what happens when we "continue" the main loop when
179 : : we see something we don't know how to handle such as a vector
180 : : mode destination.
181 : :
182 : : The more accurate we are in identifying what objects (and chunks
183 : : within an object) are set by INSN, the more aggressive the
184 : : optimization phase during use handling will be. */
185 : :
186 : : static bool
187 : 140629440 : ext_dce_process_sets (rtx_insn *insn, rtx obj, bitmap live_tmp)
188 : : {
189 : 140629440 : bool skipped_dest = false;
190 : :
191 : 140629440 : subrtx_iterator::array_type array;
192 : 396474874 : FOR_EACH_SUBRTX (iter, array, obj, NONCONST)
193 : : {
194 : 255845434 : const_rtx x = *iter;
195 : :
196 : : /* An EXPR_LIST (from call fusage) ends in NULL_RTX. */
197 : 255845434 : if (x == NULL_RTX)
198 : 9569196 : continue;
199 : :
200 : 246276238 : if (UNSPEC_P (x))
201 : 572108 : continue;
202 : :
203 : 245704130 : if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
204 : : {
205 : 146492251 : unsigned bit = 0;
206 : 146492251 : x = SET_DEST (x);
207 : :
208 : : /* We don't support vector destinations or destinations
209 : : wider than DImode. */
210 : 146492251 : scalar_mode outer_mode;
211 : 150492783 : if (!is_a <scalar_mode> (GET_MODE (x), &outer_mode)
212 : 92942852 : || GET_MODE_BITSIZE (outer_mode) > HOST_BITS_PER_WIDE_INT)
213 : : {
214 : : /* Skip the subrtxs of this destination. There is
215 : : little value in iterating into the subobjects, so
216 : : just skip them for a bit of efficiency. */
217 : 57549931 : skipped_dest = true;
218 : 57549931 : iter.skip_subrtxes ();
219 : 313395365 : continue;
220 : : }
221 : :
222 : : /* We could have (strict_low_part (subreg ...)). We can not just
223 : : strip the STRICT_LOW_PART as that would result in clearing
224 : : some bits in LIVENOW that are still live. So process the
225 : : STRICT_LOW_PART specially. */
226 : 88942320 : if (GET_CODE (x) == STRICT_LOW_PART)
227 : : {
228 : 0 : x = XEXP (x, 0);
229 : :
230 : : /* The only valid operand of a STRICT_LOW_PART is a non
231 : : paradoxical SUBREG. */
232 : 0 : gcc_assert (SUBREG_P (x)
233 : : && !paradoxical_subreg_p (x)
234 : : && SUBREG_BYTE (x).is_constant ());
235 : :
236 : : /* I think we should always see a REG here. But let's
237 : : be sure. */
238 : 0 : gcc_assert (REG_P (SUBREG_REG (x)));
239 : :
240 : : /* The inner mode might be larger, just punt for
241 : : that case. Remember, we can not just continue to process
242 : : the inner RTXs due to the STRICT_LOW_PART. */
243 : 0 : if (!is_a <scalar_mode> (GET_MODE (SUBREG_REG (x)), &outer_mode)
244 : 0 : || GET_MODE_BITSIZE (outer_mode) > HOST_BITS_PER_WIDE_INT)
245 : : {
246 : : /* Skip the subrtxs of the STRICT_LOW_PART. We can't
247 : : process them because it'll set objects as no longer
248 : : live when they are in fact still live. */
249 : 0 : skipped_dest = true;
250 : 0 : iter.skip_subrtxes ();
251 : 0 : continue;
252 : : }
253 : :
254 : : /* LIVE_TMP contains the set groups that are live-out and set in
255 : : this insn. It is used to narrow the groups live-in for the
256 : : inputs of this insn.
257 : :
258 : : The simple thing to do is mark all the groups as live, but
259 : : that will significantly inhibit optimization.
260 : :
261 : : We also need to be careful in the case where we have an in-out
262 : : operand. If we're not careful we'd clear LIVE_TMP
263 : : incorrectly. */
264 : 0 : HOST_WIDE_INT rn = REGNO (SUBREG_REG (x));
265 : 0 : int limit = group_limit (SUBREG_REG (x));
266 : 0 : for (HOST_WIDE_INT i = 4 * rn; i < 4 * rn + limit; i++)
267 : 0 : if (bitmap_bit_p (livenow, i))
268 : 0 : bitmap_set_bit (live_tmp, i);
269 : :
270 : 0 : if (bitmap_empty_p (live_tmp))
271 : 0 : make_reg_live (live_tmp, rn);
272 : :
273 : : /* The mode of the SUBREG tells us how many bits we can
274 : : clear. */
275 : 0 : machine_mode mode = GET_MODE (x);
276 : 0 : HOST_WIDE_INT size
277 : 0 : = exact_log2 (GET_MODE_SIZE (mode).to_constant ()) + 1;
278 : 0 : bitmap_clear_range (livenow, 4 * rn, size);
279 : :
280 : : /* We have fully processed this destination. */
281 : 0 : iter.skip_subrtxes ();
282 : 0 : continue;
283 : 0 : }
284 : :
285 : : /* Phase one of destination handling. First remove any wrapper
286 : : such as SUBREG or ZERO_EXTRACT. */
287 : 88942320 : unsigned HOST_WIDE_INT mask
288 : 88942320 : = GET_MODE_MASK (GET_MODE_INNER (GET_MODE (x)));
289 : 88942320 : if (SUBREG_P (x))
290 : : {
291 : : /* If we have a SUBREG destination that is too wide, just
292 : : skip the destination rather than continuing this iterator.
293 : : While continuing would be better, we'd need to strip the
294 : : subreg and restart within the SET processing rather than
295 : : the top of the loop which just complicates the flow even
296 : : more. */
297 : 661345 : if (!is_a <scalar_mode> (GET_MODE (SUBREG_REG (x)), &outer_mode)
298 : 544187 : || GET_MODE_BITSIZE (outer_mode) > HOST_BITS_PER_WIDE_INT)
299 : : {
300 : 117158 : skipped_dest = true;
301 : 117158 : iter.skip_subrtxes ();
302 : 117158 : continue;
303 : : }
304 : :
305 : : /* We can safely strip a paradoxical subreg. The inner mode will
306 : : be narrower than the outer mode. We'll clear fewer bits in
307 : : LIVENOW than we'd like, but that's always safe. */
308 : 427457 : if (paradoxical_subreg_p (x))
309 : : x = XEXP (x, 0);
310 : 417521 : else if (SUBREG_BYTE (x).is_constant ())
311 : : {
312 : 417521 : bit = subreg_lsb (x).to_constant ();
313 : 417521 : mask = GET_MODE_MASK (GET_MODE (SUBREG_REG (x))) << bit;
314 : 417521 : gcc_assert (mask);
315 : : x = SUBREG_REG (x);
316 : : }
317 : : else
318 : : gcc_unreachable ();
319 : : }
320 : :
321 : 88825162 : if (GET_CODE (x) == ZERO_EXTRACT)
322 : : {
323 : : /* Unlike a SUBREG destination, a set of a ZERO_EXTRACT only
324 : : modifies the bits referenced in the ZERO_EXTRACT, the rest
325 : : remain the same. Thus we can not continue here, we must
326 : : either figure out what part of the destination is modified
327 : : or skip the sub-rtxs. */
328 : 3527 : skipped_dest = true;
329 : 3527 : iter.skip_subrtxes ();
330 : 3527 : continue;
331 : : }
332 : :
333 : : /* BIT >= 64 indicates something went horribly wrong. */
334 : 88821635 : gcc_assert (bit <= HOST_BITS_PER_WIDE_INT - 1);
335 : :
336 : : /* Now handle the actual object that was changed. */
337 : 88821635 : if (REG_P (x))
338 : : {
339 : : /* LIVE_TMP contains the set groups that are live-out and set in
340 : : this insn. It is used to narrow the groups live-in for the
341 : : inputs of this insn.
342 : :
343 : : The simple thing to do is mark all the groups as live, but
344 : : that will significantly inhibit optimization.
345 : :
346 : : We also need to be careful in the case where we have an in-out
347 : : operand. If we're not careful we'd clear LIVE_TMP
348 : : incorrectly. */
349 : 74734821 : HOST_WIDE_INT rn = REGNO (x);
350 : 74734821 : int limit = group_limit (x);
351 : 333251127 : for (HOST_WIDE_INT i = 4 * rn; i < 4 * rn + limit; i++)
352 : 258516306 : if (bitmap_bit_p (livenow, i))
353 : 251441359 : bitmap_set_bit (live_tmp, i);
354 : :
355 : 74734821 : if (bitmap_empty_p (live_tmp))
356 : 1228978 : make_reg_live (live_tmp, rn);
357 : :
358 : : /* Now clear the bits known written by this instruction.
359 : : Note that BIT need not be a power of two, consider a
360 : : ZERO_EXTRACT destination. */
361 : 74734821 : int start = (bit < 8 ? 0 : bit < 16 ? 1 : bit < 32 ? 2 : 3);
362 : 79999837 : int end = ((mask & ~HOST_WIDE_INT_UC (0xffffffff)) ? 4
363 : 29037224 : : (mask & HOST_WIDE_INT_UC (0xffff0000)) ? 3
364 : 6106835 : : (mask & 0xff00) ? 2 : 1);
365 : 74734821 : bitmap_clear_range (livenow, 4 * rn + start, end - start);
366 : : }
367 : : /* Some ports generate (clobber (const_int)). */
368 : 14086814 : else if (CONST_INT_P (x))
369 : 0 : continue;
370 : : else
371 : 14086814 : gcc_assert (CALL_P (insn)
372 : : || MEM_P (x)
373 : : || x == pc_rtx
374 : : || GET_CODE (x) == SCRATCH);
375 : :
376 : 88821635 : iter.skip_subrtxes ();
377 : 88821635 : }
378 : 99211879 : else if (GET_CODE (x) == COND_EXEC)
379 : : {
380 : : /* This isn't ideal, but may not be so bad in practice. */
381 : 0 : skipped_dest = true;
382 : 0 : iter.skip_subrtxes ();
383 : : }
384 : : }
385 : 140629440 : return skipped_dest;
386 : 140629440 : }
387 : :
388 : : /* INSN is a right shift and the second insn in a shift pair that is a
389 : : sign or zero extension (SET is the single set associated with INSN).
390 : :
391 : : Replace the source of SET with NEW_SRC which is a source register
392 : : from NEW_SRC_INSN (the left shift in the pair). This is effectively
393 : : the same as the replacement we do for ZERO/SIGN extends on targets
394 : : that support those insns. */
395 : : static void
396 : 0 : ext_dce_try_optimize_rshift (rtx_insn *insn, rtx set, rtx new_src, rtx_insn *new_src_insn)
397 : : {
398 : : /* If the modes are not the same or one is a hard register, then
399 : : conservatively do nothing. */
400 : 0 : if (GET_MODE (SET_SRC (set)) != GET_MODE (new_src)
401 : 0 : || !REG_P (XEXP (SET_SRC (set), 0))
402 : 0 : || !REG_P (new_src)
403 : 0 : || REGNO (XEXP (SET_SRC (set), 0)) < FIRST_PSEUDO_REGISTER
404 : 0 : || REGNO (new_src) < FIRST_PSEUDO_REGISTER)
405 : : return;
406 : :
407 : 0 : if (dump_file)
408 : : {
409 : 0 : fprintf (dump_file, "Processing insn:\n");
410 : 0 : dump_insn_slim (dump_file, insn);
411 : 0 : fprintf (dump_file, "Trying to simplify pattern:\n");
412 : 0 : print_rtl_single (dump_file, SET_SRC (set));
413 : : }
414 : :
415 : : /* We decided to turn do the optimization but allow it to be rejected for
416 : : bisection purposes. */
417 : 0 : if (!dbg_cnt (::ext_dce))
418 : : {
419 : 0 : if (dump_file)
420 : 0 : fprintf (dump_file, "Rejected due to debug counter.\n");
421 : 0 : return;
422 : : }
423 : :
424 : : /* Replace SET_SRC (set) with NEW_SRC. This changes the form of INSN, so
425 : : force rerecognition. We also need to force DF to rescan INSN. */
426 : 0 : SET_SRC (set) = new_src;
427 : 0 : INSN_CODE (insn) = -1;
428 : 0 : df_insn_rescan (insn);
429 : :
430 : 0 : rtx new_pattern = PATTERN (insn);
431 : :
432 : : /* Mark the destination as changed. */
433 : 0 : rtx x = SET_DEST (set);
434 : 0 : while (SUBREG_P (x) || GET_CODE (x) == ZERO_EXTRACT)
435 : 0 : x = XEXP (x, 0);
436 : 0 : gcc_assert (REG_P (x));
437 : 0 : bitmap_set_bit (changed_pseudos, REGNO (x));
438 : :
439 : 0 : if (dump_file)
440 : : {
441 : 0 : fprintf (dump_file, "Successfully transformed to:\n");
442 : 0 : print_rtl_single (dump_file, new_pattern);
443 : 0 : fprintf (dump_file, "\n");
444 : : }
445 : :
446 : : /* INSN may have a REG_EQUAL note indicating that the value was
447 : : sign or zero extended. That note is no longer valid since we've
448 : : just removed the extension. Just wipe the notes. */
449 : 0 : remove_reg_equal_equiv_notes (insn, false);
450 : :
451 : : /* If NEW_SRC died in its prior location, then we need to remove the
452 : : death note and move it to the new location. */
453 : 0 : rtx note = find_regno_note (new_src_insn, REG_DEAD, REGNO (new_src));
454 : 0 : if (note)
455 : : {
456 : 0 : remove_note (new_src_insn, note);
457 : 0 : add_reg_note (insn, REG_DEAD, new_src);
458 : : }
459 : : }
460 : :
461 : :
462 : : /* INSN has a sign/zero extended source inside SET that we will
463 : : try to turn into a SUBREG. If NEW_SRC is non-null, use that
464 : : for the new source of INSN's set. That scenario only happens
465 : : when we're optimizing a shift pair. */
466 : : static void
467 : 4748 : ext_dce_try_optimize_extension (rtx_insn *insn, rtx set)
468 : : {
469 : 4748 : rtx src = SET_SRC (set);
470 : 4748 : rtx inner = XEXP (src, 0);
471 : :
472 : : /* Avoid (subreg (mem)) and other constructs which may be valid RTL, but
473 : : not useful for this optimization. */
474 : 4748 : if (!(REG_P (inner) || (SUBREG_P (inner) && REG_P (SUBREG_REG (inner)))))
475 : : return;
476 : :
477 : 2317 : rtx new_pattern;
478 : 2317 : if (dump_file)
479 : : {
480 : 0 : fprintf (dump_file, "Processing insn:\n");
481 : 0 : dump_insn_slim (dump_file, insn);
482 : 0 : fprintf (dump_file, "Trying to simplify pattern:\n");
483 : 0 : print_rtl_single (dump_file, SET_SRC (set));
484 : : }
485 : :
486 : : /* We decided to turn do the optimization but allow it to be rejected for
487 : : bisection purposes. */
488 : 2317 : if (!dbg_cnt (::ext_dce))
489 : : {
490 : 0 : if (dump_file)
491 : 0 : fprintf (dump_file, "Rejected due to debug counter.\n");
492 : 0 : return;
493 : : }
494 : :
495 : 4634 : new_pattern = simplify_gen_subreg (GET_MODE (src), inner,
496 : 2317 : GET_MODE (inner), 0);
497 : : /* simplify_gen_subreg may fail in which case NEW_PATTERN will be NULL.
498 : : We must not pass that as a replacement pattern to validate_change. */
499 : 2317 : if (new_pattern)
500 : : {
501 : 2317 : int ok = validate_change (insn, &SET_SRC (set), new_pattern, false);
502 : :
503 : 2317 : rtx x = SET_DEST (set);
504 : 2317 : while (SUBREG_P (x) || GET_CODE (x) == ZERO_EXTRACT)
505 : 0 : x = XEXP (x, 0);
506 : :
507 : 2317 : gcc_assert (REG_P (x));
508 : 2317 : if (ok)
509 : 2317 : bitmap_set_bit (changed_pseudos, REGNO (x));
510 : :
511 : 2317 : if (dump_file)
512 : : {
513 : 0 : if (ok)
514 : 0 : fprintf (dump_file, "Successfully transformed to:\n");
515 : : else
516 : 0 : fprintf (dump_file, "Failed transformation to:\n");
517 : :
518 : 0 : print_rtl_single (dump_file, new_pattern);
519 : 0 : fprintf (dump_file, "\n");
520 : : }
521 : :
522 : : /* INSN may have a REG_EQUAL note indicating that the value was
523 : : sign or zero extended. That note is no longer valid since we've
524 : : just removed the extension. Just wipe the notes. */
525 : 2317 : remove_reg_equal_equiv_notes (insn, false);
526 : : }
527 : : else
528 : : {
529 : 0 : if (dump_file)
530 : 0 : fprintf (dump_file, "Unable to generate valid SUBREG expression.\n");
531 : : }
532 : : }
533 : :
534 : : /* Some operators imply that their second operand is fully live,
535 : : regardless of how many bits in the output are live. An example
536 : : would be the shift count on a target without SHIFT_COUNT_TRUNCATED
537 : : defined.
538 : :
539 : : Return TRUE if CODE is such an operator. FALSE otherwise. */
540 : :
541 : : static bool
542 : 78585302 : binop_implies_op2_fully_live (rtx_code code)
543 : : {
544 : 0 : switch (code)
545 : : {
546 : : case ASHIFT:
547 : : case LSHIFTRT:
548 : : case ASHIFTRT:
549 : : case ROTATE:
550 : : case ROTATERT:
551 : : case SS_ASHIFT:
552 : : case US_ASHIFT:
553 : : return !SHIFT_COUNT_TRUNCATED;
554 : :
555 : 0 : default:
556 : 0 : return false;
557 : : }
558 : : }
559 : :
560 : : /* X, with code CODE, is an operation for which safe_for_live_propagation
561 : : holds true, and bits set in MASK are live in the result. Compute a
562 : : mask of (potentially) live bits in the non-constant inputs. In case of
563 : : binop_implies_op2_fully_live (e.g. shifts), the computed mask may
564 : : exclusively pertain to the first operand.
565 : :
566 : : This looks wrong as we may have some important operations embedded as
567 : : operands of another operation. For example, we might have an extension
568 : : wrapping a shift. It really feels like this needs to be recursing down
569 : : into operands much more often. */
570 : :
571 : : unsigned HOST_WIDE_INT
572 : 73546024 : carry_backpropagate (unsigned HOST_WIDE_INT mask, enum rtx_code code, rtx x)
573 : : {
574 : 75360845 : if (mask == 0)
575 : : return 0;
576 : :
577 : 75360819 : enum machine_mode mode = GET_MODE_INNER (GET_MODE (x));
578 : 75360819 : unsigned HOST_WIDE_INT mmask = GET_MODE_MASK (mode);
579 : :
580 : : /* While we don't try to optimize operations on types larger
581 : : than 64 bits, we do want to make sure not to invoke undefined
582 : : behavior when presented with such operations during use
583 : : processing. The safe thing to do is to just return mmask
584 : : for that scenario indicating every possible chunk is life. */
585 : 75360819 : scalar_int_mode smode;
586 : 75360819 : if (!is_a <scalar_int_mode> (mode, &smode)
587 : 62527527 : || GET_MODE_BITSIZE (smode) > HOST_BITS_PER_WIDE_INT)
588 : : return mmask;
589 : :
590 : 60335057 : switch (code)
591 : : {
592 : 16685611 : case PLUS:
593 : 16685611 : case MINUS:
594 : 16685611 : case MULT:
595 : 16685611 : return (HOST_WIDE_INT_UC (2) << floor_log2 (mask)) - 1;
596 : :
597 : : /* We propagate for the shifted operand, but not the shift
598 : : count. The count is handled specially. */
599 : 1406938 : case ASHIFT:
600 : 1406938 : if (CONST_INT_P (XEXP (x, 1))
601 : 2744680 : && UINTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (smode))
602 : 1337706 : return (HOST_WIDE_INT) mask >> INTVAL (XEXP (x, 1));
603 : 69232 : return (HOST_WIDE_INT_UC (2) << floor_log2 (mask)) - 1;
604 : :
605 : : /* We propagate for the shifted operand, but not the shift
606 : : count. The count is handled specially. */
607 : 689327 : case LSHIFTRT:
608 : 689327 : if (CONST_INT_P (XEXP (x, 1))
609 : 1345054 : && UINTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (smode))
610 : 655699 : return mmask & (mask << INTVAL (XEXP (x, 1)));
611 : : return mmask;
612 : :
613 : : /* We propagate for the shifted operand, but not the shift
614 : : count. The count is handled specially. */
615 : 304574 : case ASHIFTRT:
616 : 304574 : if (CONST_INT_P (XEXP (x, 1))
617 : 597357 : && UINTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (smode))
618 : : {
619 : 292775 : HOST_WIDE_INT sign = 0;
620 : 292775 : if (HOST_BITS_PER_WIDE_INT - clz_hwi (mask) + INTVAL (XEXP (x, 1))
621 : 292775 : > GET_MODE_BITSIZE (smode))
622 : 585550 : sign = HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (smode) - 1);
623 : 292775 : return sign | (mmask & (mask << INTVAL (XEXP (x, 1))));
624 : : }
625 : : return mmask;
626 : :
627 : 43939 : case SMUL_HIGHPART:
628 : 43939 : case UMUL_HIGHPART:
629 : 43939 : if (XEXP (x, 1) == const0_rtx)
630 : : return 0;
631 : 43939 : if (XEXP (x, 1) == const1_rtx)
632 : : return mmask;
633 : 43939 : if (CONST_INT_P (XEXP (x, 1)))
634 : : {
635 : 0 : if (pow2p_hwi (INTVAL (XEXP (x, 1))))
636 : 0 : return mmask & (mask << (GET_MODE_BITSIZE (smode)
637 : 0 : - exact_log2 (INTVAL (XEXP (x, 1)))));
638 : :
639 : 0 : int bits = (HOST_BITS_PER_WIDE_INT + GET_MODE_BITSIZE (smode)
640 : 0 : - clz_hwi (mask) - ctz_hwi (INTVAL (XEXP (x, 1))));
641 : 0 : if (bits < GET_MODE_BITSIZE (smode))
642 : 0 : return (HOST_WIDE_INT_1U << bits) - 1;
643 : : }
644 : : return mmask;
645 : :
646 : 669537 : case SIGN_EXTEND:
647 : 669537 : if (!GET_MODE_BITSIZE (GET_MODE (x)).is_constant ()
648 : 669537 : || !GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))).is_constant ())
649 : : return -1;
650 : :
651 : : /* We want the mode of the inner object. We need to ensure its
652 : : sign bit is on in MASK. */
653 : 669537 : mode = GET_MODE_INNER (GET_MODE (XEXP (x, 0)));
654 : 669537 : if (mask & ~GET_MODE_MASK (mode))
655 : 669076 : mask |= HOST_WIDE_INT_1U << (GET_MODE_BITSIZE (mode).to_constant ()
656 : 669076 : - 1);
657 : :
658 : : /* Recurse into the operand. */
659 : 669537 : return carry_backpropagate (mask, GET_CODE (XEXP (x, 0)), XEXP (x, 0));
660 : :
661 : 1145284 : case ZERO_EXTEND:
662 : 1145284 : if (!GET_MODE_BITSIZE (GET_MODE (x)).is_constant ()
663 : 1145284 : || !GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))).is_constant ())
664 : : return -1;
665 : :
666 : : /* Recurse into the operand. */
667 : 1145284 : return carry_backpropagate (mask, GET_CODE (XEXP (x, 0)), XEXP (x, 0));
668 : :
669 : : /* We propagate for the shifted operand, but not the shift
670 : : count. The count is handled specially. */
671 : 0 : case SS_ASHIFT:
672 : 0 : case US_ASHIFT:
673 : 0 : if (CONST_INT_P (XEXP (x, 1))
674 : 0 : && UINTVAL (XEXP (x, 1)) < GET_MODE_BITSIZE (smode))
675 : : {
676 : 0 : return ((mmask & ~((unsigned HOST_WIDE_INT) mmask
677 : 0 : >> (INTVAL (XEXP (x, 1))
678 : 0 : + (XEXP (x, 1) != const0_rtx
679 : 0 : && code == SS_ASHIFT))))
680 : 0 : | ((HOST_WIDE_INT) mask >> INTVAL (XEXP (x, 1))));
681 : : }
682 : : return mmask;
683 : :
684 : : default:
685 : : return mask;
686 : : }
687 : : }
688 : :
689 : : /* Process uses in INSN contained in OBJ. Set appropriate bits in LIVENOW
690 : : for any chunks of pseudos that become live, potentially filtering using
691 : : bits from LIVE_TMP.
692 : :
693 : : If MODIFY is true, then optimize sign/zero extensions to SUBREGs when
694 : : the extended bits are never read and mark pseudos which had extensions
695 : : eliminated in CHANGED_PSEUDOS. */
696 : :
697 : : static void
698 : 140629440 : ext_dce_process_uses (rtx_insn *insn, rtx obj,
699 : : bitmap live_tmp, bool skipped_dest)
700 : : {
701 : 140629440 : subrtx_var_iterator::array_type array_var;
702 : 763742647 : FOR_EACH_SUBRTX_VAR (iter, array_var, obj, NONCONST)
703 : : {
704 : : /* An EXPR_LIST (from call fusage) ends in NULL_RTX. */
705 : 623113207 : rtx x = *iter;
706 : 623113207 : if (x == NULL_RTX)
707 : 9569196 : continue;
708 : :
709 : : /* So the basic idea in this FOR_EACH_SUBRTX_VAR loop is to
710 : : handle SETs explicitly, possibly propagating live information
711 : : into the uses.
712 : :
713 : : We may continue the loop at various points which will cause
714 : : iteration into the next level of RTL. Breaking from the loop
715 : : is never safe as it can lead us to fail to process some of the
716 : : RTL and thus not make objects live when necessary. */
717 : 613544011 : enum rtx_code xcode = GET_CODE (x);
718 : 613544011 : if (xcode == SET)
719 : : {
720 : 124549784 : const_rtx dst = SET_DEST (x);
721 : 124549784 : rtx src = SET_SRC (x);
722 : 124549784 : const_rtx y;
723 : 124549784 : unsigned HOST_WIDE_INT bit = 0;
724 : :
725 : : /* The code of the RHS of a SET. */
726 : 124549784 : enum rtx_code code = GET_CODE (src);
727 : :
728 : : /* ?!? How much of this should mirror SET handling, potentially
729 : : being shared? */
730 : 124549784 : if (SUBREG_P (dst) && subreg_lsb (dst).is_constant (&bit))
731 : : {
732 : 588156 : if (bit >= HOST_BITS_PER_WIDE_INT)
733 : : bit = HOST_BITS_PER_WIDE_INT - 1;
734 : 588156 : dst = SUBREG_REG (dst);
735 : : }
736 : 123961628 : else if (GET_CODE (dst) == STRICT_LOW_PART)
737 : 10472 : dst = XEXP (dst, 0);
738 : :
739 : : /* Main processing of the uses. Two major goals here.
740 : :
741 : : First, we want to try and propagate liveness (or the lack
742 : : thereof) from the destination register to the source
743 : : register(s).
744 : :
745 : : Second, if the source is an extension, try to optimize
746 : : it into a SUBREG. The SUBREG form indicates we don't
747 : : care about the upper bits and will usually be copy
748 : : propagated away.
749 : :
750 : : If we fail to handle something in here, the expectation
751 : : is the iterator will dive into the sub-components and
752 : : mark all the chunks in any found REGs as live. */
753 : 124549784 : if (REG_P (dst) && safe_for_live_propagation (code))
754 : : {
755 : : /* Create a mask representing the bits of this output
756 : : operand that are live after this insn. We can use
757 : : this information to refine the live in state of
758 : : inputs to this insn in many cases.
759 : :
760 : : We have to do this on a per SET basis, we might have
761 : : an INSN with multiple SETS, some of which can narrow
762 : : the source operand liveness, some of which may not. */
763 : 73546024 : unsigned HOST_WIDE_INT dst_mask = 0;
764 : 73546024 : HOST_WIDE_INT rn = REGNO (dst);
765 : 73546024 : unsigned HOST_WIDE_INT mask_array[]
766 : : = { 0xff, 0xff00, HOST_WIDE_INT_UC (0xffff0000),
767 : : -HOST_WIDE_INT_UC (0x100000000) };
768 : 367730120 : for (int i = 0; i < 4; i++)
769 : 294184096 : if (bitmap_bit_p (live_tmp, 4 * rn + i))
770 : 235333350 : dst_mask |= mask_array[i];
771 : 73546024 : dst_mask >>= bit;
772 : :
773 : : /* If we ignored a destination during set processing, then
774 : : consider all the bits live. */
775 : 73546024 : if (skipped_dest)
776 : 25650203 : dst_mask = -1;
777 : :
778 : 73546024 : dst_mask = carry_backpropagate (dst_mask, code, src);
779 : :
780 : : /* ??? Could also handle ZERO_EXTRACT / SIGN_EXTRACT
781 : : of the source specially to improve optimization. */
782 : 73546024 : if (code == SIGN_EXTEND || code == ZERO_EXTEND)
783 : : {
784 : 1827629 : rtx inner = XEXP (src, 0);
785 : 1827629 : unsigned HOST_WIDE_INT src_mask
786 : 1827629 : = GET_MODE_MASK (GET_MODE_INNER (GET_MODE (inner)));
787 : :
788 : : /* DST_MASK could be zero if we had something in the SET
789 : : that we couldn't handle. */
790 : 1827629 : if (modify && !skipped_dest && (dst_mask & ~src_mask) == 0)
791 : 4748 : ext_dce_try_optimize_extension (insn, x);
792 : :
793 : : /* Stripping the extension here just seems wrong on multiple
794 : : levels. It's source side handling, so it seems like it
795 : : belongs in the loop below. Stripping here also makes it
796 : : harder than necessary to properly handle live bit groups
797 : : for (ANY_EXTEND (SUBREG)) where the SUBREG has
798 : : SUBREG_PROMOTED state. */
799 : 1827629 : dst_mask &= src_mask;
800 : 1827629 : src = XEXP (src, 0);
801 : 1827629 : code = GET_CODE (src);
802 : : }
803 : :
804 : : /* Special case for (sub)targets that do not have extension
805 : : insns (and thus use shifts). We want to detect when we have
806 : : a shift pair and treat the pair as-if was an extension.
807 : :
808 : : Key on the right shift and use (for now) simplistic tests
809 : : to find the corresponding left shift. */
810 : 73546024 : if ((code == LSHIFTRT || code == ASHIFTRT)
811 : 1092382 : && CONST_INT_P (XEXP (src, 1))
812 : 1199964 : && (INTVAL (XEXP (src, 1)) == BITS_PER_WORD - 8
813 : 1195220 : || INTVAL (XEXP (src, 1)) == BITS_PER_WORD - 16
814 : 1032767 : || INTVAL (XEXP (src, 1)) == BITS_PER_WORD - 32))
815 : : {
816 : : /* So we have a right shift that could correspond to
817 : : the second in a pair impementing QI, HI or SI -> DI
818 : : extension. See if we can find the left shift. For
819 : : now, just look one real instruction back. */
820 : 113641 : rtx_insn *prev_insn = prev_nonnote_nondebug_insn_bb (insn);
821 : :
822 : : /* The previous insn must be a left shift by the same
823 : : amount. */
824 : 113641 : rtx prev_set;
825 : 113641 : if (prev_insn
826 : 110253 : && (prev_set = single_set (prev_insn))
827 : : /* The destination of the left shift must be the
828 : : source of the right shift. */
829 : 110154 : && SET_DEST (prev_set) == XEXP (src, 0)
830 : 38939 : && GET_CODE (SET_SRC (prev_set)) == ASHIFT
831 : 813 : && CONST_INT_P (XEXP (SET_SRC (prev_set), 1))
832 : : /* The counts must match. */
833 : 113641 : && (INTVAL (XEXP (src, 1))
834 : 797 : == INTVAL (XEXP (SET_SRC (prev_set), 1))))
835 : : {
836 : 23 : unsigned HOST_WIDE_INT src_mask = GET_MODE_BITSIZE (GET_MODE (src)).to_constant ();
837 : 23 : src_mask -= INTVAL (XEXP (src, 1));
838 : 23 : src_mask = (HOST_WIDE_INT_1U << src_mask) - 1;
839 : :
840 : : /* DST_MASK has been adjusted for INSN. We need its original value. */
841 : 23 : unsigned HOST_WIDE_INT tmp_mask = 0;
842 : 115 : for (int i = 0; i < 4; i++)
843 : 92 : if (bitmap_bit_p (live_tmp, 4 * rn + i))
844 : 15 : tmp_mask |= mask_array[i];
845 : 23 : tmp_mask >>= bit;
846 : :
847 : 23 : if (modify && !skipped_dest && (tmp_mask & ~src_mask) == 0)
848 : : {
849 : 0 : ext_dce_try_optimize_rshift (insn, x, XEXP (SET_SRC (prev_set), 0), prev_insn);
850 : :
851 : : /* These may not strictly be necessary, but we might as well try and be
852 : : as accurate as possible. The RHS is now a simple REG. */
853 : 0 : dst_mask = src_mask;
854 : 0 : src = XEXP (SET_SRC (prev_set), 0);
855 : 0 : code = GET_CODE (src);
856 : : }
857 : : }
858 : : }
859 : :
860 : : /* Optimization is done at this point. We just want to make
861 : : sure everything that should get marked as live is marked
862 : : from here onward. */
863 : :
864 : : /* We will handle the other operand of a binary operator
865 : : at the bottom of the loop by resetting Y. */
866 : 73546024 : if (BINARY_P (src))
867 : 22894977 : y = XEXP (src, 0);
868 : : else
869 : : y = src;
870 : :
871 : : /* We're inside a SET and want to process the source operands
872 : : making things live. Breaking from this loop will cause
873 : : the iterator to work on sub-rtxs, so it is safe to break
874 : : if we see something we don't know how to handle.
875 : :
876 : : This code is just hokey as it really just handles trivial
877 : : unary and binary cases. Otherwise the loop exits and we
878 : : continue iterating on sub-rtxs, but outside the set context. */
879 : : unsigned HOST_WIDE_INT save_mask = dst_mask;
880 : 118306096 : for (;;)
881 : : {
882 : : /* In general we want to restore DST_MASK before each loop
883 : : iteration. The exception is when the opcode implies that
884 : : the other operand is fully live. That's handled by
885 : : changing SAVE_MASK below. */
886 : 95926060 : dst_mask = save_mask;
887 : : /* Strip an outer paradoxical subreg. The bits outside
888 : : the inner mode are don't cares. So we can just strip
889 : : and process the inner object. */
890 : 95926060 : if (paradoxical_subreg_p (y))
891 : : y = XEXP (y, 0);
892 : 95823983 : else if (SUBREG_P (y) && subreg_lsb (y).is_constant (&bit))
893 : : {
894 : : /* If !TRULY_NOOP_TRUNCATION_MODES_P, the mode
895 : : change performed by Y would normally need to be a
896 : : TRUNCATE rather than a SUBREG. It is probably the
897 : : guarantee provided by SUBREG_PROMOTED_VAR_P that
898 : : allows the SUBREG in Y as an exception. We must
899 : : therefore preserve that guarantee and treat the
900 : : upper bits of the inner register as live
901 : : regardless of the outer code. See PR 120050. */
902 : 1988303 : if (!REG_P (SUBREG_REG (y))
903 : 1988303 : || (SUBREG_PROMOTED_VAR_P (y)
904 : 13406 : && (!TRULY_NOOP_TRUNCATION_MODES_P (
905 : : GET_MODE (y),
906 : : GET_MODE (SUBREG_REG (y))))))
907 : : break;
908 : :
909 : : /* If this is a wide object (more bits than we can fit
910 : : in a HOST_WIDE_INT), then just break from the SET
911 : : context. That will cause the iterator to walk down
912 : : into the subrtx and if we land on a REG we'll mark
913 : : the whole think live. */
914 : 1987353 : if (bit >= HOST_BITS_PER_WIDE_INT)
915 : : break;
916 : :
917 : : /* The SUBREG's mode determines the live width. */
918 : 1753638 : if (dst_mask)
919 : : {
920 : 1753638 : dst_mask <<= bit;
921 : 1753638 : if (!dst_mask)
922 : 0 : dst_mask = -HOST_WIDE_INT_UC (0x100000000);
923 : : }
924 : 1753638 : y = SUBREG_REG (y);
925 : : }
926 : :
927 : 95691395 : if (REG_P (y))
928 : : {
929 : : /* We have found the use of a register. We need to mark
930 : : the appropriate chunks of the register live. The mode
931 : : of the REG is a starting point. We may refine that
932 : : based on what chunks in the output were live. */
933 : 50591850 : rn = 4 * REGNO (y);
934 : 50591850 : unsigned HOST_WIDE_INT tmp_mask = dst_mask;
935 : :
936 : : /* If the RTX code for the SET_SRC is not one we can
937 : : propagate destination liveness through, then just
938 : : set the mask to the mode's mask. */
939 : 50591850 : if (!safe_for_live_propagation (code))
940 : 32424 : tmp_mask
941 : 64848 : = GET_MODE_MASK (GET_MODE_INNER (GET_MODE (y)));
942 : :
943 : 50591850 : if (tmp_mask & 0xff)
944 : 50158659 : bitmap_set_bit (livenow, rn);
945 : 50591850 : if (tmp_mask & 0xff00)
946 : 48666147 : bitmap_set_bit (livenow, rn + 1);
947 : 50591850 : if (tmp_mask & HOST_WIDE_INT_UC (0xffff0000))
948 : 48409095 : bitmap_set_bit (livenow, rn + 2);
949 : 50591850 : if (tmp_mask & -HOST_WIDE_INT_UC (0x100000000))
950 : 41845491 : bitmap_set_bit (livenow, rn + 3);
951 : : }
952 : 45099545 : else if (!CONSTANT_P (y))
953 : : break;
954 : :
955 : : /* We might have (ashift (const_int 1) (reg...))
956 : : By setting dst_mask we can continue iterating on the
957 : : the next operand and it will be considered fully live.
958 : :
959 : : Note that since we restore DST_MASK from SAVE_MASK at the
960 : : top of the loop, we have to change SAVE_MASK to get the
961 : : semantics we want. */
962 : 78585302 : if (binop_implies_op2_fully_live (GET_CODE (src)))
963 : 2511723 : save_mask = -1;
964 : :
965 : : /* If this was anything but a binary operand, break the inner
966 : : loop. This is conservatively correct as it will cause the
967 : : iterator to look at the sub-rtxs outside the SET context. */
968 : 78585302 : if (!BINARY_P (src))
969 : : break;
970 : :
971 : : /* We processed the first operand of a binary operator. Now
972 : : handle the second. */
973 : 22380036 : y = XEXP (src, 1), src = pc_rtx;
974 : 22380036 : }
975 : :
976 : : /* These are leaf nodes, no need to iterate down into them. */
977 : 73546024 : if (REG_P (y) || CONSTANT_P (y))
978 : 56205266 : iter.skip_subrtxes ();
979 : : }
980 : : }
981 : : /* If we are reading the low part of a SUBREG, then we can
982 : : refine liveness of the input register, otherwise let the
983 : : iterator continue into SUBREG_REG. */
984 : 488994227 : else if (SUBREG_P (x)
985 : 1363620 : && REG_P (SUBREG_REG (x))
986 : 1361830 : && !paradoxical_subreg_p (x)
987 : 1338611 : && subreg_lowpart_p (x)
988 : 1027196 : && GET_MODE_BITSIZE (GET_MODE (x)).is_constant ()
989 : 491048619 : && GET_MODE_BITSIZE (GET_MODE (x)).to_constant () <= 32)
990 : : {
991 : 510962 : HOST_WIDE_INT size = GET_MODE_BITSIZE (GET_MODE (x)).to_constant ();
992 : 510962 : HOST_WIDE_INT rn = 4 * REGNO (SUBREG_REG (x));
993 : :
994 : : /* If this is a promoted subreg, then more of it may be live than
995 : : is otherwise obvious. */
996 : 510962 : if (SUBREG_PROMOTED_VAR_P (x))
997 : 4298 : size = GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))).to_constant ();
998 : :
999 : 510962 : bitmap_set_bit (livenow, rn);
1000 : 510962 : if (size > 8)
1001 : 329029 : bitmap_set_bit (livenow, rn + 1);
1002 : 329029 : if (size > 16)
1003 : 291983 : bitmap_set_bit (livenow, rn + 2);
1004 : 291983 : if (size >= 32)
1005 : 291983 : bitmap_set_bit (livenow, rn + 3);
1006 : 510962 : iter.skip_subrtxes ();
1007 : : }
1008 : : /* If we have a register reference that is not otherwise handled,
1009 : : just assume all the chunks are live. */
1010 : 488483265 : else if (REG_P (x))
1011 : 162867219 : bitmap_set_range (livenow, REGNO (x) * 4, group_limit (x));
1012 : : }
1013 : 140629440 : }
1014 : :
1015 : : /* Process a single basic block BB with current liveness information
1016 : : in LIVENOW, returning updated liveness information.
1017 : :
1018 : : If MODIFY is true, then this is the last pass and unnecessary
1019 : : extensions should be eliminated when possible. If an extension
1020 : : is removed, the source pseudo is marked in CHANGED_PSEUDOS. */
1021 : :
1022 : : static void
1023 : 23404037 : ext_dce_process_bb (basic_block bb)
1024 : : {
1025 : 23404037 : rtx_insn *insn;
1026 : :
1027 : 308153438 : FOR_BB_INSNS_REVERSE (bb, insn)
1028 : : {
1029 : 438438558 : if (!NONDEBUG_INSN_P (insn))
1030 : 153689157 : continue;
1031 : :
1032 : : /* Live-out state of the destination of this insn. We can
1033 : : use this to refine the live-in state of the sources of
1034 : : this insn in many cases. */
1035 : 131060244 : bitmap live_tmp = BITMAP_ALLOC (NULL);
1036 : :
1037 : : /* First process any sets/clobbers in INSN. */
1038 : 131060244 : bool skipped_dest = ext_dce_process_sets (insn, PATTERN (insn), live_tmp);
1039 : :
1040 : : /* CALL_INSNs need processing their fusage data. */
1041 : 131060244 : if (CALL_P (insn))
1042 : 9569196 : skipped_dest |= ext_dce_process_sets (insn,
1043 : : CALL_INSN_FUNCTION_USAGE (insn),
1044 : : live_tmp);
1045 : :
1046 : : /* And now uses, optimizing away SIGN/ZERO extensions as we go. */
1047 : 131060244 : ext_dce_process_uses (insn, PATTERN (insn), live_tmp, skipped_dest);
1048 : :
1049 : : /* A nonlocal goto implicitly uses the frame pointer. */
1050 : 131060244 : if (JUMP_P (insn) && find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
1051 : : {
1052 : 1130 : bitmap_set_range (livenow, FRAME_POINTER_REGNUM * 4, 4);
1053 : 1130 : if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)
1054 : 1130 : bitmap_set_range (livenow, HARD_FRAME_POINTER_REGNUM * 4, 4);
1055 : : }
1056 : :
1057 : : /* And process fusage data for the use as well. */
1058 : 131060244 : if (CALL_P (insn))
1059 : : {
1060 : 9569196 : if (!FAKE_CALL_P (insn))
1061 : 9569136 : bitmap_set_range (livenow, STACK_POINTER_REGNUM * 4, 4);
1062 : :
1063 : : /* If this is not a call to a const fucntion, then assume it
1064 : : can read any global register. */
1065 : 9569196 : if (!RTL_CONST_CALL_P (insn))
1066 : 859336833 : for (unsigned i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1067 : 850096652 : if (global_regs[i])
1068 : 230 : bitmap_set_range (livenow, i * 4, 4);
1069 : :
1070 : 9569196 : ext_dce_process_uses (insn, CALL_INSN_FUNCTION_USAGE (insn), live_tmp, false);
1071 : : }
1072 : :
1073 : 131060244 : BITMAP_FREE (live_tmp);
1074 : : }
1075 : 23404037 : }
1076 : :
1077 : : /* SUBREG_PROMOTED_VAR_P is set by the gimple->rtl optimizers and
1078 : : is usually helpful. However, in some cases setting the value when
1079 : : it not strictly needed can cause this pass to miss optimizations.
1080 : :
1081 : : Specifically consider (set (mem) (subreg (reg))). If set in that
1082 : : case it will cause more bit groups to be live for REG than would
1083 : : be strictly necessary which in turn can inhibit extension removal.
1084 : :
1085 : : So do a pass over the IL wiping the SUBREG_PROMOTED_VAR_P when it
1086 : : is obviously not needed. */
1087 : :
1088 : : static void
1089 : 964451 : maybe_clear_subreg_promoted_p (void)
1090 : : {
1091 : 121616615 : for (rtx_insn *insn = get_insns(); insn; insn = NEXT_INSN (insn))
1092 : : {
1093 : 120652164 : if (!NONDEBUG_INSN_P (insn))
1094 : 64670146 : continue;
1095 : :
1096 : 55982018 : rtx set = single_set (insn);
1097 : 55982018 : if (!set)
1098 : 3668983 : continue;
1099 : :
1100 : : /* There may be other cases where we should clear, but for
1101 : : now, this is the only known case where it causes problems. */
1102 : 52313035 : if (MEM_P (SET_DEST (set)) && SUBREG_P (SET_SRC (set))
1103 : 71587 : && GET_MODE (SET_DEST (set)) <= GET_MODE (SUBREG_REG (SET_SRC (set))))
1104 : 62205 : SUBREG_PROMOTED_VAR_P (SET_SRC (set)) = 0;
1105 : : }
1106 : 964451 : }
1107 : :
1108 : : /* Walk the IL and build the transitive closure of all the REGs tied
1109 : : together by copies where either the source or destination is
1110 : : marked in CHANGED_PSEUDOS. */
1111 : :
1112 : : static void
1113 : 964451 : expand_changed_pseudos (void)
1114 : : {
1115 : : /* Build a vector of registers related by a copy. This is meant to
1116 : : speed up the next step by avoiding full IL walks. */
1117 : 964451 : struct copy_pair { rtx first; rtx second; };
1118 : 964451 : auto_vec<copy_pair> pairs;
1119 : 121616615 : for (rtx_insn *insn = get_insns(); insn; insn = NEXT_INSN (insn))
1120 : : {
1121 : 120652164 : if (!NONDEBUG_INSN_P (insn))
1122 : 64670146 : continue;
1123 : :
1124 : 55982018 : rtx pat = PATTERN (insn);
1125 : :
1126 : : /* Simple copies to a REG from another REG or SUBREG of a REG. */
1127 : 55982018 : if (GET_CODE (pat) == SET
1128 : 44234002 : && REG_P (SET_DEST (pat))
1129 : 31623425 : && (REG_P (SET_SRC (pat))
1130 : 22959151 : || (SUBREG_P (SET_SRC (pat))
1131 : 397146 : && REG_P (SUBREG_REG (SET_SRC (pat))))))
1132 : : {
1133 : 396708 : rtx src = (REG_P (SET_SRC (pat))
1134 : 9060982 : ? SET_SRC (pat)
1135 : : : SUBREG_REG (SET_SRC (pat)));
1136 : 9060982 : pairs.safe_push ({ SET_DEST (pat), src });
1137 : : }
1138 : :
1139 : : /* Simple copies to a REG from another REG or SUBREG of a REG
1140 : : held inside a PARALLEL. */
1141 : 55982018 : if (GET_CODE (pat) == PARALLEL)
1142 : : {
1143 : 25387706 : for (int i = XVECLEN (pat, 0) - 1; i >= 0; i--)
1144 : : {
1145 : 17038332 : rtx elem = XVECEXP (pat, 0, i);
1146 : :
1147 : 17038332 : if (GET_CODE (elem) == SET
1148 : 8566087 : && REG_P (SET_DEST (elem))
1149 : 8410699 : && (REG_P (SET_SRC (elem))
1150 : 8410699 : || (SUBREG_P (SET_SRC (elem))
1151 : 0 : && REG_P (SUBREG_REG (SET_SRC (elem))))))
1152 : : {
1153 : 0 : rtx src = (REG_P (SET_SRC (elem))
1154 : 0 : ? SET_SRC (elem)
1155 : : : SUBREG_REG (SET_SRC (elem)));
1156 : 0 : pairs.safe_push ({ SET_DEST (elem), src });
1157 : : }
1158 : : }
1159 : 8349374 : continue;
1160 : 8349374 : }
1161 : : }
1162 : :
1163 : : /* Now we have a vector with copy pairs. Iterate over that list
1164 : : updating CHANGED_PSEUDOS as we go. Eliminate copies from the
1165 : : list as we go as they don't need further processing. */
1166 : : bool changed = true;
1167 : 1928937 : while (changed)
1168 : : {
1169 : : changed = false;
1170 : : unsigned int i;
1171 : : copy_pair *p;
1172 : 10990255 : FOR_EACH_VEC_ELT (pairs, i, p)
1173 : : {
1174 : 9061318 : if (bitmap_bit_p (changed_pseudos, REGNO (p->second))
1175 : 9061318 : && bitmap_set_bit (changed_pseudos, REGNO (p->first)))
1176 : : {
1177 : 47 : pairs.unordered_remove (i);
1178 : 47 : changed = true;
1179 : : }
1180 : : }
1181 : : }
1182 : 964451 : }
1183 : :
1184 : : /* We optimize away sign/zero extensions in this pass and replace
1185 : : them with SUBREGs indicating certain bits are don't cares.
1186 : :
1187 : : This changes the SUBREG_PROMOTED_VAR_P state of the object.
1188 : : It is fairly painful to fix this on the fly, so we have
1189 : : recorded which pseudos are affected and we look for SUBREGs
1190 : : of those pseudos and fix them up. */
1191 : :
1192 : : static void
1193 : 964451 : reset_subreg_promoted_p (void)
1194 : : {
1195 : : /* This pass eliminates zero/sign extensions on pseudo regs found
1196 : : in CHANGED_PSEUDOS. Elimination of those extensions changes if
1197 : : the pseudos are known to hold values extended to wider modes
1198 : : via SUBREG_PROMOTED_VAR. So we wipe the SUBREG_PROMOTED_VAR
1199 : : state on all affected pseudos.
1200 : :
1201 : : But that is insufficient. We might have a copy from one REG
1202 : : to another (possibly with the source register wrapped with a
1203 : : SUBREG). We need to wipe SUBREG_PROMOTED_VAR on the transitive
1204 : : closure of the original CHANGED_PSEUDOS and registers they're
1205 : : connected to via copies. So expand the set. */
1206 : 964451 : expand_changed_pseudos ();
1207 : :
1208 : : /* If we removed an extension, that changed the promoted state
1209 : : of the destination of that extension. Thus we need to go
1210 : : find any SUBREGs that reference that pseudo and adjust their
1211 : : SUBREG_PROMOTED_P state. */
1212 : 121616615 : for (rtx_insn *insn = get_insns(); insn; insn = NEXT_INSN (insn))
1213 : : {
1214 : 120652164 : if (!NONDEBUG_INSN_P (insn))
1215 : 64670146 : continue;
1216 : :
1217 : 55982018 : rtx pat = PATTERN (insn);
1218 : 55982018 : subrtx_var_iterator::array_type array;
1219 : 356796072 : FOR_EACH_SUBRTX_VAR (iter, array, pat, NONCONST)
1220 : : {
1221 : 300814054 : rtx sub = *iter;
1222 : :
1223 : : /* We only care about SUBREGs. */
1224 : 300814054 : if (GET_CODE (sub) != SUBREG)
1225 : 299253757 : continue;
1226 : :
1227 : 1560297 : const_rtx x = SUBREG_REG (sub);
1228 : :
1229 : : /* We only care if the inner object is a REG. */
1230 : 1560297 : if (!REG_P (x))
1231 : 747 : continue;
1232 : :
1233 : : /* And only if the SUBREG is a promoted var. */
1234 : 1559550 : if (!SUBREG_PROMOTED_VAR_P (sub))
1235 : 1554244 : continue;
1236 : :
1237 : 5306 : if (bitmap_bit_p (changed_pseudos, REGNO (x)))
1238 : 0 : SUBREG_PROMOTED_VAR_P (sub) = 0;
1239 : : }
1240 : 55982018 : }
1241 : 964451 : }
1242 : :
1243 : : /* Initialization of the ext-dce pass. Primarily this means
1244 : : setting up the various bitmaps we utilize. */
1245 : :
1246 : : static void
1247 : 964451 : ext_dce_init (void)
1248 : : {
1249 : 964451 : livein.create (last_basic_block_for_fn (cfun));
1250 : 964451 : livein.quick_grow_cleared (last_basic_block_for_fn (cfun));
1251 : 12897426 : for (int i = 0; i < last_basic_block_for_fn (cfun); i++)
1252 : 11932975 : bitmap_initialize (&livein[i], &bitmap_default_obstack);
1253 : :
1254 : 964451 : auto_bitmap refs (&bitmap_default_obstack);
1255 : 964451 : df_get_exit_block_use_set (refs);
1256 : :
1257 : 964451 : unsigned i;
1258 : 964451 : bitmap_iterator bi;
1259 : 4438598 : EXECUTE_IF_SET_IN_BITMAP (refs, 0, i, bi)
1260 : 3474147 : make_reg_live (&livein[EXIT_BLOCK], i);
1261 : :
1262 : 964451 : livenow = BITMAP_ALLOC (NULL);
1263 : 964451 : all_blocks = BITMAP_ALLOC (NULL);
1264 : 964451 : changed_pseudos = BITMAP_ALLOC (NULL);
1265 : :
1266 : 12897426 : for (int i = 0; i < last_basic_block_for_fn (cfun); i++)
1267 : 11932975 : if (i != ENTRY_BLOCK && i != EXIT_BLOCK)
1268 : 10004073 : bitmap_set_bit (all_blocks, i);
1269 : :
1270 : 964451 : modify = false;
1271 : 964451 : }
1272 : :
1273 : : /* Finalization of the ext-dce pass. Primarily this means
1274 : : releasing up the various bitmaps we utilize. */
1275 : :
1276 : : static void
1277 : 964451 : ext_dce_finish (void)
1278 : : {
1279 : 12897426 : for (unsigned i = 0; i < livein.length (); i++)
1280 : 11932975 : bitmap_clear (&livein[i]);
1281 : 964451 : livein.release ();
1282 : :
1283 : 964451 : BITMAP_FREE (livenow);
1284 : 964451 : BITMAP_FREE (changed_pseudos);
1285 : 964451 : BITMAP_FREE (all_blocks);
1286 : 964451 : }
1287 : :
1288 : : /* Process block number BB_INDEX as part of the backward
1289 : : simple dataflow analysis. Return TRUE if something in
1290 : : this block changed or FALSE otherwise. */
1291 : :
1292 : : static bool
1293 : 27261841 : ext_dce_rd_transfer_n (int bb_index)
1294 : : {
1295 : : /* The ENTRY/EXIT blocks never change. */
1296 : 27261841 : if (bb_index == ENTRY_BLOCK || bb_index == EXIT_BLOCK)
1297 : : return false;
1298 : :
1299 : 23404037 : basic_block bb = BASIC_BLOCK_FOR_FN (cfun, bb_index);
1300 : :
1301 : : /* Make everything live that's live in the successors. */
1302 : 23404037 : bitmap_clear (livenow);
1303 : 23404037 : edge_iterator ei;
1304 : 23404037 : edge e;
1305 : :
1306 : 58893645 : FOR_EACH_EDGE (e, ei, bb->succs)
1307 : 35489608 : bitmap_ior_into (livenow, &livein[e->dest->index]);
1308 : :
1309 : 23404037 : ext_dce_process_bb (bb);
1310 : :
1311 : : /* We only allow widening the set of objects live at the start
1312 : : of a block. Otherwise we run the risk of not converging. */
1313 : 23404037 : return bitmap_ior_into (&livein[bb_index], livenow);
1314 : : }
1315 : :
1316 : : /* Dummy function for the df_simple_dataflow API. */
1317 : 34069206 : static bool ext_dce_rd_confluence_n (edge) { return true; }
1318 : :
1319 : : /* Use lifetime analyis to identify extensions that set bits that
1320 : : are never read. Turn such extensions into SUBREGs instead which
1321 : : can often be propagated away. */
1322 : :
1323 : : void
1324 : 964451 : ext_dce_execute (void)
1325 : : {
1326 : : /* Limit the amount of memory we use for livein, with 4 bits per
1327 : : reg per basic-block including overhead that maps to one byte
1328 : : per reg per basic-block. */
1329 : 964451 : uint64_t memory_request
1330 : 964451 : = (uint64_t)n_basic_blocks_for_fn (cfun) * max_reg_num ();
1331 : 964451 : if (memory_request / 1024 > (uint64_t)param_max_gcse_memory)
1332 : : {
1333 : 0 : warning (OPT_Wdisabled_optimization,
1334 : : "ext-dce disabled: %d basic blocks and %d registers; "
1335 : : "increase %<--param max-gcse-memory%> above %wu",
1336 : 0 : n_basic_blocks_for_fn (cfun), max_reg_num (),
1337 : : memory_request / 1024);
1338 : 0 : return;
1339 : : }
1340 : :
1341 : : /* Some settings of SUBREG_PROMOTED_VAR_P are actively harmful
1342 : : to this pass. Clear it for those cases. */
1343 : 964451 : maybe_clear_subreg_promoted_p ();
1344 : 964451 : df_analyze ();
1345 : 964451 : ext_dce_init ();
1346 : :
1347 : 3857804 : do
1348 : : {
1349 : 1928902 : df_simple_dataflow (DF_BACKWARD, NULL, NULL,
1350 : : ext_dce_rd_confluence_n, ext_dce_rd_transfer_n,
1351 : : all_blocks, df_get_postorder (DF_BACKWARD),
1352 : : df_get_n_blocks (DF_BACKWARD));
1353 : 1928902 : modify = !modify;
1354 : : }
1355 : : while (modify);
1356 : :
1357 : 964451 : reset_subreg_promoted_p ();
1358 : :
1359 : 964451 : ext_dce_finish ();
1360 : : }
1361 : :
1362 : :
1363 : : namespace {
1364 : :
1365 : : const pass_data pass_data_ext_dce =
1366 : : {
1367 : : RTL_PASS, /* type */
1368 : : "ext_dce", /* name */
1369 : : OPTGROUP_NONE, /* optinfo_flags */
1370 : : TV_EXT_DCE, /* tv_id */
1371 : : PROP_cfglayout, /* properties_required */
1372 : : 0, /* properties_provided */
1373 : : 0, /* properties_destroyed */
1374 : : 0, /* todo_flags_start */
1375 : : TODO_df_finish, /* todo_flags_finish */
1376 : : };
1377 : :
1378 : : class pass_ext_dce : public rtl_opt_pass
1379 : : {
1380 : : public:
1381 : 289302 : pass_ext_dce (gcc::context *ctxt)
1382 : 578604 : : rtl_opt_pass (pass_data_ext_dce, ctxt)
1383 : : {}
1384 : :
1385 : : /* opt_pass methods: */
1386 : 1472109 : virtual bool gate (function *) { return flag_ext_dce && optimize > 0; }
1387 : 964451 : virtual unsigned int execute (function *)
1388 : : {
1389 : 964451 : ext_dce_execute ();
1390 : 964451 : return 0;
1391 : : }
1392 : :
1393 : : }; // class pass_combine
1394 : :
1395 : : } // anon namespace
1396 : :
1397 : : rtl_opt_pass *
1398 : 289302 : make_pass_ext_dce (gcc::context *ctxt)
1399 : : {
1400 : 289302 : return new pass_ext_dce (ctxt);
1401 : : }
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