Line data Source code
1 : /* Integrated Register Allocator (IRA) intercommunication header file.
2 : Copyright (C) 2006-2026 Free Software Foundation, Inc.
3 : Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4 :
5 : This file is part of GCC.
6 :
7 : GCC is free software; you can redistribute it and/or modify it under
8 : the terms of the GNU General Public License as published by the Free
9 : Software Foundation; either version 3, or (at your option) any later
10 : version.
11 :
12 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 : for more details.
16 :
17 : You should have received a copy of the GNU General Public License
18 : along with GCC; see the file COPYING3. If not see
19 : <http://www.gnu.org/licenses/>. */
20 :
21 : #ifndef GCC_IRA_INT_H
22 : #define GCC_IRA_INT_H
23 :
24 : #include "recog.h"
25 : #include "function-abi.h"
26 :
27 : /* To provide consistency in naming, all IRA external variables,
28 : functions, common typedefs start with prefix ira_. */
29 :
30 : #if CHECKING_P
31 : #define ENABLE_IRA_CHECKING
32 : #endif
33 :
34 : #ifdef ENABLE_IRA_CHECKING
35 : #define ira_assert(c) gcc_assert (c)
36 : #else
37 : /* Always define and include C, so that warnings for empty body in an
38 : 'if' statement and unused variable do not occur. */
39 : #define ira_assert(c) ((void)(0 && (c)))
40 : #endif
41 :
42 : /* Compute register frequency from edge frequency FREQ. It is
43 : analogous to REG_FREQ_FROM_BB. When optimizing for size, or
44 : profile driven feedback is available and the function is never
45 : executed, frequency is always equivalent. Otherwise rescale the
46 : edge frequency. */
47 : #define REG_FREQ_FROM_EDGE_FREQ(freq) \
48 : (optimize_function_for_size_p (cfun) \
49 : ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
50 : ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
51 :
52 : /* A modified value of flag `-fira-verbose' used internally. */
53 : extern int internal_flag_ira_verbose;
54 :
55 : /* Dump file of the allocator if it is not NULL. */
56 : extern FILE *ira_dump_file;
57 :
58 : /* Typedefs for pointers to allocno live range, allocno, and copy of
59 : allocnos. */
60 : typedef struct live_range *live_range_t;
61 : typedef struct ira_allocno *ira_allocno_t;
62 : typedef struct ira_allocno_pref *ira_pref_t;
63 : typedef struct ira_allocno_copy *ira_copy_t;
64 : typedef struct ira_object *ira_object_t;
65 :
66 : /* Definition of vector of allocnos and copies. */
67 :
68 : /* Typedef for pointer to the subsequent structure. */
69 : typedef struct ira_loop_tree_node *ira_loop_tree_node_t;
70 :
71 : typedef unsigned short move_table[N_REG_CLASSES];
72 :
73 : /* In general case, IRA is a regional allocator. The regions are
74 : nested and form a tree. Currently regions are natural loops. The
75 : following structure describes loop tree node (representing basic
76 : block or loop). We need such tree because the loop tree from
77 : cfgloop.h is not convenient for the optimization: basic blocks are
78 : not a part of the tree from cfgloop.h. We also use the nodes for
79 : storing additional information about basic blocks/loops for the
80 : register allocation purposes. */
81 : struct ira_loop_tree_node
82 : {
83 : /* The node represents basic block if children == NULL. */
84 : basic_block bb; /* NULL for loop. */
85 : /* NULL for BB or for loop tree root if we did not build CFG loop tree. */
86 : class loop *loop;
87 : /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
88 : SUBLOOP_NEXT is always NULL for BBs. */
89 : ira_loop_tree_node_t subloop_next, next;
90 : /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
91 : the node. They are NULL for BBs. */
92 : ira_loop_tree_node_t subloops, children;
93 : /* The node immediately containing given node. */
94 : ira_loop_tree_node_t parent;
95 :
96 : /* Loop level in range [0, ira_loop_tree_height). */
97 : int level;
98 :
99 : /* All the following members are defined only for nodes representing
100 : loops. */
101 :
102 : /* The loop number from CFG loop tree. The root number is 0. */
103 : int loop_num;
104 :
105 : /* True if the loop was marked for removal from the register
106 : allocation. */
107 : bool to_remove_p;
108 :
109 : /* Allocnos in the loop corresponding to their regnos. If it is
110 : NULL the loop does not form a separate register allocation region
111 : (e.g. because it has abnormal enter/exit edges and we cannot put
112 : code for register shuffling on the edges if a different
113 : allocation is used for a pseudo-register on different sides of
114 : the edges). Caps are not in the map (remember we can have more
115 : one cap with the same regno in a region). */
116 : ira_allocno_t *regno_allocno_map;
117 :
118 : /* True if there is an entry to given loop not from its parent (or
119 : grandparent) basic block. For example, it is possible for two
120 : adjacent loops inside another loop. */
121 : bool entered_from_non_parent_p;
122 :
123 : /* Maximal register pressure inside loop for given register class
124 : (defined only for the pressure classes). */
125 : int reg_pressure[N_REG_CLASSES];
126 :
127 : /* Numbers of allocnos referred or living in the loop node (except
128 : for its subloops). */
129 : bitmap all_allocnos;
130 :
131 : /* Numbers of allocnos living at the loop borders. */
132 : bitmap border_allocnos;
133 :
134 : /* Regnos of pseudos modified in the loop node (including its
135 : subloops). */
136 : bitmap modified_regnos;
137 :
138 : /* Numbers of copies referred in the corresponding loop. */
139 : bitmap local_copies;
140 : };
141 :
142 : /* The root of the loop tree corresponding to the all function. */
143 : extern ira_loop_tree_node_t ira_loop_tree_root;
144 :
145 : /* Height of the loop tree. */
146 : extern int ira_loop_tree_height;
147 :
148 : /* All nodes representing basic blocks are referred through the
149 : following array. We cannot use basic block member `aux' for this
150 : because it is used for insertion of insns on edges. */
151 : extern ira_loop_tree_node_t ira_bb_nodes;
152 :
153 : /* Two access macros to the nodes representing basic blocks. */
154 : #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
155 : #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
156 : (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
157 : if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
158 : { \
159 : fprintf (stderr, \
160 : "\n%s: %d: error in %s: it is not a block node\n", \
161 : __FILE__, __LINE__, __FUNCTION__); \
162 : gcc_unreachable (); \
163 : } \
164 : _node; }))
165 : #else
166 : #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
167 : #endif
168 :
169 : #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
170 :
171 : /* All nodes representing loops are referred through the following
172 : array. */
173 : extern ira_loop_tree_node_t ira_loop_nodes;
174 :
175 : /* Two access macros to the nodes representing loops. */
176 : #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
177 : #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
178 : (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \
179 : if (_node->children == NULL || _node->bb != NULL \
180 : || (_node->loop == NULL && current_loops != NULL)) \
181 : { \
182 : fprintf (stderr, \
183 : "\n%s: %d: error in %s: it is not a loop node\n", \
184 : __FILE__, __LINE__, __FUNCTION__); \
185 : gcc_unreachable (); \
186 : } \
187 : _node; }))
188 : #else
189 : #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
190 : #endif
191 :
192 : #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
193 :
194 :
195 : /* The structure describes program points where a given allocno lives.
196 : If the live ranges of two allocnos are intersected, the allocnos
197 : are in conflict. */
198 : struct live_range
199 : {
200 : /* Object whose live range is described by given structure. */
201 : ira_object_t object;
202 : /* Program point range. */
203 : int start, finish;
204 : /* Next structure describing program points where the allocno
205 : lives. */
206 : live_range_t next;
207 : /* Pointer to structures with the same start/finish. */
208 : live_range_t start_next, finish_next;
209 : };
210 :
211 : /* Program points are enumerated by numbers from range
212 : 0..IRA_MAX_POINT-1. There are approximately two times more program
213 : points than insns. Program points are places in the program where
214 : liveness info can be changed. In most general case (there are more
215 : complicated cases too) some program points correspond to places
216 : where input operand dies and other ones correspond to places where
217 : output operands are born. */
218 : extern int ira_max_point;
219 :
220 : /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
221 : live ranges with given start/finish point. */
222 : extern live_range_t *ira_start_point_ranges, *ira_finish_point_ranges;
223 :
224 : /* A structure representing conflict information for an allocno
225 : (or one of its subwords). */
226 : struct ira_object
227 : {
228 : /* The allocno associated with this record. */
229 : ira_allocno_t allocno;
230 : /* Vector of accumulated conflicting conflict_redords with NULL end
231 : marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
232 : otherwise. */
233 : void *conflicts_array;
234 : /* Pointer to structures describing at what program point the
235 : object lives. We always maintain the list in such way that *the
236 : ranges in the list are not intersected and ordered by decreasing
237 : their program points*. */
238 : live_range_t live_ranges;
239 : /* The subword within ALLOCNO which is represented by this object.
240 : Zero means the lowest-order subword (or the entire allocno in case
241 : it is not being tracked in subwords). */
242 : int subword;
243 : /* Allocated size of the conflicts array. */
244 : unsigned int conflicts_array_size;
245 : /* A unique number for every instance of this structure, which is used
246 : to represent it in conflict bit vectors. */
247 : int id;
248 : /* Before building conflicts, MIN and MAX are initialized to
249 : correspondingly minimal and maximal points of the accumulated
250 : live ranges. Afterwards, they hold the minimal and maximal ids
251 : of other ira_objects that this one can conflict with. */
252 : int min, max;
253 : /* Initial and accumulated hard registers conflicting with this
254 : object and as a consequences cannot be assigned to the allocno.
255 : All non-allocatable hard regs and hard regs of register classes
256 : different from given allocno one are included in the sets. */
257 : HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs;
258 : /* Number of accumulated conflicts in the vector of conflicting
259 : objects. */
260 : int num_accumulated_conflicts;
261 : /* TRUE if conflicts are represented by a vector of pointers to
262 : ira_object structures. Otherwise, we use a bit vector indexed
263 : by conflict ID numbers. */
264 : unsigned int conflict_vec_p : 1;
265 : };
266 :
267 :
268 : /* Filter that restricts an allocno's hard regnos by referencing
269 : another allocno. */
270 : struct ira_dependent_filter
271 : {
272 : /* Filter ID and MODE of this (dependent) op. */
273 : int id;
274 : ENUM_BITFIELD (machine_mode) mode : MACHINE_MODE_BITSIZE;
275 :
276 : /* Allocno, hard regno and mode of the referenced op. */
277 : ira_allocno_t ref_allocno;
278 : unsigned int ref_hard_regno;
279 : ENUM_BITFIELD (machine_mode) ref_mode : MACHINE_MODE_BITSIZE;
280 :
281 : struct ira_dependent_filter *next;
282 : };
283 :
284 : /* A structure representing an allocno (allocation entity). Allocno
285 : represents a pseudo-register in an allocation region. If
286 : pseudo-register does not live in a region but it lives in the
287 : nested regions, it is represented in the region by special allocno
288 : called *cap*. There may be more one cap representing the same
289 : pseudo-register in region. It means that the corresponding
290 : pseudo-register lives in more one non-intersected subregion. */
291 : struct ira_allocno
292 : {
293 : /* The allocno order number starting with 0. Each allocno has an
294 : unique number and the number is never changed for the
295 : allocno. */
296 : int num;
297 : /* Regno for allocno or cap. */
298 : int regno;
299 : /* Mode of the allocno which is the mode of the corresponding
300 : pseudo-register. */
301 : ENUM_BITFIELD (machine_mode) mode : MACHINE_MODE_BITSIZE;
302 : /* Widest mode of the allocno which in at least one case could be
303 : for paradoxical subregs where wmode > mode. */
304 : ENUM_BITFIELD (machine_mode) wmode : MACHINE_MODE_BITSIZE;
305 : /* Register class which should be used for allocation for given
306 : allocno. NO_REGS means that we should use memory. */
307 : ENUM_BITFIELD (reg_class) aclass : 16;
308 : /* Hard register assigned to given allocno. Negative value means
309 : that memory was allocated to the allocno. During the reload,
310 : spilled allocno has value equal to the corresponding stack slot
311 : number (0, ...) - 2. Value -1 is used for allocnos spilled by the
312 : reload (at this point pseudo-register has only one allocno) which
313 : did not get stack slot yet. */
314 : signed int hard_regno : 16;
315 : /* A bitmask of the ABIs used by calls that occur while the allocno
316 : is live. */
317 : unsigned int crossed_calls_abis : NUM_ABI_IDS;
318 : /* During the reload, value TRUE means that we should not reassign a
319 : hard register to the allocno got memory earlier. It is set up
320 : when we removed memory-memory move insn before each iteration of
321 : the reload. */
322 : unsigned int dont_reassign_p : 1;
323 : #ifdef STACK_REGS
324 : /* Set to TRUE if allocno can't be assigned to the stack hard
325 : register correspondingly in this region and area including the
326 : region and all its subregions recursively. */
327 : unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
328 : #endif
329 : /* TRUE value means that there is no sense to spill the allocno
330 : during coloring because the spill will result in additional
331 : reloads in reload pass. */
332 : unsigned int bad_spill_p : 1;
333 : /* TRUE if a hard register or memory has been assigned to the
334 : allocno. */
335 : unsigned int assigned_p : 1;
336 : /* TRUE if conflicts for given allocno are represented by vector of
337 : pointers to the conflicting allocnos. Otherwise, we use a bit
338 : vector where a bit with given index represents allocno with the
339 : same number. */
340 : unsigned int conflict_vec_p : 1;
341 : /* True if the parent loop has an allocno for the same register and
342 : if the parent allocno's assignment might not be valid in this loop.
343 : This means that we cannot merge this allocno and the parent allocno
344 : together.
345 :
346 : This is only ever true for non-cap allocnos. */
347 : unsigned int might_conflict_with_parent_p : 1;
348 : #ifndef NUM_REGISTER_FILTERS
349 : #error "insn-config.h not included"
350 : #elif NUM_REGISTER_FILTERS
351 : /* The set of register filters applied to the allocno by operand
352 : alternatives that accept class ACLASS. */
353 : unsigned int register_filters : NUM_REGISTER_FILTERS;
354 : #endif
355 : /* List of dependent filters. */
356 : struct ira_dependent_filter *dependent_filters;
357 : /* Accumulated usage references of the allocno. Here and below,
358 : word 'accumulated' means info for given region and all nested
359 : subregions. In this case, 'accumulated' means sum of references
360 : of the corresponding pseudo-register in this region and in all
361 : nested subregions recursively. */
362 : int nrefs;
363 : /* Accumulated frequency of usage of the allocno. */
364 : int freq;
365 : /* Minimal accumulated and updated costs of usage register of the
366 : allocno class. */
367 : int class_cost, updated_class_cost;
368 : /* Minimal accumulated, and updated costs of memory for the allocno.
369 : At the allocation start, the original and updated costs are
370 : equal. The updated cost may be changed after finishing
371 : allocation in a region and starting allocation in a subregion.
372 : The change reflects the cost of spill/restore code on the
373 : subregion border if we assign memory to the pseudo in the
374 : subregion. */
375 : int memory_cost, updated_memory_cost;
376 : /* Accumulated number of points where the allocno lives and there is
377 : excess pressure for its class. Excess pressure for a register
378 : class at some point means that there are more allocnos of given
379 : register class living at the point than number of hard-registers
380 : of the class available for the allocation. */
381 : int excess_pressure_points_num;
382 : /* The number of objects tracked in the following array. */
383 : int num_objects;
384 : /* Accumulated frequency of calls which given allocno
385 : intersects. */
386 : int call_freq;
387 : /* Accumulated number of the intersected calls. */
388 : int calls_crossed_num;
389 : /* The number of calls across which it is live, but which should not
390 : affect register preferences. */
391 : int cheap_calls_crossed_num;
392 : /* Allocnos with the same regno are linked by the following member.
393 : Allocnos corresponding to inner loops are first in the list (it
394 : corresponds to depth-first traverse of the loops). */
395 : ira_allocno_t next_regno_allocno;
396 : /* There may be different allocnos with the same regno in different
397 : regions. Allocnos are bound to the corresponding loop tree node.
398 : Pseudo-register may have only one regular allocno with given loop
399 : tree node but more than one cap (see comments above). */
400 : ira_loop_tree_node_t loop_tree_node;
401 : /* Allocno hard reg preferences. */
402 : ira_pref_t allocno_prefs;
403 : /* Copies to other non-conflicting allocnos. The copies can
404 : represent move insn or potential move insn usually because of two
405 : operand insn constraints. */
406 : ira_copy_t allocno_copies;
407 : /* It is a allocno (cap) representing given allocno on upper loop tree
408 : level. */
409 : ira_allocno_t cap;
410 : /* It is a link to allocno (cap) on lower loop level represented by
411 : given cap. Null if given allocno is not a cap. */
412 : ira_allocno_t cap_member;
413 : /* An array of structures describing conflict information and live
414 : ranges for each object associated with the allocno. There may be
415 : more than one such object in cases where the allocno represents a
416 : multi-word register. */
417 : ira_object_t objects[2];
418 : /* Registers clobbered by intersected calls. */
419 : HARD_REG_SET crossed_calls_clobbered_regs;
420 : /* Array of usage costs (accumulated and the one updated during
421 : coloring) for each hard register of the allocno class. The
422 : member value can be NULL if all costs are the same and equal to
423 : CLASS_COST. For example, the costs of two different hard
424 : registers can be different if one hard register is callee-saved
425 : and another one is callee-used and the allocno lives through
426 : calls. Another example can be case when for some insn the
427 : corresponding pseudo-register value should be put in specific
428 : register class (e.g. AREG for x86) which is a strict subset of
429 : the allocno class (GENERAL_REGS for x86). We have updated costs
430 : to reflect the situation when the usage cost of a hard register
431 : is decreased because the allocno is connected to another allocno
432 : by a copy and the another allocno has been assigned to the hard
433 : register. */
434 : int *hard_reg_costs, *updated_hard_reg_costs;
435 : /* Array of decreasing costs (accumulated and the one updated during
436 : coloring) for allocnos conflicting with given allocno for hard
437 : regno of the allocno class. The member value can be NULL if all
438 : costs are the same. These costs are used to reflect preferences
439 : of other allocnos not assigned yet during assigning to given
440 : allocno. */
441 : int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs;
442 : /* Different additional data. It is used to decrease size of
443 : allocno data footprint. */
444 : void *add_data;
445 : };
446 :
447 :
448 : /* All members of the allocno structures should be accessed only
449 : through the following macros. */
450 : #define ALLOCNO_NUM(A) ((A)->num)
451 : #define ALLOCNO_REGNO(A) ((A)->regno)
452 : #define ALLOCNO_REG(A) ((A)->reg)
453 : #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
454 : #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
455 : #define ALLOCNO_CAP(A) ((A)->cap)
456 : #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
457 : #define ALLOCNO_NREFS(A) ((A)->nrefs)
458 : #define ALLOCNO_FREQ(A) ((A)->freq)
459 : #define ALLOCNO_MIGHT_CONFLICT_WITH_PARENT_P(A) \
460 : ((A)->might_conflict_with_parent_p)
461 : #if NUM_REGISTER_FILTERS
462 : #define ALLOCNO_REGISTER_FILTERS(A) (A)->register_filters
463 : #define ALLOCNO_SET_REGISTER_FILTERS(A, X) ((A)->register_filters = (X))
464 : #else
465 : #define ALLOCNO_REGISTER_FILTERS(A) 0
466 : #define ALLOCNO_SET_REGISTER_FILTERS(A, X) ((void) (A), gcc_assert ((X) == 0))
467 : #endif
468 : #define ALLOCNO_DEPENDENT_FILTERS(A) ((A)->dependent_filters)
469 : #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
470 : #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
471 : #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
472 : #define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num)
473 : #define ALLOCNO_CROSSED_CALLS_ABIS(A) ((A)->crossed_calls_abis)
474 : #define ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS(A) \
475 : ((A)->crossed_calls_clobbered_regs)
476 : #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
477 : #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
478 : #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
479 : #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
480 : #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
481 : #ifdef STACK_REGS
482 : #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
483 : #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
484 : #endif
485 : #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
486 : #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
487 : #define ALLOCNO_MODE(A) ((A)->mode)
488 : #define ALLOCNO_WMODE(A) ((A)->wmode)
489 : #define ALLOCNO_PREFS(A) ((A)->allocno_prefs)
490 : #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
491 : #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
492 : #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
493 : #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
494 : ((A)->conflict_hard_reg_costs)
495 : #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
496 : ((A)->updated_conflict_hard_reg_costs)
497 : #define ALLOCNO_CLASS(A) ((A)->aclass)
498 : #define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
499 : #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
500 : #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
501 : #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
502 : #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
503 : ((A)->excess_pressure_points_num)
504 : #define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
505 : #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
506 : #define ALLOCNO_ADD_DATA(A) ((A)->add_data)
507 :
508 : /* Typedef for pointer to the subsequent structure. */
509 : typedef struct ira_emit_data *ira_emit_data_t;
510 :
511 : /* Allocno bound data used for emit pseudo live range split insns and
512 : to flattening IR. */
513 : struct ira_emit_data
514 : {
515 : /* TRUE if the allocno assigned to memory was a destination of
516 : removed move (see ira-emit.cc) at loop exit because the value of
517 : the corresponding pseudo-register is not changed inside the
518 : loop. */
519 : unsigned int mem_optimized_dest_p : 1;
520 : /* TRUE if the corresponding pseudo-register has disjoint live
521 : ranges and the other allocnos of the pseudo-register except this
522 : one changed REG. */
523 : unsigned int somewhere_renamed_p : 1;
524 : /* TRUE if allocno with the same REGNO in a subregion has been
525 : renamed, in other words, got a new pseudo-register. */
526 : unsigned int child_renamed_p : 1;
527 : /* Final rtx representation of the allocno. */
528 : rtx reg;
529 : /* Non NULL if we remove restoring value from given allocno to
530 : MEM_OPTIMIZED_DEST at loop exit (see ira-emit.cc) because the
531 : allocno value is not changed inside the loop. */
532 : ira_allocno_t mem_optimized_dest;
533 : };
534 :
535 : #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
536 :
537 : /* Data used to emit live range split insns and to flattening IR. */
538 : extern ira_emit_data_t ira_allocno_emit_data;
539 :
540 : /* Abbreviation for frequent emit data access. */
541 : inline rtx
542 35719509 : allocno_emit_reg (ira_allocno_t a)
543 : {
544 34567830 : return ALLOCNO_EMIT_DATA (a)->reg;
545 : }
546 :
547 : #define OBJECT_ALLOCNO(O) ((O)->allocno)
548 : #define OBJECT_SUBWORD(O) ((O)->subword)
549 : #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
550 : #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
551 : #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
552 : #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
553 : #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
554 : #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
555 : #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
556 : #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
557 : #define OBJECT_MIN(O) ((O)->min)
558 : #define OBJECT_MAX(O) ((O)->max)
559 : #define OBJECT_CONFLICT_ID(O) ((O)->id)
560 : #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
561 :
562 : /* Map regno -> allocnos with given regno (see comments for
563 : allocno member `next_regno_allocno'). */
564 : extern ira_allocno_t *ira_regno_allocno_map;
565 :
566 : /* Array of references to all allocnos. The order number of the
567 : allocno corresponds to the index in the array. Removed allocnos
568 : have NULL element value. */
569 : extern ira_allocno_t *ira_allocnos;
570 :
571 : /* The size of the previous array. */
572 : extern int ira_allocnos_num;
573 :
574 : /* Map a conflict id to its corresponding ira_object structure. */
575 : extern ira_object_t *ira_object_id_map;
576 :
577 : /* The size of the previous array. */
578 : extern int ira_objects_num;
579 :
580 : /* The following structure represents a hard register preference of
581 : allocno. The preference represent move insns or potential move
582 : insns usually because of two operand insn constraints. One move
583 : operand is a hard register. */
584 : struct ira_allocno_pref
585 : {
586 : /* The unique order number of the preference node starting with 0. */
587 : int num;
588 : /* Preferred hard register. */
589 : int hard_regno;
590 : /* Accumulated execution frequency of insns from which the
591 : preference created. */
592 : int freq;
593 : /* Given allocno. */
594 : ira_allocno_t allocno;
595 : /* All preferences with the same allocno are linked by the following
596 : member. */
597 : ira_pref_t next_pref;
598 : };
599 :
600 : /* Array of references to all allocno preferences. The order number
601 : of the preference corresponds to the index in the array. */
602 : extern ira_pref_t *ira_prefs;
603 :
604 : /* Size of the previous array. */
605 : extern int ira_prefs_num;
606 :
607 : /* The following structure represents a copy of two allocnos. The
608 : copies represent move insns or potential move insns usually because
609 : of two operand insn constraints. To remove register shuffle, we
610 : also create copies between allocno which is output of an insn and
611 : allocno becoming dead in the insn. */
612 : struct ira_allocno_copy
613 : {
614 : /* The unique order number of the copy node starting with 0. */
615 : int num;
616 : /* Allocnos connected by the copy. The first allocno should have
617 : smaller order number than the second one. */
618 : ira_allocno_t first, second;
619 : /* Execution frequency of the copy. */
620 : int freq;
621 : bool constraint_p;
622 : /* It is a move insn which is an origin of the copy. The member
623 : value for the copy representing two operand insn constraints or
624 : for the copy created to remove register shuffle is NULL. In last
625 : case the copy frequency is smaller than the corresponding insn
626 : execution frequency. */
627 : rtx_insn *insn;
628 : /* All copies with the same allocno as FIRST are linked by the two
629 : following members. */
630 : ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
631 : /* All copies with the same allocno as SECOND are linked by the two
632 : following members. */
633 : ira_copy_t prev_second_allocno_copy, next_second_allocno_copy;
634 : /* Region from which given copy is originated. */
635 : ira_loop_tree_node_t loop_tree_node;
636 : };
637 :
638 : /* Array of references to all copies. The order number of the copy
639 : corresponds to the index in the array. Removed copies have NULL
640 : element value. */
641 : extern ira_copy_t *ira_copies;
642 :
643 : /* Size of the previous array. */
644 : extern int ira_copies_num;
645 :
646 : /* The following structure describes a stack slot used for spilled
647 : pseudo-registers. */
648 : class ira_spilled_reg_stack_slot
649 : {
650 : public:
651 : /* pseudo-registers assigned to the stack slot. */
652 : bitmap_head spilled_regs;
653 : /* RTL representation of the stack slot. */
654 : rtx mem;
655 : /* Size of the stack slot. */
656 : poly_uint64 width;
657 : };
658 :
659 : /* The number of elements in the following array. */
660 : extern int ira_spilled_reg_stack_slots_num;
661 :
662 : /* The following array contains info about spilled pseudo-registers
663 : stack slots used in current function so far. */
664 : extern class ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
665 :
666 : /* Correspondingly overall cost of the allocation, cost of the
667 : allocnos assigned to hard-registers, cost of the allocnos assigned
668 : to memory, cost of loads, stores and register move insns generated
669 : for pseudo-register live range splitting (see ira-emit.cc). */
670 : extern int64_t ira_overall_cost;
671 : extern int64_t ira_reg_cost, ira_mem_cost;
672 : extern int64_t ira_load_cost, ira_store_cost, ira_shuffle_cost;
673 : extern int ira_move_loops_num, ira_additional_jumps_num;
674 :
675 :
676 : /* This page contains a bitset implementation called 'min/max sets' used to
677 : record conflicts in IRA.
678 : They are named min/maxs set since we keep track of a minimum and a maximum
679 : bit number for each set representing the bounds of valid elements. Otherwise,
680 : the implementation resembles sbitmaps in that we store an array of integers
681 : whose bits directly represent the members of the set. */
682 :
683 : /* The type used as elements in the array, and the number of bits in
684 : this type. */
685 :
686 : #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
687 : #define IRA_INT_TYPE HOST_WIDE_INT
688 :
689 : /* Set, clear or test bit number I in R, a bit vector of elements with
690 : minimal index and maximal index equal correspondingly to MIN and
691 : MAX. */
692 : #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
693 :
694 : #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
695 : (({ int _min = (MIN), _max = (MAX), _i = (I); \
696 : if (_i < _min || _i > _max) \
697 : { \
698 : fprintf (stderr, \
699 : "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
700 : __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
701 : gcc_unreachable (); \
702 : } \
703 : ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
704 : |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
705 :
706 :
707 : #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
708 : (({ int _min = (MIN), _max = (MAX), _i = (I); \
709 : if (_i < _min || _i > _max) \
710 : { \
711 : fprintf (stderr, \
712 : "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
713 : __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
714 : gcc_unreachable (); \
715 : } \
716 : ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
717 : &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
718 :
719 : #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
720 : (({ int _min = (MIN), _max = (MAX), _i = (I); \
721 : if (_i < _min || _i > _max) \
722 : { \
723 : fprintf (stderr, \
724 : "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
725 : __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
726 : gcc_unreachable (); \
727 : } \
728 : ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
729 : & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
730 :
731 : #else
732 :
733 : #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
734 : ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
735 : |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
736 :
737 : #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
738 : ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
739 : &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
740 :
741 : #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
742 : ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
743 : & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
744 :
745 : #endif
746 :
747 : /* The iterator for min/max sets. */
748 : struct minmax_set_iterator {
749 :
750 : /* Array containing the bit vector. */
751 : IRA_INT_TYPE *vec;
752 :
753 : /* The number of the current element in the vector. */
754 : unsigned int word_num;
755 :
756 : /* The number of bits in the bit vector. */
757 : unsigned int nel;
758 :
759 : /* The current bit index of the bit vector. */
760 : unsigned int bit_num;
761 :
762 : /* Index corresponding to the 1st bit of the bit vector. */
763 : int start_val;
764 :
765 : /* The word of the bit vector currently visited. */
766 : unsigned IRA_INT_TYPE word;
767 : };
768 :
769 : /* Initialize the iterator I for bit vector VEC containing minimal and
770 : maximal values MIN and MAX. */
771 : inline void
772 32652459 : minmax_set_iter_init (minmax_set_iterator *i, IRA_INT_TYPE *vec, int min,
773 : int max)
774 : {
775 32652459 : i->vec = vec;
776 32652459 : i->word_num = 0;
777 32652459 : i->nel = max < min ? 0 : max - min + 1;
778 32652459 : i->start_val = min;
779 32652459 : i->bit_num = 0;
780 32652459 : i->word = i->nel == 0 ? 0 : vec[0];
781 32652459 : }
782 :
783 : /* Return TRUE if we have more allocnos to visit, in which case *N is
784 : set to the number of the element to be visited. Otherwise, return
785 : FALSE. */
786 : inline bool
787 942130157 : minmax_set_iter_cond (minmax_set_iterator *i, int *n)
788 : {
789 : /* Skip words that are zeros. */
790 1566774951 : for (; i->word == 0; i->word = i->vec[i->word_num])
791 : {
792 657297253 : i->word_num++;
793 657297253 : i->bit_num = i->word_num * IRA_INT_BITS;
794 :
795 : /* If we have reached the end, break. */
796 657297253 : if (i->bit_num >= i->nel)
797 : return false;
798 : }
799 :
800 : /* Skip bits that are zero. */
801 909477698 : int off = ctz_hwi (i->word);
802 909477698 : i->bit_num += off;
803 909477698 : i->word >>= off;
804 :
805 909477698 : *n = (int) i->bit_num + i->start_val;
806 :
807 909477698 : return true;
808 : }
809 :
810 : /* Advance to the next element in the set. */
811 : inline void
812 909477698 : minmax_set_iter_next (minmax_set_iterator *i)
813 : {
814 909477698 : i->word >>= 1;
815 909477698 : i->bit_num++;
816 909477698 : }
817 :
818 : /* Loop over all elements of a min/max set given by bit vector VEC and
819 : their minimal and maximal values MIN and MAX. In each iteration, N
820 : is set to the number of next allocno. ITER is an instance of
821 : minmax_set_iterator used to iterate over the set. */
822 : #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
823 : for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
824 : minmax_set_iter_cond (&(ITER), &(N)); \
825 : minmax_set_iter_next (&(ITER)))
826 :
827 : class target_ira_int {
828 : public:
829 : ~target_ira_int ();
830 :
831 : void free_ira_costs ();
832 : void free_register_move_costs ();
833 :
834 : /* Initialized once. It is a maximal possible size of the allocated
835 : struct costs. */
836 : size_t x_max_struct_costs_size;
837 :
838 : /* Allocated and initialized once, and used to initialize cost values
839 : for each insn. */
840 : struct costs *x_init_cost;
841 :
842 : /* Allocated once, and used for temporary purposes. */
843 : struct costs *x_temp_costs;
844 :
845 : /* Allocated once, and used for the cost calculation. */
846 : struct costs *x_op_costs[MAX_RECOG_OPERANDS];
847 : struct costs *x_this_op_costs[MAX_RECOG_OPERANDS];
848 :
849 : /* Hard registers that cannot be used for the register allocator for
850 : all functions of the current compilation unit. */
851 : HARD_REG_SET x_no_unit_alloc_regs;
852 :
853 : /* Map: hard regs X modes -> set of hard registers for storing value
854 : of given mode starting with given hard register. */
855 : HARD_REG_SET (x_ira_reg_mode_hard_regset
856 : [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
857 :
858 : /* Maximum cost of moving from a register in one class to a register
859 : in another class. Based on TARGET_REGISTER_MOVE_COST. */
860 : move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
861 :
862 : /* Similar, but here we don't have to move if the first index is a
863 : subset of the second so in that case the cost is zero. */
864 : move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
865 :
866 : /* Similar, but here we don't have to move if the first index is a
867 : superset of the second so in that case the cost is zero. */
868 : move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
869 :
870 : /* Keep track of the last mode we initialized move costs for. */
871 : int x_last_mode_for_init_move_cost;
872 :
873 : /* Array analog of the macro MEMORY_MOVE_COST but they contain maximal
874 : cost not minimal. */
875 : short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
876 :
877 : /* Map class->true if class is a possible allocno class, false
878 : otherwise. */
879 : bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
880 :
881 : /* Map class->true if class is a pressure class, false otherwise. */
882 : bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
883 :
884 : /* Array of the number of hard registers of given class which are
885 : available for allocation. The order is defined by the hard
886 : register numbers. */
887 : short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
888 :
889 : /* Index (in ira_class_hard_regs; for given register class and hard
890 : register (in general case a hard register can belong to several
891 : register classes). The index is negative for hard registers
892 : unavailable for the allocation. */
893 : short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
894 :
895 : /* Index [CL][M] contains R if R appears somewhere in a register of the form:
896 :
897 : (reg:M R'), R' not in x_ira_prohibited_class_mode_regs[CL][M]
898 :
899 : For example, if:
900 :
901 : - (reg:M 2) is valid and occupies two registers;
902 : - register 2 belongs to CL; and
903 : - register 3 belongs to the same pressure class as CL
904 :
905 : then (reg:M 2) contributes to [CL][M] and registers 2 and 3 will be
906 : in the set. */
907 : HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
908 :
909 : /* The value is number of elements in the subsequent array. */
910 : int x_ira_important_classes_num;
911 :
912 : /* The array containing all non-empty classes. Such classes is
913 : important for calculation of the hard register usage costs. */
914 : enum reg_class x_ira_important_classes[N_REG_CLASSES];
915 :
916 : /* The array containing indexes of important classes in the previous
917 : array. The array elements are defined only for important
918 : classes. */
919 : int x_ira_important_class_nums[N_REG_CLASSES];
920 :
921 : /* Map class->true if class is an uniform class, false otherwise. */
922 : bool x_ira_uniform_class_p[N_REG_CLASSES];
923 :
924 : /* The biggest important class inside of intersection of the two
925 : classes (that is calculated taking only hard registers available
926 : for allocation into account;. If the both classes contain no hard
927 : registers available for allocation, the value is calculated with
928 : taking all hard-registers including fixed ones into account. */
929 : enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
930 :
931 : /* Classes with end marker LIM_REG_CLASSES which are intersected with
932 : given class (the first index). That includes given class itself.
933 : This is calculated taking only hard registers available for
934 : allocation into account. */
935 : enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
936 :
937 : /* The biggest (smallest) important class inside of (covering) union
938 : of the two classes (that is calculated taking only hard registers
939 : available for allocation into account). If the both classes
940 : contain no hard registers available for allocation, the value is
941 : calculated with taking all hard-registers including fixed ones
942 : into account. In other words, the value is the corresponding
943 : reg_class_subunion (reg_class_superunion) value. */
944 : enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
945 : enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
946 :
947 : /* For each reg class, table listing all the classes contained in it
948 : (excluding the class itself. Non-allocatable registers are
949 : excluded from the consideration). */
950 : enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
951 :
952 : /* Array whose values are hard regset of hard registers for which
953 : move of the hard register in given mode into itself is
954 : prohibited. */
955 : HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
956 :
957 : /* Flag of that the above array has been initialized. */
958 : bool x_ira_prohibited_mode_move_regs_initialized_p;
959 :
960 : /* Number of real occurrences of hard regs before IRA. */
961 : size_t x_ira_hard_regno_nrefs[FIRST_PSEUDO_REGISTER];
962 : };
963 :
964 : extern class target_ira_int default_target_ira_int;
965 : #if SWITCHABLE_TARGET
966 : extern class target_ira_int *this_target_ira_int;
967 : #else
968 : #define this_target_ira_int (&default_target_ira_int)
969 : #endif
970 :
971 : #define ira_reg_mode_hard_regset \
972 : (this_target_ira_int->x_ira_reg_mode_hard_regset)
973 : #define ira_register_move_cost \
974 : (this_target_ira_int->x_ira_register_move_cost)
975 : #define ira_max_memory_move_cost \
976 : (this_target_ira_int->x_ira_max_memory_move_cost)
977 : #define ira_may_move_in_cost \
978 : (this_target_ira_int->x_ira_may_move_in_cost)
979 : #define ira_may_move_out_cost \
980 : (this_target_ira_int->x_ira_may_move_out_cost)
981 : #define ira_reg_allocno_class_p \
982 : (this_target_ira_int->x_ira_reg_allocno_class_p)
983 : #define ira_reg_pressure_class_p \
984 : (this_target_ira_int->x_ira_reg_pressure_class_p)
985 : #define ira_non_ordered_class_hard_regs \
986 : (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
987 : #define ira_class_hard_reg_index \
988 : (this_target_ira_int->x_ira_class_hard_reg_index)
989 : #define ira_useful_class_mode_regs \
990 : (this_target_ira_int->x_ira_useful_class_mode_regs)
991 : #define ira_important_classes_num \
992 : (this_target_ira_int->x_ira_important_classes_num)
993 : #define ira_important_classes \
994 : (this_target_ira_int->x_ira_important_classes)
995 : #define ira_important_class_nums \
996 : (this_target_ira_int->x_ira_important_class_nums)
997 : #define ira_uniform_class_p \
998 : (this_target_ira_int->x_ira_uniform_class_p)
999 : #define ira_reg_class_intersect \
1000 : (this_target_ira_int->x_ira_reg_class_intersect)
1001 : #define ira_reg_class_super_classes \
1002 : (this_target_ira_int->x_ira_reg_class_super_classes)
1003 : #define ira_reg_class_subunion \
1004 : (this_target_ira_int->x_ira_reg_class_subunion)
1005 : #define ira_reg_class_superunion \
1006 : (this_target_ira_int->x_ira_reg_class_superunion)
1007 : #define ira_prohibited_mode_move_regs \
1008 : (this_target_ira_int->x_ira_prohibited_mode_move_regs)
1009 : #define ira_hard_regno_nrefs \
1010 : (this_target_ira_int->x_ira_hard_regno_nrefs)
1011 :
1012 : /* ira.cc: */
1013 :
1014 : extern void *ira_allocate (size_t);
1015 : extern void ira_free (void *addr);
1016 : extern bitmap ira_allocate_bitmap (void);
1017 : extern void ira_free_bitmap (bitmap);
1018 : extern void ira_print_disposition (FILE *);
1019 : extern void ira_debug_disposition (void);
1020 : extern void ira_debug_allocno_classes (void);
1021 : extern void ira_init_register_move_cost (machine_mode);
1022 : extern alternative_mask ira_setup_alts (rtx_insn *);
1023 : extern int ira_get_dup_out_num (int, alternative_mask, bool &);
1024 :
1025 : /* ira-build.cc */
1026 :
1027 : /* The current loop tree node and its regno allocno map. */
1028 : extern ira_loop_tree_node_t ira_curr_loop_tree_node;
1029 : extern ira_allocno_t *ira_curr_regno_allocno_map;
1030 :
1031 : extern void ira_debug_pref (ira_pref_t);
1032 : extern void ira_debug_prefs (void);
1033 : extern void ira_debug_allocno_prefs (ira_allocno_t);
1034 :
1035 : extern void ira_debug_copy (ira_copy_t);
1036 : extern void debug (ira_allocno_copy &ref);
1037 : extern void debug (ira_allocno_copy *ptr);
1038 :
1039 : extern void ira_debug_copies (void);
1040 : extern void ira_debug_allocno_copies (ira_allocno_t);
1041 : extern void debug (ira_allocno &ref);
1042 : extern void debug (ira_allocno *ptr);
1043 :
1044 : extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t,
1045 : void (*) (ira_loop_tree_node_t),
1046 : void (*) (ira_loop_tree_node_t));
1047 : extern ira_allocno_t ira_parent_allocno (ira_allocno_t);
1048 : extern ira_allocno_t ira_parent_or_cap_allocno (ira_allocno_t);
1049 : extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t);
1050 : extern void ira_create_allocno_objects (ira_allocno_t);
1051 : extern void ira_set_allocno_class (ira_allocno_t, enum reg_class);
1052 : extern bool ira_conflict_vector_profitable_p (ira_object_t, int);
1053 : extern void ira_allocate_conflict_vec (ira_object_t, int);
1054 : extern void ira_allocate_object_conflicts (ira_object_t, int);
1055 : extern void ior_hard_reg_conflicts (ira_allocno_t, const_hard_reg_set);
1056 : extern void ira_print_expanded_allocno (ira_allocno_t);
1057 : extern void ira_add_live_range_to_object (ira_object_t, int, int);
1058 : extern live_range_t ira_create_live_range (ira_object_t, int, int,
1059 : live_range_t);
1060 : extern live_range_t ira_copy_live_range_list (live_range_t);
1061 : extern live_range_t ira_merge_live_ranges (live_range_t, live_range_t);
1062 : extern bool ira_live_ranges_intersect_p (live_range_t, live_range_t);
1063 : extern void ira_finish_live_range (live_range_t);
1064 : extern void ira_finish_live_range_list (live_range_t);
1065 : extern void ira_free_allocno_updated_costs (ira_allocno_t);
1066 : extern ira_pref_t ira_create_pref (ira_allocno_t, int, int);
1067 : extern void ira_add_allocno_pref (ira_allocno_t, int, int);
1068 : extern void ira_remove_pref (ira_pref_t);
1069 : extern void ira_remove_allocno_prefs (ira_allocno_t);
1070 : extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
1071 : int, bool, rtx_insn *,
1072 : ira_loop_tree_node_t);
1073 : extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
1074 : bool, rtx_insn *,
1075 : ira_loop_tree_node_t);
1076 :
1077 : extern int *ira_allocate_cost_vector (reg_class_t);
1078 : extern void ira_free_cost_vector (int *, reg_class_t);
1079 :
1080 : extern void ira_flattening (int, int);
1081 : extern bool ira_build (void);
1082 : extern void ira_destroy (void);
1083 :
1084 : /* ira-costs.cc */
1085 : extern void ira_init_costs_once (void);
1086 : extern void ira_init_costs (void);
1087 : extern void ira_costs (void);
1088 : extern void ira_tune_allocno_costs (void);
1089 :
1090 : /* ira-lives.cc */
1091 :
1092 : extern void ira_rebuild_start_finish_chains (void);
1093 : extern void ira_print_live_range_list (FILE *, live_range_t);
1094 : extern void debug (live_range &ref);
1095 : extern void debug (live_range *ptr);
1096 : extern void ira_debug_live_range_list (live_range_t);
1097 : extern void ira_debug_allocno_live_ranges (ira_allocno_t);
1098 : extern void ira_debug_live_ranges (void);
1099 : extern void ira_create_allocno_live_ranges (void);
1100 : extern void ira_compress_allocno_live_ranges (void);
1101 : extern void ira_finish_allocno_live_ranges (void);
1102 : extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *,
1103 : alternative_mask);
1104 : extern void ira_add_dependent_filter (ira_allocno_t, int,
1105 : machine_mode, ira_allocno_t,
1106 : unsigned int, machine_mode);
1107 :
1108 : /* ira-conflicts.cc */
1109 : extern void ira_debug_conflicts (bool);
1110 : extern void ira_build_conflicts (void);
1111 :
1112 : /* ira-color.cc */
1113 : extern ira_allocno_t ira_soft_conflict (ira_allocno_t, ira_allocno_t);
1114 : extern void ira_debug_hard_regs_forest (void);
1115 : extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
1116 : extern void ira_reassign_conflict_allocnos (int);
1117 : extern void ira_initiate_assign (void);
1118 : extern void ira_finish_assign (void);
1119 : extern void ira_color (void);
1120 :
1121 : /* ira-emit.cc */
1122 : extern void ira_initiate_emit_data (void);
1123 : extern void ira_finish_emit_data (void);
1124 : extern void ira_emit (bool);
1125 :
1126 :
1127 :
1128 : /* Return true if equivalence of pseudo REGNO is not a lvalue. */
1129 : inline bool
1130 49815438 : ira_equiv_no_lvalue_p (int regno)
1131 : {
1132 49815438 : if (regno >= ira_reg_equiv_len)
1133 : return false;
1134 49815438 : return (ira_reg_equiv[regno].constant != NULL_RTX
1135 48529775 : || ira_reg_equiv[regno].invariant != NULL_RTX
1136 96356828 : || (ira_reg_equiv[regno].memory != NULL_RTX
1137 3916140 : && MEM_READONLY_P (ira_reg_equiv[regno].memory)));
1138 : }
1139 :
1140 :
1141 :
1142 : /* Initialize register costs for MODE if necessary. */
1143 : inline void
1144 1581177584 : ira_init_register_move_cost_if_necessary (machine_mode mode)
1145 : {
1146 1581177584 : if (ira_register_move_cost[mode] == NULL)
1147 10203609 : ira_init_register_move_cost (mode);
1148 1581177584 : }
1149 :
1150 :
1151 :
1152 : /* The iterator for all allocnos. */
1153 : struct ira_allocno_iterator {
1154 : /* The number of the current element in IRA_ALLOCNOS. */
1155 : int n;
1156 : };
1157 :
1158 : /* Initialize the iterator I. */
1159 : inline void
1160 33829319 : ira_allocno_iter_init (ira_allocno_iterator *i)
1161 : {
1162 33829319 : i->n = 0;
1163 33829319 : }
1164 :
1165 : /* Return TRUE if we have more allocnos to visit, in which case *A is
1166 : set to the allocno to be visited. Otherwise, return FALSE. */
1167 : inline bool
1168 890915640 : ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
1169 : {
1170 890915640 : int n;
1171 :
1172 942188982 : for (n = i->n; n < ira_allocnos_num; n++)
1173 908359663 : if (ira_allocnos[n] != NULL)
1174 : {
1175 857086321 : *a = ira_allocnos[n];
1176 857086321 : i->n = n + 1;
1177 857086321 : return true;
1178 : }
1179 : return false;
1180 : }
1181 :
1182 : /* Loop over all allocnos. In each iteration, A is set to the next
1183 : allocno. ITER is an instance of ira_allocno_iterator used to iterate
1184 : the allocnos. */
1185 : #define FOR_EACH_ALLOCNO(A, ITER) \
1186 : for (ira_allocno_iter_init (&(ITER)); \
1187 : ira_allocno_iter_cond (&(ITER), &(A));)
1188 :
1189 : /* The iterator for all objects. */
1190 : struct ira_object_iterator {
1191 : /* The number of the current element in ira_object_id_map. */
1192 : int n;
1193 : };
1194 :
1195 : /* Initialize the iterator I. */
1196 : inline void
1197 8742373 : ira_object_iter_init (ira_object_iterator *i)
1198 : {
1199 8742373 : i->n = 0;
1200 8742373 : }
1201 :
1202 : /* Return TRUE if we have more objects to visit, in which case *OBJ is
1203 : set to the object to be visited. Otherwise, return FALSE. */
1204 : inline bool
1205 220092025 : ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj)
1206 : {
1207 220092025 : int n;
1208 :
1209 234589693 : for (n = i->n; n < ira_objects_num; n++)
1210 225847320 : if (ira_object_id_map[n] != NULL)
1211 : {
1212 211349652 : *obj = ira_object_id_map[n];
1213 211349652 : i->n = n + 1;
1214 211349652 : return true;
1215 : }
1216 : return false;
1217 : }
1218 :
1219 : /* Loop over all objects. In each iteration, OBJ is set to the next
1220 : object. ITER is an instance of ira_object_iterator used to iterate
1221 : the objects. */
1222 : #define FOR_EACH_OBJECT(OBJ, ITER) \
1223 : for (ira_object_iter_init (&(ITER)); \
1224 : ira_object_iter_cond (&(ITER), &(OBJ));)
1225 :
1226 : /* The iterator for objects associated with an allocno. */
1227 : struct ira_allocno_object_iterator {
1228 : /* The number of the element the allocno's object array. */
1229 : int n;
1230 : };
1231 :
1232 : /* Initialize the iterator I. */
1233 : inline void
1234 132389383 : ira_allocno_object_iter_init (ira_allocno_object_iterator *i)
1235 : {
1236 132389383 : i->n = 0;
1237 132389383 : }
1238 :
1239 : /* Return TRUE if we have more objects to visit in allocno A, in which
1240 : case *O is set to the object to be visited. Otherwise, return
1241 : FALSE. */
1242 : inline bool
1243 485761254 : ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a,
1244 : ira_object_t *o)
1245 : {
1246 485761254 : int n = i->n++;
1247 485761254 : if (n < ALLOCNO_NUM_OBJECTS (a))
1248 : {
1249 234260385 : *o = ALLOCNO_OBJECT (a, n);
1250 229695285 : return true;
1251 : }
1252 : return false;
1253 : }
1254 :
1255 : /* Loop over all objects associated with allocno A. In each
1256 : iteration, O is set to the next object. ITER is an instance of
1257 : ira_allocno_object_iterator used to iterate the conflicts. */
1258 : #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1259 : for (ira_allocno_object_iter_init (&(ITER)); \
1260 : ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1261 :
1262 :
1263 : /* The iterator for prefs. */
1264 : struct ira_pref_iterator {
1265 : /* The number of the current element in IRA_PREFS. */
1266 : int n;
1267 : };
1268 :
1269 : /* Initialize the iterator I. */
1270 : inline void
1271 1505045 : ira_pref_iter_init (ira_pref_iterator *i)
1272 : {
1273 1505045 : i->n = 0;
1274 1505045 : }
1275 :
1276 : /* Return TRUE if we have more prefs to visit, in which case *PREF is
1277 : set to the pref to be visited. Otherwise, return FALSE. */
1278 : inline bool
1279 7909503 : ira_pref_iter_cond (ira_pref_iterator *i, ira_pref_t *pref)
1280 : {
1281 7909503 : int n;
1282 :
1283 8817291 : for (n = i->n; n < ira_prefs_num; n++)
1284 7312246 : if (ira_prefs[n] != NULL)
1285 : {
1286 6404458 : *pref = ira_prefs[n];
1287 6404458 : i->n = n + 1;
1288 6404458 : return true;
1289 : }
1290 : return false;
1291 : }
1292 :
1293 : /* Loop over all prefs. In each iteration, P is set to the next
1294 : pref. ITER is an instance of ira_pref_iterator used to iterate
1295 : the prefs. */
1296 : #define FOR_EACH_PREF(P, ITER) \
1297 : for (ira_pref_iter_init (&(ITER)); \
1298 : ira_pref_iter_cond (&(ITER), &(P));)
1299 :
1300 :
1301 : /* The iterator for copies. */
1302 : struct ira_copy_iterator {
1303 : /* The number of the current element in IRA_COPIES. */
1304 : int n;
1305 : };
1306 :
1307 : /* Initialize the iterator I. */
1308 : inline void
1309 2515552 : ira_copy_iter_init (ira_copy_iterator *i)
1310 : {
1311 2515552 : i->n = 0;
1312 2515552 : }
1313 :
1314 : /* Return TRUE if we have more copies to visit, in which case *CP is
1315 : set to the copy to be visited. Otherwise, return FALSE. */
1316 : inline bool
1317 19292944 : ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
1318 : {
1319 19292944 : int n;
1320 :
1321 19292944 : for (n = i->n; n < ira_copies_num; n++)
1322 16777392 : if (ira_copies[n] != NULL)
1323 : {
1324 16777392 : *cp = ira_copies[n];
1325 16777392 : i->n = n + 1;
1326 16777392 : return true;
1327 : }
1328 : return false;
1329 : }
1330 :
1331 : /* Loop over all copies. In each iteration, C is set to the next
1332 : copy. ITER is an instance of ira_copy_iterator used to iterate
1333 : the copies. */
1334 : #define FOR_EACH_COPY(C, ITER) \
1335 : for (ira_copy_iter_init (&(ITER)); \
1336 : ira_copy_iter_cond (&(ITER), &(C));)
1337 :
1338 : /* The iterator for object conflicts. */
1339 : struct ira_object_conflict_iterator {
1340 :
1341 : /* TRUE if the conflicts are represented by vector of allocnos. */
1342 : bool conflict_vec_p;
1343 :
1344 : /* The conflict vector or conflict bit vector. */
1345 : void *vec;
1346 :
1347 : /* The number of the current element in the vector (of type
1348 : ira_object_t or IRA_INT_TYPE). */
1349 : unsigned int word_num;
1350 :
1351 : /* The bit vector size. It is defined only if
1352 : OBJECT_CONFLICT_VEC_P is FALSE. */
1353 : unsigned int size;
1354 :
1355 : /* The current bit index of bit vector. It is defined only if
1356 : OBJECT_CONFLICT_VEC_P is FALSE. */
1357 : unsigned int bit_num;
1358 :
1359 : /* The object id corresponding to the 1st bit of the bit vector. It
1360 : is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1361 : int base_conflict_id;
1362 :
1363 : /* The word of bit vector currently visited. It is defined only if
1364 : OBJECT_CONFLICT_VEC_P is FALSE. */
1365 : unsigned IRA_INT_TYPE word;
1366 : };
1367 :
1368 : /* Initialize the iterator I with ALLOCNO conflicts. */
1369 : inline void
1370 112546766 : ira_object_conflict_iter_init (ira_object_conflict_iterator *i,
1371 : ira_object_t obj)
1372 : {
1373 112546766 : i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj);
1374 112546766 : i->vec = OBJECT_CONFLICT_ARRAY (obj);
1375 112546766 : i->word_num = 0;
1376 112546766 : if (i->conflict_vec_p)
1377 33004340 : i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1378 : else
1379 : {
1380 79542426 : if (OBJECT_MIN (obj) > OBJECT_MAX (obj))
1381 3596130 : i->size = 0;
1382 : else
1383 75946296 : i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj)
1384 : + IRA_INT_BITS)
1385 75946296 : / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1386 79542426 : i->bit_num = 0;
1387 79542426 : i->base_conflict_id = OBJECT_MIN (obj);
1388 79542426 : i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1389 : }
1390 112546766 : }
1391 :
1392 : /* Return TRUE if we have more conflicting allocnos to visit, in which
1393 : case *A is set to the allocno to be visited. Otherwise, return
1394 : FALSE. */
1395 : inline bool
1396 2633097833 : ira_object_conflict_iter_cond (ira_object_conflict_iterator *i,
1397 : ira_object_t *pobj)
1398 : {
1399 2633097833 : ira_object_t obj;
1400 :
1401 2633097833 : if (i->conflict_vec_p)
1402 : {
1403 975104574 : obj = ((ira_object_t *) i->vec)[i->word_num++];
1404 975104574 : if (obj == NULL)
1405 : return false;
1406 : }
1407 : else
1408 : {
1409 1657993259 : unsigned IRA_INT_TYPE word = i->word;
1410 1657993259 : unsigned int bit_num = i->bit_num;
1411 :
1412 : /* Skip words that are zeros. */
1413 1943310607 : for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1414 : {
1415 363861380 : i->word_num++;
1416 :
1417 : /* If we have reached the end, break. */
1418 363861380 : if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1419 : return false;
1420 :
1421 285317348 : bit_num = i->word_num * IRA_INT_BITS;
1422 : }
1423 :
1424 : /* Skip bits that are zero. */
1425 1579449227 : int off = ctz_hwi (word);
1426 1579449227 : bit_num += off;
1427 1579449227 : word >>= off;
1428 :
1429 1579449227 : obj = ira_object_id_map[bit_num + i->base_conflict_id];
1430 1579449227 : i->bit_num = bit_num + 1;
1431 1579449227 : i->word = word >> 1;
1432 : }
1433 :
1434 2522249639 : *pobj = obj;
1435 2522249639 : return true;
1436 : }
1437 :
1438 : /* Loop over all objects conflicting with OBJ. In each iteration,
1439 : CONF is set to the next conflicting object. ITER is an instance
1440 : of ira_object_conflict_iterator used to iterate the conflicts. */
1441 : #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1442 : for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1443 : ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1444 :
1445 :
1446 :
1447 : /* The function returns TRUE if at least one hard register from ones
1448 : starting with HARD_REGNO and containing value of MODE are in set
1449 : HARD_REGSET. */
1450 : inline bool
1451 218012183 : ira_hard_reg_set_intersection_p (int hard_regno, machine_mode mode,
1452 : HARD_REG_SET hard_regset)
1453 : {
1454 218012183 : int i;
1455 :
1456 218012183 : gcc_assert (hard_regno >= 0);
1457 313240151 : for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
1458 230829060 : if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1459 : return true;
1460 : return false;
1461 : }
1462 :
1463 : /* The function returns TRUE if hard registers starting with
1464 : HARD_REGNO and containing value of MODE are fully in set
1465 : HARD_REGSET. */
1466 : inline bool
1467 56633995 : ira_hard_reg_in_set_p (int hard_regno, machine_mode mode,
1468 : HARD_REG_SET hard_regset)
1469 : {
1470 56633995 : int i;
1471 :
1472 56633995 : ira_assert (hard_regno >= 0);
1473 113458506 : for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
1474 57869337 : if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1475 : return false;
1476 : return true;
1477 : }
1478 :
1479 :
1480 :
1481 : /* To save memory we use a lazy approach for allocation and
1482 : initialization of the cost vectors. We do this only when it is
1483 : really necessary. */
1484 :
1485 : /* Allocate cost vector *VEC for hard registers of ACLASS and
1486 : initialize the elements by VAL if it is necessary */
1487 : inline void
1488 8779904 : ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
1489 : {
1490 8779904 : int i, *reg_costs;
1491 8779904 : int len;
1492 :
1493 8779904 : if (*vec != NULL)
1494 : return;
1495 5050789 : *vec = reg_costs = ira_allocate_cost_vector (aclass);
1496 5050789 : len = ira_class_hard_regs_num[(int) aclass];
1497 85005917 : for (i = 0; i < len; i++)
1498 79955128 : reg_costs[i] = val;
1499 : }
1500 :
1501 : /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1502 : values of vector SRC into the vector if it is necessary */
1503 : inline void
1504 199663600 : ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src)
1505 : {
1506 199663600 : int len;
1507 :
1508 199663600 : if (*vec != NULL || src == NULL)
1509 : return;
1510 8081715 : *vec = ira_allocate_cost_vector (aclass);
1511 8081715 : len = ira_class_hard_regs_num[aclass];
1512 8081715 : memcpy (*vec, src, sizeof (int) * len);
1513 : }
1514 :
1515 : /* Allocate cost vector *VEC for hard registers of ACLASS and add
1516 : values of vector SRC into the vector if it is necessary */
1517 : inline void
1518 7937078 : ira_allocate_and_accumulate_costs (int **vec, enum reg_class aclass, int *src)
1519 : {
1520 7937078 : int i, len;
1521 :
1522 7937078 : if (src == NULL)
1523 : return;
1524 162899 : len = ira_class_hard_regs_num[aclass];
1525 162899 : if (*vec == NULL)
1526 : {
1527 40392 : *vec = ira_allocate_cost_vector (aclass);
1528 40392 : memset (*vec, 0, sizeof (int) * len);
1529 : }
1530 3825727 : for (i = 0; i < len; i++)
1531 3662828 : (*vec)[i] += src[i];
1532 : }
1533 :
1534 : /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1535 : values of vector SRC into the vector or initialize it by VAL (if
1536 : SRC is null). */
1537 : inline void
1538 27549114 : ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class aclass,
1539 : int val, int *src)
1540 : {
1541 27549114 : int i, *reg_costs;
1542 27549114 : int len;
1543 :
1544 27549114 : if (*vec != NULL)
1545 : return;
1546 13582182 : *vec = reg_costs = ira_allocate_cost_vector (aclass);
1547 13582182 : len = ira_class_hard_regs_num[aclass];
1548 13582182 : if (src != NULL)
1549 2388965 : memcpy (reg_costs, src, sizeof (int) * len);
1550 : else
1551 : {
1552 174804423 : for (i = 0; i < len; i++)
1553 163611206 : reg_costs[i] = val;
1554 : }
1555 : }
1556 :
1557 : extern rtx ira_create_new_reg (rtx);
1558 : extern int first_moveable_pseudo, last_moveable_pseudo;
1559 :
1560 : /* Return the set of registers that would need a caller save if allocno A
1561 : overlapped them. */
1562 :
1563 : inline HARD_REG_SET
1564 4663240 : ira_need_caller_save_regs (ira_allocno_t a)
1565 : {
1566 4663240 : return call_clobbers_in_region (ALLOCNO_CROSSED_CALLS_ABIS (a),
1567 4663240 : ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a),
1568 4663240 : ALLOCNO_MODE (a));
1569 : }
1570 :
1571 : /* Return true if we would need to save allocno A around a call if we
1572 : assigned hard register REGNO. */
1573 :
1574 : inline bool
1575 279977204 : ira_need_caller_save_p (ira_allocno_t a, unsigned int regno)
1576 : {
1577 279977204 : if (ALLOCNO_CALLS_CROSSED_NUM (a) == 0)
1578 : return false;
1579 55507337 : return call_clobbered_in_region_p (ALLOCNO_CROSSED_CALLS_ABIS (a),
1580 55507337 : ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a),
1581 55507337 : ALLOCNO_MODE (a), regno);
1582 : }
1583 :
1584 : /* Represents the boundary between an allocno in one loop and its parent
1585 : allocno in the enclosing loop. It is usually possible to change a
1586 : register's allocation on this boundary; the class provides routines
1587 : for calculating the cost of such changes. */
1588 : class ira_loop_border_costs
1589 : {
1590 : public:
1591 : ira_loop_border_costs (ira_allocno_t);
1592 :
1593 : int move_between_loops_cost () const;
1594 : int spill_outside_loop_cost () const;
1595 : int spill_inside_loop_cost () const;
1596 :
1597 : private:
1598 : /* The mode and class of the child allocno. */
1599 : machine_mode m_mode;
1600 : reg_class m_class;
1601 :
1602 : /* Sums the frequencies of the entry edges and the exit edges. */
1603 : int m_entry_freq, m_exit_freq;
1604 : };
1605 :
1606 : /* Return the cost of storing the register on entry to the loop and
1607 : loading it back on exit from the loop. This is the cost to use if
1608 : the register is spilled within the loop but is successfully allocated
1609 : in the parent loop. */
1610 : inline int
1611 10489059 : ira_loop_border_costs::spill_inside_loop_cost () const
1612 : {
1613 10489059 : return (m_entry_freq * ira_memory_move_cost[m_mode][m_class][0]
1614 10489059 : + m_exit_freq * ira_memory_move_cost[m_mode][m_class][1]);
1615 : }
1616 :
1617 : /* Return the cost of loading the register on entry to the loop and
1618 : storing it back on exit from the loop. This is the cost to use if
1619 : the register is successfully allocated within the loop but is spilled
1620 : in the parent loop. */
1621 : inline int
1622 2318729 : ira_loop_border_costs::spill_outside_loop_cost () const
1623 : {
1624 2318729 : return (m_entry_freq * ira_memory_move_cost[m_mode][m_class][1]
1625 2318729 : + m_exit_freq * ira_memory_move_cost[m_mode][m_class][0]);
1626 : }
1627 :
1628 : /* Return the cost of moving the pseudo register between different hard
1629 : registers on entry and exit from the loop. This is the cost to use
1630 : if the register is successfully allocated within both this loop and
1631 : the parent loop, but the allocations for the loops differ. */
1632 : inline int
1633 1889051 : ira_loop_border_costs::move_between_loops_cost () const
1634 : {
1635 1889051 : ira_init_register_move_cost_if_necessary (m_mode);
1636 1889051 : auto move_cost = ira_register_move_cost[m_mode][m_class][m_class];
1637 1889051 : return move_cost * (m_entry_freq + m_exit_freq);
1638 : }
1639 :
1640 : /* Return true if subloops that contain allocnos for A's register can
1641 : use a different assignment from A. ALLOCATED_P is true for the case
1642 : in which allocation succeeded for A. EXCLUDE_OLD_RELOAD is true if
1643 : we should always return false for non-LRA targets. (This is a hack
1644 : and should be removed along with old reload.) */
1645 : inline bool
1646 30770063 : ira_subloop_allocnos_can_differ_p (ira_allocno_t a, bool allocated_p = true,
1647 : bool exclude_old_reload = true)
1648 : {
1649 30770063 : if (exclude_old_reload && !ira_use_lra_p)
1650 : return false;
1651 :
1652 30770063 : auto regno = ALLOCNO_REGNO (a);
1653 :
1654 30770063 : if (pic_offset_table_rtx != NULL
1655 30770063 : && regno == (int) REGNO (pic_offset_table_rtx))
1656 : return false;
1657 :
1658 30669221 : ira_assert (regno < ira_reg_equiv_len);
1659 30669221 : if (ira_equiv_no_lvalue_p (regno))
1660 : return false;
1661 :
1662 : /* Avoid overlapping multi-registers. Moves between them might result
1663 : in wrong code generation. */
1664 28566377 : if (allocated_p)
1665 : {
1666 27048667 : auto pclass = ira_pressure_class_translate[ALLOCNO_CLASS (a)];
1667 27048667 : if (ira_reg_class_max_nregs[pclass][ALLOCNO_MODE (a)] > 1)
1668 275795 : return false;
1669 : }
1670 :
1671 : return true;
1672 : }
1673 :
1674 : /* Return true if we should treat A and SUBLOOP_A as belonging to a
1675 : single region. */
1676 : inline bool
1677 6759899 : ira_single_region_allocno_p (ira_allocno_t a, ira_allocno_t subloop_a)
1678 : {
1679 6759899 : if (flag_ira_region != IRA_REGION_MIXED)
1680 : return false;
1681 :
1682 6759899 : if (ALLOCNO_MIGHT_CONFLICT_WITH_PARENT_P (subloop_a))
1683 : return false;
1684 :
1685 6202638 : auto rclass = ALLOCNO_CLASS (a);
1686 6202638 : auto pclass = ira_pressure_class_translate[rclass];
1687 6202638 : auto loop_used_regs = ALLOCNO_LOOP_TREE_NODE (a)->reg_pressure[pclass];
1688 6202638 : return loop_used_regs <= ira_class_hard_regs_num[pclass];
1689 : }
1690 :
1691 : /* Return the set of all hard registers that conflict with A. */
1692 : inline HARD_REG_SET
1693 6789782 : ira_total_conflict_hard_regs (ira_allocno_t a)
1694 : {
1695 6789782 : auto obj_0 = ALLOCNO_OBJECT (a, 0);
1696 6789782 : HARD_REG_SET conflicts = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj_0);
1697 6923354 : for (int i = 1; i < ALLOCNO_NUM_OBJECTS (a); i++)
1698 267144 : conflicts |= OBJECT_TOTAL_CONFLICT_HARD_REGS (ALLOCNO_OBJECT (a, i));
1699 6789782 : return conflicts;
1700 : }
1701 :
1702 : /* Return the cost of saving a caller-saved register before each call
1703 : in A's live range and restoring the same register after each call. */
1704 : inline int
1705 24867525 : ira_caller_save_cost (ira_allocno_t a)
1706 : {
1707 24867525 : auto mode = ALLOCNO_MODE (a);
1708 24867525 : auto rclass = ALLOCNO_CLASS (a);
1709 24867525 : return (ALLOCNO_CALL_FREQ (a)
1710 24867525 : * (ira_memory_move_cost[mode][rclass][0]
1711 24867525 : + ira_memory_move_cost[mode][rclass][1]));
1712 : }
1713 :
1714 : /* A and SUBLOOP_A are allocnos for the same pseudo register, with A's
1715 : loop immediately enclosing SUBLOOP_A's loop. If we allocate to A a
1716 : hard register R that is clobbered by a call in SUBLOOP_A, decide
1717 : which of the following approaches should be used for handling the
1718 : conflict:
1719 :
1720 : (1) Spill R on entry to SUBLOOP_A's loop, assign memory to SUBLOOP_A,
1721 : and restore R on exit from SUBLOOP_A's loop.
1722 :
1723 : (2) Spill R before each necessary call in SUBLOOP_A's live range and
1724 : restore R after each such call.
1725 :
1726 : Return true if (1) is better than (2). SPILL_COST is the cost of
1727 : doing (1). */
1728 : inline bool
1729 6246663 : ira_caller_save_loop_spill_p (ira_allocno_t a, ira_allocno_t subloop_a,
1730 : int spill_cost)
1731 : {
1732 6246663 : if (!ira_subloop_allocnos_can_differ_p (a))
1733 : return false;
1734 :
1735 : /* Calculate the cost of saving a call-clobbered register
1736 : before each call and restoring it afterwards. */
1737 5333148 : int call_cost = ira_caller_save_cost (subloop_a);
1738 5333148 : return call_cost && call_cost >= spill_cost;
1739 : }
1740 :
1741 : /* True if X is a constant that can be forced into the constant pool.
1742 : MODE is the mode of the operand, or VOIDmode if not known. */
1743 : #define CONST_POOL_OK_P(MODE, X) \
1744 : ((MODE) != VOIDmode \
1745 : && CONSTANT_P (X) \
1746 : && GET_CODE (X) != HIGH \
1747 : && GET_MODE_SIZE (MODE).is_constant () \
1748 : && !targetm.cannot_force_const_mem (MODE, X))
1749 :
1750 : #endif /* GCC_IRA_INT_H */
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