Line data Source code
1 : /* Integrated Register Allocator (IRA) intercommunication header file.
2 : Copyright (C) 2006-2026 Free Software Foundation, Inc.
3 : Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4 :
5 : This file is part of GCC.
6 :
7 : GCC is free software; you can redistribute it and/or modify it under
8 : the terms of the GNU General Public License as published by the Free
9 : Software Foundation; either version 3, or (at your option) any later
10 : version.
11 :
12 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 : for more details.
16 :
17 : You should have received a copy of the GNU General Public License
18 : along with GCC; see the file COPYING3. If not see
19 : <http://www.gnu.org/licenses/>. */
20 :
21 : #ifndef GCC_IRA_INT_H
22 : #define GCC_IRA_INT_H
23 :
24 : #include "recog.h"
25 : #include "function-abi.h"
26 :
27 : /* To provide consistency in naming, all IRA external variables,
28 : functions, common typedefs start with prefix ira_. */
29 :
30 : #if CHECKING_P
31 : #define ENABLE_IRA_CHECKING
32 : #endif
33 :
34 : #ifdef ENABLE_IRA_CHECKING
35 : #define ira_assert(c) gcc_assert (c)
36 : #else
37 : /* Always define and include C, so that warnings for empty body in an
38 : 'if' statement and unused variable do not occur. */
39 : #define ira_assert(c) ((void)(0 && (c)))
40 : #endif
41 :
42 : /* Compute register frequency from edge frequency FREQ. It is
43 : analogous to REG_FREQ_FROM_BB. When optimizing for size, or
44 : profile driven feedback is available and the function is never
45 : executed, frequency is always equivalent. Otherwise rescale the
46 : edge frequency. */
47 : #define REG_FREQ_FROM_EDGE_FREQ(freq) \
48 : (optimize_function_for_size_p (cfun) \
49 : ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
50 : ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
51 :
52 : /* A modified value of flag `-fira-verbose' used internally. */
53 : extern int internal_flag_ira_verbose;
54 :
55 : /* Dump file of the allocator if it is not NULL. */
56 : extern FILE *ira_dump_file;
57 :
58 : /* Typedefs for pointers to allocno live range, allocno, and copy of
59 : allocnos. */
60 : typedef struct live_range *live_range_t;
61 : typedef struct ira_allocno *ira_allocno_t;
62 : typedef struct ira_allocno_pref *ira_pref_t;
63 : typedef struct ira_allocno_copy *ira_copy_t;
64 : typedef struct ira_object *ira_object_t;
65 :
66 : /* Definition of vector of allocnos and copies. */
67 :
68 : /* Typedef for pointer to the subsequent structure. */
69 : typedef struct ira_loop_tree_node *ira_loop_tree_node_t;
70 :
71 : typedef unsigned short move_table[N_REG_CLASSES];
72 :
73 : /* In general case, IRA is a regional allocator. The regions are
74 : nested and form a tree. Currently regions are natural loops. The
75 : following structure describes loop tree node (representing basic
76 : block or loop). We need such tree because the loop tree from
77 : cfgloop.h is not convenient for the optimization: basic blocks are
78 : not a part of the tree from cfgloop.h. We also use the nodes for
79 : storing additional information about basic blocks/loops for the
80 : register allocation purposes. */
81 : struct ira_loop_tree_node
82 : {
83 : /* The node represents basic block if children == NULL. */
84 : basic_block bb; /* NULL for loop. */
85 : /* NULL for BB or for loop tree root if we did not build CFG loop tree. */
86 : class loop *loop;
87 : /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
88 : SUBLOOP_NEXT is always NULL for BBs. */
89 : ira_loop_tree_node_t subloop_next, next;
90 : /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
91 : the node. They are NULL for BBs. */
92 : ira_loop_tree_node_t subloops, children;
93 : /* The node immediately containing given node. */
94 : ira_loop_tree_node_t parent;
95 :
96 : /* Loop level in range [0, ira_loop_tree_height). */
97 : int level;
98 :
99 : /* All the following members are defined only for nodes representing
100 : loops. */
101 :
102 : /* The loop number from CFG loop tree. The root number is 0. */
103 : int loop_num;
104 :
105 : /* True if the loop was marked for removal from the register
106 : allocation. */
107 : bool to_remove_p;
108 :
109 : /* Allocnos in the loop corresponding to their regnos. If it is
110 : NULL the loop does not form a separate register allocation region
111 : (e.g. because it has abnormal enter/exit edges and we cannot put
112 : code for register shuffling on the edges if a different
113 : allocation is used for a pseudo-register on different sides of
114 : the edges). Caps are not in the map (remember we can have more
115 : one cap with the same regno in a region). */
116 : ira_allocno_t *regno_allocno_map;
117 :
118 : /* True if there is an entry to given loop not from its parent (or
119 : grandparent) basic block. For example, it is possible for two
120 : adjacent loops inside another loop. */
121 : bool entered_from_non_parent_p;
122 :
123 : /* Maximal register pressure inside loop for given register class
124 : (defined only for the pressure classes). */
125 : int reg_pressure[N_REG_CLASSES];
126 :
127 : /* Numbers of allocnos referred or living in the loop node (except
128 : for its subloops). */
129 : bitmap all_allocnos;
130 :
131 : /* Numbers of allocnos living at the loop borders. */
132 : bitmap border_allocnos;
133 :
134 : /* Regnos of pseudos modified in the loop node (including its
135 : subloops). */
136 : bitmap modified_regnos;
137 :
138 : /* Numbers of copies referred in the corresponding loop. */
139 : bitmap local_copies;
140 : };
141 :
142 : /* The root of the loop tree corresponding to the all function. */
143 : extern ira_loop_tree_node_t ira_loop_tree_root;
144 :
145 : /* Height of the loop tree. */
146 : extern int ira_loop_tree_height;
147 :
148 : /* All nodes representing basic blocks are referred through the
149 : following array. We cannot use basic block member `aux' for this
150 : because it is used for insertion of insns on edges. */
151 : extern ira_loop_tree_node_t ira_bb_nodes;
152 :
153 : /* Two access macros to the nodes representing basic blocks. */
154 : #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
155 : #define IRA_BB_NODE_BY_INDEX(index) __extension__ \
156 : (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
157 : if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
158 : { \
159 : fprintf (stderr, \
160 : "\n%s: %d: error in %s: it is not a block node\n", \
161 : __FILE__, __LINE__, __FUNCTION__); \
162 : gcc_unreachable (); \
163 : } \
164 : _node; }))
165 : #else
166 : #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
167 : #endif
168 :
169 : #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
170 :
171 : /* All nodes representing loops are referred through the following
172 : array. */
173 : extern ira_loop_tree_node_t ira_loop_nodes;
174 :
175 : /* Two access macros to the nodes representing loops. */
176 : #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
177 : #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
178 : (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \
179 : if (_node->children == NULL || _node->bb != NULL \
180 : || (_node->loop == NULL && current_loops != NULL)) \
181 : { \
182 : fprintf (stderr, \
183 : "\n%s: %d: error in %s: it is not a loop node\n", \
184 : __FILE__, __LINE__, __FUNCTION__); \
185 : gcc_unreachable (); \
186 : } \
187 : _node; }))
188 : #else
189 : #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
190 : #endif
191 :
192 : #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
193 :
194 :
195 : /* The structure describes program points where a given allocno lives.
196 : If the live ranges of two allocnos are intersected, the allocnos
197 : are in conflict. */
198 : struct live_range
199 : {
200 : /* Object whose live range is described by given structure. */
201 : ira_object_t object;
202 : /* Program point range. */
203 : int start, finish;
204 : /* Next structure describing program points where the allocno
205 : lives. */
206 : live_range_t next;
207 : /* Pointer to structures with the same start/finish. */
208 : live_range_t start_next, finish_next;
209 : };
210 :
211 : /* Program points are enumerated by numbers from range
212 : 0..IRA_MAX_POINT-1. There are approximately two times more program
213 : points than insns. Program points are places in the program where
214 : liveness info can be changed. In most general case (there are more
215 : complicated cases too) some program points correspond to places
216 : where input operand dies and other ones correspond to places where
217 : output operands are born. */
218 : extern int ira_max_point;
219 :
220 : /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
221 : live ranges with given start/finish point. */
222 : extern live_range_t *ira_start_point_ranges, *ira_finish_point_ranges;
223 :
224 : /* A structure representing conflict information for an allocno
225 : (or one of its subwords). */
226 : struct ira_object
227 : {
228 : /* The allocno associated with this record. */
229 : ira_allocno_t allocno;
230 : /* Vector of accumulated conflicting conflict_redords with NULL end
231 : marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
232 : otherwise. */
233 : void *conflicts_array;
234 : /* Pointer to structures describing at what program point the
235 : object lives. We always maintain the list in such way that *the
236 : ranges in the list are not intersected and ordered by decreasing
237 : their program points*. */
238 : live_range_t live_ranges;
239 : /* The subword within ALLOCNO which is represented by this object.
240 : Zero means the lowest-order subword (or the entire allocno in case
241 : it is not being tracked in subwords). */
242 : int subword;
243 : /* Allocated size of the conflicts array. */
244 : unsigned int conflicts_array_size;
245 : /* A unique number for every instance of this structure, which is used
246 : to represent it in conflict bit vectors. */
247 : int id;
248 : /* Before building conflicts, MIN and MAX are initialized to
249 : correspondingly minimal and maximal points of the accumulated
250 : live ranges. Afterwards, they hold the minimal and maximal ids
251 : of other ira_objects that this one can conflict with. */
252 : int min, max;
253 : /* Initial and accumulated hard registers conflicting with this
254 : object and as a consequences cannot be assigned to the allocno.
255 : All non-allocatable hard regs and hard regs of register classes
256 : different from given allocno one are included in the sets. */
257 : HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs;
258 : /* Number of accumulated conflicts in the vector of conflicting
259 : objects. */
260 : int num_accumulated_conflicts;
261 : /* TRUE if conflicts are represented by a vector of pointers to
262 : ira_object structures. Otherwise, we use a bit vector indexed
263 : by conflict ID numbers. */
264 : unsigned int conflict_vec_p : 1;
265 : };
266 :
267 : /* A structure representing an allocno (allocation entity). Allocno
268 : represents a pseudo-register in an allocation region. If
269 : pseudo-register does not live in a region but it lives in the
270 : nested regions, it is represented in the region by special allocno
271 : called *cap*. There may be more one cap representing the same
272 : pseudo-register in region. It means that the corresponding
273 : pseudo-register lives in more one non-intersected subregion. */
274 : struct ira_allocno
275 : {
276 : /* The allocno order number starting with 0. Each allocno has an
277 : unique number and the number is never changed for the
278 : allocno. */
279 : int num;
280 : /* Regno for allocno or cap. */
281 : int regno;
282 : /* Mode of the allocno which is the mode of the corresponding
283 : pseudo-register. */
284 : ENUM_BITFIELD (machine_mode) mode : MACHINE_MODE_BITSIZE;
285 : /* Widest mode of the allocno which in at least one case could be
286 : for paradoxical subregs where wmode > mode. */
287 : ENUM_BITFIELD (machine_mode) wmode : MACHINE_MODE_BITSIZE;
288 : /* Register class which should be used for allocation for given
289 : allocno. NO_REGS means that we should use memory. */
290 : ENUM_BITFIELD (reg_class) aclass : 16;
291 : /* Hard register assigned to given allocno. Negative value means
292 : that memory was allocated to the allocno. During the reload,
293 : spilled allocno has value equal to the corresponding stack slot
294 : number (0, ...) - 2. Value -1 is used for allocnos spilled by the
295 : reload (at this point pseudo-register has only one allocno) which
296 : did not get stack slot yet. */
297 : signed int hard_regno : 16;
298 : /* A bitmask of the ABIs used by calls that occur while the allocno
299 : is live. */
300 : unsigned int crossed_calls_abis : NUM_ABI_IDS;
301 : /* During the reload, value TRUE means that we should not reassign a
302 : hard register to the allocno got memory earlier. It is set up
303 : when we removed memory-memory move insn before each iteration of
304 : the reload. */
305 : unsigned int dont_reassign_p : 1;
306 : #ifdef STACK_REGS
307 : /* Set to TRUE if allocno can't be assigned to the stack hard
308 : register correspondingly in this region and area including the
309 : region and all its subregions recursively. */
310 : unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
311 : #endif
312 : /* TRUE value means that there is no sense to spill the allocno
313 : during coloring because the spill will result in additional
314 : reloads in reload pass. */
315 : unsigned int bad_spill_p : 1;
316 : /* TRUE if a hard register or memory has been assigned to the
317 : allocno. */
318 : unsigned int assigned_p : 1;
319 : /* TRUE if conflicts for given allocno are represented by vector of
320 : pointers to the conflicting allocnos. Otherwise, we use a bit
321 : vector where a bit with given index represents allocno with the
322 : same number. */
323 : unsigned int conflict_vec_p : 1;
324 : /* True if the parent loop has an allocno for the same register and
325 : if the parent allocno's assignment might not be valid in this loop.
326 : This means that we cannot merge this allocno and the parent allocno
327 : together.
328 :
329 : This is only ever true for non-cap allocnos. */
330 : unsigned int might_conflict_with_parent_p : 1;
331 : #ifndef NUM_REGISTER_FILTERS
332 : #error "insn-config.h not included"
333 : #elif NUM_REGISTER_FILTERS
334 : /* The set of register filters applied to the allocno by operand
335 : alternatives that accept class ACLASS. */
336 : unsigned int register_filters : NUM_REGISTER_FILTERS;
337 : #endif
338 : /* Accumulated usage references of the allocno. Here and below,
339 : word 'accumulated' means info for given region and all nested
340 : subregions. In this case, 'accumulated' means sum of references
341 : of the corresponding pseudo-register in this region and in all
342 : nested subregions recursively. */
343 : int nrefs;
344 : /* Accumulated frequency of usage of the allocno. */
345 : int freq;
346 : /* Minimal accumulated and updated costs of usage register of the
347 : allocno class. */
348 : int class_cost, updated_class_cost;
349 : /* Minimal accumulated, and updated costs of memory for the allocno.
350 : At the allocation start, the original and updated costs are
351 : equal. The updated cost may be changed after finishing
352 : allocation in a region and starting allocation in a subregion.
353 : The change reflects the cost of spill/restore code on the
354 : subregion border if we assign memory to the pseudo in the
355 : subregion. */
356 : int memory_cost, updated_memory_cost;
357 : /* Accumulated number of points where the allocno lives and there is
358 : excess pressure for its class. Excess pressure for a register
359 : class at some point means that there are more allocnos of given
360 : register class living at the point than number of hard-registers
361 : of the class available for the allocation. */
362 : int excess_pressure_points_num;
363 : /* The number of objects tracked in the following array. */
364 : int num_objects;
365 : /* Accumulated frequency of calls which given allocno
366 : intersects. */
367 : int call_freq;
368 : /* Accumulated number of the intersected calls. */
369 : int calls_crossed_num;
370 : /* The number of calls across which it is live, but which should not
371 : affect register preferences. */
372 : int cheap_calls_crossed_num;
373 : /* Allocnos with the same regno are linked by the following member.
374 : Allocnos corresponding to inner loops are first in the list (it
375 : corresponds to depth-first traverse of the loops). */
376 : ira_allocno_t next_regno_allocno;
377 : /* There may be different allocnos with the same regno in different
378 : regions. Allocnos are bound to the corresponding loop tree node.
379 : Pseudo-register may have only one regular allocno with given loop
380 : tree node but more than one cap (see comments above). */
381 : ira_loop_tree_node_t loop_tree_node;
382 : /* Allocno hard reg preferences. */
383 : ira_pref_t allocno_prefs;
384 : /* Copies to other non-conflicting allocnos. The copies can
385 : represent move insn or potential move insn usually because of two
386 : operand insn constraints. */
387 : ira_copy_t allocno_copies;
388 : /* It is a allocno (cap) representing given allocno on upper loop tree
389 : level. */
390 : ira_allocno_t cap;
391 : /* It is a link to allocno (cap) on lower loop level represented by
392 : given cap. Null if given allocno is not a cap. */
393 : ira_allocno_t cap_member;
394 : /* An array of structures describing conflict information and live
395 : ranges for each object associated with the allocno. There may be
396 : more than one such object in cases where the allocno represents a
397 : multi-word register. */
398 : ira_object_t objects[2];
399 : /* Registers clobbered by intersected calls. */
400 : HARD_REG_SET crossed_calls_clobbered_regs;
401 : /* Array of usage costs (accumulated and the one updated during
402 : coloring) for each hard register of the allocno class. The
403 : member value can be NULL if all costs are the same and equal to
404 : CLASS_COST. For example, the costs of two different hard
405 : registers can be different if one hard register is callee-saved
406 : and another one is callee-used and the allocno lives through
407 : calls. Another example can be case when for some insn the
408 : corresponding pseudo-register value should be put in specific
409 : register class (e.g. AREG for x86) which is a strict subset of
410 : the allocno class (GENERAL_REGS for x86). We have updated costs
411 : to reflect the situation when the usage cost of a hard register
412 : is decreased because the allocno is connected to another allocno
413 : by a copy and the another allocno has been assigned to the hard
414 : register. */
415 : int *hard_reg_costs, *updated_hard_reg_costs;
416 : /* Array of decreasing costs (accumulated and the one updated during
417 : coloring) for allocnos conflicting with given allocno for hard
418 : regno of the allocno class. The member value can be NULL if all
419 : costs are the same. These costs are used to reflect preferences
420 : of other allocnos not assigned yet during assigning to given
421 : allocno. */
422 : int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs;
423 : /* Different additional data. It is used to decrease size of
424 : allocno data footprint. */
425 : void *add_data;
426 : };
427 :
428 :
429 : /* All members of the allocno structures should be accessed only
430 : through the following macros. */
431 : #define ALLOCNO_NUM(A) ((A)->num)
432 : #define ALLOCNO_REGNO(A) ((A)->regno)
433 : #define ALLOCNO_REG(A) ((A)->reg)
434 : #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
435 : #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
436 : #define ALLOCNO_CAP(A) ((A)->cap)
437 : #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
438 : #define ALLOCNO_NREFS(A) ((A)->nrefs)
439 : #define ALLOCNO_FREQ(A) ((A)->freq)
440 : #define ALLOCNO_MIGHT_CONFLICT_WITH_PARENT_P(A) \
441 : ((A)->might_conflict_with_parent_p)
442 : #if NUM_REGISTER_FILTERS
443 : #define ALLOCNO_REGISTER_FILTERS(A) (A)->register_filters
444 : #define ALLOCNO_SET_REGISTER_FILTERS(A, X) ((A)->register_filters = (X))
445 : #else
446 : #define ALLOCNO_REGISTER_FILTERS(A) 0
447 : #define ALLOCNO_SET_REGISTER_FILTERS(A, X) ((void) (A), gcc_assert ((X) == 0))
448 : #endif
449 : #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
450 : #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
451 : #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
452 : #define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num)
453 : #define ALLOCNO_CROSSED_CALLS_ABIS(A) ((A)->crossed_calls_abis)
454 : #define ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS(A) \
455 : ((A)->crossed_calls_clobbered_regs)
456 : #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
457 : #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
458 : #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
459 : #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
460 : #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
461 : #ifdef STACK_REGS
462 : #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
463 : #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
464 : #endif
465 : #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
466 : #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
467 : #define ALLOCNO_MODE(A) ((A)->mode)
468 : #define ALLOCNO_WMODE(A) ((A)->wmode)
469 : #define ALLOCNO_PREFS(A) ((A)->allocno_prefs)
470 : #define ALLOCNO_COPIES(A) ((A)->allocno_copies)
471 : #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
472 : #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
473 : #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
474 : ((A)->conflict_hard_reg_costs)
475 : #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
476 : ((A)->updated_conflict_hard_reg_costs)
477 : #define ALLOCNO_CLASS(A) ((A)->aclass)
478 : #define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
479 : #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
480 : #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
481 : #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
482 : #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
483 : ((A)->excess_pressure_points_num)
484 : #define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
485 : #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
486 : #define ALLOCNO_ADD_DATA(A) ((A)->add_data)
487 :
488 : /* Typedef for pointer to the subsequent structure. */
489 : typedef struct ira_emit_data *ira_emit_data_t;
490 :
491 : /* Allocno bound data used for emit pseudo live range split insns and
492 : to flattening IR. */
493 : struct ira_emit_data
494 : {
495 : /* TRUE if the allocno assigned to memory was a destination of
496 : removed move (see ira-emit.cc) at loop exit because the value of
497 : the corresponding pseudo-register is not changed inside the
498 : loop. */
499 : unsigned int mem_optimized_dest_p : 1;
500 : /* TRUE if the corresponding pseudo-register has disjoint live
501 : ranges and the other allocnos of the pseudo-register except this
502 : one changed REG. */
503 : unsigned int somewhere_renamed_p : 1;
504 : /* TRUE if allocno with the same REGNO in a subregion has been
505 : renamed, in other words, got a new pseudo-register. */
506 : unsigned int child_renamed_p : 1;
507 : /* Final rtx representation of the allocno. */
508 : rtx reg;
509 : /* Non NULL if we remove restoring value from given allocno to
510 : MEM_OPTIMIZED_DEST at loop exit (see ira-emit.cc) because the
511 : allocno value is not changed inside the loop. */
512 : ira_allocno_t mem_optimized_dest;
513 : };
514 :
515 : #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
516 :
517 : /* Data used to emit live range split insns and to flattening IR. */
518 : extern ira_emit_data_t ira_allocno_emit_data;
519 :
520 : /* Abbreviation for frequent emit data access. */
521 : inline rtx
522 36309087 : allocno_emit_reg (ira_allocno_t a)
523 : {
524 35145528 : return ALLOCNO_EMIT_DATA (a)->reg;
525 : }
526 :
527 : #define OBJECT_ALLOCNO(O) ((O)->allocno)
528 : #define OBJECT_SUBWORD(O) ((O)->subword)
529 : #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
530 : #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
531 : #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
532 : #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
533 : #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
534 : #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
535 : #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
536 : #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
537 : #define OBJECT_MIN(O) ((O)->min)
538 : #define OBJECT_MAX(O) ((O)->max)
539 : #define OBJECT_CONFLICT_ID(O) ((O)->id)
540 : #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
541 :
542 : /* Map regno -> allocnos with given regno (see comments for
543 : allocno member `next_regno_allocno'). */
544 : extern ira_allocno_t *ira_regno_allocno_map;
545 :
546 : /* Array of references to all allocnos. The order number of the
547 : allocno corresponds to the index in the array. Removed allocnos
548 : have NULL element value. */
549 : extern ira_allocno_t *ira_allocnos;
550 :
551 : /* The size of the previous array. */
552 : extern int ira_allocnos_num;
553 :
554 : /* Map a conflict id to its corresponding ira_object structure. */
555 : extern ira_object_t *ira_object_id_map;
556 :
557 : /* The size of the previous array. */
558 : extern int ira_objects_num;
559 :
560 : /* The following structure represents a hard register preference of
561 : allocno. The preference represent move insns or potential move
562 : insns usually because of two operand insn constraints. One move
563 : operand is a hard register. */
564 : struct ira_allocno_pref
565 : {
566 : /* The unique order number of the preference node starting with 0. */
567 : int num;
568 : /* Preferred hard register. */
569 : int hard_regno;
570 : /* Accumulated execution frequency of insns from which the
571 : preference created. */
572 : int freq;
573 : /* Given allocno. */
574 : ira_allocno_t allocno;
575 : /* All preferences with the same allocno are linked by the following
576 : member. */
577 : ira_pref_t next_pref;
578 : };
579 :
580 : /* Array of references to all allocno preferences. The order number
581 : of the preference corresponds to the index in the array. */
582 : extern ira_pref_t *ira_prefs;
583 :
584 : /* Size of the previous array. */
585 : extern int ira_prefs_num;
586 :
587 : /* The following structure represents a copy of two allocnos. The
588 : copies represent move insns or potential move insns usually because
589 : of two operand insn constraints. To remove register shuffle, we
590 : also create copies between allocno which is output of an insn and
591 : allocno becoming dead in the insn. */
592 : struct ira_allocno_copy
593 : {
594 : /* The unique order number of the copy node starting with 0. */
595 : int num;
596 : /* Allocnos connected by the copy. The first allocno should have
597 : smaller order number than the second one. */
598 : ira_allocno_t first, second;
599 : /* Execution frequency of the copy. */
600 : int freq;
601 : bool constraint_p;
602 : /* It is a move insn which is an origin of the copy. The member
603 : value for the copy representing two operand insn constraints or
604 : for the copy created to remove register shuffle is NULL. In last
605 : case the copy frequency is smaller than the corresponding insn
606 : execution frequency. */
607 : rtx_insn *insn;
608 : /* All copies with the same allocno as FIRST are linked by the two
609 : following members. */
610 : ira_copy_t prev_first_allocno_copy, next_first_allocno_copy;
611 : /* All copies with the same allocno as SECOND are linked by the two
612 : following members. */
613 : ira_copy_t prev_second_allocno_copy, next_second_allocno_copy;
614 : /* Region from which given copy is originated. */
615 : ira_loop_tree_node_t loop_tree_node;
616 : };
617 :
618 : /* Array of references to all copies. The order number of the copy
619 : corresponds to the index in the array. Removed copies have NULL
620 : element value. */
621 : extern ira_copy_t *ira_copies;
622 :
623 : /* Size of the previous array. */
624 : extern int ira_copies_num;
625 :
626 : /* The following structure describes a stack slot used for spilled
627 : pseudo-registers. */
628 : class ira_spilled_reg_stack_slot
629 : {
630 : public:
631 : /* pseudo-registers assigned to the stack slot. */
632 : bitmap_head spilled_regs;
633 : /* RTL representation of the stack slot. */
634 : rtx mem;
635 : /* Size of the stack slot. */
636 : poly_uint64 width;
637 : };
638 :
639 : /* The number of elements in the following array. */
640 : extern int ira_spilled_reg_stack_slots_num;
641 :
642 : /* The following array contains info about spilled pseudo-registers
643 : stack slots used in current function so far. */
644 : extern class ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots;
645 :
646 : /* Correspondingly overall cost of the allocation, cost of the
647 : allocnos assigned to hard-registers, cost of the allocnos assigned
648 : to memory, cost of loads, stores and register move insns generated
649 : for pseudo-register live range splitting (see ira-emit.cc). */
650 : extern int64_t ira_overall_cost;
651 : extern int64_t ira_reg_cost, ira_mem_cost;
652 : extern int64_t ira_load_cost, ira_store_cost, ira_shuffle_cost;
653 : extern int ira_move_loops_num, ira_additional_jumps_num;
654 :
655 :
656 : /* This page contains a bitset implementation called 'min/max sets' used to
657 : record conflicts in IRA.
658 : They are named min/maxs set since we keep track of a minimum and a maximum
659 : bit number for each set representing the bounds of valid elements. Otherwise,
660 : the implementation resembles sbitmaps in that we store an array of integers
661 : whose bits directly represent the members of the set. */
662 :
663 : /* The type used as elements in the array, and the number of bits in
664 : this type. */
665 :
666 : #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
667 : #define IRA_INT_TYPE HOST_WIDE_INT
668 :
669 : /* Set, clear or test bit number I in R, a bit vector of elements with
670 : minimal index and maximal index equal correspondingly to MIN and
671 : MAX. */
672 : #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
673 :
674 : #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
675 : (({ int _min = (MIN), _max = (MAX), _i = (I); \
676 : if (_i < _min || _i > _max) \
677 : { \
678 : fprintf (stderr, \
679 : "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
680 : __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
681 : gcc_unreachable (); \
682 : } \
683 : ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
684 : |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
685 :
686 :
687 : #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
688 : (({ int _min = (MIN), _max = (MAX), _i = (I); \
689 : if (_i < _min || _i > _max) \
690 : { \
691 : fprintf (stderr, \
692 : "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
693 : __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
694 : gcc_unreachable (); \
695 : } \
696 : ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
697 : &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
698 :
699 : #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
700 : (({ int _min = (MIN), _max = (MAX), _i = (I); \
701 : if (_i < _min || _i > _max) \
702 : { \
703 : fprintf (stderr, \
704 : "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
705 : __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
706 : gcc_unreachable (); \
707 : } \
708 : ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
709 : & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
710 :
711 : #else
712 :
713 : #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
714 : ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
715 : |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
716 :
717 : #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
718 : ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
719 : &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
720 :
721 : #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
722 : ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
723 : & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
724 :
725 : #endif
726 :
727 : /* The iterator for min/max sets. */
728 : struct minmax_set_iterator {
729 :
730 : /* Array containing the bit vector. */
731 : IRA_INT_TYPE *vec;
732 :
733 : /* The number of the current element in the vector. */
734 : unsigned int word_num;
735 :
736 : /* The number of bits in the bit vector. */
737 : unsigned int nel;
738 :
739 : /* The current bit index of the bit vector. */
740 : unsigned int bit_num;
741 :
742 : /* Index corresponding to the 1st bit of the bit vector. */
743 : int start_val;
744 :
745 : /* The word of the bit vector currently visited. */
746 : unsigned IRA_INT_TYPE word;
747 : };
748 :
749 : /* Initialize the iterator I for bit vector VEC containing minimal and
750 : maximal values MIN and MAX. */
751 : inline void
752 32540996 : minmax_set_iter_init (minmax_set_iterator *i, IRA_INT_TYPE *vec, int min,
753 : int max)
754 : {
755 32540996 : i->vec = vec;
756 32540996 : i->word_num = 0;
757 32540996 : i->nel = max < min ? 0 : max - min + 1;
758 32540996 : i->start_val = min;
759 32540996 : i->bit_num = 0;
760 32540996 : i->word = i->nel == 0 ? 0 : vec[0];
761 32540996 : }
762 :
763 : /* Return TRUE if we have more allocnos to visit, in which case *N is
764 : set to the number of the element to be visited. Otherwise, return
765 : FALSE. */
766 : inline bool
767 938193800 : minmax_set_iter_cond (minmax_set_iterator *i, int *n)
768 : {
769 : /* Skip words that are zeros. */
770 1589813818 : for (; i->word == 0; i->word = i->vec[i->word_num])
771 : {
772 684161014 : i->word_num++;
773 684161014 : i->bit_num = i->word_num * IRA_INT_BITS;
774 :
775 : /* If we have reached the end, break. */
776 684161014 : if (i->bit_num >= i->nel)
777 : return false;
778 : }
779 :
780 : /* Skip bits that are zero. */
781 905652804 : int off = ctz_hwi (i->word);
782 905652804 : i->bit_num += off;
783 905652804 : i->word >>= off;
784 :
785 905652804 : *n = (int) i->bit_num + i->start_val;
786 :
787 905652804 : return true;
788 : }
789 :
790 : /* Advance to the next element in the set. */
791 : inline void
792 905652804 : minmax_set_iter_next (minmax_set_iterator *i)
793 : {
794 905652804 : i->word >>= 1;
795 905652804 : i->bit_num++;
796 905652804 : }
797 :
798 : /* Loop over all elements of a min/max set given by bit vector VEC and
799 : their minimal and maximal values MIN and MAX. In each iteration, N
800 : is set to the number of next allocno. ITER is an instance of
801 : minmax_set_iterator used to iterate over the set. */
802 : #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
803 : for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
804 : minmax_set_iter_cond (&(ITER), &(N)); \
805 : minmax_set_iter_next (&(ITER)))
806 :
807 : class target_ira_int {
808 : public:
809 : ~target_ira_int ();
810 :
811 : void free_ira_costs ();
812 : void free_register_move_costs ();
813 :
814 : /* Initialized once. It is a maximal possible size of the allocated
815 : struct costs. */
816 : size_t x_max_struct_costs_size;
817 :
818 : /* Allocated and initialized once, and used to initialize cost values
819 : for each insn. */
820 : struct costs *x_init_cost;
821 :
822 : /* Allocated once, and used for temporary purposes. */
823 : struct costs *x_temp_costs;
824 :
825 : /* Allocated once, and used for the cost calculation. */
826 : struct costs *x_op_costs[MAX_RECOG_OPERANDS];
827 : struct costs *x_this_op_costs[MAX_RECOG_OPERANDS];
828 :
829 : /* Hard registers that cannot be used for the register allocator for
830 : all functions of the current compilation unit. */
831 : HARD_REG_SET x_no_unit_alloc_regs;
832 :
833 : /* Map: hard regs X modes -> set of hard registers for storing value
834 : of given mode starting with given hard register. */
835 : HARD_REG_SET (x_ira_reg_mode_hard_regset
836 : [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
837 :
838 : /* Maximum cost of moving from a register in one class to a register
839 : in another class. Based on TARGET_REGISTER_MOVE_COST. */
840 : move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
841 :
842 : /* Similar, but here we don't have to move if the first index is a
843 : subset of the second so in that case the cost is zero. */
844 : move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
845 :
846 : /* Similar, but here we don't have to move if the first index is a
847 : superset of the second so in that case the cost is zero. */
848 : move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
849 :
850 : /* Keep track of the last mode we initialized move costs for. */
851 : int x_last_mode_for_init_move_cost;
852 :
853 : /* Array analog of the macro MEMORY_MOVE_COST but they contain maximal
854 : cost not minimal. */
855 : short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
856 :
857 : /* Map class->true if class is a possible allocno class, false
858 : otherwise. */
859 : bool x_ira_reg_allocno_class_p[N_REG_CLASSES];
860 :
861 : /* Map class->true if class is a pressure class, false otherwise. */
862 : bool x_ira_reg_pressure_class_p[N_REG_CLASSES];
863 :
864 : /* Array of the number of hard registers of given class which are
865 : available for allocation. The order is defined by the hard
866 : register numbers. */
867 : short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
868 :
869 : /* Index (in ira_class_hard_regs; for given register class and hard
870 : register (in general case a hard register can belong to several
871 : register classes). The index is negative for hard registers
872 : unavailable for the allocation. */
873 : short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
874 :
875 : /* Index [CL][M] contains R if R appears somewhere in a register of the form:
876 :
877 : (reg:M R'), R' not in x_ira_prohibited_class_mode_regs[CL][M]
878 :
879 : For example, if:
880 :
881 : - (reg:M 2) is valid and occupies two registers;
882 : - register 2 belongs to CL; and
883 : - register 3 belongs to the same pressure class as CL
884 :
885 : then (reg:M 2) contributes to [CL][M] and registers 2 and 3 will be
886 : in the set. */
887 : HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
888 :
889 : /* The value is number of elements in the subsequent array. */
890 : int x_ira_important_classes_num;
891 :
892 : /* The array containing all non-empty classes. Such classes is
893 : important for calculation of the hard register usage costs. */
894 : enum reg_class x_ira_important_classes[N_REG_CLASSES];
895 :
896 : /* The array containing indexes of important classes in the previous
897 : array. The array elements are defined only for important
898 : classes. */
899 : int x_ira_important_class_nums[N_REG_CLASSES];
900 :
901 : /* Map class->true if class is an uniform class, false otherwise. */
902 : bool x_ira_uniform_class_p[N_REG_CLASSES];
903 :
904 : /* The biggest important class inside of intersection of the two
905 : classes (that is calculated taking only hard registers available
906 : for allocation into account;. If the both classes contain no hard
907 : registers available for allocation, the value is calculated with
908 : taking all hard-registers including fixed ones into account. */
909 : enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
910 :
911 : /* Classes with end marker LIM_REG_CLASSES which are intersected with
912 : given class (the first index). That includes given class itself.
913 : This is calculated taking only hard registers available for
914 : allocation into account. */
915 : enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
916 :
917 : /* The biggest (smallest) important class inside of (covering) union
918 : of the two classes (that is calculated taking only hard registers
919 : available for allocation into account). If the both classes
920 : contain no hard registers available for allocation, the value is
921 : calculated with taking all hard-registers including fixed ones
922 : into account. In other words, the value is the corresponding
923 : reg_class_subunion (reg_class_superunion) value. */
924 : enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
925 : enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
926 :
927 : /* For each reg class, table listing all the classes contained in it
928 : (excluding the class itself. Non-allocatable registers are
929 : excluded from the consideration). */
930 : enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
931 :
932 : /* Array whose values are hard regset of hard registers for which
933 : move of the hard register in given mode into itself is
934 : prohibited. */
935 : HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
936 :
937 : /* Flag of that the above array has been initialized. */
938 : bool x_ira_prohibited_mode_move_regs_initialized_p;
939 :
940 : /* Number of real occurences of hard regs before IRA. */
941 : size_t x_ira_hard_regno_nrefs[FIRST_PSEUDO_REGISTER];
942 : };
943 :
944 : extern class target_ira_int default_target_ira_int;
945 : #if SWITCHABLE_TARGET
946 : extern class target_ira_int *this_target_ira_int;
947 : #else
948 : #define this_target_ira_int (&default_target_ira_int)
949 : #endif
950 :
951 : #define ira_reg_mode_hard_regset \
952 : (this_target_ira_int->x_ira_reg_mode_hard_regset)
953 : #define ira_register_move_cost \
954 : (this_target_ira_int->x_ira_register_move_cost)
955 : #define ira_max_memory_move_cost \
956 : (this_target_ira_int->x_ira_max_memory_move_cost)
957 : #define ira_may_move_in_cost \
958 : (this_target_ira_int->x_ira_may_move_in_cost)
959 : #define ira_may_move_out_cost \
960 : (this_target_ira_int->x_ira_may_move_out_cost)
961 : #define ira_reg_allocno_class_p \
962 : (this_target_ira_int->x_ira_reg_allocno_class_p)
963 : #define ira_reg_pressure_class_p \
964 : (this_target_ira_int->x_ira_reg_pressure_class_p)
965 : #define ira_non_ordered_class_hard_regs \
966 : (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
967 : #define ira_class_hard_reg_index \
968 : (this_target_ira_int->x_ira_class_hard_reg_index)
969 : #define ira_useful_class_mode_regs \
970 : (this_target_ira_int->x_ira_useful_class_mode_regs)
971 : #define ira_important_classes_num \
972 : (this_target_ira_int->x_ira_important_classes_num)
973 : #define ira_important_classes \
974 : (this_target_ira_int->x_ira_important_classes)
975 : #define ira_important_class_nums \
976 : (this_target_ira_int->x_ira_important_class_nums)
977 : #define ira_uniform_class_p \
978 : (this_target_ira_int->x_ira_uniform_class_p)
979 : #define ira_reg_class_intersect \
980 : (this_target_ira_int->x_ira_reg_class_intersect)
981 : #define ira_reg_class_super_classes \
982 : (this_target_ira_int->x_ira_reg_class_super_classes)
983 : #define ira_reg_class_subunion \
984 : (this_target_ira_int->x_ira_reg_class_subunion)
985 : #define ira_reg_class_superunion \
986 : (this_target_ira_int->x_ira_reg_class_superunion)
987 : #define ira_prohibited_mode_move_regs \
988 : (this_target_ira_int->x_ira_prohibited_mode_move_regs)
989 : #define ira_hard_regno_nrefs \
990 : (this_target_ira_int->x_ira_hard_regno_nrefs)
991 :
992 : /* ira.cc: */
993 :
994 : extern void *ira_allocate (size_t);
995 : extern void ira_free (void *addr);
996 : extern bitmap ira_allocate_bitmap (void);
997 : extern void ira_free_bitmap (bitmap);
998 : extern void ira_print_disposition (FILE *);
999 : extern void ira_debug_disposition (void);
1000 : extern void ira_debug_allocno_classes (void);
1001 : extern void ira_init_register_move_cost (machine_mode);
1002 : extern alternative_mask ira_setup_alts (rtx_insn *);
1003 : extern int ira_get_dup_out_num (int, alternative_mask, bool &);
1004 :
1005 : /* ira-build.cc */
1006 :
1007 : /* The current loop tree node and its regno allocno map. */
1008 : extern ira_loop_tree_node_t ira_curr_loop_tree_node;
1009 : extern ira_allocno_t *ira_curr_regno_allocno_map;
1010 :
1011 : extern void ira_debug_pref (ira_pref_t);
1012 : extern void ira_debug_prefs (void);
1013 : extern void ira_debug_allocno_prefs (ira_allocno_t);
1014 :
1015 : extern void ira_debug_copy (ira_copy_t);
1016 : extern void debug (ira_allocno_copy &ref);
1017 : extern void debug (ira_allocno_copy *ptr);
1018 :
1019 : extern void ira_debug_copies (void);
1020 : extern void ira_debug_allocno_copies (ira_allocno_t);
1021 : extern void debug (ira_allocno &ref);
1022 : extern void debug (ira_allocno *ptr);
1023 :
1024 : extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t,
1025 : void (*) (ira_loop_tree_node_t),
1026 : void (*) (ira_loop_tree_node_t));
1027 : extern ira_allocno_t ira_parent_allocno (ira_allocno_t);
1028 : extern ira_allocno_t ira_parent_or_cap_allocno (ira_allocno_t);
1029 : extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t);
1030 : extern void ira_create_allocno_objects (ira_allocno_t);
1031 : extern void ira_set_allocno_class (ira_allocno_t, enum reg_class);
1032 : extern bool ira_conflict_vector_profitable_p (ira_object_t, int);
1033 : extern void ira_allocate_conflict_vec (ira_object_t, int);
1034 : extern void ira_allocate_object_conflicts (ira_object_t, int);
1035 : extern void ior_hard_reg_conflicts (ira_allocno_t, const_hard_reg_set);
1036 : extern void ira_print_expanded_allocno (ira_allocno_t);
1037 : extern void ira_add_live_range_to_object (ira_object_t, int, int);
1038 : extern live_range_t ira_create_live_range (ira_object_t, int, int,
1039 : live_range_t);
1040 : extern live_range_t ira_copy_live_range_list (live_range_t);
1041 : extern live_range_t ira_merge_live_ranges (live_range_t, live_range_t);
1042 : extern bool ira_live_ranges_intersect_p (live_range_t, live_range_t);
1043 : extern void ira_finish_live_range (live_range_t);
1044 : extern void ira_finish_live_range_list (live_range_t);
1045 : extern void ira_free_allocno_updated_costs (ira_allocno_t);
1046 : extern ira_pref_t ira_create_pref (ira_allocno_t, int, int);
1047 : extern void ira_add_allocno_pref (ira_allocno_t, int, int);
1048 : extern void ira_remove_pref (ira_pref_t);
1049 : extern void ira_remove_allocno_prefs (ira_allocno_t);
1050 : extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t,
1051 : int, bool, rtx_insn *,
1052 : ira_loop_tree_node_t);
1053 : extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
1054 : bool, rtx_insn *,
1055 : ira_loop_tree_node_t);
1056 :
1057 : extern int *ira_allocate_cost_vector (reg_class_t);
1058 : extern void ira_free_cost_vector (int *, reg_class_t);
1059 :
1060 : extern void ira_flattening (int, int);
1061 : extern bool ira_build (void);
1062 : extern void ira_destroy (void);
1063 :
1064 : /* ira-costs.cc */
1065 : extern void ira_init_costs_once (void);
1066 : extern void ira_init_costs (void);
1067 : extern void ira_costs (void);
1068 : extern void ira_tune_allocno_costs (void);
1069 :
1070 : /* ira-lives.cc */
1071 :
1072 : extern void ira_rebuild_start_finish_chains (void);
1073 : extern void ira_print_live_range_list (FILE *, live_range_t);
1074 : extern void debug (live_range &ref);
1075 : extern void debug (live_range *ptr);
1076 : extern void ira_debug_live_range_list (live_range_t);
1077 : extern void ira_debug_allocno_live_ranges (ira_allocno_t);
1078 : extern void ira_debug_live_ranges (void);
1079 : extern void ira_create_allocno_live_ranges (void);
1080 : extern void ira_compress_allocno_live_ranges (void);
1081 : extern void ira_finish_allocno_live_ranges (void);
1082 : extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *,
1083 : alternative_mask);
1084 :
1085 : /* ira-conflicts.cc */
1086 : extern void ira_debug_conflicts (bool);
1087 : extern void ira_build_conflicts (void);
1088 :
1089 : /* ira-color.cc */
1090 : extern ira_allocno_t ira_soft_conflict (ira_allocno_t, ira_allocno_t);
1091 : extern void ira_debug_hard_regs_forest (void);
1092 : extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
1093 : extern void ira_reassign_conflict_allocnos (int);
1094 : extern void ira_initiate_assign (void);
1095 : extern void ira_finish_assign (void);
1096 : extern void ira_color (void);
1097 :
1098 : /* ira-emit.cc */
1099 : extern void ira_initiate_emit_data (void);
1100 : extern void ira_finish_emit_data (void);
1101 : extern void ira_emit (bool);
1102 :
1103 :
1104 :
1105 : /* Return true if equivalence of pseudo REGNO is not a lvalue. */
1106 : inline bool
1107 50234006 : ira_equiv_no_lvalue_p (int regno)
1108 : {
1109 50234006 : if (regno >= ira_reg_equiv_len)
1110 : return false;
1111 50234006 : return (ira_reg_equiv[regno].constant != NULL_RTX
1112 48983295 : || ira_reg_equiv[regno].invariant != NULL_RTX
1113 97189165 : || (ira_reg_equiv[regno].memory != NULL_RTX
1114 3942171 : && MEM_READONLY_P (ira_reg_equiv[regno].memory)));
1115 : }
1116 :
1117 :
1118 :
1119 : /* Initialize register costs for MODE if necessary. */
1120 : inline void
1121 1557001009 : ira_init_register_move_cost_if_necessary (machine_mode mode)
1122 : {
1123 1557001009 : if (ira_register_move_cost[mode] == NULL)
1124 10005480 : ira_init_register_move_cost (mode);
1125 1557001009 : }
1126 :
1127 :
1128 :
1129 : /* The iterator for all allocnos. */
1130 : struct ira_allocno_iterator {
1131 : /* The number of the current element in IRA_ALLOCNOS. */
1132 : int n;
1133 : };
1134 :
1135 : /* Initialize the iterator I. */
1136 : inline void
1137 33097328 : ira_allocno_iter_init (ira_allocno_iterator *i)
1138 : {
1139 33097328 : i->n = 0;
1140 33097328 : }
1141 :
1142 : /* Return TRUE if we have more allocnos to visit, in which case *A is
1143 : set to the allocno to be visited. Otherwise, return FALSE. */
1144 : inline bool
1145 879924543 : ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a)
1146 : {
1147 879924543 : int n;
1148 :
1149 932799825 : for (n = i->n; n < ira_allocnos_num; n++)
1150 899702497 : if (ira_allocnos[n] != NULL)
1151 : {
1152 846827215 : *a = ira_allocnos[n];
1153 846827215 : i->n = n + 1;
1154 846827215 : return true;
1155 : }
1156 : return false;
1157 : }
1158 :
1159 : /* Loop over all allocnos. In each iteration, A is set to the next
1160 : allocno. ITER is an instance of ira_allocno_iterator used to iterate
1161 : the allocnos. */
1162 : #define FOR_EACH_ALLOCNO(A, ITER) \
1163 : for (ira_allocno_iter_init (&(ITER)); \
1164 : ira_allocno_iter_cond (&(ITER), &(A));)
1165 :
1166 : /* The iterator for all objects. */
1167 : struct ira_object_iterator {
1168 : /* The number of the current element in ira_object_id_map. */
1169 : int n;
1170 : };
1171 :
1172 : /* Initialize the iterator I. */
1173 : inline void
1174 8561295 : ira_object_iter_init (ira_object_iterator *i)
1175 : {
1176 8561295 : i->n = 0;
1177 8561295 : }
1178 :
1179 : /* Return TRUE if we have more objects to visit, in which case *OBJ is
1180 : set to the object to be visited. Otherwise, return FALSE. */
1181 : inline bool
1182 217178604 : ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj)
1183 : {
1184 217178604 : int n;
1185 :
1186 232118898 : for (n = i->n; n < ira_objects_num; n++)
1187 223557603 : if (ira_object_id_map[n] != NULL)
1188 : {
1189 208617309 : *obj = ira_object_id_map[n];
1190 208617309 : i->n = n + 1;
1191 208617309 : return true;
1192 : }
1193 : return false;
1194 : }
1195 :
1196 : /* Loop over all objects. In each iteration, OBJ is set to the next
1197 : object. ITER is an instance of ira_object_iterator used to iterate
1198 : the objects. */
1199 : #define FOR_EACH_OBJECT(OBJ, ITER) \
1200 : for (ira_object_iter_init (&(ITER)); \
1201 : ira_object_iter_cond (&(ITER), &(OBJ));)
1202 :
1203 : /* The iterator for objects associated with an allocno. */
1204 : struct ira_allocno_object_iterator {
1205 : /* The number of the element the allocno's object array. */
1206 : int n;
1207 : };
1208 :
1209 : /* Initialize the iterator I. */
1210 : inline void
1211 131092013 : ira_allocno_object_iter_init (ira_allocno_object_iterator *i)
1212 : {
1213 131092013 : i->n = 0;
1214 131092013 : }
1215 :
1216 : /* Return TRUE if we have more objects to visit in allocno A, in which
1217 : case *O is set to the object to be visited. Otherwise, return
1218 : FALSE. */
1219 : inline bool
1220 480491587 : ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a,
1221 : ira_object_t *o)
1222 : {
1223 480491587 : int n = i->n++;
1224 480491587 : if (n < ALLOCNO_NUM_OBJECTS (a))
1225 : {
1226 231690480 : *o = ALLOCNO_OBJECT (a, n);
1227 227004548 : return true;
1228 : }
1229 : return false;
1230 : }
1231 :
1232 : /* Loop over all objects associated with allocno A. In each
1233 : iteration, O is set to the next object. ITER is an instance of
1234 : ira_allocno_object_iterator used to iterate the conflicts. */
1235 : #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1236 : for (ira_allocno_object_iter_init (&(ITER)); \
1237 : ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1238 :
1239 :
1240 : /* The iterator for prefs. */
1241 : struct ira_pref_iterator {
1242 : /* The number of the current element in IRA_PREFS. */
1243 : int n;
1244 : };
1245 :
1246 : /* Initialize the iterator I. */
1247 : inline void
1248 1471457 : ira_pref_iter_init (ira_pref_iterator *i)
1249 : {
1250 1471457 : i->n = 0;
1251 1471457 : }
1252 :
1253 : /* Return TRUE if we have more prefs to visit, in which case *PREF is
1254 : set to the pref to be visited. Otherwise, return FALSE. */
1255 : inline bool
1256 7710548 : ira_pref_iter_cond (ira_pref_iterator *i, ira_pref_t *pref)
1257 : {
1258 7710548 : int n;
1259 :
1260 8597183 : for (n = i->n; n < ira_prefs_num; n++)
1261 7125726 : if (ira_prefs[n] != NULL)
1262 : {
1263 6239091 : *pref = ira_prefs[n];
1264 6239091 : i->n = n + 1;
1265 6239091 : return true;
1266 : }
1267 : return false;
1268 : }
1269 :
1270 : /* Loop over all prefs. In each iteration, P is set to the next
1271 : pref. ITER is an instance of ira_pref_iterator used to iterate
1272 : the prefs. */
1273 : #define FOR_EACH_PREF(P, ITER) \
1274 : for (ira_pref_iter_init (&(ITER)); \
1275 : ira_pref_iter_cond (&(ITER), &(P));)
1276 :
1277 :
1278 : /* The iterator for copies. */
1279 : struct ira_copy_iterator {
1280 : /* The number of the current element in IRA_COPIES. */
1281 : int n;
1282 : };
1283 :
1284 : /* Initialize the iterator I. */
1285 : inline void
1286 2469234 : ira_copy_iter_init (ira_copy_iterator *i)
1287 : {
1288 2469234 : i->n = 0;
1289 2469234 : }
1290 :
1291 : /* Return TRUE if we have more copies to visit, in which case *CP is
1292 : set to the copy to be visited. Otherwise, return FALSE. */
1293 : inline bool
1294 19016527 : ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp)
1295 : {
1296 19016527 : int n;
1297 :
1298 19016527 : for (n = i->n; n < ira_copies_num; n++)
1299 16547293 : if (ira_copies[n] != NULL)
1300 : {
1301 16547293 : *cp = ira_copies[n];
1302 16547293 : i->n = n + 1;
1303 16547293 : return true;
1304 : }
1305 : return false;
1306 : }
1307 :
1308 : /* Loop over all copies. In each iteration, C is set to the next
1309 : copy. ITER is an instance of ira_copy_iterator used to iterate
1310 : the copies. */
1311 : #define FOR_EACH_COPY(C, ITER) \
1312 : for (ira_copy_iter_init (&(ITER)); \
1313 : ira_copy_iter_cond (&(ITER), &(C));)
1314 :
1315 : /* The iterator for object conflicts. */
1316 : struct ira_object_conflict_iterator {
1317 :
1318 : /* TRUE if the conflicts are represented by vector of allocnos. */
1319 : bool conflict_vec_p;
1320 :
1321 : /* The conflict vector or conflict bit vector. */
1322 : void *vec;
1323 :
1324 : /* The number of the current element in the vector (of type
1325 : ira_object_t or IRA_INT_TYPE). */
1326 : unsigned int word_num;
1327 :
1328 : /* The bit vector size. It is defined only if
1329 : OBJECT_CONFLICT_VEC_P is FALSE. */
1330 : unsigned int size;
1331 :
1332 : /* The current bit index of bit vector. It is defined only if
1333 : OBJECT_CONFLICT_VEC_P is FALSE. */
1334 : unsigned int bit_num;
1335 :
1336 : /* The object id corresponding to the 1st bit of the bit vector. It
1337 : is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1338 : int base_conflict_id;
1339 :
1340 : /* The word of bit vector currently visited. It is defined only if
1341 : OBJECT_CONFLICT_VEC_P is FALSE. */
1342 : unsigned IRA_INT_TYPE word;
1343 : };
1344 :
1345 : /* Initialize the iterator I with ALLOCNO conflicts. */
1346 : inline void
1347 112285689 : ira_object_conflict_iter_init (ira_object_conflict_iterator *i,
1348 : ira_object_t obj)
1349 : {
1350 112285689 : i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj);
1351 112285689 : i->vec = OBJECT_CONFLICT_ARRAY (obj);
1352 112285689 : i->word_num = 0;
1353 112285689 : if (i->conflict_vec_p)
1354 34283993 : i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1355 : else
1356 : {
1357 78001696 : if (OBJECT_MIN (obj) > OBJECT_MAX (obj))
1358 3514318 : i->size = 0;
1359 : else
1360 74487378 : i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj)
1361 : + IRA_INT_BITS)
1362 74487378 : / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1363 78001696 : i->bit_num = 0;
1364 78001696 : i->base_conflict_id = OBJECT_MIN (obj);
1365 78001696 : i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1366 : }
1367 112285689 : }
1368 :
1369 : /* Return TRUE if we have more conflicting allocnos to visit, in which
1370 : case *A is set to the allocno to be visited. Otherwise, return
1371 : FALSE. */
1372 : inline bool
1373 2639626304 : ira_object_conflict_iter_cond (ira_object_conflict_iterator *i,
1374 : ira_object_t *pobj)
1375 : {
1376 2639626304 : ira_object_t obj;
1377 :
1378 2639626304 : if (i->conflict_vec_p)
1379 : {
1380 1030391157 : obj = ((ira_object_t *) i->vec)[i->word_num++];
1381 1030391157 : if (obj == NULL)
1382 : return false;
1383 : }
1384 : else
1385 : {
1386 1609235147 : unsigned IRA_INT_TYPE word = i->word;
1387 1609235147 : unsigned int bit_num = i->bit_num;
1388 :
1389 : /* Skip words that are zeros. */
1390 1884266370 : for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1391 : {
1392 352059456 : i->word_num++;
1393 :
1394 : /* If we have reached the end, break. */
1395 352059456 : if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1396 : return false;
1397 :
1398 275031223 : bit_num = i->word_num * IRA_INT_BITS;
1399 : }
1400 :
1401 : /* Skip bits that are zero. */
1402 1532206914 : int off = ctz_hwi (word);
1403 1532206914 : bit_num += off;
1404 1532206914 : word >>= off;
1405 :
1406 1532206914 : obj = ira_object_id_map[bit_num + i->base_conflict_id];
1407 1532206914 : i->bit_num = bit_num + 1;
1408 1532206914 : i->word = word >> 1;
1409 : }
1410 :
1411 2529037340 : *pobj = obj;
1412 2529037340 : return true;
1413 : }
1414 :
1415 : /* Loop over all objects conflicting with OBJ. In each iteration,
1416 : CONF is set to the next conflicting object. ITER is an instance
1417 : of ira_object_conflict_iterator used to iterate the conflicts. */
1418 : #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1419 : for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1420 : ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1421 :
1422 :
1423 :
1424 : /* The function returns TRUE if at least one hard register from ones
1425 : starting with HARD_REGNO and containing value of MODE are in set
1426 : HARD_REGSET. */
1427 : inline bool
1428 215572370 : ira_hard_reg_set_intersection_p (int hard_regno, machine_mode mode,
1429 : HARD_REG_SET hard_regset)
1430 : {
1431 215572370 : int i;
1432 :
1433 215572370 : gcc_assert (hard_regno >= 0);
1434 309285272 : for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
1435 228196622 : if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1436 : return true;
1437 : return false;
1438 : }
1439 :
1440 : /* Return number of hard registers in hard register SET. */
1441 : inline int
1442 60786520 : hard_reg_set_size (HARD_REG_SET set)
1443 : {
1444 60786520 : int i, size;
1445 :
1446 5653146360 : for (size = i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1447 5592359840 : if (TEST_HARD_REG_BIT (set, i))
1448 154979877 : size++;
1449 60786520 : return size;
1450 : }
1451 :
1452 : /* The function returns TRUE if hard registers starting with
1453 : HARD_REGNO and containing value of MODE are fully in set
1454 : HARD_REGSET. */
1455 : inline bool
1456 55640241 : ira_hard_reg_in_set_p (int hard_regno, machine_mode mode,
1457 : HARD_REG_SET hard_regset)
1458 : {
1459 55640241 : int i;
1460 :
1461 55640241 : ira_assert (hard_regno >= 0);
1462 111478596 : for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
1463 56858791 : if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1464 : return false;
1465 : return true;
1466 : }
1467 :
1468 :
1469 :
1470 : /* To save memory we use a lazy approach for allocation and
1471 : initialization of the cost vectors. We do this only when it is
1472 : really necessary. */
1473 :
1474 : /* Allocate cost vector *VEC for hard registers of ACLASS and
1475 : initialize the elements by VAL if it is necessary */
1476 : inline void
1477 8598013 : ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
1478 : {
1479 8598013 : int i, *reg_costs;
1480 8598013 : int len;
1481 :
1482 8598013 : if (*vec != NULL)
1483 : return;
1484 4963301 : *vec = reg_costs = ira_allocate_cost_vector (aclass);
1485 4963301 : len = ira_class_hard_regs_num[(int) aclass];
1486 83559772 : for (i = 0; i < len; i++)
1487 78596471 : reg_costs[i] = val;
1488 : }
1489 :
1490 : /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1491 : values of vector SRC into the vector if it is necessary */
1492 : inline void
1493 195507958 : ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src)
1494 : {
1495 195507958 : int len;
1496 :
1497 195507958 : if (*vec != NULL || src == NULL)
1498 : return;
1499 7921114 : *vec = ira_allocate_cost_vector (aclass);
1500 7921114 : len = ira_class_hard_regs_num[aclass];
1501 7921114 : memcpy (*vec, src, sizeof (int) * len);
1502 : }
1503 :
1504 : /* Allocate cost vector *VEC for hard registers of ACLASS and add
1505 : values of vector SRC into the vector if it is necessary */
1506 : inline void
1507 8111992 : ira_allocate_and_accumulate_costs (int **vec, enum reg_class aclass, int *src)
1508 : {
1509 8111992 : int i, len;
1510 :
1511 8111992 : if (src == NULL)
1512 : return;
1513 162492 : len = ira_class_hard_regs_num[aclass];
1514 162492 : if (*vec == NULL)
1515 : {
1516 39935 : *vec = ira_allocate_cost_vector (aclass);
1517 39935 : memset (*vec, 0, sizeof (int) * len);
1518 : }
1519 3811624 : for (i = 0; i < len; i++)
1520 3649132 : (*vec)[i] += src[i];
1521 : }
1522 :
1523 : /* Allocate cost vector *VEC for hard registers of ACLASS and copy
1524 : values of vector SRC into the vector or initialize it by VAL (if
1525 : SRC is null). */
1526 : inline void
1527 27083250 : ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class aclass,
1528 : int val, int *src)
1529 : {
1530 27083250 : int i, *reg_costs;
1531 27083250 : int len;
1532 :
1533 27083250 : if (*vec != NULL)
1534 : return;
1535 13413251 : *vec = reg_costs = ira_allocate_cost_vector (aclass);
1536 13413251 : len = ira_class_hard_regs_num[aclass];
1537 13413251 : if (src != NULL)
1538 2349418 : memcpy (reg_costs, src, sizeof (int) * len);
1539 : else
1540 : {
1541 172045672 : for (i = 0; i < len; i++)
1542 160981839 : reg_costs[i] = val;
1543 : }
1544 : }
1545 :
1546 : extern rtx ira_create_new_reg (rtx);
1547 : extern int first_moveable_pseudo, last_moveable_pseudo;
1548 :
1549 : /* Return the set of registers that would need a caller save if allocno A
1550 : overlapped them. */
1551 :
1552 : inline HARD_REG_SET
1553 4608563 : ira_need_caller_save_regs (ira_allocno_t a)
1554 : {
1555 4608563 : return call_clobbers_in_region (ALLOCNO_CROSSED_CALLS_ABIS (a),
1556 4608563 : ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a),
1557 4608563 : ALLOCNO_MODE (a));
1558 : }
1559 :
1560 : /* Return true if we would need to save allocno A around a call if we
1561 : assigned hard register REGNO. */
1562 :
1563 : inline bool
1564 277081753 : ira_need_caller_save_p (ira_allocno_t a, unsigned int regno)
1565 : {
1566 277081753 : if (ALLOCNO_CALLS_CROSSED_NUM (a) == 0)
1567 : return false;
1568 54737396 : return call_clobbered_in_region_p (ALLOCNO_CROSSED_CALLS_ABIS (a),
1569 54737396 : ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a),
1570 54737396 : ALLOCNO_MODE (a), regno);
1571 : }
1572 :
1573 : /* Represents the boundary between an allocno in one loop and its parent
1574 : allocno in the enclosing loop. It is usually possible to change a
1575 : register's allocation on this boundary; the class provides routines
1576 : for calculating the cost of such changes. */
1577 : class ira_loop_border_costs
1578 : {
1579 : public:
1580 : ira_loop_border_costs (ira_allocno_t);
1581 :
1582 : int move_between_loops_cost () const;
1583 : int spill_outside_loop_cost () const;
1584 : int spill_inside_loop_cost () const;
1585 :
1586 : private:
1587 : /* The mode and class of the child allocno. */
1588 : machine_mode m_mode;
1589 : reg_class m_class;
1590 :
1591 : /* Sums the frequencies of the entry edges and the exit edges. */
1592 : int m_entry_freq, m_exit_freq;
1593 : };
1594 :
1595 : /* Return the cost of storing the register on entry to the loop and
1596 : loading it back on exit from the loop. This is the cost to use if
1597 : the register is spilled within the loop but is successfully allocated
1598 : in the parent loop. */
1599 : inline int
1600 10557491 : ira_loop_border_costs::spill_inside_loop_cost () const
1601 : {
1602 10557491 : return (m_entry_freq * ira_memory_move_cost[m_mode][m_class][0]
1603 10557491 : + m_exit_freq * ira_memory_move_cost[m_mode][m_class][1]);
1604 : }
1605 :
1606 : /* Return the cost of loading the register on entry to the loop and
1607 : storing it back on exit from the loop. This is the cost to use if
1608 : the register is successfully allocated within the loop but is spilled
1609 : in the parent loop. */
1610 : inline int
1611 2322801 : ira_loop_border_costs::spill_outside_loop_cost () const
1612 : {
1613 2322801 : return (m_entry_freq * ira_memory_move_cost[m_mode][m_class][1]
1614 2322801 : + m_exit_freq * ira_memory_move_cost[m_mode][m_class][0]);
1615 : }
1616 :
1617 : /* Return the cost of moving the pseudo register between different hard
1618 : registers on entry and exit from the loop. This is the cost to use
1619 : if the register is successfully allocated within both this loop and
1620 : the parent loop, but the allocations for the loops differ. */
1621 : inline int
1622 1899518 : ira_loop_border_costs::move_between_loops_cost () const
1623 : {
1624 1899518 : ira_init_register_move_cost_if_necessary (m_mode);
1625 1899518 : auto move_cost = ira_register_move_cost[m_mode][m_class][m_class];
1626 1899518 : return move_cost * (m_entry_freq + m_exit_freq);
1627 : }
1628 :
1629 : /* Return true if subloops that contain allocnos for A's register can
1630 : use a different assignment from A. ALLOCATED_P is true for the case
1631 : in which allocation succeeded for A. EXCLUDE_OLD_RELOAD is true if
1632 : we should always return false for non-LRA targets. (This is a hack
1633 : and should be removed along with old reload.) */
1634 : inline bool
1635 31479785 : ira_subloop_allocnos_can_differ_p (ira_allocno_t a, bool allocated_p = true,
1636 : bool exclude_old_reload = true)
1637 : {
1638 31479785 : if (exclude_old_reload && !ira_use_lra_p)
1639 : return false;
1640 :
1641 31479785 : auto regno = ALLOCNO_REGNO (a);
1642 :
1643 31479785 : if (pic_offset_table_rtx != NULL
1644 31479785 : && regno == (int) REGNO (pic_offset_table_rtx))
1645 : return false;
1646 :
1647 31380840 : ira_assert (regno < ira_reg_equiv_len);
1648 31380840 : if (ira_equiv_no_lvalue_p (regno))
1649 : return false;
1650 :
1651 : /* Avoid overlapping multi-registers. Moves between them might result
1652 : in wrong code generation. */
1653 29197568 : if (allocated_p)
1654 : {
1655 27673349 : auto pclass = ira_pressure_class_translate[ALLOCNO_CLASS (a)];
1656 27673349 : if (ira_reg_class_max_nregs[pclass][ALLOCNO_MODE (a)] > 1)
1657 287084 : return false;
1658 : }
1659 :
1660 : return true;
1661 : }
1662 :
1663 : /* Return true if we should treat A and SUBLOOP_A as belonging to a
1664 : single region. */
1665 : inline bool
1666 6848149 : ira_single_region_allocno_p (ira_allocno_t a, ira_allocno_t subloop_a)
1667 : {
1668 6848149 : if (flag_ira_region != IRA_REGION_MIXED)
1669 : return false;
1670 :
1671 6848149 : if (ALLOCNO_MIGHT_CONFLICT_WITH_PARENT_P (subloop_a))
1672 : return false;
1673 :
1674 6286309 : auto rclass = ALLOCNO_CLASS (a);
1675 6286309 : auto pclass = ira_pressure_class_translate[rclass];
1676 6286309 : auto loop_used_regs = ALLOCNO_LOOP_TREE_NODE (a)->reg_pressure[pclass];
1677 6286309 : return loop_used_regs <= ira_class_hard_regs_num[pclass];
1678 : }
1679 :
1680 : /* Return the set of all hard registers that conflict with A. */
1681 : inline HARD_REG_SET
1682 6839895 : ira_total_conflict_hard_regs (ira_allocno_t a)
1683 : {
1684 6839895 : auto obj_0 = ALLOCNO_OBJECT (a, 0);
1685 6839895 : HARD_REG_SET conflicts = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj_0);
1686 6978297 : for (int i = 1; i < ALLOCNO_NUM_OBJECTS (a); i++)
1687 276804 : conflicts |= OBJECT_TOTAL_CONFLICT_HARD_REGS (ALLOCNO_OBJECT (a, i));
1688 6839895 : return conflicts;
1689 : }
1690 :
1691 : /* Return the cost of saving a caller-saved register before each call
1692 : in A's live range and restoring the same register after each call. */
1693 : inline int
1694 24627685 : ira_caller_save_cost (ira_allocno_t a)
1695 : {
1696 24627685 : auto mode = ALLOCNO_MODE (a);
1697 24627685 : auto rclass = ALLOCNO_CLASS (a);
1698 24627685 : return (ALLOCNO_CALL_FREQ (a)
1699 24627685 : * (ira_memory_move_cost[mode][rclass][0]
1700 24627685 : + ira_memory_move_cost[mode][rclass][1]));
1701 : }
1702 :
1703 : /* A and SUBLOOP_A are allocnos for the same pseudo register, with A's
1704 : loop immediately enclosing SUBLOOP_A's loop. If we allocate to A a
1705 : hard register R that is clobbered by a call in SUBLOOP_A, decide
1706 : which of the following approaches should be used for handling the
1707 : conflict:
1708 :
1709 : (1) Spill R on entry to SUBLOOP_A's loop, assign memory to SUBLOOP_A,
1710 : and restore R on exit from SUBLOOP_A's loop.
1711 :
1712 : (2) Spill R before each necessary call in SUBLOOP_A's live range and
1713 : restore R after each such call.
1714 :
1715 : Return true if (1) is better than (2). SPILL_COST is the cost of
1716 : doing (1). */
1717 : inline bool
1718 6298797 : ira_caller_save_loop_spill_p (ira_allocno_t a, ira_allocno_t subloop_a,
1719 : int spill_cost)
1720 : {
1721 6298797 : if (!ira_subloop_allocnos_can_differ_p (a))
1722 : return false;
1723 :
1724 : /* Calculate the cost of saving a call-clobbered register
1725 : before each call and restoring it afterwards. */
1726 5362253 : int call_cost = ira_caller_save_cost (subloop_a);
1727 5362253 : return call_cost && call_cost >= spill_cost;
1728 : }
1729 :
1730 : #endif /* GCC_IRA_INT_H */
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