Line data Source code
1 : /* Assign reload pseudos.
2 : Copyright (C) 2010-2026 Free Software Foundation, Inc.
3 : Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4 :
5 : This file is part of GCC.
6 :
7 : GCC is free software; you can redistribute it and/or modify it under
8 : the terms of the GNU General Public License as published by the Free
9 : Software Foundation; either version 3, or (at your option) any later
10 : version.
11 :
12 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 : for more details.
16 :
17 : You should have received a copy of the GNU General Public License
18 : along with GCC; see the file COPYING3. If not see
19 : <http://www.gnu.org/licenses/>. */
20 :
21 :
22 : /* This file's main objective is to assign hard registers to reload
23 : pseudos. It also tries to allocate hard registers to other
24 : pseudos, but at a lower priority than the reload pseudos. The pass
25 : does not transform the RTL.
26 :
27 : We must allocate a hard register to every reload pseudo. We try to
28 : increase the chances of finding a viable allocation by assigning
29 : the pseudos in order of fewest available hard registers first. If
30 : we still fail to find a hard register, we spill other (non-reload)
31 : pseudos in order to make room.
32 :
33 : find_hard_regno_for finds hard registers for allocation without
34 : spilling. spill_for does the same with spilling. Both functions
35 : use a cost model to determine the most profitable choice of hard
36 : and spill registers.
37 :
38 : Once we have finished allocating reload pseudos, we also try to
39 : assign registers to other (non-reload) pseudos. This is useful if
40 : hard registers were freed up by the spilling just described.
41 :
42 : We try to assign hard registers by collecting pseudos into threads.
43 : These threads contain reload and inheritance pseudos that are
44 : connected by copies (move insns). Doing this improves the chances
45 : of pseudos in the thread getting the same hard register and, as a
46 : result, of allowing some move insns to be deleted.
47 :
48 : When we assign a hard register to a pseudo, we decrease the cost of
49 : using the same hard register for pseudos that are connected by
50 : copies.
51 :
52 : If two hard registers have the same frequency-derived cost, we
53 : prefer hard registers with higher priorities. The mapping of
54 : registers to priorities is controlled by the register_priority
55 : target hook. For example, x86-64 has a few register priorities:
56 : hard registers with and without REX prefixes have different
57 : priorities. This permits us to generate smaller code as insns
58 : without REX prefixes are shorter.
59 :
60 : If a few hard registers are still equally good for the assignment,
61 : we choose the least used hard register. It is called leveling and
62 : may be profitable for some targets.
63 :
64 : Only insns with changed allocation pseudos are processed on the
65 : next constraint pass.
66 :
67 : The pseudo live-ranges are used to find conflicting pseudos.
68 :
69 : For understanding the code, it is important to keep in mind that
70 : inheritance, split, and reload pseudos created since last
71 : constraint pass have regno >= lra_constraint_new_regno_start.
72 : Inheritance and split pseudos created on any pass are in the
73 : corresponding bitmaps. Inheritance and split pseudos since the
74 : last constraint pass have also the corresponding non-negative
75 : restore_regno. */
76 :
77 : #include "config.h"
78 : #include "system.h"
79 : #include "coretypes.h"
80 : #include "backend.h"
81 : #include "target.h"
82 : #include "rtl.h"
83 : #include "tree.h"
84 : #include "predict.h"
85 : #include "df.h"
86 : #include "memmodel.h"
87 : #include "tm_p.h"
88 : #include "insn-config.h"
89 : #include "regs.h"
90 : #include "ira.h"
91 : #include "recog.h"
92 : #include "rtl-error.h"
93 : #include "sparseset.h"
94 : #include "lra.h"
95 : #include "lra-int.h"
96 : #include "function-abi.h"
97 :
98 : /* Current iteration number of the pass and current iteration number
99 : of the pass after the latest spill pass when any former reload
100 : pseudo was spilled. */
101 : int lra_assignment_iter;
102 : int lra_assignment_iter_after_spill;
103 :
104 : /* Flag of spilling former reload pseudos on this pass. */
105 : static bool former_reload_pseudo_spill_p;
106 :
107 : /* Array containing corresponding values of function
108 : lra_get_allocno_class. It is used to speed up the code. */
109 : static enum reg_class *regno_allocno_class_array;
110 :
111 : /* Array containing lengths of pseudo live ranges. It is used to
112 : speed up the code. */
113 : static int *regno_live_length;
114 :
115 : /* Information about the thread to which a pseudo belongs. Threads are
116 : a set of connected reload and inheritance pseudos with the same set of
117 : available hard registers. Lone registers belong to their own threads. */
118 : struct regno_assign_info
119 : {
120 : /* First/next pseudo of the same thread. */
121 : int first, next;
122 : /* Frequency of the thread (execution frequency of only reload
123 : pseudos in the thread when the thread contains a reload pseudo).
124 : Defined only for the first thread pseudo. */
125 : int freq;
126 : };
127 :
128 : /* Map regno to the corresponding regno assignment info. */
129 : static struct regno_assign_info *regno_assign_info;
130 :
131 : /* All inherited, subreg or optional pseudos created before last spill
132 : sub-pass. Such pseudos are permitted to get memory instead of hard
133 : regs. */
134 : static bitmap_head non_reload_pseudos;
135 :
136 : /* Process a pseudo copy with execution frequency COPY_FREQ connecting
137 : REGNO1 and REGNO2 to form threads. */
138 : static void
139 1581144 : process_copy_to_form_thread (int regno1, int regno2, int copy_freq)
140 : {
141 1581144 : int last, regno1_first, regno2_first;
142 :
143 1581144 : lra_assert (regno1 >= lra_constraint_new_regno_start
144 : && regno2 >= lra_constraint_new_regno_start);
145 1581144 : regno1_first = regno_assign_info[regno1].first;
146 1581144 : regno2_first = regno_assign_info[regno2].first;
147 1581144 : if (regno1_first != regno2_first)
148 : {
149 2503573 : for (last = regno2_first;
150 4084717 : regno_assign_info[last].next >= 0;
151 2503573 : last = regno_assign_info[last].next)
152 2503573 : regno_assign_info[last].first = regno1_first;
153 1581144 : regno_assign_info[last].first = regno1_first;
154 1581144 : regno_assign_info[last].next = regno_assign_info[regno1_first].next;
155 1581144 : regno_assign_info[regno1_first].next = regno2_first;
156 1581144 : regno_assign_info[regno1_first].freq
157 1581144 : += regno_assign_info[regno2_first].freq;
158 : }
159 1581144 : regno_assign_info[regno1_first].freq -= 2 * copy_freq;
160 1581144 : lra_assert (regno_assign_info[regno1_first].freq >= 0);
161 1581144 : }
162 :
163 : /* Initialize REGNO_ASSIGN_INFO and form threads. */
164 : static void
165 1549612 : init_regno_assign_info (void)
166 : {
167 1549612 : int i, regno1, regno2, max_regno = max_reg_num ();
168 1549612 : lra_copy_t cp;
169 :
170 1549612 : regno_assign_info = XNEWVEC (struct regno_assign_info, max_regno);
171 101659276 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
172 : {
173 100109664 : regno_assign_info[i].first = i;
174 100109664 : regno_assign_info[i].next = -1;
175 100109664 : regno_assign_info[i].freq = lra_reg_info[i].freq;
176 : }
177 : /* Form the threads. */
178 4345535 : for (i = 0; (cp = lra_get_copy (i)) != NULL; i++)
179 2795923 : if ((regno1 = cp->regno1) >= lra_constraint_new_regno_start
180 2795923 : && (regno2 = cp->regno2) >= lra_constraint_new_regno_start
181 2795923 : && reg_renumber[regno1] < 0 && lra_reg_info[regno1].nrefs != 0
182 1616160 : && reg_renumber[regno2] < 0 && lra_reg_info[regno2].nrefs != 0
183 2795923 : && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]]
184 1612615 : == ira_class_hard_regs_num[regno_allocno_class_array[regno2]]))
185 1581144 : process_copy_to_form_thread (regno1, regno2, cp->freq);
186 1549612 : }
187 :
188 : /* Free REGNO_ASSIGN_INFO. */
189 : static void
190 1549612 : finish_regno_assign_info (void)
191 : {
192 1549612 : free (regno_assign_info);
193 0 : }
194 :
195 : /* The function is used to sort *reload* and *inheritance* pseudos to
196 : try to assign them hard registers. We put pseudos from the same
197 : thread always nearby. */
198 : static int
199 247427146 : reload_pseudo_compare_func (const void *v1p, const void *v2p)
200 : {
201 247427146 : int r1 = *(const int *) v1p, r2 = *(const int *) v2p;
202 247427146 : enum reg_class cl1 = regno_allocno_class_array[r1];
203 247427146 : enum reg_class cl2 = regno_allocno_class_array[r2];
204 247427146 : int diff;
205 :
206 247427146 : lra_assert (r1 >= lra_constraint_new_regno_start
207 : && r2 >= lra_constraint_new_regno_start);
208 :
209 : /* Prefer to assign reload registers with smaller classes first to
210 : guarantee assignment to all reload registers. */
211 247427146 : if ((diff = (ira_class_hard_regs_num[cl1]
212 247427146 : - ira_class_hard_regs_num[cl2])) != 0)
213 : return diff;
214 : /* Allocate bigger pseudos first to avoid register file
215 : fragmentation. */
216 232289121 : if ((diff
217 232289121 : = (ira_reg_class_max_nregs[cl2][lra_reg_info[r2].biggest_mode]
218 232289121 : - ira_reg_class_max_nregs[cl1][lra_reg_info[r1].biggest_mode])) != 0)
219 : return diff;
220 230291191 : if ((diff = (regno_assign_info[regno_assign_info[r2].first].freq
221 230291191 : - regno_assign_info[regno_assign_info[r1].first].freq)) != 0)
222 : return diff;
223 : /* Put pseudos from the thread nearby. */
224 130098125 : if ((diff = regno_assign_info[r1].first - regno_assign_info[r2].first) != 0)
225 : return diff;
226 : /* Prefer pseudos with longer live ranges. It sets up better
227 : prefered hard registers for the thread pseudos and decreases
228 : register-register moves between the thread pseudos. */
229 18078060 : if ((diff = regno_live_length[r2] - regno_live_length[r1]) != 0)
230 : return diff;
231 : /* If regs are equally good, sort by their numbers, so that the
232 : results of qsort leave nothing to chance. */
233 8327420 : return r1 - r2;
234 : }
235 :
236 : /* The function is used to sort *non-reload* pseudos to try to assign
237 : them hard registers. The order calculation is simpler than in the
238 : previous function and based on the pseudo frequency usage. */
239 : static int
240 1108579078 : pseudo_compare_func (const void *v1p, const void *v2p)
241 : {
242 1108579078 : int r1 = *(const int *) v1p, r2 = *(const int *) v2p;
243 1108579078 : int diff;
244 :
245 : /* Assign hard reg to static chain pointer first pseudo when
246 : non-local goto is used. */
247 1108579078 : if ((diff = (non_spilled_static_chain_regno_p (r2)
248 1108579078 : - non_spilled_static_chain_regno_p (r1))) != 0)
249 : return diff;
250 :
251 : /* Prefer to assign more frequently used registers first. */
252 1108575810 : if ((diff = lra_reg_info[r2].freq - lra_reg_info[r1].freq) != 0)
253 : return diff;
254 :
255 : /* If regs are equally good, sort by their numbers, so that the
256 : results of qsort leave nothing to chance. */
257 660682085 : return r1 - r2;
258 : }
259 :
260 : /* Arrays of size LRA_LIVE_MAX_POINT mapping a program point to the
261 : pseudo live ranges with given start point. We insert only live
262 : ranges of pseudos interesting for assignment purposes. They are
263 : reload pseudos and pseudos assigned to hard registers. */
264 : static lra_live_range_t *start_point_ranges;
265 :
266 : /* Used as a flag that a live range is not inserted in the start point
267 : chain. */
268 : static struct lra_live_range not_in_chain_mark;
269 :
270 : /* Create and set up START_POINT_RANGES. */
271 : static void
272 1549612 : create_live_range_start_chains (void)
273 : {
274 1549612 : int i, max_regno;
275 1549612 : lra_live_range_t r;
276 :
277 1549612 : start_point_ranges = XCNEWVEC (lra_live_range_t, lra_live_max_point);
278 1549612 : max_regno = max_reg_num ();
279 103208888 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
280 100109664 : if (i >= lra_constraint_new_regno_start || reg_renumber[i] >= 0)
281 : {
282 107346509 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
283 : {
284 57447346 : r->start_next = start_point_ranges[r->start];
285 57447346 : start_point_ranges[r->start] = r;
286 : }
287 : }
288 : else
289 : {
290 52969494 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
291 2758993 : r->start_next = ¬_in_chain_mark;
292 : }
293 1549612 : }
294 :
295 : /* Insert live ranges of pseudo REGNO into start chains if they are
296 : not there yet. */
297 : static void
298 495126768 : insert_in_live_range_start_chain (int regno)
299 : {
300 495126768 : lra_live_range_t r = lra_reg_info[regno].live_ranges;
301 :
302 495126768 : if (r->start_next != ¬_in_chain_mark)
303 : return;
304 216814 : for (; r != NULL; r = r->next)
305 : {
306 140492 : r->start_next = start_point_ranges[r->start];
307 140492 : start_point_ranges[r->start] = r;
308 : }
309 : }
310 :
311 : /* Free START_POINT_RANGES. */
312 : static void
313 1549612 : finish_live_range_start_chains (void)
314 : {
315 1549612 : gcc_assert (start_point_ranges != NULL);
316 1549612 : free (start_point_ranges);
317 1549612 : start_point_ranges = NULL;
318 1549612 : }
319 :
320 : /* Map: program point -> bitmap of all pseudos living at the point and
321 : assigned to hard registers. */
322 : static bitmap_head *live_hard_reg_pseudos;
323 : static bitmap_obstack live_hard_reg_pseudos_bitmap_obstack;
324 :
325 : /* reg_renumber corresponding to pseudos marked in
326 : live_hard_reg_pseudos. reg_renumber might be not matched to
327 : live_hard_reg_pseudos but live_pseudos_reg_renumber always reflects
328 : live_hard_reg_pseudos. */
329 : static int *live_pseudos_reg_renumber;
330 :
331 : /* Sparseset used to calculate living hard reg pseudos for some program
332 : point range. */
333 : static sparseset live_range_hard_reg_pseudos;
334 :
335 : /* Sparseset used to calculate living reload/inheritance pseudos for
336 : some program point range. */
337 : static sparseset live_range_reload_inheritance_pseudos;
338 :
339 : /* Allocate and initialize the data about living pseudos at program
340 : points. */
341 : static void
342 1549612 : init_lives (void)
343 : {
344 1549612 : int i, max_regno = max_reg_num ();
345 :
346 1549612 : live_range_hard_reg_pseudos = sparseset_alloc (max_regno);
347 1549612 : live_range_reload_inheritance_pseudos = sparseset_alloc (max_regno);
348 1549612 : live_hard_reg_pseudos = XNEWVEC (bitmap_head, lra_live_max_point);
349 1549612 : bitmap_obstack_initialize (&live_hard_reg_pseudos_bitmap_obstack);
350 90811310 : for (i = 0; i < lra_live_max_point; i++)
351 87712086 : bitmap_initialize (&live_hard_reg_pseudos[i],
352 : &live_hard_reg_pseudos_bitmap_obstack);
353 1549612 : live_pseudos_reg_renumber = XNEWVEC (int, max_regno);
354 244223580 : for (i = 0; i < max_regno; i++)
355 242673968 : live_pseudos_reg_renumber[i] = -1;
356 1549612 : }
357 :
358 : /* Free the data about living pseudos at program points. */
359 : static void
360 1549612 : finish_lives (void)
361 : {
362 1549612 : sparseset_free (live_range_hard_reg_pseudos);
363 1549612 : sparseset_free (live_range_reload_inheritance_pseudos);
364 1549612 : free (live_hard_reg_pseudos);
365 1549612 : bitmap_obstack_release (&live_hard_reg_pseudos_bitmap_obstack);
366 1549612 : free (live_pseudos_reg_renumber);
367 1549612 : }
368 :
369 : /* Update the LIVE_HARD_REG_PSEUDOS and LIVE_PSEUDOS_REG_RENUMBER
370 : entries for pseudo REGNO. Assume that the register has been
371 : spilled if FREE_P, otherwise assume that it has been assigned
372 : reg_renumber[REGNO] (if >= 0). We also insert the pseudo live
373 : ranges in the start chains when it is assumed to be assigned to a
374 : hard register because we use the chains of pseudos assigned to hard
375 : registers during allocation. */
376 : static void
377 48426001 : update_lives (int regno, bool free_p)
378 : {
379 48426001 : int p;
380 48426001 : lra_live_range_t r;
381 :
382 48426001 : if (reg_renumber[regno] < 0)
383 : return;
384 48426001 : live_pseudos_reg_renumber[regno] = free_p ? -1 : reg_renumber[regno];
385 106120835 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
386 : {
387 607572082 : for (p = r->start; p <= r->finish; p++)
388 549877248 : if (free_p)
389 60433469 : bitmap_clear_bit (&live_hard_reg_pseudos[p], regno);
390 : else
391 : {
392 489443779 : bitmap_set_bit (&live_hard_reg_pseudos[p], regno);
393 489443779 : insert_in_live_range_start_chain (regno);
394 : }
395 : }
396 : }
397 :
398 : /* Sparseset used to calculate reload pseudos conflicting with a given
399 : pseudo when we are trying to find a hard register for the given
400 : pseudo. */
401 : static sparseset conflict_reload_and_inheritance_pseudos;
402 :
403 : /* Map: program point -> bitmap of all reload and inheritance pseudos
404 : living at the point. */
405 : static bitmap_head *live_reload_and_inheritance_pseudos;
406 : static bitmap_obstack live_reload_and_inheritance_pseudos_bitmap_obstack;
407 :
408 : /* Allocate and initialize data about living reload pseudos at any
409 : given program point. */
410 : static void
411 1549612 : init_live_reload_and_inheritance_pseudos (void)
412 : {
413 1549612 : int i, p, max_regno = max_reg_num ();
414 1549612 : lra_live_range_t r;
415 :
416 1549612 : conflict_reload_and_inheritance_pseudos = sparseset_alloc (max_regno);
417 1549612 : live_reload_and_inheritance_pseudos = XNEWVEC (bitmap_head, lra_live_max_point);
418 1549612 : bitmap_obstack_initialize (&live_reload_and_inheritance_pseudos_bitmap_obstack);
419 90811310 : for (p = 0; p < lra_live_max_point; p++)
420 87712086 : bitmap_initialize (&live_reload_and_inheritance_pseudos[p],
421 : &live_reload_and_inheritance_pseudos_bitmap_obstack);
422 1549612 : if ((unsigned) (max_regno - lra_constraint_new_regno_start)
423 1549612 : >= (1U << lra_max_pseudos_points_log2_considered_for_preferences)
424 1549612 : / (lra_live_max_point + 1))
425 16 : return;
426 1549596 : bitmap_head start_points;
427 1549596 : bitmap_initialize (&start_points,
428 : &live_hard_reg_pseudos_bitmap_obstack);
429 13213674 : for (i = lra_constraint_new_regno_start; i < max_regno; i++)
430 22778773 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
431 11114695 : bitmap_set_bit (&start_points, r->start);
432 13213674 : for (i = lra_constraint_new_regno_start; i < max_regno; i++)
433 : {
434 22778773 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
435 : {
436 11114695 : bitmap_iterator bi;
437 11114695 : unsigned p;
438 45268150 : EXECUTE_IF_SET_IN_BITMAP (&start_points, r->start, p, bi)
439 : {
440 44604633 : if (p > (unsigned) r->finish)
441 : break;
442 34153455 : bitmap_set_bit (&live_reload_and_inheritance_pseudos[p], i);
443 : }
444 : }
445 : }
446 1549596 : bitmap_clear (&start_points);
447 : }
448 :
449 : /* Finalize data about living reload pseudos at any given program
450 : point. */
451 : static void
452 1549612 : finish_live_reload_and_inheritance_pseudos (void)
453 : {
454 1549612 : sparseset_free (conflict_reload_and_inheritance_pseudos);
455 1549612 : free (live_reload_and_inheritance_pseudos);
456 1549612 : bitmap_obstack_release (&live_reload_and_inheritance_pseudos_bitmap_obstack);
457 1549612 : }
458 :
459 : /* The value used to check that cost of given hard reg is really
460 : defined currently. */
461 : static int curr_hard_regno_costs_check = 0;
462 : /* Array used to check that cost of the corresponding hard reg (the
463 : array element index) is really defined currently. */
464 : static int hard_regno_costs_check[FIRST_PSEUDO_REGISTER];
465 : /* The current costs of allocation of hard regs. Defined only if the
466 : value of the corresponding element of the previous array is equal to
467 : CURR_HARD_REGNO_COSTS_CHECK. */
468 : static int hard_regno_costs[FIRST_PSEUDO_REGISTER];
469 :
470 : /* Adjust cost of HARD_REGNO by INCR. Reset the cost first if it is
471 : not defined yet. */
472 : static inline void
473 22365916 : adjust_hard_regno_cost (int hard_regno, int incr)
474 : {
475 22365916 : if (hard_regno_costs_check[hard_regno] != curr_hard_regno_costs_check)
476 11834812 : hard_regno_costs[hard_regno] = 0;
477 22365916 : hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check;
478 22365916 : hard_regno_costs[hard_regno] += incr;
479 22365916 : }
480 :
481 : /* Try to find a free hard register for pseudo REGNO. Return the
482 : hard register on success and set *COST to the cost of using
483 : that register. (If several registers have equal cost, the one with
484 : the highest priority wins.) Return -1 on failure.
485 :
486 : If FIRST_P, return the first available hard reg ignoring other
487 : criteria, e.g. allocation cost. This approach results in less hard
488 : reg pool fragmentation and permit to allocate hard regs to reload
489 : pseudos in complicated situations where pseudo sizes are different.
490 :
491 : If TRY_ONLY_HARD_REGNO >= 0, consider only that hard register,
492 : otherwise consider all hard registers in REGNO's class.
493 :
494 : If REGNO_SET is not empty, only hard registers from the set are
495 : considered. */
496 : static int
497 13896708 : find_hard_regno_for_1 (int regno, int *cost, int try_only_hard_regno,
498 : bool first_p, HARD_REG_SET regno_set)
499 : {
500 13896708 : HARD_REG_SET conflict_set;
501 13896708 : int best_cost = INT_MAX, best_priority = INT_MIN, best_usage = INT_MAX;
502 13896708 : lra_live_range_t r;
503 13896708 : int p, i, j, rclass_size, best_hard_regno, priority, hard_regno;
504 13896708 : int hr, conflict_hr, nregs;
505 13896708 : machine_mode biggest_mode;
506 13896708 : unsigned int k, conflict_regno;
507 13896708 : poly_int64 offset;
508 13896708 : int val, biggest_nregs, nregs_diff;
509 13896708 : enum reg_class rclass;
510 13896708 : bitmap_iterator bi;
511 13896708 : bool *rclass_intersect_p;
512 13896708 : HARD_REG_SET impossible_start_hard_regs, available_regs;
513 :
514 27793416 : if (hard_reg_set_empty_p (regno_set))
515 13681403 : conflict_set = lra_no_alloc_regs;
516 : else
517 215305 : conflict_set = ~regno_set | lra_no_alloc_regs;
518 13896708 : rclass = regno_allocno_class_array[regno];
519 13896708 : rclass_intersect_p = ira_reg_classes_intersect_p[rclass];
520 13896708 : curr_hard_regno_costs_check++;
521 13896708 : sparseset_clear (conflict_reload_and_inheritance_pseudos);
522 13896708 : sparseset_clear (live_range_hard_reg_pseudos);
523 13896708 : conflict_set |= lra_reg_info[regno].conflict_hard_regs;
524 13896708 : biggest_mode = lra_reg_info[regno].biggest_mode;
525 29673840 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
526 : {
527 130677342 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi)
528 114900210 : if (rclass_intersect_p[regno_allocno_class_array[k]])
529 101482700 : sparseset_set_bit (live_range_hard_reg_pseudos, k);
530 134713534 : EXECUTE_IF_SET_IN_BITMAP (&live_reload_and_inheritance_pseudos[r->start],
531 : 0, k, bi)
532 118936402 : if (lra_reg_info[k].preferred_hard_regno1 >= 0
533 32798840 : && live_pseudos_reg_renumber[k] < 0
534 30311139 : && rclass_intersect_p[regno_allocno_class_array[k]])
535 28003367 : sparseset_set_bit (conflict_reload_and_inheritance_pseudos, k);
536 2824358649 : for (p = r->start + 1; p <= r->finish; p++)
537 : {
538 2808581517 : lra_live_range_t r2;
539 :
540 2808581517 : for (r2 = start_point_ranges[p];
541 4786251754 : r2 != NULL;
542 1977670237 : r2 = r2->start_next)
543 : {
544 1977670237 : if (live_pseudos_reg_renumber[r2->regno] < 0
545 634117994 : && r2->regno >= lra_constraint_new_regno_start
546 633137474 : && lra_reg_info[r2->regno].preferred_hard_regno1 >= 0
547 363514104 : && rclass_intersect_p[regno_allocno_class_array[r2->regno]])
548 355486831 : sparseset_set_bit (conflict_reload_and_inheritance_pseudos,
549 : r2->regno);
550 1622183406 : else if (live_pseudos_reg_renumber[r2->regno] >= 0
551 1343552243 : && rclass_intersect_p
552 1343552243 : [regno_allocno_class_array[r2->regno]])
553 1237032107 : sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
554 : }
555 : }
556 : }
557 13896708 : if ((hard_regno = lra_reg_info[regno].preferred_hard_regno1) >= 0)
558 : {
559 5664407 : adjust_hard_regno_cost
560 5664407 : (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit1);
561 5664407 : if ((hard_regno = lra_reg_info[regno].preferred_hard_regno2) >= 0)
562 1782186 : adjust_hard_regno_cost
563 1782186 : (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit2);
564 : }
565 : #ifdef STACK_REGS
566 13896708 : if (lra_reg_info[regno].no_stack_p)
567 444141 : for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
568 394792 : SET_HARD_REG_BIT (conflict_set, i);
569 : #endif
570 13896708 : sparseset_clear_bit (conflict_reload_and_inheritance_pseudos, regno);
571 13896708 : val = lra_reg_info[regno].val;
572 13896708 : offset = lra_reg_info[regno].offset;
573 13896708 : impossible_start_hard_regs = lra_reg_info[regno].exclude_start_hard_regs;
574 199294913 : EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno)
575 : {
576 189937295 : conflict_hr = live_pseudos_reg_renumber[conflict_regno];
577 189937295 : if (lra_reg_val_equal_p (conflict_regno, val, offset))
578 : {
579 882678 : conflict_hr = live_pseudos_reg_renumber[conflict_regno];
580 882678 : nregs = hard_regno_nregs (conflict_hr,
581 882678 : lra_reg_info[conflict_regno].biggest_mode);
582 : /* Remember about multi-register pseudos. For example, 2
583 : hard register pseudos can start on the same hard register
584 : but cannot start on HR and HR+1/HR-1. */
585 889236 : for (hr = conflict_hr + 1;
586 889236 : hr < FIRST_PSEUDO_REGISTER && hr < conflict_hr + nregs;
587 : hr++)
588 6558 : SET_HARD_REG_BIT (impossible_start_hard_regs, hr);
589 888024 : for (hr = conflict_hr - 1;
590 888024 : hr >= 0 && (int) end_hard_regno (biggest_mode, hr) > conflict_hr;
591 : hr--)
592 5346 : SET_HARD_REG_BIT (impossible_start_hard_regs, hr);
593 : }
594 : else
595 : {
596 189054617 : machine_mode biggest_conflict_mode
597 189054617 : = lra_reg_info[conflict_regno].biggest_mode;
598 189054617 : int biggest_conflict_nregs
599 189054617 : = hard_regno_nregs (conflict_hr, biggest_conflict_mode);
600 :
601 189054617 : nregs_diff
602 189054617 : = (biggest_conflict_nregs
603 189054617 : - hard_regno_nregs (conflict_hr,
604 189054617 : PSEUDO_REGNO_MODE (conflict_regno)));
605 189054617 : add_to_hard_reg_set (&conflict_set,
606 : biggest_conflict_mode,
607 : conflict_hr
608 : - (WORDS_BIG_ENDIAN ? nregs_diff : 0));
609 378109234 : if (hard_reg_set_subset_p (reg_class_contents[rclass],
610 : conflict_set))
611 : return -1;
612 : }
613 : }
614 19433240 : EXECUTE_IF_SET_IN_SPARSESET (conflict_reload_and_inheritance_pseudos,
615 : conflict_regno)
616 20151244 : if (!lra_reg_val_equal_p (conflict_regno, val, offset))
617 : {
618 9830651 : lra_assert (live_pseudos_reg_renumber[conflict_regno] < 0);
619 9830651 : if ((hard_regno
620 9830651 : = lra_reg_info[conflict_regno].preferred_hard_regno1) >= 0)
621 : {
622 9830651 : adjust_hard_regno_cost
623 9830651 : (hard_regno,
624 : lra_reg_info[conflict_regno].preferred_hard_regno_profit1);
625 9830651 : if ((hard_regno
626 9830651 : = lra_reg_info[conflict_regno].preferred_hard_regno2) >= 0)
627 5088672 : adjust_hard_regno_cost
628 5088672 : (hard_regno,
629 : lra_reg_info[conflict_regno].preferred_hard_regno_profit2);
630 : }
631 : }
632 : /* Make sure that all registers in a multi-word pseudo belong to the
633 : required class. */
634 9357618 : conflict_set |= ~reg_class_contents[rclass];
635 9357618 : lra_assert (rclass != NO_REGS);
636 9357618 : rclass_size = ira_class_hard_regs_num[rclass];
637 9357618 : best_hard_regno = -1;
638 9357618 : hard_regno = ira_class_hard_regs[rclass][0];
639 9357618 : biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode);
640 9357618 : nregs_diff = (biggest_nregs
641 9357618 : - hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno)));
642 9357618 : available_regs = reg_class_contents[rclass] & ~lra_no_alloc_regs;
643 121893740 : for (i = 0; i < rclass_size; i++)
644 : {
645 112608683 : if (try_only_hard_regno >= 0)
646 : hard_regno = try_only_hard_regno;
647 : else
648 112538942 : hard_regno = ira_class_hard_regs[rclass][i];
649 112608683 : if (! overlaps_hard_reg_set_p (conflict_set,
650 112608683 : PSEUDO_REGNO_MODE (regno), hard_regno)
651 58386697 : && targetm.hard_regno_mode_ok (hard_regno, PSEUDO_REGNO_MODE (regno))
652 : /* We cannot use prohibited_class_mode_regs for all classes
653 : because it is not defined for all classes. */
654 58236545 : && (ira_allocno_class_translate[rclass] != rclass
655 22522236 : || ! TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs
656 22522236 : [rclass][biggest_mode],
657 : hard_regno))
658 58236253 : && ! TEST_HARD_REG_BIT (impossible_start_hard_regs, hard_regno)
659 170843143 : && (nregs_diff == 0
660 4499 : || (WORDS_BIG_ENDIAN
661 : ? (hard_regno - nregs_diff >= 0
662 : && TEST_HARD_REG_BIT (available_regs,
663 : hard_regno - nregs_diff))
664 4499 : : TEST_HARD_REG_BIT (available_regs,
665 4499 : hard_regno + nregs_diff))))
666 : {
667 58234078 : if (hard_regno_costs_check[hard_regno]
668 58234078 : != curr_hard_regno_costs_check)
669 : {
670 53052820 : hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check;
671 53052820 : hard_regno_costs[hard_regno] = 0;
672 : }
673 59343986 : for (j = 0;
674 117578064 : j < hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno));
675 : j++)
676 59343986 : if (! crtl->abi->clobbers_full_reg_p (hard_regno + j)
677 59343986 : && ! df_regs_ever_live_p (hard_regno + j))
678 : /* It needs save restore. */
679 12013976 : hard_regno_costs[hard_regno]
680 6006988 : += (2
681 16523245 : * REG_FREQ_FROM_BB (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb)
682 15522232 : + 1);
683 58234078 : priority = targetm.register_priority (hard_regno);
684 49107513 : if (best_hard_regno < 0 || hard_regno_costs[hard_regno] < best_cost
685 105578036 : || (hard_regno_costs[hard_regno] == best_cost
686 24867295 : && (priority > best_priority
687 24774410 : || (targetm.register_usage_leveling_p ()
688 24774410 : && priority == best_priority
689 6369154 : && best_usage > lra_hard_reg_usage[hard_regno]))))
690 : {
691 13600969 : best_hard_regno = hard_regno;
692 13600969 : best_cost = hard_regno_costs[hard_regno];
693 13600969 : best_priority = priority;
694 13600969 : best_usage = lra_hard_reg_usage[hard_regno];
695 : }
696 : }
697 112608683 : if (try_only_hard_regno >= 0 || (first_p && best_hard_regno >= 0))
698 : break;
699 : }
700 9357618 : if (best_hard_regno >= 0)
701 9126565 : *cost = best_cost - lra_reg_info[regno].freq;
702 : return best_hard_regno;
703 : }
704 :
705 : /* A wrapper for find_hard_regno_for_1 (see comments for that function
706 : description). This function tries to find a hard register for
707 : preferred class first if it is worth. */
708 : static int
709 13684108 : find_hard_regno_for (int regno, int *cost, int try_only_hard_regno, bool first_p)
710 : {
711 13684108 : int hard_regno;
712 13684108 : HARD_REG_SET regno_set;
713 :
714 : /* Only original pseudos can have a different preferred class. */
715 13684108 : if (try_only_hard_regno < 0 && regno < lra_new_regno_start)
716 : {
717 1198297 : enum reg_class pref_class = reg_preferred_class (regno);
718 :
719 1198297 : if (regno_allocno_class_array[regno] != pref_class)
720 : {
721 430610 : hard_regno = find_hard_regno_for_1 (regno, cost, -1, first_p,
722 215305 : reg_class_contents[pref_class]);
723 215305 : if (hard_regno >= 0)
724 : return hard_regno;
725 : }
726 : }
727 13681403 : CLEAR_HARD_REG_SET (regno_set);
728 13681403 : return find_hard_regno_for_1 (regno, cost, try_only_hard_regno, first_p,
729 13681403 : regno_set);
730 : }
731 :
732 : /* Current value used for checking elements in
733 : update_hard_regno_preference_check. */
734 : static int curr_update_hard_regno_preference_check;
735 : /* If an element value is equal to the above variable value, then the
736 : corresponding regno has been processed for preference
737 : propagation. */
738 : static int *update_hard_regno_preference_check;
739 :
740 : /* Update the preference for using HARD_REGNO for pseudos that are
741 : connected directly or indirectly with REGNO. Apply divisor DIV
742 : to any preference adjustments.
743 :
744 : The more indirectly a pseudo is connected, the smaller its effect
745 : should be. We therefore increase DIV on each "hop". */
746 : static void
747 9307459 : update_hard_regno_preference (int regno, int hard_regno, int div)
748 : {
749 9307459 : int another_regno, cost;
750 9307459 : lra_copy_t cp, next_cp;
751 :
752 : /* Search depth 5 seems to be enough. */
753 9307459 : if (div > (1 << 5))
754 : return;
755 16975858 : for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp)
756 : {
757 7750260 : if (cp->regno1 == regno)
758 : {
759 3526528 : next_cp = cp->regno1_next;
760 3526528 : another_regno = cp->regno2;
761 : }
762 4223732 : else if (cp->regno2 == regno)
763 : {
764 4223732 : next_cp = cp->regno2_next;
765 4223732 : another_regno = cp->regno1;
766 : }
767 : else
768 0 : gcc_unreachable ();
769 7750260 : if (reg_renumber[another_regno] < 0
770 4208216 : && (update_hard_regno_preference_check[another_regno]
771 4208216 : != curr_update_hard_regno_preference_check))
772 : {
773 2908972 : update_hard_regno_preference_check[another_regno]
774 2908972 : = curr_update_hard_regno_preference_check;
775 2908972 : cost = cp->freq < div ? 1 : cp->freq / div;
776 2908972 : lra_setup_reload_pseudo_preferenced_hard_reg
777 2908972 : (another_regno, hard_regno, cost);
778 2908972 : update_hard_regno_preference (another_regno, hard_regno, div * 2);
779 : }
780 : }
781 : }
782 :
783 : /* Return prefix title for pseudo REGNO. */
784 : static const char *
785 100 : pseudo_prefix_title (int regno)
786 : {
787 100 : return
788 100 : (regno < lra_constraint_new_regno_start ? ""
789 100 : : bitmap_bit_p (&lra_inheritance_pseudos, regno) ? "inheritance "
790 97 : : bitmap_bit_p (&lra_split_regs, regno) ? "split "
791 97 : : bitmap_bit_p (&lra_optional_reload_pseudos, regno) ? "optional reload "
792 94 : : bitmap_bit_p (&lra_subreg_reload_pseudos, regno) ? "subreg reload "
793 100 : : "reload ");
794 : }
795 :
796 : /* Update REG_RENUMBER and other pseudo preferences by assignment of
797 : HARD_REGNO to pseudo REGNO and print about it if PRINT_P. */
798 : void
799 6528004 : lra_setup_reg_renumber (int regno, int hard_regno, bool print_p)
800 : {
801 6528004 : int i, hr;
802 :
803 : /* We cannot just reassign hard register. */
804 6528004 : lra_assert (hard_regno < 0 || reg_renumber[regno] < 0);
805 129517 : if ((hr = hard_regno) < 0)
806 129517 : hr = reg_renumber[regno];
807 6528004 : reg_renumber[regno] = hard_regno;
808 6528004 : lra_assert (hr >= 0);
809 13247870 : for (i = 0; i < hard_regno_nregs (hr, PSEUDO_REGNO_MODE (regno)); i++)
810 6719866 : if (hard_regno < 0)
811 137849 : lra_hard_reg_usage[hr + i] -= lra_reg_info[regno].freq;
812 : else
813 6582017 : lra_hard_reg_usage[hr + i] += lra_reg_info[regno].freq;
814 6528004 : if (print_p && lra_dump_file != NULL)
815 200 : fprintf (lra_dump_file, " Assign %d to %sr%d (freq=%d)\n",
816 100 : reg_renumber[regno], pseudo_prefix_title (regno),
817 100 : regno, lra_reg_info[regno].freq);
818 6528004 : if (hard_regno >= 0)
819 : {
820 6398487 : curr_update_hard_regno_preference_check++;
821 6398487 : update_hard_regno_preference (regno, hard_regno, 1);
822 : }
823 6528004 : }
824 :
825 : /* Pseudos which occur in insns containing a particular pseudo. */
826 : static bitmap_head insn_conflict_pseudos;
827 :
828 : /* Bitmaps used to contain spill pseudos for given pseudo hard regno
829 : and best spill pseudos for given pseudo (and best hard regno). */
830 : static bitmap_head spill_pseudos_bitmap, best_spill_pseudos_bitmap;
831 :
832 : /* Current pseudo check for validity of elements in
833 : TRY_HARD_REG_PSEUDOS. */
834 : static int curr_pseudo_check;
835 : /* Array used for validity of elements in TRY_HARD_REG_PSEUDOS. */
836 : static int try_hard_reg_pseudos_check[FIRST_PSEUDO_REGISTER];
837 : /* Pseudos who hold given hard register at the considered points. */
838 : static bitmap_head try_hard_reg_pseudos[FIRST_PSEUDO_REGISTER];
839 :
840 : /* Set up try_hard_reg_pseudos for given program point P and class
841 : RCLASS. Those are pseudos living at P and assigned to a hard
842 : register of RCLASS. In other words, those are pseudos which can be
843 : spilled to assign a hard register of RCLASS to a pseudo living at
844 : P. */
845 : static void
846 131294 : setup_try_hard_regno_pseudos (int p, enum reg_class rclass)
847 : {
848 131294 : int i, hard_regno;
849 131294 : machine_mode mode;
850 131294 : unsigned int spill_regno;
851 131294 : bitmap_iterator bi;
852 :
853 : /* Find what pseudos could be spilled. */
854 967028 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[p], 0, spill_regno, bi)
855 : {
856 835734 : mode = PSEUDO_REGNO_MODE (spill_regno);
857 835734 : hard_regno = live_pseudos_reg_renumber[spill_regno];
858 835734 : if (overlaps_hard_reg_set_p (reg_class_contents[rclass],
859 : mode, hard_regno))
860 : {
861 1217894 : for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
862 : {
863 616884 : if (try_hard_reg_pseudos_check[hard_regno + i]
864 616884 : != curr_pseudo_check)
865 : {
866 289632 : try_hard_reg_pseudos_check[hard_regno + i]
867 289632 : = curr_pseudo_check;
868 289632 : bitmap_clear (&try_hard_reg_pseudos[hard_regno + i]);
869 : }
870 616884 : bitmap_set_bit (&try_hard_reg_pseudos[hard_regno + i],
871 : spill_regno);
872 : }
873 : }
874 : }
875 131294 : }
876 :
877 : /* Assign temporarily HARD_REGNO to pseudo REGNO. Temporary
878 : assignment means that we might undo the data change. */
879 : static void
880 2046252 : assign_temporarily (int regno, int hard_regno)
881 : {
882 2046252 : int p;
883 2046252 : lra_live_range_t r;
884 :
885 4120780 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
886 : {
887 13440506 : for (p = r->start; p <= r->finish; p++)
888 11365978 : if (hard_regno < 0)
889 5682989 : bitmap_clear_bit (&live_hard_reg_pseudos[p], regno);
890 : else
891 : {
892 5682989 : bitmap_set_bit (&live_hard_reg_pseudos[p], regno);
893 5682989 : insert_in_live_range_start_chain (regno);
894 : }
895 : }
896 2046252 : live_pseudos_reg_renumber[regno] = hard_regno;
897 2046252 : }
898 :
899 : /* Return true iff there is a reason why pseudo SPILL_REGNO should not
900 : be spilled. */
901 : static bool
902 293657 : must_not_spill_p (unsigned spill_regno)
903 : {
904 293657 : if ((pic_offset_table_rtx != NULL
905 84993 : && spill_regno == REGNO (pic_offset_table_rtx))
906 373167 : || ((int) spill_regno >= lra_constraint_new_regno_start
907 28892 : && ! bitmap_bit_p (&lra_inheritance_pseudos, spill_regno)
908 14409 : && ! bitmap_bit_p (&lra_split_regs, spill_regno)
909 12557 : && ! bitmap_bit_p (&lra_subreg_reload_pseudos, spill_regno)
910 12557 : && ! bitmap_bit_p (&lra_optional_reload_pseudos, spill_regno)))
911 16270 : return true;
912 : /* A reload pseudo that requires a singleton register class should
913 : not be spilled.
914 : FIXME: this mitigates the issue on certain i386 patterns, but
915 : does not solve the general case where existing reloads fully
916 : cover a limited register class. */
917 277387 : if (!bitmap_bit_p (&non_reload_pseudos, spill_regno)
918 259282 : && reg_class_size [reg_preferred_class (spill_regno)] == 1
919 292122 : && reg_alternate_class (spill_regno) == NO_REGS)
920 : return true;
921 : return false;
922 : }
923 :
924 : /* Array used for sorting reload pseudos for subsequent allocation
925 : after spilling some pseudo. */
926 : static int *sorted_reload_pseudos;
927 :
928 : /* Spill some pseudos for a reload pseudo REGNO and return hard
929 : register which should be used for pseudo after spilling. The
930 : function adds spilled pseudos to SPILLED_PSEUDO_BITMAP. When we
931 : choose hard register (and pseudos occupying the hard registers and
932 : to be spilled), we take into account not only how REGNO will
933 : benefit from the spills but also how other reload pseudos not yet
934 : assigned to hard registers benefit from the spills too. In very
935 : rare cases, the function can fail and return -1.
936 :
937 : If FIRST_P, return the first available hard reg ignoring other
938 : criteria, e.g. allocation cost and cost of spilling non-reload
939 : pseudos. This approach results in less hard reg pool fragmentation
940 : and permit to allocate hard regs to reload pseudos in complicated
941 : situations where pseudo sizes are different. */
942 : static int
943 55042 : spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
944 : {
945 55042 : int i, j, n, p, hard_regno, best_hard_regno, cost, best_cost, rclass_size;
946 55042 : int reload_hard_regno, reload_cost;
947 55042 : bool static_p, best_static_p;
948 55042 : machine_mode mode;
949 55042 : enum reg_class rclass;
950 55042 : unsigned int spill_regno, reload_regno, uid;
951 55042 : int insn_pseudos_num, best_insn_pseudos_num;
952 55042 : int bad_spills_num, smallest_bad_spills_num;
953 55042 : lra_live_range_t r;
954 55042 : bitmap_iterator bi;
955 :
956 55042 : rclass = regno_allocno_class_array[regno];
957 55042 : lra_assert (reg_renumber[regno] < 0 && rclass != NO_REGS);
958 55042 : bitmap_clear (&insn_conflict_pseudos);
959 55042 : bitmap_clear (&best_spill_pseudos_bitmap);
960 162036 : EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi)
961 : {
962 106994 : struct lra_insn_reg *ir;
963 :
964 360834 : for (ir = lra_get_insn_regs (uid); ir != NULL; ir = ir->next)
965 253840 : if (ir->regno >= FIRST_PSEUDO_REGISTER)
966 244513 : bitmap_set_bit (&insn_conflict_pseudos, ir->regno);
967 : }
968 55042 : best_hard_regno = -1;
969 55042 : best_cost = INT_MAX;
970 55042 : best_static_p = true;
971 55042 : best_insn_pseudos_num = INT_MAX;
972 55042 : smallest_bad_spills_num = INT_MAX;
973 55042 : rclass_size = ira_class_hard_regs_num[rclass];
974 55042 : mode = PSEUDO_REGNO_MODE (regno);
975 : /* Invalidate try_hard_reg_pseudos elements. */
976 55042 : curr_pseudo_check++;
977 114664 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
978 190916 : for (p = r->start; p <= r->finish; p++)
979 131294 : setup_try_hard_regno_pseudos (p, rclass);
980 413935 : for (i = 0; i < rclass_size; i++)
981 : {
982 358893 : hard_regno = ira_class_hard_regs[rclass][i];
983 358893 : bitmap_clear (&spill_pseudos_bitmap);
984 730038 : for (j = hard_regno_nregs (hard_regno, mode) - 1; j >= 0; j--)
985 : {
986 371145 : if (hard_regno + j >= FIRST_PSEUDO_REGISTER)
987 : break;
988 371145 : if (try_hard_reg_pseudos_check[hard_regno + j] != curr_pseudo_check)
989 74876 : continue;
990 296269 : lra_assert (!bitmap_empty_p (&try_hard_reg_pseudos[hard_regno + j]));
991 296269 : bitmap_ior_into (&spill_pseudos_bitmap,
992 296269 : &try_hard_reg_pseudos[hard_regno + j]);
993 : }
994 : /* Spill pseudos. */
995 358893 : static_p = false;
996 635719 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
997 293657 : if (must_not_spill_p (spill_regno))
998 16831 : goto fail;
999 276826 : else if (non_spilled_static_chain_regno_p (spill_regno))
1000 0 : static_p = true;
1001 342062 : insn_pseudos_num = 0;
1002 342062 : bad_spills_num = 0;
1003 342062 : if (lra_dump_file != NULL)
1004 0 : fprintf (lra_dump_file, " Trying %d:", hard_regno);
1005 342062 : sparseset_clear (live_range_reload_inheritance_pseudos);
1006 618668 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1007 : {
1008 276606 : if (bitmap_bit_p (&insn_conflict_pseudos, spill_regno))
1009 45446 : insn_pseudos_num++;
1010 276606 : if (spill_regno >= (unsigned int) lra_bad_spill_regno_start)
1011 0 : bad_spills_num++;
1012 276606 : for (r = lra_reg_info[spill_regno].live_ranges;
1013 908843 : r != NULL;
1014 632237 : r = r->next)
1015 : {
1016 56048546 : for (p = r->start; p <= r->finish; p++)
1017 : {
1018 55416309 : lra_live_range_t r2;
1019 :
1020 55416309 : for (r2 = start_point_ranges[p];
1021 95360501 : r2 != NULL;
1022 39944192 : r2 = r2->start_next)
1023 39944192 : if (r2->regno >= lra_constraint_new_regno_start)
1024 22867400 : sparseset_set_bit (live_range_reload_inheritance_pseudos,
1025 : r2->regno);
1026 : }
1027 : }
1028 : }
1029 342062 : n = 0;
1030 342062 : if (sparseset_cardinality (live_range_reload_inheritance_pseudos)
1031 342062 : <= (unsigned)param_lra_max_considered_reload_pseudos)
1032 14134780 : EXECUTE_IF_SET_IN_SPARSESET (live_range_reload_inheritance_pseudos,
1033 : reload_regno)
1034 6729934 : if ((int) reload_regno != regno
1035 6478226 : && (ira_reg_classes_intersect_p
1036 6478226 : [rclass][regno_allocno_class_array[reload_regno]])
1037 5675856 : && live_pseudos_reg_renumber[reload_regno] < 0
1038 10090417 : && find_hard_regno_for (reload_regno, &cost, -1, first_p) < 0)
1039 1577908 : sorted_reload_pseudos[n++] = reload_regno;
1040 618668 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1041 : {
1042 276606 : update_lives (spill_regno, true);
1043 276606 : if (lra_dump_file != NULL)
1044 0 : fprintf (lra_dump_file, " spill %d(freq=%d)",
1045 0 : spill_regno, lra_reg_info[spill_regno].freq);
1046 : }
1047 342062 : hard_regno = find_hard_regno_for (regno, &cost, -1, first_p);
1048 342062 : if (hard_regno >= 0)
1049 : {
1050 263521 : assign_temporarily (regno, hard_regno);
1051 263521 : qsort (sorted_reload_pseudos, n, sizeof (int),
1052 : reload_pseudo_compare_func);
1053 2098187 : for (j = 0; j < n; j++)
1054 : {
1055 1571145 : reload_regno = sorted_reload_pseudos[j];
1056 1571145 : lra_assert (live_pseudos_reg_renumber[reload_regno] < 0);
1057 3142290 : if ((reload_hard_regno
1058 1571145 : = find_hard_regno_for (reload_regno,
1059 : &reload_cost, -1, first_p)) >= 0)
1060 : {
1061 759605 : if (lra_dump_file != NULL)
1062 0 : fprintf (lra_dump_file, " assign %d(cost=%d)",
1063 : reload_regno, reload_cost);
1064 759605 : assign_temporarily (reload_regno, reload_hard_regno);
1065 759605 : cost += reload_cost;
1066 : }
1067 : }
1068 530420 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1069 : {
1070 266899 : rtx_insn_list *x;
1071 :
1072 266899 : cost += lra_reg_info[spill_regno].freq;
1073 266899 : if (ira_reg_equiv[spill_regno].memory != NULL
1074 258014 : || ira_reg_equiv[spill_regno].constant != NULL)
1075 10442 : for (x = ira_reg_equiv[spill_regno].init_insns;
1076 19459 : x != NULL;
1077 9017 : x = x->next ())
1078 26657 : cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (x->insn ()));
1079 : }
1080 : /* Avoid spilling static chain pointer pseudo when non-local
1081 : goto is used. */
1082 263521 : if ((! static_p && best_static_p)
1083 216645 : || (static_p == best_static_p
1084 216645 : && (best_insn_pseudos_num > insn_pseudos_num
1085 210061 : || (best_insn_pseudos_num == insn_pseudos_num
1086 190533 : && (bad_spills_num < smallest_bad_spills_num
1087 190533 : || (bad_spills_num == smallest_bad_spills_num
1088 190533 : && best_cost > cost))))))
1089 : {
1090 91175 : best_insn_pseudos_num = insn_pseudos_num;
1091 91175 : smallest_bad_spills_num = bad_spills_num;
1092 91175 : best_static_p = static_p;
1093 91175 : best_cost = cost;
1094 91175 : best_hard_regno = hard_regno;
1095 91175 : bitmap_copy (&best_spill_pseudos_bitmap, &spill_pseudos_bitmap);
1096 91175 : if (lra_dump_file != NULL)
1097 0 : fprintf (lra_dump_file,
1098 : " Now best %d(cost=%d, bad_spills=%d, insn_pseudos=%d)\n",
1099 : hard_regno, cost, bad_spills_num, insn_pseudos_num);
1100 : }
1101 263521 : assign_temporarily (regno, -1);
1102 2098187 : for (j = 0; j < n; j++)
1103 : {
1104 1571145 : reload_regno = sorted_reload_pseudos[j];
1105 1571145 : if (live_pseudos_reg_renumber[reload_regno] >= 0)
1106 759605 : assign_temporarily (reload_regno, -1);
1107 : }
1108 : }
1109 342062 : if (lra_dump_file != NULL)
1110 0 : fprintf (lra_dump_file, "\n");
1111 : /* Restore the live hard reg pseudo info for spilled pseudos. */
1112 618668 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1113 276606 : update_lives (spill_regno, false);
1114 342062 : fail:
1115 358893 : ;
1116 : }
1117 : /* Spill: */
1118 102331 : EXECUTE_IF_SET_IN_BITMAP (&best_spill_pseudos_bitmap, 0, spill_regno, bi)
1119 : {
1120 47289 : if ((int) spill_regno >= lra_constraint_new_regno_start)
1121 4209 : former_reload_pseudo_spill_p = true;
1122 47289 : if (lra_dump_file != NULL)
1123 0 : fprintf (lra_dump_file, " Spill %sr%d(hr=%d, freq=%d) for r%d\n",
1124 : pseudo_prefix_title (spill_regno),
1125 0 : spill_regno, reg_renumber[spill_regno],
1126 0 : lra_reg_info[spill_regno].freq, regno);
1127 47289 : update_lives (spill_regno, true);
1128 47289 : lra_setup_reg_renumber (spill_regno, -1, false);
1129 : }
1130 55042 : bitmap_ior_into (spilled_pseudo_bitmap, &best_spill_pseudos_bitmap);
1131 55042 : return best_hard_regno;
1132 : }
1133 :
1134 : /* Assign HARD_REGNO to REGNO. */
1135 : static void
1136 6398440 : assign_hard_regno (int hard_regno, int regno)
1137 : {
1138 6398440 : int i;
1139 :
1140 6398440 : lra_assert (hard_regno >= 0);
1141 6398440 : lra_setup_reg_renumber (regno, hard_regno, true);
1142 6398440 : update_lives (regno, false);
1143 12982608 : for (i = 0;
1144 12982608 : i < hard_regno_nregs (hard_regno, lra_reg_info[regno].biggest_mode);
1145 : i++)
1146 6584168 : df_set_regs_ever_live (hard_regno + i, true);
1147 6398440 : }
1148 :
1149 : /* Array used for sorting different pseudos. */
1150 : static int *sorted_pseudos;
1151 :
1152 : /* The constraints pass is allowed to create equivalences between
1153 : pseudos that make the current allocation "incorrect" (in the sense
1154 : that pseudos are assigned to hard registers from their own conflict
1155 : sets). The global variable check_and_force_assignment_correctness_p says
1156 : whether this might have happened.
1157 :
1158 : Process pseudos assigned to hard registers (less frequently used
1159 : first), spill if a conflict is found, and mark the spilled pseudos
1160 : in SPILLED_PSEUDO_BITMAP. Set up LIVE_HARD_REG_PSEUDOS from
1161 : pseudos, assigned to hard registers. */
1162 : static void
1163 1549612 : setup_live_pseudos_and_spill_after_risky_transforms (bitmap
1164 : spilled_pseudo_bitmap)
1165 : {
1166 1549612 : int p, i, j, n, regno, hard_regno, biggest_nregs, nregs_diff;
1167 1549612 : unsigned int k, conflict_regno;
1168 1549612 : poly_int64 offset;
1169 1549612 : int val;
1170 1549612 : HARD_REG_SET conflict_set;
1171 1549612 : machine_mode mode, biggest_mode;
1172 1549612 : lra_live_range_t r;
1173 1549612 : bitmap_iterator bi;
1174 1549612 : int max_regno = max_reg_num ();
1175 :
1176 1549612 : if (! check_and_force_assignment_correctness_p)
1177 : {
1178 21038082 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1179 20979430 : if (reg_renumber[i] >= 0 && lra_reg_info[i].nrefs > 0)
1180 10129724 : update_lives (i, false);
1181 58652 : return;
1182 : }
1183 80621194 : for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1184 79130234 : if ((pic_offset_table_rtx == NULL_RTX
1185 7157763 : || i != (int) REGNO (pic_offset_table_rtx))
1186 86238917 : && (hard_regno = reg_renumber[i]) >= 0 && lra_reg_info[i].nrefs > 0)
1187 : {
1188 31184069 : biggest_mode = lra_reg_info[i].biggest_mode;
1189 31184069 : biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode);
1190 31184069 : nregs_diff = (biggest_nregs
1191 31184069 : - hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (i)));
1192 31184069 : enum reg_class rclass = lra_get_allocno_class (i);
1193 :
1194 31184069 : if ((WORDS_BIG_ENDIAN
1195 : && (hard_regno - nregs_diff < 0
1196 : || !TEST_HARD_REG_BIT (reg_class_contents[rclass],
1197 : hard_regno - nregs_diff)))
1198 : || (!WORDS_BIG_ENDIAN
1199 31184069 : && (hard_regno + nregs_diff >= FIRST_PSEUDO_REGISTER
1200 31184069 : || !TEST_HARD_REG_BIT (reg_class_contents[rclass],
1201 : hard_regno + nregs_diff))))
1202 : {
1203 : /* Hard registers of paradoxical sub-registers are out of
1204 : range of pseudo register class. Spill the pseudo. */
1205 0 : reg_renumber[i] = -1;
1206 0 : continue;
1207 : }
1208 31184069 : sorted_pseudos[n++] = i;
1209 : }
1210 1490960 : qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func);
1211 1490960 : if (pic_offset_table_rtx != NULL_RTX
1212 49080 : && (regno = REGNO (pic_offset_table_rtx)) >= FIRST_PSEUDO_REGISTER
1213 1540040 : && reg_renumber[regno] >= 0 && lra_reg_info[regno].nrefs > 0)
1214 43146 : sorted_pseudos[n++] = regno;
1215 32718175 : for (i = n - 1; i >= 0; i--)
1216 : {
1217 31227215 : regno = sorted_pseudos[i];
1218 31227215 : hard_regno = reg_renumber[regno];
1219 31227215 : lra_assert (hard_regno >= 0);
1220 31227215 : mode = lra_reg_info[regno].biggest_mode;
1221 31227215 : sparseset_clear (live_range_hard_reg_pseudos);
1222 68054015 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
1223 : {
1224 84649245 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi)
1225 47822445 : sparseset_set_bit (live_range_hard_reg_pseudos, k);
1226 271755249 : for (p = r->start + 1; p <= r->finish; p++)
1227 : {
1228 234928449 : lra_live_range_t r2;
1229 :
1230 234928449 : for (r2 = start_point_ranges[p];
1231 361752415 : r2 != NULL;
1232 126823966 : r2 = r2->start_next)
1233 126823966 : if (live_pseudos_reg_renumber[r2->regno] >= 0)
1234 68130673 : sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
1235 : }
1236 : }
1237 31227215 : conflict_set = lra_no_alloc_regs;
1238 31227215 : conflict_set |= lra_reg_info[regno].conflict_hard_regs;
1239 31227215 : val = lra_reg_info[regno].val;
1240 31227215 : offset = lra_reg_info[regno].offset;
1241 126913472 : EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno)
1242 95686257 : if (!lra_reg_val_equal_p (conflict_regno, val, offset)
1243 : /* If it is multi-register pseudos they should start on
1244 : the same hard register. */
1245 80908 : || hard_regno != reg_renumber[conflict_regno])
1246 : {
1247 95616406 : int conflict_hard_regno = reg_renumber[conflict_regno];
1248 :
1249 95616406 : biggest_mode = lra_reg_info[conflict_regno].biggest_mode;
1250 95616406 : biggest_nregs = hard_regno_nregs (conflict_hard_regno,
1251 : biggest_mode);
1252 95616406 : nregs_diff
1253 95616406 : = (biggest_nregs
1254 95616406 : - hard_regno_nregs (conflict_hard_regno,
1255 95616406 : PSEUDO_REGNO_MODE (conflict_regno)));
1256 95616406 : add_to_hard_reg_set (&conflict_set,
1257 : biggest_mode,
1258 : conflict_hard_regno
1259 : - (WORDS_BIG_ENDIAN ? nregs_diff : 0));
1260 : }
1261 31227215 : if (! overlaps_hard_reg_set_p (conflict_set, mode, hard_regno))
1262 : {
1263 31215108 : update_lives (regno, false);
1264 31215108 : continue;
1265 : }
1266 12107 : bitmap_set_bit (spilled_pseudo_bitmap, regno);
1267 12107 : for (j = 0;
1268 32165 : j < hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno));
1269 : j++)
1270 20058 : lra_hard_reg_usage[hard_regno + j] -= lra_reg_info[regno].freq;
1271 12107 : reg_renumber[regno] = -1;
1272 12107 : if (regno >= lra_constraint_new_regno_start)
1273 0 : former_reload_pseudo_spill_p = true;
1274 12107 : if (lra_dump_file != NULL)
1275 0 : fprintf (lra_dump_file, " Spill r%d after risky transformations\n",
1276 : regno);
1277 : }
1278 : }
1279 :
1280 : /* Improve allocation by assigning the same hard regno of inheritance
1281 : pseudos to the connected pseudos. We need this because inheritance
1282 : pseudos are allocated after reload pseudos in the thread and when
1283 : we assign a hard register to a reload pseudo we don't know yet that
1284 : the connected inheritance pseudos can get the same hard register.
1285 : Add pseudos with changed allocation to bitmap CHANGED_PSEUDOS. */
1286 : static void
1287 1549612 : improve_inheritance (bitmap changed_pseudos)
1288 : {
1289 1549612 : unsigned int k;
1290 1549612 : int regno, another_regno, hard_regno, another_hard_regno, cost, i, n;
1291 1549612 : lra_copy_t cp, next_cp;
1292 1549612 : bitmap_iterator bi;
1293 :
1294 1549612 : if (lra_inheritance_iter > LRA_MAX_INHERITANCE_PASSES)
1295 5111 : return;
1296 1544501 : n = 0;
1297 3405614 : EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, k, bi)
1298 1861113 : if (reg_renumber[k] >= 0 && lra_reg_info[k].nrefs != 0)
1299 1248164 : sorted_pseudos[n++] = k;
1300 1544501 : qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func);
1301 4337166 : for (i = 0; i < n; i++)
1302 : {
1303 1248164 : regno = sorted_pseudos[i];
1304 1248164 : hard_regno = reg_renumber[regno];
1305 1248164 : lra_assert (hard_regno >= 0);
1306 3605710 : for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp)
1307 : {
1308 2357546 : if (cp->regno1 == regno)
1309 : {
1310 408433 : next_cp = cp->regno1_next;
1311 408433 : another_regno = cp->regno2;
1312 : }
1313 1949113 : else if (cp->regno2 == regno)
1314 : {
1315 1949113 : next_cp = cp->regno2_next;
1316 1949113 : another_regno = cp->regno1;
1317 : }
1318 : else
1319 0 : gcc_unreachable ();
1320 : /* Don't change reload pseudo allocation. It might have
1321 : this allocation for a purpose and changing it can result
1322 : in LRA cycling. */
1323 2357546 : if ((another_regno < lra_constraint_new_regno_start
1324 2357546 : || bitmap_bit_p (&lra_inheritance_pseudos, another_regno))
1325 839152 : && (another_hard_regno = reg_renumber[another_regno]) >= 0
1326 3085202 : && another_hard_regno != hard_regno)
1327 : {
1328 69741 : if (lra_dump_file != NULL)
1329 1 : fprintf
1330 1 : (lra_dump_file,
1331 : " Improving inheritance for %d(%d) and %d(%d)...\n",
1332 : regno, hard_regno, another_regno, another_hard_regno);
1333 69741 : update_lives (another_regno, true);
1334 69741 : lra_setup_reg_renumber (another_regno, -1, false);
1335 69741 : if (hard_regno == find_hard_regno_for (another_regno, &cost,
1336 : hard_regno, false))
1337 39041 : assign_hard_regno (hard_regno, another_regno);
1338 : else
1339 30700 : assign_hard_regno (another_hard_regno, another_regno);
1340 69741 : bitmap_set_bit (changed_pseudos, another_regno);
1341 : }
1342 : }
1343 : }
1344 : }
1345 :
1346 :
1347 : /* Bitmap finally containing all pseudos spilled on this assignment
1348 : pass. */
1349 : static bitmap_head all_spilled_pseudos;
1350 : /* All pseudos whose allocation was changed. */
1351 : static bitmap_head changed_pseudo_bitmap;
1352 :
1353 :
1354 : /* Add to LIVE_RANGE_HARD_REG_PSEUDOS all pseudos conflicting with
1355 : REGNO and whose hard regs can be assigned to REGNO. */
1356 : static void
1357 4309 : find_all_spills_for (int regno)
1358 : {
1359 4309 : int p;
1360 4309 : lra_live_range_t r;
1361 4309 : unsigned int k;
1362 4309 : bitmap_iterator bi;
1363 4309 : enum reg_class rclass;
1364 4309 : bool *rclass_intersect_p;
1365 :
1366 4309 : rclass = regno_allocno_class_array[regno];
1367 4309 : rclass_intersect_p = ira_reg_classes_intersect_p[rclass];
1368 10897 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
1369 : {
1370 27012 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi)
1371 20424 : if (rclass_intersect_p[regno_allocno_class_array[k]])
1372 12269 : sparseset_set_bit (live_range_hard_reg_pseudos, k);
1373 14079 : for (p = r->start + 1; p <= r->finish; p++)
1374 : {
1375 7491 : lra_live_range_t r2;
1376 :
1377 7491 : for (r2 = start_point_ranges[p];
1378 16950 : r2 != NULL;
1379 9459 : r2 = r2->start_next)
1380 : {
1381 9459 : if (live_pseudos_reg_renumber[r2->regno] >= 0
1382 9395 : && ! sparseset_bit_p (live_range_hard_reg_pseudos, r2->regno)
1383 18851 : && rclass_intersect_p[regno_allocno_class_array[r2->regno]])
1384 9391 : sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
1385 : }
1386 : }
1387 : }
1388 4309 : }
1389 :
1390 : /* Assign hard registers to reload pseudos and other pseudos. Return
1391 : true if we was not able to assign hard registers to all reload
1392 : pseudos. */
1393 : static bool
1394 1549612 : assign_by_spills (void)
1395 : {
1396 1549612 : int i, n, nfails, iter, regno, regno2, hard_regno, cost;
1397 1549612 : rtx restore_rtx;
1398 1549612 : bitmap_head changed_insns, do_not_assign_nonreload_pseudos;
1399 1549612 : unsigned int u, conflict_regno;
1400 1549612 : bitmap_iterator bi;
1401 1549612 : bool reload_p, fails_p = false;
1402 1549612 : int max_regno = max_reg_num ();
1403 :
1404 13378250 : for (n = 0, i = lra_constraint_new_regno_start; i < max_regno; i++)
1405 11828638 : if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0
1406 7620235 : && regno_allocno_class_array[i] != NO_REGS)
1407 6660730 : sorted_pseudos[n++] = i;
1408 1549612 : bitmap_initialize (&insn_conflict_pseudos, ®_obstack);
1409 1549612 : bitmap_initialize (&spill_pseudos_bitmap, ®_obstack);
1410 1549612 : bitmap_initialize (&best_spill_pseudos_bitmap, ®_obstack);
1411 1549612 : update_hard_regno_preference_check = XCNEWVEC (int, max_regno);
1412 1549612 : curr_update_hard_regno_preference_check = 0;
1413 1549612 : memset (try_hard_reg_pseudos_check, 0, sizeof (try_hard_reg_pseudos_check));
1414 144113916 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1415 142564304 : bitmap_initialize (&try_hard_reg_pseudos[i], ®_obstack);
1416 1549612 : curr_pseudo_check = 0;
1417 1549612 : bitmap_initialize (&changed_insns, ®_obstack);
1418 1549612 : bitmap_initialize (&non_reload_pseudos, ®_obstack);
1419 1549612 : bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs);
1420 1549612 : bitmap_ior_into (&non_reload_pseudos, &lra_subreg_reload_pseudos);
1421 1549612 : bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos);
1422 1549612 : for (iter = 0; iter <= 1; iter++)
1423 : {
1424 1552229 : qsort (sorted_pseudos, n, sizeof (int), reload_pseudo_compare_func);
1425 1552229 : nfails = 0;
1426 8221997 : for (i = 0; i < n; i++)
1427 : {
1428 6669768 : regno = sorted_pseudos[i];
1429 6669768 : if (reg_renumber[regno] >= 0)
1430 484 : continue;
1431 6669284 : if (lra_dump_file != NULL)
1432 198 : fprintf (lra_dump_file, " Assigning to %d "
1433 : "(cl=%s, orig=%d, freq=%d, tfirst=%d, tfreq=%d)...\n",
1434 99 : regno, reg_class_names[regno_allocno_class_array[regno]],
1435 99 : ORIGINAL_REGNO (regno_reg_rtx[regno]),
1436 99 : lra_reg_info[regno].freq, regno_assign_info[regno].first,
1437 99 : regno_assign_info[regno_assign_info[regno].first].freq);
1438 6669284 : hard_regno = find_hard_regno_for (regno, &cost, -1, iter == 1);
1439 6669284 : reload_p = ! bitmap_bit_p (&non_reload_pseudos, regno);
1440 6669284 : if (hard_regno < 0 && reload_p)
1441 55042 : hard_regno = spill_for (regno, &all_spilled_pseudos, iter == 1);
1442 6669284 : if (hard_regno < 0)
1443 : {
1444 470493 : if (reload_p)
1445 : {
1446 : /* Put unassigned reload pseudo first in the array. */
1447 8166 : regno2 = sorted_pseudos[nfails];
1448 8166 : sorted_pseudos[nfails++] = regno;
1449 8166 : sorted_pseudos[i] = regno2;
1450 : }
1451 : else
1452 : {
1453 : /* Consider all alternatives on the next constraint
1454 : subpass. */
1455 462327 : bitmap_set_bit (&all_spilled_pseudos, regno);
1456 : }
1457 : }
1458 : else
1459 : {
1460 : /* This register might have been spilled by the previous
1461 : pass. Indicate that it is no longer spilled. */
1462 6198791 : bitmap_clear_bit (&all_spilled_pseudos, regno);
1463 6198791 : assign_hard_regno (hard_regno, regno);
1464 6198791 : if (! reload_p || regno_allocno_class_array[regno] == ALL_REGS)
1465 : /* As non-reload pseudo assignment is changed we should
1466 : reconsider insns referring for the pseudo. Do the same if a
1467 : reload pseudo did not refine its class which can happens
1468 : when the pseudo occurs only in reload insns. */
1469 1368414 : bitmap_set_bit (&changed_pseudo_bitmap, regno);
1470 : }
1471 : }
1472 1552229 : if (nfails == 0 || iter > 0)
1473 : {
1474 1549612 : fails_p = nfails != 0;
1475 1549612 : break;
1476 : }
1477 : /* This is a very rare event. We cannot assign a hard register
1478 : to reload pseudo because the hard register was assigned to
1479 : another reload pseudo on a previous assignment pass. For x86
1480 : example, on the 1st pass we assigned CX (although another
1481 : hard register could be used for this) to reload pseudo in an
1482 : insn, on the 2nd pass we need CX (and only this) hard
1483 : register for a new reload pseudo in the same insn. Another
1484 : possible situation may occur in assigning to multi-regs
1485 : reload pseudos when hard regs pool is too fragmented even
1486 : after spilling non-reload pseudos.
1487 :
1488 : We should do something radical here to succeed. Here we
1489 : spill *all* conflicting pseudos and reassign them. */
1490 2617 : if (lra_dump_file != NULL)
1491 0 : fprintf (lra_dump_file, " 2nd iter for reload pseudo assignments:\n");
1492 2617 : sparseset_clear (live_range_hard_reg_pseudos);
1493 6926 : for (i = 0; i < nfails; i++)
1494 : {
1495 4309 : if (lra_dump_file != NULL)
1496 0 : fprintf (lra_dump_file, " Reload r%d assignment failure\n",
1497 0 : sorted_pseudos[i]);
1498 4309 : find_all_spills_for (sorted_pseudos[i]);
1499 : }
1500 27591 : EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno)
1501 : {
1502 12487 : if ((int) conflict_regno >= lra_constraint_new_regno_start)
1503 : {
1504 2323 : sorted_pseudos[nfails++] = conflict_regno;
1505 2323 : former_reload_pseudo_spill_p = true;
1506 : }
1507 : else
1508 : /* It is better to do reloads before spilling as after the
1509 : spill-subpass we will reload memory instead of pseudos
1510 : and this will make reusing reload pseudos more
1511 : complicated. Going directly to the spill pass in such
1512 : case might result in worse code performance or even LRA
1513 : cycling if we have few registers. */
1514 10164 : bitmap_set_bit (&all_spilled_pseudos, conflict_regno);
1515 12487 : if (lra_dump_file != NULL)
1516 0 : fprintf (lra_dump_file, " Spill %s r%d(hr=%d, freq=%d)\n",
1517 : pseudo_prefix_title (conflict_regno), conflict_regno,
1518 0 : reg_renumber[conflict_regno],
1519 0 : lra_reg_info[conflict_regno].freq);
1520 12487 : update_lives (conflict_regno, true);
1521 12487 : lra_setup_reg_renumber (conflict_regno, -1, false);
1522 : }
1523 2617 : if (n < nfails)
1524 : n = nfails;
1525 : }
1526 1549612 : improve_inheritance (&changed_pseudo_bitmap);
1527 1549612 : bitmap_clear (&non_reload_pseudos);
1528 1549612 : bitmap_clear (&changed_insns);
1529 1549612 : if (! lra_simple_p)
1530 : {
1531 : /* We should not assign to original pseudos of inheritance
1532 : pseudos or split pseudos if any its inheritance pseudo did
1533 : not get hard register or any its split pseudo was not split
1534 : because undo inheritance/split pass will extend live range of
1535 : such inheritance or split pseudos. */
1536 1549606 : bitmap_initialize (&do_not_assign_nonreload_pseudos, ®_obstack);
1537 3591365 : EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, u, bi)
1538 2041759 : if ((restore_rtx = lra_reg_info[u].restore_rtx) != NULL_RTX
1539 1177100 : && REG_P (restore_rtx)
1540 1154649 : && reg_renumber[u] < 0
1541 2476331 : && bitmap_bit_p (&lra_inheritance_pseudos, u))
1542 434572 : bitmap_set_bit (&do_not_assign_nonreload_pseudos, REGNO (restore_rtx));
1543 2524250 : EXECUTE_IF_SET_IN_BITMAP (&lra_split_regs, 0, u, bi)
1544 974644 : if ((restore_rtx = lra_reg_info[u].restore_rtx) != NULL_RTX
1545 974644 : && reg_renumber[u] >= 0)
1546 : {
1547 861 : lra_assert (REG_P (restore_rtx));
1548 861 : bitmap_set_bit (&do_not_assign_nonreload_pseudos, REGNO (restore_rtx));
1549 : }
1550 101429007 : for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1551 99879401 : if (((i < lra_constraint_new_regno_start
1552 88054457 : && ! bitmap_bit_p (&do_not_assign_nonreload_pseudos, i))
1553 12121624 : || (bitmap_bit_p (&lra_inheritance_pseudos, i)
1554 2041759 : && lra_reg_info[i].restore_rtx != NULL_RTX)
1555 10944524 : || (bitmap_bit_p (&lra_split_regs, i)
1556 974644 : && lra_reg_info[i].restore_rtx != NULL_RTX)
1557 10280053 : || bitmap_bit_p (&lra_subreg_reload_pseudos, i)
1558 10279594 : || bitmap_bit_p (&lra_optional_reload_pseudos, i))
1559 90712531 : && reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0
1560 102253475 : && regno_allocno_class_array[i] != NO_REGS)
1561 1671393 : sorted_pseudos[n++] = i;
1562 1549606 : bitmap_clear (&do_not_assign_nonreload_pseudos);
1563 1549606 : if (n != 0 && lra_dump_file != NULL)
1564 2 : fprintf (lra_dump_file, " Reassigning non-reload pseudos\n");
1565 1549606 : qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func);
1566 3220999 : for (i = 0; i < n; i++)
1567 : {
1568 1671393 : regno = sorted_pseudos[i];
1569 1671393 : hard_regno = find_hard_regno_for (regno, &cost, -1, false);
1570 1671393 : if (hard_regno >= 0)
1571 : {
1572 129908 : assign_hard_regno (hard_regno, regno);
1573 : /* We change allocation for non-reload pseudo on this
1574 : iteration -- mark the pseudo for invalidation of used
1575 : alternatives of insns containing the pseudo. */
1576 129908 : bitmap_set_bit (&changed_pseudo_bitmap, regno);
1577 : }
1578 : else
1579 : {
1580 1541485 : enum reg_class rclass = lra_get_allocno_class (regno);
1581 1541485 : enum reg_class spill_class;
1582 :
1583 3082970 : if (targetm.spill_class == NULL
1584 1541485 : || lra_reg_info[regno].restore_rtx == NULL_RTX
1585 445037 : || ! bitmap_bit_p (&lra_inheritance_pseudos, regno)
1586 1541485 : || (spill_class
1587 427705 : = ((enum reg_class)
1588 427705 : targetm.spill_class
1589 427705 : ((reg_class_t) rclass,
1590 427705 : PSEUDO_REGNO_MODE (regno)))) == NO_REGS)
1591 1541485 : continue;
1592 0 : regno_allocno_class_array[regno] = spill_class;
1593 0 : hard_regno = find_hard_regno_for (regno, &cost, -1, false);
1594 0 : if (hard_regno < 0)
1595 0 : regno_allocno_class_array[regno] = rclass;
1596 : else
1597 : {
1598 0 : setup_reg_classes
1599 0 : (regno, spill_class, spill_class, spill_class);
1600 0 : assign_hard_regno (hard_regno, regno);
1601 0 : bitmap_set_bit (&changed_pseudo_bitmap, regno);
1602 : }
1603 : }
1604 : }
1605 : }
1606 1549612 : free (update_hard_regno_preference_check);
1607 1549612 : bitmap_clear (&best_spill_pseudos_bitmap);
1608 1549612 : bitmap_clear (&spill_pseudos_bitmap);
1609 1549612 : bitmap_clear (&insn_conflict_pseudos);
1610 1549612 : return fails_p;
1611 : }
1612 :
1613 : /* Entry function to assign hard registers to new reload pseudos
1614 : starting with LRA_CONSTRAINT_NEW_REGNO_START (by possible spilling
1615 : of old pseudos) and possibly to the old pseudos. The function adds
1616 : what insns to process for the next constraint pass. Those are all
1617 : insns who contains non-reload and non-inheritance pseudos with
1618 : changed allocation.
1619 :
1620 : Return true if we did not spill any non-reload and non-inheritance
1621 : pseudos. Set up FAILS_P if we failed to assign hard registers to
1622 : all reload pseudos. */
1623 : bool
1624 1549612 : lra_assign (bool &fails_p)
1625 : {
1626 1549612 : int i;
1627 1549612 : unsigned int u;
1628 1549612 : bitmap_iterator bi;
1629 1549612 : bitmap_head insns_to_process;
1630 1549612 : bool no_spills_p;
1631 1549612 : int max_regno = max_reg_num ();
1632 :
1633 1549612 : timevar_push (TV_LRA_ASSIGN);
1634 1549612 : lra_assignment_iter++;
1635 1549612 : if (lra_dump_file != NULL)
1636 97 : fprintf (lra_dump_file, "\n********** Assignment #%d: **********\n\n",
1637 : lra_assignment_iter);
1638 1549612 : init_lives ();
1639 1549612 : sorted_pseudos = XNEWVEC (int, max_regno);
1640 1549612 : sorted_reload_pseudos = XNEWVEC (int, max_regno);
1641 1549612 : regno_allocno_class_array = XNEWVEC (enum reg_class, max_regno);
1642 1549612 : regno_live_length = XNEWVEC (int, max_regno);
1643 101659276 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1644 : {
1645 100109664 : int l;
1646 100109664 : lra_live_range_t r;
1647 :
1648 100109664 : regno_allocno_class_array[i] = lra_get_allocno_class (i);
1649 160316003 : for (l = 0, r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
1650 60206339 : l += r->finish - r->start + 1;
1651 100109664 : regno_live_length[i] = l;
1652 : }
1653 1549612 : former_reload_pseudo_spill_p = false;
1654 1549612 : init_regno_assign_info ();
1655 1549612 : bitmap_initialize (&all_spilled_pseudos, ®_obstack);
1656 1549612 : create_live_range_start_chains ();
1657 1549612 : setup_live_pseudos_and_spill_after_risky_transforms (&all_spilled_pseudos);
1658 1549612 : if (! lra_hard_reg_split_p && ! lra_asm_error_p && flag_checking)
1659 : /* Check correctness of allocation but only when there are no hard reg
1660 : splits and asm errors as in the case of errors explicit insns involving
1661 : hard regs are added or the asm is removed and this can result in
1662 : incorrect allocation. */
1663 100497265 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1664 98950108 : if (lra_reg_info[i].nrefs != 0
1665 49691094 : && reg_renumber[i] >= 0
1666 98950108 : && overlaps_hard_reg_set_p (lra_reg_info[i].conflict_hard_regs,
1667 40784923 : PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1668 0 : gcc_unreachable ();
1669 : /* Setup insns to process on the next constraint pass. */
1670 1549612 : bitmap_initialize (&changed_pseudo_bitmap, ®_obstack);
1671 1549612 : init_live_reload_and_inheritance_pseudos ();
1672 1549612 : fails_p = assign_by_spills ();
1673 1549612 : finish_live_reload_and_inheritance_pseudos ();
1674 1549612 : bitmap_ior_into (&changed_pseudo_bitmap, &all_spilled_pseudos);
1675 1549612 : no_spills_p = true;
1676 1824773 : EXECUTE_IF_SET_IN_BITMAP (&all_spilled_pseudos, 0, u, bi)
1677 : /* We ignore spilled pseudos created on last inheritance pass
1678 : because they will be removed. */
1679 304335 : if (lra_reg_info[u].restore_rtx == NULL_RTX)
1680 : {
1681 : no_spills_p = false;
1682 : break;
1683 : }
1684 1549612 : finish_live_range_start_chains ();
1685 1549612 : bitmap_clear (&all_spilled_pseudos);
1686 1549612 : bitmap_initialize (&insns_to_process, ®_obstack);
1687 3538562 : EXECUTE_IF_SET_IN_BITMAP (&changed_pseudo_bitmap, 0, u, bi)
1688 1988950 : bitmap_ior_into (&insns_to_process, &lra_reg_info[u].insn_bitmap);
1689 1549612 : bitmap_clear (&changed_pseudo_bitmap);
1690 6332604 : EXECUTE_IF_SET_IN_BITMAP (&insns_to_process, 0, u, bi)
1691 : {
1692 4782992 : lra_push_insn_by_uid (u);
1693 : /* Invalidate alternatives for insn should be processed. */
1694 4782992 : lra_set_used_insn_alternative_by_uid (u, -1);
1695 : }
1696 1549612 : bitmap_clear (&insns_to_process);
1697 1549612 : finish_regno_assign_info ();
1698 1549612 : free (regno_live_length);
1699 1549612 : free (regno_allocno_class_array);
1700 1549612 : free (sorted_pseudos);
1701 1549612 : free (sorted_reload_pseudos);
1702 1549612 : finish_lives ();
1703 1549612 : timevar_pop (TV_LRA_ASSIGN);
1704 1549612 : if (former_reload_pseudo_spill_p)
1705 1964 : lra_assignment_iter_after_spill++;
1706 : /* This is conditional on flag_checking because valid code can take
1707 : more than this maximum number of iteration, but at the same time
1708 : the test can uncover errors in machine descriptions. */
1709 1549612 : if (flag_checking
1710 1549592 : && (lra_assignment_iter_after_spill
1711 1549592 : > LRA_MAX_ASSIGNMENT_ITERATION_NUMBER))
1712 0 : internal_error
1713 0 : ("maximum number of LRA assignment passes is achieved (%d)",
1714 : LRA_MAX_ASSIGNMENT_ITERATION_NUMBER);
1715 : /* Reset the assignment correctness flag: */
1716 1549612 : check_and_force_assignment_correctness_p = false;
1717 1549612 : return no_spills_p;
1718 : }
1719 :
1720 : /* Find start and finish insns for reload pseudo REGNO. Return true
1721 : if we managed to find the expected insns. Return false,
1722 : otherwise. */
1723 : static bool
1724 3857 : find_reload_regno_insns (int regno, rtx_insn * &start, rtx_insn * &finish)
1725 : {
1726 3857 : unsigned int uid;
1727 3857 : bitmap_iterator bi;
1728 3857 : int insns_num = 0;
1729 3857 : bool clobber_p = false;
1730 3857 : rtx_insn *prev_insn, *next_insn;
1731 3857 : rtx_insn *start_insn = NULL, *first_insn = NULL, *second_insn = NULL;
1732 :
1733 13662 : EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi)
1734 : {
1735 9805 : if (start_insn == NULL)
1736 3857 : start_insn = lra_insn_recog_data[uid]->insn;
1737 9805 : if (GET_CODE (PATTERN (lra_insn_recog_data[uid]->insn)) == CLOBBER)
1738 : clobber_p = true;
1739 : else
1740 9805 : insns_num++;
1741 : }
1742 : /* For reload pseudo we should have at most 3 insns besides clobber referring for
1743 : it: input/output reload insns and the original insn. */
1744 3857 : if (insns_num > 3)
1745 : return false;
1746 3857 : if (clobber_p)
1747 0 : insns_num++;
1748 3857 : if (insns_num > 1)
1749 : {
1750 3651 : for (prev_insn = PREV_INSN (start_insn),
1751 3651 : next_insn = NEXT_INSN (start_insn);
1752 218833 : insns_num != 1 && (prev_insn != NULL
1753 2278 : || (next_insn != NULL && second_insn == NULL)); )
1754 : {
1755 : if (prev_insn != NULL)
1756 : {
1757 215182 : if (bitmap_bit_p (&lra_reg_info[regno].insn_bitmap,
1758 215182 : INSN_UID (prev_insn)))
1759 : {
1760 880 : first_insn = prev_insn;
1761 880 : insns_num--;
1762 : }
1763 215182 : prev_insn = PREV_INSN (prev_insn);
1764 : }
1765 215182 : if (next_insn != NULL && second_insn == NULL)
1766 : {
1767 5950 : if (! bitmap_bit_p (&lra_reg_info[regno].insn_bitmap,
1768 5950 : INSN_UID (next_insn)))
1769 3160 : next_insn = NEXT_INSN (next_insn);
1770 : else
1771 : {
1772 2790 : second_insn = next_insn;
1773 2790 : insns_num--;
1774 : }
1775 : }
1776 : }
1777 3651 : if (insns_num > 1)
1778 : return false;
1779 : }
1780 1373 : start = first_insn != NULL ? first_insn : start_insn;
1781 1579 : finish = second_insn != NULL ? second_insn : start_insn;
1782 1579 : return true;
1783 : }
1784 :
1785 : /* Process reload pseudos which did not get a hard reg, split a hard reg live
1786 : range in live range of a reload pseudo, and then return TRUE. Otherwise,
1787 : return FALSE. When FAIL_P is TRUE and if we did not split a hard reg live
1788 : range for failed reload pseudos, report an error and modify related asm
1789 : insns. */
1790 : bool
1791 2524 : lra_split_hard_reg_for (bool fail_p)
1792 : {
1793 2524 : int i, regno;
1794 2524 : rtx_insn *insn, *first, *last;
1795 2524 : unsigned int u;
1796 2524 : bitmap_iterator bi;
1797 2524 : enum reg_class rclass;
1798 2524 : int max_regno = max_reg_num ();
1799 : /* We did not assign hard regs to reload pseudos after two
1800 : iterations. Either it's an asm and something is wrong with the
1801 : constraints, or we have run out of spill registers; error out in
1802 : either case. */
1803 2524 : bool asm_p = false, spill_p = false;
1804 2524 : bitmap_head failed_reload_insns, failed_reload_pseudos, over_split_insns;
1805 :
1806 2524 : if (lra_dump_file != NULL)
1807 0 : fprintf (lra_dump_file,
1808 : "\n****** Splitting a hard reg after assignment #%d: ******\n\n",
1809 : lra_assignment_iter);
1810 2524 : bitmap_initialize (&failed_reload_pseudos, ®_obstack);
1811 2524 : bitmap_initialize (&non_reload_pseudos, ®_obstack);
1812 2524 : bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs);
1813 2524 : bitmap_ior_into (&non_reload_pseudos, &lra_subreg_reload_pseudos);
1814 2524 : bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos);
1815 2524 : bitmap_initialize (&over_split_insns, ®_obstack);
1816 2524 : update_hard_regno_preference_check = XCNEWVEC (int, max_regno);
1817 2524 : curr_update_hard_regno_preference_check = 0;
1818 19529 : for (i = lra_constraint_new_regno_start; i < max_regno; i++)
1819 6752 : if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0
1820 5927 : && (rclass = lra_get_allocno_class (i)) != NO_REGS
1821 22927 : && ! bitmap_bit_p (&non_reload_pseudos, i))
1822 : {
1823 3857 : if (! find_reload_regno_insns (i, first, last))
1824 2278 : continue;
1825 1579 : if (BLOCK_FOR_INSN (first) == BLOCK_FOR_INSN (last))
1826 : {
1827 : /* Check that we are not trying to split over the same insn
1828 : requiring reloads to avoid splitting the same hard reg twice or
1829 : more. If we need several hard regs splitting over the same insn
1830 : it can be finished on the next iterations.
1831 :
1832 : The following loop iteration number is small as we split hard
1833 : reg in a very small range. */
1834 2978 : for (insn = first;
1835 4557 : insn != NEXT_INSN (last);
1836 2978 : insn = NEXT_INSN (insn))
1837 2987 : if (bitmap_bit_p (&over_split_insns, INSN_UID (insn)))
1838 : break;
1839 1579 : if (insn != NEXT_INSN (last)
1840 1579 : || !spill_hard_reg_in_range (i, rclass, first, last))
1841 : {
1842 1420 : bitmap_set_bit (&failed_reload_pseudos, i);
1843 : }
1844 : else
1845 : {
1846 302 : for (insn = first;
1847 461 : insn != NEXT_INSN (last);
1848 302 : insn = NEXT_INSN (insn))
1849 302 : bitmap_set_bit (&over_split_insns, INSN_UID (insn));
1850 : spill_p = true;
1851 : }
1852 : }
1853 : }
1854 2524 : bitmap_clear (&over_split_insns);
1855 2524 : bitmap_clear (&non_reload_pseudos);
1856 2524 : if (spill_p)
1857 : {
1858 98 : lra_dump_insns_if_possible ("changed func after splitting hard regs");
1859 : }
1860 : else
1861 : {
1862 2426 : bitmap_initialize (&failed_reload_insns, ®_obstack);
1863 3837 : EXECUTE_IF_SET_IN_BITMAP (&failed_reload_pseudos, 0, u, bi)
1864 : {
1865 1411 : regno = u;
1866 1411 : bitmap_ior_into (&failed_reload_insns,
1867 1411 : &lra_reg_info[regno].insn_bitmap);
1868 1411 : if (fail_p)
1869 47 : lra_setup_reg_renumber
1870 94 : (regno, ira_class_hard_regs[lra_get_allocno_class (regno)][0],
1871 : false);
1872 : }
1873 2426 : if (fail_p)
1874 272 : EXECUTE_IF_SET_IN_BITMAP (&failed_reload_insns, 0, u, bi)
1875 : {
1876 81 : insn = lra_insn_recog_data[u]->insn;
1877 81 : if (asm_noperands (PATTERN (insn)) >= 0)
1878 : {
1879 47 : asm_p = true;
1880 47 : lra_asm_insn_error (insn);
1881 : }
1882 34 : else if (!asm_p)
1883 : {
1884 0 : error ("unable to find a register to spill");
1885 0 : fatal_insn ("this is the insn:", insn);
1886 : }
1887 : }
1888 2426 : bitmap_clear (&failed_reload_insns);
1889 : }
1890 2524 : free (update_hard_regno_preference_check);
1891 2524 : bitmap_clear (&failed_reload_pseudos);
1892 2524 : return spill_p;
1893 : }
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