Line data Source code
1 : /* Assign reload pseudos.
2 : Copyright (C) 2010-2026 Free Software Foundation, Inc.
3 : Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4 :
5 : This file is part of GCC.
6 :
7 : GCC is free software; you can redistribute it and/or modify it under
8 : the terms of the GNU General Public License as published by the Free
9 : Software Foundation; either version 3, or (at your option) any later
10 : version.
11 :
12 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 : for more details.
16 :
17 : You should have received a copy of the GNU General Public License
18 : along with GCC; see the file COPYING3. If not see
19 : <http://www.gnu.org/licenses/>. */
20 :
21 :
22 : /* This file's main objective is to assign hard registers to reload
23 : pseudos. It also tries to allocate hard registers to other
24 : pseudos, but at a lower priority than the reload pseudos. The pass
25 : does not transform the RTL.
26 :
27 : We must allocate a hard register to every reload pseudo. We try to
28 : increase the chances of finding a viable allocation by assigning
29 : the pseudos in order of fewest available hard registers first. If
30 : we still fail to find a hard register, we spill other (non-reload)
31 : pseudos in order to make room.
32 :
33 : find_hard_regno_for finds hard registers for allocation without
34 : spilling. spill_for does the same with spilling. Both functions
35 : use a cost model to determine the most profitable choice of hard
36 : and spill registers.
37 :
38 : Once we have finished allocating reload pseudos, we also try to
39 : assign registers to other (non-reload) pseudos. This is useful if
40 : hard registers were freed up by the spilling just described.
41 :
42 : We try to assign hard registers by collecting pseudos into threads.
43 : These threads contain reload and inheritance pseudos that are
44 : connected by copies (move insns). Doing this improves the chances
45 : of pseudos in the thread getting the same hard register and, as a
46 : result, of allowing some move insns to be deleted.
47 :
48 : When we assign a hard register to a pseudo, we decrease the cost of
49 : using the same hard register for pseudos that are connected by
50 : copies.
51 :
52 : If two hard registers have the same frequency-derived cost, we
53 : prefer hard registers with higher priorities. The mapping of
54 : registers to priorities is controlled by the register_priority
55 : target hook. For example, x86-64 has a few register priorities:
56 : hard registers with and without REX prefixes have different
57 : priorities. This permits us to generate smaller code as insns
58 : without REX prefixes are shorter.
59 :
60 : If a few hard registers are still equally good for the assignment,
61 : we choose the least used hard register. It is called leveling and
62 : may be profitable for some targets.
63 :
64 : Only insns with changed allocation pseudos are processed on the
65 : next constraint pass.
66 :
67 : The pseudo live-ranges are used to find conflicting pseudos.
68 :
69 : For understanding the code, it is important to keep in mind that
70 : inheritance, split, and reload pseudos created since last
71 : constraint pass have regno >= lra_constraint_new_regno_start.
72 : Inheritance and split pseudos created on any pass are in the
73 : corresponding bitmaps. Inheritance and split pseudos since the
74 : last constraint pass have also the corresponding non-negative
75 : restore_regno. */
76 :
77 : #include "config.h"
78 : #include "system.h"
79 : #include "coretypes.h"
80 : #include "backend.h"
81 : #include "target.h"
82 : #include "rtl.h"
83 : #include "tree.h"
84 : #include "predict.h"
85 : #include "df.h"
86 : #include "memmodel.h"
87 : #include "tm_p.h"
88 : #include "insn-config.h"
89 : #include "regs.h"
90 : #include "ira.h"
91 : #include "recog.h"
92 : #include "rtl-error.h"
93 : #include "sparseset.h"
94 : #include "lra.h"
95 : #include "lra-int.h"
96 : #include "function-abi.h"
97 :
98 : /* Current iteration number of the pass and current iteration number
99 : of the pass after the latest spill pass when any former reload
100 : pseudo was spilled. */
101 : int lra_assignment_iter;
102 : int lra_assignment_iter_after_spill;
103 :
104 : /* Flag of spilling former reload pseudos on this pass. */
105 : static bool former_reload_pseudo_spill_p;
106 :
107 : /* Array containing corresponding values of function
108 : lra_get_allocno_class. It is used to speed up the code. */
109 : static enum reg_class *regno_allocno_class_array;
110 :
111 : /* Array containing lengths of pseudo live ranges. It is used to
112 : speed up the code. */
113 : static int *regno_live_length;
114 :
115 : /* Information about the thread to which a pseudo belongs. Threads are
116 : a set of connected reload and inheritance pseudos with the same set of
117 : available hard registers. Lone registers belong to their own threads. */
118 : struct regno_assign_info
119 : {
120 : /* First/next pseudo of the same thread. */
121 : int first, next;
122 : /* Frequency of the thread (execution frequency of only reload
123 : pseudos in the thread when the thread contains a reload pseudo).
124 : Defined only for the first thread pseudo. */
125 : int freq;
126 : };
127 :
128 : /* Map regno to the corresponding regno assignment info. */
129 : static struct regno_assign_info *regno_assign_info;
130 :
131 : /* All inherited, subreg or optional pseudos created before last spill
132 : sub-pass. Such pseudos are permitted to get memory instead of hard
133 : regs. */
134 : static bitmap_head non_reload_pseudos;
135 :
136 : /* Process a pseudo copy with execution frequency COPY_FREQ connecting
137 : REGNO1 and REGNO2 to form threads. */
138 : static void
139 1589521 : process_copy_to_form_thread (int regno1, int regno2, int copy_freq)
140 : {
141 1589521 : int last, regno1_first, regno2_first;
142 :
143 1589521 : lra_assert (regno1 >= lra_constraint_new_regno_start
144 : && regno2 >= lra_constraint_new_regno_start);
145 1589521 : regno1_first = regno_assign_info[regno1].first;
146 1589521 : regno2_first = regno_assign_info[regno2].first;
147 1589521 : if (regno1_first != regno2_first)
148 : {
149 2536581 : for (last = regno2_first;
150 4126102 : regno_assign_info[last].next >= 0;
151 2536581 : last = regno_assign_info[last].next)
152 2536581 : regno_assign_info[last].first = regno1_first;
153 1589521 : regno_assign_info[last].first = regno1_first;
154 1589521 : regno_assign_info[last].next = regno_assign_info[regno1_first].next;
155 1589521 : regno_assign_info[regno1_first].next = regno2_first;
156 1589521 : regno_assign_info[regno1_first].freq
157 1589521 : += regno_assign_info[regno2_first].freq;
158 : }
159 1589521 : regno_assign_info[regno1_first].freq -= 2 * copy_freq;
160 1589521 : lra_assert (regno_assign_info[regno1_first].freq >= 0);
161 1589521 : }
162 :
163 : /* Initialize REGNO_ASSIGN_INFO and form threads. */
164 : static void
165 1573464 : init_regno_assign_info (void)
166 : {
167 1573464 : int i, regno1, regno2, max_regno = max_reg_num ();
168 1573464 : lra_copy_t cp;
169 :
170 1573464 : regno_assign_info = XNEWVEC (struct regno_assign_info, max_regno);
171 103445167 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
172 : {
173 101871703 : regno_assign_info[i].first = i;
174 101871703 : regno_assign_info[i].next = -1;
175 101871703 : regno_assign_info[i].freq = lra_reg_info[i].freq;
176 : }
177 : /* Form the threads. */
178 4395625 : for (i = 0; (cp = lra_get_copy (i)) != NULL; i++)
179 2822161 : if ((regno1 = cp->regno1) >= lra_constraint_new_regno_start
180 2822161 : && (regno2 = cp->regno2) >= lra_constraint_new_regno_start
181 2822161 : && reg_renumber[regno1] < 0 && lra_reg_info[regno1].nrefs != 0
182 1625410 : && reg_renumber[regno2] < 0 && lra_reg_info[regno2].nrefs != 0
183 2822161 : && (ira_class_hard_regs_num[regno_allocno_class_array[regno1]]
184 1621824 : == ira_class_hard_regs_num[regno_allocno_class_array[regno2]]))
185 1589521 : process_copy_to_form_thread (regno1, regno2, cp->freq);
186 1573464 : }
187 :
188 : /* Free REGNO_ASSIGN_INFO. */
189 : static void
190 1573464 : finish_regno_assign_info (void)
191 : {
192 1573464 : free (regno_assign_info);
193 0 : }
194 :
195 : /* The function is used to sort *reload* and *inheritance* pseudos to
196 : try to assign them hard registers. We put pseudos from the same
197 : thread always nearby. */
198 : static int
199 252653791 : reload_pseudo_compare_func (const void *v1p, const void *v2p)
200 : {
201 252653791 : int r1 = *(const int *) v1p, r2 = *(const int *) v2p;
202 252653791 : enum reg_class cl1 = regno_allocno_class_array[r1];
203 252653791 : enum reg_class cl2 = regno_allocno_class_array[r2];
204 252653791 : int diff;
205 :
206 252653791 : lra_assert (r1 >= lra_constraint_new_regno_start
207 : && r2 >= lra_constraint_new_regno_start);
208 :
209 : /* Prefer to assign reload registers with smaller classes first to
210 : guarantee assignment to all reload registers. */
211 252653791 : if ((diff = (ira_class_hard_regs_num[cl1]
212 252653791 : - ira_class_hard_regs_num[cl2])) != 0)
213 : return diff;
214 : /* Allocate bigger pseudos first to avoid register file
215 : fragmentation. */
216 236926633 : if ((diff
217 236926633 : = (ira_reg_class_max_nregs[cl2][lra_reg_info[r2].biggest_mode]
218 236926633 : - ira_reg_class_max_nregs[cl1][lra_reg_info[r1].biggest_mode])) != 0)
219 : return diff;
220 234927959 : if ((diff = (regno_assign_info[regno_assign_info[r2].first].freq
221 234927959 : - regno_assign_info[regno_assign_info[r1].first].freq)) != 0)
222 : return diff;
223 : /* Put pseudos from the thread nearby. */
224 133253072 : if ((diff = regno_assign_info[r1].first - regno_assign_info[r2].first) != 0)
225 : return diff;
226 : /* Prefer pseudos with longer live ranges. It sets up better
227 : preferred hard registers for the thread pseudos and decreases
228 : register-register moves between the thread pseudos. */
229 17643926 : if ((diff = regno_live_length[r2] - regno_live_length[r1]) != 0)
230 : return diff;
231 : /* If regs are equally good, sort by their numbers, so that the
232 : results of qsort leave nothing to chance. */
233 8142440 : return r1 - r2;
234 : }
235 :
236 : /* The function is used to sort *non-reload* pseudos to try to assign
237 : them hard registers. The order calculation is simpler than in the
238 : previous function and based on the pseudo frequency usage. */
239 : static int
240 1122117692 : pseudo_compare_func (const void *v1p, const void *v2p)
241 : {
242 1122117692 : int r1 = *(const int *) v1p, r2 = *(const int *) v2p;
243 1122117692 : int diff;
244 :
245 : /* Assign hard reg to static chain pointer first pseudo when
246 : non-local goto is used. */
247 1122117692 : if ((diff = (non_spilled_static_chain_regno_p (r2)
248 1122117692 : - non_spilled_static_chain_regno_p (r1))) != 0)
249 : return diff;
250 :
251 : /* Prefer to assign more frequently used registers first. */
252 1122114424 : if ((diff = lra_reg_info[r2].freq - lra_reg_info[r1].freq) != 0)
253 : return diff;
254 :
255 : /* If regs are equally good, sort by their numbers, so that the
256 : results of qsort leave nothing to chance. */
257 667151114 : return r1 - r2;
258 : }
259 :
260 : /* Arrays of size LRA_LIVE_MAX_POINT mapping a program point to the
261 : pseudo live ranges with given start point. We insert only live
262 : ranges of pseudos interesting for assignment purposes. They are
263 : reload pseudos and pseudos assigned to hard registers. */
264 : static lra_live_range_t *start_point_ranges;
265 :
266 : /* Used as a flag that a live range is not inserted in the start point
267 : chain. */
268 : static struct lra_live_range not_in_chain_mark;
269 :
270 : /* Create and set up START_POINT_RANGES. */
271 : static void
272 1573464 : create_live_range_start_chains (void)
273 : {
274 1573464 : int i, max_regno;
275 1573464 : lra_live_range_t r;
276 :
277 1573464 : start_point_ranges = XCNEWVEC (lra_live_range_t, lra_live_max_point);
278 1573464 : max_regno = max_reg_num ();
279 105018631 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
280 101871703 : if (i >= lra_constraint_new_regno_start || reg_renumber[i] >= 0)
281 : {
282 108432822 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
283 : {
284 57839810 : r->start_next = start_point_ranges[r->start];
285 57839810 : start_point_ranges[r->start] = r;
286 : }
287 : }
288 : else
289 : {
290 54061247 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
291 2782556 : r->start_next = ¬_in_chain_mark;
292 : }
293 1573464 : }
294 :
295 : /* Insert live ranges of pseudo REGNO into start chains if they are
296 : not there yet. */
297 : static void
298 500274284 : insert_in_live_range_start_chain (int regno)
299 : {
300 500274284 : lra_live_range_t r = lra_reg_info[regno].live_ranges;
301 :
302 500274284 : if (r->start_next != ¬_in_chain_mark)
303 : return;
304 203228 : for (; r != NULL; r = r->next)
305 : {
306 128989 : r->start_next = start_point_ranges[r->start];
307 128989 : start_point_ranges[r->start] = r;
308 : }
309 : }
310 :
311 : /* Free START_POINT_RANGES. */
312 : static void
313 1573464 : finish_live_range_start_chains (void)
314 : {
315 1573464 : gcc_assert (start_point_ranges != NULL);
316 1573464 : free (start_point_ranges);
317 1573464 : start_point_ranges = NULL;
318 1573464 : }
319 :
320 : /* Map: program point -> bitmap of all pseudos living at the point and
321 : assigned to hard registers. */
322 : static bitmap_head *live_hard_reg_pseudos;
323 : static bitmap_obstack live_hard_reg_pseudos_bitmap_obstack;
324 :
325 : /* reg_renumber corresponding to pseudos marked in
326 : live_hard_reg_pseudos. reg_renumber might be not matched to
327 : live_hard_reg_pseudos but live_pseudos_reg_renumber always reflects
328 : live_hard_reg_pseudos. */
329 : static int *live_pseudos_reg_renumber;
330 :
331 : /* Sparseset used to calculate living hard reg pseudos for some program
332 : point range. */
333 : static sparseset live_range_hard_reg_pseudos;
334 :
335 : /* Sparseset used to calculate living reload/inheritance pseudos for
336 : some program point range. */
337 : static sparseset live_range_reload_inheritance_pseudos;
338 :
339 : /* Allocate and initialize the data about living pseudos at program
340 : points. */
341 : static void
342 1573464 : init_lives (void)
343 : {
344 1573464 : int i, max_regno = max_reg_num ();
345 :
346 1573464 : live_range_hard_reg_pseudos = sparseset_alloc (max_regno);
347 1573464 : live_range_reload_inheritance_pseudos = sparseset_alloc (max_regno);
348 1573464 : live_hard_reg_pseudos = XNEWVEC (bitmap_head, lra_live_max_point);
349 1573464 : bitmap_obstack_initialize (&live_hard_reg_pseudos_bitmap_obstack);
350 91802035 : for (i = 0; i < lra_live_max_point; i++)
351 88655107 : bitmap_initialize (&live_hard_reg_pseudos[i],
352 : &live_hard_reg_pseudos_bitmap_obstack);
353 1573464 : live_pseudos_reg_renumber = XNEWVEC (int, max_regno);
354 248203855 : for (i = 0; i < max_regno; i++)
355 246630391 : live_pseudos_reg_renumber[i] = -1;
356 1573464 : }
357 :
358 : /* Free the data about living pseudos at program points. */
359 : static void
360 1573464 : finish_lives (void)
361 : {
362 1573464 : sparseset_free (live_range_hard_reg_pseudos);
363 1573464 : sparseset_free (live_range_reload_inheritance_pseudos);
364 1573464 : free (live_hard_reg_pseudos);
365 1573464 : bitmap_obstack_release (&live_hard_reg_pseudos_bitmap_obstack);
366 1573464 : free (live_pseudos_reg_renumber);
367 1573464 : }
368 :
369 : /* Update the LIVE_HARD_REG_PSEUDOS and LIVE_PSEUDOS_REG_RENUMBER
370 : entries for pseudo REGNO. Assume that the register has been
371 : spilled if FREE_P, otherwise assume that it has been assigned
372 : reg_renumber[REGNO] (if >= 0). We also insert the pseudo live
373 : ranges in the start chains when it is assumed to be assigned to a
374 : hard register because we use the chains of pseudos assigned to hard
375 : registers during allocation. */
376 : static void
377 49125999 : update_lives (int regno, bool free_p)
378 : {
379 49125999 : int p;
380 49125999 : lra_live_range_t r;
381 :
382 49125999 : if (reg_renumber[regno] < 0)
383 : return;
384 49125999 : live_pseudos_reg_renumber[regno] = free_p ? -1 : reg_renumber[regno];
385 107264655 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
386 : {
387 616170826 : for (p = r->start; p <= r->finish; p++)
388 558032170 : if (free_p)
389 63164182 : bitmap_clear_bit (&live_hard_reg_pseudos[p], regno);
390 : else
391 : {
392 494867988 : bitmap_set_bit (&live_hard_reg_pseudos[p], regno);
393 494867988 : insert_in_live_range_start_chain (regno);
394 : }
395 : }
396 : }
397 :
398 : /* Sparseset used to calculate reload pseudos conflicting with a given
399 : pseudo when we are trying to find a hard register for the given
400 : pseudo. */
401 : static sparseset conflict_reload_and_inheritance_pseudos;
402 :
403 : /* Map: program point -> bitmap of all reload and inheritance pseudos
404 : living at the point. */
405 : static bitmap_head *live_reload_and_inheritance_pseudos;
406 : static bitmap_obstack live_reload_and_inheritance_pseudos_bitmap_obstack;
407 :
408 : /* Allocate and initialize data about living reload pseudos at any
409 : given program point. */
410 : static void
411 1573464 : init_live_reload_and_inheritance_pseudos (void)
412 : {
413 1573464 : int i, p, max_regno = max_reg_num ();
414 1573464 : lra_live_range_t r;
415 :
416 1573464 : conflict_reload_and_inheritance_pseudos = sparseset_alloc (max_regno);
417 1573464 : live_reload_and_inheritance_pseudos = XNEWVEC (bitmap_head, lra_live_max_point);
418 1573464 : bitmap_obstack_initialize (&live_reload_and_inheritance_pseudos_bitmap_obstack);
419 91802035 : for (p = 0; p < lra_live_max_point; p++)
420 88655107 : bitmap_initialize (&live_reload_and_inheritance_pseudos[p],
421 : &live_reload_and_inheritance_pseudos_bitmap_obstack);
422 1573464 : if ((unsigned) (max_regno - lra_constraint_new_regno_start)
423 1573464 : >= (1U << lra_max_pseudos_points_log2_considered_for_preferences)
424 1573464 : / (lra_live_max_point + 1))
425 16 : return;
426 1573448 : bitmap_head start_points;
427 1573448 : bitmap_initialize (&start_points,
428 : &live_hard_reg_pseudos_bitmap_obstack);
429 13542169 : for (i = lra_constraint_new_regno_start; i < max_regno; i++)
430 23368068 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
431 11399347 : bitmap_set_bit (&start_points, r->start);
432 13542169 : for (i = lra_constraint_new_regno_start; i < max_regno; i++)
433 : {
434 23368068 : for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
435 : {
436 11399347 : bitmap_iterator bi;
437 11399347 : unsigned p;
438 45381416 : EXECUTE_IF_SET_IN_BITMAP (&start_points, r->start, p, bi)
439 : {
440 44710862 : if (p > (unsigned) r->finish)
441 : break;
442 33982069 : bitmap_set_bit (&live_reload_and_inheritance_pseudos[p], i);
443 : }
444 : }
445 : }
446 1573448 : bitmap_clear (&start_points);
447 : }
448 :
449 : /* Finalize data about living reload pseudos at any given program
450 : point. */
451 : static void
452 1573464 : finish_live_reload_and_inheritance_pseudos (void)
453 : {
454 1573464 : sparseset_free (conflict_reload_and_inheritance_pseudos);
455 1573464 : free (live_reload_and_inheritance_pseudos);
456 1573464 : bitmap_obstack_release (&live_reload_and_inheritance_pseudos_bitmap_obstack);
457 1573464 : }
458 :
459 : /* The value used to check that cost of given hard reg is really
460 : defined currently. */
461 : static int curr_hard_regno_costs_check = 0;
462 : /* Array used to check that cost of the corresponding hard reg (the
463 : array element index) is really defined currently. */
464 : static int hard_regno_costs_check[FIRST_PSEUDO_REGISTER];
465 : /* The current costs of allocation of hard regs. Defined only if the
466 : value of the corresponding element of the previous array is equal to
467 : CURR_HARD_REGNO_COSTS_CHECK. */
468 : static int hard_regno_costs[FIRST_PSEUDO_REGISTER];
469 :
470 : /* Adjust cost of HARD_REGNO by INCR. Reset the cost first if it is
471 : not defined yet. */
472 : static inline void
473 22429055 : adjust_hard_regno_cost (int hard_regno, int incr)
474 : {
475 22429055 : if (hard_regno_costs_check[hard_regno] != curr_hard_regno_costs_check)
476 12055403 : hard_regno_costs[hard_regno] = 0;
477 22429055 : hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check;
478 22429055 : hard_regno_costs[hard_regno] += incr;
479 22429055 : }
480 :
481 : /* Try to find a free hard register for pseudo REGNO. Return the
482 : hard register on success and set *COST to the cost of using
483 : that register. (If several registers have equal cost, the one with
484 : the highest priority wins.) Return -1 on failure.
485 :
486 : If FIRST_P, return the first available hard reg ignoring other
487 : criteria, e.g. allocation cost. This approach results in less hard
488 : reg pool fragmentation and permit to allocate hard regs to reload
489 : pseudos in complicated situations where pseudo sizes are different.
490 :
491 : If TRY_ONLY_HARD_REGNO >= 0, consider only that hard register,
492 : otherwise consider all hard registers in REGNO's class.
493 :
494 : If REGNO_SET is not empty, only hard registers from the set are
495 : considered. */
496 : static int
497 13927912 : find_hard_regno_for_1 (int regno, int *cost, int try_only_hard_regno,
498 : bool first_p, HARD_REG_SET regno_set)
499 : {
500 13927912 : HARD_REG_SET conflict_set;
501 13927912 : int best_cost = INT_MAX, best_priority = INT_MIN, best_usage = INT_MAX;
502 13927912 : lra_live_range_t r;
503 13927912 : int p, i, j, rclass_size, best_hard_regno, priority, hard_regno;
504 13927912 : int hr, conflict_hr, nregs;
505 13927912 : machine_mode biggest_mode;
506 13927912 : unsigned int k, conflict_regno;
507 13927912 : poly_int64 offset;
508 13927912 : int val, biggest_nregs, nregs_diff;
509 13927912 : enum reg_class rclass;
510 13927912 : bitmap_iterator bi;
511 13927912 : bool *rclass_intersect_p;
512 13927912 : HARD_REG_SET impossible_start_hard_regs, available_regs;
513 :
514 27855824 : if (hard_reg_set_empty_p (regno_set))
515 13708327 : conflict_set = lra_no_alloc_regs;
516 : else
517 219585 : conflict_set = ~regno_set | lra_no_alloc_regs;
518 13927912 : rclass = regno_allocno_class_array[regno];
519 13927912 : rclass_intersect_p = ira_reg_classes_intersect_p[rclass];
520 13927912 : curr_hard_regno_costs_check++;
521 13927912 : sparseset_clear (conflict_reload_and_inheritance_pseudos);
522 13927912 : sparseset_clear (live_range_hard_reg_pseudos);
523 13927912 : conflict_set |= lra_reg_info[regno].conflict_hard_regs;
524 13927912 : biggest_mode = lra_reg_info[regno].biggest_mode;
525 29742052 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
526 : {
527 129039069 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi)
528 113224929 : if (rclass_intersect_p[regno_allocno_class_array[k]])
529 99822014 : sparseset_set_bit (live_range_hard_reg_pseudos, k);
530 133817336 : EXECUTE_IF_SET_IN_BITMAP (&live_reload_and_inheritance_pseudos[r->start],
531 : 0, k, bi)
532 118003196 : if (lra_reg_info[k].preferred_hard_regno1 >= 0
533 32856875 : && live_pseudos_reg_renumber[k] < 0
534 30340783 : && rclass_intersect_p[regno_allocno_class_array[k]])
535 28076300 : sparseset_set_bit (conflict_reload_and_inheritance_pseudos, k);
536 2845826076 : for (p = r->start + 1; p <= r->finish; p++)
537 : {
538 2830011936 : lra_live_range_t r2;
539 :
540 2830011936 : for (r2 = start_point_ranges[p];
541 4820706855 : r2 != NULL;
542 1990694919 : r2 = r2->start_next)
543 : {
544 1990694919 : if (live_pseudos_reg_renumber[r2->regno] < 0
545 633602628 : && r2->regno >= lra_constraint_new_regno_start
546 632603163 : && lra_reg_info[r2->regno].preferred_hard_regno1 >= 0
547 363655499 : && rclass_intersect_p[regno_allocno_class_array[r2->regno]])
548 355482795 : sparseset_set_bit (conflict_reload_and_inheritance_pseudos,
549 : r2->regno);
550 1635212124 : else if (live_pseudos_reg_renumber[r2->regno] >= 0
551 1357092291 : && rclass_intersect_p
552 1357092291 : [regno_allocno_class_array[r2->regno]])
553 1247313095 : sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
554 : }
555 : }
556 : }
557 13927912 : if ((hard_regno = lra_reg_info[regno].preferred_hard_regno1) >= 0)
558 : {
559 5784793 : adjust_hard_regno_cost
560 5784793 : (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit1);
561 5784793 : if ((hard_regno = lra_reg_info[regno].preferred_hard_regno2) >= 0)
562 1851444 : adjust_hard_regno_cost
563 1851444 : (hard_regno, -lra_reg_info[regno].preferred_hard_regno_profit2);
564 : }
565 : #ifdef STACK_REGS
566 13927912 : if (lra_reg_info[regno].no_stack_p)
567 474633 : for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
568 421896 : SET_HARD_REG_BIT (conflict_set, i);
569 : #endif
570 13927912 : sparseset_clear_bit (conflict_reload_and_inheritance_pseudos, regno);
571 13927912 : val = lra_reg_info[regno].val;
572 13927912 : offset = lra_reg_info[regno].offset;
573 13927912 : impossible_start_hard_regs = lra_reg_info[regno].exclude_start_hard_regs;
574 198071562 : EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno)
575 : {
576 188632634 : conflict_hr = live_pseudos_reg_renumber[conflict_regno];
577 188632634 : if (lra_reg_val_equal_p (conflict_regno, val, offset))
578 : {
579 863213 : conflict_hr = live_pseudos_reg_renumber[conflict_regno];
580 863213 : nregs = hard_regno_nregs (conflict_hr,
581 863213 : lra_reg_info[conflict_regno].biggest_mode);
582 : /* Remember about multi-register pseudos. For example, 2
583 : hard register pseudos can start on the same hard register
584 : but cannot start on HR and HR+1/HR-1. */
585 869712 : for (hr = conflict_hr + 1;
586 869712 : hr < FIRST_PSEUDO_REGISTER && hr < conflict_hr + nregs;
587 : hr++)
588 6499 : SET_HARD_REG_BIT (impossible_start_hard_regs, hr);
589 868440 : for (hr = conflict_hr - 1;
590 868440 : hr >= 0 && (int) end_hard_regno (biggest_mode, hr) > conflict_hr;
591 : hr--)
592 5227 : SET_HARD_REG_BIT (impossible_start_hard_regs, hr);
593 : }
594 : else
595 : {
596 187769421 : machine_mode biggest_conflict_mode
597 187769421 : = lra_reg_info[conflict_regno].biggest_mode;
598 187769421 : int biggest_conflict_nregs
599 187769421 : = hard_regno_nregs (conflict_hr, biggest_conflict_mode);
600 :
601 187769421 : nregs_diff
602 187769421 : = (biggest_conflict_nregs
603 187769421 : - hard_regno_nregs (conflict_hr,
604 187769421 : PSEUDO_REGNO_MODE (conflict_regno)));
605 187769421 : add_to_hard_reg_set (&conflict_set,
606 : biggest_conflict_mode,
607 : conflict_hr
608 : - (WORDS_BIG_ENDIAN ? nregs_diff : 0));
609 375538842 : if (hard_reg_set_subset_p (reg_class_contents[rclass],
610 : conflict_set))
611 : return -1;
612 : }
613 : }
614 19402148 : EXECUTE_IF_SET_IN_SPARSESET (conflict_reload_and_inheritance_pseudos,
615 : conflict_regno)
616 19926440 : if (!lra_reg_val_equal_p (conflict_regno, val, offset))
617 : {
618 9719559 : lra_assert (live_pseudos_reg_renumber[conflict_regno] < 0);
619 9719559 : if ((hard_regno
620 9719559 : = lra_reg_info[conflict_regno].preferred_hard_regno1) >= 0)
621 : {
622 9719559 : adjust_hard_regno_cost
623 9719559 : (hard_regno,
624 : lra_reg_info[conflict_regno].preferred_hard_regno_profit1);
625 9719559 : if ((hard_regno
626 9719559 : = lra_reg_info[conflict_regno].preferred_hard_regno2) >= 0)
627 5073259 : adjust_hard_regno_cost
628 5073259 : (hard_regno,
629 : lra_reg_info[conflict_regno].preferred_hard_regno_profit2);
630 : }
631 : }
632 :
633 : /* If a reference/partner pseudo already has a hardreg, restrict this one
634 : to what the filter permits. */
635 9438928 : if (!lra_reg_info[regno].dependent_filters.is_empty ())
636 : {
637 : unsigned int i;
638 : dependent_filter *filter;
639 0 : FOR_EACH_VEC_ELT (lra_reg_info[regno].dependent_filters, i, filter)
640 : {
641 0 : int partner_regno = live_pseudos_reg_renumber[filter->partner_regno];
642 0 : if (partner_regno < 0)
643 0 : partner_regno = reg_renumber[filter->partner_regno];
644 0 : if (partner_regno < 0)
645 0 : continue;
646 :
647 0 : const HARD_REG_SET *allowed
648 0 : = lra_get_dependent_filter (filter->id, filter->mode,
649 : (unsigned int) partner_regno,
650 0 : filter->partner_mode, filter->is_ref);
651 0 : conflict_set |= ~*allowed;
652 : }
653 : }
654 :
655 : /* Make sure that all registers in a multi-word pseudo belong to the
656 : required class. */
657 9438928 : conflict_set |= ~reg_class_contents[rclass];
658 9438928 : lra_assert (rclass != NO_REGS);
659 9438928 : rclass_size = ira_class_hard_regs_num[rclass];
660 9438928 : best_hard_regno = -1;
661 9438928 : hard_regno = ira_class_hard_regs[rclass][0];
662 9438928 : biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode);
663 9438928 : nregs_diff = (biggest_nregs
664 9438928 : - hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno)));
665 9438928 : available_regs = reg_class_contents[rclass] & ~lra_no_alloc_regs;
666 122942772 : for (i = 0; i < rclass_size; i++)
667 : {
668 113579568 : if (try_only_hard_regno >= 0)
669 : hard_regno = try_only_hard_regno;
670 : else
671 113506698 : hard_regno = ira_class_hard_regs[rclass][i];
672 113579568 : if (! overlaps_hard_reg_set_p (conflict_set,
673 113579568 : PSEUDO_REGNO_MODE (regno), hard_regno)
674 59937699 : && targetm.hard_regno_mode_ok (hard_regno, PSEUDO_REGNO_MODE (regno))
675 : /* We cannot use prohibited_class_mode_regs for all classes
676 : because it is not defined for all classes. */
677 59787777 : && (ira_allocno_class_translate[rclass] != rclass
678 23139837 : || ! TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs
679 23139837 : [rclass][biggest_mode],
680 : hard_regno))
681 59787483 : && ! TEST_HARD_REG_BIT (impossible_start_hard_regs, hard_regno)
682 173365311 : && (nregs_diff == 0
683 4650 : || (WORDS_BIG_ENDIAN
684 : ? (hard_regno - nregs_diff >= 0
685 : && TEST_HARD_REG_BIT (available_regs,
686 : hard_regno - nregs_diff))
687 4650 : : TEST_HARD_REG_BIT (available_regs,
688 4650 : hard_regno + nregs_diff))))
689 : {
690 59785360 : if (hard_regno_costs_check[hard_regno]
691 59785360 : != curr_hard_regno_costs_check)
692 : {
693 54507326 : hard_regno_costs_check[hard_regno] = curr_hard_regno_costs_check;
694 54507326 : hard_regno_costs[hard_regno] = 0;
695 : }
696 60891046 : for (j = 0;
697 120676406 : j < hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno));
698 : j++)
699 60891046 : if (! crtl->abi->clobbers_full_reg_p (hard_regno + j)
700 60891046 : && ! df_regs_ever_live_p (hard_regno + j))
701 : /* It needs save restore. */
702 11968868 : hard_regno_costs[hard_regno]
703 5984434 : += (2
704 16441611 : * REG_FREQ_FROM_BB (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb)
705 15431003 : + 1);
706 59785360 : priority = targetm.register_priority (hard_regno);
707 50577887 : if (best_hard_regno < 0 || hard_regno_costs[hard_regno] < best_cost
708 108509612 : || (hard_regno_costs[hard_regno] == best_cost
709 25533318 : && (priority > best_priority
710 25430732 : || (targetm.register_usage_leveling_p ()
711 25430732 : && priority == best_priority
712 6482786 : && best_usage > lra_hard_reg_usage[hard_regno]))))
713 : {
714 13851038 : best_hard_regno = hard_regno;
715 13851038 : best_cost = hard_regno_costs[hard_regno];
716 13851038 : best_priority = priority;
717 13851038 : best_usage = lra_hard_reg_usage[hard_regno];
718 : }
719 : }
720 113579568 : if (try_only_hard_regno >= 0 || (first_p && best_hard_regno >= 0))
721 : break;
722 : }
723 9438928 : if (best_hard_regno >= 0)
724 9207473 : *cost = best_cost - lra_reg_info[regno].freq;
725 : return best_hard_regno;
726 : }
727 :
728 : /* A wrapper for find_hard_regno_for_1 (see comments for that function
729 : description). This function tries to find a hard register for
730 : preferred class first if it is worth. */
731 : static int
732 13711154 : find_hard_regno_for (int regno, int *cost, int try_only_hard_regno, bool first_p)
733 : {
734 13711154 : int hard_regno;
735 13711154 : HARD_REG_SET regno_set;
736 :
737 : /* Only original pseudos can have a different preferred class. */
738 13711154 : if (try_only_hard_regno < 0 && regno < lra_new_regno_start)
739 : {
740 1219874 : enum reg_class pref_class = reg_preferred_class (regno);
741 :
742 1219874 : if (regno_allocno_class_array[regno] != pref_class)
743 : {
744 439170 : hard_regno = find_hard_regno_for_1 (regno, cost, -1, first_p,
745 219585 : reg_class_contents[pref_class]);
746 219585 : if (hard_regno >= 0)
747 : return hard_regno;
748 : }
749 : }
750 13708327 : CLEAR_HARD_REG_SET (regno_set);
751 13708327 : return find_hard_regno_for_1 (regno, cost, try_only_hard_regno, first_p,
752 13708327 : regno_set);
753 : }
754 :
755 : /* Current value used for checking elements in
756 : update_hard_regno_preference_check. */
757 : static int curr_update_hard_regno_preference_check;
758 : /* If an element value is equal to the above variable value, then the
759 : corresponding regno has been processed for preference
760 : propagation. */
761 : static int *update_hard_regno_preference_check;
762 :
763 : /* Update the preference for using HARD_REGNO for pseudos that are
764 : connected directly or indirectly with REGNO. Apply divisor DIV
765 : to any preference adjustments.
766 :
767 : The more indirectly a pseudo is connected, the smaller its effect
768 : should be. We therefore increase DIV on each "hop". */
769 : static void
770 9504030 : update_hard_regno_preference (int regno, int hard_regno, int div)
771 : {
772 9504030 : int another_regno, cost;
773 9504030 : lra_copy_t cp, next_cp;
774 :
775 : /* Search depth 5 seems to be enough. */
776 9504030 : if (div > (1 << 5))
777 : return;
778 17226503 : for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp)
779 : {
780 7806758 : if (cp->regno1 == regno)
781 : {
782 3551520 : next_cp = cp->regno1_next;
783 3551520 : another_regno = cp->regno2;
784 : }
785 4255238 : else if (cp->regno2 == regno)
786 : {
787 4255238 : next_cp = cp->regno2_next;
788 4255238 : another_regno = cp->regno1;
789 : }
790 : else
791 0 : gcc_unreachable ();
792 7806758 : if (reg_renumber[another_regno] < 0
793 4228229 : && (update_hard_regno_preference_check[another_regno]
794 4228229 : != curr_update_hard_regno_preference_check))
795 : {
796 2926096 : update_hard_regno_preference_check[another_regno]
797 2926096 : = curr_update_hard_regno_preference_check;
798 2926096 : cost = cp->freq < div ? 1 : cp->freq / div;
799 2926096 : lra_setup_reload_pseudo_preferenced_hard_reg
800 2926096 : (another_regno, hard_regno, cost);
801 2926096 : update_hard_regno_preference (another_regno, hard_regno, div * 2);
802 : }
803 : }
804 : }
805 :
806 : /* Return prefix title for pseudo REGNO. */
807 : static const char *
808 100 : pseudo_prefix_title (int regno)
809 : {
810 100 : return
811 100 : (regno < lra_constraint_new_regno_start ? ""
812 100 : : bitmap_bit_p (&lra_inheritance_pseudos, regno) ? "inheritance "
813 97 : : bitmap_bit_p (&lra_split_regs, regno) ? "split "
814 97 : : bitmap_bit_p (&lra_optional_reload_pseudos, regno) ? "optional reload "
815 94 : : bitmap_bit_p (&lra_subreg_reload_pseudos, regno) ? "subreg reload "
816 100 : : "reload ");
817 : }
818 :
819 : /* Update REG_RENUMBER and other pseudo preferences by assignment of
820 : HARD_REGNO to pseudo REGNO and print about it if PRINT_P. */
821 : void
822 6711043 : lra_setup_reg_renumber (int regno, int hard_regno, bool print_p)
823 : {
824 6711043 : int i, hr;
825 :
826 : /* We cannot just reassign hard register. */
827 6711043 : lra_assert (hard_regno < 0 || reg_renumber[regno] < 0);
828 133109 : if ((hr = hard_regno) < 0)
829 133109 : hr = reg_renumber[regno];
830 6711043 : reg_renumber[regno] = hard_regno;
831 6711043 : lra_assert (hr >= 0);
832 13612605 : for (i = 0; i < hard_regno_nregs (hr, PSEUDO_REGNO_MODE (regno)); i++)
833 6901562 : if (hard_regno < 0)
834 141046 : lra_hard_reg_usage[hr + i] -= lra_reg_info[regno].freq;
835 : else
836 6760516 : lra_hard_reg_usage[hr + i] += lra_reg_info[regno].freq;
837 6711043 : if (print_p && lra_dump_file != NULL)
838 200 : fprintf (lra_dump_file, " Assign %d to %sr%d (freq=%d)\n",
839 100 : reg_renumber[regno], pseudo_prefix_title (regno),
840 100 : regno, lra_reg_info[regno].freq);
841 6711043 : if (hard_regno >= 0)
842 : {
843 6577934 : curr_update_hard_regno_preference_check++;
844 6577934 : update_hard_regno_preference (regno, hard_regno, 1);
845 : }
846 6711043 : }
847 :
848 : /* Pseudos which occur in insns containing a particular pseudo. */
849 : static bitmap_head insn_conflict_pseudos;
850 :
851 : /* Bitmaps used to contain spill pseudos for given pseudo hard regno
852 : and best spill pseudos for given pseudo (and best hard regno). */
853 : static bitmap_head spill_pseudos_bitmap, best_spill_pseudos_bitmap;
854 :
855 : /* Current pseudo check for validity of elements in
856 : TRY_HARD_REG_PSEUDOS. */
857 : static int curr_pseudo_check;
858 : /* Array used for validity of elements in TRY_HARD_REG_PSEUDOS. */
859 : static int try_hard_reg_pseudos_check[FIRST_PSEUDO_REGISTER];
860 : /* Pseudos who hold given hard register at the considered points. */
861 : static bitmap_head try_hard_reg_pseudos[FIRST_PSEUDO_REGISTER];
862 :
863 : /* Set up try_hard_reg_pseudos for given program point P and class
864 : RCLASS. Those are pseudos living at P and assigned to a hard
865 : register of RCLASS. In other words, those are pseudos which can be
866 : spilled to assign a hard register of RCLASS to a pseudo living at
867 : P. */
868 : static void
869 132275 : setup_try_hard_regno_pseudos (int p, enum reg_class rclass)
870 : {
871 132275 : int i, hard_regno;
872 132275 : machine_mode mode;
873 132275 : unsigned int spill_regno;
874 132275 : bitmap_iterator bi;
875 :
876 : /* Find what pseudos could be spilled. */
877 986172 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[p], 0, spill_regno, bi)
878 : {
879 853897 : mode = PSEUDO_REGNO_MODE (spill_regno);
880 853897 : hard_regno = live_pseudos_reg_renumber[spill_regno];
881 853897 : if (overlaps_hard_reg_set_p (reg_class_contents[rclass],
882 : mode, hard_regno))
883 : {
884 1252731 : for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
885 : {
886 634049 : if (try_hard_reg_pseudos_check[hard_regno + i]
887 634049 : != curr_pseudo_check)
888 : {
889 298130 : try_hard_reg_pseudos_check[hard_regno + i]
890 298130 : = curr_pseudo_check;
891 298130 : bitmap_clear (&try_hard_reg_pseudos[hard_regno + i]);
892 : }
893 634049 : bitmap_set_bit (&try_hard_reg_pseudos[hard_regno + i],
894 : spill_regno);
895 : }
896 : }
897 : }
898 132275 : }
899 :
900 : /* Assign temporarily HARD_REGNO to pseudo REGNO. Temporary
901 : assignment means that we might undo the data change. */
902 : static void
903 1992462 : assign_temporarily (int regno, int hard_regno)
904 : {
905 1992462 : int p;
906 1992462 : lra_live_range_t r;
907 :
908 4014080 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
909 : {
910 12834210 : for (p = r->start; p <= r->finish; p++)
911 10812592 : if (hard_regno < 0)
912 5406296 : bitmap_clear_bit (&live_hard_reg_pseudos[p], regno);
913 : else
914 : {
915 5406296 : bitmap_set_bit (&live_hard_reg_pseudos[p], regno);
916 5406296 : insert_in_live_range_start_chain (regno);
917 : }
918 : }
919 1992462 : live_pseudos_reg_renumber[regno] = hard_regno;
920 1992462 : }
921 :
922 : /* Return true iff there is a reason why pseudo SPILL_REGNO should not
923 : be spilled. */
924 : static bool
925 302028 : must_not_spill_p (unsigned spill_regno)
926 : {
927 302028 : if ((pic_offset_table_rtx != NULL
928 81256 : && spill_regno == REGNO (pic_offset_table_rtx))
929 377739 : || ((int) spill_regno >= lra_constraint_new_regno_start
930 28685 : && ! bitmap_bit_p (&lra_inheritance_pseudos, spill_regno)
931 14497 : && ! bitmap_bit_p (&lra_split_regs, spill_regno)
932 12805 : && ! bitmap_bit_p (&lra_subreg_reload_pseudos, spill_regno)
933 12805 : && ! bitmap_bit_p (&lra_optional_reload_pseudos, spill_regno)))
934 16384 : return true;
935 : /* A reload pseudo that requires a singleton register class should
936 : not be spilled.
937 : FIXME: this mitigates the issue on certain i386 patterns, but
938 : does not solve the general case where existing reloads fully
939 : cover a limited register class. */
940 285644 : if (!bitmap_bit_p (&non_reload_pseudos, spill_regno)
941 267798 : && reg_class_size [reg_preferred_class (spill_regno)] == 1
942 302494 : && reg_alternate_class (spill_regno) == NO_REGS)
943 : return true;
944 : return false;
945 : }
946 :
947 : /* Array used for sorting reload pseudos for subsequent allocation
948 : after spilling some pseudo. */
949 : static int *sorted_reload_pseudos;
950 :
951 : /* Spill some pseudos for a reload pseudo REGNO and return hard
952 : register which should be used for pseudo after spilling. The
953 : function adds spilled pseudos to SPILLED_PSEUDO_BITMAP. When we
954 : choose hard register (and pseudos occupying the hard registers and
955 : to be spilled), we take into account not only how REGNO will
956 : benefit from the spills but also how other reload pseudos not yet
957 : assigned to hard registers benefit from the spills too. In very
958 : rare cases, the function can fail and return -1.
959 :
960 : If FIRST_P, return the first available hard reg ignoring other
961 : criteria, e.g. allocation cost and cost of spilling non-reload
962 : pseudos. This approach results in less hard reg pool fragmentation
963 : and permit to allocate hard regs to reload pseudos in complicated
964 : situations where pseudo sizes are different. */
965 : static int
966 55512 : spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
967 : {
968 55512 : int i, j, n, p, hard_regno, best_hard_regno, cost, best_cost, rclass_size;
969 55512 : int reload_hard_regno, reload_cost;
970 55512 : bool static_p, best_static_p;
971 55512 : machine_mode mode;
972 55512 : enum reg_class rclass;
973 55512 : unsigned int spill_regno, reload_regno, uid;
974 55512 : int insn_pseudos_num, best_insn_pseudos_num;
975 55512 : int bad_spills_num, smallest_bad_spills_num;
976 55512 : lra_live_range_t r;
977 55512 : bitmap_iterator bi;
978 :
979 55512 : rclass = regno_allocno_class_array[regno];
980 55512 : lra_assert (reg_renumber[regno] < 0 && rclass != NO_REGS);
981 55512 : bitmap_clear (&insn_conflict_pseudos);
982 55512 : bitmap_clear (&best_spill_pseudos_bitmap);
983 163429 : EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi)
984 : {
985 107917 : struct lra_insn_reg *ir;
986 :
987 363504 : for (ir = lra_get_insn_regs (uid); ir != NULL; ir = ir->next)
988 255587 : if (ir->regno >= FIRST_PSEUDO_REGISTER)
989 246057 : bitmap_set_bit (&insn_conflict_pseudos, ir->regno);
990 : }
991 55512 : best_hard_regno = -1;
992 55512 : best_cost = INT_MAX;
993 55512 : best_static_p = true;
994 55512 : best_insn_pseudos_num = INT_MAX;
995 55512 : smallest_bad_spills_num = INT_MAX;
996 55512 : rclass_size = ira_class_hard_regs_num[rclass];
997 55512 : mode = PSEUDO_REGNO_MODE (regno);
998 : /* Invalidate try_hard_reg_pseudos elements. */
999 55512 : curr_pseudo_check++;
1000 115612 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
1001 192375 : for (p = r->start; p <= r->finish; p++)
1002 132275 : setup_try_hard_regno_pseudos (p, rclass);
1003 422891 : for (i = 0; i < rclass_size; i++)
1004 : {
1005 367379 : hard_regno = ira_class_hard_regs[rclass][i];
1006 367379 : bitmap_clear (&spill_pseudos_bitmap);
1007 746510 : for (j = hard_regno_nregs (hard_regno, mode) - 1; j >= 0; j--)
1008 : {
1009 379131 : if (hard_regno + j >= FIRST_PSEUDO_REGISTER)
1010 : break;
1011 379131 : if (try_hard_reg_pseudos_check[hard_regno + j] != curr_pseudo_check)
1012 74655 : continue;
1013 304476 : lra_assert (!bitmap_empty_p (&try_hard_reg_pseudos[hard_regno + j]));
1014 304476 : bitmap_ior_into (&spill_pseudos_bitmap,
1015 304476 : &try_hard_reg_pseudos[hard_regno + j]);
1016 : }
1017 : /* Spill pseudos. */
1018 367379 : static_p = false;
1019 652462 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1020 302028 : if (must_not_spill_p (spill_regno))
1021 16945 : goto fail;
1022 285083 : else if (non_spilled_static_chain_regno_p (spill_regno))
1023 0 : static_p = true;
1024 350434 : insn_pseudos_num = 0;
1025 350434 : bad_spills_num = 0;
1026 350434 : if (lra_dump_file != NULL)
1027 0 : fprintf (lra_dump_file, " Trying %d:", hard_regno);
1028 350434 : sparseset_clear (live_range_reload_inheritance_pseudos);
1029 635319 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1030 : {
1031 284885 : if (bitmap_bit_p (&insn_conflict_pseudos, spill_regno))
1032 46584 : insn_pseudos_num++;
1033 284885 : if (spill_regno >= (unsigned int) lra_bad_spill_regno_start)
1034 0 : bad_spills_num++;
1035 284885 : for (r = lra_reg_info[spill_regno].live_ranges;
1036 937275 : r != NULL;
1037 652390 : r = r->next)
1038 : {
1039 58756873 : for (p = r->start; p <= r->finish; p++)
1040 : {
1041 58104483 : lra_live_range_t r2;
1042 :
1043 58104483 : for (r2 = start_point_ranges[p];
1044 100246467 : r2 != NULL;
1045 42141984 : r2 = r2->start_next)
1046 42141984 : if (r2->regno >= lra_constraint_new_regno_start)
1047 23886693 : sparseset_set_bit (live_range_reload_inheritance_pseudos,
1048 : r2->regno);
1049 : }
1050 : }
1051 : }
1052 350434 : n = 0;
1053 350434 : if (sparseset_cardinality (live_range_reload_inheritance_pseudos)
1054 350434 : <= (unsigned)param_lra_max_considered_reload_pseudos)
1055 14127060 : EXECUTE_IF_SET_IN_SPARSESET (live_range_reload_inheritance_pseudos,
1056 : reload_regno)
1057 6718356 : if ((int) reload_regno != regno
1058 6458932 : && (ira_reg_classes_intersect_p
1059 6458932 : [rclass][regno_allocno_class_array[reload_regno]])
1060 5617628 : && live_pseudos_reg_renumber[reload_regno] < 0
1061 9955006 : && find_hard_regno_for (reload_regno, &cost, -1, first_p) < 0)
1062 1522594 : sorted_reload_pseudos[n++] = reload_regno;
1063 635319 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1064 : {
1065 284885 : update_lives (spill_regno, true);
1066 284885 : if (lra_dump_file != NULL)
1067 0 : fprintf (lra_dump_file, " spill %d(freq=%d)",
1068 0 : spill_regno, lra_reg_info[spill_regno].freq);
1069 : }
1070 350434 : hard_regno = find_hard_regno_for (regno, &cost, -1, first_p);
1071 350434 : if (hard_regno >= 0)
1072 : {
1073 271916 : assign_temporarily (regno, hard_regno);
1074 271916 : qsort (sorted_reload_pseudos, n, sizeof (int),
1075 : reload_pseudo_compare_func);
1076 2059384 : for (j = 0; j < n; j++)
1077 : {
1078 1515552 : reload_regno = sorted_reload_pseudos[j];
1079 1515552 : lra_assert (live_pseudos_reg_renumber[reload_regno] < 0);
1080 3031104 : if ((reload_hard_regno
1081 1515552 : = find_hard_regno_for (reload_regno,
1082 : &reload_cost, -1, first_p)) >= 0)
1083 : {
1084 724315 : if (lra_dump_file != NULL)
1085 0 : fprintf (lra_dump_file, " assign %d(cost=%d)",
1086 : reload_regno, reload_cost);
1087 724315 : assign_temporarily (reload_regno, reload_hard_regno);
1088 724315 : cost += reload_cost;
1089 : }
1090 : }
1091 547103 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1092 : {
1093 275187 : rtx_insn_list *x;
1094 :
1095 275187 : cost += lra_reg_info[spill_regno].freq;
1096 275187 : if (ira_reg_equiv[spill_regno].memory != NULL
1097 265923 : || ira_reg_equiv[spill_regno].constant != NULL)
1098 11109 : for (x = ira_reg_equiv[spill_regno].init_insns;
1099 20770 : x != NULL;
1100 9661 : x = x->next ())
1101 28573 : cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (x->insn ()));
1102 : }
1103 : /* Avoid spilling static chain pointer pseudo when non-local
1104 : goto is used. */
1105 271916 : if ((! static_p && best_static_p)
1106 224576 : || (static_p == best_static_p
1107 224576 : && (best_insn_pseudos_num > insn_pseudos_num
1108 217569 : || (best_insn_pseudos_num == insn_pseudos_num
1109 197358 : && (bad_spills_num < smallest_bad_spills_num
1110 197358 : || (bad_spills_num == smallest_bad_spills_num
1111 197358 : && best_cost > cost))))))
1112 : {
1113 93909 : best_insn_pseudos_num = insn_pseudos_num;
1114 93909 : smallest_bad_spills_num = bad_spills_num;
1115 93909 : best_static_p = static_p;
1116 93909 : best_cost = cost;
1117 93909 : best_hard_regno = hard_regno;
1118 93909 : bitmap_copy (&best_spill_pseudos_bitmap, &spill_pseudos_bitmap);
1119 93909 : if (lra_dump_file != NULL)
1120 0 : fprintf (lra_dump_file,
1121 : " Now best %d(cost=%d, bad_spills=%d, insn_pseudos=%d)\n",
1122 : hard_regno, cost, bad_spills_num, insn_pseudos_num);
1123 : }
1124 271916 : assign_temporarily (regno, -1);
1125 2059384 : for (j = 0; j < n; j++)
1126 : {
1127 1515552 : reload_regno = sorted_reload_pseudos[j];
1128 1515552 : if (live_pseudos_reg_renumber[reload_regno] >= 0)
1129 724315 : assign_temporarily (reload_regno, -1);
1130 : }
1131 : }
1132 350434 : if (lra_dump_file != NULL)
1133 0 : fprintf (lra_dump_file, "\n");
1134 : /* Restore the live hard reg pseudo info for spilled pseudos. */
1135 635319 : EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
1136 284885 : update_lives (spill_regno, false);
1137 350434 : fail:
1138 367379 : ;
1139 : }
1140 : /* Spill: */
1141 103222 : EXECUTE_IF_SET_IN_BITMAP (&best_spill_pseudos_bitmap, 0, spill_regno, bi)
1142 : {
1143 47710 : if ((int) spill_regno >= lra_constraint_new_regno_start)
1144 4377 : former_reload_pseudo_spill_p = true;
1145 47710 : if (lra_dump_file != NULL)
1146 0 : fprintf (lra_dump_file, " Spill %sr%d(hr=%d, freq=%d) for r%d\n",
1147 : pseudo_prefix_title (spill_regno),
1148 0 : spill_regno, reg_renumber[spill_regno],
1149 0 : lra_reg_info[spill_regno].freq, regno);
1150 47710 : update_lives (spill_regno, true);
1151 47710 : lra_setup_reg_renumber (spill_regno, -1, false);
1152 : }
1153 55512 : bitmap_ior_into (spilled_pseudo_bitmap, &best_spill_pseudos_bitmap);
1154 55512 : return best_hard_regno;
1155 : }
1156 :
1157 : /* Assign HARD_REGNO to REGNO. */
1158 : static void
1159 6577887 : assign_hard_regno (int hard_regno, int regno)
1160 : {
1161 6577887 : int i;
1162 :
1163 6577887 : lra_assert (hard_regno >= 0);
1164 6577887 : lra_setup_reg_renumber (regno, hard_regno, true);
1165 6577887 : update_lives (regno, false);
1166 13340698 : for (i = 0;
1167 13340698 : i < hard_regno_nregs (hard_regno, lra_reg_info[regno].biggest_mode);
1168 : i++)
1169 6762811 : df_set_regs_ever_live (hard_regno + i, true);
1170 6577887 : }
1171 :
1172 : /* Array used for sorting different pseudos. */
1173 : static int *sorted_pseudos;
1174 :
1175 : /* The constraints pass is allowed to create equivalences between
1176 : pseudos that make the current allocation "incorrect" (in the sense
1177 : that pseudos are assigned to hard registers from their own conflict
1178 : sets). The global variable check_and_force_assignment_correctness_p says
1179 : whether this might have happened.
1180 :
1181 : Process pseudos assigned to hard registers (less frequently used
1182 : first), spill if a conflict is found, and mark the spilled pseudos
1183 : in SPILLED_PSEUDO_BITMAP. Set up LIVE_HARD_REG_PSEUDOS from
1184 : pseudos, assigned to hard registers. */
1185 : static void
1186 1573464 : setup_live_pseudos_and_spill_after_risky_transforms (bitmap
1187 : spilled_pseudo_bitmap)
1188 : {
1189 1573464 : int p, i, j, n, regno, hard_regno, biggest_nregs, nregs_diff;
1190 1573464 : unsigned int k, conflict_regno;
1191 1573464 : poly_int64 offset;
1192 1573464 : int val;
1193 1573464 : HARD_REG_SET conflict_set;
1194 1573464 : machine_mode mode, biggest_mode;
1195 1573464 : lra_live_range_t r;
1196 1573464 : bitmap_iterator bi;
1197 1573464 : int max_regno = max_reg_num ();
1198 :
1199 1573464 : if (! check_and_force_assignment_correctness_p)
1200 : {
1201 21276801 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1202 21218589 : if (reg_renumber[i] >= 0 && lra_reg_info[i].nrefs > 0)
1203 10214936 : update_lives (i, false);
1204 58212 : return;
1205 : }
1206 82168366 : for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1207 80653114 : if ((pic_offset_table_rtx == NULL_RTX
1208 7273719 : || i != (int) REGNO (pic_offset_table_rtx))
1209 87877285 : && (hard_regno = reg_renumber[i]) >= 0 && lra_reg_info[i].nrefs > 0)
1210 : {
1211 31598902 : biggest_mode = lra_reg_info[i].biggest_mode;
1212 31598902 : biggest_nregs = hard_regno_nregs (hard_regno, biggest_mode);
1213 31598902 : nregs_diff = (biggest_nregs
1214 31598902 : - hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (i)));
1215 31598902 : enum reg_class rclass = lra_get_allocno_class (i);
1216 :
1217 31598902 : if ((WORDS_BIG_ENDIAN
1218 : && (hard_regno - nregs_diff < 0
1219 : || !TEST_HARD_REG_BIT (reg_class_contents[rclass],
1220 : hard_regno - nregs_diff)))
1221 : || (!WORDS_BIG_ENDIAN
1222 31598902 : && (hard_regno + nregs_diff >= FIRST_PSEUDO_REGISTER
1223 31598902 : || !TEST_HARD_REG_BIT (reg_class_contents[rclass],
1224 : hard_regno + nregs_diff))))
1225 : {
1226 : /* Hard registers of paradoxical sub-registers are out of
1227 : range of pseudo register class. Spill the pseudo. */
1228 0 : reg_renumber[i] = -1;
1229 0 : continue;
1230 : }
1231 31598902 : sorted_pseudos[n++] = i;
1232 : }
1233 1515252 : qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func);
1234 1515252 : if (pic_offset_table_rtx != NULL_RTX
1235 49548 : && (regno = REGNO (pic_offset_table_rtx)) >= FIRST_PSEUDO_REGISTER
1236 1564800 : && reg_renumber[regno] >= 0 && lra_reg_info[regno].nrefs > 0)
1237 43504 : sorted_pseudos[n++] = regno;
1238 33157658 : for (i = n - 1; i >= 0; i--)
1239 : {
1240 31642406 : regno = sorted_pseudos[i];
1241 31642406 : hard_regno = reg_renumber[regno];
1242 31642406 : lra_assert (hard_regno >= 0);
1243 31642406 : mode = lra_reg_info[regno].biggest_mode;
1244 31642406 : sparseset_clear (live_range_hard_reg_pseudos);
1245 68753229 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
1246 : {
1247 84682613 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi)
1248 47571790 : sparseset_set_bit (live_range_hard_reg_pseudos, k);
1249 274584344 : for (p = r->start + 1; p <= r->finish; p++)
1250 : {
1251 237473521 : lra_live_range_t r2;
1252 :
1253 237473521 : for (r2 = start_point_ranges[p];
1254 365429416 : r2 != NULL;
1255 127955895 : r2 = r2->start_next)
1256 127955895 : if (live_pseudos_reg_renumber[r2->regno] >= 0)
1257 68746484 : sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
1258 : }
1259 : }
1260 31642406 : conflict_set = lra_no_alloc_regs;
1261 31642406 : conflict_set |= lra_reg_info[regno].conflict_hard_regs;
1262 31642406 : val = lra_reg_info[regno].val;
1263 31642406 : offset = lra_reg_info[regno].offset;
1264 128305761 : EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno)
1265 96663355 : if (!lra_reg_val_equal_p (conflict_regno, val, offset)
1266 : /* If it is multi-register pseudos they should start on
1267 : the same hard register. */
1268 81782 : || hard_regno != reg_renumber[conflict_regno])
1269 : {
1270 96591999 : int conflict_hard_regno = reg_renumber[conflict_regno];
1271 :
1272 96591999 : biggest_mode = lra_reg_info[conflict_regno].biggest_mode;
1273 96591999 : biggest_nregs = hard_regno_nregs (conflict_hard_regno,
1274 : biggest_mode);
1275 96591999 : nregs_diff
1276 96591999 : = (biggest_nregs
1277 96591999 : - hard_regno_nregs (conflict_hard_regno,
1278 96591999 : PSEUDO_REGNO_MODE (conflict_regno)));
1279 96591999 : add_to_hard_reg_set (&conflict_set,
1280 : biggest_mode,
1281 : conflict_hard_regno
1282 : - (WORDS_BIG_ENDIAN ? nregs_diff : 0));
1283 : }
1284 31642406 : if (! overlaps_hard_reg_set_p (conflict_set, mode, hard_regno))
1285 : {
1286 31630297 : update_lives (regno, false);
1287 31630297 : continue;
1288 : }
1289 12109 : bitmap_set_bit (spilled_pseudo_bitmap, regno);
1290 12109 : for (j = 0;
1291 32038 : j < hard_regno_nregs (hard_regno, PSEUDO_REGNO_MODE (regno));
1292 : j++)
1293 19929 : lra_hard_reg_usage[hard_regno + j] -= lra_reg_info[regno].freq;
1294 12109 : reg_renumber[regno] = -1;
1295 12109 : if (regno >= lra_constraint_new_regno_start)
1296 0 : former_reload_pseudo_spill_p = true;
1297 12109 : if (lra_dump_file != NULL)
1298 0 : fprintf (lra_dump_file, " Spill r%d after risky transformations\n",
1299 : regno);
1300 : }
1301 : }
1302 :
1303 : /* Improve allocation by assigning the same hard regno of inheritance
1304 : pseudos to the connected pseudos. We need this because inheritance
1305 : pseudos are allocated after reload pseudos in the thread and when
1306 : we assign a hard register to a reload pseudo we don't know yet that
1307 : the connected inheritance pseudos can get the same hard register.
1308 : Add pseudos with changed allocation to bitmap CHANGED_PSEUDOS. */
1309 : static void
1310 1573464 : improve_inheritance (bitmap changed_pseudos)
1311 : {
1312 1573464 : unsigned int k;
1313 1573464 : int regno, another_regno, hard_regno, another_hard_regno, cost, i, n;
1314 1573464 : lra_copy_t cp, next_cp;
1315 1573464 : bitmap_iterator bi;
1316 :
1317 1573464 : if (lra_inheritance_iter > LRA_MAX_INHERITANCE_PASSES)
1318 5306 : return;
1319 1568158 : n = 0;
1320 3439658 : EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, k, bi)
1321 1871500 : if (reg_renumber[k] >= 0 && lra_reg_info[k].nrefs != 0)
1322 1261037 : sorted_pseudos[n++] = k;
1323 1568158 : qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func);
1324 4397353 : for (i = 0; i < n; i++)
1325 : {
1326 1261037 : regno = sorted_pseudos[i];
1327 1261037 : hard_regno = reg_renumber[regno];
1328 1261037 : lra_assert (hard_regno >= 0);
1329 3639531 : for (cp = lra_reg_info[regno].copies; cp != NULL; cp = next_cp)
1330 : {
1331 2378494 : if (cp->regno1 == regno)
1332 : {
1333 411721 : next_cp = cp->regno1_next;
1334 411721 : another_regno = cp->regno2;
1335 : }
1336 1966773 : else if (cp->regno2 == regno)
1337 : {
1338 1966773 : next_cp = cp->regno2_next;
1339 1966773 : another_regno = cp->regno1;
1340 : }
1341 : else
1342 0 : gcc_unreachable ();
1343 : /* Don't change reload pseudo allocation. It might have
1344 : this allocation for a purpose and changing it can result
1345 : in LRA cycling. */
1346 2378494 : if ((another_regno < lra_constraint_new_regno_start
1347 2378494 : || bitmap_bit_p (&lra_inheritance_pseudos, another_regno))
1348 846275 : && (another_hard_regno = reg_renumber[another_regno]) >= 0
1349 3112126 : && another_hard_regno != hard_regno)
1350 : {
1351 72870 : if (lra_dump_file != NULL)
1352 1 : fprintf
1353 1 : (lra_dump_file,
1354 : " Improving inheritance for %d(%d) and %d(%d)...\n",
1355 : regno, hard_regno, another_regno, another_hard_regno);
1356 72870 : update_lives (another_regno, true);
1357 72870 : lra_setup_reg_renumber (another_regno, -1, false);
1358 72870 : if (hard_regno == find_hard_regno_for (another_regno, &cost,
1359 : hard_regno, false))
1360 39509 : assign_hard_regno (hard_regno, another_regno);
1361 : else
1362 33361 : assign_hard_regno (another_hard_regno, another_regno);
1363 72870 : bitmap_set_bit (changed_pseudos, another_regno);
1364 : }
1365 : }
1366 : }
1367 : }
1368 :
1369 :
1370 : /* Bitmap finally containing all pseudos spilled on this assignment
1371 : pass. */
1372 : static bitmap_head all_spilled_pseudos;
1373 : /* All pseudos whose allocation was changed. */
1374 : static bitmap_head changed_pseudo_bitmap;
1375 :
1376 :
1377 : /* Add to LIVE_RANGE_HARD_REG_PSEUDOS all pseudos conflicting with
1378 : REGNO and whose hard regs can be assigned to REGNO. */
1379 : static void
1380 4315 : find_all_spills_for (int regno)
1381 : {
1382 4315 : int p;
1383 4315 : lra_live_range_t r;
1384 4315 : unsigned int k;
1385 4315 : bitmap_iterator bi;
1386 4315 : enum reg_class rclass;
1387 4315 : bool *rclass_intersect_p;
1388 :
1389 4315 : rclass = regno_allocno_class_array[regno];
1390 4315 : rclass_intersect_p = ira_reg_classes_intersect_p[rclass];
1391 10909 : for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next)
1392 : {
1393 27060 : EXECUTE_IF_SET_IN_BITMAP (&live_hard_reg_pseudos[r->start], 0, k, bi)
1394 20466 : if (rclass_intersect_p[regno_allocno_class_array[k]])
1395 12311 : sparseset_set_bit (live_range_hard_reg_pseudos, k);
1396 14091 : for (p = r->start + 1; p <= r->finish; p++)
1397 : {
1398 7497 : lra_live_range_t r2;
1399 :
1400 7497 : for (r2 = start_point_ranges[p];
1401 16956 : r2 != NULL;
1402 9459 : r2 = r2->start_next)
1403 : {
1404 9459 : if (live_pseudos_reg_renumber[r2->regno] >= 0
1405 9395 : && ! sparseset_bit_p (live_range_hard_reg_pseudos, r2->regno)
1406 18851 : && rclass_intersect_p[regno_allocno_class_array[r2->regno]])
1407 9391 : sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
1408 : }
1409 : }
1410 : }
1411 4315 : }
1412 :
1413 : /* Assign hard registers to reload pseudos and other pseudos. Return
1414 : true if we was not able to assign hard registers to all reload
1415 : pseudos. */
1416 : static bool
1417 1573464 : assign_by_spills (void)
1418 : {
1419 1573464 : int i, n, nfails, iter, regno, regno2, hard_regno, cost;
1420 1573464 : rtx restore_rtx;
1421 1573464 : bitmap_head changed_insns, do_not_assign_nonreload_pseudos;
1422 1573464 : unsigned int u, conflict_regno;
1423 1573464 : bitmap_iterator bi;
1424 1573464 : bool reload_p, fails_p = false;
1425 1573464 : int max_regno = max_reg_num ();
1426 :
1427 13706751 : for (n = 0, i = lra_constraint_new_regno_start; i < max_regno; i++)
1428 12133287 : if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0
1429 7783042 : && regno_allocno_class_array[i] != NO_REGS)
1430 6837044 : sorted_pseudos[n++] = i;
1431 1573464 : bitmap_initialize (&insn_conflict_pseudos, ®_obstack);
1432 1573464 : bitmap_initialize (&spill_pseudos_bitmap, ®_obstack);
1433 1573464 : bitmap_initialize (&best_spill_pseudos_bitmap, ®_obstack);
1434 1573464 : update_hard_regno_preference_check = XCNEWVEC (int, max_regno);
1435 1573464 : curr_update_hard_regno_preference_check = 0;
1436 1573464 : memset (try_hard_reg_pseudos_check, 0, sizeof (try_hard_reg_pseudos_check));
1437 146332152 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1438 144758688 : bitmap_initialize (&try_hard_reg_pseudos[i], ®_obstack);
1439 1573464 : curr_pseudo_check = 0;
1440 1573464 : bitmap_initialize (&changed_insns, ®_obstack);
1441 1573464 : bitmap_initialize (&non_reload_pseudos, ®_obstack);
1442 1573464 : bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs);
1443 1573464 : bitmap_ior_into (&non_reload_pseudos, &lra_subreg_reload_pseudos);
1444 1573464 : bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos);
1445 1573464 : for (iter = 0; iter <= 1; iter++)
1446 : {
1447 1576087 : qsort (sorted_pseudos, n, sizeof (int), reload_pseudo_compare_func);
1448 1576087 : nfails = 0;
1449 8423317 : for (i = 0; i < n; i++)
1450 : {
1451 6847230 : regno = sorted_pseudos[i];
1452 6847230 : if (reg_renumber[regno] >= 0)
1453 1403 : continue;
1454 6845827 : if (lra_dump_file != NULL)
1455 198 : fprintf (lra_dump_file, " Assigning to %d "
1456 : "(cl=%s, orig=%d, freq=%d, tfirst=%d, tfreq=%d)...\n",
1457 99 : regno, reg_class_names[regno_allocno_class_array[regno]],
1458 99 : ORIGINAL_REGNO (regno_reg_rtx[regno]),
1459 99 : lra_reg_info[regno].freq, regno_assign_info[regno].first,
1460 99 : regno_assign_info[regno_assign_info[regno].first].freq);
1461 6845827 : hard_regno = find_hard_regno_for (regno, &cost, -1, iter == 1);
1462 6845827 : reload_p = ! bitmap_bit_p (&non_reload_pseudos, regno);
1463 6845827 : if (hard_regno < 0 && reload_p)
1464 55512 : hard_regno = spill_for (regno, &all_spilled_pseudos, iter == 1);
1465 6845827 : if (hard_regno < 0)
1466 : {
1467 467327 : if (reload_p)
1468 : {
1469 : /* Put unassigned reload pseudo first in the array. */
1470 8172 : regno2 = sorted_pseudos[nfails];
1471 8172 : sorted_pseudos[nfails++] = regno;
1472 8172 : sorted_pseudos[i] = regno2;
1473 : }
1474 : else
1475 : {
1476 : /* Consider all alternatives on the next constraint
1477 : subpass. */
1478 459155 : bitmap_set_bit (&all_spilled_pseudos, regno);
1479 : }
1480 : }
1481 : else
1482 : {
1483 : /* This register might have been spilled by the previous
1484 : pass. Indicate that it is no longer spilled. */
1485 6378500 : bitmap_clear_bit (&all_spilled_pseudos, regno);
1486 6378500 : assign_hard_regno (hard_regno, regno);
1487 6378500 : if (! reload_p || regno_allocno_class_array[regno] == ALL_REGS)
1488 : /* As non-reload pseudo assignment is changed we should
1489 : reconsider insns referring for the pseudo. Do the same if a
1490 : reload pseudo did not refine its class which can happens
1491 : when the pseudo occurs only in reload insns. */
1492 1385659 : bitmap_set_bit (&changed_pseudo_bitmap, regno);
1493 : }
1494 : }
1495 1576087 : if (nfails == 0 || iter > 0)
1496 : {
1497 1573464 : fails_p = nfails != 0;
1498 1573464 : break;
1499 : }
1500 : /* This is a very rare event. We cannot assign a hard register
1501 : to reload pseudo because the hard register was assigned to
1502 : another reload pseudo on a previous assignment pass. For x86
1503 : example, on the 1st pass we assigned CX (although another
1504 : hard register could be used for this) to reload pseudo in an
1505 : insn, on the 2nd pass we need CX (and only this) hard
1506 : register for a new reload pseudo in the same insn. Another
1507 : possible situation may occur in assigning to multi-regs
1508 : reload pseudos when hard regs pool is too fragmented even
1509 : after spilling non-reload pseudos.
1510 :
1511 : We should do something radical here to succeed. Here we
1512 : spill *all* conflicting pseudos and reassign them. */
1513 2623 : if (lra_dump_file != NULL)
1514 0 : fprintf (lra_dump_file, " 2nd iter for reload pseudo assignments:\n");
1515 2623 : sparseset_clear (live_range_hard_reg_pseudos);
1516 6938 : for (i = 0; i < nfails; i++)
1517 : {
1518 4315 : if (lra_dump_file != NULL)
1519 0 : fprintf (lra_dump_file, " Reload r%d assignment failure\n",
1520 0 : sorted_pseudos[i]);
1521 4315 : find_all_spills_for (sorted_pseudos[i]);
1522 : }
1523 27681 : EXECUTE_IF_SET_IN_SPARSESET (live_range_hard_reg_pseudos, conflict_regno)
1524 : {
1525 12529 : if ((int) conflict_regno >= lra_constraint_new_regno_start)
1526 : {
1527 2329 : sorted_pseudos[nfails++] = conflict_regno;
1528 2329 : former_reload_pseudo_spill_p = true;
1529 : }
1530 : else
1531 : /* It is better to do reloads before spilling as after the
1532 : spill-subpass we will reload memory instead of pseudos
1533 : and this will make reusing reload pseudos more
1534 : complicated. Going directly to the spill pass in such
1535 : case might result in worse code performance or even LRA
1536 : cycling if we have few registers. */
1537 10200 : bitmap_set_bit (&all_spilled_pseudos, conflict_regno);
1538 12529 : if (lra_dump_file != NULL)
1539 0 : fprintf (lra_dump_file, " Spill %s r%d(hr=%d, freq=%d)\n",
1540 : pseudo_prefix_title (conflict_regno), conflict_regno,
1541 0 : reg_renumber[conflict_regno],
1542 0 : lra_reg_info[conflict_regno].freq);
1543 12529 : update_lives (conflict_regno, true);
1544 12529 : lra_setup_reg_renumber (conflict_regno, -1, false);
1545 : }
1546 2623 : if (n < nfails)
1547 : n = nfails;
1548 : }
1549 1573464 : improve_inheritance (&changed_pseudo_bitmap);
1550 1573464 : bitmap_clear (&non_reload_pseudos);
1551 1573464 : bitmap_clear (&changed_insns);
1552 1573464 : if (! lra_simple_p)
1553 : {
1554 : /* We should not assign to original pseudos of inheritance
1555 : pseudos or split pseudos if any its inheritance pseudo did
1556 : not get hard register or any its split pseudo was not split
1557 : because undo inheritance/split pass will extend live range of
1558 : such inheritance or split pseudos. */
1559 1573458 : bitmap_initialize (&do_not_assign_nonreload_pseudos, ®_obstack);
1560 3632226 : EXECUTE_IF_SET_IN_BITMAP (&lra_inheritance_pseudos, 0, u, bi)
1561 2058768 : if ((restore_rtx = lra_reg_info[u].restore_rtx) != NULL_RTX
1562 1184348 : && REG_P (restore_rtx)
1563 1161137 : && reg_renumber[u] < 0
1564 2491119 : && bitmap_bit_p (&lra_inheritance_pseudos, u))
1565 432351 : bitmap_set_bit (&do_not_assign_nonreload_pseudos, REGNO (restore_rtx));
1566 2536472 : EXECUTE_IF_SET_IN_BITMAP (&lra_split_regs, 0, u, bi)
1567 963014 : if ((restore_rtx = lra_reg_info[u].restore_rtx) != NULL_RTX
1568 963014 : && reg_renumber[u] >= 0)
1569 : {
1570 1028 : lra_assert (REG_P (restore_rtx));
1571 1028 : bitmap_set_bit (&do_not_assign_nonreload_pseudos, REGNO (restore_rtx));
1572 : }
1573 103214898 : for (n = 0, i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1574 101641440 : if (((i < lra_constraint_new_regno_start
1575 89511847 : && ! bitmap_bit_p (&do_not_assign_nonreload_pseudos, i))
1576 12428133 : || (bitmap_bit_p (&lra_inheritance_pseudos, i)
1577 2058768 : && lra_reg_info[i].restore_rtx != NULL_RTX)
1578 11243785 : || (bitmap_bit_p (&lra_split_regs, i)
1579 963014 : && lra_reg_info[i].restore_rtx != NULL_RTX)
1580 10580072 : || bitmap_bit_p (&lra_subreg_reload_pseudos, i)
1581 10579605 : || bitmap_bit_p (&lra_optional_reload_pseudos, i))
1582 92198745 : && reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0
1583 104032452 : && regno_allocno_class_array[i] != NO_REGS)
1584 1689821 : sorted_pseudos[n++] = i;
1585 1573458 : bitmap_clear (&do_not_assign_nonreload_pseudos);
1586 1573458 : if (n != 0 && lra_dump_file != NULL)
1587 2 : fprintf (lra_dump_file, " Reassigning non-reload pseudos\n");
1588 1573458 : qsort (sorted_pseudos, n, sizeof (int), pseudo_compare_func);
1589 3263279 : for (i = 0; i < n; i++)
1590 : {
1591 1689821 : regno = sorted_pseudos[i];
1592 1689821 : hard_regno = find_hard_regno_for (regno, &cost, -1, false);
1593 1689821 : if (hard_regno >= 0)
1594 : {
1595 126517 : assign_hard_regno (hard_regno, regno);
1596 : /* We change allocation for non-reload pseudo on this
1597 : iteration -- mark the pseudo for invalidation of used
1598 : alternatives of insns containing the pseudo. */
1599 126517 : bitmap_set_bit (&changed_pseudo_bitmap, regno);
1600 : }
1601 : else
1602 : {
1603 1563304 : enum reg_class rclass = lra_get_allocno_class (regno);
1604 1563304 : enum reg_class spill_class;
1605 :
1606 3126608 : if (targetm.spill_class == NULL
1607 1563304 : || lra_reg_info[regno].restore_rtx == NULL_RTX
1608 443291 : || ! bitmap_bit_p (&lra_inheritance_pseudos, regno)
1609 1563304 : || (spill_class
1610 427128 : = ((enum reg_class)
1611 427128 : targetm.spill_class
1612 427128 : ((reg_class_t) rclass,
1613 427128 : PSEUDO_REGNO_MODE (regno)))) == NO_REGS)
1614 1563304 : continue;
1615 0 : regno_allocno_class_array[regno] = spill_class;
1616 0 : hard_regno = find_hard_regno_for (regno, &cost, -1, false);
1617 0 : if (hard_regno < 0)
1618 0 : regno_allocno_class_array[regno] = rclass;
1619 : else
1620 : {
1621 0 : setup_reg_classes
1622 0 : (regno, spill_class, spill_class, spill_class);
1623 0 : assign_hard_regno (hard_regno, regno);
1624 0 : bitmap_set_bit (&changed_pseudo_bitmap, regno);
1625 : }
1626 : }
1627 : }
1628 : }
1629 1573464 : free (update_hard_regno_preference_check);
1630 1573464 : bitmap_clear (&best_spill_pseudos_bitmap);
1631 1573464 : bitmap_clear (&spill_pseudos_bitmap);
1632 1573464 : bitmap_clear (&insn_conflict_pseudos);
1633 1573464 : return fails_p;
1634 : }
1635 :
1636 : /* Entry function to assign hard registers to new reload pseudos
1637 : starting with LRA_CONSTRAINT_NEW_REGNO_START (by possible spilling
1638 : of old pseudos) and possibly to the old pseudos. The function adds
1639 : what insns to process for the next constraint pass. Those are all
1640 : insns who contains non-reload and non-inheritance pseudos with
1641 : changed allocation.
1642 :
1643 : Return true if we did not spill any non-reload and non-inheritance
1644 : pseudos. Set up FAILS_P if we failed to assign hard registers to
1645 : all reload pseudos. */
1646 : bool
1647 1573464 : lra_assign (bool &fails_p)
1648 : {
1649 1573464 : int i;
1650 1573464 : unsigned int u;
1651 1573464 : bitmap_iterator bi;
1652 1573464 : bitmap_head insns_to_process;
1653 1573464 : bool no_spills_p;
1654 1573464 : int max_regno = max_reg_num ();
1655 :
1656 1573464 : timevar_push (TV_LRA_ASSIGN);
1657 1573464 : lra_assignment_iter++;
1658 1573464 : if (lra_dump_file != NULL)
1659 97 : fprintf (lra_dump_file, "\n********** Assignment #%d: **********\n\n",
1660 : lra_assignment_iter);
1661 1573464 : init_lives ();
1662 1573464 : sorted_pseudos = XNEWVEC (int, max_regno);
1663 1573464 : sorted_reload_pseudos = XNEWVEC (int, max_regno);
1664 1573464 : regno_allocno_class_array = XNEWVEC (enum reg_class, max_regno);
1665 1573464 : regno_live_length = XNEWVEC (int, max_regno);
1666 103445167 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1667 : {
1668 101871703 : int l;
1669 101871703 : lra_live_range_t r;
1670 :
1671 101871703 : regno_allocno_class_array[i] = lra_get_allocno_class (i);
1672 162494069 : for (l = 0, r = lra_reg_info[i].live_ranges; r != NULL; r = r->next)
1673 60622366 : l += r->finish - r->start + 1;
1674 101871703 : regno_live_length[i] = l;
1675 : }
1676 1573464 : former_reload_pseudo_spill_p = false;
1677 1573464 : init_regno_assign_info ();
1678 1573464 : bitmap_initialize (&all_spilled_pseudos, ®_obstack);
1679 1573464 : create_live_range_start_chains ();
1680 1573464 : setup_live_pseudos_and_spill_after_risky_transforms (&all_spilled_pseudos);
1681 1573464 : if (! lra_hard_reg_split_p && ! lra_asm_error_p && flag_checking)
1682 : /* Check correctness of allocation but only when there are no hard reg
1683 : splits and asm errors as in the case of errors explicit insns involving
1684 : hard regs are added or the asm is removed and this can result in
1685 : incorrect allocation. */
1686 102283147 : for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1687 100712138 : if (lra_reg_info[i].nrefs != 0
1688 50376144 : && reg_renumber[i] >= 0
1689 100712138 : && overlaps_hard_reg_set_p (lra_reg_info[i].conflict_hard_regs,
1690 41285315 : PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1691 0 : gcc_unreachable ();
1692 : /* Setup insns to process on the next constraint pass. */
1693 1573464 : bitmap_initialize (&changed_pseudo_bitmap, ®_obstack);
1694 1573464 : init_live_reload_and_inheritance_pseudos ();
1695 1573464 : fails_p = assign_by_spills ();
1696 1573464 : finish_live_reload_and_inheritance_pseudos ();
1697 1573464 : bitmap_ior_into (&changed_pseudo_bitmap, &all_spilled_pseudos);
1698 1573464 : no_spills_p = true;
1699 1848105 : EXECUTE_IF_SET_IN_BITMAP (&all_spilled_pseudos, 0, u, bi)
1700 : /* We ignore spilled pseudos created on last inheritance pass
1701 : because they will be removed. */
1702 304243 : if (lra_reg_info[u].restore_rtx == NULL_RTX)
1703 : {
1704 : no_spills_p = false;
1705 : break;
1706 : }
1707 1573464 : finish_live_range_start_chains ();
1708 1573464 : bitmap_clear (&all_spilled_pseudos);
1709 1573464 : bitmap_initialize (&insns_to_process, ®_obstack);
1710 3575078 : EXECUTE_IF_SET_IN_BITMAP (&changed_pseudo_bitmap, 0, u, bi)
1711 2001614 : bitmap_ior_into (&insns_to_process, &lra_reg_info[u].insn_bitmap);
1712 1573464 : bitmap_clear (&changed_pseudo_bitmap);
1713 6384144 : EXECUTE_IF_SET_IN_BITMAP (&insns_to_process, 0, u, bi)
1714 : {
1715 4810680 : lra_push_insn_by_uid (u);
1716 : /* Invalidate alternatives for insn should be processed. */
1717 4810680 : lra_set_used_insn_alternative_by_uid (u, -1);
1718 : }
1719 1573464 : bitmap_clear (&insns_to_process);
1720 1573464 : finish_regno_assign_info ();
1721 1573464 : free (regno_live_length);
1722 1573464 : free (regno_allocno_class_array);
1723 1573464 : free (sorted_pseudos);
1724 1573464 : free (sorted_reload_pseudos);
1725 1573464 : finish_lives ();
1726 1573464 : timevar_pop (TV_LRA_ASSIGN);
1727 1573464 : if (former_reload_pseudo_spill_p)
1728 2230 : lra_assignment_iter_after_spill++;
1729 : /* This is conditional on flag_checking because valid code can take
1730 : more than this maximum number of iteration, but at the same time
1731 : the test can uncover errors in machine descriptions. */
1732 1573464 : if (flag_checking
1733 1573444 : && (lra_assignment_iter_after_spill
1734 1573444 : > LRA_MAX_ASSIGNMENT_ITERATION_NUMBER))
1735 0 : internal_error
1736 0 : ("maximum number of LRA assignment passes is achieved (%d)",
1737 : LRA_MAX_ASSIGNMENT_ITERATION_NUMBER);
1738 : /* Reset the assignment correctness flag: */
1739 1573464 : check_and_force_assignment_correctness_p = false;
1740 1573464 : return no_spills_p;
1741 : }
1742 :
1743 : /* Find start and finish insns for reload pseudo REGNO. Return true
1744 : if we managed to find the expected insns. Return false,
1745 : otherwise. */
1746 : static bool
1747 3857 : find_reload_regno_insns (int regno, rtx_insn * &start, rtx_insn * &finish)
1748 : {
1749 3857 : unsigned int uid;
1750 3857 : bitmap_iterator bi;
1751 3857 : int insns_num = 0;
1752 3857 : bool clobber_p = false;
1753 3857 : rtx_insn *prev_insn, *next_insn;
1754 3857 : rtx_insn *start_insn = NULL, *first_insn = NULL, *second_insn = NULL;
1755 :
1756 13662 : EXECUTE_IF_SET_IN_BITMAP (&lra_reg_info[regno].insn_bitmap, 0, uid, bi)
1757 : {
1758 9805 : if (start_insn == NULL)
1759 3857 : start_insn = lra_insn_recog_data[uid]->insn;
1760 9805 : if (GET_CODE (PATTERN (lra_insn_recog_data[uid]->insn)) == CLOBBER)
1761 : clobber_p = true;
1762 : else
1763 9805 : insns_num++;
1764 : }
1765 : /* For reload pseudo we should have at most 3 insns besides clobber referring for
1766 : it: input/output reload insns and the original insn. */
1767 3857 : if (insns_num > 3)
1768 : return false;
1769 3857 : if (clobber_p)
1770 0 : insns_num++;
1771 3857 : if (insns_num > 1)
1772 : {
1773 3651 : for (prev_insn = PREV_INSN (start_insn),
1774 3651 : next_insn = NEXT_INSN (start_insn);
1775 218833 : insns_num != 1 && (prev_insn != NULL
1776 2278 : || (next_insn != NULL && second_insn == NULL)); )
1777 : {
1778 : if (prev_insn != NULL)
1779 : {
1780 215182 : if (bitmap_bit_p (&lra_reg_info[regno].insn_bitmap,
1781 215182 : INSN_UID (prev_insn)))
1782 : {
1783 880 : first_insn = prev_insn;
1784 880 : insns_num--;
1785 : }
1786 215182 : prev_insn = PREV_INSN (prev_insn);
1787 : }
1788 215182 : if (next_insn != NULL && second_insn == NULL)
1789 : {
1790 5950 : if (! bitmap_bit_p (&lra_reg_info[regno].insn_bitmap,
1791 5950 : INSN_UID (next_insn)))
1792 3160 : next_insn = NEXT_INSN (next_insn);
1793 : else
1794 : {
1795 2790 : second_insn = next_insn;
1796 2790 : insns_num--;
1797 : }
1798 : }
1799 : }
1800 3651 : if (insns_num > 1)
1801 : return false;
1802 : }
1803 1373 : start = first_insn != NULL ? first_insn : start_insn;
1804 1579 : finish = second_insn != NULL ? second_insn : start_insn;
1805 1579 : return true;
1806 : }
1807 :
1808 : /* Process reload pseudos which did not get a hard reg, split a hard reg live
1809 : range in live range of a reload pseudo, and then return TRUE. Otherwise,
1810 : return FALSE. When FAIL_P is TRUE and if we did not split a hard reg live
1811 : range for failed reload pseudos, report an error and modify related asm
1812 : insns. */
1813 : bool
1814 2524 : lra_split_hard_reg_for (bool fail_p)
1815 : {
1816 2524 : int i, regno;
1817 2524 : rtx_insn *insn, *first, *last;
1818 2524 : unsigned int u;
1819 2524 : bitmap_iterator bi;
1820 2524 : enum reg_class rclass;
1821 2524 : int max_regno = max_reg_num ();
1822 : /* We did not assign hard regs to reload pseudos after two
1823 : iterations. Either it's an asm and something is wrong with the
1824 : constraints, or we have run out of spill registers; error out in
1825 : either case. */
1826 2524 : bool asm_p = false, spill_p = false;
1827 2524 : bitmap_head failed_reload_insns, failed_reload_pseudos, over_split_insns;
1828 :
1829 2524 : if (lra_dump_file != NULL)
1830 0 : fprintf (lra_dump_file,
1831 : "\n****** Splitting a hard reg after assignment #%d: ******\n\n",
1832 : lra_assignment_iter);
1833 2524 : bitmap_initialize (&failed_reload_pseudos, ®_obstack);
1834 2524 : bitmap_initialize (&non_reload_pseudos, ®_obstack);
1835 2524 : bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs);
1836 2524 : bitmap_ior_into (&non_reload_pseudos, &lra_subreg_reload_pseudos);
1837 2524 : bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos);
1838 2524 : bitmap_initialize (&over_split_insns, ®_obstack);
1839 2524 : update_hard_regno_preference_check = XCNEWVEC (int, max_regno);
1840 2524 : curr_update_hard_regno_preference_check = 0;
1841 19531 : for (i = lra_constraint_new_regno_start; i < max_regno; i++)
1842 6752 : if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0
1843 5927 : && (rclass = lra_get_allocno_class (i)) != NO_REGS
1844 22929 : && ! bitmap_bit_p (&non_reload_pseudos, i))
1845 : {
1846 3857 : if (! find_reload_regno_insns (i, first, last))
1847 2278 : continue;
1848 1579 : if (BLOCK_FOR_INSN (first) == BLOCK_FOR_INSN (last))
1849 : {
1850 : /* Check that we are not trying to split over the same insn
1851 : requiring reloads to avoid splitting the same hard reg twice or
1852 : more. If we need several hard regs splitting over the same insn
1853 : it can be finished on the next iterations.
1854 :
1855 : The following loop iteration number is small as we split hard
1856 : reg in a very small range. */
1857 2978 : for (insn = first;
1858 4557 : insn != NEXT_INSN (last);
1859 2978 : insn = NEXT_INSN (insn))
1860 2987 : if (bitmap_bit_p (&over_split_insns, INSN_UID (insn)))
1861 : break;
1862 1579 : if (insn != NEXT_INSN (last)
1863 1579 : || !spill_hard_reg_in_range (i, rclass, first, last))
1864 : {
1865 1420 : bitmap_set_bit (&failed_reload_pseudos, i);
1866 : }
1867 : else
1868 : {
1869 302 : for (insn = first;
1870 461 : insn != NEXT_INSN (last);
1871 302 : insn = NEXT_INSN (insn))
1872 302 : bitmap_set_bit (&over_split_insns, INSN_UID (insn));
1873 : spill_p = true;
1874 : }
1875 : }
1876 : }
1877 2524 : bitmap_clear (&over_split_insns);
1878 2524 : bitmap_clear (&non_reload_pseudos);
1879 2524 : if (spill_p)
1880 : {
1881 98 : lra_dump_insns_if_possible ("changed func after splitting hard regs");
1882 : }
1883 : else
1884 : {
1885 2426 : bitmap_initialize (&failed_reload_insns, ®_obstack);
1886 3837 : EXECUTE_IF_SET_IN_BITMAP (&failed_reload_pseudos, 0, u, bi)
1887 : {
1888 1411 : regno = u;
1889 1411 : bitmap_ior_into (&failed_reload_insns,
1890 1411 : &lra_reg_info[regno].insn_bitmap);
1891 1411 : if (fail_p)
1892 47 : lra_setup_reg_renumber
1893 94 : (regno, ira_class_hard_regs[lra_get_allocno_class (regno)][0],
1894 : false);
1895 : }
1896 2426 : if (fail_p)
1897 272 : EXECUTE_IF_SET_IN_BITMAP (&failed_reload_insns, 0, u, bi)
1898 : {
1899 81 : insn = lra_insn_recog_data[u]->insn;
1900 81 : if (asm_noperands (PATTERN (insn)) >= 0)
1901 : {
1902 47 : asm_p = true;
1903 47 : lra_asm_insn_error (insn);
1904 : }
1905 34 : else if (!asm_p)
1906 : {
1907 0 : error ("unable to find a register to spill");
1908 0 : fatal_insn ("this is the insn:", insn);
1909 : }
1910 : }
1911 2426 : bitmap_clear (&failed_reload_insns);
1912 : }
1913 2524 : free (update_hard_regno_preference_check);
1914 2524 : bitmap_clear (&failed_reload_pseudos);
1915 2524 : return spill_p;
1916 : }
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