Line data Source code
1 : /* Compute different info about registers.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 :
21 : /* This file contains regscan pass of the compiler and passes for
22 : dealing with info about modes of pseudo-registers inside
23 : subregisters. It also defines some tables of information about the
24 : hardware registers, function init_reg_sets to initialize the
25 : tables, and other auxiliary functions to deal with info about
26 : registers and their classes. */
27 :
28 : #include "config.h"
29 : #include "system.h"
30 : #include "coretypes.h"
31 : #include "backend.h"
32 : #include "target.h"
33 : #include "rtl.h"
34 : #include "tree.h"
35 : #include "df.h"
36 : #include "memmodel.h"
37 : #include "tm_p.h"
38 : #include "insn-config.h"
39 : #include "regs.h"
40 : #include "ira.h"
41 : #include "recog.h"
42 : #include "diagnostic-core.h"
43 : #include "reload.h"
44 : #include "output.h"
45 : #include "tree-pass.h"
46 : #include "function-abi.h"
47 :
48 : /* Maximum register number used in this function, plus one. */
49 :
50 : int max_regno;
51 :
52 : /* Used to cache the results of simplifiable_subregs. SHAPE is the input
53 : parameter and SIMPLIFIABLE_REGS is the result. */
54 : class simplifiable_subreg
55 : {
56 : public:
57 : simplifiable_subreg (const subreg_shape &);
58 :
59 : subreg_shape shape;
60 : HARD_REG_SET simplifiable_regs;
61 : };
62 :
63 : struct target_hard_regs default_target_hard_regs;
64 : struct target_regs default_target_regs;
65 : #if SWITCHABLE_TARGET
66 : struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
67 : struct target_regs *this_target_regs = &default_target_regs;
68 : #endif
69 :
70 : #define call_used_regs \
71 : (this_target_hard_regs->x_call_used_regs)
72 : #define regs_invalidated_by_call \
73 : (this_target_hard_regs->x_regs_invalidated_by_call)
74 :
75 : /* Data for initializing fixed_regs. */
76 : static const char initial_fixed_regs[] = FIXED_REGISTERS;
77 :
78 : /* Data for initializing call_used_regs. */
79 : #ifdef CALL_REALLY_USED_REGISTERS
80 : #ifdef CALL_USED_REGISTERS
81 : #error CALL_USED_REGISTERS and CALL_REALLY_USED_REGISTERS are both defined
82 : #endif
83 : static const char initial_call_used_regs[] = CALL_REALLY_USED_REGISTERS;
84 : #else
85 : static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
86 : #endif
87 :
88 : /* Indexed by hard register number, contains 1 for registers
89 : that are being used for global register decls.
90 : These must be exempt from ordinary flow analysis
91 : and are also considered fixed. */
92 : char global_regs[FIRST_PSEUDO_REGISTER];
93 :
94 : /* The set of global registers. */
95 : HARD_REG_SET global_reg_set;
96 :
97 : /* Declaration for the global register. */
98 : tree global_regs_decl[FIRST_PSEUDO_REGISTER];
99 :
100 : /* Used to initialize reg_alloc_order. */
101 : #ifdef REG_ALLOC_ORDER
102 : static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
103 : #endif
104 :
105 : /* The same information, but as an array of unsigned ints. We copy from
106 : these unsigned ints to the table above. We do this so the tm.h files
107 : do not have to be aware of the wordsize for machines with <= 64 regs.
108 : Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
109 : #define N_REG_INTS \
110 : ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
111 :
112 : static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
113 : = REG_CLASS_CONTENTS;
114 :
115 : /* Array containing all of the register names. */
116 : static const char *const initial_reg_names[] = REGISTER_NAMES;
117 :
118 : /* Array containing all of the register class names. */
119 : const char * reg_class_names[] = REG_CLASS_NAMES;
120 :
121 : /* No more global register variables may be declared; true once
122 : reginfo has been initialized. */
123 : static int no_global_reg_vars = 0;
124 :
125 : static void
126 256621 : clear_global_regs_cache (void)
127 : {
128 23865753 : for (size_t i = 0 ; i < FIRST_PSEUDO_REGISTER ; i++)
129 : {
130 23609132 : global_regs[i] = 0;
131 23609132 : global_regs_decl[i] = NULL;
132 : }
133 0 : }
134 :
135 : void
136 256621 : reginfo_cc_finalize (void)
137 : {
138 256621 : clear_global_regs_cache ();
139 256621 : no_global_reg_vars = 0;
140 256621 : CLEAR_HARD_REG_SET (global_reg_set);
141 256621 : }
142 :
143 : /* In insn-preds.cc. */
144 : extern void init_reg_class_start_regs ();
145 :
146 : /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
147 : correspond to the hard registers, if any, set in that map. This
148 : could be done far more efficiently by having all sorts of special-cases
149 : with moving single words, but probably isn't worth the trouble. */
150 : void
151 64632218 : reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
152 : {
153 64632218 : unsigned i;
154 64632218 : bitmap_iterator bi;
155 :
156 400630082 : EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
157 : {
158 371930590 : if (i >= FIRST_PSEUDO_REGISTER)
159 35932726 : return;
160 335997864 : SET_HARD_REG_BIT (*to, i);
161 : }
162 : }
163 :
164 : /* Function called only once per target_globals to initialize the
165 : target_hard_regs structure. Once this is done, various switches
166 : may override. */
167 : void
168 783662 : init_reg_sets (void)
169 : {
170 783662 : int i, j;
171 :
172 : /* First copy the register information from the initial int form into
173 : the regsets. */
174 :
175 27428170 : for (i = 0; i < N_REG_CLASSES; i++)
176 : {
177 26644508 : CLEAR_HARD_REG_SET (reg_class_contents[i]);
178 :
179 : /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
180 2477939244 : for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
181 2451294736 : if (int_reg_class_contents[i][j / 32]
182 2451294736 : & ((unsigned) 1 << (j % 32)))
183 467062552 : SET_HARD_REG_BIT (reg_class_contents[i], j);
184 : }
185 :
186 : /* Sanity check: make sure the target macros FIXED_REGISTERS and
187 : CALL_USED_REGISTERS had the right number of initializers. */
188 783662 : gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
189 783662 : gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
190 : #ifdef REG_ALLOC_ORDER
191 783662 : gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
192 : #endif
193 783662 : gcc_assert (sizeof reg_names == sizeof initial_reg_names);
194 :
195 783662 : memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
196 783662 : memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
197 : #ifdef REG_ALLOC_ORDER
198 783662 : memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
199 : #endif
200 783662 : memcpy (reg_names, initial_reg_names, sizeof reg_names);
201 :
202 3134648 : SET_HARD_REG_SET (accessible_reg_set);
203 783662 : SET_HARD_REG_SET (operand_reg_set);
204 :
205 783662 : init_reg_class_start_regs ();
206 783662 : }
207 :
208 : /* We need to save copies of some of the register information which
209 : can be munged by command-line switches so we can restore it during
210 : subsequent back-end reinitialization. */
211 : static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
212 : static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
213 : static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
214 : static HARD_REG_SET saved_accessible_reg_set;
215 : static HARD_REG_SET saved_operand_reg_set;
216 :
217 : /* Save the register information. */
218 : void
219 278641 : save_register_info (void)
220 : {
221 : /* Sanity check: make sure the target macros FIXED_REGISTERS and
222 : CALL_USED_REGISTERS had the right number of initializers. */
223 278641 : gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
224 278641 : gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
225 278641 : memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
226 278641 : memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
227 :
228 : /* And similarly for reg_names. */
229 278641 : gcc_assert (sizeof reg_names == sizeof saved_reg_names);
230 278641 : memcpy (saved_reg_names, reg_names, sizeof reg_names);
231 278641 : saved_accessible_reg_set = accessible_reg_set;
232 278641 : saved_operand_reg_set = operand_reg_set;
233 278641 : }
234 :
235 : /* Restore the register information. */
236 : static void
237 822162 : restore_register_info (void)
238 : {
239 822162 : memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
240 822162 : memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
241 :
242 822162 : memcpy (reg_names, saved_reg_names, sizeof reg_names);
243 822162 : accessible_reg_set = saved_accessible_reg_set;
244 822162 : operand_reg_set = saved_operand_reg_set;
245 822162 : }
246 :
247 : /* After switches have been processed, which perhaps alter
248 : `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
249 : static void
250 822162 : init_reg_sets_1 (void)
251 : {
252 822162 : unsigned int i, j;
253 822162 : unsigned int /* machine_mode */ m;
254 :
255 822162 : restore_register_info ();
256 :
257 : #ifdef REG_ALLOC_ORDER
258 77283228 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
259 75638904 : inv_reg_alloc_order[reg_alloc_order[i]] = i;
260 : #endif
261 :
262 : /* Let the target tweak things if necessary. */
263 :
264 822162 : targetm.conditional_register_usage ();
265 :
266 : /* Compute number of hard regs in each class. */
267 :
268 822162 : memset (reg_class_size, 0, sizeof reg_class_size);
269 28775670 : for (i = 0; i < N_REG_CLASSES; i++)
270 : {
271 : bool any_nonfixed = false;
272 2599676244 : for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
273 2571722736 : if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
274 : {
275 510462331 : reg_class_size[i]++;
276 510462331 : if (!fixed_regs[j])
277 2571722736 : any_nonfixed = true;
278 : }
279 27953508 : class_only_fixed_regs[i] = !any_nonfixed;
280 : }
281 :
282 : /* Initialize the table of subunions.
283 : reg_class_subunion[I][J] gets the largest-numbered reg-class
284 : that is contained in the union of classes I and J. */
285 :
286 822162 : memset (reg_class_subunion, 0, sizeof reg_class_subunion);
287 28775670 : for (i = 0; i < N_REG_CLASSES; i++)
288 : {
289 978372780 : for (j = 0; j < N_REG_CLASSES; j++)
290 : {
291 950419272 : HARD_REG_SET c;
292 950419272 : int k;
293 :
294 950419272 : c = reg_class_contents[i] | reg_class_contents[j];
295 33264674520 : for (k = 0; k < N_REG_CLASSES; k++)
296 32314255248 : if (hard_reg_set_subset_p (reg_class_contents[k], c)
297 45516059938 : && !hard_reg_set_subset_p (reg_class_contents[k],
298 : reg_class_contents
299 13201804690 : [(int) reg_class_subunion[i][j]]))
300 10805895835 : reg_class_subunion[i][j] = (enum reg_class) k;
301 : }
302 : }
303 :
304 : /* Initialize the table of superunions.
305 : reg_class_superunion[I][J] gets the smallest-numbered reg-class
306 : containing the union of classes I and J. */
307 :
308 822162 : memset (reg_class_superunion, 0, sizeof reg_class_superunion);
309 28775670 : for (i = 0; i < N_REG_CLASSES; i++)
310 : {
311 978372780 : for (j = 0; j < N_REG_CLASSES; j++)
312 : {
313 950419272 : HARD_REG_SET c;
314 950419272 : int k;
315 :
316 950419272 : c = reg_class_contents[i] | reg_class_contents[j];
317 24042904568 : for (k = 0; k < N_REG_CLASSES; k++)
318 24042904568 : if (hard_reg_set_subset_p (c, reg_class_contents[k]))
319 : break;
320 :
321 950419272 : reg_class_superunion[i][j] = (enum reg_class) k;
322 : }
323 : }
324 :
325 : /* Initialize the tables of subclasses and superclasses of each reg class.
326 : First clear the whole table, then add the elements as they are found. */
327 :
328 28775670 : for (i = 0; i < N_REG_CLASSES; i++)
329 : {
330 978372780 : for (j = 0; j < N_REG_CLASSES; j++)
331 950419272 : reg_class_subclasses[i][j] = LIM_REG_CLASSES;
332 : }
333 :
334 28775670 : for (i = 0; i < N_REG_CLASSES; i++)
335 : {
336 27953508 : if (i == (int) NO_REGS)
337 822162 : continue;
338 :
339 461232882 : for (j = i + 1; j < N_REG_CLASSES; j++)
340 434101536 : if (hard_reg_set_subset_p (reg_class_contents[i],
341 : reg_class_contents[j]))
342 : {
343 : /* Reg class I is a subclass of J.
344 : Add J to the table of superclasses of I. */
345 178345397 : enum reg_class *p;
346 :
347 : /* Add I to the table of superclasses of J. */
348 178345397 : p = ®_class_subclasses[j][0];
349 1640735053 : while (*p != LIM_REG_CLASSES) p++;
350 178345397 : *p = (enum reg_class) i;
351 : }
352 : }
353 :
354 : /* Initialize "constant" tables. */
355 :
356 2466486 : CLEAR_HARD_REG_SET (fixed_reg_set);
357 2466486 : CLEAR_HARD_REG_SET (regs_invalidated_by_call);
358 :
359 76461066 : operand_reg_set &= accessible_reg_set;
360 76461066 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
361 : {
362 : /* As a special exception, registers whose class is NO_REGS are
363 : not accepted by `register_operand'. The reason for this change
364 : is to allow the representation of special architecture artifacts
365 : (such as a condition code register) without extending the rtl
366 : definitions. Since registers of class NO_REGS cannot be used
367 : as registers in any case where register classes are examined,
368 : it is better to apply this exception in a target-independent way. */
369 75638904 : if (REGNO_REG_CLASS (i) == NO_REGS)
370 1644324 : CLEAR_HARD_REG_BIT (operand_reg_set, i);
371 :
372 : /* If a register is too limited to be treated as a register operand,
373 : then it should never be allocated to a pseudo. */
374 75638904 : if (!TEST_HARD_REG_BIT (operand_reg_set, i))
375 35340636 : fixed_regs[i] = 1;
376 :
377 75638904 : if (fixed_regs[i])
378 37807263 : SET_HARD_REG_BIT (fixed_reg_set, i);
379 :
380 : /* There are a couple of fixed registers that we know are safe to
381 : exclude from being clobbered by calls:
382 :
383 : The frame pointer is always preserved across calls. The arg
384 : pointer is if it is fixed. The stack pointer usually is,
385 : unless TARGET_RETURN_POPS_ARGS, in which case an explicit
386 : CLOBBER will be present. If we are generating PIC code, the
387 : PIC offset table register is preserved across calls, though the
388 : target can override that. */
389 :
390 75638904 : if (i == STACK_POINTER_REGNUM)
391 : ;
392 74816742 : else if (global_regs[i])
393 97 : SET_HARD_REG_BIT (regs_invalidated_by_call, i);
394 74816645 : else if (i == FRAME_POINTER_REGNUM)
395 : ;
396 73994483 : else if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
397 : && i == HARD_FRAME_POINTER_REGNUM)
398 : ;
399 73172333 : else if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
400 822162 : && i == ARG_POINTER_REGNUM && fixed_regs[i])
401 : ;
402 72350171 : else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
403 72350171 : && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
404 : ;
405 72350171 : else if (call_used_regs[i])
406 67703181 : SET_HARD_REG_BIT (regs_invalidated_by_call, i);
407 : }
408 :
409 822162 : SET_HARD_REG_SET (savable_regs);
410 822162 : fixed_nonglobal_reg_set = fixed_reg_set;
411 :
412 : /* Preserve global registers if called more than once. */
413 76461066 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
414 : {
415 75638904 : if (global_regs[i])
416 : {
417 97 : fixed_regs[i] = call_used_regs[i] = 1;
418 97 : SET_HARD_REG_BIT (fixed_reg_set, i);
419 97 : SET_HARD_REG_BIT (global_reg_set, i);
420 : }
421 : }
422 :
423 : /* Recalculate eh_return_data_regs. */
424 2466486 : CLEAR_HARD_REG_SET (eh_return_data_regs);
425 1644324 : for (i = 0; ; ++i)
426 : {
427 2466486 : unsigned int regno = EH_RETURN_DATA_REGNO (i);
428 2466486 : if (regno == INVALID_REGNUM)
429 : break;
430 1644324 : SET_HARD_REG_BIT (eh_return_data_regs, regno);
431 1644324 : }
432 :
433 822162 : memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
434 822162 : memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
435 102770250 : for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
436 : {
437 : HARD_REG_SET ok_regs, ok_regs2;
438 305844264 : CLEAR_HARD_REG_SET (ok_regs);
439 9481172184 : CLEAR_HARD_REG_SET (ok_regs2);
440 9481172184 : for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
441 9379224096 : if (!TEST_HARD_REG_BIT (fixed_nonglobal_reg_set, j)
442 9379224096 : && targetm.hard_regno_mode_ok (j, (machine_mode) m))
443 : {
444 1047447358 : SET_HARD_REG_BIT (ok_regs, j);
445 1047447358 : if (!fixed_regs[j])
446 1047443734 : SET_HARD_REG_BIT (ok_regs2, j);
447 : }
448 :
449 3568183080 : for (i = 0; i < N_REG_CLASSES; i++)
450 3466234992 : if ((targetm.class_max_nregs ((reg_class_t) i, (machine_mode) m)
451 3466234992 : <= reg_class_size[i])
452 6363128472 : && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
453 : {
454 799209270 : contains_reg_of_mode[i][m] = 1;
455 1598418540 : if (hard_reg_set_intersect_p (ok_regs2, reg_class_contents[i]))
456 : {
457 799208090 : have_regs_of_mode[m] = 1;
458 799208090 : contains_allocatable_reg_of_mode[i][m] = 1;
459 : }
460 : }
461 : }
462 :
463 822162 : default_function_abi.initialize (0, regs_invalidated_by_call);
464 822162 : }
465 :
466 : /* Compute the table of register modes.
467 : These values are used to record death information for individual registers
468 : (as opposed to a multi-register mode).
469 : This function might be invoked more than once, if the target has support
470 : for changing register usage conventions on a per-function basis.
471 : */
472 : void
473 774348 : init_reg_modes_target (void)
474 : {
475 774348 : int i, j;
476 :
477 774348 : this_target_regs->x_hard_regno_max_nregs = 1;
478 72014364 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
479 8905002000 : for (j = 0; j < MAX_MACHINE_MODE; j++)
480 : {
481 8833761984 : unsigned char nregs = targetm.hard_regno_nregs (i, (machine_mode) j);
482 8833761984 : this_target_regs->x_hard_regno_nregs[i][j] = nregs;
483 8833761984 : if (nregs > this_target_regs->x_hard_regno_max_nregs)
484 3112346 : this_target_regs->x_hard_regno_max_nregs = nregs;
485 : }
486 :
487 72014364 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
488 : {
489 71240016 : reg_raw_mode[i] = choose_hard_reg_mode (i, 1, NULL);
490 :
491 : /* If we couldn't find a valid mode, just use the previous mode
492 : if it is suitable, otherwise fall back on word_mode. */
493 71240016 : if (reg_raw_mode[i] == VOIDmode)
494 : {
495 12830520 : if (i > 0 && hard_regno_nregs (i, reg_raw_mode[i - 1]) == 1)
496 12830520 : reg_raw_mode[i] = reg_raw_mode[i - 1];
497 : else
498 0 : reg_raw_mode[i] = word_mode;
499 : }
500 : }
501 774348 : }
502 :
503 : /* Finish initializing the register sets and initialize the register modes.
504 : This function might be invoked more than once, if the target has support
505 : for changing register usage conventions on a per-function basis.
506 : */
507 : void
508 822162 : init_regs (void)
509 : {
510 : /* This finishes what was started by init_reg_sets, but couldn't be done
511 : until after register usage was specified. */
512 822162 : init_reg_sets_1 ();
513 822162 : }
514 :
515 : /* The same as previous function plus initializing IRA. */
516 : void
517 47814 : reinit_regs (void)
518 : {
519 47814 : init_regs ();
520 : /* caller_save needs to be re-initialized. */
521 47814 : caller_save_initialized_p = false;
522 47814 : if (this_target_rtl->target_specific_initialized)
523 : {
524 1087 : ira_init ();
525 1087 : recog_init ();
526 : }
527 47814 : }
528 :
529 : /* Initialize some fake stack-frame MEM references for use in
530 : memory_move_secondary_cost. */
531 : void
532 213440 : init_fake_stack_mems (void)
533 : {
534 213440 : int i;
535 :
536 26680000 : for (i = 0; i < MAX_MACHINE_MODE; i++)
537 26466560 : top_of_stack[i] = gen_rtx_MEM ((machine_mode) i, stack_pointer_rtx);
538 213440 : }
539 :
540 :
541 : /* Compute cost of moving data from a register of class FROM to one of
542 : TO, using MODE. */
543 :
544 : int
545 5526128190 : register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to)
546 : {
547 5526128190 : return targetm.register_move_cost (mode, from, to);
548 : }
549 :
550 : /* Compute cost of moving registers to/from memory. */
551 :
552 : int
553 1756349345 : memory_move_cost (machine_mode mode, reg_class_t rclass, bool in)
554 : {
555 1756349345 : return targetm.memory_move_cost (mode, rclass, in);
556 : }
557 :
558 : /* Compute extra cost of moving registers to/from memory due to reloads.
559 : Only needed if secondary reloads are required for memory moves. */
560 : int
561 0 : memory_move_secondary_cost (machine_mode mode, reg_class_t rclass,
562 : bool in)
563 : {
564 0 : reg_class_t altclass;
565 0 : int partial_cost = 0;
566 : /* We need a memory reference to feed to SECONDARY... macros. */
567 : /* mem may be unused even if the SECONDARY_ macros are defined. */
568 0 : rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
569 :
570 0 : altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
571 :
572 0 : if (altclass == NO_REGS)
573 : return 0;
574 :
575 0 : if (in)
576 0 : partial_cost = register_move_cost (mode, altclass, rclass);
577 : else
578 0 : partial_cost = register_move_cost (mode, rclass, altclass);
579 :
580 0 : if (rclass == altclass)
581 : /* This isn't simply a copy-to-temporary situation. Can't guess
582 : what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
583 : calling here in that case.
584 :
585 : I'm tempted to put in an assert here, but returning this will
586 : probably only give poor estimates, which is what we would've
587 : had before this code anyways. */
588 : return partial_cost;
589 :
590 : /* Check if the secondary reload register will also need a
591 : secondary reload. */
592 0 : return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
593 : }
594 :
595 : /* Return a machine mode that is legitimate for hard reg REGNO and large
596 : enough to save nregs. If we can't find one, return VOIDmode.
597 : If ABI is nonnull, only consider modes that are preserved across
598 : calls that use ABI. */
599 : machine_mode
600 71240016 : choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
601 : unsigned int nregs, const predefined_function_abi *abi)
602 : {
603 71240016 : unsigned int /* machine_mode */ m;
604 71240016 : machine_mode found_mode = VOIDmode, mode;
605 :
606 : /* We first look for the largest integer mode that can be validly
607 : held in REGNO. If none, we look for the largest floating-point mode.
608 : If we still didn't find a valid mode, try CCmode.
609 :
610 : The tests use maybe_gt rather than known_gt because we want (for example)
611 : N V4SFs to win over plain V4SF even though N might be 1. */
612 569920128 : FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
613 498680112 : if (hard_regno_nregs (regno, mode) == nregs
614 423864176 : && targetm.hard_regno_mode_ok (regno, mode)
615 205944054 : && (!abi || !abi->clobbers_reg_p (mode, regno))
616 1116512274 : && maybe_gt (GET_MODE_SIZE (mode), GET_MODE_SIZE (found_mode)))
617 : found_mode = mode;
618 :
619 498680112 : FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
620 427440096 : if (hard_regno_nregs (regno, mode) == nregs
621 377403296 : && targetm.hard_regno_mode_ok (regno, mode)
622 216648266 : && (!abi || !abi->clobbers_reg_p (mode, regno))
623 1077384894 : && maybe_gt (GET_MODE_SIZE (mode), GET_MODE_SIZE (found_mode)))
624 : found_mode = mode;
625 :
626 1852240416 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FLOAT)
627 1781000400 : if (hard_regno_nregs (regno, mode) == nregs
628 1283982096 : && targetm.hard_regno_mode_ok (regno, mode)
629 329686164 : && (!abi || !abi->clobbers_reg_p (mode, regno))
630 2770058892 : && maybe_gt (GET_MODE_SIZE (mode), GET_MODE_SIZE (found_mode)))
631 : found_mode = mode;
632 :
633 2279680512 : FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)
634 2208440496 : if (hard_regno_nregs (regno, mode) == nregs
635 1636606256 : && targetm.hard_regno_mode_ok (regno, mode)
636 482647328 : && (!abi || !abi->clobbers_reg_p (mode, regno))
637 3656382480 : && maybe_gt (GET_MODE_SIZE (mode), GET_MODE_SIZE (found_mode)))
638 : found_mode = mode;
639 :
640 71240016 : if (found_mode != VOIDmode)
641 : return found_mode;
642 :
643 : /* Iterate over all of the CCmodes. */
644 1578928308 : for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
645 : {
646 1566097788 : mode = (machine_mode) m;
647 1566097788 : if (hard_regno_nregs (regno, mode) == nregs
648 1335148428 : && targetm.hard_regno_mode_ok (regno, mode)
649 1566872136 : && (!abi || !abi->clobbers_reg_p (mode, regno)))
650 : return mode;
651 : }
652 :
653 : /* We can't find a mode valid for this register. */
654 : return VOIDmode;
655 : }
656 :
657 : /* Specify the usage characteristics of the register named NAME.
658 : It should be a fixed register if FIXED and a
659 : call-used register if CALL_USED. */
660 : void
661 93 : fix_register (const char *name, int fixed, int call_used)
662 : {
663 93 : int i;
664 93 : int reg, nregs;
665 :
666 : /* Decode the name and update the primary form of
667 : the register info. */
668 :
669 93 : if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
670 : {
671 93 : gcc_assert (nregs >= 1);
672 186 : for (i = reg; i < reg + nregs; i++)
673 : {
674 93 : if ((i == STACK_POINTER_REGNUM
675 : #ifdef HARD_FRAME_POINTER_REGNUM
676 93 : || i == HARD_FRAME_POINTER_REGNUM
677 : #else
678 : || i == FRAME_POINTER_REGNUM
679 : #endif
680 : )
681 3 : && (fixed == 0 || call_used == 0))
682 : {
683 0 : switch (fixed)
684 : {
685 0 : case 0:
686 0 : switch (call_used)
687 : {
688 0 : case 0:
689 0 : error ("cannot use %qs as a call-saved register", name);
690 0 : break;
691 :
692 0 : case 1:
693 0 : error ("cannot use %qs as a call-used register", name);
694 0 : break;
695 :
696 0 : default:
697 0 : gcc_unreachable ();
698 : }
699 : break;
700 :
701 0 : case 1:
702 0 : switch (call_used)
703 : {
704 0 : case 1:
705 0 : error ("cannot use %qs as a fixed register", name);
706 0 : break;
707 :
708 0 : case 0:
709 0 : default:
710 0 : gcc_unreachable ();
711 : }
712 0 : break;
713 :
714 0 : default:
715 0 : gcc_unreachable ();
716 : }
717 : }
718 : else
719 : {
720 93 : fixed_regs[i] = fixed;
721 : #ifdef CALL_REALLY_USED_REGISTERS
722 : if (fixed == 0)
723 : call_used_regs[i] = call_used;
724 : #else
725 93 : call_used_regs[i] = call_used;
726 : #endif
727 : }
728 : }
729 : }
730 : else
731 : {
732 0 : warning (0, "unknown register name: %s", name);
733 : }
734 93 : }
735 :
736 : /* Mark register number I as global. */
737 : void
738 109 : globalize_reg (tree decl, int i)
739 : {
740 109 : location_t loc = DECL_SOURCE_LOCATION (decl);
741 :
742 : #ifdef STACK_REGS
743 109 : if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
744 : {
745 1 : error ("stack register used for global register variable");
746 1 : return;
747 : }
748 : #endif
749 :
750 108 : if (fixed_regs[i] == 0 && no_global_reg_vars)
751 0 : error_at (loc, "global register variable follows a function definition");
752 :
753 108 : if (global_regs[i])
754 : {
755 0 : auto_diagnostic_group d;
756 0 : warning_at (loc, 0,
757 : "register of %qD used for multiple global register variables",
758 : decl);
759 0 : inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
760 : "conflicts with %qD", global_regs_decl[i]);
761 0 : return;
762 0 : }
763 :
764 108 : if (call_used_regs[i] && ! fixed_regs[i])
765 23 : warning_at (loc, 0, "call-clobbered register used for global register variable");
766 :
767 108 : global_regs[i] = 1;
768 108 : global_regs_decl[i] = decl;
769 108 : SET_HARD_REG_BIT (global_reg_set, i);
770 :
771 : /* If we're globalizing the frame pointer, we need to set the
772 : appropriate regs_invalidated_by_call bit, even if it's already
773 : set in fixed_regs. */
774 108 : if (i != STACK_POINTER_REGNUM)
775 : {
776 87 : SET_HARD_REG_BIT (regs_invalidated_by_call, i);
777 1131 : for (unsigned int j = 0; j < NUM_ABI_IDS; ++j)
778 1044 : function_abis[j].add_full_reg_clobber (i);
779 : }
780 :
781 : /* If already fixed, nothing else to do. */
782 108 : if (fixed_regs[i])
783 : return;
784 :
785 73 : fixed_regs[i] = call_used_regs[i] = 1;
786 :
787 73 : SET_HARD_REG_BIT (fixed_reg_set, i);
788 :
789 73 : reinit_regs ();
790 : }
791 :
792 :
793 : /* Structure used to record preferences of given pseudo. */
794 : struct reg_pref
795 : {
796 : /* (enum reg_class) prefclass is the preferred class. May be
797 : NO_REGS if no class is better than memory. */
798 : char prefclass;
799 :
800 : /* altclass is a register class that we should use for allocating
801 : pseudo if no register in the preferred class is available.
802 : If no register in this class is available, memory is preferred.
803 :
804 : It might appear to be more general to have a bitmask of classes here,
805 : but since it is recommended that there be a class corresponding to the
806 : union of most major pair of classes, that generality is not required. */
807 : char altclass;
808 :
809 : /* allocnoclass is a register class that IRA uses for allocating
810 : the pseudo. */
811 : char allocnoclass;
812 : };
813 :
814 : /* Record preferences of each pseudo. This is available after RA is
815 : run. */
816 : static struct reg_pref *reg_pref;
817 :
818 : /* Current size of reg_info. */
819 : static int reg_info_size;
820 : /* Max_reg_num still last resize_reg_info call. */
821 : static int max_regno_since_last_resize;
822 :
823 : /* Return the reg_class in which pseudo reg number REGNO is best allocated.
824 : This function is sometimes called before the info has been computed.
825 : When that happens, just return GENERAL_REGS, which is innocuous. */
826 : enum reg_class
827 73445410 : reg_preferred_class (int regno)
828 : {
829 73445410 : if (reg_pref == 0)
830 : return GENERAL_REGS;
831 :
832 73445410 : gcc_assert (regno < reg_info_size);
833 73445410 : return (enum reg_class) reg_pref[regno].prefclass;
834 : }
835 :
836 : enum reg_class
837 2483888 : reg_alternate_class (int regno)
838 : {
839 2483888 : if (reg_pref == 0)
840 : return ALL_REGS;
841 :
842 2483888 : gcc_assert (regno < reg_info_size);
843 2483888 : return (enum reg_class) reg_pref[regno].altclass;
844 : }
845 :
846 : /* Return the reg_class which is used by IRA for its allocation. */
847 : enum reg_class
848 220418592 : reg_allocno_class (int regno)
849 : {
850 220418592 : if (reg_pref == 0)
851 : return NO_REGS;
852 :
853 220418592 : gcc_assert (regno < reg_info_size);
854 220418592 : return (enum reg_class) reg_pref[regno].allocnoclass;
855 : }
856 :
857 :
858 :
859 : /* Allocate space for reg info and initilize it. */
860 : static void
861 1500720 : allocate_reg_info (void)
862 : {
863 1500720 : int i;
864 :
865 1500720 : max_regno_since_last_resize = max_reg_num ();
866 1500720 : reg_info_size = max_regno_since_last_resize * 3 / 2 + 1;
867 1500720 : gcc_assert (! reg_pref && ! reg_renumber);
868 1500720 : reg_renumber = XNEWVEC (short, reg_info_size);
869 1500720 : reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
870 1500720 : memset (reg_renumber, -1, reg_info_size * sizeof (short));
871 309957885 : for (i = 0; i < reg_info_size; i++)
872 : {
873 308457165 : reg_pref[i].prefclass = GENERAL_REGS;
874 308457165 : reg_pref[i].altclass = ALL_REGS;
875 308457165 : reg_pref[i].allocnoclass = GENERAL_REGS;
876 : }
877 1500720 : }
878 :
879 :
880 : /* Resize reg info. The new elements will be initialized. Return TRUE
881 : if new pseudos were added since the last call. */
882 : bool
883 1261184554 : resize_reg_info (void)
884 : {
885 1261184554 : int old, i;
886 1261184554 : bool change_p;
887 :
888 1261184554 : if (reg_pref == NULL)
889 : {
890 1500720 : allocate_reg_info ();
891 1500720 : return true;
892 : }
893 1259683834 : change_p = max_regno_since_last_resize != max_reg_num ();
894 1259683834 : max_regno_since_last_resize = max_reg_num ();
895 1259683834 : if (reg_info_size >= max_reg_num ())
896 : return change_p;
897 3057 : old = reg_info_size;
898 3057 : reg_info_size = max_reg_num () * 3 / 2 + 1;
899 3057 : gcc_assert (reg_pref && reg_renumber);
900 3057 : reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
901 3057 : reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
902 3057 : memset (reg_pref + old, -1,
903 3057 : (reg_info_size - old) * sizeof (struct reg_pref));
904 3057 : memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
905 2144429 : for (i = old; i < reg_info_size; i++)
906 : {
907 2141372 : reg_pref[i].prefclass = GENERAL_REGS;
908 2141372 : reg_pref[i].altclass = ALL_REGS;
909 2141372 : reg_pref[i].allocnoclass = GENERAL_REGS;
910 : }
911 : return true;
912 : }
913 :
914 :
915 : /* Free up the space allocated by allocate_reg_info. */
916 : void
917 1500722 : free_reg_info (void)
918 : {
919 1500722 : if (reg_pref)
920 : {
921 1500720 : free (reg_pref);
922 1500720 : reg_pref = NULL;
923 : }
924 :
925 1500722 : if (reg_renumber)
926 : {
927 1500720 : free (reg_renumber);
928 1500720 : reg_renumber = NULL;
929 : }
930 1500722 : }
931 :
932 : /* Initialize some global data for this pass. */
933 : static unsigned int
934 1471360 : reginfo_init (void)
935 : {
936 1471360 : if (df)
937 1043685 : df_compute_regs_ever_live (true);
938 :
939 : /* This prevents dump_reg_info from losing if called
940 : before reginfo is run. */
941 1471360 : reg_pref = NULL;
942 1471360 : reg_info_size = max_regno_since_last_resize = 0;
943 : /* No more global register variables may be declared. */
944 1471360 : no_global_reg_vars = 1;
945 1471360 : return 1;
946 : }
947 :
948 : namespace {
949 :
950 : const pass_data pass_data_reginfo_init =
951 : {
952 : RTL_PASS, /* type */
953 : "reginfo", /* name */
954 : OPTGROUP_NONE, /* optinfo_flags */
955 : TV_NONE, /* tv_id */
956 : 0, /* properties_required */
957 : 0, /* properties_provided */
958 : 0, /* properties_destroyed */
959 : 0, /* todo_flags_start */
960 : 0, /* todo_flags_finish */
961 : };
962 :
963 : class pass_reginfo_init : public rtl_opt_pass
964 : {
965 : public:
966 285722 : pass_reginfo_init (gcc::context *ctxt)
967 571444 : : rtl_opt_pass (pass_data_reginfo_init, ctxt)
968 : {}
969 :
970 : /* opt_pass methods: */
971 1471360 : unsigned int execute (function *) final override { return reginfo_init (); }
972 :
973 : }; // class pass_reginfo_init
974 :
975 : } // anon namespace
976 :
977 : rtl_opt_pass *
978 285722 : make_pass_reginfo_init (gcc::context *ctxt)
979 : {
980 285722 : return new pass_reginfo_init (ctxt);
981 : }
982 :
983 :
984 :
985 : /* Set up preferred, alternate, and allocno classes for REGNO as
986 : PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
987 : void
988 46013279 : setup_reg_classes (int regno,
989 : enum reg_class prefclass, enum reg_class altclass,
990 : enum reg_class allocnoclass)
991 : {
992 46013279 : if (reg_pref == NULL)
993 : return;
994 46013279 : gcc_assert (reg_info_size >= max_reg_num ());
995 46013279 : reg_pref[regno].prefclass = prefclass;
996 46013279 : reg_pref[regno].altclass = altclass;
997 46013279 : reg_pref[regno].allocnoclass = allocnoclass;
998 : }
999 :
1000 :
1001 : /* This is the `regscan' pass of the compiler, run just before cse and
1002 : again just before loop. It finds the first and last use of each
1003 : pseudo-register. */
1004 :
1005 : static void reg_scan_mark_refs (rtx, rtx_insn *);
1006 :
1007 : void
1008 2299323 : reg_scan (rtx_insn *f, unsigned int nregs ATTRIBUTE_UNUSED)
1009 : {
1010 2299323 : rtx_insn *insn;
1011 :
1012 2299323 : timevar_push (TV_REG_SCAN);
1013 :
1014 353823295 : for (insn = f; insn; insn = NEXT_INSN (insn))
1015 349224649 : if (INSN_P (insn))
1016 : {
1017 302856914 : reg_scan_mark_refs (PATTERN (insn), insn);
1018 302856914 : if (REG_NOTES (insn))
1019 107796387 : reg_scan_mark_refs (REG_NOTES (insn), insn);
1020 : }
1021 :
1022 2299323 : timevar_pop (TV_REG_SCAN);
1023 2299323 : }
1024 :
1025 :
1026 : /* X is the expression to scan. INSN is the insn it appears in.
1027 : NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1028 : We should only record information for REGs with numbers
1029 : greater than or equal to MIN_REGNO. */
1030 : static void
1031 1419776382 : reg_scan_mark_refs (rtx x, rtx_insn *insn)
1032 : {
1033 1493421005 : enum rtx_code code;
1034 1493421005 : rtx dest;
1035 1493421005 : rtx note;
1036 :
1037 1493421005 : if (!x)
1038 : return;
1039 1493421005 : code = GET_CODE (x);
1040 1493421005 : switch (code)
1041 : {
1042 : case CONST:
1043 : CASE_CONST_ANY:
1044 : case PC:
1045 : case SYMBOL_REF:
1046 : case LABEL_REF:
1047 : case ADDR_VEC:
1048 : case ADDR_DIFF_VEC:
1049 : case REG:
1050 : return;
1051 :
1052 167756045 : case EXPR_LIST:
1053 167756045 : if (XEXP (x, 0))
1054 167315531 : reg_scan_mark_refs (XEXP (x, 0), insn);
1055 167756045 : if (XEXP (x, 1))
1056 : reg_scan_mark_refs (XEXP (x, 1), insn);
1057 : break;
1058 :
1059 13616351 : case INSN_LIST:
1060 13616351 : case INT_LIST:
1061 13616351 : if (XEXP (x, 1))
1062 : reg_scan_mark_refs (XEXP (x, 1), insn);
1063 : break;
1064 :
1065 74384067 : case CLOBBER:
1066 74384067 : if (MEM_P (XEXP (x, 0)))
1067 68614 : reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1068 : break;
1069 :
1070 154071562 : case SET:
1071 : /* Count a set of the destination if it is a register. */
1072 154071562 : for (dest = SET_DEST (x);
1073 154851774 : GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1074 154851774 : || GET_CODE (dest) == ZERO_EXTRACT;
1075 780212 : dest = XEXP (dest, 0))
1076 : ;
1077 :
1078 : /* If this is setting a pseudo from another pseudo or the sum of a
1079 : pseudo and a constant integer and the other pseudo is known to be
1080 : a pointer, set the destination to be a pointer as well.
1081 :
1082 : Likewise if it is setting the destination from an address or from a
1083 : value equivalent to an address or to the sum of an address and
1084 : something else.
1085 :
1086 : But don't do any of this if the pseudo corresponds to a user
1087 : variable since it should have already been set as a pointer based
1088 : on the type. */
1089 :
1090 154071562 : if (REG_P (SET_DEST (x))
1091 117017898 : && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1092 : /* If the destination pseudo is set more than once, then other
1093 : sets might not be to a pointer value (consider access to a
1094 : union in two threads of control in the presence of global
1095 : optimizations). So only set REG_POINTER on the destination
1096 : pseudo if this is the only set of that pseudo. */
1097 69322609 : && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1098 53213598 : && ! REG_USERVAR_P (SET_DEST (x))
1099 49067479 : && ! REG_POINTER (SET_DEST (x))
1100 192449659 : && ((REG_P (SET_SRC (x))
1101 4487799 : && REG_POINTER (SET_SRC (x)))
1102 37980470 : || ((GET_CODE (SET_SRC (x)) == PLUS
1103 31553817 : || GET_CODE (SET_SRC (x)) == LO_SUM)
1104 6426653 : && CONST_INT_P (XEXP (SET_SRC (x), 1))
1105 4225601 : && REG_P (XEXP (SET_SRC (x), 0))
1106 4155816 : && REG_POINTER (XEXP (SET_SRC (x), 0)))
1107 : || GET_CODE (SET_SRC (x)) == CONST
1108 : || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1109 : || GET_CODE (SET_SRC (x)) == LABEL_REF
1110 : || (GET_CODE (SET_SRC (x)) == HIGH
1111 0 : && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1112 : || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1113 : || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1114 35361130 : || ((GET_CODE (SET_SRC (x)) == PLUS
1115 31385794 : || GET_CODE (SET_SRC (x)) == LO_SUM)
1116 3975336 : && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1117 : || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1118 : || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1119 35344755 : || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1120 2941725 : && (GET_CODE (XEXP (note, 0)) == CONST
1121 : || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1122 : || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1123 3066484 : REG_POINTER (SET_DEST (x)) = 1;
1124 :
1125 : /* If this is setting a register from a register or from a simple
1126 : conversion of a register, propagate REG_EXPR. */
1127 154071562 : if (REG_P (dest) && !REG_ATTRS (dest))
1128 70090787 : set_reg_attrs_from_value (dest, SET_SRC (x));
1129 :
1130 : /* fall through */
1131 :
1132 562402946 : default:
1133 562402946 : {
1134 562402946 : const char *fmt = GET_RTX_FORMAT (code);
1135 562402946 : int i;
1136 1578385287 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1137 : {
1138 1015982341 : if (fmt[i] == 'e')
1139 784115097 : reg_scan_mark_refs (XEXP (x, i), insn);
1140 231867244 : else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1141 : {
1142 29026238 : int j;
1143 86718691 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1144 57692453 : reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1145 : }
1146 : }
1147 : }
1148 : }
1149 : }
1150 :
1151 :
1152 : /* Return true if C1 is a subset of C2, i.e., if every register in C1
1153 : is also in C2. */
1154 : bool
1155 80397616188 : reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1156 : {
1157 80397616188 : return (c1 == c2
1158 80397616188 : || c2 == ALL_REGS
1159 >15935*10^7 : || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1160 78959319262 : reg_class_contents[(int) c2]));
1161 : }
1162 :
1163 : /* Return true if there is a register that is in both C1 and C2. */
1164 : bool
1165 46651979704 : reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1166 : {
1167 46651979704 : return (c1 == c2
1168 46651979704 : || c1 == ALL_REGS
1169 45330316318 : || c2 == ALL_REGS
1170 91980695761 : || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1171 45328716057 : reg_class_contents[(int) c2]));
1172 : }
1173 :
1174 :
1175 : inline hashval_t
1176 8134837 : simplifiable_subregs_hasher::hash (const simplifiable_subreg *value)
1177 : {
1178 8134837 : inchash::hash h;
1179 8134837 : h.add_hwi (value->shape.unique_id ());
1180 8134837 : return h.end ();
1181 : }
1182 :
1183 : inline bool
1184 10769929 : simplifiable_subregs_hasher::equal (const simplifiable_subreg *value,
1185 : const subreg_shape *compare)
1186 : {
1187 36579461 : return value->shape == *compare;
1188 : }
1189 :
1190 146912 : inline simplifiable_subreg::simplifiable_subreg (const subreg_shape &shape_in)
1191 146912 : : shape (shape_in)
1192 : {
1193 13809728 : CLEAR_HARD_REG_SET (simplifiable_regs);
1194 : }
1195 :
1196 : /* Return the set of hard registers that are able to form the subreg
1197 : described by SHAPE. */
1198 :
1199 : const HARD_REG_SET &
1200 3229288 : simplifiable_subregs (const subreg_shape &shape)
1201 : {
1202 3229288 : if (!this_target_hard_regs->x_simplifiable_subregs)
1203 110134 : this_target_hard_regs->x_simplifiable_subregs
1204 55067 : = new hash_table <simplifiable_subregs_hasher> (30);
1205 3229288 : inchash::hash h;
1206 3229288 : h.add_hwi (shape.unique_id ());
1207 3229288 : simplifiable_subreg **slot
1208 3229288 : = (this_target_hard_regs->x_simplifiable_subregs
1209 3229288 : ->find_slot_with_hash (&shape, h.end (), INSERT));
1210 :
1211 3229288 : if (!*slot)
1212 : {
1213 146912 : simplifiable_subreg *info = new simplifiable_subreg (shape);
1214 13662816 : for (unsigned int i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1215 13515904 : if (targetm.hard_regno_mode_ok (i, shape.inner_mode)
1216 20047052 : && simplify_subreg_regno (i, shape.inner_mode, shape.offset,
1217 6531148 : shape.outer_mode) >= 0)
1218 5139860 : SET_HARD_REG_BIT (info->simplifiable_regs, i);
1219 146912 : *slot = info;
1220 : }
1221 3229288 : return (*slot)->simplifiable_regs;
1222 : }
1223 :
1224 : /* Passes for keeping and updating info about modes of registers
1225 : inside subregisters. */
1226 :
1227 : static HARD_REG_SET **valid_mode_changes;
1228 : static obstack valid_mode_changes_obstack;
1229 :
1230 : /* Restrict the choice of register for SUBREG_REG (SUBREG) based
1231 : on information about SUBREG.
1232 :
1233 : If PARTIAL_DEF, SUBREG is a partial definition of a multipart inner
1234 : register and we want to ensure that the other parts of the inner
1235 : register are correctly preserved. If !PARTIAL_DEF we need to
1236 : ensure that SUBREG itself can be formed. */
1237 :
1238 : static void
1239 3234408 : record_subregs_of_mode (rtx subreg, bool partial_def)
1240 : {
1241 3234408 : unsigned int regno;
1242 :
1243 3234408 : if (!REG_P (SUBREG_REG (subreg)))
1244 5120 : return;
1245 :
1246 3229398 : regno = REGNO (SUBREG_REG (subreg));
1247 3229398 : if (regno < FIRST_PSEUDO_REGISTER)
1248 : return;
1249 :
1250 3229288 : subreg_shape shape (shape_of_subreg (subreg));
1251 3229288 : if (partial_def)
1252 : {
1253 : /* The number of independently-accessible SHAPE.outer_mode values
1254 : in SHAPE.inner_mode is GET_MODE_SIZE (SHAPE.inner_mode) / SIZE.
1255 : We need to check that the assignment will preserve all the other
1256 : SIZE-byte chunks in the inner register besides the one that
1257 : includes SUBREG.
1258 :
1259 : In practice it is enough to check whether an equivalent
1260 : SHAPE.inner_mode value in an adjacent SIZE-byte chunk can be formed.
1261 : If the underlying registers are small enough, both subregs will
1262 : be valid. If the underlying registers are too large, one of the
1263 : subregs will be invalid.
1264 :
1265 : This relies on the fact that we've already been passed
1266 : SUBREG with PARTIAL_DEF set to false.
1267 :
1268 : The size of the outer mode must ordered wrt the size of the
1269 : inner mode's registers, since otherwise we wouldn't know at
1270 : compile time how many registers the outer mode occupies. */
1271 643870 : poly_uint64 size = ordered_max (REGMODE_NATURAL_SIZE (shape.inner_mode),
1272 643870 : GET_MODE_SIZE (shape.outer_mode));
1273 643870 : gcc_checking_assert (known_lt (size, GET_MODE_SIZE (shape.inner_mode)));
1274 321935 : if (known_ge (shape.offset, size))
1275 3229288 : shape.offset -= size;
1276 : else
1277 3229288 : shape.offset += size;
1278 : }
1279 :
1280 3229288 : if (valid_mode_changes[regno])
1281 4685385 : *valid_mode_changes[regno] &= simplifiable_subregs (shape);
1282 : else
1283 : {
1284 1773191 : valid_mode_changes[regno]
1285 1773191 : = XOBNEW (&valid_mode_changes_obstack, HARD_REG_SET);
1286 1773191 : *valid_mode_changes[regno] = simplifiable_subregs (shape);
1287 : }
1288 : }
1289 :
1290 : /* Call record_subregs_of_mode for all the subregs in X. */
1291 : static void
1292 462971721 : find_subregs_of_mode (rtx x)
1293 : {
1294 462971721 : enum rtx_code code = GET_CODE (x);
1295 462971721 : const char * const fmt = GET_RTX_FORMAT (code);
1296 462971721 : int i;
1297 :
1298 462971721 : if (code == SUBREG)
1299 2912473 : record_subregs_of_mode (x, false);
1300 :
1301 : /* Time for some deep diving. */
1302 1117333948 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1303 : {
1304 654362227 : if (fmt[i] == 'e')
1305 350187543 : find_subregs_of_mode (XEXP (x, i));
1306 304174684 : else if (fmt[i] == 'E')
1307 : {
1308 13697731 : int j;
1309 41388994 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1310 27691263 : find_subregs_of_mode (XVECEXP (x, i, j));
1311 : }
1312 : }
1313 462971721 : }
1314 :
1315 : void
1316 1500820 : init_subregs_of_mode (void)
1317 : {
1318 1500820 : basic_block bb;
1319 1500820 : rtx_insn *insn;
1320 :
1321 1500820 : gcc_obstack_init (&valid_mode_changes_obstack);
1322 1500820 : valid_mode_changes = XCNEWVEC (HARD_REG_SET *, max_reg_num ());
1323 :
1324 16247395 : FOR_EACH_BB_FN (bb, cfun)
1325 175977258 : FOR_BB_INSNS (bb, insn)
1326 161230683 : if (NONDEBUG_INSN_P (insn))
1327 : {
1328 85092915 : find_subregs_of_mode (PATTERN (insn));
1329 85092915 : df_ref def;
1330 654013066 : FOR_EACH_INSN_DEF (def, insn)
1331 568920151 : if (DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL)
1332 568920151 : && read_modify_subreg_p (DF_REF_REG (def)))
1333 321935 : record_subregs_of_mode (DF_REF_REG (def), true);
1334 : }
1335 1500820 : }
1336 :
1337 : const HARD_REG_SET *
1338 114826837 : valid_mode_changes_for_regno (unsigned int regno)
1339 : {
1340 114826837 : return valid_mode_changes[regno];
1341 : }
1342 :
1343 : void
1344 1500820 : finish_subregs_of_mode (void)
1345 : {
1346 1500820 : XDELETEVEC (valid_mode_changes);
1347 1500820 : obstack_free (&valid_mode_changes_obstack, NULL);
1348 1500820 : }
1349 :
1350 : /* Free all data attached to the structure. This isn't a destructor because
1351 : we don't want to run on exit. */
1352 :
1353 : void
1354 33190 : target_hard_regs::finalize ()
1355 : {
1356 33190 : delete x_simplifiable_subregs;
1357 33190 : }
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