Line data Source code
1 : /* Search an insn for pseudo regs that must be in hard regs and are not.
2 : Copyright (C) 1987-2026 Free Software Foundation, Inc.
3 :
4 : This file is part of GCC.
5 :
6 : GCC is free software; you can redistribute it and/or modify it under
7 : the terms of the GNU General Public License as published by the Free
8 : Software Foundation; either version 3, or (at your option) any later
9 : version.
10 :
11 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : for more details.
15 :
16 : You should have received a copy of the GNU General Public License
17 : along with GCC; see the file COPYING3. If not see
18 : <http://www.gnu.org/licenses/>. */
19 :
20 : /* This file contains subroutines used only from the file reload1.cc.
21 : It knows how to scan one insn for operands and values
22 : that need to be copied into registers to make valid code.
23 : It also finds other operands and values which are valid
24 : but for which equivalent values in registers exist and
25 : ought to be used instead.
26 :
27 : Before processing the first insn of the function, call `init_reload'.
28 : init_reload actually has to be called earlier anyway.
29 :
30 : To scan an insn, call `find_reloads'. This does two things:
31 : 1. sets up tables describing which values must be reloaded
32 : for this insn, and what kind of hard regs they must be reloaded into;
33 : 2. optionally record the locations where those values appear in
34 : the data, so they can be replaced properly later.
35 : This is done only if the second arg to `find_reloads' is nonzero.
36 :
37 : The third arg to `find_reloads' specifies the number of levels
38 : of indirect addressing supported by the machine. If it is zero,
39 : indirect addressing is not valid. If it is one, (MEM (REG n))
40 : is valid even if (REG n) did not get a hard register; if it is two,
41 : (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 : hard register, and similarly for higher values.
43 :
44 : Then you must choose the hard regs to reload those pseudo regs into,
45 : and generate appropriate load insns before this insn and perhaps
46 : also store insns after this insn. Set up the array `reload_reg_rtx'
47 : to contain the REG rtx's for the registers you used. In some
48 : cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 : for certain reloads. Then that tells you which register to use,
50 : so you do not need to allocate one. But you still do need to add extra
51 : instructions to copy the value into and out of that register.
52 :
53 : Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 : into the locations already recorded.
55 :
56 : NOTE SIDE EFFECTS:
57 :
58 : find_reloads can alter the operands of the instruction it is called on.
59 :
60 : 1. Two operands of any sort may be interchanged, if they are in a
61 : commutative instruction.
62 : This happens only if find_reloads thinks the instruction will compile
63 : better that way.
64 :
65 : 2. Pseudo-registers that are equivalent to constants are replaced
66 : with those constants if they are not in hard registers.
67 :
68 : 1 happens every time find_reloads is called.
69 : 2 happens only when REPLACE is 1, which is only when
70 : actually doing the reloads, not when just counting them.
71 :
72 : Using a reload register for several reloads in one insn:
73 :
74 : When an insn has reloads, it is considered as having three parts:
75 : the input reloads, the insn itself after reloading, and the output reloads.
76 : Reloads of values used in memory addresses are often needed for only one part.
77 :
78 : When this is so, reload_when_needed records which part needs the reload.
79 : Two reloads for different parts of the insn can share the same reload
80 : register.
81 :
82 : When a reload is used for addresses in multiple parts, or when it is
83 : an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 : a register with any other reload. */
85 :
86 : #define REG_OK_STRICT
87 :
88 : /* We do not enable this with CHECKING_P, since it is awfully slow. */
89 : #undef DEBUG_RELOAD
90 :
91 : #include "config.h"
92 : #include "system.h"
93 : #include "coretypes.h"
94 : #include "backend.h"
95 : #include "target.h"
96 : #include "rtl.h"
97 : #include "tree.h"
98 : #include "df.h"
99 : #include "memmodel.h"
100 : #include "tm_p.h"
101 : #include "optabs.h"
102 : #include "regs.h"
103 : #include "ira.h"
104 : #include "recog.h"
105 : #include "rtl-error.h"
106 : #include "reload.h"
107 : #include "addresses.h"
108 : #include "function-abi.h"
109 :
110 : /* True if X is a constant that can be forced into the constant pool.
111 : MODE is the mode of the operand, or VOIDmode if not known. */
112 : #define CONST_POOL_OK_P(MODE, X) \
113 : ((MODE) != VOIDmode \
114 : && CONSTANT_P (X) \
115 : && GET_CODE (X) != HIGH \
116 : && !targetm.cannot_force_const_mem (MODE, X))
117 :
118 : /* True if C is a non-empty register class that has too few registers
119 : to be safely used as a reload target class. */
120 :
121 : static inline bool
122 0 : small_register_class_p (reg_class_t rclass)
123 : {
124 0 : return (reg_class_size [(int) rclass] == 1
125 0 : || (reg_class_size [(int) rclass] >= 1
126 0 : && targetm.class_likely_spilled_p (rclass)));
127 : }
128 :
129 :
130 : /* All reloads of the current insn are recorded here. See reload.h for
131 : comments. */
132 : int n_reloads;
133 : struct reload rld[MAX_RELOADS];
134 :
135 : /* All the "earlyclobber" operands of the current insn
136 : are recorded here. */
137 : int n_earlyclobbers;
138 : rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
139 :
140 : int reload_n_operands;
141 :
142 : /* Replacing reloads.
143 :
144 : If `replace_reloads' is nonzero, then as each reload is recorded
145 : an entry is made for it in the table `replacements'.
146 : Then later `subst_reloads' can look through that table and
147 : perform all the replacements needed. */
148 :
149 : /* Nonzero means record the places to replace. */
150 : static int replace_reloads;
151 :
152 : /* Each replacement is recorded with a structure like this. */
153 : struct replacement
154 : {
155 : rtx *where; /* Location to store in */
156 : int what; /* which reload this is for */
157 : machine_mode mode; /* mode it must have */
158 : };
159 :
160 : static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
161 :
162 : /* Number of replacements currently recorded. */
163 : static int n_replacements;
164 :
165 : /* Used to track what is modified by an operand. */
166 : struct decomposition
167 : {
168 : int reg_flag; /* Nonzero if referencing a register. */
169 : int safe; /* Nonzero if this can't conflict with anything. */
170 : rtx base; /* Base address for MEM. */
171 : poly_int64 start; /* Starting offset or register number. */
172 : poly_int64 end; /* Ending offset or register number. */
173 : };
174 :
175 : /* Save MEMs needed to copy from one class of registers to another. One MEM
176 : is used per mode, but normally only one or two modes are ever used.
177 :
178 : We keep two versions, before and after register elimination. The one
179 : after register elimination is record separately for each operand. This
180 : is done in case the address is not valid to be sure that we separately
181 : reload each. */
182 :
183 : static rtx secondary_memlocs[NUM_MACHINE_MODES];
184 : static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
185 : static int secondary_memlocs_elim_used = 0;
186 :
187 : /* The instruction we are doing reloads for;
188 : so we can test whether a register dies in it. */
189 : static rtx_insn *this_insn;
190 :
191 : /* Nonzero if this instruction is a user-specified asm with operands. */
192 : static int this_insn_is_asm;
193 :
194 : /* If hard_regs_live_known is nonzero,
195 : we can tell which hard regs are currently live,
196 : at least enough to succeed in choosing dummy reloads. */
197 : static int hard_regs_live_known;
198 :
199 : /* Indexed by hard reg number,
200 : element is nonnegative if hard reg has been spilled.
201 : This vector is passed to `find_reloads' as an argument
202 : and is not changed here. */
203 : static short *static_reload_reg_p;
204 :
205 : /* Set to 1 in subst_reg_equivs if it changes anything. */
206 : static int subst_reg_equivs_changed;
207 :
208 : /* On return from push_reload, holds the reload-number for the OUT
209 : operand, which can be different for that from the input operand. */
210 : static int output_reloadnum;
211 :
212 : /* Compare two RTX's. */
213 : #define MATCHES(x, y) \
214 : (x == y || (x != 0 && (REG_P (x) \
215 : ? REG_P (y) && REGNO (x) == REGNO (y) \
216 : : rtx_equal_p (x, y) && ! side_effects_p (x))))
217 :
218 : /* Indicates if two reloads purposes are for similar enough things that we
219 : can merge their reloads. */
220 : #define MERGABLE_RELOADS(when1, when2, op1, op2) \
221 : ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
222 : || ((when1) == (when2) && (op1) == (op2)) \
223 : || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
224 : || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
225 : && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
226 : || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
227 : && (when2) == RELOAD_FOR_OTHER_ADDRESS))
228 :
229 : /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
230 : #define MERGE_TO_OTHER(when1, when2, op1, op2) \
231 : ((when1) != (when2) \
232 : || ! ((op1) == (op2) \
233 : || (when1) == RELOAD_FOR_INPUT \
234 : || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
235 : || (when1) == RELOAD_FOR_OTHER_ADDRESS))
236 :
237 : /* If we are going to reload an address, compute the reload type to
238 : use. */
239 : #define ADDR_TYPE(type) \
240 : ((type) == RELOAD_FOR_INPUT_ADDRESS \
241 : ? RELOAD_FOR_INPADDR_ADDRESS \
242 : : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
243 : ? RELOAD_FOR_OUTADDR_ADDRESS \
244 : : (type)))
245 :
246 : static int push_secondary_reload (int, rtx, int, int, enum reg_class,
247 : machine_mode, enum reload_type,
248 : enum insn_code *, secondary_reload_info *);
249 : static enum reg_class find_valid_class (machine_mode, machine_mode,
250 : int, unsigned int);
251 : static void push_replacement (rtx *, int, machine_mode);
252 : static void dup_replacements (rtx *, rtx *);
253 : static void combine_reloads (void);
254 : static int find_reusable_reload (rtx *, rtx, enum reg_class,
255 : enum reload_type, int, int);
256 : static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, machine_mode,
257 : machine_mode, reg_class_t, int, int);
258 : static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
259 : static struct decomposition decompose (rtx);
260 : static int immune_p (rtx, rtx, struct decomposition);
261 : static bool alternative_allows_const_pool_ref (rtx, const char *, int);
262 : static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int,
263 : rtx_insn *, int *);
264 : static rtx make_memloc (rtx, int);
265 : static bool maybe_memory_address_addr_space_p (machine_mode, rtx,
266 : addr_space_t, rtx *);
267 : static int find_reloads_address (machine_mode, rtx *, rtx, rtx *,
268 : int, enum reload_type, int, rtx_insn *);
269 : static rtx subst_reg_equivs (rtx, rtx_insn *);
270 : static rtx subst_indexed_address (rtx);
271 : static void update_auto_inc_notes (rtx_insn *, int, int);
272 : static int find_reloads_address_1 (machine_mode, addr_space_t, rtx, int,
273 : enum rtx_code, enum rtx_code, rtx *,
274 : int, enum reload_type,int, rtx_insn *);
275 : static void find_reloads_address_part (rtx, rtx *, enum reg_class,
276 : machine_mode, int,
277 : enum reload_type, int);
278 : static rtx find_reloads_subreg_address (rtx, int, enum reload_type,
279 : int, rtx_insn *, int *);
280 : static void copy_replacements_1 (rtx *, rtx *, int);
281 : static poly_int64 find_inc_amount (rtx, rtx);
282 : static int refers_to_mem_for_reload_p (rtx);
283 : static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
284 : rtx, rtx *);
285 :
286 : /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
287 : list yet. */
288 :
289 : static void
290 0 : push_reg_equiv_alt_mem (int regno, rtx mem)
291 : {
292 0 : rtx it;
293 :
294 0 : for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))
295 0 : if (rtx_equal_p (XEXP (it, 0), mem))
296 : return;
297 :
298 0 : reg_equiv_alt_mem_list (regno)
299 0 : = alloc_EXPR_LIST (REG_EQUIV, mem,
300 0 : reg_equiv_alt_mem_list (regno));
301 : }
302 :
303 : /* Determine if any secondary reloads are needed for loading (if IN_P is
304 : nonzero) or storing (if IN_P is zero) X to or from a reload register of
305 : register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
306 : are needed, push them.
307 :
308 : Return the reload number of the secondary reload we made, or -1 if
309 : we didn't need one. *PICODE is set to the insn_code to use if we do
310 : need a secondary reload. */
311 :
312 : static int
313 0 : push_secondary_reload (int in_p, rtx x, int opnum, int optional,
314 : enum reg_class reload_class,
315 : machine_mode reload_mode, enum reload_type type,
316 : enum insn_code *picode, secondary_reload_info *prev_sri)
317 : {
318 0 : enum reg_class rclass = NO_REGS;
319 0 : enum reg_class scratch_class;
320 0 : machine_mode mode = reload_mode;
321 0 : enum insn_code icode = CODE_FOR_nothing;
322 0 : enum insn_code t_icode = CODE_FOR_nothing;
323 0 : enum reload_type secondary_type;
324 0 : int s_reload, t_reload = -1;
325 0 : const char *scratch_constraint;
326 0 : secondary_reload_info sri;
327 :
328 0 : if (type == RELOAD_FOR_INPUT_ADDRESS
329 0 : || type == RELOAD_FOR_OUTPUT_ADDRESS
330 : || type == RELOAD_FOR_INPADDR_ADDRESS
331 : || type == RELOAD_FOR_OUTADDR_ADDRESS)
332 : secondary_type = type;
333 : else
334 0 : secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
335 :
336 0 : *picode = CODE_FOR_nothing;
337 :
338 : /* If X is a paradoxical SUBREG, use the inner value to determine both the
339 : mode and object being reloaded. */
340 0 : if (paradoxical_subreg_p (x))
341 : {
342 0 : x = SUBREG_REG (x);
343 0 : reload_mode = GET_MODE (x);
344 : }
345 :
346 : /* If X is a pseudo-register that has an equivalent MEM (actually, if it
347 : is still a pseudo-register by now, it *must* have an equivalent MEM
348 : but we don't want to assume that), use that equivalent when seeing if
349 : a secondary reload is needed since whether or not a reload is needed
350 : might be sensitive to the form of the MEM. */
351 :
352 0 : if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
353 0 : && reg_equiv_mem (REGNO (x)))
354 : x = reg_equiv_mem (REGNO (x));
355 :
356 0 : sri.icode = CODE_FOR_nothing;
357 0 : sri.prev_sri = prev_sri;
358 0 : rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
359 : reload_mode, &sri);
360 0 : icode = (enum insn_code) sri.icode;
361 :
362 : /* If we don't need any secondary registers, done. */
363 0 : if (rclass == NO_REGS && icode == CODE_FOR_nothing)
364 : return -1;
365 :
366 0 : if (rclass != NO_REGS)
367 0 : t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
368 : reload_mode, type, &t_icode, &sri);
369 :
370 : /* If we will be using an insn, the secondary reload is for a
371 : scratch register. */
372 :
373 0 : if (icode != CODE_FOR_nothing)
374 : {
375 : /* If IN_P is nonzero, the reload register will be the output in
376 : operand 0. If IN_P is zero, the reload register will be the input
377 : in operand 1. Outputs should have an initial "=", which we must
378 : skip. */
379 :
380 : /* ??? It would be useful to be able to handle only two, or more than
381 : three, operands, but for now we can only handle the case of having
382 : exactly three: output, input and one temp/scratch. */
383 0 : gcc_assert (insn_data[(int) icode].n_operands == 3);
384 :
385 : /* ??? We currently have no way to represent a reload that needs
386 : an icode to reload from an intermediate tertiary reload register.
387 : We should probably have a new field in struct reload to tag a
388 : chain of scratch operand reloads onto. */
389 0 : gcc_assert (rclass == NO_REGS);
390 :
391 0 : scratch_constraint = insn_data[(int) icode].operand[2].constraint;
392 0 : gcc_assert (*scratch_constraint == '=');
393 0 : scratch_constraint++;
394 0 : if (*scratch_constraint == '&')
395 0 : scratch_constraint++;
396 0 : scratch_class = (reg_class_for_constraint
397 0 : (lookup_constraint (scratch_constraint)));
398 :
399 0 : rclass = scratch_class;
400 0 : mode = insn_data[(int) icode].operand[2].mode;
401 : }
402 :
403 : /* This case isn't valid, so fail. Reload is allowed to use the same
404 : register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 : in the case of a secondary register, we actually need two different
406 : registers for correct code. We fail here to prevent the possibility of
407 : silently generating incorrect code later.
408 :
409 : The convention is that secondary input reloads are valid only if the
410 : secondary_class is different from class. If you have such a case, you
411 : cannot use secondary reloads, you must work around the problem some
412 : other way.
413 :
414 : Allow this when a reload_in/out pattern is being used. I.e. assume
415 : that the generated code handles this case. */
416 :
417 0 : gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
418 : || t_icode != CODE_FOR_nothing);
419 :
420 : /* See if we can reuse an existing secondary reload. */
421 0 : for (s_reload = 0; s_reload < n_reloads; s_reload++)
422 0 : if (rld[s_reload].secondary_p
423 0 : && (reg_class_subset_p (rclass, rld[s_reload].rclass)
424 0 : || reg_class_subset_p (rld[s_reload].rclass, rclass))
425 0 : && ((in_p && rld[s_reload].inmode == mode)
426 0 : || (! in_p && rld[s_reload].outmode == mode))
427 0 : && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
428 0 : || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
429 0 : && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
430 0 : || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
431 0 : && (small_register_class_p (rclass)
432 0 : || targetm.small_register_classes_for_mode_p (VOIDmode))
433 0 : && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
434 : opnum, rld[s_reload].opnum))
435 : {
436 0 : if (in_p)
437 0 : rld[s_reload].inmode = mode;
438 0 : if (! in_p)
439 0 : rld[s_reload].outmode = mode;
440 :
441 0 : if (reg_class_subset_p (rclass, rld[s_reload].rclass))
442 0 : rld[s_reload].rclass = rclass;
443 :
444 0 : rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
445 0 : rld[s_reload].optional &= optional;
446 0 : rld[s_reload].secondary_p = 1;
447 0 : if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
448 : opnum, rld[s_reload].opnum))
449 0 : rld[s_reload].when_needed = RELOAD_OTHER;
450 :
451 : break;
452 : }
453 :
454 0 : if (s_reload == n_reloads)
455 : {
456 : /* If we need a memory location to copy between the two reload regs,
457 : set it up now. Note that we do the input case before making
458 : the reload and the output case after. This is due to the
459 : way reloads are output. */
460 :
461 0 : if (in_p && icode == CODE_FOR_nothing
462 0 : && targetm.secondary_memory_needed (mode, rclass, reload_class))
463 : {
464 0 : get_secondary_mem (x, reload_mode, opnum, type);
465 :
466 : /* We may have just added new reloads. Make sure we add
467 : the new reload at the end. */
468 0 : s_reload = n_reloads;
469 : }
470 :
471 : /* We need to make a new secondary reload for this register class. */
472 0 : rld[s_reload].in = rld[s_reload].out = 0;
473 0 : rld[s_reload].rclass = rclass;
474 :
475 0 : rld[s_reload].inmode = in_p ? mode : VOIDmode;
476 0 : rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
477 0 : rld[s_reload].reg_rtx = 0;
478 0 : rld[s_reload].optional = optional;
479 0 : rld[s_reload].inc = 0;
480 : /* Maybe we could combine these, but it seems too tricky. */
481 0 : rld[s_reload].nocombine = 1;
482 0 : rld[s_reload].in_reg = 0;
483 0 : rld[s_reload].out_reg = 0;
484 0 : rld[s_reload].opnum = opnum;
485 0 : rld[s_reload].when_needed = secondary_type;
486 0 : rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
487 0 : rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
488 0 : rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
489 0 : rld[s_reload].secondary_out_icode
490 0 : = ! in_p ? t_icode : CODE_FOR_nothing;
491 0 : rld[s_reload].secondary_p = 1;
492 :
493 0 : n_reloads++;
494 :
495 0 : if (! in_p && icode == CODE_FOR_nothing
496 0 : && targetm.secondary_memory_needed (mode, reload_class, rclass))
497 0 : get_secondary_mem (x, mode, opnum, type);
498 : }
499 :
500 0 : *picode = icode;
501 0 : return s_reload;
502 : }
503 :
504 : /* If a secondary reload is needed, return its class. If both an intermediate
505 : register and a scratch register is needed, we return the class of the
506 : intermediate register. */
507 : reg_class_t
508 0 : secondary_reload_class (bool in_p, reg_class_t rclass, machine_mode mode,
509 : rtx x)
510 : {
511 0 : enum insn_code icode;
512 0 : secondary_reload_info sri;
513 :
514 0 : sri.icode = CODE_FOR_nothing;
515 0 : sri.prev_sri = NULL;
516 0 : rclass
517 0 : = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
518 0 : icode = (enum insn_code) sri.icode;
519 :
520 : /* If there are no secondary reloads at all, we return NO_REGS.
521 : If an intermediate register is needed, we return its class. */
522 0 : if (icode == CODE_FOR_nothing || rclass != NO_REGS)
523 : return rclass;
524 :
525 : /* No intermediate register is needed, but we have a special reload
526 : pattern, which we assume for now needs a scratch register. */
527 0 : return scratch_reload_class (icode);
528 : }
529 :
530 : /* ICODE is the insn_code of a reload pattern. Check that it has exactly
531 : three operands, verify that operand 2 is an output operand, and return
532 : its register class.
533 : ??? We'd like to be able to handle any pattern with at least 2 operands,
534 : for zero or more scratch registers, but that needs more infrastructure. */
535 : enum reg_class
536 0 : scratch_reload_class (enum insn_code icode)
537 : {
538 0 : const char *scratch_constraint;
539 0 : enum reg_class rclass;
540 :
541 0 : gcc_assert (insn_data[(int) icode].n_operands == 3);
542 0 : scratch_constraint = insn_data[(int) icode].operand[2].constraint;
543 0 : gcc_assert (*scratch_constraint == '=');
544 0 : scratch_constraint++;
545 0 : if (*scratch_constraint == '&')
546 0 : scratch_constraint++;
547 0 : rclass = reg_class_for_constraint (lookup_constraint (scratch_constraint));
548 0 : gcc_assert (rclass != NO_REGS);
549 0 : return rclass;
550 : }
551 :
552 : /* Return a memory location that will be used to copy X in mode MODE.
553 : If we haven't already made a location for this mode in this insn,
554 : call find_reloads_address on the location being returned. */
555 :
556 : rtx
557 0 : get_secondary_mem (rtx x ATTRIBUTE_UNUSED, machine_mode mode,
558 : int opnum, enum reload_type type)
559 : {
560 0 : rtx loc;
561 0 : int mem_valid;
562 :
563 : /* By default, if MODE is narrower than a word, widen it to a word.
564 : This is required because most machines that require these memory
565 : locations do not support short load and stores from all registers
566 : (e.g., FP registers). */
567 :
568 0 : mode = targetm.secondary_memory_needed_mode (mode);
569 :
570 : /* If we already have made a MEM for this operand in MODE, return it. */
571 0 : if (secondary_memlocs_elim[(int) mode][opnum] != 0)
572 : return secondary_memlocs_elim[(int) mode][opnum];
573 :
574 : /* If this is the first time we've tried to get a MEM for this mode,
575 : allocate a new one. `something_changed' in reload will get set
576 : by noticing that the frame size has changed. */
577 :
578 0 : if (secondary_memlocs[(int) mode] == 0)
579 : {
580 : #ifdef SECONDARY_MEMORY_NEEDED_RTX
581 : secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
582 : #else
583 0 : secondary_memlocs[(int) mode]
584 0 : = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
585 : #endif
586 : }
587 :
588 : /* Get a version of the address doing any eliminations needed. If that
589 : didn't give us a new MEM, make a new one if it isn't valid. */
590 :
591 0 : loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
592 0 : mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
593 0 : MEM_ADDR_SPACE (loc));
594 :
595 0 : if (! mem_valid && loc == secondary_memlocs[(int) mode])
596 0 : loc = copy_rtx (loc);
597 :
598 : /* The only time the call below will do anything is if the stack
599 : offset is too large. In that case IND_LEVELS doesn't matter, so we
600 : can just pass a zero. Adjust the type to be the address of the
601 : corresponding object. If the address was valid, save the eliminated
602 : address. If it wasn't valid, we need to make a reload each time, so
603 : don't save it. */
604 :
605 0 : if (! mem_valid)
606 : {
607 0 : type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
608 0 : : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
609 : : RELOAD_OTHER);
610 :
611 0 : find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
612 : opnum, type, 0, 0);
613 : }
614 :
615 0 : secondary_memlocs_elim[(int) mode][opnum] = loc;
616 0 : if (secondary_memlocs_elim_used <= (int)mode)
617 0 : secondary_memlocs_elim_used = (int)mode + 1;
618 : return loc;
619 : }
620 :
621 : /* Clear any secondary memory locations we've made. */
622 :
623 : void
624 0 : clear_secondary_mem (void)
625 : {
626 0 : memset (secondary_memlocs, 0, sizeof secondary_memlocs);
627 0 : }
628 :
629 :
630 : /* Find the largest class which has at least one register valid in
631 : mode INNER, and which for every such register, that register number
632 : plus N is also valid in OUTER (if in range) and is cheap to move
633 : into REGNO. Such a class must exist. */
634 :
635 : static enum reg_class
636 0 : find_valid_class (machine_mode outer ATTRIBUTE_UNUSED,
637 : machine_mode inner ATTRIBUTE_UNUSED, int n,
638 : unsigned int dest_regno ATTRIBUTE_UNUSED)
639 : {
640 0 : int best_cost = -1;
641 0 : int rclass;
642 0 : int regno;
643 0 : enum reg_class best_class = NO_REGS;
644 0 : enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
645 0 : unsigned int best_size = 0;
646 0 : int cost;
647 :
648 0 : for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
649 : {
650 : int bad = 0;
651 : int good = 0;
652 0 : for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
653 0 : if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
654 : {
655 0 : if (targetm.hard_regno_mode_ok (regno, inner))
656 : {
657 0 : good = 1;
658 0 : if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
659 0 : && !targetm.hard_regno_mode_ok (regno + n, outer))
660 : bad = 1;
661 : }
662 : }
663 :
664 0 : if (bad || !good)
665 0 : continue;
666 0 : cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
667 :
668 0 : if ((reg_class_size[rclass] > best_size
669 0 : && (best_cost < 0 || best_cost >= cost))
670 0 : || best_cost > cost)
671 : {
672 0 : best_class = (enum reg_class) rclass;
673 0 : best_size = reg_class_size[rclass];
674 0 : best_cost = register_move_cost (outer, (enum reg_class) rclass,
675 : dest_class);
676 : }
677 : }
678 :
679 0 : gcc_assert (best_size != 0);
680 :
681 0 : return best_class;
682 : }
683 :
684 : /* We are trying to reload a subreg of something that is not a register.
685 : Find the largest class which contains only registers valid in
686 : mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
687 : which we would eventually like to obtain the object. */
688 :
689 : static enum reg_class
690 0 : find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED,
691 : machine_mode mode ATTRIBUTE_UNUSED,
692 : enum reg_class dest_class ATTRIBUTE_UNUSED)
693 : {
694 0 : int best_cost = -1;
695 0 : int rclass;
696 0 : int regno;
697 0 : enum reg_class best_class = NO_REGS;
698 0 : unsigned int best_size = 0;
699 0 : int cost;
700 :
701 0 : for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
702 : {
703 : unsigned int computed_rclass_size = 0;
704 :
705 0 : for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
706 : {
707 0 : if (in_hard_reg_set_p (reg_class_contents[rclass], mode, regno)
708 0 : && targetm.hard_regno_mode_ok (regno, mode))
709 0 : computed_rclass_size++;
710 : }
711 :
712 0 : cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
713 :
714 0 : if ((computed_rclass_size > best_size
715 0 : && (best_cost < 0 || best_cost >= cost))
716 0 : || best_cost > cost)
717 : {
718 0 : best_class = (enum reg_class) rclass;
719 0 : best_size = computed_rclass_size;
720 0 : best_cost = register_move_cost (outer, (enum reg_class) rclass,
721 : dest_class);
722 : }
723 : }
724 :
725 0 : gcc_assert (best_size != 0);
726 :
727 : #ifdef LIMIT_RELOAD_CLASS
728 : best_class = LIMIT_RELOAD_CLASS (mode, best_class);
729 : #endif
730 0 : return best_class;
731 : }
732 :
733 : /* Return the number of a previously made reload that can be combined with
734 : a new one, or n_reloads if none of the existing reloads can be used.
735 : OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
736 : push_reload, they determine the kind of the new reload that we try to
737 : combine. P_IN points to the corresponding value of IN, which can be
738 : modified by this function.
739 : DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
740 :
741 : static int
742 0 : find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
743 : enum reload_type type, int opnum, int dont_share)
744 : {
745 0 : rtx in = *p_in;
746 0 : int i;
747 : /* We can't merge two reloads if the output of either one is
748 : earlyclobbered. */
749 :
750 0 : if (earlyclobber_operand_p (out))
751 0 : return n_reloads;
752 :
753 : /* We can use an existing reload if the class is right
754 : and at least one of IN and OUT is a match
755 : and the other is at worst neutral.
756 : (A zero compared against anything is neutral.)
757 :
758 : For targets with small register classes, don't use existing reloads
759 : unless they are for the same thing since that can cause us to need
760 : more reload registers than we otherwise would. */
761 :
762 0 : for (i = 0; i < n_reloads; i++)
763 0 : if ((reg_class_subset_p (rclass, rld[i].rclass)
764 0 : || reg_class_subset_p (rld[i].rclass, rclass))
765 : /* If the existing reload has a register, it must fit our class. */
766 0 : && (rld[i].reg_rtx == 0
767 0 : || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
768 0 : true_regnum (rld[i].reg_rtx)))
769 0 : && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
770 0 : && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
771 0 : || (out != 0 && MATCHES (rld[i].out, out)
772 0 : && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
773 0 : && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
774 0 : && (small_register_class_p (rclass)
775 0 : || targetm.small_register_classes_for_mode_p (VOIDmode))
776 0 : && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
777 : return i;
778 :
779 : /* Reloading a plain reg for input can match a reload to postincrement
780 : that reg, since the postincrement's value is the right value.
781 : Likewise, it can match a preincrement reload, since we regard
782 : the preincrementation as happening before any ref in this insn
783 : to that register. */
784 0 : for (i = 0; i < n_reloads; i++)
785 0 : if ((reg_class_subset_p (rclass, rld[i].rclass)
786 0 : || reg_class_subset_p (rld[i].rclass, rclass))
787 : /* If the existing reload has a register, it must fit our
788 : class. */
789 0 : && (rld[i].reg_rtx == 0
790 0 : || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
791 0 : true_regnum (rld[i].reg_rtx)))
792 0 : && out == 0 && rld[i].out == 0 && rld[i].in != 0
793 0 : && ((REG_P (in)
794 0 : && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
795 0 : && MATCHES (XEXP (rld[i].in, 0), in))
796 0 : || (REG_P (rld[i].in)
797 0 : && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
798 0 : && MATCHES (XEXP (in, 0), rld[i].in)))
799 0 : && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
800 0 : && (small_register_class_p (rclass)
801 0 : || targetm.small_register_classes_for_mode_p (VOIDmode))
802 0 : && MERGABLE_RELOADS (type, rld[i].when_needed,
803 : opnum, rld[i].opnum))
804 : {
805 : /* Make sure reload_in ultimately has the increment,
806 : not the plain register. */
807 0 : if (REG_P (in))
808 0 : *p_in = rld[i].in;
809 : return i;
810 : }
811 : return n_reloads;
812 : }
813 :
814 : /* Return true if:
815 :
816 : (a) (subreg:OUTER_MODE REG ...) represents a word or subword subreg
817 : of a multiword value; and
818 :
819 : (b) the number of *words* in REG does not match the number of *registers*
820 : in REG. */
821 :
822 : static bool
823 0 : complex_word_subreg_p (machine_mode outer_mode, rtx reg)
824 : {
825 0 : machine_mode inner_mode = GET_MODE (reg);
826 0 : poly_uint64 reg_words = REG_NREGS (reg) * UNITS_PER_WORD;
827 0 : return (known_le (GET_MODE_SIZE (outer_mode), UNITS_PER_WORD)
828 0 : && maybe_gt (GET_MODE_SIZE (inner_mode), UNITS_PER_WORD)
829 0 : && !known_equal_after_align_up (GET_MODE_SIZE (inner_mode),
830 0 : reg_words, UNITS_PER_WORD));
831 : }
832 :
833 : /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
834 : expression. MODE is the mode that X will be used in. OUTPUT is true if
835 : the function is invoked for the output part of an enclosing reload. */
836 :
837 : static bool
838 0 : reload_inner_reg_of_subreg (rtx x, machine_mode mode, bool output)
839 : {
840 0 : rtx inner;
841 :
842 : /* Only SUBREGs are problematical. */
843 0 : if (GET_CODE (x) != SUBREG)
844 : return false;
845 :
846 0 : inner = SUBREG_REG (x);
847 :
848 : /* If INNER is a constant or PLUS, then INNER will need reloading. */
849 0 : if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
850 : return true;
851 :
852 : /* If INNER is not a hard register, then INNER will not need reloading. */
853 0 : if (!(REG_P (inner) && HARD_REGISTER_P (inner)))
854 : return false;
855 :
856 : /* If INNER is not ok for MODE, then INNER will need reloading. */
857 0 : if (!targetm.hard_regno_mode_ok (subreg_regno (x), mode))
858 : return true;
859 :
860 : /* If this is for an output, and the outer part is a word or smaller,
861 : INNER is larger than a word and the number of registers in INNER is
862 : not the same as the number of words in INNER, then INNER will need
863 : reloading (with an in-out reload). */
864 0 : return output && complex_word_subreg_p (mode, inner);
865 : }
866 :
867 : /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
868 : requiring an extra reload register. The caller has already found that
869 : IN contains some reference to REGNO, so check that we can produce the
870 : new value in a single step. E.g. if we have
871 : (set (reg r13) (plus (reg r13) (const int 1))), and there is an
872 : instruction that adds one to a register, this should succeed.
873 : However, if we have something like
874 : (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
875 : needs to be loaded into a register first, we need a separate reload
876 : register.
877 : Such PLUS reloads are generated by find_reload_address_part.
878 : The out-of-range PLUS expressions are usually introduced in the instruction
879 : patterns by register elimination and substituting pseudos without a home
880 : by their function-invariant equivalences. */
881 : static int
882 0 : can_reload_into (rtx in, int regno, machine_mode mode)
883 : {
884 0 : rtx dst;
885 0 : rtx_insn *test_insn;
886 0 : int r = 0;
887 :
888 : /* For matching constraints, we often get notional input reloads where
889 : we want to use the original register as the reload register. I.e.
890 : technically this is a non-optional input-output reload, but IN is
891 : already a valid register, and has been chosen as the reload register.
892 : Speed this up, since it trivially works. */
893 0 : if (REG_P (in))
894 : return 1;
895 :
896 : /* To test MEMs properly, we'd have to take into account all the reloads
897 : that are already scheduled, which can become quite complicated.
898 : And since we've already handled address reloads for this MEM, it
899 : should always succeed anyway. */
900 0 : if (MEM_P (in))
901 : return 1;
902 :
903 : /* If we can make a simple SET insn that does the job, everything should
904 : be fine. */
905 0 : dst = gen_rtx_REG (mode, regno);
906 0 : test_insn = make_insn_raw (gen_rtx_SET (dst, in));
907 0 : recog_state_saver recog_save;
908 0 : if (recog_memoized (test_insn) >= 0)
909 : {
910 0 : extract_insn (test_insn);
911 0 : r = constrain_operands (1, get_enabled_alternatives (test_insn));
912 : }
913 0 : return r;
914 0 : }
915 :
916 : /* Record one reload that needs to be performed.
917 : IN is an rtx saying where the data are to be found before this instruction.
918 : OUT says where they must be stored after the instruction.
919 : (IN is zero for data not read, and OUT is zero for data not written.)
920 : INLOC and OUTLOC point to the places in the instructions where
921 : IN and OUT were found.
922 : If IN and OUT are both nonzero, it means the same register must be used
923 : to reload both IN and OUT.
924 :
925 : RCLASS is a register class required for the reloaded data.
926 : INMODE is the machine mode that the instruction requires
927 : for the reg that replaces IN and OUTMODE is likewise for OUT.
928 :
929 : If IN is zero, then OUT's location and mode should be passed as
930 : INLOC and INMODE.
931 :
932 : STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
933 :
934 : OPTIONAL nonzero means this reload does not need to be performed:
935 : it can be discarded if that is more convenient.
936 :
937 : OPNUM and TYPE say what the purpose of this reload is.
938 :
939 : The return value is the reload-number for this reload.
940 :
941 : If both IN and OUT are nonzero, in some rare cases we might
942 : want to make two separate reloads. (Actually we never do this now.)
943 : Therefore, the reload-number for OUT is stored in
944 : output_reloadnum when we return; the return value applies to IN.
945 : Usually (presently always), when IN and OUT are nonzero,
946 : the two reload-numbers are equal, but the caller should be careful to
947 : distinguish them. */
948 :
949 : int
950 0 : push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
951 : enum reg_class rclass, machine_mode inmode,
952 : machine_mode outmode, int strict_low, int optional,
953 : int opnum, enum reload_type type)
954 : {
955 0 : int i;
956 0 : int dont_share = 0;
957 0 : int dont_remove_subreg = 0;
958 : #ifdef LIMIT_RELOAD_CLASS
959 : rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
960 : #endif
961 0 : int secondary_in_reload = -1, secondary_out_reload = -1;
962 0 : enum insn_code secondary_in_icode = CODE_FOR_nothing;
963 0 : enum insn_code secondary_out_icode = CODE_FOR_nothing;
964 0 : enum reg_class subreg_in_class ATTRIBUTE_UNUSED;
965 0 : subreg_in_class = NO_REGS;
966 :
967 : /* INMODE and/or OUTMODE could be VOIDmode if no mode
968 : has been specified for the operand. In that case,
969 : use the operand's mode as the mode to reload. */
970 0 : if (inmode == VOIDmode && in != 0)
971 0 : inmode = GET_MODE (in);
972 0 : if (outmode == VOIDmode && out != 0)
973 0 : outmode = GET_MODE (out);
974 :
975 : /* If find_reloads and friends until now missed to replace a pseudo
976 : with a constant of reg_equiv_constant something went wrong
977 : beforehand.
978 : Note that it can't simply be done here if we missed it earlier
979 : since the constant might need to be pushed into the literal pool
980 : and the resulting memref would probably need further
981 : reloading. */
982 0 : if (in != 0 && REG_P (in))
983 : {
984 0 : int regno = REGNO (in);
985 :
986 0 : gcc_assert (regno < FIRST_PSEUDO_REGISTER
987 : || reg_renumber[regno] >= 0
988 : || reg_equiv_constant (regno) == NULL_RTX);
989 : }
990 :
991 : /* reg_equiv_constant only contains constants which are obviously
992 : not appropriate as destination. So if we would need to replace
993 : the destination pseudo with a constant we are in real
994 : trouble. */
995 0 : if (out != 0 && REG_P (out))
996 : {
997 0 : int regno = REGNO (out);
998 :
999 0 : gcc_assert (regno < FIRST_PSEUDO_REGISTER
1000 : || reg_renumber[regno] >= 0
1001 : || reg_equiv_constant (regno) == NULL_RTX);
1002 : }
1003 :
1004 : /* If we have a read-write operand with an address side-effect,
1005 : change either IN or OUT so the side-effect happens only once. */
1006 0 : if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
1007 0 : switch (GET_CODE (XEXP (in, 0)))
1008 : {
1009 0 : case POST_INC: case POST_DEC: case POST_MODIFY:
1010 0 : in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
1011 0 : break;
1012 :
1013 0 : case PRE_INC: case PRE_DEC: case PRE_MODIFY:
1014 0 : out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
1015 0 : break;
1016 :
1017 : default:
1018 : break;
1019 : }
1020 :
1021 : /* If we are reloading a (SUBREG constant ...), really reload just the
1022 : inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1023 : If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1024 : a pseudo and hence will become a MEM) with M1 wider than M2 and the
1025 : register is a pseudo, also reload the inside expression.
1026 : For machines that extend byte loads, do this for any SUBREG of a pseudo
1027 : where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1028 : M2 is an integral mode that gets extended when loaded.
1029 : Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1030 : where either M1 is not valid for R or M2 is wider than a word but we
1031 : only need one register to store an M2-sized quantity in R.
1032 : (However, if OUT is nonzero, we need to reload the reg *and*
1033 : the subreg, so do nothing here, and let following statement handle it.)
1034 :
1035 : Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1036 : we can't handle it here because CONST_INT does not indicate a mode.
1037 :
1038 : Similarly, we must reload the inside expression if we have a
1039 : STRICT_LOW_PART (presumably, in == out in this case).
1040 :
1041 : Also reload the inner expression if it does not require a secondary
1042 : reload but the SUBREG does.
1043 :
1044 : Also reload the inner expression if it is a register that is in
1045 : the class whose registers cannot be referenced in a different size
1046 : and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1047 : cannot reload just the inside since we might end up with the wrong
1048 : register class. But if it is inside a STRICT_LOW_PART, we have
1049 : no choice, so we hope we do get the right register class there.
1050 :
1051 : Finally, reload the inner expression if it is a pseudo that will
1052 : become a MEM and the MEM has a mode-dependent address, as in that
1053 : case we obviously cannot change the mode of the MEM to that of the
1054 : containing SUBREG as that would change the interpretation of the
1055 : address. */
1056 :
1057 0 : scalar_int_mode inner_mode;
1058 0 : if (in != 0 && GET_CODE (in) == SUBREG
1059 0 : && targetm.can_change_mode_class (GET_MODE (SUBREG_REG (in)),
1060 : inmode, rclass)
1061 0 : && contains_allocatable_reg_of_mode[rclass][GET_MODE (SUBREG_REG (in))]
1062 0 : && (strict_low
1063 0 : || (subreg_lowpart_p (in)
1064 0 : && (CONSTANT_P (SUBREG_REG (in))
1065 0 : || GET_CODE (SUBREG_REG (in)) == PLUS
1066 0 : || (((REG_P (SUBREG_REG (in))
1067 0 : && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1068 0 : || MEM_P (SUBREG_REG (in)))
1069 0 : && (paradoxical_subreg_p (inmode,
1070 0 : GET_MODE (SUBREG_REG (in)))
1071 0 : || (known_le (GET_MODE_SIZE (inmode), UNITS_PER_WORD)
1072 0 : && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG
1073 : (in)),
1074 : &inner_mode)
1075 0 : && GET_MODE_SIZE (inner_mode) <= UNITS_PER_WORD
1076 0 : && paradoxical_subreg_p (inmode, inner_mode)
1077 : && LOAD_EXTEND_OP (inner_mode) != UNKNOWN)
1078 : || (WORD_REGISTER_OPERATIONS
1079 : && partial_subreg_p (inmode,
1080 : GET_MODE (SUBREG_REG (in)))
1081 : && (known_equal_after_align_down
1082 : (GET_MODE_SIZE (inmode) - 1,
1083 : GET_MODE_SIZE (GET_MODE (SUBREG_REG
1084 : (in))) - 1,
1085 : UNITS_PER_WORD)))))
1086 0 : || (REG_P (SUBREG_REG (in))
1087 0 : && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1088 : /* The case where out is nonzero
1089 : is handled differently in the following statement. */
1090 0 : && (out == 0 || subreg_lowpart_p (in))
1091 0 : && (complex_word_subreg_p (inmode, SUBREG_REG (in))
1092 0 : || !targetm.hard_regno_mode_ok (subreg_regno (in),
1093 : inmode)))
1094 0 : || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1095 0 : && (secondary_reload_class (1, rclass,
1096 0 : GET_MODE (SUBREG_REG (in)),
1097 : SUBREG_REG (in))
1098 : == NO_REGS))
1099 0 : || (REG_P (SUBREG_REG (in))
1100 0 : && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1101 0 : && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (in)),
1102 : GET_MODE (SUBREG_REG (in)),
1103 : inmode))))
1104 0 : || (REG_P (SUBREG_REG (in))
1105 0 : && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
1106 0 : && reg_equiv_mem (REGNO (SUBREG_REG (in)))
1107 0 : && (mode_dependent_address_p
1108 0 : (XEXP (reg_equiv_mem (REGNO (SUBREG_REG (in))), 0),
1109 0 : MEM_ADDR_SPACE (reg_equiv_mem (REGNO (SUBREG_REG (in)))))))))
1110 : {
1111 : #ifdef LIMIT_RELOAD_CLASS
1112 : in_subreg_loc = inloc;
1113 : #endif
1114 0 : inloc = &SUBREG_REG (in);
1115 0 : in = *inloc;
1116 :
1117 0 : if (!WORD_REGISTER_OPERATIONS
1118 : && LOAD_EXTEND_OP (GET_MODE (in)) == UNKNOWN
1119 0 : && MEM_P (in))
1120 : /* This is supposed to happen only for paradoxical subregs made by
1121 : combine.cc. (SUBREG (MEM)) isn't supposed to occur other ways. */
1122 0 : gcc_assert (known_le (GET_MODE_SIZE (GET_MODE (in)),
1123 : GET_MODE_SIZE (inmode)));
1124 :
1125 0 : inmode = GET_MODE (in);
1126 : }
1127 :
1128 : /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1129 : where M1 is not valid for R if it was not handled by the code above.
1130 :
1131 : Similar issue for (SUBREG constant ...) if it was not handled by the
1132 : code above. This can happen if SUBREG_BYTE != 0.
1133 :
1134 : However, we must reload the inner reg *as well as* the subreg in
1135 : that case. */
1136 :
1137 0 : if (in != 0 && reload_inner_reg_of_subreg (in, inmode, false))
1138 : {
1139 0 : if (REG_P (SUBREG_REG (in)))
1140 0 : subreg_in_class
1141 0 : = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1142 0 : subreg_regno_offset (REGNO (SUBREG_REG (in)),
1143 0 : GET_MODE (SUBREG_REG (in)),
1144 0 : SUBREG_BYTE (in),
1145 0 : GET_MODE (in)),
1146 0 : REGNO (SUBREG_REG (in)));
1147 0 : else if (CONSTANT_P (SUBREG_REG (in))
1148 0 : || GET_CODE (SUBREG_REG (in)) == PLUS)
1149 0 : subreg_in_class = find_valid_class_1 (inmode,
1150 0 : GET_MODE (SUBREG_REG (in)),
1151 : rclass);
1152 :
1153 : /* This relies on the fact that emit_reload_insns outputs the
1154 : instructions for input reloads of type RELOAD_OTHER in the same
1155 : order as the reloads. Thus if the outer reload is also of type
1156 : RELOAD_OTHER, we are guaranteed that this inner reload will be
1157 : output before the outer reload. */
1158 0 : push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1159 : subreg_in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1160 0 : dont_remove_subreg = 1;
1161 : }
1162 :
1163 : /* Similarly for paradoxical and problematical SUBREGs on the output.
1164 : Note that there is no reason we need worry about the previous value
1165 : of SUBREG_REG (out); even if wider than out, storing in a subreg is
1166 : entitled to clobber it all (except in the case of a word mode subreg
1167 : or of a STRICT_LOW_PART, in that latter case the constraint should
1168 : label it input-output.) */
1169 0 : if (out != 0 && GET_CODE (out) == SUBREG
1170 0 : && (subreg_lowpart_p (out) || strict_low)
1171 0 : && targetm.can_change_mode_class (GET_MODE (SUBREG_REG (out)),
1172 : outmode, rclass)
1173 0 : && contains_allocatable_reg_of_mode[rclass][GET_MODE (SUBREG_REG (out))]
1174 0 : && (CONSTANT_P (SUBREG_REG (out))
1175 0 : || strict_low
1176 0 : || (((REG_P (SUBREG_REG (out))
1177 0 : && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1178 0 : || MEM_P (SUBREG_REG (out)))
1179 0 : && (paradoxical_subreg_p (outmode, GET_MODE (SUBREG_REG (out)))
1180 : || (WORD_REGISTER_OPERATIONS
1181 : && partial_subreg_p (outmode, GET_MODE (SUBREG_REG (out)))
1182 : && (known_equal_after_align_down
1183 : (GET_MODE_SIZE (outmode) - 1,
1184 : GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1,
1185 : UNITS_PER_WORD)))))
1186 0 : || (REG_P (SUBREG_REG (out))
1187 0 : && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1188 : /* The case of a word mode subreg
1189 : is handled differently in the following statement. */
1190 0 : && ! (known_le (GET_MODE_SIZE (outmode), UNITS_PER_WORD)
1191 0 : && maybe_gt (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))),
1192 : UNITS_PER_WORD))
1193 0 : && !targetm.hard_regno_mode_ok (subreg_regno (out), outmode))
1194 0 : || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1195 0 : && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1196 : SUBREG_REG (out))
1197 : == NO_REGS))
1198 0 : || (REG_P (SUBREG_REG (out))
1199 0 : && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1200 0 : && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1201 : GET_MODE (SUBREG_REG (out)),
1202 : outmode))))
1203 : {
1204 : #ifdef LIMIT_RELOAD_CLASS
1205 : out_subreg_loc = outloc;
1206 : #endif
1207 0 : outloc = &SUBREG_REG (out);
1208 0 : out = *outloc;
1209 0 : gcc_assert (WORD_REGISTER_OPERATIONS || !MEM_P (out)
1210 : || known_le (GET_MODE_SIZE (GET_MODE (out)),
1211 : GET_MODE_SIZE (outmode)));
1212 0 : outmode = GET_MODE (out);
1213 : }
1214 :
1215 : /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1216 : where either M1 is not valid for R or M2 is wider than a word but we
1217 : only need one register to store an M2-sized quantity in R.
1218 :
1219 : However, we must reload the inner reg *as well as* the subreg in
1220 : that case and the inner reg is an in-out reload. */
1221 :
1222 0 : if (out != 0 && reload_inner_reg_of_subreg (out, outmode, true))
1223 : {
1224 0 : enum reg_class in_out_class
1225 0 : = find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1226 0 : subreg_regno_offset (REGNO (SUBREG_REG (out)),
1227 0 : GET_MODE (SUBREG_REG (out)),
1228 0 : SUBREG_BYTE (out),
1229 0 : GET_MODE (out)),
1230 0 : REGNO (SUBREG_REG (out)));
1231 :
1232 : /* This relies on the fact that emit_reload_insns outputs the
1233 : instructions for output reloads of type RELOAD_OTHER in reverse
1234 : order of the reloads. Thus if the outer reload is also of type
1235 : RELOAD_OTHER, we are guaranteed that this inner reload will be
1236 : output after the outer reload. */
1237 0 : push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1238 : &SUBREG_REG (out), in_out_class, VOIDmode, VOIDmode,
1239 : 0, 0, opnum, RELOAD_OTHER);
1240 0 : dont_remove_subreg = 1;
1241 : }
1242 :
1243 : /* If IN appears in OUT, we can't share any input-only reload for IN. */
1244 0 : if (in != 0 && out != 0 && MEM_P (out)
1245 0 : && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1246 0 : && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1247 : dont_share = 1;
1248 :
1249 : /* If IN is a SUBREG of a hard register, make a new REG. This
1250 : simplifies some of the cases below. */
1251 :
1252 0 : if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1253 0 : && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1254 0 : && ! dont_remove_subreg)
1255 0 : in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1256 :
1257 : /* Similarly for OUT. */
1258 0 : if (out != 0 && GET_CODE (out) == SUBREG
1259 0 : && REG_P (SUBREG_REG (out))
1260 0 : && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1261 0 : && ! dont_remove_subreg)
1262 0 : out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1263 :
1264 : /* Narrow down the class of register wanted if that is
1265 : desirable on this machine for efficiency. */
1266 0 : {
1267 0 : reg_class_t preferred_class = rclass;
1268 :
1269 0 : if (in != 0)
1270 0 : preferred_class = targetm.preferred_reload_class (in, rclass);
1271 :
1272 : /* Output reloads may need analogous treatment, different in detail. */
1273 0 : if (out != 0)
1274 0 : preferred_class
1275 0 : = targetm.preferred_output_reload_class (out, preferred_class);
1276 :
1277 : /* Discard what the target said if we cannot do it. */
1278 0 : if (preferred_class != NO_REGS
1279 0 : || (optional && type == RELOAD_FOR_OUTPUT))
1280 0 : rclass = (enum reg_class) preferred_class;
1281 : }
1282 :
1283 : /* Make sure we use a class that can handle the actual pseudo
1284 : inside any subreg. For example, on the 386, QImode regs
1285 : can appear within SImode subregs. Although GENERAL_REGS
1286 : can handle SImode, QImode needs a smaller class. */
1287 : #ifdef LIMIT_RELOAD_CLASS
1288 : if (in_subreg_loc)
1289 : rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1290 : else if (in != 0 && GET_CODE (in) == SUBREG)
1291 : rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1292 :
1293 : if (out_subreg_loc)
1294 : rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1295 : if (out != 0 && GET_CODE (out) == SUBREG)
1296 : rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1297 : #endif
1298 :
1299 : /* Verify that this class is at least possible for the mode that
1300 : is specified. */
1301 0 : if (this_insn_is_asm)
1302 : {
1303 0 : machine_mode mode;
1304 0 : if (paradoxical_subreg_p (inmode, outmode))
1305 : mode = inmode;
1306 : else
1307 0 : mode = outmode;
1308 0 : if (mode == VOIDmode)
1309 : {
1310 0 : error_for_asm (this_insn, "cannot reload integer constant "
1311 : "operand in %<asm%>");
1312 0 : mode = word_mode;
1313 0 : if (in != 0)
1314 0 : inmode = word_mode;
1315 0 : if (out != 0)
1316 0 : outmode = word_mode;
1317 : }
1318 0 : for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1319 0 : if (targetm.hard_regno_mode_ok (i, mode)
1320 0 : && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1321 : break;
1322 0 : if (i == FIRST_PSEUDO_REGISTER)
1323 : {
1324 0 : error_for_asm (this_insn, "impossible register constraint "
1325 : "in %<asm%>");
1326 : /* Avoid further trouble with this insn. */
1327 0 : PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1328 : /* We used to continue here setting class to ALL_REGS, but it triggers
1329 : sanity check on i386 for:
1330 : void foo(long double d)
1331 : {
1332 : asm("" :: "a" (d));
1333 : }
1334 : Returning zero here ought to be safe as we take care in
1335 : find_reloads to not process the reloads when instruction was
1336 : replaced by USE. */
1337 :
1338 0 : return 0;
1339 : }
1340 : }
1341 :
1342 : /* Optional output reloads are always OK even if we have no register class,
1343 : since the function of these reloads is only to have spill_reg_store etc.
1344 : set, so that the storing insn can be deleted later. */
1345 0 : gcc_assert (rclass != NO_REGS
1346 : || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1347 :
1348 0 : i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1349 :
1350 0 : if (i == n_reloads)
1351 : {
1352 : /* See if we need a secondary reload register to move between CLASS
1353 : and IN or CLASS and OUT. Get the icode and push any required reloads
1354 : needed for each of them if so. */
1355 :
1356 0 : if (in != 0)
1357 0 : secondary_in_reload
1358 0 : = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1359 : &secondary_in_icode, NULL);
1360 0 : if (out != 0 && GET_CODE (out) != SCRATCH)
1361 0 : secondary_out_reload
1362 0 : = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1363 : type, &secondary_out_icode, NULL);
1364 :
1365 : /* We found no existing reload suitable for re-use.
1366 : So add an additional reload. */
1367 :
1368 0 : if (subreg_in_class == NO_REGS
1369 0 : && in != 0
1370 0 : && (REG_P (in)
1371 0 : || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1372 0 : && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER)
1373 0 : subreg_in_class = REGNO_REG_CLASS (reg_or_subregno (in));
1374 : /* If a memory location is needed for the copy, make one. */
1375 0 : if (subreg_in_class != NO_REGS
1376 0 : && targetm.secondary_memory_needed (inmode, subreg_in_class, rclass))
1377 0 : get_secondary_mem (in, inmode, opnum, type);
1378 :
1379 0 : i = n_reloads;
1380 0 : rld[i].in = in;
1381 0 : rld[i].out = out;
1382 0 : rld[i].rclass = rclass;
1383 0 : rld[i].inmode = inmode;
1384 0 : rld[i].outmode = outmode;
1385 0 : rld[i].reg_rtx = 0;
1386 0 : rld[i].optional = optional;
1387 0 : rld[i].inc = 0;
1388 0 : rld[i].nocombine = 0;
1389 0 : rld[i].in_reg = inloc ? *inloc : 0;
1390 0 : rld[i].out_reg = outloc ? *outloc : 0;
1391 0 : rld[i].opnum = opnum;
1392 0 : rld[i].when_needed = type;
1393 0 : rld[i].secondary_in_reload = secondary_in_reload;
1394 0 : rld[i].secondary_out_reload = secondary_out_reload;
1395 0 : rld[i].secondary_in_icode = secondary_in_icode;
1396 0 : rld[i].secondary_out_icode = secondary_out_icode;
1397 0 : rld[i].secondary_p = 0;
1398 :
1399 0 : n_reloads++;
1400 :
1401 0 : if (out != 0
1402 0 : && (REG_P (out)
1403 0 : || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1404 0 : && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1405 0 : && (targetm.secondary_memory_needed
1406 0 : (outmode, rclass, REGNO_REG_CLASS (reg_or_subregno (out)))))
1407 0 : get_secondary_mem (out, outmode, opnum, type);
1408 : }
1409 : else
1410 : {
1411 : /* We are reusing an existing reload,
1412 : but we may have additional information for it.
1413 : For example, we may now have both IN and OUT
1414 : while the old one may have just one of them. */
1415 :
1416 : /* The modes can be different. If they are, we want to reload in
1417 : the larger mode, so that the value is valid for both modes. */
1418 0 : if (inmode != VOIDmode
1419 0 : && partial_subreg_p (rld[i].inmode, inmode))
1420 0 : rld[i].inmode = inmode;
1421 0 : if (outmode != VOIDmode
1422 0 : && partial_subreg_p (rld[i].outmode, outmode))
1423 0 : rld[i].outmode = outmode;
1424 0 : if (in != 0)
1425 : {
1426 0 : rtx in_reg = inloc ? *inloc : 0;
1427 : /* If we merge reloads for two distinct rtl expressions that
1428 : are identical in content, there might be duplicate address
1429 : reloads. Remove the extra set now, so that if we later find
1430 : that we can inherit this reload, we can get rid of the
1431 : address reloads altogether.
1432 :
1433 : Do not do this if both reloads are optional since the result
1434 : would be an optional reload which could potentially leave
1435 : unresolved address replacements.
1436 :
1437 : It is not sufficient to call transfer_replacements since
1438 : choose_reload_regs will remove the replacements for address
1439 : reloads of inherited reloads which results in the same
1440 : problem. */
1441 0 : if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1442 0 : && ! (rld[i].optional && optional))
1443 : {
1444 : /* We must keep the address reload with the lower operand
1445 : number alive. */
1446 0 : if (opnum > rld[i].opnum)
1447 : {
1448 0 : remove_address_replacements (in);
1449 0 : in = rld[i].in;
1450 0 : in_reg = rld[i].in_reg;
1451 : }
1452 : else
1453 0 : remove_address_replacements (rld[i].in);
1454 : }
1455 : /* When emitting reloads we don't necessarily look at the in-
1456 : and outmode, but also directly at the operands (in and out).
1457 : So we can't simply overwrite them with whatever we have found
1458 : for this (to-be-merged) reload, we have to "merge" that too.
1459 : Reusing another reload already verified that we deal with the
1460 : same operands, just possibly in different modes. So we
1461 : overwrite the operands only when the new mode is larger.
1462 : See also PR33613. */
1463 0 : if (!rld[i].in
1464 0 : || partial_subreg_p (GET_MODE (rld[i].in), GET_MODE (in)))
1465 0 : rld[i].in = in;
1466 0 : if (!rld[i].in_reg
1467 0 : || (in_reg
1468 0 : && partial_subreg_p (GET_MODE (rld[i].in_reg),
1469 0 : GET_MODE (in_reg))))
1470 0 : rld[i].in_reg = in_reg;
1471 : }
1472 0 : if (out != 0)
1473 : {
1474 0 : if (!rld[i].out
1475 0 : || (out
1476 0 : && partial_subreg_p (GET_MODE (rld[i].out),
1477 0 : GET_MODE (out))))
1478 0 : rld[i].out = out;
1479 0 : if (outloc
1480 0 : && (!rld[i].out_reg
1481 0 : || partial_subreg_p (GET_MODE (rld[i].out_reg),
1482 0 : GET_MODE (*outloc))))
1483 0 : rld[i].out_reg = *outloc;
1484 : }
1485 0 : if (reg_class_subset_p (rclass, rld[i].rclass))
1486 0 : rld[i].rclass = rclass;
1487 0 : rld[i].optional &= optional;
1488 0 : if (MERGE_TO_OTHER (type, rld[i].when_needed,
1489 : opnum, rld[i].opnum))
1490 0 : rld[i].when_needed = RELOAD_OTHER;
1491 0 : rld[i].opnum = MIN (rld[i].opnum, opnum);
1492 : }
1493 :
1494 : /* If the ostensible rtx being reloaded differs from the rtx found
1495 : in the location to substitute, this reload is not safe to combine
1496 : because we cannot reliably tell whether it appears in the insn. */
1497 :
1498 0 : if (in != 0 && in != *inloc)
1499 0 : rld[i].nocombine = 1;
1500 :
1501 : /* If we will replace IN and OUT with the reload-reg,
1502 : record where they are located so that substitution need
1503 : not do a tree walk. */
1504 :
1505 0 : if (replace_reloads)
1506 : {
1507 0 : if (inloc != 0)
1508 : {
1509 0 : struct replacement *r = &replacements[n_replacements++];
1510 0 : r->what = i;
1511 0 : r->where = inloc;
1512 0 : r->mode = inmode;
1513 : }
1514 0 : if (outloc != 0 && outloc != inloc)
1515 : {
1516 0 : struct replacement *r = &replacements[n_replacements++];
1517 0 : r->what = i;
1518 0 : r->where = outloc;
1519 0 : r->mode = outmode;
1520 : }
1521 : }
1522 :
1523 : /* If this reload is just being introduced and it has both
1524 : an incoming quantity and an outgoing quantity that are
1525 : supposed to be made to match, see if either one of the two
1526 : can serve as the place to reload into.
1527 :
1528 : If one of them is acceptable, set rld[i].reg_rtx
1529 : to that one. */
1530 :
1531 0 : if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1532 : {
1533 0 : rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1534 : inmode, outmode,
1535 0 : rld[i].rclass, i,
1536 : earlyclobber_operand_p (out));
1537 :
1538 : /* If the outgoing register already contains the same value
1539 : as the incoming one, we can dispense with loading it.
1540 : The easiest way to tell the caller that is to give a phony
1541 : value for the incoming operand (same as outgoing one). */
1542 0 : if (rld[i].reg_rtx == out
1543 0 : && (REG_P (in) || CONSTANT_P (in))
1544 0 : && find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1545 : static_reload_reg_p, i, inmode) != 0)
1546 0 : rld[i].in = out;
1547 : }
1548 :
1549 : /* If this is an input reload and the operand contains a register that
1550 : dies in this insn and is used nowhere else, see if it is the right class
1551 : to be used for this reload. Use it if so. (This occurs most commonly
1552 : in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1553 : this if it is also an output reload that mentions the register unless
1554 : the output is a SUBREG that clobbers an entire register.
1555 :
1556 : Note that the operand might be one of the spill regs, if it is a
1557 : pseudo reg and we are in a block where spilling has not taken place.
1558 : But if there is no spilling in this block, that is OK.
1559 : An explicitly used hard reg cannot be a spill reg. */
1560 :
1561 0 : if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1562 : {
1563 0 : rtx note;
1564 0 : int regno;
1565 0 : machine_mode rel_mode = inmode;
1566 :
1567 0 : if (out && partial_subreg_p (rel_mode, outmode))
1568 : rel_mode = outmode;
1569 :
1570 0 : for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1571 0 : if (REG_NOTE_KIND (note) == REG_DEAD
1572 0 : && REG_P (XEXP (note, 0))
1573 0 : && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1574 0 : && reg_mentioned_p (XEXP (note, 0), in)
1575 : /* Check that a former pseudo is valid; see find_dummy_reload. */
1576 0 : && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1577 0 : || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
1578 0 : ORIGINAL_REGNO (XEXP (note, 0)))
1579 0 : && REG_NREGS (XEXP (note, 0)) == 1))
1580 0 : && ! refers_to_regno_for_reload_p (regno,
1581 : end_hard_regno (rel_mode,
1582 : regno),
1583 0 : PATTERN (this_insn), inloc)
1584 0 : && ! find_reg_fusage (this_insn, USE, XEXP (note, 0))
1585 : /* If this is also an output reload, IN cannot be used as
1586 : the reload register if it is set in this insn unless IN
1587 : is also OUT. */
1588 0 : && (out == 0 || in == out
1589 0 : || ! hard_reg_set_here_p (regno,
1590 : end_hard_regno (rel_mode, regno),
1591 0 : PATTERN (this_insn)))
1592 : /* ??? Why is this code so different from the previous?
1593 : Is there any simple coherent way to describe the two together?
1594 : What's going on here. */
1595 0 : && (in != out
1596 0 : || (GET_CODE (in) == SUBREG
1597 : && (known_equal_after_align_up
1598 0 : (GET_MODE_SIZE (GET_MODE (in)),
1599 0 : GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))),
1600 0 : UNITS_PER_WORD))))
1601 : /* Make sure the operand fits in the reg that dies. */
1602 0 : && known_le (GET_MODE_SIZE (rel_mode),
1603 : GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1604 0 : && targetm.hard_regno_mode_ok (regno, inmode)
1605 0 : && targetm.hard_regno_mode_ok (regno, outmode))
1606 : {
1607 0 : unsigned int offs;
1608 0 : unsigned int nregs = MAX (hard_regno_nregs (regno, inmode),
1609 : hard_regno_nregs (regno, outmode));
1610 :
1611 0 : for (offs = 0; offs < nregs; offs++)
1612 0 : if (fixed_regs[regno + offs]
1613 0 : || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1614 : regno + offs))
1615 : break;
1616 :
1617 0 : if (offs == nregs
1618 0 : && (! (refers_to_regno_for_reload_p
1619 0 : (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1620 0 : || can_reload_into (in, regno, inmode)))
1621 : {
1622 0 : rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1623 0 : break;
1624 : }
1625 : }
1626 : }
1627 :
1628 0 : if (out)
1629 0 : output_reloadnum = i;
1630 :
1631 : return i;
1632 : }
1633 :
1634 : /* Record an additional place we must replace a value
1635 : for which we have already recorded a reload.
1636 : RELOADNUM is the value returned by push_reload
1637 : when the reload was recorded.
1638 : This is used in insn patterns that use match_dup. */
1639 :
1640 : static void
1641 0 : push_replacement (rtx *loc, int reloadnum, machine_mode mode)
1642 : {
1643 0 : if (replace_reloads)
1644 : {
1645 0 : struct replacement *r = &replacements[n_replacements++];
1646 0 : r->what = reloadnum;
1647 0 : r->where = loc;
1648 0 : r->mode = mode;
1649 : }
1650 0 : }
1651 :
1652 : /* Duplicate any replacement we have recorded to apply at
1653 : location ORIG_LOC to also be performed at DUP_LOC.
1654 : This is used in insn patterns that use match_dup. */
1655 :
1656 : static void
1657 0 : dup_replacements (rtx *dup_loc, rtx *orig_loc)
1658 : {
1659 0 : int i, n = n_replacements;
1660 :
1661 0 : for (i = 0; i < n; i++)
1662 : {
1663 0 : struct replacement *r = &replacements[i];
1664 0 : if (r->where == orig_loc)
1665 0 : push_replacement (dup_loc, r->what, r->mode);
1666 : }
1667 0 : }
1668 :
1669 : /* Transfer all replacements that used to be in reload FROM to be in
1670 : reload TO. */
1671 :
1672 : void
1673 0 : transfer_replacements (int to, int from)
1674 : {
1675 0 : int i;
1676 :
1677 0 : for (i = 0; i < n_replacements; i++)
1678 0 : if (replacements[i].what == from)
1679 0 : replacements[i].what = to;
1680 0 : }
1681 :
1682 : /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1683 : or a subpart of it. If we have any replacements registered for IN_RTX,
1684 : cancel the reloads that were supposed to load them.
1685 : Return nonzero if we canceled any reloads. */
1686 : int
1687 0 : remove_address_replacements (rtx in_rtx)
1688 : {
1689 0 : int i, j;
1690 0 : char reload_flags[MAX_RELOADS];
1691 0 : int something_changed = 0;
1692 :
1693 0 : memset (reload_flags, 0, sizeof reload_flags);
1694 0 : for (i = 0, j = 0; i < n_replacements; i++)
1695 : {
1696 0 : if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1697 0 : reload_flags[replacements[i].what] |= 1;
1698 : else
1699 : {
1700 0 : replacements[j++] = replacements[i];
1701 0 : reload_flags[replacements[i].what] |= 2;
1702 : }
1703 : }
1704 : /* Note that the following store must be done before the recursive calls. */
1705 0 : n_replacements = j;
1706 :
1707 0 : for (i = n_reloads - 1; i >= 0; i--)
1708 : {
1709 0 : if (reload_flags[i] == 1)
1710 : {
1711 0 : deallocate_reload_reg (i);
1712 0 : remove_address_replacements (rld[i].in);
1713 0 : rld[i].in = 0;
1714 0 : something_changed = 1;
1715 : }
1716 : }
1717 0 : return something_changed;
1718 : }
1719 :
1720 : /* If there is only one output reload, and it is not for an earlyclobber
1721 : operand, try to combine it with a (logically unrelated) input reload
1722 : to reduce the number of reload registers needed.
1723 :
1724 : This is safe if the input reload does not appear in
1725 : the value being output-reloaded, because this implies
1726 : it is not needed any more once the original insn completes.
1727 :
1728 : If that doesn't work, see we can use any of the registers that
1729 : die in this insn as a reload register. We can if it is of the right
1730 : class and does not appear in the value being output-reloaded. */
1731 :
1732 : static void
1733 0 : combine_reloads (void)
1734 : {
1735 0 : int i, regno;
1736 0 : int output_reload = -1;
1737 0 : int secondary_out = -1;
1738 0 : rtx note;
1739 :
1740 : /* Find the output reload; return unless there is exactly one
1741 : and that one is mandatory. */
1742 :
1743 0 : for (i = 0; i < n_reloads; i++)
1744 0 : if (rld[i].out != 0)
1745 : {
1746 0 : if (output_reload >= 0)
1747 : return;
1748 : output_reload = i;
1749 : }
1750 :
1751 0 : if (output_reload < 0 || rld[output_reload].optional)
1752 : return;
1753 :
1754 : /* An input-output reload isn't combinable. */
1755 :
1756 0 : if (rld[output_reload].in != 0)
1757 : return;
1758 :
1759 : /* If this reload is for an earlyclobber operand, we can't do anything. */
1760 0 : if (earlyclobber_operand_p (rld[output_reload].out))
1761 : return;
1762 :
1763 : /* If there is a reload for part of the address of this operand, we would
1764 : need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1765 : its life to the point where doing this combine would not lower the
1766 : number of spill registers needed. */
1767 0 : for (i = 0; i < n_reloads; i++)
1768 0 : if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1769 0 : || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1770 0 : && rld[i].opnum == rld[output_reload].opnum)
1771 : return;
1772 :
1773 : /* Check each input reload; can we combine it? */
1774 :
1775 0 : for (i = 0; i < n_reloads; i++)
1776 0 : if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1777 : /* Life span of this reload must not extend past main insn. */
1778 0 : && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1779 : && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1780 : && rld[i].when_needed != RELOAD_OTHER
1781 0 : && (ira_reg_class_max_nregs [(int)rld[i].rclass][(int) rld[i].inmode]
1782 0 : == ira_reg_class_max_nregs [(int) rld[output_reload].rclass]
1783 0 : [(int) rld[output_reload].outmode])
1784 0 : && known_eq (rld[i].inc, 0)
1785 0 : && rld[i].reg_rtx == 0
1786 : /* Don't combine two reloads with different secondary
1787 : memory locations. */
1788 0 : && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1789 0 : || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1790 0 : || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1791 : secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1792 0 : && (targetm.small_register_classes_for_mode_p (VOIDmode)
1793 0 : ? (rld[i].rclass == rld[output_reload].rclass)
1794 0 : : (reg_class_subset_p (rld[i].rclass,
1795 0 : rld[output_reload].rclass)
1796 0 : || reg_class_subset_p (rld[output_reload].rclass,
1797 0 : rld[i].rclass)))
1798 0 : && (MATCHES (rld[i].in, rld[output_reload].out)
1799 : /* Args reversed because the first arg seems to be
1800 : the one that we imagine being modified
1801 : while the second is the one that might be affected. */
1802 0 : || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1803 : rld[i].in)
1804 : /* However, if the input is a register that appears inside
1805 : the output, then we also can't share.
1806 : Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1807 : If the same reload reg is used for both reg 69 and the
1808 : result to be stored in memory, then that result
1809 : will clobber the address of the memory ref. */
1810 0 : && ! (REG_P (rld[i].in)
1811 0 : && reg_overlap_mentioned_for_reload_p (rld[i].in,
1812 : rld[output_reload].out))))
1813 0 : && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1814 0 : rld[i].when_needed != RELOAD_FOR_INPUT)
1815 0 : && (reg_class_size[(int) rld[i].rclass]
1816 0 : || targetm.small_register_classes_for_mode_p (VOIDmode))
1817 : /* We will allow making things slightly worse by combining an
1818 : input and an output, but no worse than that. */
1819 0 : && (rld[i].when_needed == RELOAD_FOR_INPUT
1820 : || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1821 : {
1822 0 : int j;
1823 :
1824 : /* We have found a reload to combine with! */
1825 0 : rld[i].out = rld[output_reload].out;
1826 0 : rld[i].out_reg = rld[output_reload].out_reg;
1827 0 : rld[i].outmode = rld[output_reload].outmode;
1828 : /* Mark the old output reload as inoperative. */
1829 0 : rld[output_reload].out = 0;
1830 : /* The combined reload is needed for the entire insn. */
1831 0 : rld[i].when_needed = RELOAD_OTHER;
1832 : /* If the output reload had a secondary reload, copy it. */
1833 0 : if (rld[output_reload].secondary_out_reload != -1)
1834 : {
1835 0 : rld[i].secondary_out_reload
1836 0 : = rld[output_reload].secondary_out_reload;
1837 0 : rld[i].secondary_out_icode
1838 0 : = rld[output_reload].secondary_out_icode;
1839 : }
1840 :
1841 : /* Copy any secondary MEM. */
1842 0 : if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1843 0 : secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1844 0 : = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1845 : /* If required, minimize the register class. */
1846 0 : if (reg_class_subset_p (rld[output_reload].rclass,
1847 0 : rld[i].rclass))
1848 0 : rld[i].rclass = rld[output_reload].rclass;
1849 :
1850 : /* Transfer all replacements from the old reload to the combined. */
1851 0 : for (j = 0; j < n_replacements; j++)
1852 0 : if (replacements[j].what == output_reload)
1853 0 : replacements[j].what = i;
1854 :
1855 : return;
1856 : }
1857 :
1858 : /* If this insn has only one operand that is modified or written (assumed
1859 : to be the first), it must be the one corresponding to this reload. It
1860 : is safe to use anything that dies in this insn for that output provided
1861 : that it does not occur in the output (we already know it isn't an
1862 : earlyclobber. If this is an asm insn, give up. */
1863 :
1864 0 : if (INSN_CODE (this_insn) == -1)
1865 : return;
1866 :
1867 0 : for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1868 0 : if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1869 0 : || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1870 : return;
1871 :
1872 : /* See if some hard register that dies in this insn and is not used in
1873 : the output is the right class. Only works if the register we pick
1874 : up can fully hold our output reload. */
1875 0 : for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1876 0 : if (REG_NOTE_KIND (note) == REG_DEAD
1877 0 : && REG_P (XEXP (note, 0))
1878 0 : && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1879 : rld[output_reload].out)
1880 0 : && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1881 0 : && targetm.hard_regno_mode_ok (regno, rld[output_reload].outmode)
1882 0 : && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1883 : regno)
1884 0 : && (hard_regno_nregs (regno, rld[output_reload].outmode)
1885 0 : <= REG_NREGS (XEXP (note, 0)))
1886 : /* Ensure that a secondary or tertiary reload for this output
1887 : won't want this register. */
1888 0 : && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1889 0 : || (!(TEST_HARD_REG_BIT
1890 0 : (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1891 0 : && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1892 0 : || !(TEST_HARD_REG_BIT
1893 0 : (reg_class_contents[(int) rld[secondary_out].rclass],
1894 : regno)))))
1895 0 : && !fixed_regs[regno]
1896 : /* Check that a former pseudo is valid; see find_dummy_reload. */
1897 0 : && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1898 0 : || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
1899 0 : ORIGINAL_REGNO (XEXP (note, 0)))
1900 0 : && REG_NREGS (XEXP (note, 0)) == 1)))
1901 : {
1902 0 : rld[output_reload].reg_rtx
1903 0 : = gen_rtx_REG (rld[output_reload].outmode, regno);
1904 0 : return;
1905 : }
1906 : }
1907 :
1908 : /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1909 : See if one of IN and OUT is a register that may be used;
1910 : this is desirable since a spill-register won't be needed.
1911 : If so, return the register rtx that proves acceptable.
1912 :
1913 : INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1914 : RCLASS is the register class required for the reload.
1915 :
1916 : If FOR_REAL is >= 0, it is the number of the reload,
1917 : and in some cases when it can be discovered that OUT doesn't need
1918 : to be computed, clear out rld[FOR_REAL].out.
1919 :
1920 : If FOR_REAL is -1, this should not be done, because this call
1921 : is just to see if a register can be found, not to find and install it.
1922 :
1923 : EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1924 : puts an additional constraint on being able to use IN for OUT since
1925 : IN must not appear elsewhere in the insn (it is assumed that IN itself
1926 : is safe from the earlyclobber). */
1927 :
1928 : static rtx
1929 0 : find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1930 : machine_mode inmode, machine_mode outmode,
1931 : reg_class_t rclass, int for_real, int earlyclobber)
1932 : {
1933 0 : rtx in = real_in;
1934 0 : rtx out = real_out;
1935 0 : int in_offset = 0;
1936 0 : int out_offset = 0;
1937 0 : rtx value = 0;
1938 :
1939 : /* If operands exceed a word, we can't use either of them
1940 : unless they have the same size. */
1941 0 : if (maybe_ne (GET_MODE_SIZE (outmode), GET_MODE_SIZE (inmode))
1942 0 : && (maybe_gt (GET_MODE_SIZE (outmode), UNITS_PER_WORD)
1943 0 : || maybe_gt (GET_MODE_SIZE (inmode), UNITS_PER_WORD)))
1944 : return 0;
1945 :
1946 : /* Note that {in,out}_offset are needed only when 'in' or 'out'
1947 : respectively refers to a hard register. */
1948 :
1949 : /* Find the inside of any subregs. */
1950 0 : while (GET_CODE (out) == SUBREG)
1951 : {
1952 0 : if (REG_P (SUBREG_REG (out))
1953 0 : && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1954 0 : out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1955 0 : GET_MODE (SUBREG_REG (out)),
1956 0 : SUBREG_BYTE (out),
1957 0 : GET_MODE (out));
1958 0 : out = SUBREG_REG (out);
1959 : }
1960 0 : while (GET_CODE (in) == SUBREG)
1961 : {
1962 0 : if (REG_P (SUBREG_REG (in))
1963 0 : && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1964 0 : in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1965 0 : GET_MODE (SUBREG_REG (in)),
1966 0 : SUBREG_BYTE (in),
1967 0 : GET_MODE (in));
1968 0 : in = SUBREG_REG (in);
1969 : }
1970 :
1971 : /* Narrow down the reg class, the same way push_reload will;
1972 : otherwise we might find a dummy now, but push_reload won't. */
1973 0 : {
1974 0 : reg_class_t preferred_class = targetm.preferred_reload_class (in, rclass);
1975 0 : if (preferred_class != NO_REGS)
1976 0 : rclass = (enum reg_class) preferred_class;
1977 : }
1978 :
1979 : /* See if OUT will do. */
1980 0 : if (REG_P (out)
1981 0 : && REGNO (out) < FIRST_PSEUDO_REGISTER)
1982 : {
1983 0 : unsigned int regno = REGNO (out) + out_offset;
1984 0 : unsigned int nwords = hard_regno_nregs (regno, outmode);
1985 0 : rtx saved_rtx;
1986 :
1987 : /* When we consider whether the insn uses OUT,
1988 : ignore references within IN. They don't prevent us
1989 : from copying IN into OUT, because those refs would
1990 : move into the insn that reloads IN.
1991 :
1992 : However, we only ignore IN in its role as this reload.
1993 : If the insn uses IN elsewhere and it contains OUT,
1994 : that counts. We can't be sure it's the "same" operand
1995 : so it might not go through this reload.
1996 :
1997 : We also need to avoid using OUT if it, or part of it, is a
1998 : fixed register. Modifying such registers, even transiently,
1999 : may have undefined effects on the machine, such as modifying
2000 : the stack pointer. */
2001 0 : saved_rtx = *inloc;
2002 0 : *inloc = const0_rtx;
2003 :
2004 0 : if (regno < FIRST_PSEUDO_REGISTER
2005 0 : && targetm.hard_regno_mode_ok (regno, outmode)
2006 0 : && ! refers_to_regno_for_reload_p (regno, regno + nwords,
2007 0 : PATTERN (this_insn), outloc))
2008 : {
2009 : unsigned int i;
2010 :
2011 0 : for (i = 0; i < nwords; i++)
2012 0 : if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2013 : regno + i)
2014 0 : || fixed_regs[regno + i])
2015 : break;
2016 :
2017 0 : if (i == nwords)
2018 : {
2019 0 : if (REG_P (real_out))
2020 : value = real_out;
2021 : else
2022 0 : value = gen_rtx_REG (outmode, regno);
2023 : }
2024 : }
2025 :
2026 0 : *inloc = saved_rtx;
2027 : }
2028 :
2029 : /* Consider using IN if OUT was not acceptable
2030 : or if OUT dies in this insn (like the quotient in a divmod insn).
2031 : We can't use IN unless it is dies in this insn,
2032 : which means we must know accurately which hard regs are live.
2033 : Also, the result can't go in IN if IN is used within OUT,
2034 : or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2035 0 : if (hard_regs_live_known
2036 0 : && REG_P (in)
2037 0 : && REGNO (in) < FIRST_PSEUDO_REGISTER
2038 0 : && (value == 0
2039 0 : || find_reg_note (this_insn, REG_UNUSED, real_out))
2040 0 : && find_reg_note (this_insn, REG_DEAD, real_in)
2041 0 : && !fixed_regs[REGNO (in)]
2042 0 : && targetm.hard_regno_mode_ok (REGNO (in),
2043 : /* The only case where out and real_out
2044 : might have different modes is where
2045 : real_out is a subreg, and in that
2046 : case, out has a real mode. */
2047 0 : (GET_MODE (out) != VOIDmode
2048 : ? GET_MODE (out) : outmode))
2049 0 : && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2050 : /* However only do this if we can be sure that this input
2051 : operand doesn't correspond with an uninitialized pseudo.
2052 : global can assign some hardreg to it that is the same as
2053 : the one assigned to a different, also live pseudo (as it
2054 : can ignore the conflict). We must never introduce writes
2055 : to such hardregs, as they would clobber the other live
2056 : pseudo. See PR 20973. */
2057 0 : || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
2058 0 : ORIGINAL_REGNO (in))
2059 : /* Similarly, only do this if we can be sure that the death
2060 : note is still valid. global can assign some hardreg to
2061 : the pseudo referenced in the note and simultaneously a
2062 : subword of this hardreg to a different, also live pseudo,
2063 : because only another subword of the hardreg is actually
2064 : used in the insn. This cannot happen if the pseudo has
2065 : been assigned exactly one hardreg. See PR 33732. */
2066 0 : && REG_NREGS (in) == 1)))
2067 : {
2068 0 : unsigned int regno = REGNO (in) + in_offset;
2069 0 : unsigned int nwords = hard_regno_nregs (regno, inmode);
2070 :
2071 0 : if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2072 0 : && ! hard_reg_set_here_p (regno, regno + nwords,
2073 0 : PATTERN (this_insn))
2074 0 : && (! earlyclobber
2075 0 : || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2076 0 : PATTERN (this_insn), inloc)))
2077 : {
2078 : unsigned int i;
2079 :
2080 0 : for (i = 0; i < nwords; i++)
2081 0 : if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2082 : regno + i))
2083 : break;
2084 :
2085 0 : if (i == nwords)
2086 : {
2087 : /* If we were going to use OUT as the reload reg
2088 : and changed our mind, it means OUT is a dummy that
2089 : dies here. So don't bother copying value to it. */
2090 0 : if (for_real >= 0 && value == real_out)
2091 0 : rld[for_real].out = 0;
2092 0 : if (REG_P (real_in))
2093 : value = real_in;
2094 : else
2095 0 : value = gen_rtx_REG (inmode, regno);
2096 : }
2097 : }
2098 : }
2099 :
2100 : return value;
2101 : }
2102 :
2103 : /* This page contains subroutines used mainly for determining
2104 : whether the IN or an OUT of a reload can serve as the
2105 : reload register. */
2106 :
2107 : /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2108 :
2109 : int
2110 0 : earlyclobber_operand_p (rtx x)
2111 : {
2112 0 : int i;
2113 :
2114 0 : for (i = 0; i < n_earlyclobbers; i++)
2115 0 : if (reload_earlyclobbers[i] == x)
2116 : return 1;
2117 :
2118 : return 0;
2119 : }
2120 :
2121 : /* Return 1 if expression X alters a hard reg in the range
2122 : from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2123 : either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2124 : X should be the body of an instruction. */
2125 :
2126 : static int
2127 0 : hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2128 : {
2129 0 : if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2130 : {
2131 0 : rtx op0 = SET_DEST (x);
2132 :
2133 0 : while (GET_CODE (op0) == SUBREG)
2134 0 : op0 = SUBREG_REG (op0);
2135 0 : if (REG_P (op0))
2136 : {
2137 0 : unsigned int r = REGNO (op0);
2138 :
2139 : /* See if this reg overlaps range under consideration. */
2140 0 : if (r < end_regno
2141 0 : && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2142 0 : return 1;
2143 : }
2144 : }
2145 0 : else if (GET_CODE (x) == PARALLEL)
2146 : {
2147 0 : int i = XVECLEN (x, 0) - 1;
2148 :
2149 0 : for (; i >= 0; i--)
2150 0 : if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2151 : return 1;
2152 : }
2153 :
2154 : return 0;
2155 : }
2156 :
2157 : /* Return true if ADDR is a valid memory address for mode MODE
2158 : in address space AS, and check that each pseudo reg has the
2159 : proper kind of hard reg. */
2160 :
2161 : bool
2162 4500038 : strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED,
2163 : rtx addr, addr_space_t as, code_helper)
2164 : {
2165 : #ifdef GO_IF_LEGITIMATE_ADDRESS
2166 : gcc_assert (ADDR_SPACE_GENERIC_P (as));
2167 : GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2168 : return false;
2169 :
2170 : win:
2171 : return true;
2172 : #else
2173 4500038 : return targetm.addr_space.legitimate_address_p (mode, addr, 1, as,
2174 4500038 : ERROR_MARK);
2175 : #endif
2176 : }
2177 :
2178 : /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2179 : if they are the same hard reg, and has special hacks for
2180 : autoincrement and autodecrement.
2181 : This is specifically intended for find_reloads to use
2182 : in determining whether two operands match.
2183 : X is the operand whose number is the lower of the two.
2184 :
2185 : The value is 2 if Y contains a pre-increment that matches
2186 : a non-incrementing address in X. */
2187 :
2188 : /* ??? To be completely correct, we should arrange to pass
2189 : for X the output operand and for Y the input operand.
2190 : For now, we assume that the output operand has the lower number
2191 : because that is natural in (SET output (... input ...)). */
2192 :
2193 : int
2194 201488859 : operands_match_p (rtx x, rtx y)
2195 : {
2196 201488859 : int i;
2197 201488859 : RTX_CODE code = GET_CODE (x);
2198 201488859 : const char *fmt;
2199 201488859 : int success_2;
2200 :
2201 201488859 : if (x == y)
2202 : return 1;
2203 93614483 : if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2204 86520124 : && (REG_P (y) || (GET_CODE (y) == SUBREG
2205 265926 : && REG_P (SUBREG_REG (y)))))
2206 : {
2207 79649820 : int j;
2208 :
2209 79649820 : if (code == SUBREG)
2210 : {
2211 160 : i = REGNO (SUBREG_REG (x));
2212 160 : if (i >= FIRST_PSEUDO_REGISTER
2213 266 : || simplify_subreg_regno (REGNO (SUBREG_REG (x)),
2214 106 : GET_MODE (SUBREG_REG (x)),
2215 106 : SUBREG_BYTE (x),
2216 106 : GET_MODE (x)) == -1)
2217 160 : goto slow;
2218 0 : i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2219 0 : GET_MODE (SUBREG_REG (x)),
2220 0 : SUBREG_BYTE (x),
2221 0 : GET_MODE (x));
2222 : }
2223 : else
2224 79649660 : i = REGNO (x);
2225 :
2226 79649660 : if (GET_CODE (y) == SUBREG)
2227 : {
2228 265926 : j = REGNO (SUBREG_REG (y));
2229 265926 : if (j >= FIRST_PSEUDO_REGISTER
2230 266090 : || simplify_subreg_regno (REGNO (SUBREG_REG (y)),
2231 164 : GET_MODE (SUBREG_REG (y)),
2232 164 : SUBREG_BYTE (y),
2233 164 : GET_MODE (y)) == -1)
2234 265762 : goto slow;
2235 164 : j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2236 164 : GET_MODE (SUBREG_REG (y)),
2237 164 : SUBREG_BYTE (y),
2238 164 : GET_MODE (y));
2239 : }
2240 : else
2241 79383734 : j = REGNO (y);
2242 :
2243 : /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2244 : multiple hard register group of scalar integer registers, so that
2245 : for example (reg:DI 0) and (reg:SI 1) will be considered the same
2246 : register. */
2247 79383898 : scalar_int_mode xmode;
2248 79383898 : if (REG_WORDS_BIG_ENDIAN
2249 : && is_a <scalar_int_mode> (GET_MODE (x), &xmode)
2250 : && GET_MODE_SIZE (xmode) > UNITS_PER_WORD
2251 : && i < FIRST_PSEUDO_REGISTER)
2252 : i += hard_regno_nregs (i, xmode) - 1;
2253 79383898 : scalar_int_mode ymode;
2254 79383898 : if (REG_WORDS_BIG_ENDIAN
2255 : && is_a <scalar_int_mode> (GET_MODE (y), &ymode)
2256 : && GET_MODE_SIZE (ymode) > UNITS_PER_WORD
2257 : && j < FIRST_PSEUDO_REGISTER)
2258 : j += hard_regno_nregs (j, ymode) - 1;
2259 :
2260 79383898 : return i == j;
2261 : }
2262 : /* If two operands must match, because they are really a single
2263 : operand of an assembler insn, then two postincrements are invalid
2264 : because the assembler insn would increment only once.
2265 : On the other hand, a postincrement matches ordinary indexing
2266 : if the postincrement is the output operand. */
2267 13964663 : if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2268 0 : return operands_match_p (XEXP (x, 0), y);
2269 : /* Two preincrements are invalid
2270 : because the assembler insn would increment only once.
2271 : On the other hand, a preincrement matches ordinary indexing
2272 : if the preincrement is the input operand.
2273 : In this case, return 2, since some callers need to do special
2274 : things when this happens. */
2275 13964663 : if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2276 13964663 : || GET_CODE (y) == PRE_MODIFY)
2277 0 : return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2278 :
2279 13964663 : slow:
2280 :
2281 : /* Now we have disposed of all the cases in which different rtx codes
2282 : can match. */
2283 14230585 : if (code != GET_CODE (y))
2284 : return 0;
2285 :
2286 : /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2287 7045135 : if (GET_MODE (x) != GET_MODE (y))
2288 : return 0;
2289 :
2290 : /* MEMs referring to different address space are not equivalent. */
2291 10923758 : if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2292 : return 0;
2293 :
2294 7044567 : switch (code)
2295 : {
2296 : CASE_CONST_UNIQUE:
2297 : return 0;
2298 :
2299 : case CONST_VECTOR:
2300 : if (!same_vector_encodings_p (x, y))
2301 : return false;
2302 : break;
2303 :
2304 0 : case LABEL_REF:
2305 0 : return label_ref_label (x) == label_ref_label (y);
2306 12 : case SYMBOL_REF:
2307 12 : return XSTR (x, 0) == XSTR (y, 0);
2308 :
2309 : default:
2310 : break;
2311 : }
2312 :
2313 : /* Compare the elements. If any pair of corresponding elements
2314 : fail to match, return 0 for the whole things. */
2315 :
2316 7044054 : success_2 = 0;
2317 7044054 : fmt = GET_RTX_FORMAT (code);
2318 21009350 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2319 : {
2320 13966632 : int val, j;
2321 13966632 : switch (fmt[i])
2322 : {
2323 0 : case 'w':
2324 0 : if (XWINT (x, i) != XWINT (y, i))
2325 : return 0;
2326 : break;
2327 :
2328 4470 : case 'i':
2329 4470 : if (XINT (x, i) != XINT (y, i))
2330 : return 0;
2331 : break;
2332 :
2333 0 : case 'L':
2334 0 : if (XLOC (x, i) != XLOC (y, i))
2335 : return 0;
2336 : break;
2337 :
2338 0 : case 'p':
2339 0 : if (maybe_ne (SUBREG_BYTE (x), SUBREG_BYTE (y)))
2340 : return 0;
2341 : break;
2342 :
2343 10082307 : case 'e':
2344 10082307 : val = operands_match_p (XEXP (x, i), XEXP (y, i));
2345 10082307 : if (val == 0)
2346 : return 0;
2347 : /* If any subexpression returns 2,
2348 : we should return 2 if we are successful. */
2349 10080971 : if (val == 2)
2350 13965296 : success_2 = 1;
2351 : break;
2352 :
2353 : case '0':
2354 : break;
2355 :
2356 4470 : case 'E':
2357 4470 : if (XVECLEN (x, i) != XVECLEN (y, i))
2358 : return 0;
2359 8940 : for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2360 : {
2361 4470 : val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2362 4470 : if (val == 0)
2363 : return 0;
2364 4470 : if (val == 2)
2365 0 : success_2 = 1;
2366 : }
2367 : break;
2368 :
2369 : /* It is believed that rtx's at this level will never
2370 : contain anything but integers and other rtx's,
2371 : except for within LABEL_REFs and SYMBOL_REFs. */
2372 0 : default:
2373 0 : gcc_unreachable ();
2374 : }
2375 : }
2376 7042718 : return 1 + success_2;
2377 : }
2378 :
2379 : /* Describe the range of registers or memory referenced by X.
2380 : If X is a register, set REG_FLAG and put the first register
2381 : number into START and the last plus one into END.
2382 : If X is a memory reference, put a base address into BASE
2383 : and a range of integer offsets into START and END.
2384 : If X is pushing on the stack, we can assume it causes no trouble,
2385 : so we set the SAFE field. */
2386 :
2387 : static struct decomposition
2388 746454 : decompose (rtx x)
2389 : {
2390 746454 : struct decomposition val;
2391 746454 : int all_const = 0, regno;
2392 :
2393 746454 : memset (&val, 0, sizeof (val));
2394 :
2395 746454 : switch (GET_CODE (x))
2396 : {
2397 0 : case MEM:
2398 0 : {
2399 0 : rtx base = NULL_RTX, offset = 0;
2400 0 : rtx addr = XEXP (x, 0);
2401 :
2402 0 : if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2403 0 : || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2404 : {
2405 0 : val.base = XEXP (addr, 0);
2406 0 : val.start = -GET_MODE_SIZE (GET_MODE (x));
2407 0 : val.end = GET_MODE_SIZE (GET_MODE (x));
2408 0 : val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2409 0 : return val;
2410 : }
2411 :
2412 0 : if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2413 : {
2414 0 : if (GET_CODE (XEXP (addr, 1)) == PLUS
2415 0 : && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2416 0 : && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2417 : {
2418 0 : val.base = XEXP (addr, 0);
2419 0 : val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2420 0 : val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2421 0 : val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2422 0 : return val;
2423 : }
2424 : }
2425 :
2426 0 : if (GET_CODE (addr) == CONST)
2427 : {
2428 0 : addr = XEXP (addr, 0);
2429 0 : all_const = 1;
2430 : }
2431 0 : if (GET_CODE (addr) == PLUS)
2432 : {
2433 0 : if (CONSTANT_P (XEXP (addr, 0)))
2434 : {
2435 0 : base = XEXP (addr, 1);
2436 0 : offset = XEXP (addr, 0);
2437 : }
2438 0 : else if (CONSTANT_P (XEXP (addr, 1)))
2439 : {
2440 : base = XEXP (addr, 0);
2441 : offset = XEXP (addr, 1);
2442 : }
2443 : }
2444 :
2445 : if (offset == 0)
2446 : {
2447 0 : base = addr;
2448 0 : offset = const0_rtx;
2449 : }
2450 0 : if (GET_CODE (offset) == CONST)
2451 0 : offset = XEXP (offset, 0);
2452 0 : if (GET_CODE (offset) == PLUS)
2453 : {
2454 0 : if (CONST_INT_P (XEXP (offset, 0)))
2455 : {
2456 0 : base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2457 0 : offset = XEXP (offset, 0);
2458 : }
2459 0 : else if (CONST_INT_P (XEXP (offset, 1)))
2460 : {
2461 0 : base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2462 0 : offset = XEXP (offset, 1);
2463 : }
2464 : else
2465 : {
2466 0 : base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2467 0 : offset = const0_rtx;
2468 : }
2469 : }
2470 0 : else if (!CONST_INT_P (offset))
2471 : {
2472 0 : base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2473 0 : offset = const0_rtx;
2474 : }
2475 :
2476 0 : if (all_const && GET_CODE (base) == PLUS)
2477 0 : base = gen_rtx_CONST (GET_MODE (base), base);
2478 :
2479 0 : gcc_assert (CONST_INT_P (offset));
2480 :
2481 0 : val.start = INTVAL (offset);
2482 0 : val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2483 0 : val.base = base;
2484 : }
2485 0 : break;
2486 :
2487 746454 : case REG:
2488 746454 : val.reg_flag = 1;
2489 746454 : regno = true_regnum (x);
2490 746454 : if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)
2491 : {
2492 : /* A pseudo with no hard reg. */
2493 0 : val.start = REGNO (x);
2494 0 : val.end = val.start + 1;
2495 : }
2496 : else
2497 : {
2498 : /* A hard reg. */
2499 746454 : val.start = regno;
2500 746454 : val.end = end_hard_regno (GET_MODE (x), regno);
2501 : }
2502 : break;
2503 :
2504 0 : case SUBREG:
2505 0 : if (!REG_P (SUBREG_REG (x)))
2506 : /* This could be more precise, but it's good enough. */
2507 : return decompose (SUBREG_REG (x));
2508 0 : regno = true_regnum (x);
2509 0 : if (regno < 0 || regno >= FIRST_PSEUDO_REGISTER)
2510 0 : return decompose (SUBREG_REG (x));
2511 :
2512 : /* A hard reg. */
2513 0 : val.reg_flag = 1;
2514 0 : val.start = regno;
2515 0 : val.end = regno + subreg_nregs (x);
2516 0 : break;
2517 :
2518 0 : case SCRATCH:
2519 : /* This hasn't been assigned yet, so it can't conflict yet. */
2520 0 : val.safe = 1;
2521 0 : break;
2522 :
2523 0 : default:
2524 0 : gcc_assert (CONSTANT_P (x));
2525 0 : val.safe = 1;
2526 0 : break;
2527 : }
2528 746454 : return val;
2529 : }
2530 :
2531 : /* Return 1 if altering Y will not modify the value of X.
2532 : Y is also described by YDATA, which should be decompose (Y). */
2533 :
2534 : static int
2535 746454 : immune_p (rtx x, rtx y, struct decomposition ydata)
2536 : {
2537 746454 : struct decomposition xdata;
2538 :
2539 746454 : if (ydata.reg_flag)
2540 : /* In this case the decomposition structure contains register
2541 : numbers rather than byte offsets. */
2542 1492908 : return !refers_to_regno_for_reload_p (ydata.start.to_constant (),
2543 746454 : ydata.end.to_constant (),
2544 746454 : x, (rtx *) 0);
2545 0 : if (ydata.safe)
2546 : return 1;
2547 :
2548 0 : gcc_assert (MEM_P (y));
2549 : /* If Y is memory and X is not, Y can't affect X. */
2550 0 : if (!MEM_P (x))
2551 : return 1;
2552 :
2553 0 : xdata = decompose (x);
2554 :
2555 0 : if (! rtx_equal_p (xdata.base, ydata.base))
2556 : {
2557 : /* If bases are distinct symbolic constants, there is no overlap. */
2558 0 : if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2559 : return 1;
2560 : /* Constants and stack slots never overlap. */
2561 0 : if (CONSTANT_P (xdata.base)
2562 0 : && (ydata.base == frame_pointer_rtx
2563 0 : || ydata.base == hard_frame_pointer_rtx
2564 0 : || ydata.base == stack_pointer_rtx))
2565 : return 1;
2566 0 : if (CONSTANT_P (ydata.base)
2567 0 : && (xdata.base == frame_pointer_rtx
2568 0 : || xdata.base == hard_frame_pointer_rtx
2569 0 : || xdata.base == stack_pointer_rtx))
2570 : return 1;
2571 : /* If either base is variable, we don't know anything. */
2572 0 : return 0;
2573 : }
2574 :
2575 0 : return known_ge (xdata.start, ydata.end) || known_ge (ydata.start, xdata.end);
2576 : }
2577 :
2578 : /* Similar, but calls decompose. */
2579 :
2580 : int
2581 746454 : safe_from_earlyclobber (rtx op, rtx clobber)
2582 : {
2583 746454 : struct decomposition early_data;
2584 :
2585 746454 : early_data = decompose (clobber);
2586 746454 : return immune_p (op, clobber, early_data);
2587 : }
2588 :
2589 : /* Main entry point of this file: search the body of INSN
2590 : for values that need reloading and record them with push_reload.
2591 : REPLACE nonzero means record also where the values occur
2592 : so that subst_reloads can be used.
2593 :
2594 : IND_LEVELS says how many levels of indirection are supported by this
2595 : machine; a value of zero means that a memory reference is not a valid
2596 : memory address.
2597 :
2598 : LIVE_KNOWN says we have valid information about which hard
2599 : regs are live at each point in the program; this is true when
2600 : we are called from global_alloc but false when stupid register
2601 : allocation has been done.
2602 :
2603 : RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2604 : which is nonnegative if the reg has been commandeered for reloading into.
2605 : It is copied into STATIC_RELOAD_REG_P and referenced from there
2606 : by various subroutines.
2607 :
2608 : Return TRUE if some operands need to be changed, because of swapping
2609 : commutative operands, reg_equiv_address substitution, or whatever. */
2610 :
2611 : int
2612 0 : find_reloads (rtx_insn *insn, int replace, int ind_levels, int live_known,
2613 : short *reload_reg_p)
2614 : {
2615 0 : int insn_code_number;
2616 0 : int i, j;
2617 0 : int noperands;
2618 : /* These start out as the constraints for the insn
2619 : and they are chewed up as we consider alternatives. */
2620 0 : const char *constraints[MAX_RECOG_OPERANDS];
2621 : /* These are the preferred classes for an operand, or NO_REGS if it isn't
2622 : a register. */
2623 0 : enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2624 0 : char pref_or_nothing[MAX_RECOG_OPERANDS];
2625 : /* Nonzero for a MEM operand whose entire address needs a reload.
2626 : May be -1 to indicate the entire address may or may not need a reload. */
2627 0 : int address_reloaded[MAX_RECOG_OPERANDS];
2628 : /* Nonzero for an address operand that needs to be completely reloaded.
2629 : May be -1 to indicate the entire operand may or may not need a reload. */
2630 0 : int address_operand_reloaded[MAX_RECOG_OPERANDS];
2631 : /* Value of enum reload_type to use for operand. */
2632 0 : enum reload_type operand_type[MAX_RECOG_OPERANDS];
2633 : /* Value of enum reload_type to use within address of operand. */
2634 0 : enum reload_type address_type[MAX_RECOG_OPERANDS];
2635 : /* Save the usage of each operand. */
2636 0 : enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2637 0 : int no_input_reloads = 0, no_output_reloads = 0;
2638 0 : int n_alternatives;
2639 0 : reg_class_t this_alternative[MAX_RECOG_OPERANDS];
2640 0 : char this_alternative_match_win[MAX_RECOG_OPERANDS];
2641 0 : char this_alternative_win[MAX_RECOG_OPERANDS];
2642 0 : char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2643 0 : char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2644 0 : int this_alternative_matches[MAX_RECOG_OPERANDS];
2645 0 : reg_class_t goal_alternative[MAX_RECOG_OPERANDS];
2646 0 : int this_alternative_number;
2647 0 : int goal_alternative_number = 0;
2648 0 : int operand_reloadnum[MAX_RECOG_OPERANDS];
2649 0 : int goal_alternative_matches[MAX_RECOG_OPERANDS];
2650 0 : int goal_alternative_matched[MAX_RECOG_OPERANDS];
2651 0 : char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2652 0 : char goal_alternative_win[MAX_RECOG_OPERANDS];
2653 0 : char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2654 0 : char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2655 0 : int goal_alternative_swapped;
2656 0 : int best;
2657 0 : int commutative;
2658 0 : char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2659 0 : rtx substed_operand[MAX_RECOG_OPERANDS];
2660 0 : rtx body = PATTERN (insn);
2661 0 : rtx set = single_set (insn);
2662 0 : int goal_earlyclobber = 0, this_earlyclobber;
2663 0 : machine_mode operand_mode[MAX_RECOG_OPERANDS];
2664 0 : int retval = 0;
2665 :
2666 0 : this_insn = insn;
2667 0 : n_reloads = 0;
2668 0 : n_replacements = 0;
2669 0 : n_earlyclobbers = 0;
2670 0 : replace_reloads = replace;
2671 0 : hard_regs_live_known = live_known;
2672 0 : static_reload_reg_p = reload_reg_p;
2673 :
2674 0 : if (JUMP_P (insn) && INSN_CODE (insn) < 0)
2675 : {
2676 0 : extract_insn (insn);
2677 0 : for (i = 0; i < recog_data.n_operands; i++)
2678 0 : if (recog_data.operand_type[i] != OP_IN)
2679 : break;
2680 0 : if (i < recog_data.n_operands)
2681 : {
2682 0 : error_for_asm (insn,
2683 : "the target does not support %<asm goto%> "
2684 : "with outputs in %<asm%>");
2685 0 : ira_nullify_asm_goto (insn);
2686 0 : return 0;
2687 : }
2688 : }
2689 :
2690 : /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads. */
2691 0 : if (JUMP_P (insn) || CALL_P (insn))
2692 0 : no_output_reloads = 1;
2693 :
2694 : /* The eliminated forms of any secondary memory locations are per-insn, so
2695 : clear them out here. */
2696 :
2697 0 : if (secondary_memlocs_elim_used)
2698 : {
2699 0 : memset (secondary_memlocs_elim, 0,
2700 0 : sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2701 0 : secondary_memlocs_elim_used = 0;
2702 : }
2703 :
2704 : /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2705 : is cheap to move between them. If it is not, there may not be an insn
2706 : to do the copy, so we may need a reload. */
2707 0 : if (GET_CODE (body) == SET
2708 0 : && REG_P (SET_DEST (body))
2709 0 : && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2710 0 : && REG_P (SET_SRC (body))
2711 0 : && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2712 0 : && register_move_cost (GET_MODE (SET_SRC (body)),
2713 0 : REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2714 0 : REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2715 : return 0;
2716 :
2717 0 : extract_insn (insn);
2718 :
2719 0 : noperands = reload_n_operands = recog_data.n_operands;
2720 0 : n_alternatives = recog_data.n_alternatives;
2721 :
2722 : /* Just return "no reloads" if insn has no operands with constraints. */
2723 0 : if (noperands == 0 || n_alternatives == 0)
2724 : return 0;
2725 :
2726 0 : insn_code_number = INSN_CODE (insn);
2727 0 : this_insn_is_asm = insn_code_number < 0;
2728 :
2729 0 : memcpy (operand_mode, recog_data.operand_mode,
2730 0 : noperands * sizeof (machine_mode));
2731 0 : memcpy (constraints, recog_data.constraints,
2732 : noperands * sizeof (const char *));
2733 :
2734 0 : commutative = -1;
2735 :
2736 : /* If we will need to know, later, whether some pair of operands
2737 : are the same, we must compare them now and save the result.
2738 : Reloading the base and index registers will clobber them
2739 : and afterward they will fail to match. */
2740 :
2741 0 : for (i = 0; i < noperands; i++)
2742 : {
2743 0 : const char *p;
2744 0 : int c;
2745 0 : char *end;
2746 :
2747 0 : substed_operand[i] = recog_data.operand[i];
2748 0 : p = constraints[i];
2749 :
2750 0 : modified[i] = RELOAD_READ;
2751 :
2752 : /* Scan this operand's constraint to see if it is an output operand,
2753 : an in-out operand, is commutative, or should match another. */
2754 :
2755 0 : while ((c = *p))
2756 : {
2757 0 : p += CONSTRAINT_LEN (c, p);
2758 0 : switch (c)
2759 : {
2760 0 : case '=':
2761 0 : modified[i] = RELOAD_WRITE;
2762 0 : break;
2763 0 : case '+':
2764 0 : modified[i] = RELOAD_READ_WRITE;
2765 0 : break;
2766 0 : case '%':
2767 0 : {
2768 : /* The last operand should not be marked commutative. */
2769 0 : gcc_assert (i != noperands - 1);
2770 :
2771 : /* We currently only support one commutative pair of
2772 : operands. Some existing asm code currently uses more
2773 : than one pair. Previously, that would usually work,
2774 : but sometimes it would crash the compiler. We
2775 : continue supporting that case as well as we can by
2776 : silently ignoring all but the first pair. In the
2777 : future we may handle it correctly. */
2778 0 : if (commutative < 0)
2779 : commutative = i;
2780 : else
2781 0 : gcc_assert (this_insn_is_asm);
2782 : }
2783 : break;
2784 : /* Use of ISDIGIT is tempting here, but it may get expensive because
2785 : of locale support we don't want. */
2786 0 : case '0': case '1': case '2': case '3': case '4':
2787 0 : case '5': case '6': case '7': case '8': case '9':
2788 0 : {
2789 0 : c = strtoul (p - 1, &end, 10);
2790 0 : p = end;
2791 :
2792 0 : operands_match[c][i]
2793 0 : = operands_match_p (recog_data.operand[c],
2794 0 : recog_data.operand[i]);
2795 :
2796 : /* An operand may not match itself. */
2797 0 : gcc_assert (c != i);
2798 :
2799 : /* If C can be commuted with C+1, and C might need to match I,
2800 : then C+1 might also need to match I. */
2801 0 : if (commutative >= 0)
2802 : {
2803 0 : if (c == commutative || c == commutative + 1)
2804 : {
2805 0 : int other = c + (c == commutative ? 1 : -1);
2806 0 : operands_match[other][i]
2807 0 : = operands_match_p (recog_data.operand[other],
2808 0 : recog_data.operand[i]);
2809 : }
2810 0 : if (i == commutative || i == commutative + 1)
2811 : {
2812 0 : int other = i + (i == commutative ? 1 : -1);
2813 0 : operands_match[c][other]
2814 0 : = operands_match_p (recog_data.operand[c],
2815 0 : recog_data.operand[other]);
2816 : }
2817 : /* Note that C is supposed to be less than I.
2818 : No need to consider altering both C and I because in
2819 : that case we would alter one into the other. */
2820 : }
2821 : }
2822 : }
2823 : }
2824 : }
2825 :
2826 : /* Examine each operand that is a memory reference or memory address
2827 : and reload parts of the addresses into index registers.
2828 : Also here any references to pseudo regs that didn't get hard regs
2829 : but are equivalent to constants get replaced in the insn itself
2830 : with those constants. Nobody will ever see them again.
2831 :
2832 : Finally, set up the preferred classes of each operand. */
2833 :
2834 0 : for (i = 0; i < noperands; i++)
2835 : {
2836 0 : RTX_CODE code = GET_CODE (recog_data.operand[i]);
2837 :
2838 0 : address_reloaded[i] = 0;
2839 0 : address_operand_reloaded[i] = 0;
2840 0 : operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2841 0 : : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2842 : : RELOAD_OTHER);
2843 0 : address_type[i]
2844 0 : = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2845 0 : : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2846 : : RELOAD_OTHER);
2847 :
2848 0 : if (*constraints[i] == 0)
2849 : /* Ignore things like match_operator operands. */
2850 : ;
2851 0 : else if (insn_extra_address_constraint
2852 0 : (lookup_constraint (constraints[i])))
2853 : {
2854 0 : address_operand_reloaded[i]
2855 0 : = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2856 : recog_data.operand[i],
2857 0 : recog_data.operand_loc[i],
2858 : i, operand_type[i], ind_levels, insn);
2859 :
2860 : /* If we now have a simple operand where we used to have a
2861 : PLUS or MULT or ASHIFT, re-recognize and try again. */
2862 0 : if ((OBJECT_P (*recog_data.operand_loc[i])
2863 0 : || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2864 0 : && (GET_CODE (recog_data.operand[i]) == MULT
2865 : || GET_CODE (recog_data.operand[i]) == ASHIFT
2866 : || GET_CODE (recog_data.operand[i]) == PLUS))
2867 : {
2868 0 : INSN_CODE (insn) = -1;
2869 0 : retval = find_reloads (insn, replace, ind_levels, live_known,
2870 : reload_reg_p);
2871 0 : return retval;
2872 : }
2873 :
2874 0 : recog_data.operand[i] = *recog_data.operand_loc[i];
2875 0 : substed_operand[i] = recog_data.operand[i];
2876 :
2877 : /* Address operands are reloaded in their existing mode,
2878 : no matter what is specified in the machine description. */
2879 0 : operand_mode[i] = GET_MODE (recog_data.operand[i]);
2880 :
2881 : /* If the address is a single CONST_INT pick address mode
2882 : instead otherwise we will later not know in which mode
2883 : the reload should be performed. */
2884 0 : if (operand_mode[i] == VOIDmode)
2885 0 : operand_mode[i] = Pmode;
2886 :
2887 : }
2888 0 : else if (code == MEM)
2889 : {
2890 0 : address_reloaded[i]
2891 0 : = find_reloads_address (GET_MODE (recog_data.operand[i]),
2892 : recog_data.operand_loc[i],
2893 : XEXP (recog_data.operand[i], 0),
2894 0 : &XEXP (recog_data.operand[i], 0),
2895 : i, address_type[i], ind_levels, insn);
2896 0 : recog_data.operand[i] = *recog_data.operand_loc[i];
2897 0 : substed_operand[i] = recog_data.operand[i];
2898 : }
2899 0 : else if (code == SUBREG)
2900 : {
2901 0 : rtx reg = SUBREG_REG (recog_data.operand[i]);
2902 0 : rtx op
2903 0 : = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2904 : ind_levels,
2905 : set != 0
2906 0 : && &SET_DEST (set) == recog_data.operand_loc[i],
2907 : insn,
2908 : &address_reloaded[i]);
2909 :
2910 : /* If we made a MEM to load (a part of) the stackslot of a pseudo
2911 : that didn't get a hard register, emit a USE with a REG_EQUAL
2912 : note in front so that we might inherit a previous, possibly
2913 : wider reload. */
2914 :
2915 0 : if (replace
2916 0 : && MEM_P (op)
2917 0 : && REG_P (reg)
2918 0 : && known_ge (GET_MODE_SIZE (GET_MODE (reg)),
2919 : GET_MODE_SIZE (GET_MODE (op)))
2920 0 : && reg_equiv_constant (REGNO (reg)) == 0)
2921 0 : set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2922 : insn),
2923 0 : REG_EQUAL, reg_equiv_memory_loc (REGNO (reg)));
2924 :
2925 0 : substed_operand[i] = recog_data.operand[i] = op;
2926 : }
2927 0 : else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2928 : /* We can get a PLUS as an "operand" as a result of register
2929 : elimination. See eliminate_regs and gen_reload. We handle
2930 : a unary operator by reloading the operand. */
2931 0 : substed_operand[i] = recog_data.operand[i]
2932 0 : = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2933 : ind_levels, 0, insn,
2934 : &address_reloaded[i]);
2935 0 : else if (code == REG)
2936 : {
2937 : /* This is equivalent to calling find_reloads_toplev.
2938 : The code is duplicated for speed.
2939 : When we find a pseudo always equivalent to a constant,
2940 : we replace it by the constant. We must be sure, however,
2941 : that we don't try to replace it in the insn in which it
2942 : is being set. */
2943 0 : int regno = REGNO (recog_data.operand[i]);
2944 0 : if (reg_equiv_constant (regno) != 0
2945 0 : && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2946 : {
2947 : /* Record the existing mode so that the check if constants are
2948 : allowed will work when operand_mode isn't specified. */
2949 :
2950 0 : if (operand_mode[i] == VOIDmode)
2951 0 : operand_mode[i] = GET_MODE (recog_data.operand[i]);
2952 :
2953 0 : substed_operand[i] = recog_data.operand[i]
2954 0 : = reg_equiv_constant (regno);
2955 : }
2956 0 : if (reg_equiv_memory_loc (regno) != 0
2957 0 : && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
2958 : /* We need not give a valid is_set_dest argument since the case
2959 : of a constant equivalence was checked above. */
2960 0 : substed_operand[i] = recog_data.operand[i]
2961 0 : = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2962 : ind_levels, 0, insn,
2963 : &address_reloaded[i]);
2964 : }
2965 : /* If the operand is still a register (we didn't replace it with an
2966 : equivalent), get the preferred class to reload it into. */
2967 0 : code = GET_CODE (recog_data.operand[i]);
2968 0 : preferred_class[i]
2969 0 : = ((code == REG && REGNO (recog_data.operand[i])
2970 : >= FIRST_PSEUDO_REGISTER)
2971 0 : ? reg_preferred_class (REGNO (recog_data.operand[i]))
2972 : : NO_REGS);
2973 0 : pref_or_nothing[i]
2974 0 : = (code == REG
2975 0 : && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2976 0 : && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2977 : }
2978 :
2979 : /* If this is simply a copy from operand 1 to operand 0, merge the
2980 : preferred classes for the operands. */
2981 0 : if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2982 0 : && recog_data.operand[1] == SET_SRC (set))
2983 : {
2984 0 : preferred_class[0] = preferred_class[1]
2985 0 : = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2986 0 : pref_or_nothing[0] |= pref_or_nothing[1];
2987 0 : pref_or_nothing[1] |= pref_or_nothing[0];
2988 : }
2989 :
2990 : /* Now see what we need for pseudo-regs that didn't get hard regs
2991 : or got the wrong kind of hard reg. For this, we must consider
2992 : all the operands together against the register constraints. */
2993 :
2994 0 : best = MAX_RECOG_OPERANDS * 2 + 600;
2995 :
2996 0 : goal_alternative_swapped = 0;
2997 :
2998 : /* The constraints are made of several alternatives.
2999 : Each operand's constraint looks like foo,bar,... with commas
3000 : separating the alternatives. The first alternatives for all
3001 : operands go together, the second alternatives go together, etc.
3002 :
3003 : First loop over alternatives. */
3004 :
3005 0 : alternative_mask enabled = get_enabled_alternatives (insn);
3006 0 : for (this_alternative_number = 0;
3007 0 : this_alternative_number < n_alternatives;
3008 : this_alternative_number++)
3009 : {
3010 0 : int swapped;
3011 :
3012 0 : if (!TEST_BIT (enabled, this_alternative_number))
3013 : {
3014 : int i;
3015 :
3016 0 : for (i = 0; i < recog_data.n_operands; i++)
3017 0 : constraints[i] = skip_alternative (constraints[i]);
3018 :
3019 0 : continue;
3020 0 : }
3021 :
3022 : /* If insn is commutative (it's safe to exchange a certain pair
3023 : of operands) then we need to try each alternative twice, the
3024 : second time matching those two operands as if we had
3025 : exchanged them. To do this, really exchange them in
3026 : operands. */
3027 0 : for (swapped = 0; swapped < (commutative >= 0 ? 2 : 1); swapped++)
3028 : {
3029 : /* Loop over operands for one constraint alternative. */
3030 : /* LOSERS counts those that don't fit this alternative
3031 : and would require loading. */
3032 0 : int losers = 0;
3033 : /* BAD is set to 1 if it some operand can't fit this alternative
3034 : even after reloading. */
3035 0 : int bad = 0;
3036 : /* REJECT is a count of how undesirable this alternative says it is
3037 : if any reloading is required. If the alternative matches exactly
3038 : then REJECT is ignored, but otherwise it gets this much
3039 : counted against it in addition to the reloading needed. Each
3040 : ? counts three times here since we want the disparaging caused by
3041 : a bad register class to only count 1/3 as much. */
3042 0 : int reject = 0;
3043 :
3044 0 : if (swapped)
3045 : {
3046 0 : recog_data.operand[commutative] = substed_operand[commutative + 1];
3047 0 : recog_data.operand[commutative + 1] = substed_operand[commutative];
3048 : /* Swap the duplicates too. */
3049 0 : for (i = 0; i < recog_data.n_dups; i++)
3050 0 : if (recog_data.dup_num[i] == commutative
3051 0 : || recog_data.dup_num[i] == commutative + 1)
3052 0 : *recog_data.dup_loc[i]
3053 0 : = recog_data.operand[(int) recog_data.dup_num[i]];
3054 :
3055 0 : std::swap (preferred_class[commutative],
3056 : preferred_class[commutative + 1]);
3057 0 : std::swap (pref_or_nothing[commutative],
3058 : pref_or_nothing[commutative + 1]);
3059 0 : std::swap (address_reloaded[commutative],
3060 : address_reloaded[commutative + 1]);
3061 : }
3062 :
3063 0 : this_earlyclobber = 0;
3064 :
3065 0 : for (i = 0; i < noperands; i++)
3066 : {
3067 0 : const char *p = constraints[i];
3068 0 : char *end;
3069 0 : int len;
3070 0 : int win = 0;
3071 0 : int did_match = 0;
3072 : /* 0 => this operand can be reloaded somehow for this alternative. */
3073 0 : int badop = 1;
3074 : /* 0 => this operand can be reloaded if the alternative allows regs. */
3075 0 : int winreg = 0;
3076 0 : int c;
3077 0 : int m;
3078 0 : rtx operand = recog_data.operand[i];
3079 0 : int offset = 0;
3080 : /* Nonzero means this is a MEM that must be reloaded into a reg
3081 : regardless of what the constraint says. */
3082 0 : int force_reload = 0;
3083 0 : int offmemok = 0;
3084 : /* Nonzero if a constant forced into memory would be OK for this
3085 : operand. */
3086 0 : int constmemok = 0;
3087 0 : int earlyclobber = 0;
3088 0 : enum constraint_num cn;
3089 0 : enum reg_class cl;
3090 :
3091 : /* If the operand is a SUBREG, extract
3092 : the REG or MEM (or maybe even a constant) within.
3093 : (Constants can occur as a result of reg_equiv_constant.) */
3094 :
3095 0 : while (GET_CODE (operand) == SUBREG)
3096 : {
3097 : /* Offset only matters when operand is a REG and
3098 : it is a hard reg. This is because it is passed
3099 : to reg_fits_class_p if it is a REG and all pseudos
3100 : return 0 from that function. */
3101 0 : if (REG_P (SUBREG_REG (operand))
3102 0 : && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3103 : {
3104 0 : if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3105 0 : GET_MODE (SUBREG_REG (operand)),
3106 0 : SUBREG_BYTE (operand),
3107 0 : GET_MODE (operand)) < 0)
3108 0 : force_reload = 1;
3109 0 : offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3110 0 : GET_MODE (SUBREG_REG (operand)),
3111 0 : SUBREG_BYTE (operand),
3112 0 : GET_MODE (operand));
3113 : }
3114 0 : operand = SUBREG_REG (operand);
3115 : /* Force reload if this is a constant or PLUS or if there may
3116 : be a problem accessing OPERAND in the outer mode. */
3117 0 : scalar_int_mode inner_mode;
3118 0 : if (CONSTANT_P (operand)
3119 0 : || GET_CODE (operand) == PLUS
3120 : /* We must force a reload of paradoxical SUBREGs
3121 : of a MEM because the alignment of the inner value
3122 : may not be enough to do the outer reference. On
3123 : big-endian machines, it may also reference outside
3124 : the object.
3125 :
3126 : On machines that extend byte operations and we have a
3127 : SUBREG where both the inner and outer modes are no wider
3128 : than a word and the inner mode is narrower, is integral,
3129 : and gets extended when loaded from memory, combine.cc has
3130 : made assumptions about the behavior of the machine in such
3131 : register access. If the data is, in fact, in memory we
3132 : must always load using the size assumed to be in the
3133 : register and let the insn do the different-sized
3134 : accesses.
3135 :
3136 : This is doubly true if WORD_REGISTER_OPERATIONS. In
3137 : this case eliminate_regs has left non-paradoxical
3138 : subregs for push_reload to see. Make sure it does
3139 : by forcing the reload.
3140 :
3141 : ??? When is it right at this stage to have a subreg
3142 : of a mem that is _not_ to be handled specially? IMO
3143 : those should have been reduced to just a mem. */
3144 0 : || ((MEM_P (operand)
3145 0 : || (REG_P (operand)
3146 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3147 0 : && (WORD_REGISTER_OPERATIONS
3148 : || (((maybe_lt
3149 0 : (GET_MODE_BITSIZE (GET_MODE (operand)),
3150 0 : BIGGEST_ALIGNMENT))
3151 : && (paradoxical_subreg_p
3152 0 : (operand_mode[i], GET_MODE (operand)))))
3153 0 : || BYTES_BIG_ENDIAN
3154 0 : || (known_le (GET_MODE_SIZE (operand_mode[i]),
3155 : UNITS_PER_WORD)
3156 : && (is_a <scalar_int_mode>
3157 0 : (GET_MODE (operand), &inner_mode))
3158 0 : && (GET_MODE_SIZE (inner_mode)
3159 : <= UNITS_PER_WORD)
3160 0 : && paradoxical_subreg_p (operand_mode[i],
3161 : inner_mode)
3162 : && LOAD_EXTEND_OP (inner_mode) != UNKNOWN)))
3163 : /* We must force a reload of a SUBREG's inner expression
3164 : if it is a pseudo that will become a MEM and the MEM
3165 : has a mode-dependent address, as in that case we
3166 : obviously cannot change the mode of the MEM to that
3167 : of the containing SUBREG as that would change the
3168 : interpretation of the address. */
3169 0 : || (REG_P (operand)
3170 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3171 0 : && reg_equiv_mem (REGNO (operand))
3172 0 : && (mode_dependent_address_p
3173 0 : (XEXP (reg_equiv_mem (REGNO (operand)), 0),
3174 0 : (MEM_ADDR_SPACE
3175 : (reg_equiv_mem (REGNO (operand)))))))
3176 : )
3177 : force_reload = 1;
3178 : }
3179 :
3180 0 : this_alternative[i] = NO_REGS;
3181 0 : this_alternative_win[i] = 0;
3182 0 : this_alternative_match_win[i] = 0;
3183 0 : this_alternative_offmemok[i] = 0;
3184 0 : this_alternative_earlyclobber[i] = 0;
3185 0 : this_alternative_matches[i] = -1;
3186 :
3187 : /* An empty constraint or empty alternative
3188 : allows anything which matched the pattern. */
3189 0 : if (*p == 0 || *p == ',')
3190 0 : win = 1, badop = 0;
3191 :
3192 : /* Scan this alternative's specs for this operand;
3193 : set WIN if the operand fits any letter in this alternative.
3194 : Otherwise, clear BADOP if this operand could
3195 : fit some letter after reloads,
3196 : or set WINREG if this operand could fit after reloads
3197 : provided the constraint allows some registers. */
3198 :
3199 0 : do
3200 0 : switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3201 : {
3202 : case '\0':
3203 : len = 0;
3204 : break;
3205 0 : case ',':
3206 0 : c = '\0';
3207 0 : break;
3208 :
3209 0 : case '?':
3210 0 : reject += 6;
3211 0 : break;
3212 :
3213 0 : case '!':
3214 0 : reject = 600;
3215 0 : break;
3216 :
3217 0 : case '#':
3218 : /* Ignore rest of this alternative as far as
3219 : reloading is concerned. */
3220 0 : do
3221 0 : p++;
3222 0 : while (*p && *p != ',');
3223 : len = 0;
3224 : break;
3225 :
3226 0 : case '0': case '1': case '2': case '3': case '4':
3227 0 : case '5': case '6': case '7': case '8': case '9':
3228 0 : m = strtoul (p, &end, 10);
3229 0 : p = end;
3230 0 : len = 0;
3231 :
3232 0 : this_alternative_matches[i] = m;
3233 : /* We are supposed to match a previous operand.
3234 : If we do, we win if that one did.
3235 : If we do not, count both of the operands as losers.
3236 : (This is too conservative, since most of the time
3237 : only a single reload insn will be needed to make
3238 : the two operands win. As a result, this alternative
3239 : may be rejected when it is actually desirable.) */
3240 0 : if ((swapped && (m != commutative || i != commutative + 1))
3241 : /* If we are matching as if two operands were swapped,
3242 : also pretend that operands_match had been computed
3243 : with swapped.
3244 : But if I is the second of those and C is the first,
3245 : don't exchange them, because operands_match is valid
3246 : only on one side of its diagonal. */
3247 0 : ? (operands_match
3248 0 : [(m == commutative || m == commutative + 1)
3249 0 : ? 2 * commutative + 1 - m : m]
3250 0 : [(i == commutative || i == commutative + 1)
3251 0 : ? 2 * commutative + 1 - i : i])
3252 0 : : operands_match[m][i])
3253 : {
3254 : /* If we are matching a non-offsettable address where an
3255 : offsettable address was expected, then we must reject
3256 : this combination, because we can't reload it. */
3257 0 : if (this_alternative_offmemok[m]
3258 0 : && MEM_P (recog_data.operand[m])
3259 0 : && this_alternative[m] == NO_REGS
3260 0 : && ! this_alternative_win[m])
3261 0 : bad = 1;
3262 :
3263 0 : did_match = this_alternative_win[m];
3264 : }
3265 : else
3266 : {
3267 : /* Operands don't match. */
3268 0 : rtx value;
3269 0 : int loc1, loc2;
3270 : /* Retroactively mark the operand we had to match
3271 : as a loser, if it wasn't already. */
3272 0 : if (this_alternative_win[m])
3273 0 : losers++;
3274 0 : this_alternative_win[m] = 0;
3275 0 : if (this_alternative[m] == NO_REGS)
3276 0 : bad = 1;
3277 : /* But count the pair only once in the total badness of
3278 : this alternative, if the pair can be a dummy reload.
3279 : The pointers in operand_loc are not swapped; swap
3280 : them by hand if necessary. */
3281 0 : if (swapped && i == commutative)
3282 0 : loc1 = commutative + 1;
3283 0 : else if (swapped && i == commutative + 1)
3284 : loc1 = commutative;
3285 : else
3286 0 : loc1 = i;
3287 0 : if (swapped && m == commutative)
3288 0 : loc2 = commutative + 1;
3289 0 : else if (swapped && m == commutative + 1)
3290 : loc2 = commutative;
3291 : else
3292 0 : loc2 = m;
3293 0 : value
3294 0 : = find_dummy_reload (recog_data.operand[i],
3295 : recog_data.operand[m],
3296 : recog_data.operand_loc[loc1],
3297 0 : recog_data.operand_loc[loc2],
3298 : operand_mode[i], operand_mode[m],
3299 : this_alternative[m], -1,
3300 0 : this_alternative_earlyclobber[m]);
3301 :
3302 0 : if (value != 0)
3303 0 : losers--;
3304 : }
3305 : /* This can be fixed with reloads if the operand
3306 : we are supposed to match can be fixed with reloads. */
3307 0 : badop = 0;
3308 0 : this_alternative[i] = this_alternative[m];
3309 :
3310 : /* If we have to reload this operand and some previous
3311 : operand also had to match the same thing as this
3312 : operand, we don't know how to do that. So reject this
3313 : alternative. */
3314 0 : if (! did_match || force_reload)
3315 0 : for (j = 0; j < i; j++)
3316 0 : if (this_alternative_matches[j]
3317 : == this_alternative_matches[i])
3318 : {
3319 : badop = 1;
3320 : break;
3321 : }
3322 : break;
3323 :
3324 0 : case 'p':
3325 : /* All necessary reloads for an address_operand
3326 : were handled in find_reloads_address. */
3327 0 : this_alternative[i]
3328 0 : = base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
3329 : ADDRESS, SCRATCH, insn);
3330 0 : win = 1;
3331 0 : badop = 0;
3332 0 : break;
3333 :
3334 0 : case TARGET_MEM_CONSTRAINT:
3335 0 : if (force_reload)
3336 : break;
3337 0 : if (MEM_P (operand)
3338 0 : || (REG_P (operand)
3339 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3340 0 : && reg_renumber[REGNO (operand)] < 0))
3341 : win = 1;
3342 0 : if (CONST_POOL_OK_P (operand_mode[i], operand))
3343 : badop = 0;
3344 : constmemok = 1;
3345 : break;
3346 :
3347 0 : case '<':
3348 0 : if (MEM_P (operand)
3349 0 : && ! address_reloaded[i]
3350 0 : && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3351 0 : || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3352 0 : win = 1;
3353 : break;
3354 :
3355 0 : case '>':
3356 0 : if (MEM_P (operand)
3357 0 : && ! address_reloaded[i]
3358 0 : && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3359 0 : || GET_CODE (XEXP (operand, 0)) == POST_INC))
3360 0 : win = 1;
3361 : break;
3362 :
3363 : /* Memory operand whose address is not offsettable. */
3364 0 : case 'V':
3365 0 : if (force_reload)
3366 : break;
3367 0 : if (MEM_P (operand)
3368 0 : && ! (ind_levels ? offsettable_memref_p (operand)
3369 0 : : offsettable_nonstrict_memref_p (operand))
3370 : /* Certain mem addresses will become offsettable
3371 : after they themselves are reloaded. This is important;
3372 : we don't want our own handling of unoffsettables
3373 : to override the handling of reg_equiv_address. */
3374 0 : && !(REG_P (XEXP (operand, 0))
3375 : && (ind_levels == 0
3376 0 : || reg_equiv_address (REGNO (XEXP (operand, 0))) != 0)))
3377 : win = 1;
3378 : break;
3379 :
3380 : /* Memory operand whose address is offsettable. */
3381 0 : case 'o':
3382 0 : if (force_reload)
3383 : break;
3384 0 : if ((MEM_P (operand)
3385 : /* If IND_LEVELS, find_reloads_address won't reload a
3386 : pseudo that didn't get a hard reg, so we have to
3387 : reject that case. */
3388 0 : && ((ind_levels ? offsettable_memref_p (operand)
3389 0 : : offsettable_nonstrict_memref_p (operand))
3390 : /* A reloaded address is offsettable because it is now
3391 : just a simple register indirect. */
3392 0 : || address_reloaded[i] == 1))
3393 0 : || (REG_P (operand)
3394 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3395 0 : && reg_renumber[REGNO (operand)] < 0
3396 : /* If reg_equiv_address is nonzero, we will be
3397 : loading it into a register; hence it will be
3398 : offsettable, but we cannot say that reg_equiv_mem
3399 : is offsettable without checking. */
3400 0 : && ((reg_equiv_mem (REGNO (operand)) != 0
3401 0 : && offsettable_memref_p (reg_equiv_mem (REGNO (operand))))
3402 0 : || (reg_equiv_address (REGNO (operand)) != 0))))
3403 : win = 1;
3404 0 : if (CONST_POOL_OK_P (operand_mode[i], operand)
3405 0 : || MEM_P (operand))
3406 : badop = 0;
3407 : constmemok = 1;
3408 : offmemok = 1;
3409 : break;
3410 :
3411 0 : case '&':
3412 : /* Output operand that is stored before the need for the
3413 : input operands (and their index registers) is over. */
3414 0 : earlyclobber = 1, this_earlyclobber = 1;
3415 0 : break;
3416 :
3417 0 : case 'X':
3418 0 : force_reload = 0;
3419 0 : win = 1;
3420 0 : break;
3421 :
3422 0 : case 'g':
3423 0 : if (! force_reload
3424 : /* A PLUS is never a valid operand, but reload can make
3425 : it from a register when eliminating registers. */
3426 0 : && GET_CODE (operand) != PLUS
3427 : /* A SCRATCH is not a valid operand. */
3428 0 : && GET_CODE (operand) != SCRATCH
3429 0 : && (! CONSTANT_P (operand)
3430 0 : || ! flag_pic
3431 0 : || LEGITIMATE_PIC_OPERAND_P (operand))
3432 0 : && (GENERAL_REGS == ALL_REGS
3433 0 : || !REG_P (operand)
3434 0 : || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3435 0 : && reg_renumber[REGNO (operand)] < 0)))
3436 : win = 1;
3437 0 : cl = GENERAL_REGS;
3438 0 : goto reg;
3439 :
3440 0 : default:
3441 0 : cn = lookup_constraint (p);
3442 0 : switch (get_constraint_type (cn))
3443 : {
3444 0 : case CT_REGISTER:
3445 0 : cl = reg_class_for_constraint (cn);
3446 0 : if (cl != NO_REGS)
3447 0 : goto reg;
3448 : break;
3449 :
3450 0 : case CT_CONST_INT:
3451 0 : if (CONST_INT_P (operand)
3452 0 : && (insn_const_int_ok_for_constraint
3453 0 : (INTVAL (operand), cn)))
3454 : win = true;
3455 : break;
3456 :
3457 0 : case CT_MEMORY:
3458 0 : case CT_RELAXED_MEMORY:
3459 0 : if (force_reload)
3460 : break;
3461 0 : if (constraint_satisfied_p (operand, cn))
3462 : win = 1;
3463 : /* If the address was already reloaded,
3464 : we win as well. */
3465 0 : else if (MEM_P (operand) && address_reloaded[i] == 1)
3466 : win = 1;
3467 : /* Likewise if the address will be reloaded because
3468 : reg_equiv_address is nonzero. For reg_equiv_mem
3469 : we have to check. */
3470 0 : else if (REG_P (operand)
3471 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3472 0 : && reg_renumber[REGNO (operand)] < 0
3473 0 : && ((reg_equiv_mem (REGNO (operand)) != 0
3474 0 : && (constraint_satisfied_p
3475 0 : (reg_equiv_mem (REGNO (operand)),
3476 : cn)))
3477 0 : || (reg_equiv_address (REGNO (operand))
3478 : != 0)))
3479 : win = 1;
3480 :
3481 : /* If we didn't already win, we can reload
3482 : constants via force_const_mem, and other
3483 : MEMs by reloading the address like for 'o'. */
3484 0 : if (CONST_POOL_OK_P (operand_mode[i], operand)
3485 0 : || MEM_P (operand))
3486 : badop = 0;
3487 : constmemok = 1;
3488 : offmemok = 1;
3489 : break;
3490 :
3491 0 : case CT_SPECIAL_MEMORY:
3492 0 : if (force_reload)
3493 : break;
3494 0 : if (constraint_satisfied_p (operand, cn))
3495 : win = 1;
3496 : /* Likewise if the address will be reloaded because
3497 : reg_equiv_address is nonzero. For reg_equiv_mem
3498 : we have to check. */
3499 0 : else if (REG_P (operand)
3500 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3501 0 : && reg_renumber[REGNO (operand)] < 0
3502 0 : && reg_equiv_mem (REGNO (operand)) != 0
3503 0 : && (constraint_satisfied_p
3504 0 : (reg_equiv_mem (REGNO (operand)), cn)))
3505 : win = 1;
3506 : break;
3507 :
3508 0 : case CT_ADDRESS:
3509 0 : if (constraint_satisfied_p (operand, cn))
3510 0 : win = 1;
3511 :
3512 : /* If we didn't already win, we can reload
3513 : the address into a base register. */
3514 0 : this_alternative[i]
3515 0 : = base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
3516 : ADDRESS, SCRATCH, insn);
3517 0 : badop = 0;
3518 0 : break;
3519 :
3520 0 : case CT_FIXED_FORM:
3521 0 : if (constraint_satisfied_p (operand, cn))
3522 0 : win = 1;
3523 : break;
3524 : }
3525 : break;
3526 :
3527 0 : reg:
3528 0 : this_alternative[i]
3529 0 : = reg_class_subunion[this_alternative[i]][cl];
3530 0 : if (GET_MODE (operand) == BLKmode)
3531 : break;
3532 0 : winreg = 1;
3533 0 : if (REG_P (operand)
3534 0 : && reg_fits_class_p (operand, this_alternative[i],
3535 0 : offset, GET_MODE (recog_data.operand[i])))
3536 : win = 1;
3537 : break;
3538 : }
3539 0 : while ((p += len), c);
3540 :
3541 0 : if (swapped == (commutative >= 0 ? 1 : 0))
3542 0 : constraints[i] = p;
3543 :
3544 : /* If this operand could be handled with a reg,
3545 : and some reg is allowed, then this operand can be handled. */
3546 0 : if (winreg && this_alternative[i] != NO_REGS
3547 0 : && (win || !class_only_fixed_regs[this_alternative[i]]))
3548 0 : badop = 0;
3549 :
3550 : /* Record which operands fit this alternative. */
3551 0 : this_alternative_earlyclobber[i] = earlyclobber;
3552 0 : if (win && ! force_reload)
3553 0 : this_alternative_win[i] = 1;
3554 0 : else if (did_match && ! force_reload)
3555 0 : this_alternative_match_win[i] = 1;
3556 : else
3557 : {
3558 0 : int const_to_mem = 0;
3559 :
3560 0 : this_alternative_offmemok[i] = offmemok;
3561 0 : losers++;
3562 0 : if (badop)
3563 0 : bad = 1;
3564 : /* Alternative loses if it has no regs for a reg operand. */
3565 0 : if (REG_P (operand)
3566 0 : && this_alternative[i] == NO_REGS
3567 0 : && this_alternative_matches[i] < 0)
3568 0 : bad = 1;
3569 :
3570 : /* If this is a constant that is reloaded into the desired
3571 : class by copying it to memory first, count that as another
3572 : reload. This is consistent with other code and is
3573 : required to avoid choosing another alternative when
3574 : the constant is moved into memory by this function on
3575 : an early reload pass. Note that the test here is
3576 : precisely the same as in the code below that calls
3577 : force_const_mem. */
3578 0 : if (CONST_POOL_OK_P (operand_mode[i], operand)
3579 0 : && ((targetm.preferred_reload_class (operand,
3580 : this_alternative[i])
3581 : == NO_REGS)
3582 : || no_input_reloads))
3583 : {
3584 0 : const_to_mem = 1;
3585 0 : if (this_alternative[i] != NO_REGS)
3586 0 : losers++;
3587 : }
3588 :
3589 : /* Alternative loses if it requires a type of reload not
3590 : permitted for this insn. We can always reload SCRATCH
3591 : and objects with a REG_UNUSED note. */
3592 0 : if (GET_CODE (operand) != SCRATCH
3593 0 : && modified[i] != RELOAD_READ && no_output_reloads
3594 0 : && ! find_reg_note (insn, REG_UNUSED, operand))
3595 : bad = 1;
3596 0 : else if (modified[i] != RELOAD_WRITE && no_input_reloads
3597 : && ! const_to_mem)
3598 : bad = 1;
3599 :
3600 : /* If we can't reload this value at all, reject this
3601 : alternative. Note that we could also lose due to
3602 : LIMIT_RELOAD_CLASS, but we don't check that
3603 : here. */
3604 :
3605 0 : if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3606 : {
3607 0 : if (targetm.preferred_reload_class (operand,
3608 : this_alternative[i])
3609 : == NO_REGS)
3610 0 : reject = 600;
3611 :
3612 0 : if (operand_type[i] == RELOAD_FOR_OUTPUT
3613 0 : && (targetm.preferred_output_reload_class (operand,
3614 : this_alternative[i])
3615 : == NO_REGS))
3616 : reject = 600;
3617 : }
3618 :
3619 : /* We prefer to reload pseudos over reloading other things,
3620 : since such reloads may be able to be eliminated later.
3621 : If we are reloading a SCRATCH, we won't be generating any
3622 : insns, just using a register, so it is also preferred.
3623 : So bump REJECT in other cases. Don't do this in the
3624 : case where we are forcing a constant into memory and
3625 : it will then win since we don't want to have a different
3626 : alternative match then. */
3627 0 : if (! (REG_P (operand)
3628 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3629 0 : && GET_CODE (operand) != SCRATCH
3630 0 : && ! (const_to_mem && constmemok))
3631 0 : reject += 2;
3632 :
3633 : /* Input reloads can be inherited more often than output
3634 : reloads can be removed, so penalize output reloads. */
3635 0 : if (operand_type[i] != RELOAD_FOR_INPUT
3636 0 : && GET_CODE (operand) != SCRATCH)
3637 0 : reject++;
3638 : }
3639 :
3640 : /* If this operand is a pseudo register that didn't get
3641 : a hard reg and this alternative accepts some
3642 : register, see if the class that we want is a subset
3643 : of the preferred class for this register. If not,
3644 : but it intersects that class, we'd like to use the
3645 : intersection, but the best we can do is to use the
3646 : preferred class, if it is instead a subset of the
3647 : class we want in this alternative. If we can't use
3648 : it, show that usage of this alternative should be
3649 : discouraged; it will be discouraged more still if the
3650 : register is `preferred or nothing'. We do this
3651 : because it increases the chance of reusing our spill
3652 : register in a later insn and avoiding a pair of
3653 : memory stores and loads.
3654 :
3655 : Don't bother with this if this alternative will
3656 : accept this operand.
3657 :
3658 : Don't do this for a multiword operand, since it is
3659 : only a small win and has the risk of requiring more
3660 : spill registers, which could cause a large loss.
3661 :
3662 : Don't do this if the preferred class has only one
3663 : register because we might otherwise exhaust the
3664 : class. */
3665 :
3666 0 : if (! win && ! did_match
3667 0 : && this_alternative[i] != NO_REGS
3668 0 : && known_le (GET_MODE_SIZE (operand_mode[i]), UNITS_PER_WORD)
3669 0 : && reg_class_size [(int) preferred_class[i]] > 0
3670 0 : && ! small_register_class_p (preferred_class[i]))
3671 : {
3672 0 : if (! reg_class_subset_p (this_alternative[i],
3673 : preferred_class[i]))
3674 : {
3675 : /* Since we don't have a way of forming a register
3676 : class for the intersection, we just do
3677 : something special if the preferred class is a
3678 : subset of the class we have; that's the most
3679 : common case anyway. */
3680 0 : if (reg_class_subset_p (preferred_class[i],
3681 : this_alternative[i]))
3682 0 : this_alternative[i] = preferred_class[i];
3683 : else
3684 0 : reject += (2 + 2 * pref_or_nothing[i]);
3685 : }
3686 : }
3687 : }
3688 :
3689 : /* Now see if any output operands that are marked "earlyclobber"
3690 : in this alternative conflict with any input operands
3691 : or any memory addresses. */
3692 :
3693 0 : for (i = 0; i < noperands; i++)
3694 0 : if (this_alternative_earlyclobber[i]
3695 0 : && (this_alternative_win[i] || this_alternative_match_win[i]))
3696 : {
3697 0 : struct decomposition early_data;
3698 :
3699 0 : early_data = decompose (recog_data.operand[i]);
3700 :
3701 0 : gcc_assert (modified[i] != RELOAD_READ);
3702 :
3703 0 : if (this_alternative[i] == NO_REGS)
3704 : {
3705 0 : this_alternative_earlyclobber[i] = 0;
3706 0 : gcc_assert (this_insn_is_asm);
3707 0 : error_for_asm (this_insn,
3708 : "%<&%> constraint used with no register class");
3709 : }
3710 :
3711 0 : for (j = 0; j < noperands; j++)
3712 : /* Is this an input operand or a memory ref? */
3713 0 : if ((MEM_P (recog_data.operand[j])
3714 0 : || modified[j] != RELOAD_WRITE)
3715 0 : && j != i
3716 : /* Ignore things like match_operator operands. */
3717 0 : && !recog_data.is_operator[j]
3718 : /* Don't count an input operand that is constrained to match
3719 : the early clobber operand. */
3720 0 : && ! (this_alternative_matches[j] == i
3721 0 : && rtx_equal_p (recog_data.operand[i],
3722 : recog_data.operand[j]))
3723 : /* Is it altered by storing the earlyclobber operand? */
3724 0 : && !immune_p (recog_data.operand[j], recog_data.operand[i],
3725 : early_data))
3726 : {
3727 : /* If the output is in a non-empty few-regs class,
3728 : it's costly to reload it, so reload the input instead. */
3729 0 : if (small_register_class_p (this_alternative[i])
3730 0 : && (REG_P (recog_data.operand[j])
3731 0 : || GET_CODE (recog_data.operand[j]) == SUBREG))
3732 : {
3733 0 : losers++;
3734 0 : this_alternative_win[j] = 0;
3735 0 : this_alternative_match_win[j] = 0;
3736 : }
3737 : else
3738 : break;
3739 : }
3740 : /* If an earlyclobber operand conflicts with something,
3741 : it must be reloaded, so request this and count the cost. */
3742 0 : if (j != noperands)
3743 : {
3744 0 : losers++;
3745 0 : this_alternative_win[i] = 0;
3746 0 : this_alternative_match_win[j] = 0;
3747 0 : for (j = 0; j < noperands; j++)
3748 0 : if (this_alternative_matches[j] == i
3749 0 : && this_alternative_match_win[j])
3750 : {
3751 0 : this_alternative_win[j] = 0;
3752 0 : this_alternative_match_win[j] = 0;
3753 0 : losers++;
3754 : }
3755 : }
3756 : }
3757 :
3758 : /* If one alternative accepts all the operands, no reload required,
3759 : choose that alternative; don't consider the remaining ones. */
3760 0 : if (losers == 0)
3761 : {
3762 : /* Unswap these so that they are never swapped at `finish'. */
3763 0 : if (swapped)
3764 : {
3765 0 : recog_data.operand[commutative] = substed_operand[commutative];
3766 0 : recog_data.operand[commutative + 1]
3767 0 : = substed_operand[commutative + 1];
3768 : }
3769 0 : for (i = 0; i < noperands; i++)
3770 : {
3771 0 : goal_alternative_win[i] = this_alternative_win[i];
3772 0 : goal_alternative_match_win[i] = this_alternative_match_win[i];
3773 0 : goal_alternative[i] = this_alternative[i];
3774 0 : goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3775 0 : goal_alternative_matches[i] = this_alternative_matches[i];
3776 0 : goal_alternative_earlyclobber[i]
3777 0 : = this_alternative_earlyclobber[i];
3778 : }
3779 0 : goal_alternative_number = this_alternative_number;
3780 0 : goal_alternative_swapped = swapped;
3781 0 : goal_earlyclobber = this_earlyclobber;
3782 0 : goto finish;
3783 : }
3784 :
3785 : /* REJECT, set by the ! and ? constraint characters and when a register
3786 : would be reloaded into a non-preferred class, discourages the use of
3787 : this alternative for a reload goal. REJECT is incremented by six
3788 : for each ? and two for each non-preferred class. */
3789 0 : losers = losers * 6 + reject;
3790 :
3791 : /* If this alternative can be made to work by reloading,
3792 : and it needs less reloading than the others checked so far,
3793 : record it as the chosen goal for reloading. */
3794 0 : if (! bad)
3795 : {
3796 0 : if (best > losers)
3797 : {
3798 0 : for (i = 0; i < noperands; i++)
3799 : {
3800 0 : goal_alternative[i] = this_alternative[i];
3801 0 : goal_alternative_win[i] = this_alternative_win[i];
3802 0 : goal_alternative_match_win[i]
3803 0 : = this_alternative_match_win[i];
3804 0 : goal_alternative_offmemok[i]
3805 0 : = this_alternative_offmemok[i];
3806 0 : goal_alternative_matches[i] = this_alternative_matches[i];
3807 0 : goal_alternative_earlyclobber[i]
3808 0 : = this_alternative_earlyclobber[i];
3809 : }
3810 : goal_alternative_swapped = swapped;
3811 : best = losers;
3812 : goal_alternative_number = this_alternative_number;
3813 : goal_earlyclobber = this_earlyclobber;
3814 : }
3815 : }
3816 :
3817 0 : if (swapped)
3818 : {
3819 : /* If the commutative operands have been swapped, swap
3820 : them back in order to check the next alternative. */
3821 0 : recog_data.operand[commutative] = substed_operand[commutative];
3822 0 : recog_data.operand[commutative + 1] = substed_operand[commutative + 1];
3823 : /* Unswap the duplicates too. */
3824 0 : for (i = 0; i < recog_data.n_dups; i++)
3825 0 : if (recog_data.dup_num[i] == commutative
3826 0 : || recog_data.dup_num[i] == commutative + 1)
3827 0 : *recog_data.dup_loc[i]
3828 0 : = recog_data.operand[(int) recog_data.dup_num[i]];
3829 :
3830 : /* Unswap the operand related information as well. */
3831 0 : std::swap (preferred_class[commutative],
3832 : preferred_class[commutative + 1]);
3833 0 : std::swap (pref_or_nothing[commutative],
3834 : pref_or_nothing[commutative + 1]);
3835 0 : std::swap (address_reloaded[commutative],
3836 : address_reloaded[commutative + 1]);
3837 : }
3838 : }
3839 : }
3840 :
3841 : /* The operands don't meet the constraints.
3842 : goal_alternative describes the alternative
3843 : that we could reach by reloading the fewest operands.
3844 : Reload so as to fit it. */
3845 :
3846 0 : if (best == MAX_RECOG_OPERANDS * 2 + 600)
3847 : {
3848 : /* No alternative works with reloads?? */
3849 0 : if (insn_code_number >= 0)
3850 0 : fatal_insn ("unable to generate reloads for:", insn);
3851 0 : error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3852 : /* Avoid further trouble with this insn. */
3853 0 : PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3854 0 : n_reloads = 0;
3855 0 : return 0;
3856 : }
3857 :
3858 : /* Jump to `finish' from above if all operands are valid already.
3859 : In that case, goal_alternative_win is all 1. */
3860 0 : finish:
3861 :
3862 : /* Right now, for any pair of operands I and J that are required to match,
3863 : with I < J,
3864 : goal_alternative_matches[J] is I.
3865 : Set up goal_alternative_matched as the inverse function:
3866 : goal_alternative_matched[I] = J. */
3867 :
3868 0 : for (i = 0; i < noperands; i++)
3869 0 : goal_alternative_matched[i] = -1;
3870 :
3871 0 : for (i = 0; i < noperands; i++)
3872 0 : if (! goal_alternative_win[i]
3873 0 : && goal_alternative_matches[i] >= 0)
3874 0 : goal_alternative_matched[goal_alternative_matches[i]] = i;
3875 :
3876 0 : for (i = 0; i < noperands; i++)
3877 0 : goal_alternative_win[i] |= goal_alternative_match_win[i];
3878 :
3879 : /* If the best alternative is with operands 1 and 2 swapped,
3880 : consider them swapped before reporting the reloads. Update the
3881 : operand numbers of any reloads already pushed. */
3882 :
3883 0 : if (goal_alternative_swapped)
3884 : {
3885 0 : std::swap (substed_operand[commutative],
3886 0 : substed_operand[commutative + 1]);
3887 0 : std::swap (recog_data.operand[commutative],
3888 0 : recog_data.operand[commutative + 1]);
3889 0 : std::swap (*recog_data.operand_loc[commutative],
3890 0 : *recog_data.operand_loc[commutative + 1]);
3891 :
3892 0 : for (i = 0; i < recog_data.n_dups; i++)
3893 0 : if (recog_data.dup_num[i] == commutative
3894 0 : || recog_data.dup_num[i] == commutative + 1)
3895 0 : *recog_data.dup_loc[i]
3896 0 : = recog_data.operand[(int) recog_data.dup_num[i]];
3897 :
3898 0 : for (i = 0; i < n_reloads; i++)
3899 : {
3900 0 : if (rld[i].opnum == commutative)
3901 0 : rld[i].opnum = commutative + 1;
3902 0 : else if (rld[i].opnum == commutative + 1)
3903 0 : rld[i].opnum = commutative;
3904 : }
3905 : }
3906 :
3907 0 : for (i = 0; i < noperands; i++)
3908 : {
3909 0 : operand_reloadnum[i] = -1;
3910 :
3911 : /* If this is an earlyclobber operand, we need to widen the scope.
3912 : The reload must remain valid from the start of the insn being
3913 : reloaded until after the operand is stored into its destination.
3914 : We approximate this with RELOAD_OTHER even though we know that we
3915 : do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3916 :
3917 : One special case that is worth checking is when we have an
3918 : output that is earlyclobber but isn't used past the insn (typically
3919 : a SCRATCH). In this case, we only need have the reload live
3920 : through the insn itself, but not for any of our input or output
3921 : reloads.
3922 : But we must not accidentally narrow the scope of an existing
3923 : RELOAD_OTHER reload - leave these alone.
3924 :
3925 : In any case, anything needed to address this operand can remain
3926 : however they were previously categorized. */
3927 :
3928 0 : if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3929 0 : operand_type[i]
3930 0 : = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3931 0 : ? RELOAD_FOR_INSN : RELOAD_OTHER);
3932 : }
3933 :
3934 : /* Any constants that aren't allowed and can't be reloaded
3935 : into registers are here changed into memory references. */
3936 0 : for (i = 0; i < noperands; i++)
3937 0 : if (! goal_alternative_win[i])
3938 : {
3939 0 : rtx op = recog_data.operand[i];
3940 0 : rtx subreg = NULL_RTX;
3941 0 : rtx plus = NULL_RTX;
3942 0 : machine_mode mode = operand_mode[i];
3943 :
3944 : /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3945 : push_reload so we have to let them pass here. */
3946 0 : if (GET_CODE (op) == SUBREG)
3947 : {
3948 0 : subreg = op;
3949 0 : op = SUBREG_REG (op);
3950 0 : mode = GET_MODE (op);
3951 : }
3952 :
3953 0 : if (GET_CODE (op) == PLUS)
3954 : {
3955 0 : plus = op;
3956 0 : op = XEXP (op, 1);
3957 : }
3958 :
3959 0 : if (CONST_POOL_OK_P (mode, op)
3960 0 : && ((targetm.preferred_reload_class (op, goal_alternative[i])
3961 : == NO_REGS)
3962 : || no_input_reloads))
3963 : {
3964 0 : int this_address_reloaded;
3965 0 : rtx tem = force_const_mem (mode, op);
3966 :
3967 : /* If we stripped a SUBREG or a PLUS above add it back. */
3968 0 : if (plus != NULL_RTX)
3969 0 : tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3970 :
3971 0 : if (subreg != NULL_RTX)
3972 0 : tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3973 :
3974 0 : this_address_reloaded = 0;
3975 0 : substed_operand[i] = recog_data.operand[i]
3976 0 : = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3977 : 0, insn, &this_address_reloaded);
3978 :
3979 : /* If the alternative accepts constant pool refs directly
3980 : there will be no reload needed at all. */
3981 0 : if (plus == NULL_RTX
3982 0 : && subreg == NULL_RTX
3983 0 : && alternative_allows_const_pool_ref (this_address_reloaded != 1
3984 : ? substed_operand[i]
3985 : : NULL,
3986 0 : recog_data.constraints[i],
3987 : goal_alternative_number))
3988 0 : goal_alternative_win[i] = 1;
3989 : }
3990 : }
3991 :
3992 : /* Record the values of the earlyclobber operands for the caller. */
3993 0 : if (goal_earlyclobber)
3994 0 : for (i = 0; i < noperands; i++)
3995 0 : if (goal_alternative_earlyclobber[i])
3996 0 : reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3997 :
3998 : /* Now record reloads for all the operands that need them. */
3999 0 : for (i = 0; i < noperands; i++)
4000 0 : if (! goal_alternative_win[i])
4001 : {
4002 : /* Operands that match previous ones have already been handled. */
4003 0 : if (goal_alternative_matches[i] >= 0)
4004 : ;
4005 : /* Handle an operand with a nonoffsettable address
4006 : appearing where an offsettable address will do
4007 : by reloading the address into a base register.
4008 :
4009 : ??? We can also do this when the operand is a register and
4010 : reg_equiv_mem is not offsettable, but this is a bit tricky,
4011 : so we don't bother with it. It may not be worth doing. */
4012 0 : else if (goal_alternative_matched[i] == -1
4013 0 : && goal_alternative_offmemok[i]
4014 0 : && MEM_P (recog_data.operand[i]))
4015 : {
4016 : /* If the address to be reloaded is a VOIDmode constant,
4017 : use the default address mode as mode of the reload register,
4018 : as would have been done by find_reloads_address. */
4019 0 : addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
4020 0 : machine_mode address_mode;
4021 :
4022 0 : address_mode = get_address_mode (recog_data.operand[i]);
4023 0 : operand_reloadnum[i]
4024 0 : = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
4025 0 : &XEXP (recog_data.operand[i], 0), (rtx*) 0,
4026 : base_reg_class (VOIDmode, as, MEM, SCRATCH, insn),
4027 : address_mode,
4028 : VOIDmode, 0, 0, i, RELOAD_OTHER);
4029 0 : rld[operand_reloadnum[i]].inc
4030 0 : = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
4031 :
4032 : /* If this operand is an output, we will have made any
4033 : reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4034 : now we are treating part of the operand as an input, so
4035 : we must change these to RELOAD_FOR_OTHER_ADDRESS. */
4036 :
4037 0 : if (modified[i] == RELOAD_WRITE)
4038 : {
4039 0 : for (j = 0; j < n_reloads; j++)
4040 : {
4041 0 : if (rld[j].opnum == i)
4042 : {
4043 0 : if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
4044 0 : rld[j].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4045 0 : else if (rld[j].when_needed
4046 : == RELOAD_FOR_OUTADDR_ADDRESS)
4047 0 : rld[j].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4048 : }
4049 : }
4050 : }
4051 : }
4052 0 : else if (goal_alternative_matched[i] == -1)
4053 : {
4054 0 : operand_reloadnum[i]
4055 0 : = push_reload ((modified[i] != RELOAD_WRITE
4056 0 : ? recog_data.operand[i] : 0),
4057 : (modified[i] != RELOAD_READ
4058 0 : ? recog_data.operand[i] : 0),
4059 : (modified[i] != RELOAD_WRITE
4060 0 : ? recog_data.operand_loc[i] : 0),
4061 : (modified[i] != RELOAD_READ
4062 0 : ? recog_data.operand_loc[i] : 0),
4063 0 : (enum reg_class) goal_alternative[i],
4064 : (modified[i] == RELOAD_WRITE
4065 : ? VOIDmode : operand_mode[i]),
4066 0 : (modified[i] == RELOAD_READ
4067 : ? VOIDmode : operand_mode[i]),
4068 : (insn_code_number < 0 ? 0
4069 0 : : insn_data[insn_code_number].operand[i].strict_low),
4070 : 0, i, operand_type[i]);
4071 : }
4072 : /* In a matching pair of operands, one must be input only
4073 : and the other must be output only.
4074 : Pass the input operand as IN and the other as OUT. */
4075 0 : else if (modified[i] == RELOAD_READ
4076 0 : && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4077 : {
4078 0 : operand_reloadnum[i]
4079 0 : = push_reload (recog_data.operand[i],
4080 : recog_data.operand[goal_alternative_matched[i]],
4081 : recog_data.operand_loc[i],
4082 0 : recog_data.operand_loc[goal_alternative_matched[i]],
4083 0 : (enum reg_class) goal_alternative[i],
4084 : operand_mode[i],
4085 : operand_mode[goal_alternative_matched[i]],
4086 : 0, 0, i, RELOAD_OTHER);
4087 0 : operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4088 : }
4089 0 : else if (modified[i] == RELOAD_WRITE
4090 0 : && modified[goal_alternative_matched[i]] == RELOAD_READ)
4091 : {
4092 0 : operand_reloadnum[goal_alternative_matched[i]]
4093 0 : = push_reload (recog_data.operand[goal_alternative_matched[i]],
4094 : recog_data.operand[i],
4095 : recog_data.operand_loc[goal_alternative_matched[i]],
4096 0 : recog_data.operand_loc[i],
4097 0 : (enum reg_class) goal_alternative[i],
4098 : operand_mode[goal_alternative_matched[i]],
4099 : operand_mode[i],
4100 : 0, 0, i, RELOAD_OTHER);
4101 0 : operand_reloadnum[i] = output_reloadnum;
4102 : }
4103 : else
4104 : {
4105 0 : gcc_assert (insn_code_number < 0);
4106 0 : error_for_asm (insn, "inconsistent operand constraints "
4107 : "in an %<asm%>");
4108 : /* Avoid further trouble with this insn. */
4109 0 : PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4110 0 : n_reloads = 0;
4111 0 : return 0;
4112 : }
4113 : }
4114 0 : else if (goal_alternative_matched[i] < 0
4115 0 : && goal_alternative_matches[i] < 0
4116 0 : && address_operand_reloaded[i] != 1
4117 0 : && optimize)
4118 : {
4119 : /* For each non-matching operand that's a MEM or a pseudo-register
4120 : that didn't get a hard register, make an optional reload.
4121 : This may get done even if the insn needs no reloads otherwise. */
4122 :
4123 0 : rtx operand = recog_data.operand[i];
4124 :
4125 0 : while (GET_CODE (operand) == SUBREG)
4126 0 : operand = SUBREG_REG (operand);
4127 0 : if ((MEM_P (operand)
4128 0 : || (REG_P (operand)
4129 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4130 : /* If this is only for an output, the optional reload would not
4131 : actually cause us to use a register now, just note that
4132 : something is stored here. */
4133 0 : && (goal_alternative[i] != NO_REGS
4134 0 : || modified[i] == RELOAD_WRITE)
4135 : && ! no_input_reloads
4136 : /* An optional output reload might allow to delete INSN later.
4137 : We mustn't make in-out reloads on insns that are not permitted
4138 : output reloads.
4139 : If this is an asm, we can't delete it; we must not even call
4140 : push_reload for an optional output reload in this case,
4141 : because we can't be sure that the constraint allows a register,
4142 : and push_reload verifies the constraints for asms. */
4143 0 : && (modified[i] == RELOAD_READ
4144 0 : || (! no_output_reloads && ! this_insn_is_asm)))
4145 0 : operand_reloadnum[i]
4146 0 : = push_reload ((modified[i] != RELOAD_WRITE
4147 : ? recog_data.operand[i] : 0),
4148 : (modified[i] != RELOAD_READ
4149 : ? recog_data.operand[i] : 0),
4150 : (modified[i] != RELOAD_WRITE
4151 : ? recog_data.operand_loc[i] : 0),
4152 : (modified[i] != RELOAD_READ
4153 : ? recog_data.operand_loc[i] : 0),
4154 : (enum reg_class) goal_alternative[i],
4155 : (modified[i] == RELOAD_WRITE
4156 : ? VOIDmode : operand_mode[i]),
4157 : (modified[i] == RELOAD_READ
4158 : ? VOIDmode : operand_mode[i]),
4159 : (insn_code_number < 0 ? 0
4160 0 : : insn_data[insn_code_number].operand[i].strict_low),
4161 : 1, i, operand_type[i]);
4162 : /* If a memory reference remains (either as a MEM or a pseudo that
4163 : did not get a hard register), yet we can't make an optional
4164 : reload, check if this is actually a pseudo register reference;
4165 : we then need to emit a USE and/or a CLOBBER so that reload
4166 : inheritance will do the right thing. */
4167 0 : else if (replace
4168 0 : && (MEM_P (operand)
4169 0 : || (REG_P (operand)
4170 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4171 0 : && reg_renumber [REGNO (operand)] < 0)))
4172 : {
4173 0 : operand = *recog_data.operand_loc[i];
4174 :
4175 0 : while (GET_CODE (operand) == SUBREG)
4176 0 : operand = SUBREG_REG (operand);
4177 0 : if (REG_P (operand))
4178 : {
4179 0 : if (modified[i] != RELOAD_WRITE)
4180 : /* We mark the USE with QImode so that we recognize
4181 : it as one that can be safely deleted at the end
4182 : of reload. */
4183 0 : PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4184 : insn), QImode);
4185 0 : if (modified[i] != RELOAD_READ)
4186 0 : emit_insn_after (gen_clobber (operand), insn);
4187 : }
4188 : }
4189 : }
4190 0 : else if (goal_alternative_matches[i] >= 0
4191 0 : && goal_alternative_win[goal_alternative_matches[i]]
4192 0 : && modified[i] == RELOAD_READ
4193 0 : && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4194 0 : && ! no_input_reloads && ! no_output_reloads
4195 0 : && optimize)
4196 : {
4197 : /* Similarly, make an optional reload for a pair of matching
4198 : objects that are in MEM or a pseudo that didn't get a hard reg. */
4199 :
4200 0 : rtx operand = recog_data.operand[i];
4201 :
4202 0 : while (GET_CODE (operand) == SUBREG)
4203 0 : operand = SUBREG_REG (operand);
4204 0 : if ((MEM_P (operand)
4205 0 : || (REG_P (operand)
4206 0 : && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4207 0 : && (goal_alternative[goal_alternative_matches[i]] != NO_REGS))
4208 0 : operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4209 0 : = push_reload (recog_data.operand[goal_alternative_matches[i]],
4210 : recog_data.operand[i],
4211 : recog_data.operand_loc[goal_alternative_matches[i]],
4212 : recog_data.operand_loc[i],
4213 : (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4214 : operand_mode[goal_alternative_matches[i]],
4215 : operand_mode[i],
4216 : 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4217 : }
4218 :
4219 : /* Perform whatever substitutions on the operands we are supposed
4220 : to make due to commutativity or replacement of registers
4221 : with equivalent constants or memory slots. */
4222 :
4223 0 : for (i = 0; i < noperands; i++)
4224 : {
4225 : /* We only do this on the last pass through reload, because it is
4226 : possible for some data (like reg_equiv_address) to be changed during
4227 : later passes. Moreover, we lose the opportunity to get a useful
4228 : reload_{in,out}_reg when we do these replacements. */
4229 :
4230 0 : if (replace)
4231 : {
4232 0 : rtx substitution = substed_operand[i];
4233 :
4234 0 : *recog_data.operand_loc[i] = substitution;
4235 :
4236 : /* If we're replacing an operand with a LABEL_REF, we need to
4237 : make sure that there's a REG_LABEL_OPERAND note attached to
4238 : this instruction. */
4239 0 : if (GET_CODE (substitution) == LABEL_REF
4240 0 : && !find_reg_note (insn, REG_LABEL_OPERAND,
4241 0 : label_ref_label (substitution))
4242 : /* For a JUMP_P, if it was a branch target it must have
4243 : already been recorded as such. */
4244 0 : && (!JUMP_P (insn)
4245 0 : || !label_is_jump_target_p (label_ref_label (substitution),
4246 : insn)))
4247 : {
4248 0 : add_reg_note (insn, REG_LABEL_OPERAND,
4249 0 : label_ref_label (substitution));
4250 0 : if (LABEL_P (label_ref_label (substitution)))
4251 0 : ++LABEL_NUSES (label_ref_label (substitution));
4252 : }
4253 :
4254 : }
4255 : else
4256 0 : retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4257 : }
4258 :
4259 : /* If this insn pattern contains any MATCH_DUP's, make sure that
4260 : they will be substituted if the operands they match are substituted.
4261 : Also do now any substitutions we already did on the operands.
4262 :
4263 : Don't do this if we aren't making replacements because we might be
4264 : propagating things allocated by frame pointer elimination into places
4265 : it doesn't expect. */
4266 :
4267 0 : if (insn_code_number >= 0 && replace)
4268 0 : for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4269 : {
4270 0 : int opno = recog_data.dup_num[i];
4271 0 : *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4272 0 : dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4273 : }
4274 :
4275 : #if 0
4276 : /* This loses because reloading of prior insns can invalidate the equivalence
4277 : (or at least find_equiv_reg isn't smart enough to find it any more),
4278 : causing this insn to need more reload regs than it needed before.
4279 : It may be too late to make the reload regs available.
4280 : Now this optimization is done safely in choose_reload_regs. */
4281 :
4282 : /* For each reload of a reg into some other class of reg,
4283 : search for an existing equivalent reg (same value now) in the right class.
4284 : We can use it as long as we don't need to change its contents. */
4285 : for (i = 0; i < n_reloads; i++)
4286 : if (rld[i].reg_rtx == 0
4287 : && rld[i].in != 0
4288 : && REG_P (rld[i].in)
4289 : && rld[i].out == 0)
4290 : {
4291 : rld[i].reg_rtx
4292 : = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4293 : static_reload_reg_p, 0, rld[i].inmode);
4294 : /* Prevent generation of insn to load the value
4295 : because the one we found already has the value. */
4296 : if (rld[i].reg_rtx)
4297 : rld[i].in = rld[i].reg_rtx;
4298 : }
4299 : #endif
4300 :
4301 : /* If we detected error and replaced asm instruction by USE, forget about the
4302 : reloads. */
4303 0 : if (GET_CODE (PATTERN (insn)) == USE
4304 0 : && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4305 0 : n_reloads = 0;
4306 :
4307 : /* Perhaps an output reload can be combined with another
4308 : to reduce needs by one. */
4309 0 : if (!goal_earlyclobber)
4310 0 : combine_reloads ();
4311 :
4312 : /* If we have a pair of reloads for parts of an address, they are reloading
4313 : the same object, the operands themselves were not reloaded, and they
4314 : are for two operands that are supposed to match, merge the reloads and
4315 : change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4316 :
4317 0 : for (i = 0; i < n_reloads; i++)
4318 : {
4319 0 : int k;
4320 :
4321 0 : for (j = i + 1; j < n_reloads; j++)
4322 0 : if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4323 0 : || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4324 0 : || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4325 0 : || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4326 0 : && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4327 0 : || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4328 0 : || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4329 0 : || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4330 0 : && rtx_equal_p (rld[i].in, rld[j].in)
4331 0 : && (operand_reloadnum[rld[i].opnum] < 0
4332 0 : || rld[operand_reloadnum[rld[i].opnum]].optional)
4333 0 : && (operand_reloadnum[rld[j].opnum] < 0
4334 0 : || rld[operand_reloadnum[rld[j].opnum]].optional)
4335 0 : && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4336 0 : || (goal_alternative_matches[rld[j].opnum]
4337 : == rld[i].opnum)))
4338 : {
4339 0 : for (k = 0; k < n_replacements; k++)
4340 0 : if (replacements[k].what == j)
4341 0 : replacements[k].what = i;
4342 :
4343 0 : if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4344 0 : || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4345 0 : rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4346 : else
4347 0 : rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4348 0 : rld[j].in = 0;
4349 : }
4350 : }
4351 :
4352 : /* Scan all the reloads and update their type.
4353 : If a reload is for the address of an operand and we didn't reload
4354 : that operand, change the type. Similarly, change the operand number
4355 : of a reload when two operands match. If a reload is optional, treat it
4356 : as though the operand isn't reloaded.
4357 :
4358 : ??? This latter case is somewhat odd because if we do the optional
4359 : reload, it means the object is hanging around. Thus we need only
4360 : do the address reload if the optional reload was NOT done.
4361 :
4362 : Change secondary reloads to be the address type of their operand, not
4363 : the normal type.
4364 :
4365 : If an operand's reload is now RELOAD_OTHER, change any
4366 : RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4367 : RELOAD_FOR_OTHER_ADDRESS. */
4368 :
4369 0 : for (i = 0; i < n_reloads; i++)
4370 : {
4371 0 : if (rld[i].secondary_p
4372 0 : && rld[i].when_needed == operand_type[rld[i].opnum])
4373 0 : rld[i].when_needed = address_type[rld[i].opnum];
4374 :
4375 0 : if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4376 0 : || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4377 0 : || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4378 0 : || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4379 0 : && (operand_reloadnum[rld[i].opnum] < 0
4380 0 : || rld[operand_reloadnum[rld[i].opnum]].optional))
4381 : {
4382 : /* If we have a secondary reload to go along with this reload,
4383 : change its type to RELOAD_FOR_OPADDR_ADDR. */
4384 :
4385 0 : if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4386 0 : || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4387 0 : && rld[i].secondary_in_reload != -1)
4388 : {
4389 0 : int secondary_in_reload = rld[i].secondary_in_reload;
4390 :
4391 0 : rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4392 :
4393 : /* If there's a tertiary reload we have to change it also. */
4394 0 : if (secondary_in_reload > 0
4395 0 : && rld[secondary_in_reload].secondary_in_reload != -1)
4396 0 : rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4397 0 : = RELOAD_FOR_OPADDR_ADDR;
4398 : }
4399 :
4400 0 : if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4401 0 : || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4402 0 : && rld[i].secondary_out_reload != -1)
4403 : {
4404 0 : int secondary_out_reload = rld[i].secondary_out_reload;
4405 :
4406 0 : rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4407 :
4408 : /* If there's a tertiary reload we have to change it also. */
4409 0 : if (secondary_out_reload
4410 0 : && rld[secondary_out_reload].secondary_out_reload != -1)
4411 0 : rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4412 0 : = RELOAD_FOR_OPADDR_ADDR;
4413 : }
4414 :
4415 0 : if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4416 0 : || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4417 0 : rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4418 : else
4419 0 : rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4420 : }
4421 :
4422 0 : if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4423 0 : || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4424 0 : && operand_reloadnum[rld[i].opnum] >= 0
4425 0 : && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4426 : == RELOAD_OTHER))
4427 0 : rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4428 :
4429 0 : if (goal_alternative_matches[rld[i].opnum] >= 0)
4430 0 : rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4431 : }
4432 :
4433 : /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4434 : If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4435 : reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4436 :
4437 : choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4438 : conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4439 : single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4440 : However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4441 : then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4442 : RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4443 : This is complicated by the fact that a single operand can have more
4444 : than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4445 : choose_reload_regs without affecting code quality, and cases that
4446 : actually fail are extremely rare, so it turns out to be better to fix
4447 : the problem here by not generating cases that choose_reload_regs will
4448 : fail for. */
4449 : /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4450 : RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4451 : a single operand.
4452 : We can reduce the register pressure by exploiting that a
4453 : RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4454 : does not conflict with any of them, if it is only used for the first of
4455 : the RELOAD_FOR_X_ADDRESS reloads. */
4456 : {
4457 0 : int first_op_addr_num = -2;
4458 : int first_inpaddr_num[MAX_RECOG_OPERANDS];
4459 : int first_outpaddr_num[MAX_RECOG_OPERANDS];
4460 0 : int need_change = 0;
4461 : /* We use last_op_addr_reload and the contents of the above arrays
4462 : first as flags - -2 means no instance encountered, -1 means exactly
4463 : one instance encountered.
4464 : If more than one instance has been encountered, we store the reload
4465 : number of the first reload of the kind in question; reload numbers
4466 : are known to be non-negative. */
4467 0 : for (i = 0; i < noperands; i++)
4468 0 : first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4469 0 : for (i = n_reloads - 1; i >= 0; i--)
4470 : {
4471 0 : switch (rld[i].when_needed)
4472 : {
4473 0 : case RELOAD_FOR_OPERAND_ADDRESS:
4474 0 : if (++first_op_addr_num >= 0)
4475 : {
4476 0 : first_op_addr_num = i;
4477 0 : need_change = 1;
4478 : }
4479 : break;
4480 0 : case RELOAD_FOR_INPUT_ADDRESS:
4481 0 : if (++first_inpaddr_num[rld[i].opnum] >= 0)
4482 : {
4483 0 : first_inpaddr_num[rld[i].opnum] = i;
4484 0 : need_change = 1;
4485 : }
4486 : break;
4487 0 : case RELOAD_FOR_OUTPUT_ADDRESS:
4488 0 : if (++first_outpaddr_num[rld[i].opnum] >= 0)
4489 : {
4490 0 : first_outpaddr_num[rld[i].opnum] = i;
4491 0 : need_change = 1;
4492 : }
4493 : break;
4494 : default:
4495 : break;
4496 : }
4497 : }
4498 :
4499 0 : if (need_change)
4500 : {
4501 0 : for (i = 0; i < n_reloads; i++)
4502 : {
4503 0 : int first_num;
4504 0 : enum reload_type type;
4505 :
4506 0 : switch (rld[i].when_needed)
4507 : {
4508 : case RELOAD_FOR_OPADDR_ADDR:
4509 : first_num = first_op_addr_num;
4510 : type = RELOAD_FOR_OPERAND_ADDRESS;
4511 : break;
4512 0 : case RELOAD_FOR_INPADDR_ADDRESS:
4513 0 : first_num = first_inpaddr_num[rld[i].opnum];
4514 0 : type = RELOAD_FOR_INPUT_ADDRESS;
4515 0 : break;
4516 0 : case RELOAD_FOR_OUTADDR_ADDRESS:
4517 0 : first_num = first_outpaddr_num[rld[i].opnum];
4518 0 : type = RELOAD_FOR_OUTPUT_ADDRESS;
4519 0 : break;
4520 0 : default:
4521 0 : continue;
4522 : }
4523 0 : if (first_num < 0)
4524 0 : continue;
4525 0 : else if (i > first_num)
4526 0 : rld[i].when_needed = type;
4527 : else
4528 : {
4529 : /* Check if the only TYPE reload that uses reload I is
4530 : reload FIRST_NUM. */
4531 0 : for (j = n_reloads - 1; j > first_num; j--)
4532 : {
4533 0 : if (rld[j].when_needed == type
4534 0 : && (rld[i].secondary_p
4535 0 : ? rld[j].secondary_in_reload == i
4536 0 : : reg_mentioned_p (rld[i].in, rld[j].in)))
4537 : {
4538 0 : rld[i].when_needed = type;
4539 0 : break;
4540 : }
4541 : }
4542 : }
4543 : }
4544 : }
4545 : }
4546 :
4547 : /* See if we have any reloads that are now allowed to be merged
4548 : because we've changed when the reload is needed to
4549 : RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4550 : check for the most common cases. */
4551 :
4552 0 : for (i = 0; i < n_reloads; i++)
4553 0 : if (rld[i].in != 0 && rld[i].out == 0
4554 0 : && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4555 0 : || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4556 0 : || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4557 0 : for (j = 0; j < n_reloads; j++)
4558 0 : if (i != j && rld[j].in != 0 && rld[j].out == 0
4559 0 : && rld[j].when_needed == rld[i].when_needed
4560 0 : && MATCHES (rld[i].in, rld[j].in)
4561 0 : && rld[i].rclass == rld[j].rclass
4562 0 : && !rld[i].nocombine && !rld[j].nocombine
4563 0 : && rld[i].reg_rtx == rld[j].reg_rtx)
4564 : {
4565 0 : rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4566 0 : transfer_replacements (i, j);
4567 0 : rld[j].in = 0;
4568 : }
4569 :
4570 : /* Compute reload_mode and reload_nregs. */
4571 0 : for (i = 0; i < n_reloads; i++)
4572 : {
4573 0 : rld[i].mode = rld[i].inmode;
4574 0 : if (rld[i].mode == VOIDmode
4575 0 : || partial_subreg_p (rld[i].mode, rld[i].outmode))
4576 0 : rld[i].mode = rld[i].outmode;
4577 :
4578 0 : rld[i].nregs = ira_reg_class_max_nregs [rld[i].rclass][rld[i].mode];
4579 : }
4580 :
4581 : /* Special case a simple move with an input reload and a
4582 : destination of a hard reg, if the hard reg is ok, use it. */
4583 0 : for (i = 0; i < n_reloads; i++)
4584 0 : if (rld[i].when_needed == RELOAD_FOR_INPUT
4585 0 : && GET_CODE (PATTERN (insn)) == SET
4586 0 : && REG_P (SET_DEST (PATTERN (insn)))
4587 0 : && (SET_SRC (PATTERN (insn)) == rld[i].in
4588 0 : || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4589 0 : && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4590 : {
4591 0 : rtx dest = SET_DEST (PATTERN (insn));
4592 0 : unsigned int regno = REGNO (dest);
4593 :
4594 0 : if (regno < FIRST_PSEUDO_REGISTER
4595 0 : && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4596 0 : && targetm.hard_regno_mode_ok (regno, rld[i].mode))
4597 : {
4598 0 : int nr = hard_regno_nregs (regno, rld[i].mode);
4599 0 : int ok = 1, nri;
4600 :
4601 0 : for (nri = 1; nri < nr; nri ++)
4602 0 : if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4603 : {
4604 : ok = 0;
4605 : break;
4606 : }
4607 :
4608 0 : if (ok)
4609 0 : rld[i].reg_rtx = dest;
4610 : }
4611 : }
4612 :
4613 : return retval;
4614 : }
4615 :
4616 : /* Return true if alternative number ALTNUM in constraint-string
4617 : CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4618 : MEM gives the reference if its address hasn't been fully reloaded,
4619 : otherwise it is NULL. */
4620 :
4621 : static bool
4622 0 : alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4623 : const char *constraint, int altnum)
4624 : {
4625 0 : int c;
4626 :
4627 : /* Skip alternatives before the one requested. */
4628 0 : while (altnum > 0)
4629 : {
4630 0 : while (*constraint++ != ',')
4631 : ;
4632 0 : altnum--;
4633 : }
4634 : /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4635 : If one of them is present, this alternative accepts the result of
4636 : passing a constant-pool reference through find_reloads_toplev.
4637 :
4638 : The same is true of extra memory constraints if the address
4639 : was reloaded into a register. However, the target may elect
4640 : to disallow the original constant address, forcing it to be
4641 : reloaded into a register instead. */
4642 0 : for (; (c = *constraint) && c != ',' && c != '#';
4643 0 : constraint += CONSTRAINT_LEN (c, constraint))
4644 : {
4645 0 : enum constraint_num cn = lookup_constraint (constraint);
4646 0 : if (insn_extra_memory_constraint (cn)
4647 0 : && (mem == NULL || constraint_satisfied_p (mem, cn)))
4648 : return true;
4649 : }
4650 : return false;
4651 : }
4652 :
4653 : /* Scan X for memory references and scan the addresses for reloading.
4654 : Also checks for references to "constant" regs that we want to eliminate
4655 : and replaces them with the values they stand for.
4656 : We may alter X destructively if it contains a reference to such.
4657 : If X is just a constant reg, we return the equivalent value
4658 : instead of X.
4659 :
4660 : IND_LEVELS says how many levels of indirect addressing this machine
4661 : supports.
4662 :
4663 : OPNUM and TYPE identify the purpose of the reload.
4664 :
4665 : IS_SET_DEST is true if X is the destination of a SET, which is not
4666 : appropriate to be replaced by a constant.
4667 :
4668 : INSN, if nonzero, is the insn in which we do the reload. It is used
4669 : to determine if we may generate output reloads, and where to put USEs
4670 : for pseudos that we have to replace with stack slots.
4671 :
4672 : ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4673 : result of find_reloads_address. */
4674 :
4675 : static rtx
4676 0 : find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4677 : int ind_levels, int is_set_dest, rtx_insn *insn,
4678 : int *address_reloaded)
4679 : {
4680 0 : RTX_CODE code = GET_CODE (x);
4681 :
4682 0 : const char *fmt = GET_RTX_FORMAT (code);
4683 0 : int i;
4684 0 : int copied;
4685 :
4686 0 : if (code == REG)
4687 : {
4688 : /* This code is duplicated for speed in find_reloads. */
4689 0 : int regno = REGNO (x);
4690 0 : if (reg_equiv_constant (regno) != 0 && !is_set_dest)
4691 0 : x = reg_equiv_constant (regno);
4692 : #if 0
4693 : /* This creates (subreg (mem...)) which would cause an unnecessary
4694 : reload of the mem. */
4695 : else if (reg_equiv_mem (regno) != 0)
4696 : x = reg_equiv_mem (regno);
4697 : #endif
4698 0 : else if (reg_equiv_memory_loc (regno)
4699 0 : && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
4700 : {
4701 0 : rtx mem = make_memloc (x, regno);
4702 0 : if (reg_equiv_address (regno)
4703 0 : || ! rtx_equal_p (mem, reg_equiv_mem (regno)))
4704 : {
4705 : /* If this is not a toplevel operand, find_reloads doesn't see
4706 : this substitution. We have to emit a USE of the pseudo so
4707 : that delete_output_reload can see it. */
4708 0 : if (replace_reloads && recog_data.operand[opnum] != x)
4709 : /* We mark the USE with QImode so that we recognize it
4710 : as one that can be safely deleted at the end of
4711 : reload. */
4712 0 : PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4713 : QImode);
4714 0 : x = mem;
4715 0 : i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4716 : opnum, type, ind_levels, insn);
4717 0 : if (!rtx_equal_p (x, mem))
4718 0 : push_reg_equiv_alt_mem (regno, x);
4719 0 : if (address_reloaded)
4720 0 : *address_reloaded = i;
4721 : }
4722 : }
4723 0 : return x;
4724 : }
4725 0 : if (code == MEM)
4726 : {
4727 0 : rtx tem = x;
4728 :
4729 0 : i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4730 : opnum, type, ind_levels, insn);
4731 0 : if (address_reloaded)
4732 0 : *address_reloaded = i;
4733 :
4734 0 : return tem;
4735 : }
4736 :
4737 0 : if (code == SUBREG && REG_P (SUBREG_REG (x)))
4738 : {
4739 : /* Check for SUBREG containing a REG that's equivalent to a
4740 : constant. If the constant has a known value, truncate it
4741 : right now. Similarly if we are extracting a single-word of a
4742 : multi-word constant. If the constant is symbolic, allow it
4743 : to be substituted normally. push_reload will strip the
4744 : subreg later. The constant must not be VOIDmode, because we
4745 : will lose the mode of the register (this should never happen
4746 : because one of the cases above should handle it). */
4747 :
4748 0 : int regno = REGNO (SUBREG_REG (x));
4749 0 : rtx tem;
4750 :
4751 0 : if (regno >= FIRST_PSEUDO_REGISTER
4752 0 : && reg_renumber[regno] < 0
4753 0 : && reg_equiv_constant (regno) != 0)
4754 : {
4755 0 : tem =
4756 0 : simplify_gen_subreg (GET_MODE (x), reg_equiv_constant (regno),
4757 0 : GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4758 0 : gcc_assert (tem);
4759 0 : if (CONSTANT_P (tem)
4760 0 : && !targetm.legitimate_constant_p (GET_MODE (x), tem))
4761 : {
4762 0 : tem = force_const_mem (GET_MODE (x), tem);
4763 0 : i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4764 : &XEXP (tem, 0), opnum, type,
4765 : ind_levels, insn);
4766 0 : if (address_reloaded)
4767 0 : *address_reloaded = i;
4768 : }
4769 0 : return tem;
4770 : }
4771 :
4772 : /* If the subreg contains a reg that will be converted to a mem,
4773 : attempt to convert the whole subreg to a (narrower or wider)
4774 : memory reference instead. If this succeeds, we're done --
4775 : otherwise fall through to check whether the inner reg still
4776 : needs address reloads anyway. */
4777 :
4778 0 : if (regno >= FIRST_PSEUDO_REGISTER
4779 0 : && reg_equiv_memory_loc (regno) != 0)
4780 : {
4781 0 : tem = find_reloads_subreg_address (x, opnum, type, ind_levels,
4782 : insn, address_reloaded);
4783 0 : if (tem)
4784 : return tem;
4785 : }
4786 : }
4787 :
4788 0 : for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4789 : {
4790 0 : if (fmt[i] == 'e')
4791 : {
4792 0 : rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4793 : ind_levels, is_set_dest, insn,
4794 : address_reloaded);
4795 : /* If we have replaced a reg with it's equivalent memory loc -
4796 : that can still be handled here e.g. if it's in a paradoxical
4797 : subreg - we must make the change in a copy, rather than using
4798 : a destructive change. This way, find_reloads can still elect
4799 : not to do the change. */
4800 0 : if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4801 : {
4802 0 : x = shallow_copy_rtx (x);
4803 0 : copied = 1;
4804 : }
4805 0 : XEXP (x, i) = new_part;
4806 : }
4807 : }
4808 0 : return x;
4809 : }
4810 :
4811 : /* Return a mem ref for the memory equivalent of reg REGNO.
4812 : This mem ref is not shared with anything. */
4813 :
4814 : static rtx
4815 0 : make_memloc (rtx ad, int regno)
4816 : {
4817 : /* We must rerun eliminate_regs, in case the elimination
4818 : offsets have changed. */
4819 0 : rtx tem
4820 0 : = XEXP (eliminate_regs (reg_equiv_memory_loc (regno), VOIDmode, NULL_RTX),
4821 : 0);
4822 :
4823 : /* If TEM might contain a pseudo, we must copy it to avoid
4824 : modifying it when we do the substitution for the reload. */
4825 0 : if (rtx_varies_p (tem, 0))
4826 0 : tem = copy_rtx (tem);
4827 :
4828 0 : tem = replace_equiv_address_nv (reg_equiv_memory_loc (regno), tem);
4829 0 : tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4830 :
4831 : /* Copy the result if it's still the same as the equivalence, to avoid
4832 : modifying it when we do the substitution for the reload. */
4833 0 : if (tem == reg_equiv_memory_loc (regno))
4834 0 : tem = copy_rtx (tem);
4835 0 : return tem;
4836 : }
4837 :
4838 : /* Returns true if AD could be turned into a valid memory reference
4839 : to mode MODE in address space AS by reloading the part pointed to
4840 : by PART into a register. */
4841 :
4842 : static bool
4843 0 : maybe_memory_address_addr_space_p (machine_mode mode, rtx ad,
4844 : addr_space_t as, rtx *part)
4845 : {
4846 0 : bool retv;
4847 0 : rtx tem = *part;
4848 0 : rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4849 :
4850 0 : *part = reg;
4851 0 : retv = memory_address_addr_space_p (mode, ad, as);
4852 0 : *part = tem;
4853 :
4854 0 : return retv;
4855 : }
4856 :
4857 : /* Record all reloads needed for handling memory address AD
4858 : which appears in *LOC in a memory reference to mode MODE
4859 : which itself is found in location *MEMREFLOC.
4860 : Note that we take shortcuts assuming that no multi-reg machine mode
4861 : occurs as part of an address.
4862 :
4863 : OPNUM and TYPE specify the purpose of this reload.
4864 :
4865 : IND_LEVELS says how many levels of indirect addressing this machine
4866 : supports.
4867 :
4868 : INSN, if nonzero, is the insn in which we do the reload. It is used
4869 : to determine if we may generate output reloads, and where to put USEs
4870 : for pseudos that we have to replace with stack slots.
4871 :
4872 : Value is one if this address is reloaded or replaced as a whole; it is
4873 : zero if the top level of this address was not reloaded or replaced, and
4874 : it is -1 if it may or may not have been reloaded or replaced.
4875 :
4876 : Note that there is no verification that the address will be valid after
4877 : this routine does its work. Instead, we rely on the fact that the address
4878 : was valid when reload started. So we need only undo things that reload
4879 : could have broken. These are wrong register types, pseudos not allocated
4880 : to a hard register, and frame pointer elimination. */
4881 :
4882 : static int
4883 0 : find_reloads_address (machine_mode mode, rtx *memrefloc, rtx ad,
4884 : rtx *loc, int opnum, enum reload_type type,
4885 : int ind_levels, rtx_insn *insn)
4886 : {
4887 0 : addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4888 0 : : ADDR_SPACE_GENERIC;
4889 0 : int regno;
4890 0 : int removed_and = 0;
4891 0 : int op_index;
4892 0 : rtx tem;
4893 :
4894 : /* If the address is a register, see if it is a legitimate address and
4895 : reload if not. We first handle the cases where we need not reload
4896 : or where we must reload in a non-standard way. */
4897 :
4898 0 : if (REG_P (ad))
4899 : {
4900 0 : regno = REGNO (ad);
4901 :
4902 0 : if (reg_equiv_constant (regno) != 0)
4903 : {
4904 0 : find_reloads_address_part (reg_equiv_constant (regno), loc,
4905 : base_reg_class (mode, as, MEM,
4906 : SCRATCH, insn),
4907 0 : GET_MODE (ad), opnum, type, ind_levels);
4908 0 : return 1;
4909 : }
4910 :
4911 0 : tem = reg_equiv_memory_loc (regno);
4912 0 : if (tem != 0)
4913 : {
4914 0 : if (reg_equiv_address (regno) != 0 || num_not_at_initial_offset)
4915 : {
4916 0 : tem = make_memloc (ad, regno);
4917 0 : if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4918 : XEXP (tem, 0),
4919 0 : MEM_ADDR_SPACE (tem)))
4920 : {
4921 0 : rtx orig = tem;
4922 :
4923 0 : find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4924 : &XEXP (tem, 0), opnum,
4925 0 : ADDR_TYPE (type), ind_levels, insn);
4926 0 : if (!rtx_equal_p (tem, orig))
4927 0 : push_reg_equiv_alt_mem (regno, tem);
4928 : }
4929 : /* We can avoid a reload if the register's equivalent memory
4930 : expression is valid as an indirect memory address.
4931 : But not all addresses are valid in a mem used as an indirect
4932 : address: only reg or reg+constant. */
4933 :
4934 0 : if (ind_levels > 0
4935 0 : && strict_memory_address_addr_space_p (mode, tem, as)
4936 0 : && (REG_P (XEXP (tem, 0))
4937 0 : || (GET_CODE (XEXP (tem, 0)) == PLUS
4938 0 : && REG_P (XEXP (XEXP (tem, 0), 0))
4939 0 : && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4940 : {
4941 : /* TEM is not the same as what we'll be replacing the
4942 : pseudo with after reload, put a USE in front of INSN
4943 : in the final reload pass. */
4944 0 : if (replace_reloads
4945 0 : && num_not_at_initial_offset
4946 0 : && ! rtx_equal_p (tem, reg_equiv_mem (regno)))
4947 : {
4948 0 : *loc = tem;
4949 : /* We mark the USE with QImode so that we
4950 : recognize it as one that can be safely
4951 : deleted at the end of reload. */
4952 0 : PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4953 : insn), QImode);
4954 :
4955 : /* This doesn't really count as replacing the address
4956 : as a whole, since it is still a memory access. */
4957 : }
4958 : return 0;
4959 : }
4960 0 : ad = tem;
4961 : }
4962 : }
4963 :
4964 : /* The only remaining case where we can avoid a reload is if this is a
4965 : hard register that is valid as a base register and which is not the
4966 : subject of a CLOBBER in this insn. */
4967 :
4968 0 : else if (regno < FIRST_PSEUDO_REGISTER
4969 0 : && regno_ok_for_base_p (regno, mode, as, MEM, SCRATCH)
4970 0 : && ! regno_clobbered_p (regno, this_insn, mode, 0))
4971 : return 0;
4972 :
4973 : /* If we do not have one of the cases above, we must do the reload. */
4974 0 : push_reload (ad, NULL_RTX, loc, (rtx*) 0,
4975 : base_reg_class (mode, as, MEM, SCRATCH, insn),
4976 0 : GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4977 0 : return 1;
4978 : }
4979 :
4980 0 : if (strict_memory_address_addr_space_p (mode, ad, as))
4981 : {
4982 : /* The address appears valid, so reloads are not needed.
4983 : But the address may contain an eliminable register.
4984 : This can happen because a machine with indirect addressing
4985 : may consider a pseudo register by itself a valid address even when
4986 : it has failed to get a hard reg.
4987 : So do a tree-walk to find and eliminate all such regs. */
4988 :
4989 : /* But first quickly dispose of a common case. */
4990 0 : if (GET_CODE (ad) == PLUS
4991 0 : && CONST_INT_P (XEXP (ad, 1))
4992 0 : && REG_P (XEXP (ad, 0))
4993 0 : && reg_equiv_constant (REGNO (XEXP (ad, 0))) == 0)
4994 : return 0;
4995 :
4996 0 : subst_reg_equivs_changed = 0;
4997 0 : *loc = subst_reg_equivs (ad, insn);
4998 :
4999 0 : if (! subst_reg_equivs_changed)
5000 : return 0;
5001 :
5002 : /* Check result for validity after substitution. */
5003 0 : if (strict_memory_address_addr_space_p (mode, ad, as))
5004 : return 0;
5005 : }
5006 :
5007 : #ifdef LEGITIMIZE_RELOAD_ADDRESS
5008 : do
5009 : {
5010 : if (memrefloc && ADDR_SPACE_GENERIC_P (as))
5011 : {
5012 : LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
5013 : ind_levels, win);
5014 : }
5015 : break;
5016 : win:
5017 : *memrefloc = copy_rtx (*memrefloc);
5018 : XEXP (*memrefloc, 0) = ad;
5019 : move_replacements (&ad, &XEXP (*memrefloc, 0));
5020 : return -1;
5021 : }
5022 : while (0);
5023 : #endif
5024 :
5025 : /* The address is not valid. We have to figure out why. First see if
5026 : we have an outer AND and remove it if so. Then analyze what's inside. */
5027 :
5028 0 : if (GET_CODE (ad) == AND)
5029 : {
5030 0 : removed_and = 1;
5031 0 : loc = &XEXP (ad, 0);
5032 0 : ad = *loc;
5033 : }
5034 :
5035 : /* One possibility for why the address is invalid is that it is itself
5036 : a MEM. This can happen when the frame pointer is being eliminated, a
5037 : pseudo is not allocated to a hard register, and the offset between the
5038 : frame and stack pointers is not its initial value. In that case the
5039 : pseudo will have been replaced by a MEM referring to the
5040 : stack pointer. */
5041 0 : if (MEM_P (ad))
5042 : {
5043 : /* First ensure that the address in this MEM is valid. Then, unless
5044 : indirect addresses are valid, reload the MEM into a register. */
5045 0 : tem = ad;
5046 0 : find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
5047 0 : opnum, ADDR_TYPE (type),
5048 0 : ind_levels == 0 ? 0 : ind_levels - 1, insn);
5049 :
5050 : /* If tem was changed, then we must create a new memory reference to
5051 : hold it and store it back into memrefloc. */
5052 0 : if (tem != ad && memrefloc)
5053 : {
5054 0 : *memrefloc = copy_rtx (*memrefloc);
5055 0 : copy_replacements (tem, XEXP (*memrefloc, 0));
5056 0 : loc = &XEXP (*memrefloc, 0);
5057 0 : if (removed_and)
5058 0 : loc = &XEXP (*loc, 0);
5059 : }
5060 :
5061 : /* Check similar cases as for indirect addresses as above except
5062 : that we can allow pseudos and a MEM since they should have been
5063 : taken care of above. */
5064 :
5065 0 : if (ind_levels == 0
5066 0 : || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5067 0 : || MEM_P (XEXP (tem, 0))
5068 0 : || ! (REG_P (XEXP (tem, 0))
5069 : || (GET_CODE (XEXP (tem, 0)) == PLUS
5070 0 : && REG_P (XEXP (XEXP (tem, 0), 0))
5071 0 : && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5072 : {
5073 : /* Must use TEM here, not AD, since it is the one that will
5074 : have any subexpressions reloaded, if needed. */
5075 0 : push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5076 0 : base_reg_class (mode, as, MEM, SCRATCH), GET_MODE (tem),
5077 : VOIDmode, 0,
5078 : 0, opnum, type);
5079 0 : return ! removed_and;
5080 : }
5081 : else
5082 : return 0;
5083 : }
5084 :
5085 : /* If we have address of a stack slot but it's not valid because the
5086 : displacement is too large, compute the sum in a register.
5087 : Handle all base registers here, not just fp/ap/sp, because on some
5088 : targets (namely SH) we can also get too large displacements from
5089 : big-endian corrections. */
5090 0 : else if (GET_CODE (ad) == PLUS
5091 0 : && REG_P (XEXP (ad, 0))
5092 0 : && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5093 0 : && CONST_INT_P (XEXP (ad, 1))
5094 0 : && (regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, as, PLUS,
5095 : CONST_INT)
5096 : /* Similarly, if we were to reload the base register and the
5097 : mem+offset address is still invalid, then we want to reload
5098 : the whole address, not just the base register. */
5099 0 : || ! maybe_memory_address_addr_space_p
5100 0 : (mode, ad, as, &(XEXP (ad, 0)))))
5101 :
5102 : {
5103 : /* Unshare the MEM rtx so we can safely alter it. */
5104 0 : if (memrefloc)
5105 : {
5106 0 : *memrefloc = copy_rtx (*memrefloc);
5107 0 : loc = &XEXP (*memrefloc, 0);
5108 0 : if (removed_and)
5109 0 : loc = &XEXP (*loc, 0);
5110 : }
5111 :
5112 0 : if (double_reg_address_ok[mode]
5113 0 : && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, as,
5114 : PLUS, CONST_INT))
5115 : {
5116 : /* Unshare the sum as well. */
5117 0 : *loc = ad = copy_rtx (ad);
5118 :
5119 : /* Reload the displacement into an index reg.
5120 : We assume the frame pointer or arg pointer is a base reg. */
5121 0 : find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5122 0 : index_reg_class (insn), GET_MODE (ad), opnum,
5123 : type, ind_levels);
5124 0 : return 0;
5125 : }
5126 : else
5127 : {
5128 : /* If the sum of two regs is not necessarily valid,
5129 : reload the sum into a base reg.
5130 : That will at least work. */
5131 0 : find_reloads_address_part (ad, loc,
5132 : base_reg_class (mode, as, MEM,
5133 : SCRATCH, insn),
5134 0 : GET_MODE (ad), opnum, type, ind_levels);
5135 : }
5136 0 : return ! removed_and;
5137 : }
5138 :
5139 : /* If we have an indexed stack slot, there are three possible reasons why
5140 : it might be invalid: The index might need to be reloaded, the address
5141 : might have been made by frame pointer elimination and hence have a
5142 : constant out of range, or both reasons might apply.
5143 :
5144 : We can easily check for an index needing reload, but even if that is the
5145 : case, we might also have an invalid constant. To avoid making the
5146 : conservative assumption and requiring two reloads, we see if this address
5147 : is valid when not interpreted strictly. If it is, the only problem is
5148 : that the index needs a reload and find_reloads_address_1 will take care
5149 : of it.
5150 :
5151 : Handle all base registers here, not just fp/ap/sp, because on some
5152 : targets (namely SPARC) we can also get invalid addresses from preventive
5153 : subreg big-endian corrections made by find_reloads_toplev. We
5154 : can also get expressions involving LO_SUM (rather than PLUS) from
5155 : find_reloads_subreg_address.
5156 :
5157 : If we decide to do something, it must be that `double_reg_address_ok'
5158 : is true. We generate a reload of the base register + constant and
5159 : rework the sum so that the reload register will be added to the index.
5160 : This is safe because we know the address isn't shared.
5161 :
5162 : We check for the base register as both the first and second operand of
5163 : the innermost PLUS and/or LO_SUM. */
5164 :
5165 0 : for (op_index = 0; op_index < 2; ++op_index)
5166 : {
5167 0 : rtx operand, addend;
5168 0 : enum rtx_code inner_code;
5169 :
5170 0 : if (GET_CODE (ad) != PLUS)
5171 0 : continue;
5172 :
5173 0 : inner_code = GET_CODE (XEXP (ad, 0));
5174 0 : if (!(GET_CODE (ad) == PLUS
5175 0 : && CONST_INT_P (XEXP (ad, 1))
5176 0 : && (inner_code == PLUS || inner_code == LO_SUM)))
5177 0 : continue;
5178 :
5179 0 : operand = XEXP (XEXP (ad, 0), op_index);
5180 0 : if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5181 0 : continue;
5182 :
5183 0 : addend = XEXP (XEXP (ad, 0), 1 - op_index);
5184 :
5185 0 : if ((regno_ok_for_base_p (REGNO (operand), mode, as, inner_code,
5186 0 : GET_CODE (addend))
5187 0 : || operand == frame_pointer_rtx
5188 0 : || (!HARD_FRAME_POINTER_IS_FRAME_POINTER
5189 0 : && operand == hard_frame_pointer_rtx)
5190 0 : || (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5191 0 : && operand == arg_pointer_rtx)
5192 0 : || operand == stack_pointer_rtx)
5193 0 : && ! maybe_memory_address_addr_space_p
5194 0 : (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5195 : {
5196 0 : rtx offset_reg;
5197 0 : enum reg_class cls;
5198 :
5199 0 : offset_reg = plus_constant (GET_MODE (ad), operand,
5200 0 : INTVAL (XEXP (ad, 1)));
5201 :
5202 : /* Form the adjusted address. */
5203 0 : if (GET_CODE (XEXP (ad, 0)) == PLUS)
5204 0 : ad = gen_rtx_PLUS (GET_MODE (ad),
5205 : op_index == 0 ? offset_reg : addend,
5206 : op_index == 0 ? addend : offset_reg);
5207 : else
5208 0 : ad = gen_rtx_LO_SUM (GET_MODE (ad),
5209 : op_index == 0 ? offset_reg : addend,
5210 : op_index == 0 ? addend : offset_reg);
5211 0 : *loc = ad;
5212 :
5213 0 : cls = base_reg_class (mode, as, MEM, GET_CODE (addend), insn);
5214 0 : find_reloads_address_part (XEXP (ad, op_index),
5215 : &XEXP (ad, op_index), cls,
5216 0 : GET_MODE (ad), opnum, type, ind_levels);
5217 0 : find_reloads_address_1 (mode, as,
5218 0 : XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5219 0 : GET_CODE (XEXP (ad, op_index)),
5220 : &XEXP (ad, 1 - op_index), opnum,
5221 : type, 0, insn);
5222 :
5223 0 : return 0;
5224 : }
5225 : }
5226 :
5227 : /* See if address becomes valid when an eliminable register
5228 : in a sum is replaced. */
5229 :
5230 0 : tem = ad;
5231 0 : if (GET_CODE (ad) == PLUS)
5232 0 : tem = subst_indexed_address (ad);
5233 0 : if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5234 : {
5235 : /* Ok, we win that way. Replace any additional eliminable
5236 : registers. */
5237 :
5238 0 : subst_reg_equivs_changed = 0;
5239 0 : tem = subst_reg_equivs (tem, insn);
5240 :
5241 : /* Make sure that didn't make the address invalid again. */
5242 :
5243 0 : if (! subst_reg_equivs_changed
5244 0 : || strict_memory_address_addr_space_p (mode, tem, as))
5245 : {
5246 0 : *loc = tem;
5247 0 : return 0;
5248 : }
5249 : }
5250 :
5251 : /* If constants aren't valid addresses, reload the constant address
5252 : into a register. */
5253 0 : if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5254 : {
5255 0 : machine_mode address_mode = GET_MODE (ad);
5256 0 : if (address_mode == VOIDmode)
5257 0 : address_mode = targetm.addr_space.address_mode (as);
5258 :
5259 : /* If AD is an address in the constant pool, the MEM rtx may be shared.
5260 : Unshare it so we can safely alter it. */
5261 0 : if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5262 0 : && CONSTANT_POOL_ADDRESS_P (ad))
5263 : {
5264 0 : *memrefloc = copy_rtx (*memrefloc);
5265 0 : loc = &XEXP (*memrefloc, 0);
5266 0 : if (removed_and)
5267 0 : loc = &XEXP (*loc, 0);
5268 : }
5269 :
5270 0 : find_reloads_address_part (ad, loc,
5271 : base_reg_class (mode, as, MEM,
5272 : SCRATCH, insn),
5273 : address_mode, opnum, type, ind_levels);
5274 0 : return ! removed_and;
5275 : }
5276 :
5277 0 : return find_reloads_address_1 (mode, as, ad, 0, MEM, SCRATCH, loc,
5278 0 : opnum, type, ind_levels, insn);
5279 : }
5280 :
5281 : /* Find all pseudo regs appearing in AD
5282 : that are eliminable in favor of equivalent values
5283 : and do not have hard regs; replace them by their equivalents.
5284 : INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5285 : front of it for pseudos that we have to replace with stack slots. */
5286 :
5287 : static rtx
5288 0 : subst_reg_equivs (rtx ad, rtx_insn *insn)
5289 : {
5290 0 : RTX_CODE code = GET_CODE (ad);
5291 0 : int i;
5292 0 : const char *fmt;
5293 :
5294 0 : switch (code)
5295 : {
5296 : case HIGH:
5297 : case CONST:
5298 : CASE_CONST_ANY:
5299 : case SYMBOL_REF:
5300 : case LABEL_REF:
5301 : case PC:
5302 : return ad;
5303 :
5304 0 : case REG:
5305 0 : {
5306 0 : int regno = REGNO (ad);
5307 :
5308 0 : if (reg_equiv_constant (regno) != 0)
5309 : {
5310 0 : subst_reg_equivs_changed = 1;
5311 0 : return reg_equiv_constant (regno);
5312 : }
5313 0 : if (reg_equiv_memory_loc (regno) && num_not_at_initial_offset)
5314 : {
5315 0 : rtx mem = make_memloc (ad, regno);
5316 0 : if (! rtx_equal_p (mem, reg_equiv_mem (regno)))
5317 : {
5318 0 : subst_reg_equivs_changed = 1;
5319 : /* We mark the USE with QImode so that we recognize it
5320 : as one that can be safely deleted at the end of
5321 : reload. */
5322 0 : PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5323 : QImode);
5324 0 : return mem;
5325 : }
5326 : }
5327 : }
5328 : return ad;
5329 :
5330 0 : case PLUS:
5331 : /* Quickly dispose of a common case. */
5332 0 : if (XEXP (ad, 0) == frame_pointer_rtx
5333 0 : && CONST_INT_P (XEXP (ad, 1)))
5334 : return ad;
5335 : break;
5336 :
5337 : default:
5338 : break;
5339 : }
5340 :
5341 0 : fmt = GET_RTX_FORMAT (code);
5342 0 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5343 0 : if (fmt[i] == 'e')
5344 0 : XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5345 : return ad;
5346 : }
5347 :
5348 : /* Compute the sum of X and Y, making canonicalizations assumed in an
5349 : address, namely: sum constant integers, surround the sum of two
5350 : constants with a CONST, put the constant as the second operand, and
5351 : group the constant on the outermost sum.
5352 :
5353 : This routine assumes both inputs are already in canonical form. */
5354 :
5355 : rtx
5356 0 : form_sum (machine_mode mode, rtx x, rtx y)
5357 : {
5358 0 : rtx tem;
5359 :
5360 0 : gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5361 0 : gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5362 :
5363 0 : if (CONST_INT_P (x))
5364 0 : return plus_constant (mode, y, INTVAL (x));
5365 0 : else if (CONST_INT_P (y))
5366 0 : return plus_constant (mode, x, INTVAL (y));
5367 0 : else if (CONSTANT_P (x))
5368 0 : tem = x, x = y, y = tem;
5369 :
5370 0 : if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5371 0 : return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5372 :
5373 : /* Note that if the operands of Y are specified in the opposite
5374 : order in the recursive calls below, infinite recursion will occur. */
5375 0 : if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5376 0 : return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5377 :
5378 : /* If both constant, encapsulate sum. Otherwise, just form sum. A
5379 : constant will have been placed second. */
5380 0 : if (CONSTANT_P (x) && CONSTANT_P (y))
5381 : {
5382 0 : if (GET_CODE (x) == CONST)
5383 0 : x = XEXP (x, 0);
5384 0 : if (GET_CODE (y) == CONST)
5385 0 : y = XEXP (y, 0);
5386 :
5387 0 : return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5388 : }
5389 :
5390 0 : return gen_rtx_PLUS (mode, x, y);
5391 : }
5392 :
5393 : /* If ADDR is a sum containing a pseudo register that should be
5394 : replaced with a constant (from reg_equiv_constant),
5395 : return the result of doing so, and also apply the associative
5396 : law so that the result is more likely to be a valid address.
5397 : (But it is not guaranteed to be one.)
5398 :
5399 : Note that at most one register is replaced, even if more are
5400 : replaceable. Also, we try to put the result into a canonical form
5401 : so it is more likely to be a valid address.
5402 :
5403 : In all other cases, return ADDR. */
5404 :
5405 : static rtx
5406 0 : subst_indexed_address (rtx addr)
5407 : {
5408 0 : rtx op0 = 0, op1 = 0, op2 = 0;
5409 0 : rtx tem;
5410 0 : int regno;
5411 :
5412 0 : if (GET_CODE (addr) == PLUS)
5413 : {
5414 : /* Try to find a register to replace. */
5415 0 : op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5416 0 : if (REG_P (op0)
5417 0 : && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5418 0 : && reg_renumber[regno] < 0
5419 0 : && reg_equiv_constant (regno) != 0)
5420 : op0 = reg_equiv_constant (regno);
5421 0 : else if (REG_P (op1)
5422 0 : && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5423 0 : && reg_renumber[regno] < 0
5424 0 : && reg_equiv_constant (regno) != 0)
5425 : op1 = reg_equiv_constant (regno);
5426 0 : else if (GET_CODE (op0) == PLUS
5427 0 : && (tem = subst_indexed_address (op0)) != op0)
5428 : op0 = tem;
5429 0 : else if (GET_CODE (op1) == PLUS
5430 0 : && (tem = subst_indexed_address (op1)) != op1)
5431 : op1 = tem;
5432 : else
5433 : return addr;
5434 :
5435 : /* Pick out up to three things to add. */
5436 0 : if (GET_CODE (op1) == PLUS)
5437 0 : op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5438 0 : else if (GET_CODE (op0) == PLUS)
5439 0 : op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5440 :
5441 : /* Compute the sum. */
5442 0 : if (op2 != 0)
5443 0 : op1 = form_sum (GET_MODE (addr), op1, op2);
5444 0 : if (op1 != 0)
5445 0 : op0 = form_sum (GET_MODE (addr), op0, op1);
5446 :
5447 : return op0;
5448 : }
5449 : return addr;
5450 : }
5451 :
5452 : /* Update the REG_INC notes for an insn. It updates all REG_INC
5453 : notes for the instruction which refer to REGNO the to refer
5454 : to the reload number.
5455 :
5456 : INSN is the insn for which any REG_INC notes need updating.
5457 :
5458 : REGNO is the register number which has been reloaded.
5459 :
5460 : RELOADNUM is the reload number. */
5461 :
5462 : static void
5463 0 : update_auto_inc_notes (rtx_insn *insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5464 : int reloadnum ATTRIBUTE_UNUSED)
5465 : {
5466 0 : if (!AUTO_INC_DEC)
5467 0 : return;
5468 :
5469 : for (rtx link = REG_NOTES (insn); link; link = XEXP (link, 1))
5470 : if (REG_NOTE_KIND (link) == REG_INC
5471 : && (int) REGNO (XEXP (link, 0)) == regno)
5472 : push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5473 : }
5474 :
5475 : /* Record the pseudo registers we must reload into hard registers in a
5476 : subexpression of a would-be memory address, X referring to a value
5477 : in mode MODE. (This function is not called if the address we find
5478 : is strictly valid.)
5479 :
5480 : CONTEXT = 1 means we are considering regs as index regs,
5481 : = 0 means we are considering them as base regs.
5482 : OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5483 : or an autoinc code.
5484 : If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5485 : is the code of the index part of the address. Otherwise, pass SCRATCH
5486 : for this argument.
5487 : OPNUM and TYPE specify the purpose of any reloads made.
5488 :
5489 : IND_LEVELS says how many levels of indirect addressing are
5490 : supported at this point in the address.
5491 :
5492 : INSN, if nonzero, is the insn in which we do the reload. It is used
5493 : to determine if we may generate output reloads.
5494 :
5495 : We return nonzero if X, as a whole, is reloaded or replaced. */
5496 :
5497 : /* Note that we take shortcuts assuming that no multi-reg machine mode
5498 : occurs as part of an address.
5499 : Also, this is not fully machine-customizable; it works for machines
5500 : such as VAXen and 68000's and 32000's, but other possible machines
5501 : could have addressing modes that this does not handle right.
5502 : If you add push_reload calls here, you need to make sure gen_reload
5503 : handles those cases gracefully. */
5504 :
5505 : static int
5506 0 : find_reloads_address_1 (machine_mode mode, addr_space_t as,
5507 : rtx x, int context,
5508 : enum rtx_code outer_code, enum rtx_code index_code,
5509 : rtx *loc, int opnum, enum reload_type type,
5510 : int ind_levels, rtx_insn *insn)
5511 : {
5512 : #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5513 : ((CONTEXT) == 0 \
5514 : ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5515 : : REGNO_OK_FOR_INDEX_P (REGNO))
5516 :
5517 0 : enum reg_class context_reg_class;
5518 0 : RTX_CODE code = GET_CODE (x);
5519 0 : bool reloaded_inner_of_autoinc = false;
5520 :
5521 0 : if (context == 1)
5522 0 : context_reg_class = index_reg_class (insn);
5523 : else
5524 0 : context_reg_class = base_reg_class (mode, as, outer_code, index_code,
5525 : insn);
5526 :
5527 0 : switch (code)
5528 : {
5529 0 : case PLUS:
5530 0 : {
5531 0 : rtx orig_op0 = XEXP (x, 0);
5532 0 : rtx orig_op1 = XEXP (x, 1);
5533 0 : RTX_CODE code0 = GET_CODE (orig_op0);
5534 0 : RTX_CODE code1 = GET_CODE (orig_op1);
5535 0 : rtx op0 = orig_op0;
5536 0 : rtx op1 = orig_op1;
5537 :
5538 0 : if (GET_CODE (op0) == SUBREG)
5539 : {
5540 0 : op0 = SUBREG_REG (op0);
5541 0 : code0 = GET_CODE (op0);
5542 0 : if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5543 0 : op0 = gen_rtx_REG (word_mode,
5544 0 : (REGNO (op0) +
5545 0 : subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5546 0 : GET_MODE (SUBREG_REG (orig_op0)),
5547 0 : SUBREG_BYTE (orig_op0),
5548 0 : GET_MODE (orig_op0))));
5549 : }
5550 :
5551 0 : if (GET_CODE (op1) == SUBREG)
5552 : {
5553 0 : op1 = SUBREG_REG (op1);
5554 0 : code1 = GET_CODE (op1);
5555 0 : if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5556 : /* ??? Why is this given op1's mode and above for
5557 : ??? op0 SUBREGs we use word_mode? */
5558 0 : op1 = gen_rtx_REG (GET_MODE (op1),
5559 0 : (REGNO (op1) +
5560 0 : subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5561 0 : GET_MODE (SUBREG_REG (orig_op1)),
5562 0 : SUBREG_BYTE (orig_op1),
5563 0 : GET_MODE (orig_op1))));
5564 : }
5565 : /* Plus in the index register may be created only as a result of
5566 : register rematerialization for expression like &localvar*4. Reload it.
5567 : It may be possible to combine the displacement on the outer level,
5568 : but it is probably not worthwhile to do so. */
5569 0 : if (context == 1)
5570 : {
5571 0 : find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5572 0 : opnum, ADDR_TYPE (type), ind_levels, insn);
5573 0 : push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5574 : context_reg_class,
5575 0 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5576 0 : return 1;
5577 : }
5578 :
5579 0 : if (code0 == MULT || code0 == ASHIFT
5580 : || code0 == SIGN_EXTEND || code0 == TRUNCATE
5581 0 : || code0 == ZERO_EXTEND || code1 == MEM)
5582 : {
5583 0 : find_reloads_address_1 (mode, as, orig_op0, 1, PLUS, SCRATCH,
5584 : &XEXP (x, 0), opnum, type, ind_levels,
5585 : insn);
5586 0 : find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, code0,
5587 : &XEXP (x, 1), opnum, type, ind_levels,
5588 : insn);
5589 : }
5590 :
5591 0 : else if (code1 == MULT || code1 == ASHIFT
5592 : || code1 == SIGN_EXTEND || code1 == TRUNCATE
5593 0 : || code1 == ZERO_EXTEND || code0 == MEM)
5594 : {
5595 0 : find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, code1,
5596 : &XEXP (x, 0), opnum, type, ind_levels,
5597 : insn);
5598 0 : find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5599 : &XEXP (x, 1), opnum, type, ind_levels,
5600 : insn);
5601 : }
5602 :
5603 0 : else if (code0 == CONST_INT || code0 == CONST
5604 : || code0 == SYMBOL_REF || code0 == LABEL_REF)
5605 0 : find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, code0,
5606 : &XEXP (x, 1), opnum, type, ind_levels,
5607 : insn);
5608 :
5609 0 : else if (code1 == CONST_INT || code1 == CONST
5610 : || code1 == SYMBOL_REF || code1 == LABEL_REF)
5611 0 : find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, code1,
5612 : &XEXP (x, 0), opnum, type, ind_levels,
5613 : insn);
5614 :
5615 0 : else if (code0 == REG && code1 == REG)
5616 : {
5617 0 : if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5618 0 : && regno_ok_for_base_p (REGNO (op0), mode, as, PLUS, REG))
5619 : return 0;
5620 0 : else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5621 0 : && regno_ok_for_base_p (REGNO (op1), mode, as, PLUS, REG))
5622 : return 0;
5623 0 : else if (regno_ok_for_base_p (REGNO (op0), mode, as, PLUS, REG))
5624 0 : find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5625 : &XEXP (x, 1), opnum, type, ind_levels,
5626 : insn);
5627 0 : else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5628 0 : find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, REG,
5629 : &XEXP (x, 0), opnum, type, ind_levels,
5630 : insn);
5631 0 : else if (regno_ok_for_base_p (REGNO (op1), mode, as, PLUS, REG))
5632 0 : find_reloads_address_1 (mode, as, orig_op0, 1, PLUS, SCRATCH,
5633 : &XEXP (x, 0), opnum, type, ind_levels,
5634 : insn);
5635 0 : else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5636 0 : find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, REG,
5637 : &XEXP (x, 1), opnum, type, ind_levels,
5638 : insn);
5639 : else
5640 : {
5641 0 : find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, REG,
5642 : &XEXP (x, 0), opnum, type, ind_levels,
5643 : insn);
5644 0 : find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5645 : &XEXP (x, 1), opnum, type, ind_levels,
5646 : insn);
5647 : }
5648 : }
5649 :
5650 0 : else if (code0 == REG)
5651 : {
5652 0 : find_reloads_address_1 (mode, as, orig_op0, 1, PLUS, SCRATCH,
5653 : &XEXP (x, 0), opnum, type, ind_levels,
5654 : insn);
5655 0 : find_reloads_address_1 (mode, as, orig_op1, 0, PLUS, REG,
5656 : &XEXP (x, 1), opnum, type, ind_levels,
5657 : insn);
5658 : }
5659 :
5660 0 : else if (code1 == REG)
5661 : {
5662 0 : find_reloads_address_1 (mode, as, orig_op1, 1, PLUS, SCRATCH,
5663 : &XEXP (x, 1), opnum, type, ind_levels,
5664 : insn);
5665 0 : find_reloads_address_1 (mode, as, orig_op0, 0, PLUS, REG,
5666 : &XEXP (x, 0), opnum, type, ind_levels,
5667 : insn);
5668 : }
5669 : }
5670 :
5671 : return 0;
5672 :
5673 0 : case POST_MODIFY:
5674 0 : case PRE_MODIFY:
5675 0 : {
5676 0 : rtx op0 = XEXP (x, 0);
5677 0 : rtx op1 = XEXP (x, 1);
5678 0 : enum rtx_code index_code;
5679 0 : int regno;
5680 0 : int reloadnum;
5681 :
5682 0 : if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5683 : return 0;
5684 :
5685 : /* Currently, we only support {PRE,POST}_MODIFY constructs
5686 : where a base register is {inc,dec}remented by the contents
5687 : of another register or by a constant value. Thus, these
5688 : operands must match. */
5689 0 : gcc_assert (op0 == XEXP (op1, 0));
5690 :
5691 : /* Require index register (or constant). Let's just handle the
5692 : register case in the meantime... If the target allows
5693 : auto-modify by a constant then we could try replacing a pseudo
5694 : register with its equivalent constant where applicable.
5695 :
5696 : We also handle the case where the register was eliminated
5697 : resulting in a PLUS subexpression.
5698 :
5699 : If we later decide to reload the whole PRE_MODIFY or
5700 : POST_MODIFY, inc_for_reload might clobber the reload register
5701 : before reading the index. The index register might therefore
5702 : need to live longer than a TYPE reload normally would, so be
5703 : conservative and class it as RELOAD_OTHER. */
5704 0 : if ((REG_P (XEXP (op1, 1))
5705 0 : && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5706 0 : || GET_CODE (XEXP (op1, 1)) == PLUS)
5707 0 : find_reloads_address_1 (mode, as, XEXP (op1, 1), 1, code, SCRATCH,
5708 : &XEXP (op1, 1), opnum, RELOAD_OTHER,
5709 : ind_levels, insn);
5710 :
5711 0 : gcc_assert (REG_P (XEXP (op1, 0)));
5712 :
5713 0 : regno = REGNO (XEXP (op1, 0));
5714 0 : index_code = GET_CODE (XEXP (op1, 1));
5715 :
5716 : /* A register that is incremented cannot be constant! */
5717 0 : gcc_assert (regno < FIRST_PSEUDO_REGISTER
5718 : || reg_equiv_constant (regno) == 0);
5719 :
5720 : /* Handle a register that is equivalent to a memory location
5721 : which cannot be addressed directly. */
5722 0 : if (reg_equiv_memory_loc (regno) != 0
5723 0 : && (reg_equiv_address (regno) != 0
5724 0 : || num_not_at_initial_offset))
5725 : {
5726 0 : rtx tem = make_memloc (XEXP (x, 0), regno);
5727 :
5728 0 : if (reg_equiv_address (regno)
5729 0 : || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5730 : {
5731 0 : rtx orig = tem;
5732 :
5733 : /* First reload the memory location's address.
5734 : We can't use ADDR_TYPE (type) here, because we need to
5735 : write back the value after reading it, hence we actually
5736 : need two registers. */
5737 0 : find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5738 : &XEXP (tem, 0), opnum,
5739 : RELOAD_OTHER,
5740 : ind_levels, insn);
5741 :
5742 0 : if (!rtx_equal_p (tem, orig))
5743 0 : push_reg_equiv_alt_mem (regno, tem);
5744 :
5745 : /* Then reload the memory location into a base
5746 : register. */
5747 0 : reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5748 : &XEXP (op1, 0),
5749 : base_reg_class (mode, as,
5750 : code, index_code,
5751 : insn),
5752 0 : GET_MODE (x), GET_MODE (x), 0,
5753 : 0, opnum, RELOAD_OTHER);
5754 :
5755 0 : update_auto_inc_notes (this_insn, regno, reloadnum);
5756 0 : return 0;
5757 : }
5758 : }
5759 :
5760 0 : if (reg_renumber[regno] >= 0)
5761 0 : regno = reg_renumber[regno];
5762 :
5763 : /* We require a base register here... */
5764 0 : if (!regno_ok_for_base_p (regno, GET_MODE (x), as, code, index_code))
5765 : {
5766 0 : reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5767 : &XEXP (op1, 0), &XEXP (x, 0),
5768 : base_reg_class (mode, as,
5769 : code, index_code,
5770 : insn),
5771 0 : GET_MODE (x), GET_MODE (x), 0, 0,
5772 : opnum, RELOAD_OTHER);
5773 :
5774 0 : update_auto_inc_notes (this_insn, regno, reloadnum);
5775 0 : return 0;
5776 : }
5777 : }
5778 : return 0;
5779 :
5780 0 : case POST_INC:
5781 0 : case POST_DEC:
5782 0 : case PRE_INC:
5783 0 : case PRE_DEC:
5784 0 : if (REG_P (XEXP (x, 0)))
5785 : {
5786 0 : int regno = REGNO (XEXP (x, 0));
5787 0 : int value = 0;
5788 0 : rtx x_orig = x;
5789 :
5790 : /* A register that is incremented cannot be constant! */
5791 0 : gcc_assert (regno < FIRST_PSEUDO_REGISTER
5792 : || reg_equiv_constant (regno) == 0);
5793 :
5794 : /* Handle a register that is equivalent to a memory location
5795 : which cannot be addressed directly. */
5796 0 : if (reg_equiv_memory_loc (regno) != 0
5797 0 : && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5798 : {
5799 0 : rtx tem = make_memloc (XEXP (x, 0), regno);
5800 0 : if (reg_equiv_address (regno)
5801 0 : || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5802 : {
5803 0 : rtx orig = tem;
5804 :
5805 : /* First reload the memory location's address.
5806 : We can't use ADDR_TYPE (type) here, because we need to
5807 : write back the value after reading it, hence we actually
5808 : need two registers. */
5809 0 : find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5810 : &XEXP (tem, 0), opnum, type,
5811 : ind_levels, insn);
5812 0 : reloaded_inner_of_autoinc = true;
5813 0 : if (!rtx_equal_p (tem, orig))
5814 0 : push_reg_equiv_alt_mem (regno, tem);
5815 : /* Put this inside a new increment-expression. */
5816 0 : x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5817 : /* Proceed to reload that, as if it contained a register. */
5818 : }
5819 : }
5820 :
5821 : /* If we have a hard register that is ok in this incdec context,
5822 : don't make a reload. If the register isn't nice enough for
5823 : autoincdec, we can reload it. But, if an autoincrement of a
5824 : register that we here verified as playing nice, still outside
5825 : isn't "valid", it must be that no autoincrement is "valid".
5826 : If that is true and something made an autoincrement anyway,
5827 : this must be a special context where one is allowed.
5828 : (For example, a "push" instruction.)
5829 : We can't improve this address, so leave it alone. */
5830 :
5831 : /* Otherwise, reload the autoincrement into a suitable hard reg
5832 : and record how much to increment by. */
5833 :
5834 0 : if (reg_renumber[regno] >= 0)
5835 0 : regno = reg_renumber[regno];
5836 0 : if (regno >= FIRST_PSEUDO_REGISTER
5837 0 : || !REG_OK_FOR_CONTEXT (context, regno, mode, as, code,
5838 : index_code))
5839 : {
5840 0 : int reloadnum;
5841 :
5842 : /* If we can output the register afterwards, do so, this
5843 : saves the extra update.
5844 : We can do so if we have an INSN - i.e. no JUMP_INSN nor
5845 : CALL_INSN.
5846 : But don't do this if we cannot directly address the
5847 : memory location, since this will make it harder to
5848 : reuse address reloads, and increases register pressure.
5849 : Also don't do this if we can probably update x directly. */
5850 0 : rtx equiv = (MEM_P (XEXP (x, 0))
5851 0 : ? XEXP (x, 0)
5852 0 : : reg_equiv_mem (regno));
5853 0 : enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
5854 0 : if (insn && NONJUMP_INSN_P (insn)
5855 0 : && (regno < FIRST_PSEUDO_REGISTER
5856 0 : || (equiv
5857 0 : && memory_operand (equiv, GET_MODE (equiv))
5858 0 : && ! (icode != CODE_FOR_nothing
5859 0 : && insn_operand_matches (icode, 0, equiv)
5860 0 : && insn_operand_matches (icode, 1, equiv))))
5861 : /* Using RELOAD_OTHER means we emit this and the reload we
5862 : made earlier in the wrong order. */
5863 0 : && !reloaded_inner_of_autoinc)
5864 : {
5865 : /* We use the original pseudo for loc, so that
5866 : emit_reload_insns() knows which pseudo this
5867 : reload refers to and updates the pseudo rtx, not
5868 : its equivalent memory location, as well as the
5869 : corresponding entry in reg_last_reload_reg. */
5870 0 : loc = &XEXP (x_orig, 0);
5871 0 : x = XEXP (x, 0);
5872 0 : reloadnum
5873 0 : = push_reload (x, x, loc, loc,
5874 : context_reg_class,
5875 0 : GET_MODE (x), GET_MODE (x), 0, 0,
5876 : opnum, RELOAD_OTHER);
5877 : }
5878 : else
5879 : {
5880 0 : reloadnum
5881 0 : = push_reload (x, x, loc, (rtx*) 0,
5882 : context_reg_class,
5883 0 : GET_MODE (x), GET_MODE (x), 0, 0,
5884 : opnum, type);
5885 0 : rld[reloadnum].inc
5886 0 : = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5887 :
5888 0 : value = 1;
5889 : }
5890 :
5891 0 : update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5892 : reloadnum);
5893 : }
5894 : return value;
5895 : }
5896 : return 0;
5897 :
5898 0 : case TRUNCATE:
5899 0 : case SIGN_EXTEND:
5900 0 : case ZERO_EXTEND:
5901 : /* Look for parts to reload in the inner expression and reload them
5902 : too, in addition to this operation. Reloading all inner parts in
5903 : addition to this one shouldn't be necessary, but at this point,
5904 : we don't know if we can possibly omit any part that *can* be
5905 : reloaded. Targets that are better off reloading just either part
5906 : (or perhaps even a different part of an outer expression), should
5907 : define LEGITIMIZE_RELOAD_ADDRESS. */
5908 0 : find_reloads_address_1 (GET_MODE (XEXP (x, 0)), as, XEXP (x, 0),
5909 : context, code, SCRATCH, &XEXP (x, 0), opnum,
5910 : type, ind_levels, insn);
5911 0 : push_reload (x, NULL_RTX, loc, (rtx*) 0,
5912 : context_reg_class,
5913 0 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5914 0 : return 1;
5915 :
5916 0 : case MEM:
5917 : /* This is probably the result of a substitution, by eliminate_regs, of
5918 : an equivalent address for a pseudo that was not allocated to a hard
5919 : register. Verify that the specified address is valid and reload it
5920 : into a register.
5921 :
5922 : Since we know we are going to reload this item, don't decrement for
5923 : the indirection level.
5924 :
5925 : Note that this is actually conservative: it would be slightly more
5926 : efficient to use the value of SPILL_INDIRECT_LEVELS from
5927 : reload1.cc here. */
5928 :
5929 0 : find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5930 0 : opnum, ADDR_TYPE (type), ind_levels, insn);
5931 0 : push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5932 : context_reg_class,
5933 0 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5934 0 : return 1;
5935 :
5936 0 : case REG:
5937 0 : {
5938 0 : int regno = REGNO (x);
5939 :
5940 0 : if (reg_equiv_constant (regno) != 0)
5941 : {
5942 0 : find_reloads_address_part (reg_equiv_constant (regno), loc,
5943 : context_reg_class,
5944 0 : GET_MODE (x), opnum, type, ind_levels);
5945 0 : return 1;
5946 : }
5947 :
5948 : #if 0 /* This might screw code in reload1.cc to delete prior output-reload
5949 : that feeds this insn. */
5950 : if (reg_equiv_mem (regno) != 0)
5951 : {
5952 : push_reload (reg_equiv_mem (regno), NULL_RTX, loc, (rtx*) 0,
5953 : context_reg_class,
5954 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5955 : return 1;
5956 : }
5957 : #endif
5958 :
5959 0 : if (reg_equiv_memory_loc (regno)
5960 0 : && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5961 : {
5962 0 : rtx tem = make_memloc (x, regno);
5963 0 : if (reg_equiv_address (regno) != 0
5964 0 : || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5965 : {
5966 0 : x = tem;
5967 0 : find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5968 0 : &XEXP (x, 0), opnum, ADDR_TYPE (type),
5969 : ind_levels, insn);
5970 0 : if (!rtx_equal_p (x, tem))
5971 0 : push_reg_equiv_alt_mem (regno, x);
5972 : }
5973 : }
5974 :
5975 0 : if (reg_renumber[regno] >= 0)
5976 0 : regno = reg_renumber[regno];
5977 :
5978 0 : if (regno >= FIRST_PSEUDO_REGISTER
5979 0 : || !REG_OK_FOR_CONTEXT (context, regno, mode, as, outer_code,
5980 : index_code))
5981 : {
5982 0 : push_reload (x, NULL_RTX, loc, (rtx*) 0,
5983 : context_reg_class,
5984 0 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5985 0 : return 1;
5986 : }
5987 :
5988 : /* If a register appearing in an address is the subject of a CLOBBER
5989 : in this insn, reload it into some other register to be safe.
5990 : The CLOBBER is supposed to make the register unavailable
5991 : from before this insn to after it. */
5992 0 : if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5993 : {
5994 0 : push_reload (x, NULL_RTX, loc, (rtx*) 0,
5995 : context_reg_class,
5996 0 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5997 0 : return 1;
5998 : }
5999 : }
6000 : return 0;
6001 :
6002 0 : case SUBREG:
6003 0 : if (REG_P (SUBREG_REG (x)))
6004 : {
6005 : /* If this is a SUBREG of a hard register and the resulting register
6006 : is of the wrong class, reload the whole SUBREG. This avoids
6007 : needless copies if SUBREG_REG is multi-word. */
6008 0 : if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6009 : {
6010 0 : int regno ATTRIBUTE_UNUSED = subreg_regno (x);
6011 :
6012 0 : if (!REG_OK_FOR_CONTEXT (context, regno, mode, as, outer_code,
6013 : index_code))
6014 : {
6015 0 : push_reload (x, NULL_RTX, loc, (rtx*) 0,
6016 : context_reg_class,
6017 0 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6018 0 : return 1;
6019 : }
6020 : }
6021 : /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6022 : is larger than the class size, then reload the whole SUBREG. */
6023 : else
6024 : {
6025 0 : enum reg_class rclass = context_reg_class;
6026 0 : if (ira_reg_class_max_nregs [rclass][GET_MODE (SUBREG_REG (x))]
6027 0 : > reg_class_size[(int) rclass])
6028 : {
6029 : /* If the inner register will be replaced by a memory
6030 : reference, we can do this only if we can replace the
6031 : whole subreg by a (narrower) memory reference. If
6032 : this is not possible, fall through and reload just
6033 : the inner register (including address reloads). */
6034 0 : if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x))) != 0)
6035 : {
6036 0 : rtx tem = find_reloads_subreg_address (x, opnum,
6037 0 : ADDR_TYPE (type),
6038 : ind_levels, insn,
6039 : NULL);
6040 0 : if (tem)
6041 : {
6042 0 : push_reload (tem, NULL_RTX, loc, (rtx*) 0, rclass,
6043 0 : GET_MODE (tem), VOIDmode, 0, 0,
6044 : opnum, type);
6045 0 : return 1;
6046 : }
6047 : }
6048 : else
6049 : {
6050 0 : push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6051 0 : GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6052 0 : return 1;
6053 : }
6054 : }
6055 : }
6056 : }
6057 : break;
6058 :
6059 : default:
6060 : break;
6061 : }
6062 :
6063 0 : {
6064 0 : const char *fmt = GET_RTX_FORMAT (code);
6065 0 : int i;
6066 :
6067 0 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6068 : {
6069 0 : if (fmt[i] == 'e')
6070 : /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6071 : we get here. */
6072 0 : find_reloads_address_1 (mode, as, XEXP (x, i), context,
6073 : code, SCRATCH, &XEXP (x, i),
6074 : opnum, type, ind_levels, insn);
6075 : }
6076 : }
6077 :
6078 : #undef REG_OK_FOR_CONTEXT
6079 : return 0;
6080 : }
6081 :
6082 : /* X, which is found at *LOC, is a part of an address that needs to be
6083 : reloaded into a register of class RCLASS. If X is a constant, or if
6084 : X is a PLUS that contains a constant, check that the constant is a
6085 : legitimate operand and that we are supposed to be able to load
6086 : it into the register.
6087 :
6088 : If not, force the constant into memory and reload the MEM instead.
6089 :
6090 : MODE is the mode to use, in case X is an integer constant.
6091 :
6092 : OPNUM and TYPE describe the purpose of any reloads made.
6093 :
6094 : IND_LEVELS says how many levels of indirect addressing this machine
6095 : supports. */
6096 :
6097 : static void
6098 0 : find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6099 : machine_mode mode, int opnum,
6100 : enum reload_type type, int ind_levels)
6101 : {
6102 0 : if (CONSTANT_P (x)
6103 0 : && (!targetm.legitimate_constant_p (mode, x)
6104 0 : || targetm.preferred_reload_class (x, rclass) == NO_REGS))
6105 : {
6106 0 : x = force_const_mem (mode, x);
6107 0 : find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6108 : opnum, type, ind_levels, 0);
6109 : }
6110 :
6111 0 : else if (GET_CODE (x) == PLUS
6112 0 : && CONSTANT_P (XEXP (x, 1))
6113 0 : && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1))
6114 0 : || targetm.preferred_reload_class (XEXP (x, 1), rclass)
6115 : == NO_REGS))
6116 : {
6117 0 : rtx tem;
6118 :
6119 0 : tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6120 0 : x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6121 0 : find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6122 : opnum, type, ind_levels, 0);
6123 : }
6124 :
6125 0 : push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6126 : mode, VOIDmode, 0, 0, opnum, type);
6127 0 : }
6128 :
6129 : /* X, a subreg of a pseudo, is a part of an address that needs to be
6130 : reloaded, and the pseusdo is equivalent to a memory location.
6131 :
6132 : Attempt to replace the whole subreg by a (possibly narrower or wider)
6133 : memory reference. If this is possible, return this new memory
6134 : reference, and push all required address reloads. Otherwise,
6135 : return NULL.
6136 :
6137 : OPNUM and TYPE identify the purpose of the reload.
6138 :
6139 : IND_LEVELS says how many levels of indirect addressing are
6140 : supported at this point in the address.
6141 :
6142 : INSN, if nonzero, is the insn in which we do the reload. It is used
6143 : to determine where to put USEs for pseudos that we have to replace with
6144 : stack slots. */
6145 :
6146 : static rtx
6147 0 : find_reloads_subreg_address (rtx x, int opnum, enum reload_type type,
6148 : int ind_levels, rtx_insn *insn,
6149 : int *address_reloaded)
6150 : {
6151 0 : machine_mode outer_mode = GET_MODE (x);
6152 0 : machine_mode inner_mode = GET_MODE (SUBREG_REG (x));
6153 0 : int regno = REGNO (SUBREG_REG (x));
6154 0 : int reloaded = 0;
6155 0 : rtx tem, orig;
6156 0 : poly_int64 offset;
6157 :
6158 0 : gcc_assert (reg_equiv_memory_loc (regno) != 0);
6159 :
6160 : /* We cannot replace the subreg with a modified memory reference if:
6161 :
6162 : - we have a paradoxical subreg that implicitly acts as a zero or
6163 : sign extension operation due to LOAD_EXTEND_OP;
6164 :
6165 : - we have a subreg that is implicitly supposed to act on the full
6166 : register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6167 :
6168 : - the address of the equivalent memory location is mode-dependent; or
6169 :
6170 : - we have a paradoxical subreg and the resulting memory is not
6171 : sufficiently aligned to allow access in the wider mode.
6172 :
6173 : In addition, we choose not to perform the replacement for *any*
6174 : paradoxical subreg, even if it were possible in principle. This
6175 : is to avoid generating wider memory references than necessary.
6176 :
6177 : This corresponds to how previous versions of reload used to handle
6178 : paradoxical subregs where no address reload was required. */
6179 :
6180 0 : if (paradoxical_subreg_p (x))
6181 : return NULL;
6182 :
6183 0 : if (WORD_REGISTER_OPERATIONS
6184 : && partial_subreg_p (outer_mode, inner_mode)
6185 : && known_equal_after_align_down (GET_MODE_SIZE (outer_mode) - 1,
6186 : GET_MODE_SIZE (inner_mode) - 1,
6187 : UNITS_PER_WORD))
6188 : return NULL;
6189 :
6190 : /* Since we don't attempt to handle paradoxical subregs, we can just
6191 : call into simplify_subreg, which will handle all remaining checks
6192 : for us. */
6193 0 : orig = make_memloc (SUBREG_REG (x), regno);
6194 0 : offset = SUBREG_BYTE (x);
6195 0 : tem = simplify_subreg (outer_mode, orig, inner_mode, offset);
6196 0 : if (!tem || !MEM_P (tem))
6197 : return NULL;
6198 :
6199 : /* Now push all required address reloads, if any. */
6200 0 : reloaded = find_reloads_address (GET_MODE (tem), &tem,
6201 : XEXP (tem, 0), &XEXP (tem, 0),
6202 : opnum, type, ind_levels, insn);
6203 : /* ??? Do we need to handle nonzero offsets somehow? */
6204 0 : if (known_eq (offset, 0) && !rtx_equal_p (tem, orig))
6205 0 : push_reg_equiv_alt_mem (regno, tem);
6206 :
6207 : /* For some processors an address may be valid in the original mode but
6208 : not in a smaller mode. For example, ARM accepts a scaled index register
6209 : in SImode but not in HImode. Note that this is only a problem if the
6210 : address in reg_equiv_mem is already invalid in the new mode; other
6211 : cases would be fixed by find_reloads_address as usual.
6212 :
6213 : ??? We attempt to handle such cases here by doing an additional reload
6214 : of the full address after the usual processing by find_reloads_address.
6215 : Note that this may not work in the general case, but it seems to cover
6216 : the cases where this situation currently occurs. A more general fix
6217 : might be to reload the *value* instead of the address, but this would
6218 : not be expected by the callers of this routine as-is.
6219 :
6220 : If find_reloads_address already completed replaced the address, there
6221 : is nothing further to do. */
6222 0 : if (reloaded == 0
6223 0 : && reg_equiv_mem (regno) != 0
6224 0 : && !strict_memory_address_addr_space_p
6225 0 : (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
6226 0 : MEM_ADDR_SPACE (reg_equiv_mem (regno))))
6227 : {
6228 0 : push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6229 0 : base_reg_class (GET_MODE (tem), MEM_ADDR_SPACE (tem),
6230 : MEM, SCRATCH, insn),
6231 0 : GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0, opnum, type);
6232 0 : reloaded = 1;
6233 : }
6234 :
6235 : /* If this is not a toplevel operand, find_reloads doesn't see this
6236 : substitution. We have to emit a USE of the pseudo so that
6237 : delete_output_reload can see it. */
6238 0 : if (replace_reloads && recog_data.operand[opnum] != x)
6239 : /* We mark the USE with QImode so that we recognize it as one that
6240 : can be safely deleted at the end of reload. */
6241 0 : PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn),
6242 : QImode);
6243 :
6244 0 : if (address_reloaded)
6245 0 : *address_reloaded = reloaded;
6246 :
6247 0 : return tem;
6248 : }
6249 :
6250 : /* Substitute into the current INSN the registers into which we have reloaded
6251 : the things that need reloading. The array `replacements'
6252 : contains the locations of all pointers that must be changed
6253 : and says what to replace them with.
6254 :
6255 : Return the rtx that X translates into; usually X, but modified. */
6256 :
6257 : void
6258 0 : subst_reloads (rtx_insn *insn)
6259 : {
6260 0 : int i;
6261 :
6262 0 : for (i = 0; i < n_replacements; i++)
6263 : {
6264 0 : struct replacement *r = &replacements[i];
6265 0 : rtx reloadreg = rld[r->what].reg_rtx;
6266 0 : if (reloadreg)
6267 : {
6268 : #ifdef DEBUG_RELOAD
6269 : /* This checking takes a very long time on some platforms
6270 : causing the gcc.c-torture/compile/limits-fnargs.c test
6271 : to time out during testing. See PR 31850.
6272 :
6273 : Internal consistency test. Check that we don't modify
6274 : anything in the equivalence arrays. Whenever something from
6275 : those arrays needs to be reloaded, it must be unshared before
6276 : being substituted into; the equivalence must not be modified.
6277 : Otherwise, if the equivalence is used after that, it will
6278 : have been modified, and the thing substituted (probably a
6279 : register) is likely overwritten and not a usable equivalence. */
6280 : int check_regno;
6281 :
6282 : for (check_regno = 0; check_regno < max_regno; check_regno++)
6283 : {
6284 : #define CHECK_MODF(ARRAY) \
6285 : gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6286 : || !loc_mentioned_in_p (r->where, \
6287 : (*reg_equivs)[check_regno].ARRAY))
6288 :
6289 : CHECK_MODF (constant);
6290 : CHECK_MODF (memory_loc);
6291 : CHECK_MODF (address);
6292 : CHECK_MODF (mem);
6293 : #undef CHECK_MODF
6294 : }
6295 : #endif /* DEBUG_RELOAD */
6296 :
6297 : /* If we're replacing a LABEL_REF with a register, there must
6298 : already be an indication (to e.g. flow) which label this
6299 : register refers to. */
6300 0 : gcc_assert (GET_CODE (*r->where) != LABEL_REF
6301 : || !JUMP_P (insn)
6302 : || find_reg_note (insn,
6303 : REG_LABEL_OPERAND,
6304 : XEXP (*r->where, 0))
6305 : || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6306 :
6307 : /* Encapsulate RELOADREG so its machine mode matches what
6308 : used to be there. Note that gen_lowpart_common will
6309 : do the wrong thing if RELOADREG is multi-word. RELOADREG
6310 : will always be a REG here. */
6311 0 : if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6312 0 : reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6313 :
6314 0 : *r->where = reloadreg;
6315 : }
6316 : /* If reload got no reg and isn't optional, something's wrong. */
6317 : else
6318 0 : gcc_assert (rld[r->what].optional);
6319 : }
6320 0 : }
6321 :
6322 : /* Make a copy of any replacements being done into X and move those
6323 : copies to locations in Y, a copy of X. */
6324 :
6325 : void
6326 0 : copy_replacements (rtx x, rtx y)
6327 : {
6328 0 : copy_replacements_1 (&x, &y, n_replacements);
6329 0 : }
6330 :
6331 : static void
6332 0 : copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6333 : {
6334 0 : int i, j;
6335 0 : rtx x, y;
6336 0 : struct replacement *r;
6337 0 : enum rtx_code code;
6338 0 : const char *fmt;
6339 :
6340 0 : for (j = 0; j < orig_replacements; j++)
6341 0 : if (replacements[j].where == px)
6342 : {
6343 0 : r = &replacements[n_replacements++];
6344 0 : r->where = py;
6345 0 : r->what = replacements[j].what;
6346 0 : r->mode = replacements[j].mode;
6347 : }
6348 :
6349 0 : x = *px;
6350 0 : y = *py;
6351 0 : code = GET_CODE (x);
6352 0 : fmt = GET_RTX_FORMAT (code);
6353 :
6354 0 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6355 : {
6356 0 : if (fmt[i] == 'e')
6357 0 : copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6358 0 : else if (fmt[i] == 'E')
6359 0 : for (j = XVECLEN (x, i); --j >= 0; )
6360 0 : copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6361 : orig_replacements);
6362 : }
6363 0 : }
6364 :
6365 : /* Change any replacements being done to *X to be done to *Y. */
6366 :
6367 : void
6368 0 : move_replacements (rtx *x, rtx *y)
6369 : {
6370 0 : int i;
6371 :
6372 0 : for (i = 0; i < n_replacements; i++)
6373 0 : if (replacements[i].where == x)
6374 0 : replacements[i].where = y;
6375 0 : }
6376 :
6377 : /* If LOC was scheduled to be replaced by something, return the replacement.
6378 : Otherwise, return *LOC. */
6379 :
6380 : rtx
6381 0 : find_replacement (rtx *loc)
6382 : {
6383 0 : struct replacement *r;
6384 :
6385 0 : for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6386 : {
6387 0 : rtx reloadreg = rld[r->what].reg_rtx;
6388 :
6389 0 : if (reloadreg && r->where == loc)
6390 : {
6391 0 : if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6392 0 : reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6393 :
6394 : return reloadreg;
6395 : }
6396 0 : else if (reloadreg && GET_CODE (*loc) == SUBREG
6397 0 : && r->where == &SUBREG_REG (*loc))
6398 : {
6399 0 : if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6400 0 : reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6401 :
6402 0 : return simplify_gen_subreg (GET_MODE (*loc), reloadreg,
6403 0 : GET_MODE (SUBREG_REG (*loc)),
6404 0 : SUBREG_BYTE (*loc));
6405 : }
6406 : }
6407 :
6408 : /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6409 : what's inside and make a new rtl if so. */
6410 0 : if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6411 0 : || GET_CODE (*loc) == MULT)
6412 : {
6413 0 : rtx x = find_replacement (&XEXP (*loc, 0));
6414 0 : rtx y = find_replacement (&XEXP (*loc, 1));
6415 :
6416 0 : if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6417 0 : return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6418 : }
6419 :
6420 0 : return *loc;
6421 : }
6422 :
6423 : /* Return nonzero if register in range [REGNO, ENDREGNO)
6424 : appears either explicitly or implicitly in X
6425 : other than being stored into (except for earlyclobber operands).
6426 :
6427 : References contained within the substructure at LOC do not count.
6428 : LOC may be zero, meaning don't ignore anything.
6429 :
6430 : This is similar to refers_to_regno_p in rtlanal.cc except that we
6431 : look at equivalences for pseudos that didn't get hard registers. */
6432 :
6433 : static int
6434 869050 : refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6435 : rtx x, rtx *loc)
6436 : {
6437 869050 : int i;
6438 869050 : unsigned int r;
6439 869050 : RTX_CODE code;
6440 869050 : const char *fmt;
6441 :
6442 869050 : if (x == 0)
6443 : return 0;
6444 :
6445 1097831 : repeat:
6446 1097831 : code = GET_CODE (x);
6447 :
6448 1097831 : switch (code)
6449 : {
6450 662919 : case REG:
6451 662919 : r = REGNO (x);
6452 :
6453 : /* If this is a pseudo, a hard register must not have been allocated.
6454 : X must therefore either be a constant or be in memory. */
6455 662919 : if (r >= FIRST_PSEUDO_REGISTER)
6456 : {
6457 0 : if (reg_equiv_memory_loc (r))
6458 : return refers_to_regno_for_reload_p (regno, endregno,
6459 : reg_equiv_memory_loc (r),
6460 : (rtx*) 0);
6461 :
6462 0 : gcc_assert (reg_equiv_constant (r) || reg_equiv_invariant (r));
6463 : return 0;
6464 : }
6465 :
6466 1321501 : return endregno > r && regno < END_REGNO (x);
6467 :
6468 0 : case SUBREG:
6469 : /* If this is a SUBREG of a hard reg, we can see exactly which
6470 : registers are being modified. Otherwise, handle normally. */
6471 0 : if (REG_P (SUBREG_REG (x))
6472 0 : && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6473 : {
6474 0 : unsigned int inner_regno = subreg_regno (x);
6475 0 : unsigned int inner_endregno
6476 : = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6477 0 : ? subreg_nregs (x) : 1);
6478 :
6479 0 : return endregno > inner_regno && regno < inner_endregno;
6480 : }
6481 : break;
6482 :
6483 0 : case CLOBBER:
6484 0 : case SET:
6485 0 : if (&SET_DEST (x) != loc
6486 : /* Note setting a SUBREG counts as referring to the REG it is in for
6487 : a pseudo but not for hard registers since we can
6488 : treat each word individually. */
6489 0 : && ((GET_CODE (SET_DEST (x)) == SUBREG
6490 0 : && loc != &SUBREG_REG (SET_DEST (x))
6491 0 : && REG_P (SUBREG_REG (SET_DEST (x)))
6492 0 : && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6493 0 : && refers_to_regno_for_reload_p (regno, endregno,
6494 : SUBREG_REG (SET_DEST (x)),
6495 : loc))
6496 : /* If the output is an earlyclobber operand, this is
6497 : a conflict. */
6498 0 : || ((!REG_P (SET_DEST (x))
6499 0 : || earlyclobber_operand_p (SET_DEST (x)))
6500 0 : && refers_to_regno_for_reload_p (regno, endregno,
6501 : SET_DEST (x), loc))))
6502 : return 1;
6503 :
6504 0 : if (code == CLOBBER || loc == &SET_SRC (x))
6505 : return 0;
6506 0 : x = SET_SRC (x);
6507 0 : goto repeat;
6508 :
6509 : default:
6510 : break;
6511 : }
6512 :
6513 : /* X does not match, so try its subexpressions. */
6514 :
6515 434912 : fmt = GET_RTX_FORMAT (code);
6516 922135 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6517 : {
6518 716006 : if (fmt[i] == 'e' && loc != &XEXP (x, i))
6519 : {
6520 335703 : if (i == 0)
6521 : {
6522 228781 : x = XEXP (x, 0);
6523 228781 : goto repeat;
6524 : }
6525 : else
6526 106922 : if (refers_to_regno_for_reload_p (regno, endregno,
6527 : XEXP (x, i), loc))
6528 : return 1;
6529 : }
6530 380303 : else if (fmt[i] == 'E')
6531 : {
6532 1260 : int j;
6533 16934 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6534 15674 : if (loc != &XVECEXP (x, i, j)
6535 15674 : && refers_to_regno_for_reload_p (regno, endregno,
6536 : XVECEXP (x, i, j), loc))
6537 : return 1;
6538 : }
6539 : }
6540 : return 0;
6541 : }
6542 :
6543 : /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6544 : we check if any register number in X conflicts with the relevant register
6545 : numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6546 : contains a MEM (we don't bother checking for memory addresses that can't
6547 : conflict because we expect this to be a rare case.
6548 :
6549 : This function is similar to reg_overlap_mentioned_p in rtlanal.cc except
6550 : that we look at equivalences for pseudos that didn't get hard registers. */
6551 :
6552 : int
6553 0 : reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6554 : {
6555 0 : int regno, endregno;
6556 :
6557 : /* Overly conservative. */
6558 0 : if (GET_CODE (x) == STRICT_LOW_PART
6559 0 : || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6560 0 : x = XEXP (x, 0);
6561 :
6562 : /* If either argument is a constant, then modifying X cannot affect IN. */
6563 0 : if (CONSTANT_P (x) || CONSTANT_P (in))
6564 : return 0;
6565 0 : else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6566 0 : return refers_to_mem_for_reload_p (in);
6567 0 : else if (GET_CODE (x) == SUBREG)
6568 : {
6569 0 : regno = REGNO (SUBREG_REG (x));
6570 0 : if (regno < FIRST_PSEUDO_REGISTER)
6571 0 : regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6572 0 : GET_MODE (SUBREG_REG (x)),
6573 0 : SUBREG_BYTE (x),
6574 0 : GET_MODE (x));
6575 0 : endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6576 0 : ? subreg_nregs (x) : 1);
6577 :
6578 0 : return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6579 : }
6580 : else if (REG_P (x))
6581 : {
6582 0 : regno = REGNO (x);
6583 :
6584 : /* If this is a pseudo, it must not have been assigned a hard register.
6585 : Therefore, it must either be in memory or be a constant. */
6586 :
6587 0 : if (regno >= FIRST_PSEUDO_REGISTER)
6588 : {
6589 0 : if (reg_equiv_memory_loc (regno))
6590 0 : return refers_to_mem_for_reload_p (in);
6591 0 : gcc_assert (reg_equiv_constant (regno));
6592 : return 0;
6593 : }
6594 :
6595 0 : endregno = END_REGNO (x);
6596 :
6597 0 : return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6598 : }
6599 : else if (MEM_P (x))
6600 0 : return refers_to_mem_for_reload_p (in);
6601 : else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC)
6602 0 : return reg_mentioned_p (x, in);
6603 : else
6604 : {
6605 0 : gcc_assert (GET_CODE (x) == PLUS);
6606 :
6607 : /* We actually want to know if X is mentioned somewhere inside IN.
6608 : We must not say that (plus (sp) (const_int 124)) is in
6609 : (plus (sp) (const_int 64)), since that can lead to incorrect reload
6610 : allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6611 : into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6612 0 : while (MEM_P (in))
6613 0 : in = XEXP (in, 0);
6614 0 : if (REG_P (in))
6615 : return 0;
6616 0 : else if (GET_CODE (in) == PLUS)
6617 0 : return (rtx_equal_p (x, in)
6618 0 : || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6619 0 : || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6620 : else
6621 0 : return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6622 0 : || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6623 : }
6624 : }
6625 :
6626 : /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6627 : registers. */
6628 :
6629 : static int
6630 0 : refers_to_mem_for_reload_p (rtx x)
6631 : {
6632 0 : const char *fmt;
6633 0 : int i;
6634 :
6635 0 : if (MEM_P (x))
6636 : return 1;
6637 :
6638 0 : if (REG_P (x))
6639 0 : return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6640 0 : && reg_equiv_memory_loc (REGNO (x)));
6641 :
6642 0 : fmt = GET_RTX_FORMAT (GET_CODE (x));
6643 0 : for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6644 0 : if (fmt[i] == 'e'
6645 0 : && (MEM_P (XEXP (x, i))
6646 0 : || refers_to_mem_for_reload_p (XEXP (x, i))))
6647 : return 1;
6648 :
6649 : return 0;
6650 : }
6651 :
6652 : /* Check the insns before INSN to see if there is a suitable register
6653 : containing the same value as GOAL.
6654 : If OTHER is -1, look for a register in class RCLASS.
6655 : Otherwise, just see if register number OTHER shares GOAL's value.
6656 :
6657 : Return an rtx for the register found, or zero if none is found.
6658 :
6659 : If RELOAD_REG_P is (short *)1,
6660 : we reject any hard reg that appears in reload_reg_rtx
6661 : because such a hard reg is also needed coming into this insn.
6662 :
6663 : If RELOAD_REG_P is any other nonzero value,
6664 : it is a vector indexed by hard reg number
6665 : and we reject any hard reg whose element in the vector is nonnegative
6666 : as well as any that appears in reload_reg_rtx.
6667 :
6668 : If GOAL is zero, then GOALREG is a register number; we look
6669 : for an equivalent for that register.
6670 :
6671 : MODE is the machine mode of the value we want an equivalence for.
6672 : If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6673 :
6674 : This function is used by jump.cc as well as in the reload pass.
6675 :
6676 : If GOAL is the sum of the stack pointer and a constant, we treat it
6677 : as if it were a constant except that sp is required to be unchanging. */
6678 :
6679 : rtx
6680 0 : find_equiv_reg (rtx goal, rtx_insn *insn, enum reg_class rclass, int other,
6681 : short *reload_reg_p, int goalreg, machine_mode mode)
6682 : {
6683 0 : rtx_insn *p = insn;
6684 0 : rtx goaltry, valtry, value;
6685 0 : rtx_insn *where;
6686 0 : rtx pat;
6687 0 : int regno = -1;
6688 0 : int valueno;
6689 0 : int goal_mem = 0;
6690 0 : int goal_const = 0;
6691 0 : int goal_mem_addr_varies = 0;
6692 0 : int need_stable_sp = 0;
6693 0 : int nregs;
6694 0 : int valuenregs;
6695 0 : int num = 0;
6696 :
6697 0 : if (goal == 0)
6698 : regno = goalreg;
6699 0 : else if (REG_P (goal))
6700 0 : regno = REGNO (goal);
6701 0 : else if (MEM_P (goal))
6702 : {
6703 0 : enum rtx_code code = GET_CODE (XEXP (goal, 0));
6704 0 : if (MEM_VOLATILE_P (goal))
6705 : return 0;
6706 0 : if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6707 : return 0;
6708 : /* An address with side effects must be reexecuted. */
6709 0 : switch (code)
6710 : {
6711 : case POST_INC:
6712 : case PRE_INC:
6713 : case POST_DEC:
6714 : case PRE_DEC:
6715 : case POST_MODIFY:
6716 : case PRE_MODIFY:
6717 : return 0;
6718 : default:
6719 : break;
6720 : }
6721 : goal_mem = 1;
6722 : }
6723 0 : else if (CONSTANT_P (goal))
6724 : goal_const = 1;
6725 0 : else if (GET_CODE (goal) == PLUS
6726 0 : && XEXP (goal, 0) == stack_pointer_rtx
6727 0 : && CONSTANT_P (XEXP (goal, 1)))
6728 : goal_const = need_stable_sp = 1;
6729 0 : else if (GET_CODE (goal) == PLUS
6730 0 : && XEXP (goal, 0) == frame_pointer_rtx
6731 0 : && CONSTANT_P (XEXP (goal, 1)))
6732 : goal_const = 1;
6733 : else
6734 : return 0;
6735 :
6736 0 : num = 0;
6737 : /* Scan insns back from INSN, looking for one that copies
6738 : a value into or out of GOAL.
6739 : Stop and give up if we reach a label. */
6740 :
6741 0 : while (1)
6742 : {
6743 0 : p = PREV_INSN (p);
6744 0 : if (p && DEBUG_INSN_P (p))
6745 0 : continue;
6746 0 : num++;
6747 0 : if (p == 0 || LABEL_P (p)
6748 0 : || num > param_max_reload_search_insns)
6749 : return 0;
6750 :
6751 : /* Don't reuse register contents from before a setjmp-type
6752 : function call; on the second return (from the longjmp) it
6753 : might have been clobbered by a later reuse. It doesn't
6754 : seem worthwhile to actually go and see if it is actually
6755 : reused even if that information would be readily available;
6756 : just don't reuse it across the setjmp call. */
6757 0 : if (CALL_P (p) && find_reg_note (p, REG_SETJMP, NULL_RTX))
6758 : return 0;
6759 :
6760 0 : if (NONJUMP_INSN_P (p)
6761 : /* If we don't want spill regs ... */
6762 0 : && (! (reload_reg_p != 0
6763 : && reload_reg_p != (short *) HOST_WIDE_INT_1)
6764 : /* ... then ignore insns introduced by reload; they aren't
6765 : useful and can cause results in reload_as_needed to be
6766 : different from what they were when calculating the need for
6767 : spills. If we notice an input-reload insn here, we will
6768 : reject it below, but it might hide a usable equivalent.
6769 : That makes bad code. It may even fail: perhaps no reg was
6770 : spilled for this insn because it was assumed we would find
6771 : that equivalent. */
6772 0 : || INSN_UID (p) < reload_first_uid))
6773 : {
6774 0 : rtx tem;
6775 0 : pat = single_set (p);
6776 :
6777 : /* First check for something that sets some reg equal to GOAL. */
6778 0 : if (pat != 0
6779 0 : && ((regno >= 0
6780 0 : && true_regnum (SET_SRC (pat)) == regno
6781 0 : && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6782 : ||
6783 : (regno >= 0
6784 0 : && true_regnum (SET_DEST (pat)) == regno
6785 0 : && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6786 0 : ||
6787 0 : (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6788 : /* When looking for stack pointer + const,
6789 : make sure we don't use a stack adjust. */
6790 0 : && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6791 0 : && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6792 0 : || (goal_mem
6793 0 : && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6794 0 : && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6795 : || (goal_mem
6796 0 : && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6797 0 : && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6798 : /* If we are looking for a constant,
6799 : and something equivalent to that constant was copied
6800 : into a reg, we can use that reg. */
6801 0 : || (goal_const && REG_NOTES (p) != 0
6802 0 : && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6803 0 : && ((rtx_equal_p (XEXP (tem, 0), goal)
6804 0 : && (valueno
6805 0 : = true_regnum (valtry = SET_DEST (pat))) >= 0)
6806 0 : || (REG_P (SET_DEST (pat))
6807 0 : && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
6808 0 : && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6809 0 : && CONST_INT_P (goal)
6810 0 : && (goaltry = operand_subword (XEXP (tem, 0), 0,
6811 : 0, VOIDmode)) != 0
6812 0 : && rtx_equal_p (goal, goaltry)
6813 0 : && (valtry
6814 0 : = operand_subword (SET_DEST (pat), 0, 0,
6815 : VOIDmode))
6816 0 : && (valueno = true_regnum (valtry)) >= 0)))
6817 0 : || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6818 : NULL_RTX))
6819 0 : && REG_P (SET_DEST (pat))
6820 0 : && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem, 0))
6821 0 : && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6822 0 : && CONST_INT_P (goal)
6823 0 : && (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6824 : VOIDmode)) != 0
6825 0 : && rtx_equal_p (goal, goaltry)
6826 0 : && (valtry
6827 0 : = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6828 0 : && (valueno = true_regnum (valtry)) >= 0)))
6829 : {
6830 0 : if (other >= 0)
6831 : {
6832 0 : if (valueno != other)
6833 0 : continue;
6834 : }
6835 0 : else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6836 0 : continue;
6837 0 : else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6838 : mode, valueno))
6839 0 : continue;
6840 0 : value = valtry;
6841 0 : where = p;
6842 0 : break;
6843 : }
6844 : }
6845 : }
6846 :
6847 : /* We found a previous insn copying GOAL into a suitable other reg VALUE
6848 : (or copying VALUE into GOAL, if GOAL is also a register).
6849 : Now verify that VALUE is really valid. */
6850 :
6851 : /* VALUENO is the register number of VALUE; a hard register. */
6852 :
6853 : /* Don't try to re-use something that is killed in this insn. We want
6854 : to be able to trust REG_UNUSED notes. */
6855 0 : if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6856 : return 0;
6857 :
6858 : /* If we propose to get the value from the stack pointer or if GOAL is
6859 : a MEM based on the stack pointer, we need a stable SP. */
6860 0 : if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6861 0 : || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6862 : goal)))
6863 : need_stable_sp = 1;
6864 :
6865 : /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6866 0 : if (GET_MODE (value) != mode)
6867 : return 0;
6868 :
6869 : /* Reject VALUE if it was loaded from GOAL
6870 : and is also a register that appears in the address of GOAL. */
6871 :
6872 0 : if (goal_mem && value == SET_DEST (single_set (where))
6873 0 : && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6874 : goal, (rtx*) 0))
6875 : return 0;
6876 :
6877 : /* Reject registers that overlap GOAL. */
6878 :
6879 0 : if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6880 0 : nregs = hard_regno_nregs (regno, mode);
6881 : else
6882 : nregs = 1;
6883 0 : valuenregs = hard_regno_nregs (valueno, mode);
6884 :
6885 0 : if (!goal_mem && !goal_const
6886 0 : && regno + nregs > valueno && regno < valueno + valuenregs)
6887 : return 0;
6888 :
6889 : /* Reject VALUE if it is one of the regs reserved for reloads.
6890 : Reload1 knows how to reuse them anyway, and it would get
6891 : confused if we allocated one without its knowledge.
6892 : (Now that insns introduced by reload are ignored above,
6893 : this case shouldn't happen, but I'm not positive.) */
6894 :
6895 0 : if (reload_reg_p != 0 && reload_reg_p != (short *) HOST_WIDE_INT_1)
6896 : {
6897 : int i;
6898 0 : for (i = 0; i < valuenregs; ++i)
6899 0 : if (reload_reg_p[valueno + i] >= 0)
6900 : return 0;
6901 : }
6902 :
6903 : /* Reject VALUE if it is a register being used for an input reload
6904 : even if it is not one of those reserved. */
6905 :
6906 0 : if (reload_reg_p != 0)
6907 : {
6908 : int i;
6909 0 : for (i = 0; i < n_reloads; i++)
6910 0 : if (rld[i].reg_rtx != 0
6911 0 : && rld[i].in
6912 0 : && (int) REGNO (rld[i].reg_rtx) < valueno + valuenregs
6913 0 : && (int) END_REGNO (rld[i].reg_rtx) > valueno)
6914 : return 0;
6915 : }
6916 :
6917 0 : if (goal_mem)
6918 : /* We must treat frame pointer as varying here,
6919 : since it can vary--in a nonlocal goto as generated by expand_goto. */
6920 0 : goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6921 :
6922 : /* Now verify that the values of GOAL and VALUE remain unaltered
6923 : until INSN is reached. */
6924 :
6925 0 : p = insn;
6926 0 : while (1)
6927 : {
6928 0 : p = PREV_INSN (p);
6929 0 : if (p == where)
6930 : return value;
6931 :
6932 : /* Don't trust the conversion past a function call
6933 : if either of the two is in a call-clobbered register, or memory. */
6934 0 : if (CALL_P (p))
6935 : {
6936 0 : if (goal_mem || need_stable_sp)
6937 0 : return 0;
6938 :
6939 0 : function_abi callee_abi = insn_callee_abi (p);
6940 0 : if (regno >= 0
6941 : && regno < FIRST_PSEUDO_REGISTER
6942 0 : && callee_abi.clobbers_reg_p (mode, regno))
6943 : return 0;
6944 :
6945 0 : if (valueno >= 0
6946 : && valueno < FIRST_PSEUDO_REGISTER
6947 0 : && callee_abi.clobbers_reg_p (mode, valueno))
6948 : return 0;
6949 : }
6950 :
6951 0 : if (INSN_P (p))
6952 : {
6953 0 : pat = PATTERN (p);
6954 :
6955 : /* Watch out for unspec_volatile, and volatile asms. */
6956 0 : if (volatile_insn_p (pat))
6957 : return 0;
6958 :
6959 : /* If this insn P stores in either GOAL or VALUE, return 0.
6960 : If GOAL is a memory ref and this insn writes memory, return 0.
6961 : If GOAL is a memory ref and its address is not constant,
6962 : and this insn P changes a register used in GOAL, return 0. */
6963 :
6964 0 : if (GET_CODE (pat) == COND_EXEC)
6965 0 : pat = COND_EXEC_CODE (pat);
6966 0 : if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6967 : {
6968 0 : rtx dest = SET_DEST (pat);
6969 0 : while (GET_CODE (dest) == SUBREG
6970 0 : || GET_CODE (dest) == ZERO_EXTRACT
6971 0 : || GET_CODE (dest) == STRICT_LOW_PART)
6972 0 : dest = XEXP (dest, 0);
6973 0 : if (REG_P (dest))
6974 : {
6975 0 : int xregno = REGNO (dest);
6976 0 : int end_xregno = END_REGNO (dest);
6977 0 : if (xregno < regno + nregs && end_xregno > regno)
6978 : return 0;
6979 0 : if (xregno < valueno + valuenregs
6980 0 : && end_xregno > valueno)
6981 : return 0;
6982 0 : if (goal_mem_addr_varies
6983 0 : && reg_overlap_mentioned_for_reload_p (dest, goal))
6984 : return 0;
6985 0 : if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6986 : return 0;
6987 : }
6988 0 : else if (goal_mem && MEM_P (dest)
6989 0 : && ! push_operand (dest, GET_MODE (dest)))
6990 : return 0;
6991 0 : else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6992 0 : && reg_equiv_memory_loc (regno) != 0)
6993 : return 0;
6994 0 : else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6995 : return 0;
6996 : }
6997 0 : else if (GET_CODE (pat) == PARALLEL)
6998 : {
6999 0 : int i;
7000 0 : for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
7001 : {
7002 0 : rtx v1 = XVECEXP (pat, 0, i);
7003 0 : if (GET_CODE (v1) == COND_EXEC)
7004 0 : v1 = COND_EXEC_CODE (v1);
7005 0 : if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
7006 : {
7007 0 : rtx dest = SET_DEST (v1);
7008 0 : while (GET_CODE (dest) == SUBREG
7009 0 : || GET_CODE (dest) == ZERO_EXTRACT
7010 0 : || GET_CODE (dest) == STRICT_LOW_PART)
7011 0 : dest = XEXP (dest, 0);
7012 0 : if (REG_P (dest))
7013 : {
7014 0 : int xregno = REGNO (dest);
7015 0 : int end_xregno = END_REGNO (dest);
7016 0 : if (xregno < regno + nregs
7017 0 : && end_xregno > regno)
7018 : return 0;
7019 0 : if (xregno < valueno + valuenregs
7020 0 : && end_xregno > valueno)
7021 : return 0;
7022 0 : if (goal_mem_addr_varies
7023 0 : && reg_overlap_mentioned_for_reload_p (dest,
7024 : goal))
7025 : return 0;
7026 0 : if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7027 : return 0;
7028 : }
7029 0 : else if (goal_mem && MEM_P (dest)
7030 0 : && ! push_operand (dest, GET_MODE (dest)))
7031 : return 0;
7032 0 : else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7033 0 : && reg_equiv_memory_loc (regno) != 0)
7034 : return 0;
7035 0 : else if (need_stable_sp
7036 0 : && push_operand (dest, GET_MODE (dest)))
7037 : return 0;
7038 : }
7039 : }
7040 : }
7041 :
7042 0 : if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7043 : {
7044 : rtx link;
7045 :
7046 0 : for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7047 0 : link = XEXP (link, 1))
7048 : {
7049 0 : pat = XEXP (link, 0);
7050 0 : if (GET_CODE (pat) == CLOBBER)
7051 : {
7052 0 : rtx dest = SET_DEST (pat);
7053 :
7054 0 : if (REG_P (dest))
7055 : {
7056 0 : int xregno = REGNO (dest);
7057 0 : int end_xregno = END_REGNO (dest);
7058 :
7059 0 : if (xregno < regno + nregs
7060 0 : && end_xregno > regno)
7061 : return 0;
7062 0 : else if (xregno < valueno + valuenregs
7063 0 : && end_xregno > valueno)
7064 : return 0;
7065 0 : else if (goal_mem_addr_varies
7066 0 : && reg_overlap_mentioned_for_reload_p (dest,
7067 : goal))
7068 : return 0;
7069 : }
7070 :
7071 0 : else if (goal_mem && MEM_P (dest)
7072 0 : && ! push_operand (dest, GET_MODE (dest)))
7073 : return 0;
7074 0 : else if (need_stable_sp
7075 0 : && push_operand (dest, GET_MODE (dest)))
7076 : return 0;
7077 : }
7078 : }
7079 : }
7080 :
7081 : #if AUTO_INC_DEC
7082 : /* If this insn auto-increments or auto-decrements
7083 : either regno or valueno, return 0 now.
7084 : If GOAL is a memory ref and its address is not constant,
7085 : and this insn P increments a register used in GOAL, return 0. */
7086 : {
7087 : rtx link;
7088 :
7089 : for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7090 : if (REG_NOTE_KIND (link) == REG_INC
7091 : && REG_P (XEXP (link, 0)))
7092 : {
7093 : int incno = REGNO (XEXP (link, 0));
7094 : if (incno < regno + nregs && incno >= regno)
7095 : return 0;
7096 : if (incno < valueno + valuenregs && incno >= valueno)
7097 : return 0;
7098 : if (goal_mem_addr_varies
7099 : && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7100 : goal))
7101 : return 0;
7102 : }
7103 : }
7104 : #endif
7105 : }
7106 : }
7107 : }
7108 :
7109 : /* Find a place where INCED appears in an increment or decrement operator
7110 : within X, and return the amount INCED is incremented or decremented by.
7111 : The value is always positive. */
7112 :
7113 : static poly_int64
7114 0 : find_inc_amount (rtx x, rtx inced)
7115 : {
7116 0 : enum rtx_code code = GET_CODE (x);
7117 0 : const char *fmt;
7118 0 : int i;
7119 :
7120 0 : if (code == MEM)
7121 : {
7122 0 : rtx addr = XEXP (x, 0);
7123 0 : if ((GET_CODE (addr) == PRE_DEC
7124 0 : || GET_CODE (addr) == POST_DEC
7125 0 : || GET_CODE (addr) == PRE_INC
7126 0 : || GET_CODE (addr) == POST_INC)
7127 0 : && XEXP (addr, 0) == inced)
7128 0 : return GET_MODE_SIZE (GET_MODE (x));
7129 0 : else if ((GET_CODE (addr) == PRE_MODIFY
7130 0 : || GET_CODE (addr) == POST_MODIFY)
7131 0 : && GET_CODE (XEXP (addr, 1)) == PLUS
7132 0 : && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7133 0 : && XEXP (addr, 0) == inced
7134 0 : && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7135 : {
7136 0 : i = INTVAL (XEXP (XEXP (addr, 1), 1));
7137 0 : return i < 0 ? -i : i;
7138 : }
7139 : }
7140 :
7141 0 : fmt = GET_RTX_FORMAT (code);
7142 0 : for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7143 : {
7144 0 : if (fmt[i] == 'e')
7145 : {
7146 0 : poly_int64 tem = find_inc_amount (XEXP (x, i), inced);
7147 0 : if (maybe_ne (tem, 0))
7148 0 : return tem;
7149 : }
7150 0 : if (fmt[i] == 'E')
7151 : {
7152 0 : int j;
7153 0 : for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7154 : {
7155 0 : poly_int64 tem = find_inc_amount (XVECEXP (x, i, j), inced);
7156 0 : if (maybe_ne (tem, 0))
7157 0 : return tem;
7158 : }
7159 : }
7160 : }
7161 :
7162 0 : return 0;
7163 : }
7164 :
7165 : /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7166 : REG_INC note in insn INSN. REGNO must refer to a hard register. */
7167 :
7168 : static int
7169 0 : reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7170 : rtx insn)
7171 : {
7172 0 : rtx link;
7173 :
7174 0 : if (!AUTO_INC_DEC)
7175 0 : return 0;
7176 :
7177 : gcc_assert (insn);
7178 :
7179 : if (! INSN_P (insn))
7180 : return 0;
7181 :
7182 : for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7183 : if (REG_NOTE_KIND (link) == REG_INC)
7184 : {
7185 : unsigned int test = (int) REGNO (XEXP (link, 0));
7186 : if (test >= regno && test < endregno)
7187 : return 1;
7188 : }
7189 : return 0;
7190 : }
7191 :
7192 : /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7193 : If SETS is 1, also consider SETs. If SETS is 2, enable checking
7194 : REG_INC. REGNO must refer to a hard register. */
7195 :
7196 : int
7197 0 : regno_clobbered_p (unsigned int regno, rtx_insn *insn, machine_mode mode,
7198 : int sets)
7199 : {
7200 : /* regno must be a hard register. */
7201 0 : gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7202 :
7203 0 : unsigned int endregno = end_hard_regno (mode, regno);
7204 :
7205 0 : if ((GET_CODE (PATTERN (insn)) == CLOBBER
7206 0 : || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7207 0 : && REG_P (XEXP (PATTERN (insn), 0)))
7208 : {
7209 0 : unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7210 :
7211 0 : return test >= regno && test < endregno;
7212 : }
7213 :
7214 0 : if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7215 : return 1;
7216 :
7217 0 : if (GET_CODE (PATTERN (insn)) == PARALLEL)
7218 : {
7219 0 : int i = XVECLEN (PATTERN (insn), 0) - 1;
7220 :
7221 0 : for (; i >= 0; i--)
7222 : {
7223 0 : rtx elt = XVECEXP (PATTERN (insn), 0, i);
7224 0 : if ((GET_CODE (elt) == CLOBBER
7225 0 : || (sets == 1 && GET_CODE (elt) == SET))
7226 0 : && REG_P (XEXP (elt, 0)))
7227 : {
7228 0 : unsigned int test = REGNO (XEXP (elt, 0));
7229 :
7230 0 : if (test >= regno && test < endregno)
7231 : return 1;
7232 : }
7233 0 : if (sets == 2
7234 : && reg_inc_found_and_valid_p (regno, endregno, elt))
7235 : return 1;
7236 : }
7237 : }
7238 :
7239 : return 0;
7240 : }
7241 :
7242 : /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7243 : rtx
7244 0 : reload_adjust_reg_for_mode (rtx reloadreg, machine_mode mode)
7245 : {
7246 0 : int regno;
7247 :
7248 0 : if (GET_MODE (reloadreg) == mode)
7249 : return reloadreg;
7250 :
7251 0 : regno = REGNO (reloadreg);
7252 :
7253 0 : if (REG_WORDS_BIG_ENDIAN)
7254 : regno += ((int) REG_NREGS (reloadreg)
7255 : - (int) hard_regno_nregs (regno, mode));
7256 :
7257 0 : return gen_rtx_REG (mode, regno);
7258 : }
7259 :
7260 : static const char *const reload_when_needed_name[] =
7261 : {
7262 : "RELOAD_FOR_INPUT",
7263 : "RELOAD_FOR_OUTPUT",
7264 : "RELOAD_FOR_INSN",
7265 : "RELOAD_FOR_INPUT_ADDRESS",
7266 : "RELOAD_FOR_INPADDR_ADDRESS",
7267 : "RELOAD_FOR_OUTPUT_ADDRESS",
7268 : "RELOAD_FOR_OUTADDR_ADDRESS",
7269 : "RELOAD_FOR_OPERAND_ADDRESS",
7270 : "RELOAD_FOR_OPADDR_ADDR",
7271 : "RELOAD_OTHER",
7272 : "RELOAD_FOR_OTHER_ADDRESS"
7273 : };
7274 :
7275 : /* These functions are used to print the variables set by 'find_reloads' */
7276 :
7277 : DEBUG_FUNCTION void
7278 0 : debug_reload_to_stream (FILE *f)
7279 : {
7280 0 : int r;
7281 0 : const char *prefix;
7282 :
7283 0 : if (! f)
7284 0 : f = stderr;
7285 0 : for (r = 0; r < n_reloads; r++)
7286 : {
7287 0 : fprintf (f, "Reload %d: ", r);
7288 :
7289 0 : if (rld[r].in != 0)
7290 : {
7291 0 : fprintf (f, "reload_in (%s) = ",
7292 0 : GET_MODE_NAME (rld[r].inmode));
7293 0 : print_inline_rtx (f, rld[r].in, 24);
7294 0 : fprintf (f, "\n\t");
7295 : }
7296 :
7297 0 : if (rld[r].out != 0)
7298 : {
7299 0 : fprintf (f, "reload_out (%s) = ",
7300 0 : GET_MODE_NAME (rld[r].outmode));
7301 0 : print_inline_rtx (f, rld[r].out, 24);
7302 0 : fprintf (f, "\n\t");
7303 : }
7304 :
7305 0 : fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7306 :
7307 0 : fprintf (f, "%s (opnum = %d)",
7308 0 : reload_when_needed_name[(int) rld[r].when_needed],
7309 : rld[r].opnum);
7310 :
7311 0 : if (rld[r].optional)
7312 0 : fprintf (f, ", optional");
7313 :
7314 0 : if (rld[r].nongroup)
7315 0 : fprintf (f, ", nongroup");
7316 :
7317 0 : if (maybe_ne (rld[r].inc, 0))
7318 : {
7319 0 : fprintf (f, ", inc by ");
7320 0 : print_dec (rld[r].inc, f, SIGNED);
7321 : }
7322 :
7323 0 : if (rld[r].nocombine)
7324 0 : fprintf (f, ", can't combine");
7325 :
7326 0 : if (rld[r].secondary_p)
7327 0 : fprintf (f, ", secondary_reload_p");
7328 :
7329 0 : if (rld[r].in_reg != 0)
7330 : {
7331 0 : fprintf (f, "\n\treload_in_reg: ");
7332 0 : print_inline_rtx (f, rld[r].in_reg, 24);
7333 : }
7334 :
7335 0 : if (rld[r].out_reg != 0)
7336 : {
7337 0 : fprintf (f, "\n\treload_out_reg: ");
7338 0 : print_inline_rtx (f, rld[r].out_reg, 24);
7339 : }
7340 :
7341 0 : if (rld[r].reg_rtx != 0)
7342 : {
7343 0 : fprintf (f, "\n\treload_reg_rtx: ");
7344 0 : print_inline_rtx (f, rld[r].reg_rtx, 24);
7345 : }
7346 :
7347 0 : prefix = "\n\t";
7348 0 : if (rld[r].secondary_in_reload != -1)
7349 : {
7350 0 : fprintf (f, "%ssecondary_in_reload = %d",
7351 : prefix, rld[r].secondary_in_reload);
7352 0 : prefix = ", ";
7353 : }
7354 :
7355 0 : if (rld[r].secondary_out_reload != -1)
7356 0 : fprintf (f, "%ssecondary_out_reload = %d\n",
7357 : prefix, rld[r].secondary_out_reload);
7358 :
7359 0 : prefix = "\n\t";
7360 0 : if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7361 : {
7362 0 : fprintf (f, "%ssecondary_in_icode = %s", prefix,
7363 0 : insn_data[rld[r].secondary_in_icode].name);
7364 0 : prefix = ", ";
7365 : }
7366 :
7367 0 : if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7368 0 : fprintf (f, "%ssecondary_out_icode = %s", prefix,
7369 0 : insn_data[rld[r].secondary_out_icode].name);
7370 :
7371 0 : fprintf (f, "\n");
7372 : }
7373 0 : }
7374 :
7375 : DEBUG_FUNCTION void
7376 0 : debug_reload (void)
7377 : {
7378 0 : debug_reload_to_stream (stderr);
7379 0 : }
|
