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1 : : // Implementation of instruction-related RTL SSA functions -*- C++ -*-
2 : : // Copyright (C) 2020-2025 Free Software Foundation, Inc.
3 : : //
4 : : // This file is part of GCC.
5 : : //
6 : : // GCC is free software; you can redistribute it and/or modify it under
7 : : // the terms of the GNU General Public License as published by the Free
8 : : // Software Foundation; either version 3, or (at your option) any later
9 : : // version.
10 : : //
11 : : // GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 : : // WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 : : // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 : : // for more details.
15 : : //
16 : : // You should have received a copy of the GNU General Public License
17 : : // along with GCC; see the file COPYING3. If not see
18 : : // <http://www.gnu.org/licenses/>.
19 : :
20 : : #define INCLUDE_ALGORITHM
21 : : #define INCLUDE_FUNCTIONAL
22 : : #define INCLUDE_ARRAY
23 : : #include "config.h"
24 : : #include "system.h"
25 : : #include "coretypes.h"
26 : : #include "backend.h"
27 : : #include "rtl.h"
28 : : #include "df.h"
29 : : #include "rtl-ssa.h"
30 : : #include "rtl-ssa/internals.h"
31 : : #include "rtl-ssa/internals.inl"
32 : : #include "predict.h"
33 : : #include "print-rtl.h"
34 : : #include "rtl-iter.h"
35 : :
36 : : using namespace rtl_ssa;
37 : :
38 : : // The gap to leave between program points when building up the list
39 : : // of instructions for the first time. Using 2 allows an instruction
40 : : // to be inserted between two others without resorting to splay tree
41 : : // ordering. Using 0 is useful as a debugging aid to stress the
42 : : // splay tree code.
43 : : static const unsigned int POINT_INCREASE = 2;
44 : :
45 : : // Calculate and record the cost of the instruction, based on the
46 : : // form it had before any in-progress changes were made.
47 : : void
48 : 13964442 : insn_info::calculate_cost () const
49 : : {
50 : 13964442 : basic_block cfg_bb = BLOCK_FOR_INSN (m_rtl);
51 : 13964442 : undo_recog_changes (0);
52 : 13964442 : if (INSN_CODE (m_rtl) == NOOP_MOVE_INSN_CODE)
53 : : // insn_cost also uses 0 to mean "don't know". Callers that
54 : : // want to distinguish the cases will need to check INSN_CODE.
55 : 597 : m_cost_or_uid = 0;
56 : : else
57 : 13963845 : m_cost_or_uid = insn_cost (m_rtl, optimize_bb_for_speed_p (cfg_bb));
58 : 13964442 : }
59 : :
60 : : // Add NOTE to the instruction's notes.
61 : : void
62 : 16192268 : insn_info::add_note (insn_note *note)
63 : : {
64 : 16192268 : insn_note **ptr = &m_first_note;
65 : : // Always put the order node first, since it's the one that's likely
66 : : // to be used most often.
67 : 16192268 : if (*ptr && (*ptr)->kind () == insn_note_kind::ORDER_NODE)
68 : 0 : ptr = &(*ptr)->m_next_note;
69 : 16192268 : note->m_next_note = *ptr;
70 : 16192268 : *ptr = note;
71 : 16192268 : }
72 : :
73 : : // Remove NOTE from the instruction's notes.
74 : : void
75 : 1642 : insn_info::remove_note (insn_note *note)
76 : : {
77 : 1642 : insn_note **ptr = &m_first_note;
78 : 1642 : while (*ptr != note)
79 : 0 : ptr = &(*ptr)->m_next_note;
80 : 1642 : *ptr = note->m_next_note;
81 : 1642 : }
82 : :
83 : : // Implement compare_with for the case in which this insn and OTHER
84 : : // have the same program point.
85 : : int
86 : 1298 : insn_info::slow_compare_with (const insn_info &other) const
87 : : {
88 : 1298 : return order_splay_tree::compare_nodes (get_known_order_node (),
89 : 1298 : other.get_known_order_node ());
90 : : }
91 : :
92 : : // Print insn uid UID to PP, where UID has the same form as insn_info::uid.
93 : : void
94 : 0 : insn_info::print_uid (pretty_printer *pp, int uid)
95 : : {
96 : 0 : char tmp[3 * sizeof (uid) + 2];
97 : 0 : if (uid < 0)
98 : : // An artificial instruction.
99 : 0 : snprintf (tmp, sizeof (tmp), "a%d", -uid);
100 : : else
101 : : // A real RTL instruction.
102 : 0 : snprintf (tmp, sizeof (tmp), "i%d", uid);
103 : 0 : pp_string (pp, tmp);
104 : 0 : }
105 : :
106 : : // See comment above declaration.
107 : : void
108 : 0 : insn_info::print_identifier (pretty_printer *pp) const
109 : : {
110 : 0 : print_uid (pp, uid ());
111 : 0 : }
112 : :
113 : : // See comment above declaration.
114 : : void
115 : 0 : insn_info::print_location (pretty_printer *pp) const
116 : : {
117 : 0 : if (bb_info *bb = this->bb ())
118 : : {
119 : 0 : ebb_info *ebb = bb->ebb ();
120 : 0 : if (ebb && is_phi ())
121 : 0 : ebb->print_identifier (pp);
122 : : else
123 : 0 : bb->print_identifier (pp);
124 : 0 : pp_string (pp, " at point ");
125 : 0 : pp_decimal_int (pp, m_point);
126 : : }
127 : : else
128 : 0 : pp_string (pp, "<unknown location>");
129 : 0 : }
130 : :
131 : : // See comment above declaration.
132 : : void
133 : 0 : insn_info::print_identifier_and_location (pretty_printer *pp) const
134 : : {
135 : 0 : if (m_is_asm)
136 : 0 : pp_string (pp, "asm ");
137 : 0 : if (m_is_debug_insn)
138 : 0 : pp_string (pp, "debug ");
139 : 0 : pp_string (pp, "insn ");
140 : 0 : print_identifier (pp);
141 : 0 : pp_string (pp, " in ");
142 : 0 : print_location (pp);
143 : 0 : }
144 : :
145 : : // See comment above declaration.
146 : : void
147 : 0 : insn_info::print_full (pretty_printer *pp) const
148 : : {
149 : 0 : print_identifier_and_location (pp);
150 : 0 : pp_colon (pp);
151 : 0 : if (is_real ())
152 : : {
153 : 0 : pp_newline_and_indent (pp, 2);
154 : 0 : if (has_been_deleted ())
155 : 0 : pp_string (pp, "deleted");
156 : : else
157 : : {
158 : : // Print the insn pattern to a temporary printer.
159 : 0 : pretty_printer sub_pp;
160 : 0 : print_insn_with_notes (&sub_pp, rtl ());
161 : 0 : const char *text = pp_formatted_text (&sub_pp);
162 : :
163 : : // Calculate the length of the maximum line in the pattern.
164 : 0 : unsigned int max_len = 0;
165 : 0 : const char *start = text;
166 : 0 : while (const char *end = strchr (start, '\n'))
167 : : {
168 : 0 : max_len = MAX (max_len, (unsigned int) (end - start));
169 : 0 : start = end + 1;
170 : 0 : }
171 : :
172 : : // Print a separator before or after the pattern.
173 : 0 : auto print_top_bottom = [&]()
174 : : {
175 : 0 : pp_character (pp, '+');
176 : 0 : for (unsigned int i = 0; i < max_len + 2; ++i)
177 : 0 : pp_character (pp, '-');
178 : 0 : };
179 : :
180 : 0 : print_top_bottom ();
181 : 0 : start = text;
182 : 0 : while (const char *end = strchr (start, '\n'))
183 : : {
184 : 0 : pp_newline_and_indent (pp, 0);
185 : 0 : pp_character (pp, '|');
186 : : // Each line of the pattern already starts with a space.
187 : : // so we don't need to add another one here.
188 : 0 : pp_append_text (pp, start, end);
189 : 0 : start = end + 1;
190 : 0 : }
191 : 0 : pp_newline_and_indent (pp, 0);
192 : 0 : print_top_bottom ();
193 : :
194 : 0 : if (m_cost_or_uid != UNKNOWN_COST)
195 : : {
196 : 0 : pp_newline_and_indent (pp, 0);
197 : 0 : pp_string (pp, "cost: ");
198 : 0 : pp_decimal_int (pp, m_cost_or_uid);
199 : : }
200 : 0 : if (m_has_pre_post_modify)
201 : : {
202 : 0 : pp_newline_and_indent (pp, 0);
203 : 0 : pp_string (pp, "has pre/post-modify operations");
204 : : }
205 : 0 : if (m_has_volatile_refs)
206 : : {
207 : 0 : pp_newline_and_indent (pp, 0);
208 : 0 : pp_string (pp, "has volatile refs");
209 : : }
210 : 0 : if (m_is_temp)
211 : : {
212 : 0 : pp_newline_and_indent (pp, 0);
213 : 0 : pp_string (pp, "temporary");
214 : : }
215 : 0 : }
216 : 0 : pp_indentation (pp) -= 2;
217 : : }
218 : :
219 : 0 : auto print_accesses = [&](const char *heading, access_array accesses,
220 : : unsigned int flags)
221 : : {
222 : 0 : if (!accesses.empty ())
223 : : {
224 : 0 : pp_newline_and_indent (pp, 2);
225 : 0 : pp_string (pp, heading);
226 : 0 : pp_newline_and_indent (pp, 2);
227 : 0 : pp_accesses (pp, accesses, flags);
228 : 0 : pp_indentation (pp) -= 4;
229 : : }
230 : 0 : };
231 : :
232 : 0 : print_accesses ("uses:", uses (), PP_ACCESS_USER);
233 : 0 : auto *call_clobbers_note = find_note<insn_call_clobbers_note> ();
234 : 0 : if (call_clobbers_note)
235 : : {
236 : 0 : pp_newline_and_indent (pp, 2);
237 : 0 : pp_string (pp, "has call clobbers for ABI ");
238 : 0 : pp_decimal_int (pp, call_clobbers_note->abi_id ());
239 : 0 : pp_indentation (pp) -= 2;
240 : : }
241 : 0 : print_accesses ("defines:", defs (), PP_ACCESS_SETTER);
242 : 0 : if (num_uses () == 0 && !call_clobbers_note && num_defs () == 0)
243 : : {
244 : 0 : pp_newline_and_indent (pp, 2);
245 : 0 : pp_string (pp, "has no uses or defs");
246 : 0 : pp_indentation (pp) -= 2;
247 : : }
248 : :
249 : 0 : if (order_node *node = get_order_node ())
250 : : {
251 : 0 : while (node->m_parent)
252 : : node = node->m_parent;
253 : :
254 : 0 : pp_newline_and_indent (pp, 2);
255 : 0 : pp_string (pp, "insn order: ");
256 : 0 : pp_newline_and_indent (pp, 2);
257 : 0 : auto print_order = [](pretty_printer *pp, order_node *node)
258 : : {
259 : 0 : print_uid (pp, node->uid ());
260 : : };
261 : 0 : order_splay_tree::print (pp, node, print_order);
262 : 0 : pp_indentation (pp) -= 4;
263 : : }
264 : 0 : }
265 : :
266 : : // Return an insn_info::order_node for INSN, creating one if necessary.
267 : : insn_info::order_node *
268 : 2348 : function_info::need_order_node (insn_info *insn)
269 : : {
270 : 2348 : insn_info::order_node *order = insn->get_order_node ();
271 : 2218 : if (!order)
272 : : {
273 : 2218 : order = allocate<insn_info::order_node> (insn->uid ());
274 : 2218 : insn->add_note (order);
275 : : }
276 : 2348 : return order;
277 : : }
278 : :
279 : : // Add instruction INSN immediately after AFTER in the reverse postorder list.
280 : : // INSN is not currently in the list.
281 : : void
282 : 497618717 : function_info::add_insn_after (insn_info *insn, insn_info *after)
283 : : {
284 : 497618717 : gcc_checking_assert (!insn->has_insn_links ());
285 : :
286 : 497618717 : insn->copy_next_from (after);
287 : 497618717 : after->set_next_any_insn (insn);
288 : :
289 : : // The prev link is easy if AFTER and INSN are the same type.
290 : : // Handle the other cases below.
291 : 497618717 : if (after->is_debug_insn () == insn->is_debug_insn ())
292 : 446021053 : insn->set_prev_sametype_insn (after);
293 : :
294 : 497618717 : if (insn_info *next = insn->next_any_insn ())
295 : : {
296 : 21915 : if (insn->is_debug_insn () == next->is_debug_insn ())
297 : : {
298 : : // INSN might now be the start of the subsequence of debug insns,
299 : : // and so its prev pointer might point to the end of the subsequence
300 : : // instead of AFTER.
301 : 18589 : insn->copy_prev_from (next);
302 : 18589 : next->set_prev_sametype_insn (insn);
303 : : }
304 : 3326 : else if (insn->is_debug_insn ()) // && !next->is_debug_insn ()
305 : : {
306 : : // INSN ends a subsequence of debug instructions. Find the
307 : : // first debug instruction in the subsequence, which might
308 : : // be INSN itself. (If it isn't, then AFTER is also a debug
309 : : // instruction and we updated INSN's prev link above.)
310 : 0 : insn_info *first = next->prev_nondebug_insn ()->next_any_insn ();
311 : 0 : first->set_last_debug_insn (insn);
312 : : }
313 : : else // !insn->is_debug_insn () && next->is_debug_insn ()
314 : : {
315 : : // At present we don't (need to) support inserting a nondebug
316 : : // instruction between two existing debug instructions.
317 : 3326 : gcc_assert (!after->is_debug_insn ());
318 : :
319 : : // Find the next nondebug insn and update its previous pointer
320 : : // to point to INSN.
321 : 3326 : auto next_nondebug = next->last_debug_insn ()->next_any_insn ();
322 : 3326 : gcc_checking_assert (!next_nondebug->is_debug_insn ());
323 : 3326 : next_nondebug->set_prev_sametype_insn (insn);
324 : : }
325 : :
326 : : // If AFTER and NEXT are separated by at least two points, we can
327 : : // use a unique point number for INSN. Otherwise INSN will have
328 : : // the same point number as AFTER.
329 : 21915 : insn->set_point ((next->point () + after->point ()) / 2);
330 : : }
331 : : else
332 : : {
333 : 497596802 : if (!insn->is_debug_insn ())
334 : : {
335 : 336621888 : insn->set_prev_sametype_insn (m_last_nondebug_insn);
336 : 336621888 : m_last_nondebug_insn = insn;
337 : : }
338 : : else
339 : : // There is now at least one debug instruction after
340 : : // m_last_nondebug_insn: either INSN itself, or the start of
341 : : // a longer subsequence of debug insns that now ends with AFTER
342 : : // followed by INSN.
343 : 321949828 : m_last_nondebug_insn->next_any_insn ()->set_last_debug_insn (insn);
344 : 497596802 : m_last_insn = insn;
345 : :
346 : 497596802 : insn->set_point (after->point () + POINT_INCREASE);
347 : : }
348 : :
349 : : // If INSN's program point is the same as AFTER's, we need to use the
350 : : // splay tree to record their relative order.
351 : 497618717 : if (insn->point () == after->point ())
352 : : {
353 : 1174 : insn_info::order_node *after_node = need_order_node (after);
354 : 1174 : insn_info::order_node *insn_node = need_order_node (insn);
355 : 1174 : insn_info::order_splay_tree::insert_child (after_node, 1, insn_node);
356 : : }
357 : 497618717 : }
358 : :
359 : : // Replace non-debug instruction OLD_INSN with non-debug instruction NEW_INSN.
360 : : // NEW_INSN is not currently linked.
361 : : void
362 : 21915 : function_info::replace_nondebug_insn (insn_info *old_insn, insn_info *new_insn)
363 : : {
364 : 21915 : gcc_assert (!old_insn->is_debug_insn ()
365 : : && !new_insn->is_debug_insn ()
366 : : && !new_insn->has_insn_links ());
367 : :
368 : 21915 : insn_info *prev = old_insn->prev_any_insn ();
369 : 21915 : insn_info *next_nondebug = old_insn->next_nondebug_insn ();
370 : :
371 : : // We should never remove the entry or exit block's instructions.
372 : 21915 : gcc_checking_assert (prev && next_nondebug);
373 : :
374 : 21915 : new_insn->copy_prev_from (old_insn);
375 : 21915 : new_insn->copy_next_from (old_insn);
376 : :
377 : 21915 : prev->set_next_any_insn (new_insn);
378 : 21915 : next_nondebug->set_prev_sametype_insn (new_insn);
379 : :
380 : 21915 : new_insn->set_point (old_insn->point ());
381 : 21915 : if (insn_info::order_node *order = old_insn->get_order_node ())
382 : : {
383 : 1174 : order->set_uid (new_insn->uid ());
384 : 1174 : old_insn->remove_note (order);
385 : 1174 : new_insn->add_note (order);
386 : : }
387 : :
388 : 21915 : old_insn->clear_insn_links ();
389 : 21915 : }
390 : :
391 : : // Remove INSN from the function's list of instructions.
392 : : void
393 : 2297257 : function_info::remove_insn (insn_info *insn)
394 : : {
395 : 2297257 : if (insn_info::order_node *order = insn->get_order_node ())
396 : : {
397 : 468 : insn_info::order_splay_tree::remove_node (order);
398 : 468 : insn->remove_note (order);
399 : : }
400 : :
401 : 4594514 : if (auto *note = insn->find_note<insn_call_clobbers_note> ())
402 : : {
403 : 0 : ebb_call_clobbers_info *ecc = insn->ebb ()->first_call_clobbers ();
404 : 0 : while (ecc->abi ()->id () != note->abi_id ())
405 : 0 : ecc = ecc->next ();
406 : 0 : int comparison = lookup_call_clobbers (*ecc, insn);
407 : 0 : gcc_assert (comparison == 0);
408 : 0 : ecc->remove_root ();
409 : : }
410 : :
411 : 2297257 : insn_info *prev = insn->prev_any_insn ();
412 : 2297257 : insn_info *next = insn->next_any_insn ();
413 : 2297257 : insn_info *prev_nondebug = insn->prev_nondebug_insn ();
414 : 2297257 : insn_info *next_nondebug = insn->next_nondebug_insn ();
415 : :
416 : : // We should never remove the entry or exit block's instructions.
417 : : // At present we also don't remove entire blocks, so should never
418 : : // remove debug instructions.
419 : 2297257 : gcc_checking_assert (prev_nondebug
420 : : && next_nondebug
421 : : && !insn->is_debug_insn ());
422 : :
423 : 2297257 : if (prev->is_debug_insn () && next->is_debug_insn ())
424 : : {
425 : : // We need to stitch together two subsequences of debug insns.
426 : 12024 : insn_info *last = next->last_debug_insn ();
427 : 12024 : next->set_prev_sametype_insn (prev);
428 : 24048 : prev_nondebug->next_any_insn ()->set_last_debug_insn (last);
429 : : }
430 : 2297257 : prev->set_next_any_insn (next);
431 : 2297257 : next_nondebug->set_prev_sametype_insn (prev_nondebug);
432 : :
433 : 2297257 : insn->clear_insn_links ();
434 : 2297257 : }
435 : :
436 : : // Create an artificial instruction for BB, associating it with RTL (which can
437 : : // be null). Add the new instruction to the end of the function's list and
438 : : // return the new instruction.
439 : : insn_info *
440 : 121389527 : function_info::append_artificial_insn (bb_info *bb, rtx_insn *rtl)
441 : : {
442 : 121389527 : insn_info *insn = allocate<insn_info> (bb, rtl, m_next_artificial_uid);
443 : 121389527 : m_next_artificial_uid -= 1;
444 : 121389527 : append_insn (insn);
445 : 121389527 : return insn;
446 : : }
447 : :
448 : : // Finish building a new list of uses and definitions for instruction INSN.
449 : : void
450 : 468608957 : function_info::finish_insn_accesses (insn_info *insn)
451 : : {
452 : 468608957 : unsigned int num_defs = m_temp_defs.length ();
453 : 468608957 : unsigned int num_uses = m_temp_uses.length ();
454 : 468608957 : obstack_make_room (&m_obstack, num_defs + num_uses);
455 : 468608957 : if (num_defs)
456 : : {
457 : 201005734 : sort_accesses (m_temp_defs);
458 : 201005734 : obstack_grow (&m_obstack, m_temp_defs.address (),
459 : : num_defs * sizeof (access_info *));
460 : 201005734 : m_temp_defs.truncate (0);
461 : : }
462 : 468608957 : if (num_uses)
463 : : {
464 : 266467275 : sort_accesses (m_temp_uses);
465 : 266467275 : obstack_grow (&m_obstack, m_temp_uses.address (),
466 : : num_uses * sizeof (access_info *));
467 : 266467275 : m_temp_uses.truncate (0);
468 : : }
469 : 468608957 : void *addr = obstack_finish (&m_obstack);
470 : 468608957 : insn->set_accesses (static_cast<access_info **> (addr), num_defs, num_uses);
471 : 468608957 : }
472 : :
473 : : // Called while building SSA form using BI. Create and return a use of
474 : : // register RESOURCE in INSN. Create a degenerate phi where necessary.
475 : : use_info *
476 : 484723121 : function_info::create_reg_use (build_info &bi, insn_info *insn,
477 : : resource_info resource)
478 : : {
479 : 484723121 : set_info *value = bi.current_reg_value (resource.regno);
480 : 484723121 : if (value && value->ebb () != bi.current_ebb)
481 : : {
482 : 211997892 : if (insn->is_debug_insn ())
483 : 15973777 : value = look_through_degenerate_phi (value);
484 : 196024115 : else if (bitmap_bit_p (bi.potential_phi_regs, resource.regno))
485 : : {
486 : : // VALUE is defined by a previous EBB and RESOURCE has multiple
487 : : // definitions. Create a degenerate phi in the current EBB
488 : : // so that all definitions and uses follow a linear RPO view;
489 : : // see rtl.texi for details.
490 : 20648461 : access_info *inputs[] = { look_through_degenerate_phi (value) };
491 : 20648461 : value = create_phi (bi.current_ebb, value->resource (), inputs, 1);
492 : 20648461 : bi.record_reg_def (value);
493 : : }
494 : : }
495 : 484723121 : auto *use = allocate<use_info> (insn, resource, value);
496 : 484723121 : add_use (use);
497 : 484723121 : return use;
498 : : }
499 : :
500 : : // Called while building SSA form using BI. Record that INSN contains
501 : : // read reference REF. If this requires new entries to be added to
502 : : // INSN->uses (), add those entries to the list we're building in
503 : : // m_temp_uses.
504 : : void
505 : 380185645 : function_info::record_use (build_info &bi, insn_info *insn,
506 : : rtx_obj_reference ref)
507 : : {
508 : 380185645 : unsigned int regno = ref.regno;
509 : 380185645 : machine_mode mode = ref.is_reg () ? ref.mode : BLKmode;
510 : 380185645 : access_info *access = bi.last_access[ref.regno + 1];
511 : 380185645 : use_info *use = safe_dyn_cast<use_info *> (access);
512 : 380185645 : if (!use)
513 : : {
514 : 346040711 : set_info *value = safe_dyn_cast<set_info *> (access);
515 : : // In order to ensure that -g doesn't affect codegen, uses in debug
516 : : // instructions do not affect liveness, either in DF or here.
517 : : // This means that there might be no correct definition of the resource
518 : : // available (e.g. if it would require a phi node that the nondebug
519 : : // code doesn't need). Perhaps we could have "debug phi nodes" as
520 : : // well as "debug instructions", but that would require a method
521 : : // of building phi nodes that didn't depend on DF liveness information,
522 : : // and so might be significantly more expensive.
523 : : //
524 : : // Therefore, the only value we try to attach to a use by a debug
525 : : // instruction is VALUE itself (as we would for nondebug instructions).
526 : : // We then need to make a conservative check for whether VALUE is
527 : : // actually correct.
528 : 384641815 : auto value_is_valid = [&]()
529 : : {
530 : : // Memmory always has a valid definition.
531 : 38601104 : if (ref.is_mem ())
532 : : return true;
533 : :
534 : : // If VALUE would lead to an uninitialized use anyway, there's
535 : : // nothing to check.
536 : 34654797 : if (!value)
537 : : return false;
538 : :
539 : : // If the previous definition occurs in the same EBB then it
540 : : // is certainly correct.
541 : 34652490 : if (value->ebb () == bi.current_ebb)
542 : : return true;
543 : :
544 : : // Check if VALUE is the function's only definition of REGNO.
545 : : // (We already know that it dominates the use.)
546 : 15973777 : if (!bitmap_bit_p (bi.potential_phi_regs, regno))
547 : : return true;
548 : :
549 : : // If the register is live on entry to the EBB but not used
550 : : // within it, VALUE is the correct live-in value.
551 : 1845136 : if (!bi.ebb_live_in_for_debug)
552 : 979047 : calculate_ebb_live_in_for_debug (bi);
553 : 1845136 : if (bitmap_bit_p (bi.ebb_live_in_for_debug, regno))
554 : : return true;
555 : :
556 : : // Punt for other cases.
557 : : return false;
558 : 346040711 : };
559 : 346040711 : if (insn->is_debug_insn () && !value_is_valid ())
560 : 2812 : value = nullptr;
561 : :
562 : 346040711 : use = create_reg_use (bi, insn, { mode, regno });
563 : 346040711 : m_temp_uses.safe_push (use);
564 : 346040711 : bi.last_access[ref.regno + 1] = use;
565 : 346040711 : use->record_reference (ref, true);
566 : : }
567 : : else
568 : : {
569 : : // Record the mode of the largest use. The choice is arbitrary if
570 : : // the instruction (unusually) references the same register in two
571 : : // different but equal-sized modes.
572 : 34144934 : gcc_checking_assert (use->insn () == insn);
573 : 34144934 : if (HARD_REGISTER_NUM_P (regno))
574 : : {
575 : 10490819 : if (!ordered_p (GET_MODE_PRECISION (use->mode ()),
576 : 10490819 : GET_MODE_PRECISION (mode)))
577 : : use->set_mode (reg_raw_mode[regno]);
578 : 10490819 : else if (partial_subreg_p (use->mode (), mode))
579 : 23481 : use->set_mode (mode);
580 : : }
581 : 34144934 : use->record_reference (ref, false);
582 : : }
583 : 380185645 : }
584 : :
585 : : // Called while building SSA form for INSN using BI. Record the effect
586 : : // of call clobbers in RTL. We have already added the explicit sets and
587 : : // clobbers for RTL, which have priority over any call clobbers.
588 : : void
589 : 17185198 : function_info::record_call_clobbers (build_info &bi, insn_info *insn,
590 : : rtx_call_insn *rtl)
591 : : {
592 : : // See whether we should record this call in the EBB's list of
593 : : // call clobbers. Three things affect this choice:
594 : : //
595 : : // (1) The list is the only way we have of recording partial clobbers.
596 : : // All calls that only partially clobber registers must therefore
597 : : // be in the list.
598 : : //
599 : : // (2) Adding calls to the list is much more memory-efficient than
600 : : // creating a long list of clobber_infos.
601 : : //
602 : : // (3) Adding calls to the list limits the ability to move definitions
603 : : // of registers that are normally fully or partially clobbered
604 : : // by the associated predefined ABI. So adding calls to the list
605 : : // can hamper optimization if (thanks to -fipa-ra) the number of
606 : : // clobbers is much smaller than the usual set.
607 : : //
608 : : // The trade-off that we currently take is to use the list if there
609 : : // are some registers that the call only partially clobbers or if
610 : : // the set of clobbers is the standard set.
611 : 17185198 : function_abi abi = insn_callee_abi (rtl);
612 : 17185198 : if (abi.base_abi ().full_reg_clobbers () == abi.full_reg_clobbers ()
613 : 18181520 : || abi.full_and_partial_reg_clobbers () != abi.full_reg_clobbers ())
614 : : {
615 : : // Find an entry for this predefined ABI, creating one if necessary.
616 : 16188876 : ebb_call_clobbers_info *ecc = bi.current_ebb->first_call_clobbers ();
617 : 16193211 : while (ecc && ecc->abi () != &abi.base_abi ())
618 : 4335 : ecc = ecc->next ();
619 : 16188876 : if (!ecc)
620 : : {
621 : 9297174 : ecc = allocate<ebb_call_clobbers_info> (&abi.base_abi ());
622 : 9297174 : ecc->m_next = bi.current_ebb->first_call_clobbers ();
623 : 9297174 : bi.current_ebb->set_first_call_clobbers (ecc);
624 : : }
625 : :
626 : 16188876 : auto abi_id = abi.base_abi ().id ();
627 : 16188876 : auto *insn_clobbers = allocate<insn_call_clobbers_note> (abi_id, insn);
628 : 16188876 : insn->add_note (insn_clobbers);
629 : :
630 : 16188876 : ecc->insert_max_node (insn_clobbers);
631 : :
632 : 32377752 : m_clobbered_by_calls |= abi.full_and_partial_reg_clobbers ();
633 : : }
634 : : else
635 : 92657946 : for (unsigned int regno = 0; regno < FIRST_PSEUDO_REGISTER; ++regno)
636 : 91661624 : if (TEST_HARD_REG_BIT (abi.full_reg_clobbers (), regno))
637 : : {
638 : 52414704 : def_info *def = m_defs[regno + 1];
639 : 52414704 : if (!def || def->last_def ()->insn () != insn)
640 : : {
641 : 52122443 : def = allocate<clobber_info> (insn, regno);
642 : 52122443 : def->m_is_call_clobber = true;
643 : 52122443 : append_def (def);
644 : 52122443 : m_temp_defs.safe_push (def);
645 : 52122443 : bi.record_reg_def (def);
646 : : }
647 : : }
648 : 17185198 : }
649 : :
650 : : // Called while building SSA form using BI. Record that INSN contains
651 : : // write reference REF. Add associated def_infos to the list of accesses
652 : : // that we're building in m_temp_defs. Record the register's new live
653 : : // value in BI.
654 : : void
655 : 256575349 : function_info::record_def (build_info &bi, insn_info *insn,
656 : : rtx_obj_reference ref)
657 : : {
658 : : // Punt if we see multiple definitions of the same resource.
659 : : // This can happen for several reasons:
660 : : //
661 : : // - An instruction might store two values to memory at once, giving two
662 : : // distinct memory references.
663 : : //
664 : : // - An instruction might assign to multiple pieces of a wide pseudo
665 : : // register. For example, on 32-bit targets, an instruction might
666 : : // assign to both the upper and lower halves of a 64-bit pseudo register.
667 : : //
668 : : // - It's possible for the same register to be clobbered by the
669 : : // CALL_INSN_FUNCTION_USAGE and to be set by the main instruction
670 : : // pattern as well. In that case, the clobber conceptually happens
671 : : // before the set and can essentially be ignored.
672 : : //
673 : : // - Similarly, global registers are implicitly set by a call but can
674 : : // be explicitly set or clobbered as well. In that situation, the sets
675 : : // are listed first and should win over a clobber.
676 : 256575349 : unsigned int regno = ref.regno;
677 : 256575349 : machine_mode mode = ref.is_reg () ? ref.mode : BLKmode;
678 : 256575349 : def_info *def = safe_dyn_cast<def_info *> (bi.last_access[ref.regno + 1]);
679 : 176304799 : if (def && def->insn () == insn)
680 : : {
681 : 7060943 : if (!ref.is_clobber ())
682 : : {
683 : 7060316 : gcc_checking_assert (!is_a<clobber_info *> (def));
684 : 7060316 : def->record_reference (ref, false);
685 : : }
686 : 7060943 : return;
687 : : }
688 : :
689 : : // Memory is always well-defined, so only use clobber_infos for registers.
690 : 249514406 : if (ref.is_reg () && ref.is_clobber ())
691 : 31661792 : def = allocate<clobber_info> (insn, regno);
692 : : else
693 : 217852614 : def = allocate<set_info> (insn, resource_info { mode, regno });
694 : 249514406 : def->record_reference (ref, true);
695 : 249514406 : append_def (def);
696 : 249514406 : m_temp_defs.safe_push (def);
697 : 249514406 : bi.record_reg_def (def);
698 : : }
699 : :
700 : : // Called while building SSA form using BI. Add an insn_info for RTL
701 : : // to the block that we're current building.
702 : : void
703 : 380068651 : function_info::add_insn_to_block (build_info &bi, rtx_insn *rtl)
704 : : {
705 : 380068651 : insn_info *insn = allocate<insn_info> (bi.current_bb, rtl, UNKNOWN_COST);
706 : 380068651 : append_insn (insn);
707 : :
708 : 380068651 : vec_rtx_properties properties;
709 : 380068651 : properties.add_insn (rtl, true);
710 : 380068651 : insn->set_properties (properties);
711 : :
712 : 380068651 : start_insn_accesses ();
713 : :
714 : : // Record the uses.
715 : 980460876 : for (rtx_obj_reference ref : properties.refs ())
716 : 600392225 : if (ref.is_read ())
717 : 380185645 : record_use (bi, insn, ref);
718 : :
719 : : // Restore the contents of bi.last_access, which we used as a cache
720 : : // when assembling the uses.
721 : 1479022012 : for (access_info *access : m_temp_uses)
722 : : {
723 : 346040711 : unsigned int regno = access->regno ();
724 : 346040711 : gcc_checking_assert (bi.last_access[regno + 1] == access);
725 : 346040711 : bi.last_access[regno + 1] = as_a<use_info *> (access)->def ();
726 : : }
727 : :
728 : : // Record the definitions.
729 : 980460876 : for (rtx_obj_reference ref : properties.refs ())
730 : 600392225 : if (ref.is_write ())
731 : 256575349 : record_def (bi, insn, ref);
732 : :
733 : : // Logically these happen before the explicit definitions, but if the
734 : : // explicit definitions and call clobbers reference the same register,
735 : : // the explicit definition should win.
736 : 380068651 : if (auto *call_rtl = dyn_cast<rtx_call_insn *> (rtl))
737 : 17185198 : record_call_clobbers (bi, insn, call_rtl);
738 : :
739 : 380068651 : finish_insn_accesses (insn);
740 : 380068651 : }
741 : :
742 : : // Check whether INSN sets any registers that are never subsequently used.
743 : : // If so, add REG_UNUSED notes for them. The caller has already removed
744 : : // any previous REG_UNUSED notes.
745 : : void
746 : 10030761 : function_info::add_reg_unused_notes (insn_info *insn)
747 : : {
748 : 10030761 : rtx_insn *rtl = insn->rtl ();
749 : :
750 : 21065414 : auto handle_potential_set = [&](rtx pattern)
751 : : {
752 : 11034653 : if (GET_CODE (pattern) != SET)
753 : 10860245 : return;
754 : :
755 : 8415572 : rtx dest = SET_DEST (pattern);
756 : 8415572 : if (!REG_P (dest))
757 : : return;
758 : :
759 : 6209664 : def_array defs = insn->defs ();
760 : 6209664 : unsigned int index = find_access_index (defs, REGNO (dest));
761 : 6384382 : for (unsigned int i = 0; i < REG_NREGS (dest); ++i)
762 : : {
763 : 6209974 : def_info *def = defs[index + i];
764 : 6209974 : gcc_checking_assert (def->regno () == REGNO (dest) + i);
765 : 6384692 : set_info *set = dyn_cast<set_info *> (def);
766 : 11034963 : if (set && set->has_nondebug_uses ())
767 : : return;
768 : : }
769 : 174408 : add_reg_note (rtl, REG_UNUSED, dest);
770 : 10030761 : };
771 : :
772 : 10030761 : rtx pattern = PATTERN (rtl);
773 : 10030761 : if (GET_CODE (pattern) == PARALLEL)
774 : 2827218 : for (int i = 0; i < XVECLEN (pattern, 0); ++i)
775 : 1915555 : handle_potential_set (XVECEXP (pattern, 0, i));
776 : : else
777 : 9119098 : handle_potential_set (pattern);
778 : 10030761 : }
779 : :
780 : : // Search TREE for call clobbers at INSN. Return:
781 : : //
782 : : // - less than zero if INSN occurs before the root of TREE
783 : : // - 0 if INSN is the root of TREE
784 : : // - greater than zero if INSN occurs after the root of TREE
785 : : int
786 : 42858466 : rtl_ssa::lookup_call_clobbers (insn_call_clobbers_tree &tree, insn_info *insn)
787 : : {
788 : 107755877 : auto compare = [&](insn_call_clobbers_note *clobbers)
789 : : {
790 : 64897411 : return insn->compare_with (clobbers->insn ());
791 : 42858466 : };
792 : 42858466 : return tree.lookup (compare);
793 : : }
794 : :
795 : : // Print a description of INSN to PP.
796 : : void
797 : 0 : rtl_ssa::pp_insn (pretty_printer *pp, const insn_info *insn)
798 : : {
799 : 0 : if (!insn)
800 : 0 : pp_string (pp, "<null>");
801 : : else
802 : 0 : insn->print_full (pp);
803 : 0 : }
804 : :
805 : : // Print a description of INSN to FILE.
806 : : void
807 : 0 : dump (FILE *file, const insn_info *insn)
808 : : {
809 : 0 : dump_using (file, pp_insn, insn);
810 : 0 : }
811 : :
812 : : // Debug interface to the dump routine above.
813 : 0 : void debug (const insn_info *x) { dump (stderr, x); }
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