Line data Source code
1 : /* Instruction scheduling pass. This file contains definitions used
2 : internally in the scheduler.
3 : Copyright (C) 1992-2026 Free Software Foundation, Inc.
4 :
5 : This file is part of GCC.
6 :
7 : GCC is free software; you can redistribute it and/or modify it under
8 : the terms of the GNU General Public License as published by the Free
9 : Software Foundation; either version 3, or (at your option) any later
10 : version.
11 :
12 : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 : WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 : FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 : for more details.
16 :
17 : You should have received a copy of the GNU General Public License
18 : along with GCC; see the file COPYING3. If not see
19 : <http://www.gnu.org/licenses/>. */
20 :
21 : #ifndef GCC_SCHED_INT_H
22 : #define GCC_SCHED_INT_H
23 :
24 : #ifdef INSN_SCHEDULING
25 :
26 : /* Identificator of a scheduler pass. */
27 : enum sched_pass_id_t { SCHED_PASS_UNKNOWN, SCHED_RGN_PASS, SCHED_EBB_PASS,
28 : SCHED_SMS_PASS, SCHED_SEL_PASS };
29 :
30 : /* The algorithm used to implement -fsched-pressure. */
31 : enum sched_pressure_algorithm
32 : {
33 : SCHED_PRESSURE_NONE,
34 : SCHED_PRESSURE_WEIGHTED,
35 : SCHED_PRESSURE_MODEL
36 : };
37 :
38 : typedef vec<basic_block> bb_vec_t;
39 : typedef vec<rtx_insn *> insn_vec_t;
40 : typedef vec<rtx_insn *> rtx_vec_t;
41 :
42 : extern void sched_init_bbs (void);
43 :
44 : extern void sched_extend_luids (void);
45 : extern void sched_init_insn_luid (rtx_insn *);
46 : extern void sched_init_luids (const bb_vec_t &);
47 : extern void sched_finish_luids (void);
48 :
49 : extern void sched_extend_target (void);
50 :
51 : extern void haifa_init_h_i_d (const bb_vec_t &);
52 : extern void haifa_finish_h_i_d (void);
53 :
54 : /* Hooks that are common to all the schedulers. */
55 : struct common_sched_info_def
56 : {
57 : /* Called after blocks were rearranged due to movement of jump instruction.
58 : The first parameter - index of basic block, in which jump currently is.
59 : The second parameter - index of basic block, in which jump used
60 : to be.
61 : The third parameter - index of basic block, that follows the second
62 : parameter. */
63 : void (*fix_recovery_cfg) (int, int, int);
64 :
65 : /* Called to notify frontend, that new basic block is being added.
66 : The first parameter - new basic block.
67 : The second parameter - block, after which new basic block is being added,
68 : or the exit block, if recovery block is being added,
69 : or NULL, if standalone block is being added. */
70 : void (*add_block) (basic_block, basic_block);
71 :
72 : /* Estimate number of insns in the basic block. */
73 : int (*estimate_number_of_insns) (basic_block);
74 :
75 : /* Given a non-insn (!INSN_P (x)) return
76 : -1 - if this rtx don't need a luid.
77 : 0 - if it should have the same luid as the previous insn.
78 : 1 - if it needs a separate luid. */
79 : int (*luid_for_non_insn) (rtx);
80 :
81 : /* Scheduler pass identifier. It is preferably used in assertions. */
82 : enum sched_pass_id_t sched_pass_id;
83 : };
84 :
85 : extern struct common_sched_info_def *common_sched_info;
86 :
87 : extern const struct common_sched_info_def haifa_common_sched_info;
88 :
89 : /* Return true if selective scheduling pass is working. */
90 : inline bool
91 526390679 : sel_sched_p (void)
92 : {
93 526390679 : return common_sched_info->sched_pass_id == SCHED_SEL_PASS;
94 : }
95 :
96 : /* Returns maximum priority that an insn was assigned to. */
97 : extern int get_rgn_sched_max_insns_priority (void);
98 :
99 : /* Increases effective priority for INSN by AMOUNT. */
100 : extern void sel_add_to_insn_priority (rtx_insn *, int);
101 :
102 : /* True if during selective scheduling we need to emulate some of haifa
103 : scheduler behavior. */
104 : extern int sched_emulate_haifa_p;
105 :
106 : /* Mapping from INSN_UID to INSN_LUID. In the end all other per insn data
107 : structures should be indexed by luid. */
108 : extern vec<int> sched_luids;
109 : #define INSN_LUID(INSN) (sched_luids[INSN_UID (INSN)])
110 : #define LUID_BY_UID(UID) (sched_luids[UID])
111 :
112 : #define SET_INSN_LUID(INSN, LUID) \
113 : (sched_luids[INSN_UID (INSN)] = (LUID))
114 :
115 : /* The highest INSN_LUID. */
116 : extern int sched_max_luid;
117 :
118 : extern int insn_luid (rtx);
119 :
120 : /* This list holds ripped off notes from the current block. These notes will
121 : be attached to the beginning of the block when its scheduling is
122 : finished. */
123 : extern rtx_insn *note_list;
124 :
125 : extern void remove_notes (rtx_insn *, rtx_insn *);
126 : extern rtx_insn *restore_other_notes (rtx_insn *, basic_block);
127 : extern void sched_insns_init (rtx);
128 : extern void sched_insns_finish (void);
129 :
130 : extern void *xrecalloc (void *, size_t, size_t, size_t);
131 :
132 : extern void reemit_notes (rtx_insn *);
133 :
134 : /* Functions in sel-sched-ir.cc. */
135 : extern void sel_find_rgns (void);
136 : extern void sel_mark_hard_insn (rtx);
137 :
138 : extern size_t dfa_state_size;
139 :
140 : extern void advance_state (state_t);
141 :
142 : extern void setup_sched_dump (void);
143 : extern void sched_init (void);
144 : extern void sched_finish (void);
145 :
146 : extern bool sel_insn_is_speculation_check (rtx_insn *);
147 :
148 : /* Describe the ready list of the scheduler.
149 : VEC holds space enough for all insns in the current region. VECLEN
150 : says how many exactly.
151 : FIRST is the index of the element with the highest priority; i.e. the
152 : last one in the ready list, since elements are ordered by ascending
153 : priority.
154 : N_READY determines how many insns are on the ready list.
155 : N_DEBUG determines how many debug insns are on the ready list. */
156 : struct ready_list
157 : {
158 : rtx_insn **vec;
159 : int veclen;
160 : int first;
161 : int n_ready;
162 : int n_debug;
163 : };
164 :
165 : extern signed char *ready_try;
166 : extern struct ready_list ready;
167 :
168 : extern int max_issue (struct ready_list *, int, state_t, bool, int *);
169 :
170 : extern void ebb_compute_jump_reg_dependencies (rtx_insn *, regset);
171 :
172 : extern edge find_fallthru_edge_from (basic_block);
173 :
174 : extern void (* sched_init_only_bb) (basic_block, basic_block);
175 : extern basic_block (* sched_split_block) (basic_block, rtx);
176 : extern basic_block sched_split_block_1 (basic_block, rtx);
177 : extern basic_block (* sched_create_empty_bb) (basic_block);
178 : extern basic_block sched_create_empty_bb_1 (basic_block);
179 :
180 : extern basic_block sched_create_recovery_block (basic_block *);
181 : extern void sched_create_recovery_edges (basic_block, basic_block,
182 : basic_block);
183 :
184 : /* Pointer to data describing the current DFA state. */
185 : extern state_t curr_state;
186 :
187 : /* Type to represent status of a dependence. */
188 : typedef unsigned int ds_t;
189 : #define BITS_PER_DEP_STATUS HOST_BITS_PER_INT
190 :
191 : /* Type to represent weakness of speculative dependence. */
192 : typedef unsigned int dw_t;
193 :
194 : extern enum reg_note ds_to_dk (ds_t);
195 : extern ds_t dk_to_ds (enum reg_note);
196 :
197 : /* Describe a dependency that can be broken by making a replacement
198 : in one of the patterns. LOC is the location, ORIG and NEWVAL the
199 : two alternative contents, and INSN the instruction that must be
200 : changed. */
201 : struct dep_replacement
202 : {
203 : rtx *loc;
204 : rtx orig;
205 : rtx newval;
206 : rtx_insn *insn;
207 : };
208 :
209 : /* Information about the dependency. */
210 : struct _dep
211 : {
212 : /* Producer. */
213 : rtx_insn *pro;
214 :
215 : /* Consumer. */
216 : rtx_insn *con;
217 :
218 : /* If nonnull, holds a pointer to information about how to break the
219 : dependency by making a replacement in one of the insns. There is
220 : only one such dependency for each insn that must be modified in
221 : order to break such a dependency. */
222 : struct dep_replacement *replace;
223 :
224 : /* Dependency status. This field holds all dependency types and additional
225 : information for speculative dependencies. */
226 : ds_t status;
227 :
228 : /* Dependency major type. This field is superseded by STATUS above.
229 : Though, it is still in place because some targets use it. */
230 : enum reg_note type:6;
231 :
232 : unsigned nonreg:1;
233 : unsigned multiple:1;
234 :
235 : /* Cached cost of the dependency. Make sure to update UNKNOWN_DEP_COST
236 : when changing the size of this field. */
237 : int cost:20;
238 :
239 : unsigned unused:4;
240 : };
241 :
242 : #define UNKNOWN_DEP_COST ((int) ((unsigned int) -1 << 19))
243 :
244 : typedef struct _dep dep_def;
245 : typedef dep_def *dep_t;
246 :
247 : #define DEP_PRO(D) ((D)->pro)
248 : #define DEP_CON(D) ((D)->con)
249 : #define DEP_TYPE(D) ((D)->type)
250 : #define DEP_STATUS(D) ((D)->status)
251 : #define DEP_COST(D) ((D)->cost)
252 : #define DEP_NONREG(D) ((D)->nonreg)
253 : #define DEP_MULTIPLE(D) ((D)->multiple)
254 : #define DEP_REPLACE(D) ((D)->replace)
255 :
256 : /* Functions to work with dep. */
257 :
258 : extern void init_dep_1 (dep_t, rtx_insn *, rtx_insn *, enum reg_note, ds_t);
259 : extern void init_dep (dep_t, rtx_insn *, rtx_insn *, enum reg_note);
260 :
261 : extern void sd_debug_dep (dep_t);
262 :
263 : /* Definition of this struct resides below. */
264 : struct _dep_node;
265 : typedef struct _dep_node *dep_node_t;
266 :
267 : /* A link in the dependency list. This is essentially an equivalent of a
268 : single {INSN, DEPS}_LIST rtx. */
269 : struct _dep_link
270 : {
271 : /* Dep node with all the data. */
272 : dep_node_t node;
273 :
274 : /* Next link in the list. For the last one it is NULL. */
275 : struct _dep_link *next;
276 :
277 : /* Pointer to the next field of the previous link in the list.
278 : For the first link this points to the deps_list->first.
279 :
280 : With help of this field it is easy to remove and insert links to the
281 : list. */
282 : struct _dep_link **prev_nextp;
283 : };
284 : typedef struct _dep_link *dep_link_t;
285 :
286 : #define DEP_LINK_NODE(N) ((N)->node)
287 : #define DEP_LINK_NEXT(N) ((N)->next)
288 : #define DEP_LINK_PREV_NEXTP(N) ((N)->prev_nextp)
289 :
290 : /* Macros to work dep_link. For most usecases only part of the dependency
291 : information is need. These macros conveniently provide that piece of
292 : information. */
293 :
294 : #define DEP_LINK_DEP(N) (DEP_NODE_DEP (DEP_LINK_NODE (N)))
295 : #define DEP_LINK_PRO(N) (DEP_PRO (DEP_LINK_DEP (N)))
296 : #define DEP_LINK_CON(N) (DEP_CON (DEP_LINK_DEP (N)))
297 : #define DEP_LINK_TYPE(N) (DEP_TYPE (DEP_LINK_DEP (N)))
298 : #define DEP_LINK_STATUS(N) (DEP_STATUS (DEP_LINK_DEP (N)))
299 :
300 : /* A list of dep_links. */
301 : struct _deps_list
302 : {
303 : /* First element. */
304 : dep_link_t first;
305 :
306 : /* Total number of elements in the list. */
307 : int n_links;
308 : };
309 : typedef struct _deps_list *deps_list_t;
310 :
311 : #define DEPS_LIST_FIRST(L) ((L)->first)
312 : #define DEPS_LIST_N_LINKS(L) ((L)->n_links)
313 :
314 : /* Suppose we have a dependence Y between insn pro1 and con1, where pro1 has
315 : additional dependents con0 and con2, and con1 is dependent on additional
316 : insns pro0 and pro1:
317 :
318 : .con0 pro0
319 : . ^ |
320 : . | |
321 : . | |
322 : . X A
323 : . | |
324 : . | |
325 : . | V
326 : .pro1--Y-->con1
327 : . | ^
328 : . | |
329 : . | |
330 : . Z B
331 : . | |
332 : . | |
333 : . V |
334 : .con2 pro2
335 :
336 : This is represented using a "dep_node" for each dependence arc, which are
337 : connected as follows (diagram is centered around Y which is fully shown;
338 : other dep_nodes shown partially):
339 :
340 : . +------------+ +--------------+ +------------+
341 : . : dep_node X : | dep_node Y | : dep_node Z :
342 : . : : | | : :
343 : . : : | | : :
344 : . : forw : | forw | : forw :
345 : . : +--------+ : | +--------+ | : +--------+ :
346 : forw_deps : |dep_link| : | |dep_link| | : |dep_link| :
347 : +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
348 : |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
349 : +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
350 : . ^ ^ : | ^ | : | | ^ | | : | | :
351 : . | | : | | | : | | | | | : | | :
352 : . | +--<----+--+ +--+---<--+--+--+ +--+--+--<---+--+ | :
353 : . | : | | | : | | | | | : | | | :
354 : . | : | +----+ | : | | +----+ | | : | +----+ | :
355 : . | : | |prev| | : | | |prev| | | : | |prev| | :
356 : . | : | |next| | : | | |next| | | : | |next| | :
357 : . | : | +----+ | : | | +----+ | | : | +----+ | :
358 : . | : | | :<-+ | | | |<-+ : | | :<-+
359 : . | : | +----+ | : | | | +----+ | | | : | +----+ | : |
360 : . | : | |node|-+----+ | | |node|-+--+--+ : | |node|-+----+
361 : . | : | +----+ | : | | +----+ | | : | +----+ | :
362 : . | : | | : | | | | : | | :
363 : . | : +--------+ : | +--------+ | : +--------+ :
364 : . | : : | | : :
365 : . | : SAME pro1 : | +--------+ | : SAME pro1 :
366 : . | : DIFF con0 : | |dep | | : DIFF con2 :
367 : . | : : | | | | : :
368 : . | | | +----+ | |
369 : .RTX<------------------------+--+-|pro1| | |
370 : .pro1 | | +----+ | |
371 : . | | | |
372 : . | | +----+ | |
373 : .RTX<------------------------+--+-|con1| | |
374 : .con1 | | +----+ | |
375 : . | | | | |
376 : . | | | +----+ | |
377 : . | | | |kind| | |
378 : . | | | +----+ | |
379 : . | : : | | |stat| | | : :
380 : . | : DIFF pro0 : | | +----+ | | : DIFF pro2 :
381 : . | : SAME con1 : | | | | : SAME con1 :
382 : . | : : | +--------+ | : :
383 : . | : : | | : :
384 : . | : back : | back | : back :
385 : . v : +--------+ : | +--------+ | : +--------+ :
386 : back_deps : |dep_link| : | |dep_link| | : |dep_link| :
387 : +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
388 : |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
389 : +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
390 : . ^ : | ^ | : | | ^ | | : | | :
391 : . | : | | | : | | | | | : | | :
392 : . +--<----+--+ +--+---<--+--+--+ +--+--+--<---+--+ | :
393 : . : | | | : | | | | | : | | | :
394 : . : | +----+ | : | | +----+ | | : | +----+ | :
395 : . : | |prev| | : | | |prev| | | : | |prev| | :
396 : . : | |next| | : | | |next| | | : | |next| | :
397 : . : | +----+ | : | | +----+ | | : | +----+ | :
398 : . : | | :<-+ | | | |<-+ : | | :<-+
399 : . : | +----+ | : | | | +----+ | | | : | +----+ | : |
400 : . : | |node|-+----+ | | |node|-+--+--+ : | |node|-+----+
401 : . : | +----+ | : | | +----+ | | : | +----+ | :
402 : . : | | : | | | | : | | :
403 : . : +--------+ : | +--------+ | : +--------+ :
404 : . : : | | : :
405 : . : dep_node A : | dep_node Y | : dep_node B :
406 : . +------------+ +--------------+ +------------+
407 : */
408 :
409 : struct _dep_node
410 : {
411 : /* Backward link. */
412 : struct _dep_link back;
413 :
414 : /* The dep. */
415 : struct _dep dep;
416 :
417 : /* Forward link. */
418 : struct _dep_link forw;
419 : };
420 :
421 : #define DEP_NODE_BACK(N) (&(N)->back)
422 : #define DEP_NODE_DEP(N) (&(N)->dep)
423 : #define DEP_NODE_FORW(N) (&(N)->forw)
424 :
425 : /* The following enumeration values tell us what dependencies we
426 : should use to implement the barrier. We use true-dependencies for
427 : TRUE_BARRIER and anti-dependencies for MOVE_BARRIER. */
428 : enum reg_pending_barrier_mode
429 : {
430 : NOT_A_BARRIER = 0,
431 : MOVE_BARRIER,
432 : TRUE_BARRIER
433 : };
434 :
435 : /* Whether a register movement is associated with a call. */
436 : enum post_call_group
437 : {
438 : not_post_call,
439 : post_call,
440 : post_call_initial
441 : };
442 :
443 : /* Insns which affect pseudo-registers. */
444 : struct deps_reg
445 : {
446 : rtx_insn_list *uses;
447 : rtx_insn_list *sets;
448 : rtx_insn_list *implicit_sets;
449 : rtx_insn_list *control_uses;
450 : rtx_insn_list *clobbers;
451 : int uses_length;
452 : int clobbers_length;
453 : };
454 :
455 : /* Describe state of dependencies used during sched_analyze phase. */
456 10640630 : class deps_desc
457 : {
458 : public:
459 : /* The *_insns and *_mems are paired lists. Each pending memory operation
460 : will have a pointer to the MEM rtx on one list and a pointer to the
461 : containing insn on the other list in the same place in the list. */
462 :
463 : /* We can't use add_dependence like the old code did, because a single insn
464 : may have multiple memory accesses, and hence needs to be on the list
465 : once for each memory access. Add_dependence won't let you add an insn
466 : to a list more than once. */
467 :
468 : /* An INSN_LIST containing all insns with pending read operations. */
469 : rtx_insn_list *pending_read_insns;
470 :
471 : /* An EXPR_LIST containing all MEM rtx's which are pending reads. The list
472 : can contain stack pointer instead of memory. This is a special case (see
473 : sched-deps.cc::sched_analyze_1). */
474 : rtx_expr_list *pending_read_mems;
475 :
476 : /* An INSN_LIST containing all insns with pending write operations. */
477 : rtx_insn_list *pending_write_insns;
478 :
479 : /* An EXPR_LIST containing all MEM rtx's which are pending writes. */
480 : rtx_expr_list *pending_write_mems;
481 :
482 : /* An INSN_LIST containing all jump insns. */
483 : rtx_insn_list *pending_jump_insns;
484 :
485 : /* We must prevent the above lists from ever growing too large since
486 : the number of dependencies produced is at least O(N*N),
487 : and execution time is at least O(4*N*N), as a function of the
488 : length of these pending lists. */
489 :
490 : /* Indicates the length of the pending_read list. */
491 : int pending_read_list_length;
492 :
493 : /* Indicates the length of the pending_write list. */
494 : int pending_write_list_length;
495 :
496 : /* Length of the pending memory flush list plus the length of the pending
497 : jump insn list. Large functions with no calls may build up extremely
498 : large lists. */
499 : int pending_flush_length;
500 :
501 : /* The last insn upon which all memory references must depend.
502 : This is an insn which flushed the pending lists, creating a dependency
503 : between it and all previously pending memory references. This creates
504 : a barrier (or a checkpoint) which no memory reference is allowed to cross.
505 :
506 : This includes all non constant CALL_INSNs. When we do interprocedural
507 : alias analysis, this restriction can be relaxed.
508 : This may also be an INSN that writes memory if the pending lists grow
509 : too large. */
510 : rtx_insn_list *last_pending_memory_flush;
511 :
512 : /* A list of the last function calls we have seen. We use a list to
513 : represent last function calls from multiple predecessor blocks.
514 : Used to prevent register lifetimes from expanding unnecessarily. */
515 : rtx_insn_list *last_function_call;
516 :
517 : /* A list of the last function calls that may not return normally
518 : we have seen. We use a list to represent last function calls from
519 : multiple predecessor blocks. Used to prevent moving trapping insns
520 : across such calls. */
521 : rtx_insn_list *last_function_call_may_noreturn;
522 :
523 : /* A list of insns which use a pseudo register that does not already
524 : cross a call. We create dependencies between each of those insn
525 : and the next call insn, to ensure that they won't cross a call after
526 : scheduling is done. */
527 : rtx_insn_list *sched_before_next_call;
528 :
529 : /* Similarly, a list of insns which should not cross a branch. */
530 : rtx_insn_list *sched_before_next_jump;
531 :
532 : /* Used to keep post-call pseudo/hard reg movements together with
533 : the call. */
534 : enum post_call_group in_post_call_group_p;
535 :
536 : /* The last debug insn we've seen. */
537 : rtx_insn *last_debug_insn;
538 :
539 : /* The last insn bearing REG_ARGS_SIZE that we've seen. */
540 : rtx_insn *last_args_size;
541 :
542 : /* A list of all prologue insns we have seen without intervening epilogue
543 : insns, and one of all epilogue insns we have seen without intervening
544 : prologue insns. This is used to prevent mixing prologue and epilogue
545 : insns. See PR78029. */
546 : rtx_insn_list *last_prologue;
547 : rtx_insn_list *last_epilogue;
548 :
549 : /* Whether the last *logue insn was an epilogue insn or a prologue insn
550 : instead. */
551 : bool last_logue_was_epilogue;
552 :
553 : /* The maximum register number for the following arrays. Before reload
554 : this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER. */
555 : int max_reg;
556 :
557 : /* Element N is the next insn that sets (hard or pseudo) register
558 : N within the current basic block; or zero, if there is no
559 : such insn. Needed for new registers which may be introduced
560 : by splitting insns. */
561 : struct deps_reg *reg_last;
562 :
563 : /* Element N is set for each register that has any nonzero element
564 : in reg_last[N].{uses,sets,clobbers}. */
565 : regset_head reg_last_in_use;
566 :
567 : /* Barriers whose "this insn sets every register" effect has not been written
568 : into the per-register entries yet, newest first. Empty after reload and
569 : under selective scheduling, where the barrier path writes every entry
570 : instead.
571 :
572 : A register in reg_last_in_use has a literal entry that evolves
573 : independently. Every other register has an empty reg_last entry whose
574 : sets list is logically pending_barriers, because a barrier makes every
575 : reg_last_dirty entry that still holds a list literal before pushing itself
576 : here. Thus, outside reg_last_in_use there is never a live uses, clobbers,
577 : implicit_sets or control_uses list. */
578 : rtx_insn_list *pending_barriers;
579 :
580 : /* Element N is set for each register whose reg_last[N] was written on a
581 : path that does not record it in reg_last_in_use, namely debug insn uses
582 : and control uses. Barrier handling reconciles these entries with
583 : reg_last_in_use, and free_deps releases any that remain. */
584 : regset_head reg_last_dirty;
585 :
586 : /* Shows the last value of reg_pending_barrier associated with the insn. */
587 : enum reg_pending_barrier_mode last_reg_pending_barrier;
588 :
589 : /* True when this context should be treated as a readonly by
590 : the analysis. */
591 : bool readonly : 1;
592 : };
593 :
594 : typedef class deps_desc *deps_t;
595 :
596 : /* This structure holds some state of the current scheduling pass, and
597 : contains some function pointers that abstract out some of the non-generic
598 : functionality from functions such as schedule_block or schedule_insn.
599 : There is one global variable, current_sched_info, which points to the
600 : sched_info structure currently in use. */
601 : struct haifa_sched_info
602 : {
603 : /* Add all insns that are initially ready to the ready list. Called once
604 : before scheduling a set of insns. */
605 : void (*init_ready_list) (void);
606 : /* Called after taking an insn from the ready list. Returns true if
607 : this insn can be scheduled, false if we should silently discard it. */
608 : bool (*can_schedule_ready_p) (rtx_insn *);
609 : /* Return true if there are more insns that should be scheduled. */
610 : bool (*schedule_more_p) (void);
611 : /* Called after an insn has all its hard dependencies resolved.
612 : Adjusts status of instruction (which is passed through second parameter)
613 : to indicate if instruction should be moved to the ready list or the
614 : queue, or if it should silently discard it (until next resolved
615 : dependence). */
616 : ds_t (*new_ready) (rtx_insn *, ds_t);
617 : /* Compare priority of two insns. Return a positive number if the second
618 : insn is to be preferred for scheduling, and a negative one if the first
619 : is to be preferred. Zero if they are equally good. */
620 : int (*rank) (rtx_insn *, rtx_insn *);
621 : /* Return a string that contains the insn uid and optionally anything else
622 : necessary to identify this insn in an output. It's valid to use a
623 : static buffer for this. The ALIGNED parameter should cause the string
624 : to be formatted so that multiple output lines will line up nicely. */
625 : const char *(*print_insn) (const rtx_insn *, int);
626 : /* Return true if an insn should be included in priority
627 : calculations. */
628 : bool (*contributes_to_priority) (rtx_insn *, rtx_insn *);
629 :
630 : /* Return true if scheduling insn (passed as the parameter) will trigger
631 : finish of scheduling current block. */
632 : bool (*insn_finishes_block_p) (rtx_insn *);
633 :
634 : /* The boundaries of the set of insns to be scheduled. */
635 : rtx_insn *prev_head, *next_tail;
636 :
637 : /* Filled in after the schedule is finished; the first and last scheduled
638 : insns. */
639 : rtx_insn *head, *tail;
640 :
641 : /* If nonzero, enables an additional sanity check in schedule_block. */
642 : unsigned int queue_must_finish_empty:1;
643 :
644 : /* Maximum priority that has been assigned to an insn. */
645 : int sched_max_insns_priority;
646 :
647 : /* Hooks to support speculative scheduling. */
648 :
649 : /* Called to notify frontend that instruction is being added (second
650 : parameter == 0) or removed (second parameter == 1). */
651 : void (*add_remove_insn) (rtx_insn *, int);
652 :
653 : /* Called to notify the frontend that instruction INSN is being
654 : scheduled. */
655 : void (*begin_schedule_ready) (rtx_insn *insn);
656 :
657 : /* Called to notify the frontend that an instruction INSN is about to be
658 : moved to its correct place in the final schedule. This is done for all
659 : insns in order of the schedule. LAST indicates the last scheduled
660 : instruction. */
661 : void (*begin_move_insn) (rtx_insn *insn, rtx_insn *last);
662 :
663 : /* If the second parameter is not NULL, return nonnull value, if the
664 : basic block should be advanced.
665 : If the second parameter is NULL, return the next basic block in EBB.
666 : The first parameter is the current basic block in EBB. */
667 : basic_block (*advance_target_bb) (basic_block, rtx_insn *);
668 :
669 : /* Allocate memory, store the frontend scheduler state in it, and
670 : return it. */
671 : void *(*save_state) (void);
672 : /* Restore frontend scheduler state from the argument, and free the
673 : memory. */
674 : void (*restore_state) (void *);
675 :
676 : /* ??? FIXME: should use straight bitfields inside sched_info instead of
677 : this flag field. */
678 : unsigned int flags;
679 : };
680 :
681 : /* This structure holds description of the properties for speculative
682 : scheduling. */
683 : struct spec_info_def
684 : {
685 : /* Holds types of allowed speculations: BEGIN_{DATA|CONTROL},
686 : BE_IN_{DATA_CONTROL}. */
687 : int mask;
688 :
689 : /* A dump file for additional information on speculative scheduling. */
690 : FILE *dump;
691 :
692 : /* Minimal cumulative weakness of speculative instruction's
693 : dependencies, so that insn will be scheduled. */
694 : dw_t data_weakness_cutoff;
695 :
696 : /* Minimal usefulness of speculative instruction to be considered for
697 : scheduling. */
698 : int control_weakness_cutoff;
699 :
700 : /* Flags from the enum SPEC_SCHED_FLAGS. */
701 : int flags;
702 : };
703 : typedef struct spec_info_def *spec_info_t;
704 :
705 : extern spec_info_t spec_info;
706 :
707 : extern struct haifa_sched_info *current_sched_info;
708 :
709 : /* Do register pressure sensitive insn scheduling if the flag is set
710 : up. */
711 : extern enum sched_pressure_algorithm sched_pressure;
712 :
713 : /* Map regno -> its pressure class. The map defined only when
714 : SCHED_PRESSURE_P is true. */
715 : extern enum reg_class *sched_regno_pressure_class;
716 :
717 : /* Indexed by INSN_UID, the collection of all data associated with
718 : a single instruction. */
719 :
720 : struct _haifa_deps_insn_data
721 : {
722 : /* The number of incoming edges in the forward dependency graph.
723 : As scheduling proceeds, counts are decreased. An insn moves to
724 : the ready queue when its counter reaches zero. */
725 : int dep_count;
726 :
727 : /* Nonzero if instruction has internal dependence
728 : (e.g. add_dependence was invoked with (insn == elem)). */
729 : unsigned int has_internal_dep;
730 :
731 : /* NB: We can't place 'struct _deps_list' here instead of deps_list_t into
732 : h_i_d because when h_i_d extends, addresses of the deps_list->first
733 : change without updating deps_list->first->next->prev_nextp. Thus
734 : BACK_DEPS and RESOLVED_BACK_DEPS are allocated on the heap and FORW_DEPS
735 : list is allocated on the obstack. */
736 :
737 : /* A list of hard backward dependencies. The insn is a consumer of all the
738 : deps mentioned here. */
739 : deps_list_t hard_back_deps;
740 :
741 : /* A list of speculative (weak) dependencies. The insn is a consumer of all
742 : the deps mentioned here. */
743 : deps_list_t spec_back_deps;
744 :
745 : /* A list of insns which depend on the instruction. Unlike 'back_deps',
746 : it represents forward dependencies. */
747 : deps_list_t forw_deps;
748 :
749 : /* A list of scheduled producers of the instruction. Links are being moved
750 : from 'back_deps' to 'resolved_back_deps' while scheduling. */
751 : deps_list_t resolved_back_deps;
752 :
753 : /* A list of scheduled consumers of the instruction. Links are being moved
754 : from 'forw_deps' to 'resolved_forw_deps' while scheduling to fasten the
755 : search in 'forw_deps'. */
756 : deps_list_t resolved_forw_deps;
757 :
758 : /* If the insn is conditional (either through COND_EXEC, or because
759 : it is a conditional branch), this records the condition. NULL
760 : for insns that haven't been seen yet or don't have a condition;
761 : const_true_rtx to mark an insn without a condition, or with a
762 : condition that has been clobbered by a subsequent insn. */
763 : rtx cond;
764 :
765 : /* For a conditional insn, a list of insns that could set the condition
766 : register. Used when generating control dependencies. */
767 : rtx_insn_list *cond_deps;
768 :
769 : /* True if the condition in 'cond' should be reversed to get the actual
770 : condition. */
771 : unsigned int reverse_cond : 1;
772 :
773 : /* Some insns (e.g. call) are not allowed to move across blocks. */
774 : unsigned int cant_move : 1;
775 : };
776 :
777 :
778 : /* Bits used for storing values of the fields in the following
779 : structure. */
780 : #define INCREASE_BITS 8
781 :
782 : /* The structure describes how the corresponding insn increases the
783 : register pressure for each pressure class. */
784 : struct reg_pressure_data
785 : {
786 : /* Pressure increase for given class because of clobber. */
787 : unsigned int clobber_increase : INCREASE_BITS;
788 : /* Increase in register pressure for given class because of register
789 : sets. */
790 : unsigned int set_increase : INCREASE_BITS;
791 : /* Pressure increase for given class because of unused register
792 : set. */
793 : unsigned int unused_set_increase : INCREASE_BITS;
794 : /* Pressure change: #sets - #deaths. */
795 : int change : INCREASE_BITS;
796 : };
797 :
798 : /* The following structure describes usage of registers by insns. */
799 : struct reg_use_data
800 : {
801 : /* Regno used in the insn. */
802 : int regno;
803 : /* Insn using the regno. */
804 : rtx_insn *insn;
805 : /* Cyclic list of elements with the same regno. */
806 : struct reg_use_data *next_regno_use;
807 : /* List of elements with the same insn. */
808 : struct reg_use_data *next_insn_use;
809 : };
810 :
811 : /* The following structure describes used sets of registers by insns.
812 : Registers are pseudos whose pressure class is not NO_REGS or hard
813 : registers available for allocations. */
814 : struct reg_set_data
815 : {
816 : /* Regno used in the insn. */
817 : int regno;
818 : /* Insn setting the regno. */
819 : rtx insn;
820 : /* List of elements with the same insn. */
821 : struct reg_set_data *next_insn_set;
822 : };
823 :
824 : enum autopref_multipass_data_status {
825 : /* Entry is irrelevant for auto-prefetcher. */
826 : AUTOPREF_MULTIPASS_DATA_IRRELEVANT = -2,
827 : /* Entry is uninitialized. */
828 : AUTOPREF_MULTIPASS_DATA_UNINITIALIZED = -1,
829 : /* Entry is relevant for auto-prefetcher and insn can be delayed
830 : to allow another insn through. */
831 : AUTOPREF_MULTIPASS_DATA_NORMAL = 0,
832 : /* Entry is relevant for auto-prefetcher, but insn should not be
833 : delayed as that will break scheduling. */
834 : AUTOPREF_MULTIPASS_DATA_DONT_DELAY = 1
835 : };
836 :
837 : /* Data for modeling cache auto-prefetcher. */
838 : struct autopref_multipass_data_
839 : {
840 : /* Base part of memory address. */
841 : rtx base;
842 :
843 : /* Memory offsets from the base. */
844 : int offset;
845 :
846 : /* Entry status. */
847 : enum autopref_multipass_data_status status;
848 : };
849 : typedef struct autopref_multipass_data_ autopref_multipass_data_def;
850 : typedef autopref_multipass_data_def *autopref_multipass_data_t;
851 :
852 : struct _haifa_insn_data
853 : {
854 : /* We can't place 'struct _deps_list' into h_i_d instead of deps_list_t
855 : because when h_i_d extends, addresses of the deps_list->first
856 : change without updating deps_list->first->next->prev_nextp. */
857 :
858 : /* Logical uid gives the original ordering of the insns. */
859 : int luid;
860 :
861 : /* A priority for each insn. */
862 : int priority;
863 :
864 : /* The fusion priority for each insn. */
865 : int fusion_priority;
866 :
867 : /* The minimum clock tick at which the insn becomes ready. This is
868 : used to note timing constraints for the insns in the pending list. */
869 : int tick;
870 :
871 : /* For insns that are scheduled at a fixed difference from another,
872 : this records the tick in which they must be ready. */
873 : int exact_tick;
874 :
875 : /* INTER_TICK is used to adjust INSN_TICKs of instructions from the
876 : subsequent blocks in a region. */
877 : int inter_tick;
878 :
879 : /* Used temporarily to estimate an INSN_TICK value for an insn given
880 : current knowledge. */
881 : int tick_estimate;
882 :
883 : /* See comment on QUEUE_INDEX macro in haifa-sched.cc. */
884 : int queue_index;
885 :
886 : short cost;
887 :
888 : /* '> 0' if priority is valid,
889 : '== 0' if priority was not yet computed,
890 : '< 0' if priority in invalid and should be recomputed. */
891 : signed char priority_status;
892 :
893 : /* Set if there's DEF-USE dependence between some speculatively
894 : moved load insn and this one. */
895 : unsigned int fed_by_spec_load : 1;
896 : unsigned int is_load_insn : 1;
897 : /* Nonzero if this insn has negative-cost forward dependencies against
898 : an already scheduled insn. */
899 : unsigned int feeds_backtrack_insn : 1;
900 :
901 : /* Nonzero if this insn is a shadow of another, scheduled after a fixed
902 : delay. We only emit shadows at the end of a cycle, with no other
903 : real insns following them. */
904 : unsigned int shadow_p : 1;
905 :
906 : /* Used internally in unschedule_insns_until to mark insns that must have
907 : their TODO_SPEC recomputed. */
908 : unsigned int must_recompute_spec : 1;
909 :
910 : /* What speculations are necessary to apply to schedule the instruction. */
911 : ds_t todo_spec;
912 :
913 : /* What speculations were already applied. */
914 : ds_t done_spec;
915 :
916 : /* What speculations are checked by this instruction. */
917 : ds_t check_spec;
918 :
919 : /* Recovery block for speculation checks. */
920 : basic_block recovery_block;
921 :
922 : /* Original pattern of the instruction. */
923 : rtx orig_pat;
924 :
925 : /* For insns with DEP_CONTROL dependencies, the predicated pattern if it
926 : was ever successfully constructed. */
927 : rtx predicated_pat;
928 :
929 : /* The following array contains info how the insn increases register
930 : pressure. There is an element for each cover class of pseudos
931 : referenced in insns. */
932 : struct reg_pressure_data *reg_pressure;
933 : /* The following array contains maximal reg pressure between last
934 : scheduled insn and given insn. There is an element for each
935 : pressure class of pseudos referenced in insns. This info updated
936 : after scheduling each insn for each insn between the two
937 : mentioned insns. */
938 : int *max_reg_pressure;
939 : /* The following list contains info about used pseudos and hard
940 : registers available for allocation. */
941 : struct reg_use_data *reg_use_list;
942 : /* The following list contains info about set pseudos and hard
943 : registers available for allocation. */
944 : struct reg_set_data *reg_set_list;
945 : /* Info about how scheduling the insn changes cost of register
946 : pressure excess (between source and target). */
947 : int reg_pressure_excess_cost_change;
948 : int model_index;
949 :
950 : /* Original order of insns in the ready list. */
951 : int rfs_debug_orig_order;
952 :
953 : /* The deciding reason for INSN's place in the ready list. */
954 : int last_rfs_win;
955 :
956 : /* Two entries for cache auto-prefetcher model: one for mem reads,
957 : and one for mem writes. */
958 : autopref_multipass_data_def autopref_multipass_data[2];
959 : };
960 :
961 : typedef struct _haifa_insn_data haifa_insn_data_def;
962 : typedef haifa_insn_data_def *haifa_insn_data_t;
963 :
964 :
965 : extern vec<haifa_insn_data_def> h_i_d;
966 :
967 : #define HID(INSN) (&h_i_d[INSN_UID (INSN)])
968 :
969 : /* Accessor macros for h_i_d. There are more in haifa-sched.cc and
970 : sched-rgn.cc. */
971 : #define INSN_PRIORITY(INSN) (HID (INSN)->priority)
972 : #define INSN_FUSION_PRIORITY(INSN) (HID (INSN)->fusion_priority)
973 : #define INSN_REG_PRESSURE(INSN) (HID (INSN)->reg_pressure)
974 : #define INSN_MAX_REG_PRESSURE(INSN) (HID (INSN)->max_reg_pressure)
975 : #define INSN_REG_USE_LIST(INSN) (HID (INSN)->reg_use_list)
976 : #define INSN_REG_SET_LIST(INSN) (HID (INSN)->reg_set_list)
977 : #define INSN_REG_PRESSURE_EXCESS_COST_CHANGE(INSN) \
978 : (HID (INSN)->reg_pressure_excess_cost_change)
979 : #define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
980 : #define INSN_MODEL_INDEX(INSN) (HID (INSN)->model_index)
981 : #define INSN_AUTOPREF_MULTIPASS_DATA(INSN) \
982 : (HID (INSN)->autopref_multipass_data)
983 :
984 : typedef struct _haifa_deps_insn_data haifa_deps_insn_data_def;
985 : typedef haifa_deps_insn_data_def *haifa_deps_insn_data_t;
986 :
987 :
988 : extern vec<haifa_deps_insn_data_def> h_d_i_d;
989 :
990 : #define HDID(INSN) (&h_d_i_d[INSN_LUID (INSN)])
991 : #define INSN_DEP_COUNT(INSN) (HDID (INSN)->dep_count)
992 : #define HAS_INTERNAL_DEP(INSN) (HDID (INSN)->has_internal_dep)
993 : #define INSN_FORW_DEPS(INSN) (HDID (INSN)->forw_deps)
994 : #define INSN_RESOLVED_BACK_DEPS(INSN) (HDID (INSN)->resolved_back_deps)
995 : #define INSN_RESOLVED_FORW_DEPS(INSN) (HDID (INSN)->resolved_forw_deps)
996 : #define INSN_HARD_BACK_DEPS(INSN) (HDID (INSN)->hard_back_deps)
997 : #define INSN_SPEC_BACK_DEPS(INSN) (HDID (INSN)->spec_back_deps)
998 : #define INSN_CACHED_COND(INSN) (HDID (INSN)->cond)
999 : #define INSN_REVERSE_COND(INSN) (HDID (INSN)->reverse_cond)
1000 : #define INSN_COND_DEPS(INSN) (HDID (INSN)->cond_deps)
1001 : #define CANT_MOVE(INSN) (HDID (INSN)->cant_move)
1002 : #define CANT_MOVE_BY_LUID(LUID) (h_d_i_d[LUID].cant_move)
1003 :
1004 :
1005 : #define INSN_PRIORITY(INSN) (HID (INSN)->priority)
1006 : #define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
1007 : #define INSN_PRIORITY_KNOWN(INSN) (INSN_PRIORITY_STATUS (INSN) > 0)
1008 : #define TODO_SPEC(INSN) (HID (INSN)->todo_spec)
1009 : #define DONE_SPEC(INSN) (HID (INSN)->done_spec)
1010 : #define CHECK_SPEC(INSN) (HID (INSN)->check_spec)
1011 : #define RECOVERY_BLOCK(INSN) (HID (INSN)->recovery_block)
1012 : #define ORIG_PAT(INSN) (HID (INSN)->orig_pat)
1013 : #define PREDICATED_PAT(INSN) (HID (INSN)->predicated_pat)
1014 :
1015 : /* INSN is either a simple or a branchy speculation check. */
1016 : #define IS_SPECULATION_CHECK_P(INSN) \
1017 : (sel_sched_p () ? sel_insn_is_speculation_check (INSN) : RECOVERY_BLOCK (INSN) != NULL)
1018 :
1019 : /* INSN is a speculation check that will simply reexecute the speculatively
1020 : scheduled instruction if the speculation fails. */
1021 : #define IS_SPECULATION_SIMPLE_CHECK_P(INSN) \
1022 : (RECOVERY_BLOCK (INSN) == EXIT_BLOCK_PTR_FOR_FN (cfun))
1023 :
1024 : /* INSN is a speculation check that will branch to RECOVERY_BLOCK if the
1025 : speculation fails. Insns in that block will reexecute the speculatively
1026 : scheduled code and then will return immediately after INSN thus preserving
1027 : semantics of the program. */
1028 : #define IS_SPECULATION_BRANCHY_CHECK_P(INSN) \
1029 : (RECOVERY_BLOCK (INSN) != NULL \
1030 : && RECOVERY_BLOCK (INSN) != EXIT_BLOCK_PTR_FOR_FN (cfun))
1031 :
1032 :
1033 : /* Dep status (aka ds_t) of the link encapsulates all information for a given
1034 : dependency, including everything that is needed for speculative scheduling.
1035 :
1036 : The lay-out of a ds_t is as follows:
1037 :
1038 : 1. Integers corresponding to the probability of the dependence to *not*
1039 : exist. This is the probability that overcoming this dependence will
1040 : not be followed by execution of the recovery code. Note that however
1041 : high this probability is, the recovery code should still always be
1042 : generated to preserve semantics of the program.
1043 :
1044 : The probability values can be set or retrieved using the functions
1045 : the set_dep_weak() and get_dep_weak() in sched-deps.cc. The values
1046 : are always in the range [0, MAX_DEP_WEAK].
1047 :
1048 : BEGIN_DATA : BITS_PER_DEP_WEAK
1049 : BE_IN_DATA : BITS_PER_DEP_WEAK
1050 : BEGIN_CONTROL : BITS_PER_DEP_WEAK
1051 : BE_IN_CONTROL : BITS_PER_DEP_WEAK
1052 :
1053 : The basic type of DS_T is a host int. For a 32-bits int, the values
1054 : will each take 6 bits.
1055 :
1056 : 2. The type of dependence. This supercedes the old-style REG_NOTE_KIND
1057 : values. TODO: Use this field instead of DEP_TYPE, or make DEP_TYPE
1058 : extract the dependence type from here.
1059 :
1060 : dep_type : 4 => DEP_{TRUE|OUTPUT|ANTI|CONTROL}
1061 :
1062 : 3. Various flags:
1063 :
1064 : HARD_DEP : 1 => Set if an instruction has a non-speculative
1065 : dependence. This is an instruction property
1066 : so this bit can only appear in the TODO_SPEC
1067 : field of an instruction.
1068 : DEP_POSTPONED : 1 => Like HARD_DEP, but the hard dependence may
1069 : still be broken by adjusting the instruction.
1070 : DEP_CANCELLED : 1 => Set if a dependency has been broken using
1071 : some form of speculation.
1072 : RESERVED : 1 => Reserved for use in the delay slot scheduler.
1073 :
1074 : See also: check_dep_status () in sched-deps.cc . */
1075 :
1076 : /* The number of bits per weakness probability. There are 4 weakness types
1077 : and we need 8 bits for other data in a DS_T. */
1078 : #define BITS_PER_DEP_WEAK ((BITS_PER_DEP_STATUS - 8) / 4)
1079 :
1080 : /* Mask of speculative weakness in dep_status. */
1081 : #define DEP_WEAK_MASK ((1 << BITS_PER_DEP_WEAK) - 1)
1082 :
1083 : /* This constant means that dependence is fake with 99.999...% probability.
1084 : This is the maximum value, that can appear in dep_status.
1085 : Note, that we don't want MAX_DEP_WEAK to be the same as DEP_WEAK_MASK for
1086 : debugging reasons. Though, it can be set to DEP_WEAK_MASK, and, when
1087 : done so, we'll get fast (mul for)/(div by) NO_DEP_WEAK. */
1088 : #define MAX_DEP_WEAK (DEP_WEAK_MASK - 1)
1089 :
1090 : /* This constant means that dependence is 99.999...% real and it is a really
1091 : bad idea to overcome it (though this can be done, preserving program
1092 : semantics). */
1093 : #define MIN_DEP_WEAK 1
1094 :
1095 : /* This constant represents 100% probability.
1096 : E.g. it is used to represent weakness of dependence, that doesn't exist.
1097 : This value never appears in a ds_t, it is only used for computing the
1098 : weakness of a dependence. */
1099 : #define NO_DEP_WEAK (MAX_DEP_WEAK + MIN_DEP_WEAK)
1100 :
1101 : /* Default weakness of speculative dependence. Used when we can't say
1102 : neither bad nor good about the dependence. */
1103 : #define UNCERTAIN_DEP_WEAK (MAX_DEP_WEAK - MAX_DEP_WEAK / 4)
1104 :
1105 : /* Offset for speculative weaknesses in dep_status. */
1106 : enum SPEC_TYPES_OFFSETS {
1107 : BEGIN_DATA_BITS_OFFSET = 0,
1108 : BE_IN_DATA_BITS_OFFSET = BEGIN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
1109 : BEGIN_CONTROL_BITS_OFFSET = BE_IN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
1110 : BE_IN_CONTROL_BITS_OFFSET = BEGIN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK
1111 : };
1112 :
1113 : /* The following defines provide numerous constants used to distinguish
1114 : between different types of speculative dependencies. They are also
1115 : used as masks to clear/preserve the bits corresponding to the type
1116 : of dependency weakness. */
1117 :
1118 : /* Dependence can be overcome with generation of new data speculative
1119 : instruction. */
1120 : #define BEGIN_DATA (((ds_t) DEP_WEAK_MASK) << BEGIN_DATA_BITS_OFFSET)
1121 :
1122 : /* This dependence is to the instruction in the recovery block, that was
1123 : formed to recover after data-speculation failure.
1124 : Thus, this dependence can overcome with generating of the copy of
1125 : this instruction in the recovery block. */
1126 : #define BE_IN_DATA (((ds_t) DEP_WEAK_MASK) << BE_IN_DATA_BITS_OFFSET)
1127 :
1128 : /* Dependence can be overcome with generation of new control speculative
1129 : instruction. */
1130 : #define BEGIN_CONTROL (((ds_t) DEP_WEAK_MASK) << BEGIN_CONTROL_BITS_OFFSET)
1131 :
1132 : /* This dependence is to the instruction in the recovery block, that was
1133 : formed to recover after control-speculation failure.
1134 : Thus, this dependence can be overcome with generating of the copy of
1135 : this instruction in the recovery block. */
1136 : #define BE_IN_CONTROL (((ds_t) DEP_WEAK_MASK) << BE_IN_CONTROL_BITS_OFFSET)
1137 :
1138 : /* A few convenient combinations. */
1139 : #define BEGIN_SPEC (BEGIN_DATA | BEGIN_CONTROL)
1140 : #define DATA_SPEC (BEGIN_DATA | BE_IN_DATA)
1141 : #define CONTROL_SPEC (BEGIN_CONTROL | BE_IN_CONTROL)
1142 : #define SPECULATIVE (DATA_SPEC | CONTROL_SPEC)
1143 : #define BE_IN_SPEC (BE_IN_DATA | BE_IN_CONTROL)
1144 :
1145 : /* Constants, that are helpful in iterating through dep_status. */
1146 : #define FIRST_SPEC_TYPE BEGIN_DATA
1147 : #define LAST_SPEC_TYPE BE_IN_CONTROL
1148 : #define SPEC_TYPE_SHIFT BITS_PER_DEP_WEAK
1149 :
1150 : /* Dependence on instruction can be of multiple types
1151 : (e.g. true and output). This fields enhance REG_NOTE_KIND information
1152 : of the dependence. */
1153 : #define DEP_TRUE (((ds_t) 1) << (BE_IN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK))
1154 : #define DEP_OUTPUT (DEP_TRUE << 1)
1155 : #define DEP_ANTI (DEP_OUTPUT << 1)
1156 : #define DEP_CONTROL (DEP_ANTI << 1)
1157 :
1158 : #define DEP_TYPES (DEP_TRUE | DEP_OUTPUT | DEP_ANTI | DEP_CONTROL)
1159 :
1160 : /* Instruction has non-speculative dependence. This bit represents the
1161 : property of an instruction - not the one of a dependence.
1162 : Therefore, it can appear only in the TODO_SPEC field of an instruction. */
1163 : #define HARD_DEP (DEP_CONTROL << 1)
1164 :
1165 : /* Like HARD_DEP, but dependencies can perhaps be broken by modifying
1166 : the instructions. This is used for example to change:
1167 :
1168 : rn++ => rm=[rn + 4]
1169 : rm=[rn] rn++
1170 :
1171 : For instructions that have this bit set, one of the dependencies of
1172 : the instructions will have a non-NULL REPLACE field in its DEP_T.
1173 : Just like HARD_DEP, this bit is only ever set in TODO_SPEC. */
1174 : #define DEP_POSTPONED (HARD_DEP << 1)
1175 :
1176 : /* Set if a dependency is cancelled via speculation. */
1177 : #define DEP_CANCELLED (DEP_POSTPONED << 1)
1178 :
1179 :
1180 : /* This represents the results of calling sched-deps.cc functions,
1181 : which modify dependencies. */
1182 : enum DEPS_ADJUST_RESULT {
1183 : /* No dependence needed (e.g. producer == consumer). */
1184 : DEP_NODEP,
1185 : /* Dependence is already present and wasn't modified. */
1186 : DEP_PRESENT,
1187 : /* Existing dependence was modified to include additional information. */
1188 : DEP_CHANGED,
1189 : /* New dependence has been created. */
1190 : DEP_CREATED
1191 : };
1192 :
1193 : /* Represents the bits that can be set in the flags field of the
1194 : sched_info structure. */
1195 : enum SCHED_FLAGS {
1196 : /* If set, generate links between instruction as DEPS_LIST.
1197 : Otherwise, generate usual INSN_LIST links. */
1198 : USE_DEPS_LIST = 1,
1199 : /* Perform data or control (or both) speculation.
1200 : Results in generation of data and control speculative dependencies.
1201 : Requires USE_DEPS_LIST set. */
1202 : DO_SPECULATION = USE_DEPS_LIST << 1,
1203 : DO_BACKTRACKING = DO_SPECULATION << 1,
1204 : DO_PREDICATION = DO_BACKTRACKING << 1,
1205 : DONT_BREAK_DEPENDENCIES = DO_PREDICATION << 1,
1206 : SCHED_RGN = DONT_BREAK_DEPENDENCIES << 1,
1207 : SCHED_EBB = SCHED_RGN << 1,
1208 : /* Scheduler can possibly create new basic blocks. Used for assertions. */
1209 : NEW_BBS = SCHED_EBB << 1,
1210 : SEL_SCHED = NEW_BBS << 1
1211 : };
1212 :
1213 : enum SPEC_SCHED_FLAGS {
1214 : COUNT_SPEC_IN_CRITICAL_PATH = 1,
1215 : SEL_SCHED_SPEC_DONT_CHECK_CONTROL = COUNT_SPEC_IN_CRITICAL_PATH << 1
1216 : };
1217 :
1218 : #define NOTE_NOT_BB_P(NOTE) (NOTE_P (NOTE) && (NOTE_KIND (NOTE) \
1219 : != NOTE_INSN_BASIC_BLOCK))
1220 :
1221 : extern FILE *sched_dump;
1222 : extern int sched_verbose;
1223 :
1224 : extern spec_info_t spec_info;
1225 : extern bool haifa_recovery_bb_ever_added_p;
1226 :
1227 : /* Exception Free Loads:
1228 :
1229 : We define five classes of speculative loads: IFREE, IRISKY,
1230 : PFREE, PRISKY, and MFREE.
1231 :
1232 : IFREE loads are loads that are proved to be exception-free, just
1233 : by examining the load insn. Examples for such loads are loads
1234 : from TOC and loads of global data.
1235 :
1236 : IRISKY loads are loads that are proved to be exception-risky,
1237 : just by examining the load insn. Examples for such loads are
1238 : volatile loads and loads from shared memory.
1239 :
1240 : PFREE loads are loads for which we can prove, by examining other
1241 : insns, that they are exception-free. Currently, this class consists
1242 : of loads for which we are able to find a "similar load", either in
1243 : the target block, or, if only one split-block exists, in that split
1244 : block. Load2 is similar to load1 if both have same single base
1245 : register. We identify only part of the similar loads, by finding
1246 : an insn upon which both load1 and load2 have a DEF-USE dependence.
1247 :
1248 : PRISKY loads are loads for which we can prove, by examining other
1249 : insns, that they are exception-risky. Currently we have two proofs for
1250 : such loads. The first proof detects loads that are probably guarded by a
1251 : test on the memory address. This proof is based on the
1252 : backward and forward data dependence information for the region.
1253 : Let load-insn be the examined load.
1254 : Load-insn is PRISKY iff ALL the following hold:
1255 :
1256 : - insn1 is not in the same block as load-insn
1257 : - there is a DEF-USE dependence chain (insn1, ..., load-insn)
1258 : - test-insn is either a compare or a branch, not in the same block
1259 : as load-insn
1260 : - load-insn is reachable from test-insn
1261 : - there is a DEF-USE dependence chain (insn1, ..., test-insn)
1262 :
1263 : This proof might fail when the compare and the load are fed
1264 : by an insn not in the region. To solve this, we will add to this
1265 : group all loads that have no input DEF-USE dependence.
1266 :
1267 : The second proof detects loads that are directly or indirectly
1268 : fed by a speculative load. This proof is affected by the
1269 : scheduling process. We will use the flag fed_by_spec_load.
1270 : Initially, all insns have this flag reset. After a speculative
1271 : motion of an insn, if insn is either a load, or marked as
1272 : fed_by_spec_load, we will also mark as fed_by_spec_load every
1273 : insn1 for which a DEF-USE dependence (insn, insn1) exists. A
1274 : load which is fed_by_spec_load is also PRISKY.
1275 :
1276 : MFREE (maybe-free) loads are all the remaining loads. They may be
1277 : exception-free, but we cannot prove it.
1278 :
1279 : Now, all loads in IFREE and PFREE classes are considered
1280 : exception-free, while all loads in IRISKY and PRISKY classes are
1281 : considered exception-risky. As for loads in the MFREE class,
1282 : these are considered either exception-free or exception-risky,
1283 : depending on whether we are pessimistic or optimistic. We have
1284 : to take the pessimistic approach to assure the safety of
1285 : speculative scheduling, but we can take the optimistic approach
1286 : by invoking the -fsched_spec_load_dangerous option. */
1287 :
1288 : enum INSN_TRAP_CLASS
1289 : {
1290 : TRAP_FREE = 0, IFREE = 1, PFREE_CANDIDATE = 2,
1291 : PRISKY_CANDIDATE = 3, IRISKY = 4, TRAP_RISKY = 5
1292 : };
1293 :
1294 : #define WORST_CLASS(class1, class2) \
1295 : ((class1 > class2) ? class1 : class2)
1296 :
1297 : #ifndef __GNUC__
1298 : #define __inline
1299 : #endif
1300 :
1301 : #ifndef HAIFA_INLINE
1302 : #define HAIFA_INLINE __inline
1303 : #endif
1304 :
1305 : struct sched_deps_info_def
1306 : {
1307 : /* Called when computing dependencies for a JUMP_INSN. This function
1308 : should store the set of registers that must be considered as set by
1309 : the jump in the regset. */
1310 : void (*compute_jump_reg_dependencies) (rtx_insn *, regset);
1311 :
1312 : /* Start analyzing insn. */
1313 : void (*start_insn) (rtx_insn *);
1314 :
1315 : /* Finish analyzing insn. */
1316 : void (*finish_insn) (void);
1317 :
1318 : /* Start analyzing insn LHS (Left Hand Side). */
1319 : void (*start_lhs) (rtx);
1320 :
1321 : /* Finish analyzing insn LHS. */
1322 : void (*finish_lhs) (void);
1323 :
1324 : /* Start analyzing insn RHS (Right Hand Side). */
1325 : void (*start_rhs) (rtx);
1326 :
1327 : /* Finish analyzing insn RHS. */
1328 : void (*finish_rhs) (void);
1329 :
1330 : /* Note set of the register. */
1331 : void (*note_reg_set) (int);
1332 :
1333 : /* Note clobber of the register. */
1334 : void (*note_reg_clobber) (int);
1335 :
1336 : /* Note use of the register. */
1337 : void (*note_reg_use) (int);
1338 :
1339 : /* Note memory dependence of type DS between MEM1 and MEM2 (which is
1340 : in the INSN2). */
1341 : void (*note_mem_dep) (rtx mem1, rtx mem2, rtx_insn *insn2, ds_t ds);
1342 :
1343 : /* Note a dependence of type DS from the INSN. */
1344 : void (*note_dep) (rtx_insn *, ds_t ds);
1345 :
1346 : /* Nonzero if we should use cselib for better alias analysis. This
1347 : must be 0 if the dependency information is used after sched_analyze
1348 : has completed, e.g. if we're using it to initialize state for successor
1349 : blocks in region scheduling. */
1350 : unsigned int use_cselib : 1;
1351 :
1352 : /* If set, generate links between instruction as DEPS_LIST.
1353 : Otherwise, generate usual INSN_LIST links. */
1354 : unsigned int use_deps_list : 1;
1355 :
1356 : /* Generate data and control speculative dependencies.
1357 : Requires USE_DEPS_LIST set. */
1358 : unsigned int generate_spec_deps : 1;
1359 : };
1360 :
1361 : extern struct sched_deps_info_def *sched_deps_info;
1362 :
1363 :
1364 : /* Functions in sched-deps.cc. */
1365 : extern rtx sched_get_reverse_condition_uncached (const rtx_insn *);
1366 : extern bool sched_insns_conditions_mutex_p (const rtx_insn *,
1367 : const rtx_insn *);
1368 : extern bool sched_insn_is_legitimate_for_speculation_p (const rtx_insn *, ds_t);
1369 : extern void add_dependence (rtx_insn *, rtx_insn *, enum reg_note);
1370 : extern void sched_analyze (class deps_desc *, rtx_insn *, rtx_insn *);
1371 : extern void init_deps (class deps_desc *, bool);
1372 : extern struct deps_reg *deps_reg_last (class deps_desc *, unsigned int);
1373 : extern void init_deps_reg_last (class deps_desc *);
1374 : extern void free_deps (class deps_desc *);
1375 : extern void init_deps_global (void);
1376 : extern void finish_deps_global (void);
1377 : extern void deps_analyze_insn (class deps_desc *, rtx_insn *);
1378 : extern void remove_from_deps (class deps_desc *, rtx_insn *);
1379 : extern void init_insn_reg_pressure_info (rtx_insn *);
1380 : extern void get_implicit_reg_pending_clobbers (HARD_REG_SET *, rtx_insn *);
1381 :
1382 : extern dw_t get_dep_weak (ds_t, ds_t);
1383 : extern ds_t set_dep_weak (ds_t, ds_t, dw_t);
1384 : extern dw_t estimate_dep_weak (rtx, rtx);
1385 : extern ds_t ds_merge (ds_t, ds_t);
1386 : extern ds_t ds_full_merge (ds_t, ds_t, rtx, rtx);
1387 : extern ds_t ds_max_merge (ds_t, ds_t);
1388 : extern dw_t ds_weak (ds_t);
1389 : extern ds_t ds_get_speculation_types (ds_t);
1390 : extern ds_t ds_get_max_dep_weak (ds_t);
1391 :
1392 : extern void sched_deps_init (bool);
1393 : extern void sched_deps_finish (void);
1394 :
1395 : extern void haifa_note_reg_set (int);
1396 : extern void haifa_note_reg_clobber (int);
1397 : extern void haifa_note_reg_use (int);
1398 :
1399 : extern void maybe_extend_reg_info_p (void);
1400 :
1401 : extern void deps_start_bb (class deps_desc *, rtx_insn *);
1402 : extern enum reg_note ds_to_dt (ds_t);
1403 :
1404 : extern bool deps_pools_are_empty_p (void);
1405 : extern void sched_free_deps (rtx_insn *, rtx_insn *, bool);
1406 : extern void extend_dependency_caches (int, bool);
1407 :
1408 : extern void debug_ds (ds_t);
1409 :
1410 :
1411 : /* Functions in haifa-sched.cc. */
1412 : extern void initialize_live_range_shrinkage (void);
1413 : extern void finish_live_range_shrinkage (void);
1414 : extern void sched_init_region_reg_pressure_info (void);
1415 : extern void free_global_sched_pressure_data (void);
1416 : extern int haifa_classify_insn (const rtx_insn *);
1417 : extern void get_ebb_head_tail (basic_block, basic_block,
1418 : rtx_insn **, rtx_insn **);
1419 : extern bool no_real_insns_p (const rtx_insn *, const rtx_insn *);
1420 :
1421 : extern int insn_sched_cost (rtx_insn *);
1422 : extern int dep_cost_1 (dep_t, dw_t);
1423 : extern int dep_cost (dep_t);
1424 : extern int set_priorities (rtx_insn *, rtx_insn *);
1425 :
1426 : extern void sched_setup_bb_reg_pressure_info (basic_block, rtx_insn *);
1427 : extern bool schedule_block (basic_block *, state_t);
1428 :
1429 : extern int cycle_issued_insns;
1430 : extern int issue_rate;
1431 : extern int dfa_lookahead;
1432 :
1433 : extern int autopref_multipass_dfa_lookahead_guard (rtx_insn *, int);
1434 :
1435 : extern rtx_insn *ready_element (struct ready_list *, int);
1436 : extern rtx_insn **ready_lastpos (struct ready_list *);
1437 :
1438 : extern int try_ready (rtx_insn *);
1439 : extern void sched_extend_ready_list (int);
1440 : extern void sched_finish_ready_list (void);
1441 : extern void sched_change_pattern (rtx, rtx);
1442 : extern int sched_speculate_insn (rtx_insn *, ds_t, rtx *);
1443 : extern void unlink_bb_notes (basic_block, basic_block);
1444 : extern void add_block (basic_block, basic_block);
1445 : extern rtx_note *bb_note (basic_block);
1446 : extern void concat_note_lists (rtx_insn *, rtx_insn **);
1447 : extern rtx_insn *sched_emit_insn (rtx);
1448 : extern rtx_insn *get_ready_element (int);
1449 : extern int number_in_ready (void);
1450 :
1451 : /* Types and functions in sched-ebb.cc. */
1452 :
1453 : extern basic_block schedule_ebb (rtx_insn *, rtx_insn *, bool);
1454 : extern void schedule_ebbs_init (void);
1455 : extern void schedule_ebbs_finish (void);
1456 :
1457 : /* Types and functions in sched-rgn.cc. */
1458 :
1459 : /* A region is the main entity for interblock scheduling: insns
1460 : are allowed to move between blocks in the same region, along
1461 : control flow graph edges, in the 'up' direction. */
1462 : struct region
1463 : {
1464 : /* Number of extended basic blocks in region. */
1465 : int rgn_nr_blocks;
1466 : /* cblocks in the region (actually index in rgn_bb_table). */
1467 : int rgn_blocks;
1468 : /* Dependencies for this region are already computed. Basically, indicates,
1469 : that this is a recovery block. */
1470 : unsigned int dont_calc_deps : 1;
1471 : /* This region has at least one non-trivial ebb. */
1472 : unsigned int has_real_ebb : 1;
1473 : };
1474 :
1475 : extern int nr_regions;
1476 : extern region *rgn_table;
1477 : extern int *rgn_bb_table;
1478 : extern int *block_to_bb;
1479 : extern int *containing_rgn;
1480 :
1481 : /* Often used short-hand in the scheduler. The rest of the compiler uses
1482 : BLOCK_FOR_INSN(INSN) and an indirect reference to get the basic block
1483 : number ("index"). For historical reasons, the scheduler does not. */
1484 : #define BLOCK_NUM(INSN) (BLOCK_FOR_INSN (INSN)->index + 0)
1485 :
1486 : #define RGN_NR_BLOCKS(rgn) (rgn_table[rgn].rgn_nr_blocks)
1487 : #define RGN_BLOCKS(rgn) (rgn_table[rgn].rgn_blocks)
1488 : #define RGN_DONT_CALC_DEPS(rgn) (rgn_table[rgn].dont_calc_deps)
1489 : #define RGN_HAS_REAL_EBB(rgn) (rgn_table[rgn].has_real_ebb)
1490 : #define BLOCK_TO_BB(block) (block_to_bb[block])
1491 : #define CONTAINING_RGN(block) (containing_rgn[block])
1492 :
1493 : /* The mapping from ebb to block. */
1494 : extern int *ebb_head;
1495 : #define BB_TO_BLOCK(ebb) (rgn_bb_table[ebb_head[ebb]])
1496 : #define EBB_FIRST_BB(ebb) BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (ebb))
1497 : #define EBB_LAST_BB(ebb) \
1498 : BASIC_BLOCK_FOR_FN (cfun, rgn_bb_table[ebb_head[ebb + 1] - 1])
1499 : #define INSN_BB(INSN) (BLOCK_TO_BB (BLOCK_NUM (INSN)))
1500 :
1501 : extern int current_nr_blocks;
1502 : extern int current_blocks;
1503 : extern int target_bb;
1504 : extern bool sched_no_dce;
1505 :
1506 : extern void set_modulo_params (int, int, int, int);
1507 : extern void record_delay_slot_pair (rtx_insn *, rtx_insn *, int, int);
1508 : extern rtx_insn *real_insn_for_shadow (rtx_insn *);
1509 : extern void discard_delay_pairs_above (int);
1510 : extern void free_delay_pairs (void);
1511 : extern void add_delay_dependencies (rtx_insn *);
1512 : extern bool sched_is_disabled_for_current_region_p (void);
1513 : extern void sched_rgn_init (bool);
1514 : extern void sched_rgn_finish (void);
1515 : extern void rgn_setup_region (int);
1516 : extern void sched_rgn_compute_dependencies (int);
1517 : extern void sched_rgn_local_init (int);
1518 : extern void sched_rgn_local_finish (void);
1519 : extern void sched_rgn_local_free (void);
1520 : extern void extend_regions (void);
1521 : extern void rgn_make_new_region_out_of_new_block (basic_block);
1522 :
1523 : extern void compute_priorities (void);
1524 : extern void increase_insn_priority (rtx_insn *, int);
1525 : extern void debug_rgn_dependencies (int);
1526 : extern void debug_dependencies (rtx_insn *, rtx_insn *);
1527 : extern void dump_rgn_dependencies_dot (FILE *);
1528 : extern void dump_rgn_dependencies_dot (const char *);
1529 :
1530 : extern void free_rgn_deps (void);
1531 : extern bool contributes_to_priority (rtx_insn *, rtx_insn *);
1532 : extern void extend_rgns (int *, int *, sbitmap, int *);
1533 : extern void deps_join (class deps_desc *, class deps_desc *);
1534 :
1535 : extern void rgn_setup_common_sched_info (void);
1536 : extern void rgn_setup_sched_infos (void);
1537 :
1538 : extern void debug_regions (void);
1539 : extern void debug_region (int);
1540 : extern void dump_region_dot (FILE *, int);
1541 : extern void dump_region_dot_file (const char *, int);
1542 :
1543 : extern void haifa_sched_init (void);
1544 : extern void haifa_sched_finish (void);
1545 :
1546 : extern void find_modifiable_mems (rtx_insn *, rtx_insn *);
1547 :
1548 : /* sched-deps.cc interface to walk, add, search, update, resolve, delete
1549 : and debug instruction dependencies. */
1550 :
1551 : /* Constants defining dependences lists. */
1552 :
1553 : /* No list. */
1554 : #define SD_LIST_NONE (0)
1555 :
1556 : /* hard_back_deps. */
1557 : #define SD_LIST_HARD_BACK (1)
1558 :
1559 : /* spec_back_deps. */
1560 : #define SD_LIST_SPEC_BACK (2)
1561 :
1562 : /* forw_deps. */
1563 : #define SD_LIST_FORW (4)
1564 :
1565 : /* resolved_back_deps. */
1566 : #define SD_LIST_RES_BACK (8)
1567 :
1568 : /* resolved_forw_deps. */
1569 : #define SD_LIST_RES_FORW (16)
1570 :
1571 : #define SD_LIST_BACK (SD_LIST_HARD_BACK | SD_LIST_SPEC_BACK)
1572 :
1573 : /* A type to hold above flags. */
1574 : typedef int sd_list_types_def;
1575 :
1576 : extern void sd_next_list (const rtx_insn *, sd_list_types_def *,
1577 : deps_list_t *, bool *);
1578 :
1579 : /* Iterator to walk through, resolve and delete dependencies. */
1580 : struct _sd_iterator
1581 : {
1582 : /* What lists to walk. Can be any combination of SD_LIST_* flags. */
1583 : sd_list_types_def types;
1584 :
1585 : /* Instruction dependencies lists of which will be walked. */
1586 : rtx_insn *insn;
1587 :
1588 : /* Pointer to the next field of the previous element. This is not
1589 : simply a pointer to the next element to allow easy deletion from the
1590 : list. When a dep is being removed from the list the iterator
1591 : will automatically advance because the value in *linkp will start
1592 : referring to the next element. */
1593 : dep_link_t *linkp;
1594 :
1595 : /* True if the current list is a resolved one. */
1596 : bool resolved_p;
1597 : };
1598 :
1599 : typedef struct _sd_iterator sd_iterator_def;
1600 :
1601 : /* ??? We can move some definitions that are used in below inline functions
1602 : out of sched-int.h to sched-deps.cc provided that the below functions will
1603 : become global externals.
1604 : These definitions include:
1605 : * struct _deps_list: opaque pointer is needed at global scope.
1606 : * struct _dep_link: opaque pointer is needed at scope of sd_iterator_def.
1607 : * struct _dep_node: opaque pointer is needed at scope of
1608 : struct _deps_link. */
1609 :
1610 : /* Return initialized iterator. */
1611 : inline sd_iterator_def
1612 1937580442 : sd_iterator_start (rtx_insn *insn, sd_list_types_def types)
1613 : {
1614 : /* Some dep_link a pointer to which will return NULL. */
1615 1937580442 : static dep_link_t null_link = NULL;
1616 :
1617 1937580442 : sd_iterator_def i;
1618 :
1619 1937580442 : i.types = types;
1620 1937580442 : i.insn = insn;
1621 1937580442 : i.linkp = &null_link;
1622 :
1623 : /* Avoid 'uninitialized warning'. */
1624 1937580442 : i.resolved_p = false;
1625 :
1626 1937580442 : return i;
1627 : }
1628 :
1629 : /* Return the current element. */
1630 : inline bool
1631 4738997613 : sd_iterator_cond (sd_iterator_def *it_ptr, dep_t *dep_ptr)
1632 : {
1633 8852015391 : while (true)
1634 : {
1635 6795506502 : dep_link_t link = *it_ptr->linkp;
1636 :
1637 6795506502 : if (link != NULL)
1638 : {
1639 3190944501 : *dep_ptr = DEP_LINK_DEP (link);
1640 3190944501 : return true;
1641 : }
1642 : else
1643 : {
1644 3604562001 : sd_list_types_def types = it_ptr->types;
1645 :
1646 3604562001 : if (types != SD_LIST_NONE)
1647 : /* Switch to next list. */
1648 : {
1649 2056508889 : deps_list_t list;
1650 :
1651 2056508889 : sd_next_list (it_ptr->insn,
1652 : &it_ptr->types, &list, &it_ptr->resolved_p);
1653 :
1654 2056508889 : if (list)
1655 : {
1656 2056508889 : it_ptr->linkp = &DEPS_LIST_FIRST (list);
1657 2056508889 : continue;
1658 : }
1659 : }
1660 :
1661 1548053112 : *dep_ptr = NULL;
1662 1548053112 : return false;
1663 : }
1664 2056508889 : }
1665 : }
1666 :
1667 : /* Advance iterator. */
1668 : inline void
1669 2355646604 : sd_iterator_next (sd_iterator_def *it_ptr)
1670 : {
1671 2355646604 : it_ptr->linkp = &DEP_LINK_NEXT (*it_ptr->linkp);
1672 : }
1673 :
1674 : /* A cycle wrapper. */
1675 : #define FOR_EACH_DEP(INSN, LIST_TYPES, ITER, DEP) \
1676 : for ((ITER) = sd_iterator_start ((INSN), (LIST_TYPES)); \
1677 : sd_iterator_cond (&(ITER), &(DEP)); \
1678 : sd_iterator_next (&(ITER)))
1679 :
1680 : #define IS_DISPATCH_ON 1
1681 : #define IS_CMP 2
1682 : #define DISPATCH_VIOLATION 3
1683 : #define FITS_DISPATCH_WINDOW 4
1684 : #define DISPATCH_INIT 5
1685 : #define ADD_TO_DISPATCH_WINDOW 6
1686 :
1687 : extern int sd_lists_size (const rtx_insn *, sd_list_types_def);
1688 : extern bool sd_lists_empty_p (const rtx_insn *, sd_list_types_def);
1689 : extern void sd_init_insn (rtx_insn *);
1690 : extern void sd_finish_insn (rtx_insn *);
1691 : extern dep_t sd_find_dep_between (rtx_insn *, rtx_insn *, bool);
1692 : extern void sd_add_dep (dep_t, bool);
1693 : extern enum DEPS_ADJUST_RESULT sd_add_or_update_dep (dep_t, bool);
1694 : extern void sd_resolve_dep (sd_iterator_def);
1695 : extern void sd_unresolve_dep (sd_iterator_def);
1696 : extern void sd_copy_back_deps (rtx_insn *, rtx_insn *, bool);
1697 : extern void sd_delete_dep (sd_iterator_def);
1698 : extern void sd_debug_lists (rtx_insn *, sd_list_types_def);
1699 :
1700 : extern int dep_list_size (rtx_insn *, sd_list_types_def);
1701 :
1702 : /* Macros and declarations for scheduling fusion. */
1703 : #define FUSION_MAX_PRIORITY (INT_MAX)
1704 : extern bool sched_fusion;
1705 :
1706 : #endif /* INSN_SCHEDULING */
1707 :
1708 : #endif /* GCC_SCHED_INT_H */
1709 :
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