LCOV - code coverage report
Current view: top level - gcc - sel-sched.cc (source / functions) Coverage Total Hit
Test: gcc.info Lines: 80.4 % 3025 2431
Test Date: 2025-04-26 15:52:03 Functions: 92.6 % 149 138
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: - 0 0

Function Name Sort by function name Hit count Sort by function hit count
_Z24sel_add_to_insn_priorityP7rtx_defi 0
_ZL11debug_statePv 0
_ZL14compute_av_setP8rtx_insnP10_list_nodeib 0
_ZL14move_cond_jumpP8rtx_insnP4_bnd 0
_ZL14vinsn_vec_freeR3vecIP9vinsn_def7va_heap6vl_ptrE 0
_ZL24create_speculation_checkP5_exprjP8rtx_insn 0
_ZL25rtx_ok_for_substitution_pP7rtx_defS0_ 0
_ZL26move_nop_to_previous_blockP8rtx_insnP15basic_block_def 0
_ZL29moveup_expr_inside_insn_groupP5_exprP8rtx_insn 0
_ZL31code_motion_path_driver_cleanupPP10_list_nodeS1_ 0
_ZL40av_set_could_be_blocked_by_bookkeeping_pP10_list_nodePv 0
_ZL27implicit_clobber_conflict_pP8rtx_insnP5_expr 27
_ZL16identical_copy_pP8rtx_insn 28
_ZL24create_insn_rtx_with_rhsP9vinsn_defP7rtx_def 31
_ZL18init_regs_for_mode12machine_mode 36
_ZL28create_block_for_bookkeepingP8edge_defS0_ 51
_ZL13vinsn_vec_addP3vecIP9vinsn_def7va_heap6vl_ptrEP5_expr 60
_ZL22init_hard_regno_renamei 71
_ZL26vinsn_writes_one_of_regs_pP9vinsn_defP11bitmap_head12HARD_REG_SET 73
_ZL27update_transformation_cacheP5_exprP8rtx_insnb16local_trans_typeP9vinsn_def 78
_ZL39moving_insn_creates_bookkeeping_block_pP8rtx_insnS0_ 79
_ZL33reset_sched_cycles_in_current_ebbv 103
_ZL16in_fallthru_bb_pP8rtx_insnP7rtx_def 116
_ZL22substitute_reg_in_exprP5_exprP8rtx_insnb 124
_ZL23count_occurrences_equivPK7rtx_defS1_ 124
_Z24run_selective_schedulingv 131
_Z31maybe_skip_selective_schedulingv 131
_ZL15sel_global_initv 131
_ZL17sel_global_finishv 131
_ZL19init_hard_regs_datav 131
_ZL20try_replace_dest_regP10_list_nodeP7rtx_defP5_expr 160
_ZL25replace_src_with_reg_ok_pP8rtx_insnP7rtx_def 162
_ZL26replace_dest_with_reg_ok_pP8rtx_insnP7rtx_def 162
_ZL21emit_bookkeeping_insnP8rtx_insnP5_expri 166
_ZL25generate_bookkeeping_insnP5_exprP8edge_defS2_ 166
_ZL26find_place_for_bookkeepingP8edge_defS0_PP6_fence 166
_ZL26find_seqno_for_bookkeepingP8rtx_insnS0_ 166
_ZL35update_and_record_unavailable_insnsP15basic_block_def 166
_ZL29block_valid_for_bookkeeping_pP15basic_block_def 177
_ZL25emit_insn_from_expr_afterP5_exprP9vinsn_defiP8rtx_insn 198
_ZL26find_block_for_bookkeepingP8edge_defS0_b 211
_ZL24create_insn_rtx_with_lhsP9vinsn_defP7rtx_def 213
_ZL29replace_dest_with_reg_in_exprP5_exprP7rtx_def 213
_ZL22choose_best_pseudo_regP11bitmap_headP10reg_renameP10_list_nodePb 240
_ZL25move_op_after_merge_succsP17cmpd_local_paramsPv 377
_ZL23setup_current_loop_nestiP3vecIP15basic_block_def7va_heap6vl_ptrE 384
_ZL19move_op_merge_succsP8rtx_insnS0_iP17cmpd_local_paramsPv 511
_ZL24sel_region_target_finishb 540
_ZL16update_data_setsP8rtx_insn 568
_ZL11put_TImodesv 624
_ZL19find_ebb_boundariesP15basic_block_defP11bitmap_head 624
_ZL17sel_region_finishb 782
_ZL18sel_sched_region_1v 782
_ZL22sel_compute_prioritiesi 782
_ZL22simplify_changed_insnsv 782
_ZL28sel_setup_region_sched_flagsv 782
_Z16sel_sched_regioni 802
_ZL10init_seqnoP11bitmap_headP15basic_block_def 802
_ZL15sel_region_initi 802
_ZL18sel_sched_region_2i 802
_ZL22current_region_empty_pv 802
_ZL23extract_new_fences_fromP10_list_nodeP14flist_tail_defi 953
_ZL21compute_live_after_bbP15basic_block_def 1074
_ZL24can_substitute_through_pP8rtx_insnj 1080
_ZL12init_seqno_1P15basic_block_defP17simple_bitmap_defP11bitmap_head 1120
_ZL13get_expr_costP5_exprP6_fence 1482
_ZL18find_min_max_seqnoP10_list_nodePiS1_ 1747
_ZL18schedule_on_fencesP10_list_nodeiPPS0_ 1747
_ZL20calculate_new_fencesP10_list_nodeiPi 1747
_ZL23update_seqnos_and_stageiiiPP10_list_node 1747
_ZL10fill_insnsP6_fenceiPPP10_list_node 1882
_ZL15choose_best_reg12HARD_REG_SETP10reg_renameP10_list_nodePb 2501
_ZL17choose_best_reg_112HARD_REG_SETP10reg_renameP10_list_nodePb 2501
_ZL26verify_target_availabilityP5_exprP11bitmap_headP10reg_rename 2741
_ZL14find_used_regsP8rtx_insnP10_list_nodeP11bitmap_headP10reg_renamePS2_ 2814
_ZL22find_best_reg_for_exprP5_exprP10_list_nodePb 2814
_ZL34collect_unavailable_regs_from_bndsP5_exprP10_list_nodeP11bitmap_headP10reg_renamePS2_ 2814
_ZL13get_reg_classP8rtx_insn 2817
_ZL16stall_for_cyclesP6_fencei 2825
_ZL18estimate_insn_costP8rtx_insnPv 3104
_ZL17advance_one_cycleP6_fence 3334
_ZL26mark_unavailable_hard_regsP4_defP10reg_renameP11bitmap_head 3354
_ZL15vinsn_vec_clearP3vecIP9vinsn_def7va_heap6vl_ptrE 3494
_ZL19fur_orig_expr_foundP8rtx_insnP5_exprP17cmpd_local_paramsPv 3738
_ZL23compute_live_below_insnP8rtx_insnP11bitmap_head 3738
_ZL14move_op_ascendP8rtx_insnPv 4173
_ZL27move_op_orig_expr_not_foundP8rtx_insnP10_list_nodePv 4173
_ZL19can_speculate_dep_pj 4423
_ZL17sel_dfa_new_cycleP8rtx_insnP6_fence 4871
_ZL17update_boundariesP6_fenceP4_bndP8rtx_insnPP10_list_nodeS7_ 4871
_ZL21update_fence_and_insnP6_fenceP8rtx_insni 4871
_ZL22advance_state_on_fenceP6_fenceP8rtx_insn 4871
_ZL22get_dest_from_orig_opsP10_list_node 4871
_ZL22invoke_aftermath_hooksP6_fenceP8rtx_insni 4871
_ZL22move_exprs_to_boundaryP4_bndP5_exprP10_list_nodeS2_ 4871
_ZL23prepare_place_to_insertP4_bnd 4871
_ZL23remove_temp_moveop_nopsb 4871
_ZL25schedule_expr_on_boundaryP4_bndP5_expri 4871
_ZL7move_opP8rtx_insnP10_list_nodeP5_exprP7rtx_defS4_Pb 4871
_ZL16choose_best_insnP6_fenceiPi 4888
_ZL26calculate_privileged_insnsv 4888
_ZL26invoke_dfa_lookahead_guardv 4888
_ZL23move_op_orig_expr_foundP8rtx_insnP5_exprP17cmpd_local_paramsPv 4938
_ZL23remove_insn_from_streamP8rtx_insnb 4938
_ZL24maybe_emit_renaming_copyP8rtx_insnP20moveop_static_params 4938
_ZL28get_spec_check_type_for_insnP8rtx_insnP5_expr 4938
_ZL28maybe_emit_speculative_checkP8rtx_insnP5_exprP20moveop_static_params 4938
_ZL28need_nop_to_preserve_insn_bbP8rtx_insn 4938
_ZL31handle_emitting_transformationsP8rtx_insnP5_exprP20moveop_static_params 4938
_ZL32track_scheduled_insns_and_blocksP8rtx_insn 4938
_ZL22remove_insns_for_debugP10_list_nodePS0_ 5158
_ZL28compute_av_set_on_boundariesP6_fenceP10_list_nodePS2_ 5158
_ZL28moveup_set_inside_insn_groupPP10_list_nodeS0_ 5158
_ZL34remove_insns_that_need_bookkeepingP6_fencePP10_list_node 5158
_ZL21move_op_at_first_insnP8rtx_insnP17cmpd_local_paramsPv 5315
_ZL16move_op_on_enterP8rtx_insnP17cmpd_local_paramsPvb 5381
_ZL30code_motion_process_successorsP8rtx_insnP10_list_nodeS2_Pv 5598
_ZL20invoke_reorder_hooksP6_fence 5985
_ZL27convert_vec_av_set_to_readyv 5985
_ZL15fill_vec_av_setP10_list_nodeS0_P6_fencePi 7588
_ZL26find_sequential_best_exprsP4_bndP5_exprb 7685
_ZL14find_best_exprPP10_list_nodeS0_P6_fencePi 7696
_ZL15fill_ready_listPP10_list_nodeS0_P6_fencePi 7696
_ZL17process_use_exprsPP10_list_node 7696
_ZL18process_spec_exprsPP10_list_node 7696
_ZL23process_pipelined_exprsPP10_list_node 7696
_ZL24compute_av_set_at_bb_endP8rtx_insnP10_list_nodei 7941
_ZL17fur_at_first_insnP8rtx_insnP17cmpd_local_paramsPv 8959
_ZL15fur_merge_succsP8rtx_insnS0_iP17cmpd_local_paramsPv 9687
_ZL12fur_on_enterP8rtx_insnP17cmpd_local_paramsPvb 10065
_ZL16propagate_lv_setP11bitmap_headP8rtx_insn 10912
_ZL24compute_av_set_inside_bbP8rtx_insnP10_list_nodeib 11344
_Z12compute_liveP8rtx_insn 13470
_ZL19update_bitmap_cacheP5_exprP8rtx_insnb16MOVEUP_EXPR_CODE 14776
_ZL11moveup_exprP5_exprP8rtx_insnbP16local_trans_type 14854
_ZL24try_transformation_cacheP5_exprP8rtx_insnP16MOVEUP_EXPR_CODE 15255
_ZL23code_motion_path_driverP8rtx_insnP10_list_nodeS2_P17cmpd_local_paramsPv 15454
_ZL25equal_after_moveup_path_pP5_exprP10_list_nodeS0_ 17481
_ZL26sel_target_adjust_priorityP5_expr 17846
_ZL24sel_hard_regno_rename_okii 22486
_ZL19find_expr_for_readyib 27553
_ZL20vinsn_vec_has_expr_p3vecIP9vinsn_def7va_heap6vl_ptrEP5_expr 35692
_ZL23fur_orig_expr_not_foundP8rtx_insnP10_list_nodePv 35798
_ZL20undo_transformationsPP10_list_nodeP8rtx_insn 39971
_ZL15moveup_set_exprPP10_list_nodeP8rtx_insnb 48961
_ZL23is_ineligible_successorP8rtx_insnP10_list_node 67589
_ZL21sel_rank_for_schedulePKvS0_ 120985
_ZL16try_bitmap_cacheP5_exprP8rtx_insnbP16MOVEUP_EXPR_CODE 151826
_ZL18moveup_expr_cachedP5_exprP8rtx_insnb 151880

Generated by: LCOV version 2.1-beta

LCOV profile is generated on x86_64 machine using following configure options: configure --disable-bootstrap --enable-coverage=opt --enable-languages=c,c++,fortran,go,jit,lto,rust,m2 --enable-host-shared. GCC test suite is run with the built compiler.