LCOV - code coverage report
Current view: top level - gcc - lra-constraints.cc (source / functions) Coverage Total Hit
Test: gcc.info Lines: 85.2 % 4036 3438
Test Date: 2026-08-22 16:33:35 Functions: 92.8 % 125 116
Legend: Lines:     hit not hit

Function Name Sort by function name Hit count Sort by function hit count
_Z14lra_init_equivv 1515121
_Z15lra_constraintsb 3298462
_Z15lra_inheritancev 1582013
_Z16lra_finish_equivv 1515121
_Z18lra_constrain_insnP8rtx_insn 3527
_Z20lra_constraints_initv 1515121
_Z20lra_undo_inheritancev 1582013
_Z21lra_constraint_offseti12machine_mode 44847012
_Z22lra_constraints_finishv 1515121
_Z23spill_hard_reg_in_rangei9reg_classP8rtx_insnS1_ 1570
_Z24extract_mem_from_operandP7rtx_def 638959756
_Z24lra_add_dependent_filterii12machine_modeiS_b 0
_Z24lra_get_dependent_filteri12machine_modejS_b 0
_Z24lra_pointer_equiv_set_inP7rtx_def 10199473
_Z25lra_pointer_equiv_set_addP7rtx_def 2027092
_Z27lra_reset_dependent_filtersv 3030242
_Z31lra_init_dependent_filter_cachev 215919
_Z33lra_finish_dependent_filter_cachev 284694
_ZL10in_class_pP7rtx_def9reg_classPS1_b 224239341
_ZL11base_to_regP12address_info 0
_ZL11invariant_pPK7rtx_def 12202397
_ZL12match_reloadaPaS_9reg_classP12HARD_REG_SETPP8rtx_insnS5_b 1782168
_ZL12update_equivi 209083501
_ZL13dead_pseudo_pP7rtx_defP8rtx_insn 2338856
_ZL13get_reg_classi 527120511
_ZL13simple_move_pv 103211419
_ZL13swap_operandsi 21848308
_ZL13virtual_reg_pPK7rtx_def 533621
_ZL14add_to_inheritiP7rtx_def 322720
_ZL14can_add_disp_pP12address_info 19843
_ZL14contains_reg_pP7rtx_defbb 7707509
_ZL14get_hard_regnoP7rtx_def 295830255
_ZL14get_reload_reg7op_type12machine_modeP7rtx_def9reg_classP12HARD_REG_SETbbPKcPS2_ 3949259
_ZL14inherit_in_ebbP8rtx_insnS0_ 12891784
_ZL14invariant_eq_pPKvS0_ 63053
_ZL14invariant_hashPKv 198162
_ZL14postpone_insnsP8rtx_insn 95816
_ZL14reg_in_class_pP7rtx_def9reg_class 25669623
_ZL15emit_spill_movebP7rtx_defS0_ 1353258
_ZL15process_addressibPP8rtx_insnS1_ 180016691
_ZL15reverse_equiv_pi 748559
_ZL15valid_address_p12machine_modeP7rtx_defh 36278755
_ZL15valid_address_pP7rtx_defP12address_info14constraint_num 36255771
_ZL16clear_invariantsv 12891784
_ZL16fix_bb_live_infoP11bitmap_headS0_ 37610876
_ZL16insert_invariantP7rtx_def 196922
_ZL16need_for_split_p12HARD_REG_SETi 246524294
_ZL16operands_match_pP7rtx_defS0_i 59024220
_ZL16process_addr_regPP7rtx_defbPP8rtx_insnS4_9reg_class 35769502
_ZL16reg_has_incdec_pi 361469
_ZL16regno_val_use_injP7rtx_def 568113
_ZL16spilled_pseudo_pP7rtx_def 82864600
_ZL16uses_hard_regs_pP7rtx_def12HARD_REG_SET 410314
_ZL17constraint_uniquePKc 166438718
_ZL17finish_invariantsv 1515121
_ZL17index_part_to_regP12address_info9reg_class 0
_ZL17process_address_1ibPP8rtx_insnS1_ 180505611
_ZL18choose_split_class9reg_classi12machine_mode 1745
_ZL18general_constant_pP7rtx_def 7959086
_ZL18get_try_hard_regnoi 91749
_ZL18inherit_reload_regbi9reg_classP8rtx_insnP7rtx_def 1309283
_ZL18invalid_mode_reg_p12machine_modeP7rtx_def 38
_ZL18lra_copy_reg_equivjjb 668389
_ZL18split_if_necessaryi12machine_mode12HARD_REG_SETbP8rtx_insni 203375921
_ZL19add_next_usage_insniP8rtx_insni 143229085
_ZL19combine_reload_insnP8rtx_insnS0_ 7513706
_ZL19curr_insn_transformb 108694046
_ZL19initiate_invariantsv 1515121
_ZL19print_curr_insn_alti 4590
_ZL20get_dependent_filter14constraint_num12machine_mode 353081828
_ZL20multi_block_pseudo_pi 157437
_ZL20multiple_insn_refs_pi 2969155
_ZL20need_for_call_save_pi 115945428
_ZL20process_alt_operandsi 91892083
_ZL20update_ebb_live_infoP8rtx_insnS0_ 758848
_ZL21base_plus_disp_to_regP12address_infoP7rtx_def 47
_ZL21setup_next_usage_insniP7rtx_defib 251409973
_ZL21undo_optional_reloadsv 1578923
_ZL22check_and_process_movePbS_ 77359777
_ZL22contains_virtual_reg_pP7rtx_def 738529
_ZL22init_curr_operand_modev 108674477
_ZL22insert_move_for_subregPP8rtx_insnS1_P7rtx_defS3_ 461
_ZL22insn_rhs_dead_pseudo_pP8rtx_insn 678526
_ZL22skip_usage_debug_insnsP7rtx_def 1213183
_ZL23contains_deleted_insn_pP13rtx_insn_list 748559
_ZL23delete_move_and_clobberP8rtx_insni 777161
_ZL23get_live_on_other_edgesP15basic_block_defS0_P11bitmap_head 11827558
_ZL23reload_section_anchor_pi 72
_ZL23simplify_operand_subregi12machine_mode 179838223
_ZL24canonicalize_reload_addrP7rtx_def 72
_ZL24contains_reloaded_insn_pi 740341
_ZL24get_last_insertion_pointP15basic_block_def 30632996
_ZL24loc_equivalence_callbackP7rtx_defPKS_Pv 42354915
_ZL24loc_equivalence_change_pPP7rtx_def 3348
_ZL25process_dependent_filtersv 81266859
_ZL25skip_constraint_modifiersPKc 524875661
_ZL26equiv_address_substitutionP12address_info 40188827
_ZL26get_equiv_with_eliminationP7rtx_defP8rtx_insn 251396335
_ZL26narrow_reload_pseudo_classP7rtx_def9reg_class 3564336
_ZL26reg_class_from_constraintsPKc 0
_ZL26remove_inheritance_pseudosP11bitmap_head 1578923
_ZL27init_insn_rhs_dead_pseudo_pi 747078
_ZL28init_curr_insn_input_reloadsv 108674477
_ZL29check_conflict_input_operandsiPa 2
_ZL29satisfies_memory_constraint_pP7rtx_def14constraint_num 37565590
_ZL30enough_allocatable_hard_regs_p9reg_class12machine_mode 19113131
_ZL30get_matching_reload_reg_subreg12machine_modeP7rtx_def9reg_class 112576
_ZL30satisfies_address_constraint_pP12address_info14constraint_num 3623052
_ZL30satisfies_address_constraint_pP7rtx_def14constraint_num 1780826
_ZL31check_secondary_memory_needed_p9reg_classP7rtx_def 1213190
_ZL31prohibited_class_reg_set_mode_p9reg_classR12HARD_REG_SET12machine_mode 3930419
_ZL33process_invariant_for_inheritanceP7rtx_defS0_ 196922
_ZL35update_and_check_small_class_inputsii9reg_class 403756563
_ZL8emit_inc9reg_classP7rtx_def8poly_intILj1ElE 0
_ZL8in_mem_pi 65234840
_ZL9get_equivP7rtx_def 447163674
_ZL9get_regnoP7rtx_def 68923557
_ZL9in_list_pP7rtx_defS0_ 1409102
_ZL9split_regbiP8rtx_insnP7rtx_defS0_ 670090
_ZN12_GLOBAL__N_118address_eliminatorC2EP12address_info 76401109
_ZN12_GLOBAL__N_118address_eliminatorD2Ev 76401109
_ZN29dependent_filter_cache_hasher4hashEPK22dependent_filter_entry 0
_ZN29dependent_filter_cache_hasher5equalEPK22dependent_filter_entryS2_ 0
_ZNK26lra_autoinc_reload_context14get_reload_regEv 0
_ZZL23simplify_operand_subregi12machine_modeENKUlS_8poly_intILj1EmES_E_clES_S1_S_ 3796095

Generated by: LCOV version 2.4-beta

LCOV profile is generated on x86_64 machine using following configure options: configure --disable-bootstrap --enable-coverage=opt --enable-languages=c,c++,fortran,go,jit,lto,rust,m2 --enable-host-shared. GCC test suite is run with the built compiler.