LCOV - code coverage report
Current view: top level - gcc - reload1.cc (source / functions) Coverage Total Hit
Test: gcc.info Lines: 0.6 % 3625 22
Test Date: 2024-04-27 14:03:13 Functions: 3.3 % 91 3
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: - 0 0

Function Name Sort by function name Hit count Sort by function hit count
_Z11init_reloadv 0
_Z14eliminate_regsP7rtx_def12machine_modeS0_ 0
_Z14mark_home_livei 0
_Z14new_insn_chainv 0
_Z21deallocate_reload_regi 0
_Z24elimination_target_reg_pP7rtx_def 0
_Z30calculate_elim_costs_all_insnsv 0
_Z6reloadP8rtx_insni 0
_ZL10gen_reloadP7rtx_defS0_i11reload_type 0
_ZL10substitutePP7rtx_defPKS_S0_ 0
_ZL12copy_reloadsP10insn_chain 0
_ZL12count_pseudoi 0
_ZL13failed_reloadP8rtx_insni 0
_ZL13finish_spillsi 0
_ZL13spill_failureP8rtx_insn9reg_class 0
_ZL14free_reg_equivv 0
_ZL14inc_for_reloadP7rtx_defS0_S0_8poly_intILj1ElE 0
_ZL14set_reload_regii 0
_ZL14spill_hard_regji 0
_ZL15do_input_reloadP10insn_chainP6reloadi 0
_ZL15init_elim_tablev 0
_ZL15replaced_subregP7rtx_def 0
_ZL16delete_dead_insnP8rtx_insn 0
_ZL16do_output_reloadP10insn_chainP6reloadi 0
_ZL16eliminate_regs_1P7rtx_def12machine_modeS0_bb 0
_ZL16find_reload_regsP10insn_chain 0
_ZL16free_for_value_pi12machine_modei11reload_typeP7rtx_defS2_ii 0
_ZL16mark_home_live_1i12machine_mode 0
_ZL16reload_as_neededi 0
_ZL16reloads_conflictii 0
_ZL17emit_reload_insnsP10insn_chain 0
_ZL17reload_reg_free_pji11reload_type 0
_ZL17remove_init_insnsv 0
_ZL17set_label_offsetsP7rtx_defP8rtx_insni 0
_ZL18choose_reload_regsP10insn_chain 0
_ZL18replace_pseudos_inPP7rtx_def12machine_modeS0_ 0
_ZL18select_reload_regsv 0
_ZL18update_eliminablesP12HARD_REG_SET 0
_ZL19allocate_reload_regP10insn_chainii 0
_ZL19elimination_effectsP7rtx_def12machine_mode 0
_ZL19inherit_piecemeal_pii12machine_mode 0
_ZL19mark_not_eliminableP7rtx_defPKS_Pv 0
_ZL20count_spilled_pseudoiii 0
_ZL20delete_output_reloadP8rtx_insniiP7rtx_def 0
_ZL20fixup_eh_region_noteP8rtx_insnS0_S0_ 0
_ZL20forget_old_reloads_1P7rtx_defPKS_Pv 0
_ZL20maybe_fix_stack_asmsv 0
_ZL20note_reg_elim_costlyPK7rtx_defPS_ 0
_ZL21forget_marked_reloadsP11bitmap_head 0
_ZL21order_regs_for_reloadP10insn_chain 0
_ZL21set_offsets_for_labelP8rtx_insn 0
_ZL22delete_address_reloadsP8rtx_insnS0_ 0
_ZL22eliminate_regs_in_insnP8rtx_insni 0
_ZL22mark_reload_reg_in_useji11reload_type12machine_mode 0
_ZL22reload_reg_class_lowerPKvS0_ 0
_ZL22reloads_unique_chain_pii 0
_ZL23choose_reload_regs_initP10insn_chainPP7rtx_def 0
_ZL23clear_reload_reg_in_useji11reload_type12machine_mode 0
_ZL23conflicts_with_overrideP7rtx_def 0
_ZL23emit_input_reload_insnsP10insn_chainP6reloadP7rtx_defi 0
_ZL23will_delete_init_insn_pP8rtx_insn 0
_ZL24delete_address_reloads_1P8rtx_insnP7rtx_defS0_ 0
_ZL24delete_caller_save_insnsv 0
_ZL24emit_output_reload_insnsP10insn_chainP6reloadi 0
_ZL24reload_reg_reaches_end_pji 0
_ZL24scan_paradoxical_subregsP7rtx_def 0
_ZL24set_initial_elim_offsetsv 0
_ZL24strip_paradoxical_subregPP7rtx_defS1_ 0
_ZL25calculate_needs_all_insnsi 0
_ZL25elimination_costs_in_insnP8rtx_insn 0
_ZL25set_initial_label_offsetsv 0
_ZL25update_eliminable_offsetsv 0
_ZL26init_eliminable_invariantsP8rtx_insnb 0
_ZL26reload_adjust_reg_for_tempPP7rtx_defS0_9reg_class12machine_mode 0
_ZL27has_nonexceptional_receiverv 0
_ZL27reload_adjust_reg_for_icodePP7rtx_defS0_9insn_code 0
_ZL27reload_reg_free_for_value_piii11reload_typeP7rtx_defS1_ii 0
_ZL27set_initial_eh_label_offsetP7rtx_def 0
_ZL27verify_initial_elim_offsetsv 0
_ZL28check_eliminable_occurrencesP7rtx_def 0
_ZL28compute_reload_subreg_offset12machine_modeP7rtx_defS_ 0
_ZL28reload_reg_rtx_reaches_end_pP7rtx_defi 0
_ZL28update_eliminables_and_spillv 0
_ZL29emit_insn_if_valid_for_reloadP7rtx_def 0
_ZL31emit_insn_if_valid_for_reload_1P7rtx_def 0
_ZL37gen_reload_chain_without_interm_reg_pii 0
_ZL8find_regP10insn_chaini 0
_ZL9alter_regiib 0
_Z15grow_reg_equivsv 2677459
_Z22compute_use_by_pseudosP12HARD_REG_SETP11bitmap_head 4746058
_Z20function_invariant_pPK7rtx_def 20116410

Generated by: LCOV version 2.1-beta

LCOV profile is generated on x86_64 machine using following configure options: configure --disable-bootstrap --enable-coverage=opt --enable-languages=c,c++,fortran,go,jit,lto,rust,m2 --enable-host-shared. GCC test suite is run with the built compiler.