24#ifndef GCC_ADDRESSES_H
25#define GCC_ADDRESSES_H
32 return (
enum reg_class)
targetm.base_reg_class (mode, as, outer_code,
33 index_code, mem, insn);
39#ifdef INSN_INDEX_REG_CLASS
40 return INSN_INDEX_REG_CLASS (insn);
42 return INDEX_REG_CLASS;
53 machine_mode mode ATTRIBUTE_UNUSED,
55 enum rtx_code outer_code ATTRIBUTE_UNUSED,
56 enum rtx_code index_code ATTRIBUTE_UNUSED,
59#ifdef REGNO_OK_FOR_INSN_BASE_P
60 return REGNO_OK_FOR_INSN_BASE_P (regno, insn);
62#ifdef REGNO_MODE_CODE_OK_FOR_BASE_P
63 return REGNO_MODE_CODE_OK_FOR_BASE_P (regno,
MACRO_MODE (mode), as,
64 outer_code, index_code);
66#ifdef REGNO_MODE_OK_FOR_REG_BASE_P
67 if (index_code == REG)
68 return REGNO_MODE_OK_FOR_REG_BASE_P (regno,
MACRO_MODE (mode));
70#ifdef REGNO_MODE_OK_FOR_BASE_P
71 return REGNO_MODE_OK_FOR_BASE_P (regno,
MACRO_MODE (mode));
73 return REGNO_OK_FOR_BASE_P (regno);
87 if (regno >= FIRST_PSEUDO_REGISTER &&
reg_renumber[regno] >= 0)
bool ok_for_base_p_1(unsigned regno, machine_mode mode, addr_space_t as, enum rtx_code outer_code, enum rtx_code index_code, rtx_insn *insn=NULL)
Definition addresses.h:52
enum reg_class index_reg_class(rtx_insn *insn=NULL)
Definition addresses.h:37
bool regno_ok_for_base_p(unsigned regno, machine_mode mode, addr_space_t as, enum rtx_code outer_code, enum rtx_code index_code, rtx_insn *insn=NULL)
Definition addresses.h:83
enum reg_class base_reg_class(machine_mode mode, addr_space_t as, enum rtx_code outer_code, enum rtx_code index_code, rtx mem=NULL_RTX, rtx_insn *insn=NULL)
Definition addresses.h:28
struct rtx_def * rtx
Definition coretypes.h:57
unsigned char addr_space_t
Definition coretypes.h:191
short * reg_renumber
Definition ira.cc:2555
#define MACRO_MODE(MODE)
Definition machmode.h:885
#define NULL_RTX
Definition rtl.h:709
rtx_code
Definition rtl.h:48
#define NULL
Definition system.h:58
struct gcc_target targetm