GCC Middle and Back End API Reference
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Data Structures | |
class | rtx_obj_reference |
class | rtx_properties |
class | growing_rtx_properties< Base > |
class | vec_rtx_properties_base |
Namespaces | |
namespace | rtx_obj_flags |
Typedefs | |
using | vec_rtx_properties = growing_rtx_properties<vec_rtx_properties_base> |
Functions | |
bool | vec_series_highpart_p (machine_mode result_mode, machine_mode op_mode, rtx sel) |
bool | vec_series_lowpart_p (machine_mode result_mode, machine_mode op_mode, rtx sel) |
bool | contains_paradoxical_subreg_p (rtx x) |
Variables | |
const unsigned int | MEM_REGNO = ~0U |
const uint16_t | rtx_obj_flags::IS_READ = 1U << 0 |
const uint16_t | rtx_obj_flags::IS_WRITE = 1U << 1 |
const uint16_t | rtx_obj_flags::IS_CLOBBER = 1U << 2 |
const uint16_t | rtx_obj_flags::IS_PRE_POST_MODIFY = 1U << 3 |
const uint16_t | rtx_obj_flags::IS_MULTIREG = 1U << 4 |
const uint16_t | rtx_obj_flags::IN_MEM_LOAD = 1U << 5 |
const uint16_t | rtx_obj_flags::IN_MEM_STORE = 1U << 6 |
const uint16_t | rtx_obj_flags::IN_SUBREG = 1U << 7 |
const uint16_t | rtx_obj_flags::IN_NOTE = 1U << 8 |
static const uint16_t | rtx_obj_flags::STICKY_FLAGS = IN_NOTE |
A rtx_properties that stores its references in a temporary array. Like auto_vec, the array is initially on the stack, but can switch to the heap if necessary. The reason for implementing this as a derived class is that the default on-stack size should be enough for the vast majority of expressions and instructions. It's therefore not worth paying the cost of conditionally calling grow code at every site that records a new reference. Instead, the rtx_properties code can use trivial iterator updates for the common case, and in the rare case that the vector needs to be resized, we can pay the cost of collecting the references a second time.
Return true if X contains a paradoxical subreg.
References FOR_EACH_SUBRTX_VAR, paradoxical_subreg_p(), and SUBREG_P.
Referenced by forward_propagate_and_simplify(), try_fwprop_subst_pattern(), and try_replace_reg().
Return true if, for all OP of mode OP_MODE: (vec_select:RESULT_MODE OP SEL) is equivalent to the highpart RESULT_MODE of OP.
References GET_MODE_NUNITS(), offset, rtvec_series_p(), targetm, XVEC, and XVECLEN.
Referenced by simplify_context::simplify_binary_operation_1().
Return true if, for all OP of mode OP_MODE: (vec_select:RESULT_MODE OP SEL) is equivalent to the lowpart RESULT_MODE of OP.
References GET_MODE_NUNITS(), offset, rtvec_series_p(), targetm, XVEC, and XVECLEN.
Referenced by combine_simplify_rtx(), fold_rtx(), and simplify_context::simplify_binary_operation_1().
const unsigned int MEM_REGNO = ~0U |
Analyze RTL for GNU compiler. Copyright (C) 2020-2024 Free Software Foundation, Inc. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>.
Note that for historical reasons, many rtlanal.cc functions are declared in rtl.h rather than here.
A dummy register value that represents the whole of variable memory. Using ~0U means that arrays that track both registers and memory can be indexed by regno + 1.
Referenced by rtx_obj_reference::is_mem(), rtx_obj_reference::is_reg(), rtx_properties::try_to_add_dest(), rtx_properties::try_to_add_insn(), and rtx_properties::try_to_add_src().