GCC Middle and Back End API Reference
ira-int.h
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1/* Integrated Register Allocator (IRA) intercommunication header file.
2 Copyright (C) 2006-2024 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21#ifndef GCC_IRA_INT_H
22#define GCC_IRA_INT_H
23
24#include "recog.h"
25#include "function-abi.h"
26
27/* To provide consistency in naming, all IRA external variables,
28 functions, common typedefs start with prefix ira_. */
29
30#if CHECKING_P
31#define ENABLE_IRA_CHECKING
32#endif
33
34#ifdef ENABLE_IRA_CHECKING
35#define ira_assert(c) gcc_assert (c)
36#else
37/* Always define and include C, so that warnings for empty body in an
38 'if' statement and unused variable do not occur. */
39#define ira_assert(c) ((void)(0 && (c)))
40#endif
41
42/* Compute register frequency from edge frequency FREQ. It is
43 analogous to REG_FREQ_FROM_BB. When optimizing for size, or
44 profile driven feedback is available and the function is never
45 executed, frequency is always equivalent. Otherwise rescale the
46 edge frequency. */
47#define REG_FREQ_FROM_EDGE_FREQ(freq) \
48 (optimize_function_for_size_p (cfun) \
49 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \
50 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1)
51
52/* A modified value of flag `-fira-verbose' used internally. */
54
55/* Dump file of the allocator if it is not NULL. */
56extern FILE *ira_dump_file;
57
58/* Typedefs for pointers to allocno live range, allocno, and copy of
59 allocnos. */
60typedef struct live_range *live_range_t;
61typedef struct ira_allocno *ira_allocno_t;
64typedef struct ira_object *ira_object_t;
65
66/* Definition of vector of allocnos and copies. */
67
68/* Typedef for pointer to the subsequent structure. */
70
71typedef unsigned short move_table[N_REG_CLASSES];
72
73/* In general case, IRA is a regional allocator. The regions are
74 nested and form a tree. Currently regions are natural loops. The
75 following structure describes loop tree node (representing basic
76 block or loop). We need such tree because the loop tree from
77 cfgloop.h is not convenient for the optimization: basic blocks are
78 not a part of the tree from cfgloop.h. We also use the nodes for
79 storing additional information about basic blocks/loops for the
80 register allocation purposes. */
82{
83 /* The node represents basic block if children == NULL. */
84 basic_block bb; /* NULL for loop. */
85 /* NULL for BB or for loop tree root if we did not build CFG loop tree. */
86 class loop *loop;
87 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent.
88 SUBLOOP_NEXT is always NULL for BBs. */
90 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside
91 the node. They are NULL for BBs. */
93 /* The node immediately containing given node. */
95
96 /* Loop level in range [0, ira_loop_tree_height). */
97 int level;
98
99 /* All the following members are defined only for nodes representing
100 loops. */
101
102 /* The loop number from CFG loop tree. The root number is 0. */
104
105 /* True if the loop was marked for removal from the register
106 allocation. */
108
109 /* Allocnos in the loop corresponding to their regnos. If it is
110 NULL the loop does not form a separate register allocation region
111 (e.g. because it has abnormal enter/exit edges and we cannot put
112 code for register shuffling on the edges if a different
113 allocation is used for a pseudo-register on different sides of
114 the edges). Caps are not in the map (remember we can have more
115 one cap with the same regno in a region). */
117
118 /* True if there is an entry to given loop not from its parent (or
119 grandparent) basic block. For example, it is possible for two
120 adjacent loops inside another loop. */
122
123 /* Maximal register pressure inside loop for given register class
124 (defined only for the pressure classes). */
126
127 /* Numbers of allocnos referred or living in the loop node (except
128 for its subloops). */
130
131 /* Numbers of allocnos living at the loop borders. */
133
134 /* Regnos of pseudos modified in the loop node (including its
135 subloops). */
137
138 /* Numbers of copies referred in the corresponding loop. */
140};
141
142/* The root of the loop tree corresponding to the all function. */
144
145/* Height of the loop tree. */
146extern int ira_loop_tree_height;
147
148/* All nodes representing basic blocks are referred through the
149 following array. We cannot use basic block member `aux' for this
150 because it is used for insertion of insns on edges. */
152
153/* Two access macros to the nodes representing basic blocks. */
154#if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
155#define IRA_BB_NODE_BY_INDEX(index) __extension__ \
156(({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \
157 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\
158 { \
159 fprintf (stderr, \
160 "\n%s: %d: error in %s: it is not a block node\n", \
161 __FILE__, __LINE__, __FUNCTION__); \
162 gcc_unreachable (); \
163 } \
164 _node; }))
165#else
166#define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index])
167#endif
168
169#define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index)
170
171/* All nodes representing loops are referred through the following
172 array. */
174
175/* Two access macros to the nodes representing loops. */
176#if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
177#define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \
178(({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \
179 if (_node->children == NULL || _node->bb != NULL \
180 || (_node->loop == NULL && current_loops != NULL)) \
181 { \
182 fprintf (stderr, \
183 "\n%s: %d: error in %s: it is not a loop node\n", \
184 __FILE__, __LINE__, __FUNCTION__); \
185 gcc_unreachable (); \
186 } \
187 _node; }))
188#else
189#define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index])
190#endif
191
192#define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num)
193
194
195/* The structure describes program points where a given allocno lives.
196 If the live ranges of two allocnos are intersected, the allocnos
197 are in conflict. */
199{
200 /* Object whose live range is described by given structure. */
202 /* Program point range. */
204 /* Next structure describing program points where the allocno
205 lives. */
207 /* Pointer to structures with the same start/finish. */
209};
210
211/* Program points are enumerated by numbers from range
212 0..IRA_MAX_POINT-1. There are approximately two times more program
213 points than insns. Program points are places in the program where
214 liveness info can be changed. In most general case (there are more
215 complicated cases too) some program points correspond to places
216 where input operand dies and other ones correspond to places where
217 output operands are born. */
218extern int ira_max_point;
219
220/* Arrays of size IRA_MAX_POINT mapping a program point to the allocno
221 live ranges with given start/finish point. */
223
224/* A structure representing conflict information for an allocno
225 (or one of its subwords). */
227{
228 /* The allocno associated with this record. */
230 /* Vector of accumulated conflicting conflict_redords with NULL end
231 marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector
232 otherwise. */
234 /* Pointer to structures describing at what program point the
235 object lives. We always maintain the list in such way that *the
236 ranges in the list are not intersected and ordered by decreasing
237 their program points*. */
239 /* The subword within ALLOCNO which is represented by this object.
240 Zero means the lowest-order subword (or the entire allocno in case
241 it is not being tracked in subwords). */
243 /* Allocated size of the conflicts array. */
245 /* A unique number for every instance of this structure, which is used
246 to represent it in conflict bit vectors. */
247 int id;
248 /* Before building conflicts, MIN and MAX are initialized to
249 correspondingly minimal and maximal points of the accumulated
250 live ranges. Afterwards, they hold the minimal and maximal ids
251 of other ira_objects that this one can conflict with. */
252 int min, max;
253 /* Initial and accumulated hard registers conflicting with this
254 object and as a consequences cannot be assigned to the allocno.
255 All non-allocatable hard regs and hard regs of register classes
256 different from given allocno one are included in the sets. */
258 /* Number of accumulated conflicts in the vector of conflicting
259 objects. */
261 /* TRUE if conflicts are represented by a vector of pointers to
262 ira_object structures. Otherwise, we use a bit vector indexed
263 by conflict ID numbers. */
264 unsigned int conflict_vec_p : 1;
265};
266
267/* A structure representing an allocno (allocation entity). Allocno
268 represents a pseudo-register in an allocation region. If
269 pseudo-register does not live in a region but it lives in the
270 nested regions, it is represented in the region by special allocno
271 called *cap*. There may be more one cap representing the same
272 pseudo-register in region. It means that the corresponding
273 pseudo-register lives in more one non-intersected subregion. */
275{
276 /* The allocno order number starting with 0. Each allocno has an
277 unique number and the number is never changed for the
278 allocno. */
279 int num;
280 /* Regno for allocno or cap. */
281 int regno;
282 /* Mode of the allocno which is the mode of the corresponding
283 pseudo-register. */
285 /* Widest mode of the allocno which in at least one case could be
286 for paradoxical subregs where wmode > mode. */
288 /* Register class which should be used for allocation for given
289 allocno. NO_REGS means that we should use memory. */
291 /* Hard register assigned to given allocno. Negative value means
292 that memory was allocated to the allocno. During the reload,
293 spilled allocno has value equal to the corresponding stack slot
294 number (0, ...) - 2. Value -1 is used for allocnos spilled by the
295 reload (at this point pseudo-register has only one allocno) which
296 did not get stack slot yet. */
297 signed int hard_regno : 16;
298 /* A bitmask of the ABIs used by calls that occur while the allocno
299 is live. */
301 /* During the reload, value TRUE means that we should not reassign a
302 hard register to the allocno got memory earlier. It is set up
303 when we removed memory-memory move insn before each iteration of
304 the reload. */
305 unsigned int dont_reassign_p : 1;
306#ifdef STACK_REGS
307 /* Set to TRUE if allocno can't be assigned to the stack hard
308 register correspondingly in this region and area including the
309 region and all its subregions recursively. */
310 unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1;
311#endif
312 /* TRUE value means that there is no sense to spill the allocno
313 during coloring because the spill will result in additional
314 reloads in reload pass. */
315 unsigned int bad_spill_p : 1;
316 /* TRUE if a hard register or memory has been assigned to the
317 allocno. */
318 unsigned int assigned_p : 1;
319 /* TRUE if conflicts for given allocno are represented by vector of
320 pointers to the conflicting allocnos. Otherwise, we use a bit
321 vector where a bit with given index represents allocno with the
322 same number. */
323 unsigned int conflict_vec_p : 1;
324 /* True if the parent loop has an allocno for the same register and
325 if the parent allocno's assignment might not be valid in this loop.
326 This means that we cannot merge this allocno and the parent allocno
327 together.
328
329 This is only ever true for non-cap allocnos. */
331#ifndef NUM_REGISTER_FILTERS
332#error "insn-config.h not included"
333#elif NUM_REGISTER_FILTERS
334 /* The set of register filters applied to the allocno by operand
335 alternatives that accept class ACLASS. */
337#endif
338 /* Accumulated usage references of the allocno. Here and below,
339 word 'accumulated' means info for given region and all nested
340 subregions. In this case, 'accumulated' means sum of references
341 of the corresponding pseudo-register in this region and in all
342 nested subregions recursively. */
343 int nrefs;
344 /* Accumulated frequency of usage of the allocno. */
345 int freq;
346 /* Minimal accumulated and updated costs of usage register of the
347 allocno class. */
349 /* Minimal accumulated, and updated costs of memory for the allocno.
350 At the allocation start, the original and updated costs are
351 equal. The updated cost may be changed after finishing
352 allocation in a region and starting allocation in a subregion.
353 The change reflects the cost of spill/restore code on the
354 subregion border if we assign memory to the pseudo in the
355 subregion. */
357 /* Accumulated number of points where the allocno lives and there is
358 excess pressure for its class. Excess pressure for a register
359 class at some point means that there are more allocnos of given
360 register class living at the point than number of hard-registers
361 of the class available for the allocation. */
363 /* The number of objects tracked in the following array. */
365 /* Accumulated frequency of calls which given allocno
366 intersects. */
368 /* Accumulated number of the intersected calls. */
370 /* The number of calls across which it is live, but which should not
371 affect register preferences. */
373 /* Allocnos with the same regno are linked by the following member.
374 Allocnos corresponding to inner loops are first in the list (it
375 corresponds to depth-first traverse of the loops). */
377 /* There may be different allocnos with the same regno in different
378 regions. Allocnos are bound to the corresponding loop tree node.
379 Pseudo-register may have only one regular allocno with given loop
380 tree node but more than one cap (see comments above). */
382 /* Allocno hard reg preferences. */
384 /* Copies to other non-conflicting allocnos. The copies can
385 represent move insn or potential move insn usually because of two
386 operand insn constraints. */
388 /* It is a allocno (cap) representing given allocno on upper loop tree
389 level. */
391 /* It is a link to allocno (cap) on lower loop level represented by
392 given cap. Null if given allocno is not a cap. */
394 /* An array of structures describing conflict information and live
395 ranges for each object associated with the allocno. There may be
396 more than one such object in cases where the allocno represents a
397 multi-word register. */
399 /* Registers clobbered by intersected calls. */
401 /* Array of usage costs (accumulated and the one updated during
402 coloring) for each hard register of the allocno class. The
403 member value can be NULL if all costs are the same and equal to
404 CLASS_COST. For example, the costs of two different hard
405 registers can be different if one hard register is callee-saved
406 and another one is callee-used and the allocno lives through
407 calls. Another example can be case when for some insn the
408 corresponding pseudo-register value should be put in specific
409 register class (e.g. AREG for x86) which is a strict subset of
410 the allocno class (GENERAL_REGS for x86). We have updated costs
411 to reflect the situation when the usage cost of a hard register
412 is decreased because the allocno is connected to another allocno
413 by a copy and the another allocno has been assigned to the hard
414 register. */
416 /* Array of decreasing costs (accumulated and the one updated during
417 coloring) for allocnos conflicting with given allocno for hard
418 regno of the allocno class. The member value can be NULL if all
419 costs are the same. These costs are used to reflect preferences
420 of other allocnos not assigned yet during assigning to given
421 allocno. */
423 /* Different additional data. It is used to decrease size of
424 allocno data footprint. */
425 void *add_data;
426};
427
428
429/* All members of the allocno structures should be accessed only
430 through the following macros. */
431#define ALLOCNO_NUM(A) ((A)->num)
432#define ALLOCNO_REGNO(A) ((A)->regno)
433#define ALLOCNO_REG(A) ((A)->reg)
434#define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno)
435#define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node)
436#define ALLOCNO_CAP(A) ((A)->cap)
437#define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member)
438#define ALLOCNO_NREFS(A) ((A)->nrefs)
439#define ALLOCNO_FREQ(A) ((A)->freq)
440#define ALLOCNO_MIGHT_CONFLICT_WITH_PARENT_P(A) \
441 ((A)->might_conflict_with_parent_p)
442#if NUM_REGISTER_FILTERS
443#define ALLOCNO_REGISTER_FILTERS(A) (A)->register_filters
444#define ALLOCNO_SET_REGISTER_FILTERS(A, X) ((A)->register_filters = (X))
445#else
446#define ALLOCNO_REGISTER_FILTERS(A) 0
447#define ALLOCNO_SET_REGISTER_FILTERS(A, X) ((void) (A), gcc_assert ((X) == 0))
448#endif
449#define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno)
450#define ALLOCNO_CALL_FREQ(A) ((A)->call_freq)
451#define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num)
452#define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num)
453#define ALLOCNO_CROSSED_CALLS_ABIS(A) ((A)->crossed_calls_abis)
454#define ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS(A) \
455 ((A)->crossed_calls_clobbered_regs)
456#define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest)
457#define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p)
458#define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p)
459#define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p)
460#define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p)
461#ifdef STACK_REGS
462#define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p)
463#define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p)
464#endif
465#define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p)
466#define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p)
467#define ALLOCNO_MODE(A) ((A)->mode)
468#define ALLOCNO_WMODE(A) ((A)->wmode)
469#define ALLOCNO_PREFS(A) ((A)->allocno_prefs)
470#define ALLOCNO_COPIES(A) ((A)->allocno_copies)
471#define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs)
472#define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs)
473#define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \
474 ((A)->conflict_hard_reg_costs)
475#define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \
476 ((A)->updated_conflict_hard_reg_costs)
477#define ALLOCNO_CLASS(A) ((A)->aclass)
478#define ALLOCNO_CLASS_COST(A) ((A)->class_cost)
479#define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost)
480#define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost)
481#define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost)
482#define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \
483 ((A)->excess_pressure_points_num)
484#define ALLOCNO_OBJECT(A,N) ((A)->objects[N])
485#define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects)
486#define ALLOCNO_ADD_DATA(A) ((A)->add_data)
487
488/* Typedef for pointer to the subsequent structure. */
490
491/* Allocno bound data used for emit pseudo live range split insns and
492 to flattening IR. */
494{
495 /* TRUE if the allocno assigned to memory was a destination of
496 removed move (see ira-emit.cc) at loop exit because the value of
497 the corresponding pseudo-register is not changed inside the
498 loop. */
499 unsigned int mem_optimized_dest_p : 1;
500 /* TRUE if the corresponding pseudo-register has disjoint live
501 ranges and the other allocnos of the pseudo-register except this
502 one changed REG. */
503 unsigned int somewhere_renamed_p : 1;
504 /* TRUE if allocno with the same REGNO in a subregion has been
505 renamed, in other words, got a new pseudo-register. */
506 unsigned int child_renamed_p : 1;
507 /* Final rtx representation of the allocno. */
509 /* Non NULL if we remove restoring value from given allocno to
510 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.cc) because the
511 allocno value is not changed inside the loop. */
513};
514
515#define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a))
516
517/* Data used to emit live range split insns and to flattening IR. */
519
520/* Abbreviation for frequent emit data access. */
521inline rtx
523{
524 return ALLOCNO_EMIT_DATA (a)->reg;
525}
526
527#define OBJECT_ALLOCNO(O) ((O)->allocno)
528#define OBJECT_SUBWORD(O) ((O)->subword)
529#define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array)
530#define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array)
531#define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array)
532#define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size)
533#define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p)
534#define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts)
535#define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs)
536#define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs)
537#define OBJECT_MIN(O) ((O)->min)
538#define OBJECT_MAX(O) ((O)->max)
539#define OBJECT_CONFLICT_ID(O) ((O)->id)
540#define OBJECT_LIVE_RANGES(O) ((O)->live_ranges)
541
542/* Map regno -> allocnos with given regno (see comments for
543 allocno member `next_regno_allocno'). */
545
546/* Array of references to all allocnos. The order number of the
547 allocno corresponds to the index in the array. Removed allocnos
548 have NULL element value. */
550
551/* The size of the previous array. */
552extern int ira_allocnos_num;
553
554/* Map a conflict id to its corresponding ira_object structure. */
556
557/* The size of the previous array. */
558extern int ira_objects_num;
559
560/* The following structure represents a hard register preference of
561 allocno. The preference represent move insns or potential move
562 insns usually because of two operand insn constraints. One move
563 operand is a hard register. */
565{
566 /* The unique order number of the preference node starting with 0. */
567 int num;
568 /* Preferred hard register. */
570 /* Accumulated execution frequency of insns from which the
571 preference created. */
572 int freq;
573 /* Given allocno. */
575 /* All preferences with the same allocno are linked by the following
576 member. */
578};
579
580/* Array of references to all allocno preferences. The order number
581 of the preference corresponds to the index in the array. */
582extern ira_pref_t *ira_prefs;
583
584/* Size of the previous array. */
585extern int ira_prefs_num;
586
587/* The following structure represents a copy of two allocnos. The
588 copies represent move insns or potential move insns usually because
589 of two operand insn constraints. To remove register shuffle, we
590 also create copies between allocno which is output of an insn and
591 allocno becoming dead in the insn. */
593{
594 /* The unique order number of the copy node starting with 0. */
595 int num;
596 /* Allocnos connected by the copy. The first allocno should have
597 smaller order number than the second one. */
599 /* Execution frequency of the copy. */
600 int freq;
602 /* It is a move insn which is an origin of the copy. The member
603 value for the copy representing two operand insn constraints or
604 for the copy created to remove register shuffle is NULL. In last
605 case the copy frequency is smaller than the corresponding insn
606 execution frequency. */
608 /* All copies with the same allocno as FIRST are linked by the two
609 following members. */
611 /* All copies with the same allocno as SECOND are linked by the two
612 following members. */
614 /* Region from which given copy is originated. */
616};
617
618/* Array of references to all copies. The order number of the copy
619 corresponds to the index in the array. Removed copies have NULL
620 element value. */
621extern ira_copy_t *ira_copies;
622
623/* Size of the previous array. */
624extern int ira_copies_num;
625
626/* The following structure describes a stack slot used for spilled
627 pseudo-registers. */
629{
630public:
631 /* pseudo-registers assigned to the stack slot. */
633 /* RTL representation of the stack slot. */
635 /* Size of the stack slot. */
637};
638
639/* The number of elements in the following array. */
641
642/* The following array contains info about spilled pseudo-registers
643 stack slots used in current function so far. */
645
646/* Correspondingly overall cost of the allocation, cost of the
647 allocnos assigned to hard-registers, cost of the allocnos assigned
648 to memory, cost of loads, stores and register move insns generated
649 for pseudo-register live range splitting (see ira-emit.cc). */
654
655
656/* This page contains a bitset implementation called 'min/max sets' used to
657 record conflicts in IRA.
658 They are named min/maxs set since we keep track of a minimum and a maximum
659 bit number for each set representing the bounds of valid elements. Otherwise,
660 the implementation resembles sbitmaps in that we store an array of integers
661 whose bits directly represent the members of the set. */
662
663/* The type used as elements in the array, and the number of bits in
664 this type. */
665
666#define IRA_INT_BITS HOST_BITS_PER_WIDE_INT
667#define IRA_INT_TYPE HOST_WIDE_INT
668
669/* Set, clear or test bit number I in R, a bit vector of elements with
670 minimal index and maximal index equal correspondingly to MIN and
671 MAX. */
672#if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007)
673
674#define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
675 (({ int _min = (MIN), _max = (MAX), _i = (I); \
676 if (_i < _min || _i > _max) \
677 { \
678 fprintf (stderr, \
679 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
680 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
681 gcc_unreachable (); \
682 } \
683 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
684 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
685
686
687#define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
688 (({ int _min = (MIN), _max = (MAX), _i = (I); \
689 if (_i < _min || _i > _max) \
690 { \
691 fprintf (stderr, \
692 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
693 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
694 gcc_unreachable (); \
695 } \
696 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
697 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
698
699#define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \
700 (({ int _min = (MIN), _max = (MAX), _i = (I); \
701 if (_i < _min || _i > _max) \
702 { \
703 fprintf (stderr, \
704 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \
705 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \
706 gcc_unreachable (); \
707 } \
708 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \
709 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); }))
710
711#else
712
713#define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \
714 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
715 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
716
717#define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \
718 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
719 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
720
721#define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \
722 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \
723 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS)))
724
725#endif
726
727/* The iterator for min/max sets. */
729
730 /* Array containing the bit vector. */
732
733 /* The number of the current element in the vector. */
734 unsigned int word_num;
735
736 /* The number of bits in the bit vector. */
737 unsigned int nel;
738
739 /* The current bit index of the bit vector. */
740 unsigned int bit_num;
741
742 /* Index corresponding to the 1st bit of the bit vector. */
744
745 /* The word of the bit vector currently visited. */
747};
748
749/* Initialize the iterator I for bit vector VEC containing minimal and
750 maximal values MIN and MAX. */
751inline void
753 int max)
754{
755 i->vec = vec;
756 i->word_num = 0;
757 i->nel = max < min ? 0 : max - min + 1;
758 i->start_val = min;
759 i->bit_num = 0;
760 i->word = i->nel == 0 ? 0 : vec[0];
761}
762
763/* Return TRUE if we have more allocnos to visit, in which case *N is
764 set to the number of the element to be visited. Otherwise, return
765 FALSE. */
766inline bool
768{
769 /* Skip words that are zeros. */
770 for (; i->word == 0; i->word = i->vec[i->word_num])
771 {
772 i->word_num++;
773 i->bit_num = i->word_num * IRA_INT_BITS;
774
775 /* If we have reached the end, break. */
776 if (i->bit_num >= i->nel)
777 return false;
778 }
779
780 /* Skip bits that are zero. */
781 int off = ctz_hwi (i->word);
782 i->bit_num += off;
783 i->word >>= off;
784
785 *n = (int) i->bit_num + i->start_val;
786
787 return true;
788}
789
790/* Advance to the next element in the set. */
791inline void
793{
794 i->word >>= 1;
795 i->bit_num++;
796}
797
798/* Loop over all elements of a min/max set given by bit vector VEC and
799 their minimal and maximal values MIN and MAX. In each iteration, N
800 is set to the number of next allocno. ITER is an instance of
801 minmax_set_iterator used to iterate over the set. */
802#define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \
803 for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \
804 minmax_set_iter_cond (&(ITER), &(N)); \
805 minmax_set_iter_next (&(ITER)))
806
808public:
810
811 void free_ira_costs ();
813
814 /* Initialized once. It is a maximal possible size of the allocated
815 struct costs. */
817
818 /* Allocated and initialized once, and used to initialize cost values
819 for each insn. */
821
822 /* Allocated once, and used for temporary purposes. */
824
825 /* Allocated once, and used for the cost calculation. */
828
829 /* Hard registers that cannot be used for the register allocator for
830 all functions of the current compilation unit. */
832
833 /* Map: hard regs X modes -> set of hard registers for storing value
834 of given mode starting with given hard register. */
837
838 /* Maximum cost of moving from a register in one class to a register
839 in another class. Based on TARGET_REGISTER_MOVE_COST. */
841
842 /* Similar, but here we don't have to move if the first index is a
843 subset of the second so in that case the cost is zero. */
845
846 /* Similar, but here we don't have to move if the first index is a
847 superset of the second so in that case the cost is zero. */
849
850 /* Keep track of the last mode we initialized move costs for. */
852
853 /* Array analog of the macro MEMORY_MOVE_COST but they contain maximal
854 cost not minimal. */
856
857 /* Map class->true if class is a possible allocno class, false
858 otherwise. */
860
861 /* Map class->true if class is a pressure class, false otherwise. */
863
864 /* Array of the number of hard registers of given class which are
865 available for allocation. The order is defined by the hard
866 register numbers. */
868
869 /* Index (in ira_class_hard_regs; for given register class and hard
870 register (in general case a hard register can belong to several
871 register classes;. The index is negative for hard registers
872 unavailable for the allocation. */
874
875 /* Index [CL][M] contains R if R appears somewhere in a register of the form:
876
877 (reg:M R'), R' not in x_ira_prohibited_class_mode_regs[CL][M]
878
879 For example, if:
880
881 - (reg:M 2) is valid and occupies two registers;
882 - register 2 belongs to CL; and
883 - register 3 belongs to the same pressure class as CL
884
885 then (reg:M 2) contributes to [CL][M] and registers 2 and 3 will be
886 in the set. */
888
889 /* The value is number of elements in the subsequent array. */
891
892 /* The array containing all non-empty classes. Such classes is
893 important for calculation of the hard register usage costs. */
895
896 /* The array containing indexes of important classes in the previous
897 array. The array elements are defined only for important
898 classes. */
900
901 /* Map class->true if class is an uniform class, false otherwise. */
903
904 /* The biggest important class inside of intersection of the two
905 classes (that is calculated taking only hard registers available
906 for allocation into account;. If the both classes contain no hard
907 registers available for allocation, the value is calculated with
908 taking all hard-registers including fixed ones into account. */
910
911 /* Classes with end marker LIM_REG_CLASSES which are intersected with
912 given class (the first index). That includes given class itself.
913 This is calculated taking only hard registers available for
914 allocation into account. */
916
917 /* The biggest (smallest) important class inside of (covering) union
918 of the two classes (that is calculated taking only hard registers
919 available for allocation into account). If the both classes
920 contain no hard registers available for allocation, the value is
921 calculated with taking all hard-registers including fixed ones
922 into account. In other words, the value is the corresponding
923 reg_class_subunion (reg_class_superunion) value. */
926
927 /* For each reg class, table listing all the classes contained in it
928 (excluding the class itself. Non-allocatable registers are
929 excluded from the consideration). */
931
932 /* Array whose values are hard regset of hard registers for which
933 move of the hard register in given mode into itself is
934 prohibited. */
936
937 /* Flag of that the above array has been initialized. */
939};
940
942#if SWITCHABLE_TARGET
944#else
945#define this_target_ira_int (&default_target_ira_int)
946#endif
947
948#define ira_reg_mode_hard_regset \
949 (this_target_ira_int->x_ira_reg_mode_hard_regset)
950#define ira_register_move_cost \
951 (this_target_ira_int->x_ira_register_move_cost)
952#define ira_max_memory_move_cost \
953 (this_target_ira_int->x_ira_max_memory_move_cost)
954#define ira_may_move_in_cost \
955 (this_target_ira_int->x_ira_may_move_in_cost)
956#define ira_may_move_out_cost \
957 (this_target_ira_int->x_ira_may_move_out_cost)
958#define ira_reg_allocno_class_p \
959 (this_target_ira_int->x_ira_reg_allocno_class_p)
960#define ira_reg_pressure_class_p \
961 (this_target_ira_int->x_ira_reg_pressure_class_p)
962#define ira_non_ordered_class_hard_regs \
963 (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
964#define ira_class_hard_reg_index \
965 (this_target_ira_int->x_ira_class_hard_reg_index)
966#define ira_useful_class_mode_regs \
967 (this_target_ira_int->x_ira_useful_class_mode_regs)
968#define ira_important_classes_num \
969 (this_target_ira_int->x_ira_important_classes_num)
970#define ira_important_classes \
971 (this_target_ira_int->x_ira_important_classes)
972#define ira_important_class_nums \
973 (this_target_ira_int->x_ira_important_class_nums)
974#define ira_uniform_class_p \
975 (this_target_ira_int->x_ira_uniform_class_p)
976#define ira_reg_class_intersect \
977 (this_target_ira_int->x_ira_reg_class_intersect)
978#define ira_reg_class_super_classes \
979 (this_target_ira_int->x_ira_reg_class_super_classes)
980#define ira_reg_class_subunion \
981 (this_target_ira_int->x_ira_reg_class_subunion)
982#define ira_reg_class_superunion \
983 (this_target_ira_int->x_ira_reg_class_superunion)
984#define ira_prohibited_mode_move_regs \
985 (this_target_ira_int->x_ira_prohibited_mode_move_regs)
986
987/* ira.cc: */
988
989extern void *ira_allocate (size_t);
990extern void ira_free (void *addr);
991extern bitmap ira_allocate_bitmap (void);
992extern void ira_free_bitmap (bitmap);
993extern void ira_print_disposition (FILE *);
994extern void ira_debug_disposition (void);
995extern void ira_debug_allocno_classes (void);
996extern void ira_init_register_move_cost (machine_mode);
998extern int ira_get_dup_out_num (int, alternative_mask, bool &);
999
1000/* ira-build.cc */
1001
1002/* The current loop tree node and its regno allocno map. */
1005
1006extern void ira_debug_pref (ira_pref_t);
1007extern void ira_debug_prefs (void);
1009
1010extern void ira_debug_copy (ira_copy_t);
1011extern void debug (ira_allocno_copy &ref);
1012extern void debug (ira_allocno_copy *ptr);
1013
1014extern void ira_debug_copies (void);
1016extern void debug (ira_allocno &ref);
1017extern void debug (ira_allocno *ptr);
1018
1020 void (*) (ira_loop_tree_node_t),
1021 void (*) (ira_loop_tree_node_t));
1028extern void ira_allocate_conflict_vec (ira_object_t, int);
1032extern void ira_add_live_range_to_object (ira_object_t, int, int);
1034 live_range_t);
1041extern ira_pref_t ira_create_pref (ira_allocno_t, int, int);
1042extern void ira_add_allocno_pref (ira_allocno_t, int, int);
1043extern void ira_remove_pref (ira_pref_t);
1046 int, bool, rtx_insn *,
1049 bool, rtx_insn *,
1051
1053extern void ira_free_cost_vector (int *, reg_class_t);
1054
1055extern void ira_flattening (int, int);
1056extern bool ira_build (void);
1057extern void ira_destroy (void);
1058
1059/* ira-costs.cc */
1060extern void ira_init_costs_once (void);
1061extern void ira_init_costs (void);
1062extern void ira_costs (void);
1063extern void ira_tune_allocno_costs (void);
1064
1065/* ira-lives.cc */
1066
1067extern void ira_rebuild_start_finish_chains (void);
1069extern void debug (live_range &ref);
1070extern void debug (live_range *ptr);
1073extern void ira_debug_live_ranges (void);
1074extern void ira_create_allocno_live_ranges (void);
1075extern void ira_compress_allocno_live_ranges (void);
1076extern void ira_finish_allocno_live_ranges (void);
1079
1080/* ira-conflicts.cc */
1081extern void ira_debug_conflicts (bool);
1082extern void ira_build_conflicts (void);
1083
1084/* ira-color.cc */
1086extern void ira_debug_hard_regs_forest (void);
1087extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool);
1088extern void ira_reassign_conflict_allocnos (int);
1089extern void ira_initiate_assign (void);
1090extern void ira_finish_assign (void);
1091extern void ira_color (void);
1092
1093/* ira-emit.cc */
1094extern void ira_initiate_emit_data (void);
1095extern void ira_finish_emit_data (void);
1096extern void ira_emit (bool);
1097
1098
1099
1100/* Return true if equivalence of pseudo REGNO is not a lvalue. */
1101inline bool
1103{
1104 if (regno >= ira_reg_equiv_len)
1105 return false;
1106 return (ira_reg_equiv[regno].constant != NULL_RTX
1107 || ira_reg_equiv[regno].invariant != NULL_RTX
1108 || (ira_reg_equiv[regno].memory != NULL_RTX
1109 && MEM_READONLY_P (ira_reg_equiv[regno].memory)));
1110}
1111
1112
1113
1114/* Initialize register costs for MODE if necessary. */
1115inline void
1117{
1118 if (ira_register_move_cost[mode] == NULL)
1120}
1121
1122
1123
1124/* The iterator for all allocnos. */
1126 /* The number of the current element in IRA_ALLOCNOS. */
1127 int n;
1128};
1129
1130/* Initialize the iterator I. */
1131inline void
1133{
1134 i->n = 0;
1135}
1136
1137/* Return TRUE if we have more allocnos to visit, in which case *A is
1138 set to the allocno to be visited. Otherwise, return FALSE. */
1139inline bool
1141{
1142 int n;
1143
1144 for (n = i->n; n < ira_allocnos_num; n++)
1145 if (ira_allocnos[n] != NULL)
1146 {
1147 *a = ira_allocnos[n];
1148 i->n = n + 1;
1149 return true;
1150 }
1151 return false;
1152}
1153
1154/* Loop over all allocnos. In each iteration, A is set to the next
1155 allocno. ITER is an instance of ira_allocno_iterator used to iterate
1156 the allocnos. */
1157#define FOR_EACH_ALLOCNO(A, ITER) \
1158 for (ira_allocno_iter_init (&(ITER)); \
1159 ira_allocno_iter_cond (&(ITER), &(A));)
1160
1161/* The iterator for all objects. */
1163 /* The number of the current element in ira_object_id_map. */
1164 int n;
1165};
1166
1167/* Initialize the iterator I. */
1168inline void
1170{
1171 i->n = 0;
1172}
1173
1174/* Return TRUE if we have more objects to visit, in which case *OBJ is
1175 set to the object to be visited. Otherwise, return FALSE. */
1176inline bool
1178{
1179 int n;
1180
1181 for (n = i->n; n < ira_objects_num; n++)
1182 if (ira_object_id_map[n] != NULL)
1183 {
1184 *obj = ira_object_id_map[n];
1185 i->n = n + 1;
1186 return true;
1187 }
1188 return false;
1189}
1190
1191/* Loop over all objects. In each iteration, OBJ is set to the next
1192 object. ITER is an instance of ira_object_iterator used to iterate
1193 the objects. */
1194#define FOR_EACH_OBJECT(OBJ, ITER) \
1195 for (ira_object_iter_init (&(ITER)); \
1196 ira_object_iter_cond (&(ITER), &(OBJ));)
1197
1198/* The iterator for objects associated with an allocno. */
1200 /* The number of the element the allocno's object array. */
1201 int n;
1202};
1203
1204/* Initialize the iterator I. */
1205inline void
1210
1211/* Return TRUE if we have more objects to visit in allocno A, in which
1212 case *O is set to the object to be visited. Otherwise, return
1213 FALSE. */
1214inline bool
1216 ira_object_t *o)
1217{
1218 int n = i->n++;
1219 if (n < ALLOCNO_NUM_OBJECTS (a))
1220 {
1221 *o = ALLOCNO_OBJECT (a, n);
1222 return true;
1223 }
1224 return false;
1225}
1226
1227/* Loop over all objects associated with allocno A. In each
1228 iteration, O is set to the next object. ITER is an instance of
1229 ira_allocno_object_iterator used to iterate the conflicts. */
1230#define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \
1231 for (ira_allocno_object_iter_init (&(ITER)); \
1232 ira_allocno_object_iter_cond (&(ITER), (A), &(O));)
1233
1234
1235/* The iterator for prefs. */
1237 /* The number of the current element in IRA_PREFS. */
1238 int n;
1239};
1240
1241/* Initialize the iterator I. */
1242inline void
1244{
1245 i->n = 0;
1246}
1247
1248/* Return TRUE if we have more prefs to visit, in which case *PREF is
1249 set to the pref to be visited. Otherwise, return FALSE. */
1250inline bool
1252{
1253 int n;
1254
1255 for (n = i->n; n < ira_prefs_num; n++)
1256 if (ira_prefs[n] != NULL)
1257 {
1258 *pref = ira_prefs[n];
1259 i->n = n + 1;
1260 return true;
1261 }
1262 return false;
1263}
1264
1265/* Loop over all prefs. In each iteration, P is set to the next
1266 pref. ITER is an instance of ira_pref_iterator used to iterate
1267 the prefs. */
1268#define FOR_EACH_PREF(P, ITER) \
1269 for (ira_pref_iter_init (&(ITER)); \
1270 ira_pref_iter_cond (&(ITER), &(P));)
1271
1272
1273/* The iterator for copies. */
1275 /* The number of the current element in IRA_COPIES. */
1276 int n;
1277};
1278
1279/* Initialize the iterator I. */
1280inline void
1282{
1283 i->n = 0;
1284}
1285
1286/* Return TRUE if we have more copies to visit, in which case *CP is
1287 set to the copy to be visited. Otherwise, return FALSE. */
1288inline bool
1290{
1291 int n;
1292
1293 for (n = i->n; n < ira_copies_num; n++)
1294 if (ira_copies[n] != NULL)
1295 {
1296 *cp = ira_copies[n];
1297 i->n = n + 1;
1298 return true;
1299 }
1300 return false;
1301}
1302
1303/* Loop over all copies. In each iteration, C is set to the next
1304 copy. ITER is an instance of ira_copy_iterator used to iterate
1305 the copies. */
1306#define FOR_EACH_COPY(C, ITER) \
1307 for (ira_copy_iter_init (&(ITER)); \
1308 ira_copy_iter_cond (&(ITER), &(C));)
1309
1310/* The iterator for object conflicts. */
1312
1313 /* TRUE if the conflicts are represented by vector of allocnos. */
1315
1316 /* The conflict vector or conflict bit vector. */
1317 void *vec;
1318
1319 /* The number of the current element in the vector (of type
1320 ira_object_t or IRA_INT_TYPE). */
1321 unsigned int word_num;
1322
1323 /* The bit vector size. It is defined only if
1324 OBJECT_CONFLICT_VEC_P is FALSE. */
1325 unsigned int size;
1326
1327 /* The current bit index of bit vector. It is defined only if
1328 OBJECT_CONFLICT_VEC_P is FALSE. */
1329 unsigned int bit_num;
1330
1331 /* The object id corresponding to the 1st bit of the bit vector. It
1332 is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */
1334
1335 /* The word of bit vector currently visited. It is defined only if
1336 OBJECT_CONFLICT_VEC_P is FALSE. */
1338};
1339
1340/* Initialize the iterator I with ALLOCNO conflicts. */
1341inline void
1343 ira_object_t obj)
1344{
1345 i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj);
1346 i->vec = OBJECT_CONFLICT_ARRAY (obj);
1347 i->word_num = 0;
1348 if (i->conflict_vec_p)
1349 i->size = i->bit_num = i->base_conflict_id = i->word = 0;
1350 else
1351 {
1352 if (OBJECT_MIN (obj) > OBJECT_MAX (obj))
1353 i->size = 0;
1354 else
1355 i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj)
1356 + IRA_INT_BITS)
1357 / IRA_INT_BITS) * sizeof (IRA_INT_TYPE);
1358 i->bit_num = 0;
1359 i->base_conflict_id = OBJECT_MIN (obj);
1360 i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]);
1361 }
1362}
1363
1364/* Return TRUE if we have more conflicting allocnos to visit, in which
1365 case *A is set to the allocno to be visited. Otherwise, return
1366 FALSE. */
1367inline bool
1370{
1371 ira_object_t obj;
1372
1373 if (i->conflict_vec_p)
1374 {
1375 obj = ((ira_object_t *) i->vec)[i->word_num++];
1376 if (obj == NULL)
1377 return false;
1378 }
1379 else
1380 {
1381 unsigned IRA_INT_TYPE word = i->word;
1382 unsigned int bit_num = i->bit_num;
1383
1384 /* Skip words that are zeros. */
1385 for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num])
1386 {
1387 i->word_num++;
1388
1389 /* If we have reached the end, break. */
1390 if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size)
1391 return false;
1392
1393 bit_num = i->word_num * IRA_INT_BITS;
1394 }
1395
1396 /* Skip bits that are zero. */
1397 int off = ctz_hwi (word);
1398 bit_num += off;
1399 word >>= off;
1400
1401 obj = ira_object_id_map[bit_num + i->base_conflict_id];
1402 i->bit_num = bit_num + 1;
1403 i->word = word >> 1;
1404 }
1405
1406 *pobj = obj;
1407 return true;
1408}
1409
1410/* Loop over all objects conflicting with OBJ. In each iteration,
1411 CONF is set to the next conflicting object. ITER is an instance
1412 of ira_object_conflict_iterator used to iterate the conflicts. */
1413#define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \
1414 for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \
1415 ira_object_conflict_iter_cond (&(ITER), &(CONF));)
1416
1417
1418
1419/* The function returns TRUE if at least one hard register from ones
1420 starting with HARD_REGNO and containing value of MODE are in set
1421 HARD_REGSET. */
1422inline bool
1423ira_hard_reg_set_intersection_p (int hard_regno, machine_mode mode,
1425{
1426 int i;
1427
1428 gcc_assert (hard_regno >= 0);
1429 for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
1430 if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1431 return true;
1432 return false;
1433}
1434
1435/* Return number of hard registers in hard register SET. */
1436inline int
1438{
1439 int i, size;
1440
1441 for (size = i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1442 if (TEST_HARD_REG_BIT (set, i))
1443 size++;
1444 return size;
1445}
1446
1447/* The function returns TRUE if hard registers starting with
1448 HARD_REGNO and containing value of MODE are fully in set
1449 HARD_REGSET. */
1450inline bool
1451ira_hard_reg_in_set_p (int hard_regno, machine_mode mode,
1453{
1454 int i;
1455
1456 ira_assert (hard_regno >= 0);
1457 for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
1458 if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i))
1459 return false;
1460 return true;
1461}
1462
1463
1464
1465/* To save memory we use a lazy approach for allocation and
1466 initialization of the cost vectors. We do this only when it is
1467 really necessary. */
1468
1469/* Allocate cost vector *VEC for hard registers of ACLASS and
1470 initialize the elements by VAL if it is necessary */
1471inline void
1473{
1474 int i, *reg_costs;
1475 int len;
1476
1477 if (*vec != NULL)
1478 return;
1480 len = ira_class_hard_regs_num[(int) aclass];
1481 for (i = 0; i < len; i++)
1482 reg_costs[i] = val;
1483}
1484
1485/* Allocate cost vector *VEC for hard registers of ACLASS and copy
1486 values of vector SRC into the vector if it is necessary */
1487inline void
1488ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src)
1489{
1490 int len;
1491
1492 if (*vec != NULL || src == NULL)
1493 return;
1494 *vec = ira_allocate_cost_vector (aclass);
1495 len = ira_class_hard_regs_num[aclass];
1496 memcpy (*vec, src, sizeof (int) * len);
1497}
1498
1499/* Allocate cost vector *VEC for hard registers of ACLASS and add
1500 values of vector SRC into the vector if it is necessary */
1501inline void
1503{
1504 int i, len;
1505
1506 if (src == NULL)
1507 return;
1508 len = ira_class_hard_regs_num[aclass];
1509 if (*vec == NULL)
1510 {
1511 *vec = ira_allocate_cost_vector (aclass);
1512 memset (*vec, 0, sizeof (int) * len);
1513 }
1514 for (i = 0; i < len; i++)
1515 (*vec)[i] += src[i];
1516}
1517
1518/* Allocate cost vector *VEC for hard registers of ACLASS and copy
1519 values of vector SRC into the vector or initialize it by VAL (if
1520 SRC is null). */
1521inline void
1523 int val, int *src)
1524{
1525 int i, *reg_costs;
1526 int len;
1527
1528 if (*vec != NULL)
1529 return;
1531 len = ira_class_hard_regs_num[aclass];
1532 if (src != NULL)
1533 memcpy (reg_costs, src, sizeof (int) * len);
1534 else
1535 {
1536 for (i = 0; i < len; i++)
1537 reg_costs[i] = val;
1538 }
1539}
1540
1541extern rtx ira_create_new_reg (rtx);
1543
1544/* Return the set of registers that would need a caller save if allocno A
1545 overlapped them. */
1546
1547inline HARD_REG_SET
1554
1555/* Return true if we would need to save allocno A around a call if we
1556 assigned hard register REGNO. */
1557
1558inline bool
1560{
1561 if (ALLOCNO_CALLS_CROSSED_NUM (a) == 0)
1562 return false;
1565 ALLOCNO_MODE (a), regno);
1566}
1567
1568/* Represents the boundary between an allocno in one loop and its parent
1569 allocno in the enclosing loop. It is usually possible to change a
1570 register's allocation on this boundary; the class provides routines
1571 for calculating the cost of such changes. */
1573{
1574public:
1576
1577 int move_between_loops_cost () const;
1578 int spill_outside_loop_cost () const;
1579 int spill_inside_loop_cost () const;
1580
1581private:
1582 /* The mode and class of the child allocno. */
1583 machine_mode m_mode;
1585
1586 /* Sums the frequencies of the entry edges and the exit edges. */
1588};
1589
1590/* Return the cost of storing the register on entry to the loop and
1591 loading it back on exit from the loop. This is the cost to use if
1592 the register is spilled within the loop but is successfully allocated
1593 in the parent loop. */
1594inline int
1600
1601/* Return the cost of loading the register on entry to the loop and
1602 storing it back on exit from the loop. This is the cost to use if
1603 the register is successfully allocated within the loop but is spilled
1604 in the parent loop. */
1605inline int
1611
1612/* Return the cost of moving the pseudo register between different hard
1613 registers on entry and exit from the loop. This is the cost to use
1614 if the register is successfully allocated within both this loop and
1615 the parent loop, but the allocations for the loops differ. */
1616inline int
1623
1624/* Return true if subloops that contain allocnos for A's register can
1625 use a different assignment from A. ALLOCATED_P is true for the case
1626 in which allocation succeeded for A. EXCLUDE_OLD_RELOAD is true if
1627 we should always return false for non-LRA targets. (This is a hack
1628 and should be removed along with old reload.) */
1629inline bool
1631 bool exclude_old_reload = true)
1632{
1634 return false;
1635
1636 auto regno = ALLOCNO_REGNO (a);
1637
1639 && regno == (int) REGNO (pic_offset_table_rtx))
1640 return false;
1641
1642 ira_assert (regno < ira_reg_equiv_len);
1643 if (ira_equiv_no_lvalue_p (regno))
1644 return false;
1645
1646 /* Avoid overlapping multi-registers. Moves between them might result
1647 in wrong code generation. */
1648 if (allocated_p)
1649 {
1652 return false;
1653 }
1654
1655 return true;
1656}
1657
1658/* Return true if we should treat A and SUBLOOP_A as belonging to a
1659 single region. */
1660inline bool
1662{
1664 return false;
1665
1667 return false;
1668
1669 auto rclass = ALLOCNO_CLASS (a);
1670 auto pclass = ira_pressure_class_translate[rclass];
1671 auto loop_used_regs = ALLOCNO_LOOP_TREE_NODE (a)->reg_pressure[pclass];
1673}
1674
1675/* Return the set of all hard registers that conflict with A. */
1676inline HARD_REG_SET
1685
1686/* Return the cost of saving a caller-saved register before each call
1687 in A's live range and restoring the same register after each call. */
1688inline int
1690{
1691 auto mode = ALLOCNO_MODE (a);
1692 auto rclass = ALLOCNO_CLASS (a);
1693 return (ALLOCNO_CALL_FREQ (a)
1694 * (ira_memory_move_cost[mode][rclass][0]
1695 + ira_memory_move_cost[mode][rclass][1]));
1696}
1697
1698/* A and SUBLOOP_A are allocnos for the same pseudo register, with A's
1699 loop immediately enclosing SUBLOOP_A's loop. If we allocate to A a
1700 hard register R that is clobbered by a call in SUBLOOP_A, decide
1701 which of the following approaches should be used for handling the
1702 conflict:
1703
1704 (1) Spill R on entry to SUBLOOP_A's loop, assign memory to SUBLOOP_A,
1705 and restore R on exit from SUBLOOP_A's loop.
1706
1707 (2) Spill R before each necessary call in SUBLOOP_A's live range and
1708 restore R after each such call.
1709
1710 Return true if (1) is better than (2). SPILL_COST is the cost of
1711 doing (1). */
1712inline bool
1714 int spill_cost)
1715{
1717 return false;
1718
1719 /* Calculate the cost of saving a call-clobbered register
1720 before each call and restoring it afterwards. */
1721 int call_cost = ira_caller_save_cost (subloop_a);
1722 return call_cost && call_cost >= spill_cost;
1723}
1724
1725#endif /* GCC_IRA_INT_H */
Definition bitmap.h:328
Definition ira-int.h:1573
reg_class m_class
Definition ira-int.h:1584
int move_between_loops_cost() const
Definition ira-int.h:1617
int spill_outside_loop_cost() const
Definition ira-int.h:1606
int spill_inside_loop_cost() const
Definition ira-int.h:1595
machine_mode m_mode
Definition ira-int.h:1583
int m_entry_freq
Definition ira-int.h:1587
int m_exit_freq
Definition ira-int.h:1587
ira_loop_border_costs(ira_allocno_t)
Definition ira-color.cc:2808
Definition ira-int.h:629
rtx mem
Definition ira-int.h:634
bitmap_head spilled_regs
Definition ira-int.h:632
poly_uint64 width
Definition ira-int.h:636
Definition cfgloop.h:120
Definition ira-int.h:807
int x_ira_important_classes_num
Definition ira-int.h:890
struct costs * x_this_op_costs[MAX_RECOG_OPERANDS]
Definition ira-int.h:827
HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES]
Definition ira-int.h:935
enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES]
Definition ira-int.h:925
enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES]
Definition ira-int.h:909
void free_register_move_costs()
Definition ira.cc:1680
enum reg_class x_ira_important_classes[N_REG_CLASSES]
Definition ira-int.h:894
move_table * x_ira_may_move_in_cost[MAX_MACHINE_MODE]
Definition ira-int.h:844
enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES]
Definition ira-int.h:930
~target_ira_int()
Definition ira.cc:1707
bool x_ira_prohibited_mode_move_regs_initialized_p
Definition ira-int.h:938
HARD_REG_SET x_no_unit_alloc_regs
Definition ira-int.h:831
move_table * x_ira_register_move_cost[MAX_MACHINE_MODE]
Definition ira-int.h:840
struct costs * x_init_cost
Definition ira-int.h:820
int x_ira_important_class_nums[N_REG_CLASSES]
Definition ira-int.h:899
short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2]
Definition ira-int.h:855
enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES]
Definition ira-int.h:915
move_table * x_ira_may_move_out_cost[MAX_MACHINE_MODE]
Definition ira-int.h:848
void free_ira_costs()
Definition ira-costs.cc:2514
HARD_REG_SET(x_ira_reg_mode_hard_regset[FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES])
bool x_ira_reg_pressure_class_p[N_REG_CLASSES]
Definition ira-int.h:862
size_t x_max_struct_costs_size
Definition ira-int.h:816
short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]
Definition ira-int.h:873
bool x_ira_uniform_class_p[N_REG_CLASSES]
Definition ira-int.h:902
bool x_ira_reg_allocno_class_p[N_REG_CLASSES]
Definition ira-int.h:859
short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]
Definition ira-int.h:867
struct costs * x_temp_costs
Definition ira-int.h:823
int x_last_mode_for_init_move_cost
Definition ira-int.h:851
struct costs * x_op_costs[MAX_RECOG_OPERANDS]
Definition ira-int.h:826
HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES]
Definition ira-int.h:887
enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES]
Definition ira-int.h:924
bool debug
Definition collect-utils.cc:34
int reg_class_t
Definition coretypes.h:366
class bitmap_head * bitmap
Definition coretypes.h:51
@ IRA_REGION_MIXED
Definition flag-types.h:197
HARD_REG_SET call_clobbers_in_region(unsigned int abis, const_hard_reg_set mask, machine_mode mode)
Definition function-abi.cc:179
bool call_clobbered_in_region_p(unsigned int abis, const_hard_reg_set mask, machine_mode mode, unsigned int regno)
Definition function-abi.h:308
const size_t NUM_ABI_IDS
Definition function-abi.h:31
uint64_t alternative_mask
Definition genattrtab.cc:235
vec< const char * > register_filters
Definition gensupport.cc:408
T * ggc_alloc(ALONE_CXX_MEM_STAT_INFO)
Definition ggc.h:184
#define TEST_HARD_REG_BIT(SET, BIT)
Definition hard-reg-set.h:170
HARD_REG_ELT_TYPE HARD_REG_SET
Definition hard-reg-set.h:47
const HARD_REG_SET const_hard_reg_set
Definition hard-reg-set.h:48
int ctz_hwi(unsigned HOST_WIDE_INT x)
Definition hwint.cc:86
static IRA_INT_TYPE ** conflicts
Definition ira-conflicts.cc:46
static enum reg_class * pref
Definition ira-costs.cc:94
void ira_init_register_move_cost_if_necessary(machine_mode mode)
Definition ira-int.h:1116
#define ira_register_move_cost
Definition ira-int.h:950
void ira_add_live_range_to_object(ira_object_t, int, int)
Definition ira-build.cc:942
bool ira_conflict_vector_profitable_p(ira_object_t, int)
Definition ira-build.cc:632
void ira_object_conflict_iter_init(ira_object_conflict_iterator *i, ira_object_t obj)
Definition ira-int.h:1342
int ira_loop_edge_freq(ira_loop_tree_node_t, int, bool)
Definition ira-color.cc:2775
void ira_allocate_object_conflicts(ira_object_t, int)
Definition ira-build.cc:690
unsigned short move_table[N_REG_CLASSES]
Definition ira-int.h:71
int64_t ira_shuffle_cost
Definition ira-int.h:652
bool ira_object_iter_cond(ira_object_iterator *i, ira_object_t *obj)
Definition ira-int.h:1177
void ira_debug_copy(ira_copy_t)
Definition ira-build.cc:1519
bool ira_allocno_iter_cond(ira_allocno_iterator *i, ira_allocno_t *a)
Definition ira-int.h:1140
int ira_spilled_reg_stack_slots_num
Definition ira.cc:410
bool ira_hard_reg_set_intersection_p(int hard_regno, machine_mode mode, HARD_REG_SET hard_regset)
Definition ira-int.h:1423
bool ira_single_region_allocno_p(ira_allocno_t a, ira_allocno_t subloop_a)
Definition ira-int.h:1661
ira_loop_tree_node_t ira_bb_nodes
Definition ira-build.cc:49
void ira_add_allocno_pref(ira_allocno_t, int, int)
Definition ira-build.cc:1228
#define OBJECT_MAX(O)
Definition ira-int.h:538
void ira_allocate_and_copy_costs(int **vec, enum reg_class aclass, int *src)
Definition ira-int.h:1488
#define OBJECT_CONFLICT_ARRAY(O)
Definition ira-int.h:529
ira_pref_t * ira_prefs
Definition ira-build.cc:79
void ira_finish_emit_data(void)
Definition ira-emit.cc:119
int64_t ira_overall_cost
Definition ira.cc:421
#define IRA_INT_TYPE
Definition ira-int.h:667
rtx allocno_emit_reg(ira_allocno_t a)
Definition ira-int.h:522
ira_allocno_t ira_soft_conflict(ira_allocno_t, ira_allocno_t)
Definition ira-color.cc:1788
void ira_traverse_loop_tree(bool, ira_loop_tree_node_t, void(*)(ira_loop_tree_node_t), void(*)(ira_loop_tree_node_t))
Definition ira-build.cc:1773
void ira_init_costs(void)
Definition ira-costs.cc:2533
bitmap ira_allocate_bitmap(void)
Definition ira.cc:681
int ira_allocnos_num
Definition ira-build.cc:68
ira_copy_t * ira_copies
Definition ira-build.cc:87
live_range_t ira_merge_live_ranges(live_range_t, live_range_t)
Definition ira-build.cc:986
void ira_debug_prefs(void)
Definition ira-build.cc:1273
#define OBJECT_MIN(O)
Definition ira-int.h:537
#define ALLOCNO_MODE(A)
Definition ira-int.h:467
HARD_REG_SET ira_need_caller_save_regs(ira_allocno_t a)
Definition ira-int.h:1548
#define ALLOCNO_CALL_FREQ(A)
Definition ira-int.h:450
#define IRA_INT_BITS
Definition ira-int.h:666
int ira_caller_save_cost(ira_allocno_t a)
Definition ira-int.h:1689
void ira_free_allocno_updated_costs(ira_allocno_t)
Definition ira-build.cc:1095
void ira_debug_allocno_prefs(ira_allocno_t)
Definition ira-build.cc:1292
void ira_free_bitmap(bitmap)
Definition ira.cc:688
void ira_free(void *addr)
Definition ira.cc:669
int64_t ira_store_cost
Definition ira-int.h:652
void ira_debug_live_ranges(void)
Definition ira-lives.cc:1800
void ira_copy_iter_init(ira_copy_iterator *i)
Definition ira-int.h:1281
void ira_rebuild_start_finish_chains(void)
Definition ira-lives.cc:1649
#define ALLOCNO_OBJECT(A, N)
Definition ira-int.h:484
void ira_debug_pref(ira_pref_t)
Definition ira-build.cc:1255
void ira_allocate_and_set_or_copy_costs(int **vec, enum reg_class aclass, int val, int *src)
Definition ira-int.h:1522
void ira_init_costs_once(void)
Definition ira-costs.cc:2499
void * ira_allocate(size_t)
Definition ira.cc:655
bool ira_live_ranges_intersect_p(live_range_t, live_range_t)
Definition ira-build.cc:1058
live_range_t * ira_finish_point_ranges
Definition ira-int.h:222
ira_loop_tree_node_t ira_curr_loop_tree_node
Definition ira-build.cc:1754
live_range_t ira_create_live_range(ira_object_t, int, int, live_range_t)
Definition ira-build.cc:926
bool ira_build(void)
Definition ira-build.cc:3477
bool ira_subloop_allocnos_can_differ_p(ira_allocno_t a, bool allocated_p=true, bool exclude_old_reload=true)
Definition ira-int.h:1630
void ira_print_disposition(FILE *)
Definition ira.cc:698
#define ALLOCNO_CROSSED_CALLS_ABIS(A)
Definition ira-int.h:453
int ira_max_point
Definition ira-lives.cc:50
void ira_color(void)
Definition ira-color.cc:5322
void ira_create_allocno_live_ranges(void)
Definition ira-lives.cc:1809
void ira_reassign_conflict_allocnos(int)
Definition ira-color.cc:4022
void ira_emit(bool)
Definition ira-emit.cc:1254
#define ALLOCNO_EMIT_DATA(a)
Definition ira-int.h:515
struct ira_allocno_pref * ira_pref_t
Definition ira-int.h:62
live_range_t ira_copy_live_range_list(live_range_t)
Definition ira-build.cc:964
void ira_allocate_conflict_vec(ira_object_t, int)
Definition ira-build.cc:656
ira_allocno_t ira_parent_or_cap_allocno(ira_allocno_t)
Definition ira-build.cc:3063
void ira_remove_pref(ira_pref_t)
Definition ira-build.cc:1308
live_range_t * ira_start_point_ranges
Definition ira-lives.cc:54
void ira_create_allocno_objects(ira_allocno_t)
Definition ira-build.cc:558
void ira_allocno_object_iter_init(ira_allocno_object_iterator *i)
Definition ira-int.h:1206
void ira_finish_assign(void)
Definition ira-color.cc:5183
int ira_move_loops_num
Definition ira.cc:424
void ira_compress_allocno_live_ranges(void)
Definition ira-lives.cc:1832
void ira_set_allocno_class(ira_allocno_t, enum reg_class)
Definition ira-build.cc:542
void ira_flattening(int, int)
Definition ira-build.cc:3133
ira_allocno_t * ira_curr_regno_allocno_map
Definition ira-build.cc:1755
#define ALLOCNO_NUM_OBJECTS(A)
Definition ira-int.h:485
FILE * ira_dump_file
Definition ira.cc:407
struct ira_object * ira_object_t
Definition ira-int.h:64
void ira_destroy(void)
Definition ira-build.cc:3568
void ira_costs(void)
Definition ira-costs.cc:2587
void ira_tune_allocno_costs(void)
Definition ira-costs.cc:2633
bool ira_hard_reg_in_set_p(int hard_regno, machine_mode mode, HARD_REG_SET hard_regset)
Definition ira-int.h:1451
void ira_allocate_and_set_costs(int **vec, reg_class_t aclass, int val)
Definition ira-int.h:1472
struct ira_emit_data * ira_emit_data_t
Definition ira-int.h:489
struct ira_loop_tree_node * ira_loop_tree_node_t
Definition ira-int.h:69
ira_object_t * ira_object_id_map
Definition ira-build.cc:75
void ira_init_register_move_cost(machine_mode)
Definition ira.cc:1559
ira_loop_tree_node_t ira_loop_nodes
Definition ira-build.cc:53
ira_allocno_t ira_parent_allocno(ira_allocno_t)
Definition ira-build.cc:3046
void ira_finish_allocno_live_ranges(void)
Definition ira-lives.cc:1845
bool ira_allocno_object_iter_cond(ira_allocno_object_iterator *i, ira_allocno_t a, ira_object_t *o)
Definition ira-int.h:1215
void ira_debug_live_range_list(live_range_t)
Definition ira-lives.cc:1751
ira_allocno_t * ira_allocnos
Definition ira-build.cc:65
int ira_additional_jumps_num
Definition ira-int.h:653
void ior_hard_reg_conflicts(ira_allocno_t, const_hard_reg_set)
Definition ira-build.cc:617
#define ALLOCNO_CLASS(A)
Definition ira-int.h:477
void ira_implicitly_set_insn_hard_regs(HARD_REG_SET *, alternative_mask)
Definition ira-lives.cc:934
int ira_loop_tree_height
Definition ira-build.cc:44
ira_emit_data_t ira_allocno_emit_data
Definition ira-emit.cc:89
ira_copy_t ira_create_copy(ira_allocno_t, ira_allocno_t, int, bool, rtx_insn *, ira_loop_tree_node_t)
Definition ira-build.cc:1406
void ira_debug_allocno_classes(void)
Definition ira.cc:1399
int first_moveable_pseudo
Definition ira.cc:4669
class target_ira_int default_target_ira_int
Definition ira.cc:397
#define OBJECT_CONFLICT_VEC_P(O)
Definition ira-int.h:533
void ira_debug_disposition(void)
Definition ira.cc:730
#define ALLOCNO_REGNO(A)
Definition ira-int.h:432
ira_allocno_t ira_create_allocno(int, bool, ira_loop_tree_node_t)
Definition ira-build.cc:476
#define ALLOCNO_MIGHT_CONFLICT_WITH_PARENT_P(A)
Definition ira-int.h:440
void ira_free_cost_vector(int *, reg_class_t)
Definition ira-build.cc:1644
bool ira_caller_save_loop_spill_p(ira_allocno_t a, ira_allocno_t subloop_a, int spill_cost)
Definition ira-int.h:1713
int internal_flag_ira_verbose
Definition ira.cc:404
#define ALLOCNO_CALLS_CROSSED_NUM(A)
Definition ira-int.h:451
int hard_reg_set_size(HARD_REG_SET set)
Definition ira-int.h:1437
void ira_remove_allocno_prefs(ira_allocno_t)
Definition ira-build.cc:1330
bool minmax_set_iter_cond(minmax_set_iterator *i, int *n)
Definition ira-int.h:767
void ira_finish_live_range_list(live_range_t)
Definition ira-build.cc:1082
ira_allocno_t * ira_regno_allocno_map
Definition ira-build.cc:60
int ira_get_dup_out_num(int, alternative_mask, bool &)
Definition ira.cc:1955
int64_t ira_mem_cost
Definition ira-int.h:651
struct ira_allocno_copy * ira_copy_t
Definition ira-int.h:63
rtx ira_create_new_reg(rtx)
Definition ira-emit.cc:336
int ira_copies_num
Definition ira-build.cc:90
bool ira_pref_iter_cond(ira_pref_iterator *i, ira_pref_t *pref)
Definition ira-int.h:1251
void ira_debug_allocno_copies(ira_allocno_t)
Definition ira-build.cc:1588
bool ira_need_caller_save_p(ira_allocno_t a, unsigned int regno)
Definition ira-int.h:1559
int64_t ira_reg_cost
Definition ira.cc:422
#define this_target_ira_int
Definition ira-int.h:945
void ira_initiate_assign(void)
Definition ira-color.cc:5169
#define ALLOCNO_LOOP_TREE_NODE(A)
Definition ira-int.h:435
class ira_spilled_reg_stack_slot * ira_spilled_reg_stack_slots
Definition ira.cc:414
void ira_debug_allocno_live_ranges(ira_allocno_t)
Definition ira-lives.cc:1782
void ira_print_live_range_list(FILE *, live_range_t)
Definition ira-lives.cc:1727
int ira_objects_num
Definition ira-build.cc:72
int64_t ira_load_cost
Definition ira.cc:423
ira_pref_t ira_create_pref(ira_allocno_t, int, int)
Definition ira-build.cc:1200
void minmax_set_iter_next(minmax_set_iterator *i)
Definition ira-int.h:792
int last_moveable_pseudo
Definition ira-int.h:1542
void ira_initiate_emit_data(void)
Definition ira-emit.cc:101
bool ira_copy_iter_cond(ira_copy_iterator *i, ira_copy_t *cp)
Definition ira-int.h:1289
ira_copy_t ira_add_allocno_copy(ira_allocno_t, ira_allocno_t, int, bool, rtx_insn *, ira_loop_tree_node_t)
Definition ira-build.cc:1472
void ira_finish_live_range(live_range_t)
Definition ira-build.cc:1075
#define OBJECT_TOTAL_CONFLICT_HARD_REGS(O)
Definition ira-int.h:536
void ira_debug_hard_regs_forest(void)
Definition ira-color.cc:553
void ira_allocate_and_accumulate_costs(int **vec, enum reg_class aclass, int *src)
Definition ira-int.h:1502
bool ira_object_conflict_iter_cond(ira_object_conflict_iterator *i, ira_object_t *pobj)
Definition ira-int.h:1368
ira_loop_tree_node_t ira_loop_tree_root
Definition ira-build.cc:41
void ira_object_iter_init(ira_object_iterator *i)
Definition ira-int.h:1169
void ira_allocno_iter_init(ira_allocno_iterator *i)
Definition ira-int.h:1132
void ira_print_expanded_allocno(ira_allocno_t)
Definition ira-build.cc:860
void ira_build_conflicts(void)
Definition ira-conflicts.cc:803
alternative_mask ira_setup_alts(rtx_insn *)
Definition ira.cc:1781
int * ira_allocate_cost_vector(reg_class_t)
Definition ira-build.cc:1637
int ira_prefs_num
Definition ira-build.cc:82
struct live_range * live_range_t
Definition ira-int.h:60
bool ira_equiv_no_lvalue_p(int regno)
Definition ira-int.h:1102
void ira_debug_conflicts(bool)
Definition ira-conflicts.cc:793
void ira_pref_iter_init(ira_pref_iterator *i)
Definition ira-int.h:1243
HARD_REG_SET ira_total_conflict_hard_regs(ira_allocno_t a)
Definition ira-int.h:1677
#define ira_assert(c)
Definition ira-int.h:39
void minmax_set_iter_init(minmax_set_iterator *i, IRA_INT_TYPE *vec, int min, int max)
Definition ira-int.h:752
struct ira_allocno * ira_allocno_t
Definition ira-int.h:61
#define ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS(A)
Definition ira-int.h:454
void ira_debug_copies(void)
Definition ira-build.cc:1537
bool ira_use_lra_p
Definition ira.cc:5536
int ira_reg_equiv_len
Definition ira.cc:2982
struct ira_reg_equiv_s * ira_reg_equiv
Definition ira.cc:2985
#define ira_pressure_class_translate
Definition ira.h:146
#define ira_class_hard_regs_num
Definition ira.h:158
#define ira_reg_class_max_nregs
Definition ira.h:150
#define ira_memory_move_cost
Definition ira.h:154
#define MACHINE_MODE_BITSIZE
Definition machmode.h:258
i
Definition poly-int.h:772
Ca & a
Definition poly-int.h:766
ALWAYS_INLINE unsigned char hard_regno_nregs(unsigned int regno, machine_mode mode)
Definition regs.h:261
static int spill_cost[FIRST_PSEUDO_REGISTER]
Definition reload1.cc:1678
#define REGNO(RTX)
Definition rtl.h:1914
#define pic_offset_table_rtx
Definition rtl.h:3937
#define NULL_RTX
Definition rtl.h:705
#define MEM_READONLY_P(RTX)
Definition rtl.h:2605
Definition basic-block.h:117
Definition ira-costs.cc:54
Definition loop-invariant.cc:101
Definition ira-int.h:593
ira_allocno_t first
Definition ira-int.h:598
int freq
Definition ira-int.h:600
ira_loop_tree_node_t loop_tree_node
Definition ira-int.h:615
ira_allocno_t second
Definition ira-int.h:598
int num
Definition ira-int.h:595
rtx_insn * insn
Definition ira-int.h:607
ira_copy_t next_second_allocno_copy
Definition ira-int.h:613
ira_copy_t next_first_allocno_copy
Definition ira-int.h:610
ira_copy_t prev_first_allocno_copy
Definition ira-int.h:610
ira_copy_t prev_second_allocno_copy
Definition ira-int.h:613
bool constraint_p
Definition ira-int.h:601
Definition ira-int.h:1125
int n
Definition ira-int.h:1127
Definition ira-int.h:1199
int n
Definition ira-int.h:1201
Definition ira-int.h:565
ira_allocno_t allocno
Definition ira-int.h:574
ira_pref_t next_pref
Definition ira-int.h:577
int freq
Definition ira-int.h:572
int num
Definition ira-int.h:567
int hard_regno
Definition ira-int.h:569
Definition ira-int.h:275
unsigned int crossed_calls_abis
Definition ira-int.h:300
enum machine_mode mode
Definition ira-int.h:284
enum reg_class aclass
Definition ira-int.h:290
int class_cost
Definition ira-int.h:348
ira_copy_t allocno_copies
Definition ira-int.h:387
int num_objects
Definition ira-int.h:364
int freq
Definition ira-int.h:345
int regno
Definition ira-int.h:281
unsigned int bad_spill_p
Definition ira-int.h:315
int nrefs
Definition ira-int.h:343
ira_loop_tree_node_t loop_tree_node
Definition ira-int.h:381
unsigned int assigned_p
Definition ira-int.h:318
ira_allocno_t next_regno_allocno
Definition ira-int.h:376
unsigned int dont_reassign_p
Definition ira-int.h:305
ira_pref_t allocno_prefs
Definition ira-int.h:383
enum machine_mode wmode
Definition ira-int.h:287
int * hard_reg_costs
Definition ira-int.h:415
ira_allocno_t cap
Definition ira-int.h:390
HARD_REG_SET crossed_calls_clobbered_regs
Definition ira-int.h:400
unsigned int conflict_vec_p
Definition ira-int.h:323
void * add_data
Definition ira-int.h:425
int * updated_hard_reg_costs
Definition ira-int.h:415
int num
Definition ira-int.h:279
int cheap_calls_crossed_num
Definition ira-int.h:372
int updated_memory_cost
Definition ira-int.h:356
int updated_class_cost
Definition ira-int.h:348
int call_freq
Definition ira-int.h:367
int * conflict_hard_reg_costs
Definition ira-int.h:422
ira_object_t objects[2]
Definition ira-int.h:398
unsigned int might_conflict_with_parent_p
Definition ira-int.h:330
int * updated_conflict_hard_reg_costs
Definition ira-int.h:422
ira_allocno_t cap_member
Definition ira-int.h:393
int excess_pressure_points_num
Definition ira-int.h:362
int memory_cost
Definition ira-int.h:356
int calls_crossed_num
Definition ira-int.h:369
signed int hard_regno
Definition ira-int.h:297
Definition ira-int.h:1274
int n
Definition ira-int.h:1276
Definition ira-int.h:494
unsigned int mem_optimized_dest_p
Definition ira-int.h:499
ira_allocno_t mem_optimized_dest
Definition ira-int.h:512
rtx reg
Definition ira-int.h:508
unsigned int somewhere_renamed_p
Definition ira-int.h:503
unsigned int child_renamed_p
Definition ira-int.h:506
Definition ira-int.h:82
ira_loop_tree_node_t next
Definition ira-int.h:89
ira_loop_tree_node_t subloop_next
Definition ira-int.h:89
bitmap local_copies
Definition ira-int.h:139
bool to_remove_p
Definition ira-int.h:107
int level
Definition ira-int.h:97
ira_loop_tree_node_t subloops
Definition ira-int.h:92
bitmap border_allocnos
Definition ira-int.h:132
int loop_num
Definition ira-int.h:103
int reg_pressure[N_REG_CLASSES]
Definition ira-int.h:125
basic_block bb
Definition ira-int.h:84
class loop * loop
Definition ira-int.h:86
bool entered_from_non_parent_p
Definition ira-int.h:121
ira_loop_tree_node_t parent
Definition ira-int.h:94
bitmap all_allocnos
Definition ira-int.h:129
bitmap modified_regnos
Definition ira-int.h:136
ira_allocno_t * regno_allocno_map
Definition ira-int.h:116
ira_loop_tree_node_t children
Definition ira-int.h:92
Definition ira-int.h:1311
unsigned IRA_INT_TYPE word
Definition ira-int.h:1337
void * vec
Definition ira-int.h:1317
unsigned int word_num
Definition ira-int.h:1321
int base_conflict_id
Definition ira-int.h:1333
unsigned int size
Definition ira-int.h:1325
bool conflict_vec_p
Definition ira-int.h:1314
unsigned int bit_num
Definition ira-int.h:1329
Definition ira-int.h:1162
int n
Definition ira-int.h:1164
Definition ira-int.h:227
unsigned int conflict_vec_p
Definition ira-int.h:264
void * conflicts_array
Definition ira-int.h:233
int subword
Definition ira-int.h:242
int num_accumulated_conflicts
Definition ira-int.h:260
ira_allocno_t allocno
Definition ira-int.h:229
int id
Definition ira-int.h:247
int max
Definition ira-int.h:252
HARD_REG_SET total_conflict_hard_regs
Definition ira-int.h:257
live_range_t live_ranges
Definition ira-int.h:238
int min
Definition ira-int.h:252
HARD_REG_SET conflict_hard_regs
Definition ira-int.h:257
unsigned int conflicts_array_size
Definition ira-int.h:244
Definition ira-int.h:1236
int n
Definition ira-int.h:1238
Definition ira-int.h:199
ira_object_t object
Definition ira-int.h:201
int finish
Definition ira-int.h:203
int start
Definition ira-int.h:203
live_range_t next
Definition ira-int.h:206
live_range_t finish_next
Definition ira-int.h:208
live_range_t start_next
Definition ira-int.h:208
Definition ira-int.h:728
int start_val
Definition ira-int.h:743
unsigned int word_num
Definition ira-int.h:734
unsigned int bit_num
Definition ira-int.h:740
unsigned int nel
Definition ira-int.h:737
unsigned IRA_INT_TYPE word
Definition ira-int.h:746
IRA_INT_TYPE * vec
Definition ira-int.h:731
Definition rtl.h:311
Definition rtl.h:545
Definition cse.cc:4118
Definition vec.h:450
#define NULL
Definition system.h:50
#define gcc_assert(EXPR)
Definition system.h:821