GCC Middle and Back End API Reference
lra-int.h
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1/* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010-2025 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21#ifndef GCC_LRA_INT_H
22#define GCC_LRA_INT_H
23
24#define lra_assert(c) gcc_checking_assert (c)
25
26/* The parameter used to prevent infinite reloading for an insn. Each
27 insn operands might require a reload and, if it is a memory, its
28 base and index registers might require a reload too. */
29#define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
30
32
33/* The structure describes program points where a given pseudo lives.
34 The live ranges can be used to find conflicts with other pseudos.
35 If the live ranges of two pseudos are intersected, the pseudos are
36 in conflict. */
38{
39 /* Pseudo regno whose live range is described by given
40 structure. */
41 int regno;
42 /* Program point range. */
44 /* Next structure describing program points where the pseudo
45 lives. */
47 /* Pointer to structures with the same start. */
49};
50
51typedef struct lra_copy *lra_copy_t;
52
53/* Copy between pseudos which affects assigning hard registers. */
55{
56 /* True if regno1 is the destination of the copy. */
58 /* Execution frequency of the copy. */
59 int freq;
60 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
62 /* Next copy with correspondingly REGNO1 and REGNO2. */
64};
65
66/* Common info about a register (pseudo or hard register). */
68{
69public:
70 /* Bitmap of UIDs of insns (including debug insns) referring the
71 reg. */
73 /* The following fields are defined only for pseudos. */
74 /* Hard registers with which the pseudo conflicts. */
76 /* Pseudo allocno class hard registers which cannot be a start hard register
77 of the pseudo. */
79 /* We assign hard registers to reload pseudos which can occur in few
80 places. So two hard register preferences are enough for them.
81 The following fields define the preferred hard registers. If
82 there are no such hard registers the first field value is
83 negative. If there is only one preferred hard register, the 2nd
84 field is negative. */
86 /* Profits to use the corresponding preferred hard registers. If
87 the both hard registers defined, the first hard register has not
88 less profit than the second one. */
90#ifdef STACK_REGS
91 /* True if the pseudo should not be assigned to a stack register. */
92 bool no_stack_p;
93#endif
94 /* Number of references and execution frequencies of the register in
95 *non-debug* insns. */
96 int nrefs, freq;
98 /* rtx used to undo the inheritance. It can be non-null only
99 between subsequent inheritance and undo inheritance passes. */
101 /* Value holding by register. If the pseudos have the same value
102 they do not conflict. */
103 int val;
104 /* Offset from relative eliminate register to pesudo reg. */
106 /* These members are set up in lra-lives.cc and updated in
107 lra-coalesce.cc. */
108 /* The biggest size mode in which each pseudo reg is referred in
109 whole function (possibly via subreg). */
110 machine_mode biggest_mode;
111 /* Live ranges of the pseudo. */
113 /* This member is set up in lra-lives.cc for subsequent
114 assignments. */
116};
117
118/* References to the common info about each register. */
119extern class lra_reg *lra_reg_info;
120
122
123/* Static info about each insn operand (common for all insns with the
124 same ICODE). Warning: if the structure definition is changed, the
125 initializer for debug_operand_data in lra.cc should be changed
126 too. */
128{
129 /* The machine description constraint string of the operand. */
130 const char *constraint;
131 /* Alternatives for which early_clobber can be true. */
133 /* It is taken only from machine description (which is different
134 from recog_data.operand_mode) and can be of VOIDmode. */
135 ENUM_BITFIELD(machine_mode) mode : 16;
136 /* The type of the operand (in/out/inout). */
137 ENUM_BITFIELD (op_type) type : 8;
138 /* Through if accessed through STRICT_LOW. */
139 unsigned int strict_low : 1;
140 /* True if the operand is an operator. */
141 unsigned int is_operator : 1;
142 /* True if the operand is an address. */
143 unsigned int is_address : 1;
144};
145
146/* Info about register occurrence in an insn. */
148{
149 /* Alternatives for which early_clobber can be true. */
151 /* The biggest mode through which the insn refers to the register
152 occurrence (remember the register can be accessed through a
153 subreg in the insn). */
154 ENUM_BITFIELD(machine_mode) biggest_mode : 16;
155 /* The type of the corresponding operand which is the register. */
156 ENUM_BITFIELD (op_type) type : 8;
157 /* True if the reg is accessed through a subreg and the subreg is
158 just a part of the register. */
159 unsigned int subreg_p : 1;
160 /* The corresponding regno of the register. */
161 int regno;
162 /* Next reg info of the same insn. */
164};
165
166/* Static part (common info for insns with the same ICODE) of LRA
167 internal insn info. It exists in at most one exemplar for each
168 non-negative ICODE. There is only one exception. Each asm insn has
169 own structure. Warning: if the structure definition is changed,
170 the initializer for debug_insn_static_data in lra.cc should be
171 changed too. */
173{
174 /* Static info about each insn operand. */
176 /* Each duplication refers to the number of the corresponding
177 operand which is duplicated. */
179 /* The number of an operand marked as commutative, -1 otherwise. */
181 /* Number of operands, duplications, and alternatives of the
182 insn. */
184 char n_dups;
186 /* Insns in machine description (or clobbers in asm) may contain
187 explicit hard regs which are not operands. The following list
188 describes such hard registers. */
190 /* Array [n_alternatives][n_operand] of static constraint info for
191 given operand in given alternative. This info can be changed if
192 the target reg info is changed. */
194};
195
196/* Negative insn alternative numbers used for special cases. */
197#define LRA_UNKNOWN_ALT -1
198#define LRA_NON_CLOBBERED_ALT -2
199
200/* LRA internal info about an insn (LRA internal insn
201 representation). */
203{
204public:
205 /* The insn code. */
206 int icode;
207 /* The alternative should be used for the insn, LRA_UNKNOWN_ALT if
208 unknown, or we should assume any alternative, or the insn is a
209 debug insn. LRA_NON_CLOBBERED_ALT means ignoring any earlier
210 clobbers for the insn. */
212 /* Defined for asm insn and it is how many times we already generated reloads
213 for the asm insn. */
215 /* SP offset before the insn relative to one at the func start. */
217 /* The insn itself. */
219 /* Common data for insns with the same ICODE. Asm insns (their
220 ICODE is negative) do not share such structures. */
222 /* Two arrays of size correspondingly equal to the operand and the
223 duplication numbers: */
224 rtx **operand_loc; /* The operand locations, NULL if no operands. */
225 rtx **dup_loc; /* The dup locations, NULL if no dups. */
226 /* Number of hard registers implicitly used/clobbered in given call
227 insn. The value can be NULL or points to array of the hard
228 register numbers ending with a negative value. To differ
229 clobbered and used hard regs, clobbered hard regs are incremented
230 by FIRST_PSEUDO_REGISTER. */
232 /* Cached value of get_preferred_alternatives. */
234 /* The following member value is always NULL for a debug insn. */
236};
237
239
240/* Whether the clobber is used temporary in LRA. */
241#define LRA_TEMP_CLOBBER_P(x) \
242 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
243
244/* Cost factor for each additional reload and maximal cost reject for
245 insn reloads. One might ask about such strange numbers. Their
246 values occurred historically from former reload pass. */
247#define LRA_LOSER_COST_FACTOR 6
248#define LRA_MAX_REJECT 600
249
250/* Maximum allowed number of assignment pass iterations after the
251 latest spill pass when any former reload pseudo was spilled. It is
252 for preventing LRA cycling in a bug case. */
253#define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30
254
255/* Maximum allowed number of tries to split hard reg live ranges after failure
256 in assignment of reload pseudos. Theoretical bound for the value is the
257 number of the insn reload pseudos plus the number of inheritance pseudos
258 generated from the reload pseudos. This bound can be achieved when all the
259 reload pseudos and the inheritance pseudos require hard reg splitting for
260 their assignment. This is extremely unlikely event. */
261#define LRA_MAX_FAILED_SPLITS 10
262
263#if LRA_MAX_FAILED_SPLITS >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER
264#error wrong LRA_MAX_FAILED_SPLITS value
265#endif
266
267/* The maximal number of inheritance/split passes in LRA. It should
268 be more 1 in order to perform caller saves transformations and much
269 less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
270 as permitted constraint passes in some complicated cases. The
271 first inheritance/split pass has a biggest impact on generated code
272 quality. Each subsequent affects generated code in less degree.
273 For example, the 3rd pass does not change generated SPEC2000 code
274 at all on x86-64. */
275#define LRA_MAX_INHERITANCE_PASSES 2
276
277#if LRA_MAX_INHERITANCE_PASSES <= 0 \
278 || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
279#error wrong LRA_MAX_INHERITANCE_PASSES value
280#endif
281
282/* Analogous macro to the above one but for rematerialization. */
283#define LRA_MAX_REMATERIALIZATION_PASSES 2
284
285#if LRA_MAX_REMATERIALIZATION_PASSES <= 0 \
286 || LRA_MAX_REMATERIALIZATION_PASSES >= LRA_MAX_ASSIGNMENT_ITERATION_NUMBER - 8
287#error wrong LRA_MAX_REMATERIALIZATION_PASSES value
288#endif
289
290/* lra.cc: */
291
292extern FILE *lra_dump_file;
293extern int lra_verbose;
294
295extern bool lra_hard_reg_split_p;
296extern bool lra_asm_error_p;
297extern bool lra_reg_spill_p;
298
300
301extern int lra_insn_recog_data_len;
303
304extern int lra_curr_reload_num;
305
306extern void lra_dump_bitmap_with_title (const char *, bitmap, int);
307extern hashval_t lra_rtx_hash (rtx x);
308extern void lra_push_insn (rtx_insn *);
309extern void lra_push_insn_by_uid (unsigned int);
311extern rtx_insn *lra_pop_insn (void);
312extern unsigned int lra_insn_stack_length (void);
313
314extern rtx lra_create_new_reg (machine_mode, rtx, enum reg_class, HARD_REG_SET *,
315 const char *);
316extern rtx lra_create_new_reg_with_unique_value (machine_mode, rtx,
317 enum reg_class, HARD_REG_SET *,
318 const char *);
319extern void lra_set_regno_unique_value (int);
320extern void lra_invalidate_insn_data (rtx_insn *);
321extern void lra_set_insn_deleted (rtx_insn *);
322extern void lra_delete_dead_insn (rtx_insn *);
323extern void lra_emit_add (rtx, rtx, rtx);
324extern void lra_emit_move (rtx, rtx);
325extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
326extern void lra_asm_insn_error (rtx_insn *insn);
327
328extern void lra_dump_insns (FILE *f);
329extern void lra_dump_insns_if_possible (const char *title);
330
332 const char *);
333
334extern bool lra_substitute_pseudo (rtx *, int, rtx, bool, bool);
335extern bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool);
336
339extern void lra_set_used_insn_alternative (rtx_insn *, int);
340extern void lra_set_used_insn_alternative_by_uid (int, int);
341
344extern struct lra_insn_reg *lra_get_insn_regs (int);
345
346extern void lra_free_copies (void);
347extern void lra_create_copy (int, int, int);
348extern lra_copy_t lra_get_copy (int);
349
350extern int lra_new_regno_start;
353extern rtx lra_pmode_pseudo;
358
359/* lra-constraints.cc: */
360
361extern void lra_init_equiv (void);
362extern int lra_constraint_offset (int, machine_mode);
363
364extern int lra_constraint_iter;
366extern int lra_inheritance_iter;
368extern bool lra_constrain_insn (rtx_insn *);
369extern bool lra_constraints (bool);
370extern void lra_constraints_init (void);
371extern void lra_constraints_finish (void);
372extern bool spill_hard_reg_in_range (int, enum reg_class, rtx_insn *, rtx_insn *);
373extern void lra_inheritance (void);
374extern bool lra_undo_inheritance (void);
375
376/* lra-lives.cc: */
377
378extern int lra_live_max_point;
379extern int *lra_point_freq;
380
381extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
382
383extern int lra_live_range_iter;
384extern void lra_create_live_ranges (bool, bool);
390extern void lra_print_live_range_list (FILE *, lra_live_range_t);
391extern void debug (lra_live_range &ref);
392extern void debug (lra_live_range *ptr);
394extern void lra_debug_pseudo_live_ranges (int);
395extern void lra_debug_live_ranges (void);
396extern void lra_clear_live_ranges (void);
397extern void lra_live_ranges_init (void);
398extern void lra_live_ranges_finish (void);
399extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
400
401/* lra-assigns.cc: */
402
403extern int lra_assignment_iter;
405extern void lra_setup_reg_renumber (int, int, bool);
406extern bool lra_assign (bool &);
407extern bool lra_split_hard_reg_for (bool fail_p);
408
409/* lra-coalesce.cc: */
410
411extern int lra_coalesce_iter;
412extern bool lra_coalesce (void);
413
414/* lra-spills.cc: */
415
416extern bool lra_need_for_scratch_reg_p (void);
417extern bool lra_need_for_spills_p (void);
418extern void lra_spill (void);
419extern void lra_final_code_change (void);
420
421/* lra-remat.cc: */
422
424extern bool lra_remat (void);
425
426/* lra-elimination.c: */
427
428extern void lra_debug_elim_table (void);
429extern int lra_get_elimination_hard_regno (int);
430extern rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode,
431 bool, bool, poly_int64, bool);
432extern void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, poly_int64);
434extern bool lra_fp_pseudo_p (void);
435extern void lra_eliminate (bool, bool);
436
438extern void lra_eliminate_reg_if_possible (rtx *);
439
440
441
442/* Return the hard register which given pseudo REGNO assigned to.
443 Negative value means that the register got memory or we don't know
444 allocation yet. */
445inline int
451
452/* Change class of pseudo REGNO to NEW_CLASS. Print info about it
453 using TITLE. Output a new line if NL_P. */
454inline void
455lra_change_class (int regno, enum reg_class new_class,
456 const char *title, bool nl_p)
457{
458 lra_assert (regno >= FIRST_PSEUDO_REGISTER);
459 if (lra_dump_file != NULL)
460 fprintf (lra_dump_file, "%s class %s for r%d",
461 title, reg_class_names[new_class], regno);
462 setup_reg_classes (regno, new_class, NO_REGS, new_class);
463 if (lra_dump_file != NULL && nl_p)
464 fprintf (lra_dump_file, "\n");
465}
466
467/* Update insn operands which are duplication of NOP operand. The
468 insn is represented by its LRA internal representation ID. */
469inline void
471{
472 int i;
473 struct lra_static_insn_data *static_id = id->insn_static_data;
474
475 for (i = 0; i < static_id->n_dups; i++)
476 if (static_id->dup_num[i] == nop)
477 *id->dup_loc[i] = *id->operand_loc[nop];
478}
479
480/* Process operator duplications in insn with ID. We do it after the
481 operands processing. Generally speaking, we could do this probably
482 simultaneously with operands processing because a common practice
483 is to enumerate the operators after their operands. */
484inline void
486{
487 int i;
488 struct lra_static_insn_data *static_id = id->insn_static_data;
489
490 for (i = 0; i < static_id->n_dups; i++)
491 {
492 int ndup = static_id->dup_num[i];
493
494 if (static_id->operand[ndup].is_operator)
495 *id->dup_loc[i] = *id->operand_loc[ndup];
496 }
497}
498
499/* Return info about INSN. Set up the info if it is not done yet. */
502{
504 unsigned int uid = INSN_UID (insn);
505
506 if (lra_insn_recog_data_len > (int) uid
507 && (data = lra_insn_recog_data[uid]) != NULL)
508 {
509 /* Check that we did not change insn without updating the insn
510 info. */
511 lra_assert (data->insn == insn
512 && (INSN_CODE (insn) < 0
513 || data->icode == INSN_CODE (insn)));
514 return data;
515 }
516 return lra_set_insn_recog_data (insn);
517}
518
519/* Update offset from pseudos with VAL by INCR. */
520inline void
522{
523 int i;
524
525 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
526 {
527 if (lra_reg_info[i].val == val)
528 lra_reg_info[i].offset += incr;
529 }
530}
531
532/* Return true if register content is equal to VAL with OFFSET. */
533inline bool
534lra_reg_val_equal_p (int regno, int val, poly_int64 offset)
535{
536 if (lra_reg_info[regno].val == val
537 && known_eq (lra_reg_info[regno].offset, offset))
538 return true;
539
540 return false;
541}
542
543/* Assign value of register FROM to TO. */
544inline void
545lra_assign_reg_val (int from, int to)
546{
547 lra_reg_info[to].val = lra_reg_info[from].val;
548 lra_reg_info[to].offset = lra_reg_info[from].offset;
549}
550
551/* Update REGNO's biggest recorded mode so that it includes a reference
552 in mode MODE. */
553inline void
554lra_update_biggest_mode (int regno, machine_mode mode)
555{
556 if (!ordered_p (GET_MODE_SIZE (lra_reg_info[regno].biggest_mode),
557 GET_MODE_SIZE (mode)))
558 {
560 lra_reg_info[regno].biggest_mode = reg_raw_mode[regno];
561 }
562 else if (partial_subreg_p (lra_reg_info[regno].biggest_mode, mode))
563 lra_reg_info[regno].biggest_mode = mode;
564}
565
566#endif /* GCC_LRA_INT_H */
Definition bitmap.h:328
Definition genoutput.cc:150
Definition lra-int.h:203
rtx ** operand_loc
Definition lra-int.h:224
int used_insn_alternative
Definition lra-int.h:211
alternative_mask preferred_alternatives
Definition lra-int.h:233
rtx_insn * insn
Definition lra-int.h:218
rtx ** dup_loc
Definition lra-int.h:225
poly_int64 sp_offset
Definition lra-int.h:216
int asm_reloads_num
Definition lra-int.h:214
int * arg_hard_regs
Definition lra-int.h:231
struct lra_insn_reg * regs
Definition lra-int.h:235
struct lra_static_insn_data * insn_static_data
Definition lra-int.h:221
int icode
Definition lra-int.h:206
Definition lra-int.h:68
int preferred_hard_regno_profit1
Definition lra-int.h:89
int last_reload
Definition lra-int.h:97
int val
Definition lra-int.h:103
poly_int64 offset
Definition lra-int.h:105
int freq
Definition lra-int.h:96
HARD_REG_SET exclude_start_hard_regs
Definition lra-int.h:78
int nrefs
Definition lra-int.h:96
lra_live_range_t live_ranges
Definition lra-int.h:112
bitmap_head insn_bitmap
Definition lra-int.h:72
rtx restore_rtx
Definition lra-int.h:100
HARD_REG_SET conflict_hard_regs
Definition lra-int.h:75
machine_mode biggest_mode
Definition lra-int.h:110
int preferred_hard_regno1
Definition lra-int.h:85
lra_copy_t copies
Definition lra-int.h:115
int preferred_hard_regno_profit2
Definition lra-int.h:89
int preferred_hard_regno2
Definition lra-int.h:85
bool debug
Definition collect-utils.cc:34
struct rtx_def * rtx
Definition coretypes.h:57
class bitmap_head * bitmap
Definition coretypes.h:51
int max_reg_num(void)
Definition emit-rtl.cc:1503
uint64_t alternative_mask
Definition genattrtab.cc:236
HARD_REG_ELT_TYPE HARD_REG_SET
Definition hard-reg-set.h:47
const char * reg_class_names[]
Definition reginfo.cc:119
short * reg_renumber
Definition ira.cc:2463
int lra_assignment_iter_after_spill
Definition lra-assigns.cc:102
int lra_assignment_iter
Definition lra-assigns.cc:101
int lra_coalesce_iter
Definition lra-coalesce.cc:173
bool check_and_force_assignment_correctness_p
Definition lra-constraints.cc:5104
int lra_constraint_iter
Definition lra-constraints.cc:5095
int lra_undo_inheritance_iter
Definition lra-constraints.cc:7384
int lra_inheritance_iter
Definition lra-constraints.cc:7311
void lra_update_dup(lra_insn_recog_data_t id, int nop)
Definition lra-int.h:470
void lra_emit_move(rtx, rtx)
Definition lra.cc:497
void lra_print_live_range_list(FILE *, lra_live_range_t)
Definition lra-lives.cc:1276
bitmap_head lra_inheritance_pseudos
Definition lra.cc:2314
bool lra_intersected_live_ranges_p(lra_live_range_t, lra_live_range_t)
Definition lra-lives.cc:211
rtx lra_eliminate_regs_1(rtx_insn *, rtx, machine_mode, bool, bool, poly_int64, bool)
Definition lra-eliminations.cc:335
#define lra_assert(c)
Definition lra-int.h:24
hashval_t lra_rtx_hash(rtx x)
Definition lra.cc:1700
int lra_update_fp2sp_elimination(int *spilled_pseudos)
Definition lra-eliminations.cc:1409
bool lra_asm_error_p
Definition lra.cc:2339
void lra_constraints_init(void)
Definition lra-constraints.cc:5612
void lra_debug_live_ranges(void)
Definition lra-lives.cc:1335
bitmap_head lra_split_regs
Definition lra.cc:2317
int lra_live_range_iter
Definition lra-lives.cc:1355
void lra_eliminate_reg_if_possible(rtx *)
Definition lra-eliminations.cc:1361
lra_insn_recog_data_t lra_set_insn_recog_data(rtx_insn *)
Definition lra.cc:977
int lra_bad_spill_regno_start
Definition lra.cc:2308
int lra_new_regno_start
Definition lra.cc:2301
lra_live_range_t lra_merge_live_ranges(lra_live_range_t, lra_live_range_t)
Definition lra-lives.cc:156
int lra_curr_reload_num
Definition lra.cc:488
HARD_REG_SET lra_no_alloc_regs
Definition lra.cc:156
void lra_asm_insn_error(rtx_insn *insn)
Definition lra.cc:542
void lra_update_reg_val_offset(int val, poly_int64 incr)
Definition lra-int.h:521
struct lra_copy * lra_copy_t
Definition lra-int.h:51
void lra_create_live_ranges(bool, bool)
Definition lra-lives.cc:1507
bool lra_substitute_pseudo_within_insn(rtx_insn *, int, rtx, bool)
Definition lra.cc:2144
lra_insn_recog_data_t lra_get_insn_recog_data(rtx_insn *insn)
Definition lra-int.h:501
bool lra_hard_reg_split_p
Definition lra.cc:2336
bool lra_need_for_spills_p(void)
Definition lra-spills.cc:605
rtx_insn * lra_pop_insn(void)
Definition lra.cc:1848
FILE * lra_dump_file
Definition lra.cc:2330
int lra_get_regno_hard_regno(int regno)
Definition lra-int.h:446
void lra_spill(void)
Definition lra-spills.cc:622
void lra_debug_elim_table(void)
Definition lra-eliminations.cc:136
void lra_set_used_insn_alternative_by_uid(int, int)
Definition lra.cc:1308
void lra_emit_add(rtx, rtx, rtx)
Definition lra.cc:345
void lra_update_biggest_mode(int regno, machine_mode mode)
Definition lra-int.h:554
int lra_rematerialization_iter
Definition lra-remat.cc:1297
struct lra_insn_reg * lra_get_insn_regs(int)
Definition lra.cc:1688
void lra_set_used_insn_alternative(rtx_insn *, int)
Definition lra.cc:1297
void lra_dump_bitmap_with_title(const char *, bitmap, int)
Definition lra.cc:129
poly_int64 lra_update_sp_offset(rtx, poly_int64)
Definition lra-eliminations.cc:1351
void lra_update_dups(lra_insn_recog_data_t, signed char *)
Definition lra.cc:529
rtx lra_create_new_reg(machine_mode, rtx, enum reg_class, HARD_REG_SET *, const char *)
Definition lra.cc:229
int lra_get_elimination_hard_regno(int)
Definition lra-eliminations.cc:243
bool lra_assign(bool &)
Definition lra-assigns.cc:1605
int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER]
Definition lra-lives.cc:60
void lra_init_equiv(void)
Definition lra-constraints.cc:501
void lra_free_copies(void)
Definition lra.cc:1411
void eliminate_regs_in_insn(rtx_insn *insn, bool, bool, poly_int64)
Definition lra-eliminations.cc:899
void lra_update_insn_regno_info(rtx_insn *)
Definition lra.cc:1646
void lra_set_insn_deleted(rtx_insn *)
Definition lra.cc:261
void lra_delete_dead_insn(rtx_insn *)
Definition lra.cc:270
void lra_debug_live_range_list(lra_live_range_t)
Definition lra-lives.cc:1300
void lra_assign_reg_val(int from, int to)
Definition lra-int.h:545
void lra_clear_live_ranges(void)
Definition lra-lives.cc:1529
bool lra_remat(void)
Definition lra-remat.cc:1302
HARD_REG_SET hard_regs_spilled_into
Definition lra.cc:1328
bool lra_split_hard_reg_for(bool fail_p)
Definition lra-assigns.cc:1772
void lra_dump_insns_if_possible(const char *title)
Definition lra.cc:1906
bool lra_constraints(bool)
Definition lra-constraints.cc:5341
void lra_change_class(int regno, enum reg_class new_class, const char *title, bool nl_p)
Definition lra-int.h:455
bitmap_head lra_subreg_reload_pseudos
Definition lra.cc:2327
int lra_live_max_point
Definition lra-lives.cc:56
void lra_setup_reg_renumber(int, int, bool)
Definition lra-assigns.cc:780
int * lra_point_freq
Definition lra-lives.cc:524
void lra_dump_insns(FILE *f)
Definition lra.cc:1898
bool lra_constrain_insn(rtx_insn *)
Definition lra-constraints.cc:4951
void lra_set_regno_unique_value(int)
Definition lra.cc:244
void lra_constraints_finish(void)
Definition lra-constraints.cc:5620
bool lra_need_for_scratch_reg_p(void)
Definition lra-spills.cc:592
bool lra_reg_spill_p
Definition lra.cc:2343
void lra_push_insn_by_uid(unsigned int)
Definition lra.cc:1841
rtx lra_pmode_pseudo
Definition lra.cc:2311
int lra_constraint_offset(int, machine_mode)
Definition lra-constraints.cc:782
void lra_invalidate_insn_regno_info(rtx_insn *)
Definition lra.cc:1621
void lra_create_copy(int, int, int)
Definition lra.cc:1426
void lra_push_insn(rtx_insn *)
Definition lra.cc:1827
void lra_eliminate(bool, bool)
Definition lra-eliminations.cc:1454
bool lra_coalesce(void)
Definition lra-coalesce.cc:220
int lra_constraint_new_regno_start
Definition lra.cc:2304
bool lra_undo_inheritance(void)
Definition lra-constraints.cc:7779
void lra_setup_reload_pseudo_preferenced_hard_reg(int, int, int)
Definition lra-lives.cc:538
bool lra_reg_val_equal_p(int regno, int val, poly_int64 offset)
Definition lra-int.h:534
bool lra_substitute_pseudo(rtx *, int, rtx, bool, bool)
Definition lra.cc:2038
bool spill_hard_reg_in_range(int, enum reg_class, rtx_insn *, rtx_insn *)
Definition lra-constraints.cc:6421
unsigned int lra_insn_stack_length(void)
Definition lra.cc:1857
lra_insn_recog_data_t lra_update_insn_recog_data(rtx_insn *)
Definition lra.cc:1221
int lra_insn_recog_data_len
Definition lra.cc:745
rtx lra_create_new_reg_with_unique_value(machine_mode, rtx, enum reg_class, HARD_REG_SET *, const char *)
Definition lra.cc:182
void lra_invalidate_insn_data(rtx_insn *)
Definition lra.cc:252
bool lra_fp_pseudo_p(void)
Definition lra-eliminations.cc:1433
void lra_update_operator_dups(lra_insn_recog_data_t id)
Definition lra-int.h:485
void lra_push_insn_and_update_insn_regno_info(rtx_insn *)
Definition lra.cc:1834
void lra_process_new_insns(rtx_insn *, rtx_insn *, rtx_insn *, const char *)
Definition lra.cc:1918
struct lra_live_range * lra_live_range_t
Definition lra-int.h:31
int lra_verbose
Definition lra.cc:2333
class lra_reg * lra_reg_info
Definition lra.cc:1326
void lra_inheritance(void)
Definition lra-constraints.cc:7315
lra_copy_t lra_get_copy(int)
Definition lra.cc:1456
void lra_live_ranges_finish(void)
Definition lra-lives.cc:1548
lra_live_range_t lra_copy_live_range_list(lra_live_range_t)
Definition lra-lives.cc:137
void lra_final_code_change(void)
Definition lra-spills.cc:733
void lra_debug_pseudo_live_ranges(int)
Definition lra-lives.cc:1317
class lra_insn_recog_data * lra_insn_recog_data_t
Definition lra-int.h:238
bitmap_head lra_optional_reload_pseudos
Definition lra.cc:2322
void lra_live_ranges_init(void)
Definition lra-lives.cc:1540
ALWAYS_INLINE poly_uint16 GET_MODE_SIZE(machine_mode mode)
Definition machmode.h:657
poly_int< NUM_POLY_INT_COEFFS, HOST_WIDE_INT > poly_int64
Definition poly-int-types.h:24
#define known_eq(A, B)
i
Definition poly-int.h:776
op_type
Definition recog.h:39
bool resize_reg_info(void)
Definition reginfo.cc:883
void setup_reg_classes(int regno, enum reg_class prefclass, enum reg_class altclass, enum reg_class allocnoclass)
Definition reginfo.cc:988
#define reg_raw_mode
Definition regs.h:243
static regset_head spilled_pseudos
Definition reload1.cc:202
int INSN_UID(const_rtx insn)
Definition rtl.h:1450
#define INSN_CODE(INSN)
Definition rtl.h:1538
bool partial_subreg_p(machine_mode outermode, machine_mode innermode)
Definition rtl.h:3193
#define HARD_REGISTER_NUM_P(REG_NO)
Definition rtl.h:1977
Definition lra-int.h:55
int regno2
Definition lra-int.h:61
int freq
Definition lra-int.h:59
bool regno1_dest_p
Definition lra-int.h:57
lra_copy_t regno2_next
Definition lra-int.h:63
int regno1
Definition lra-int.h:61
lra_copy_t regno1_next
Definition lra-int.h:63
Definition lra-int.h:148
struct lra_insn_reg * next
Definition lra-int.h:163
enum op_type type
Definition lra-int.h:156
enum machine_mode biggest_mode
Definition lra-int.h:154
unsigned int subreg_p
Definition lra-int.h:159
int regno
Definition lra-int.h:161
alternative_mask early_clobber_alts
Definition lra-int.h:150
Definition lra-int.h:38
lra_live_range_t start_next
Definition lra-int.h:48
int finish
Definition lra-int.h:43
lra_live_range_t next
Definition lra-int.h:46
int start
Definition lra-int.h:43
int regno
Definition lra-int.h:41
Definition lra-int.h:128
unsigned int is_address
Definition lra-int.h:143
enum machine_mode mode
Definition lra-int.h:135
unsigned int is_operator
Definition lra-int.h:141
const char * constraint
Definition lra-int.h:130
alternative_mask early_clobber_alts
Definition lra-int.h:132
unsigned int strict_low
Definition lra-int.h:139
enum op_type type
Definition lra-int.h:137
Definition lra-int.h:173
const struct operand_alternative * operand_alternative
Definition lra-int.h:193
char n_dups
Definition lra-int.h:184
char n_operands
Definition lra-int.h:183
int commutative
Definition lra-int.h:180
struct lra_operand_data * operand
Definition lra-int.h:175
struct lra_insn_reg * hard_regs
Definition lra-int.h:189
char n_alternatives
Definition lra-int.h:185
int * dup_num
Definition lra-int.h:178
Definition rtl.h:546
#define NULL
Definition system.h:50
#define gcc_checking_assert(EXPR)
Definition system.h:821