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Data Structures | |
| struct | lra_live_range |
| struct | lra_copy |
| class | lra_reg |
| struct | lra_operand_data |
| struct | lra_insn_reg |
| struct | lra_static_insn_data |
| class | lra_insn_recog_data |
Macros | |
| #define | lra_assert(c) |
| #define | LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3) |
| #define | LRA_UNKNOWN_ALT -1 |
| #define | LRA_NON_CLOBBERED_ALT -2 |
| #define | LRA_TEMP_CLOBBER_P(x) |
| #define | LRA_LOSER_COST_FACTOR 6 |
| #define | LRA_MAX_REJECT 600 |
| #define | LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30 |
| #define | LRA_MAX_FAILED_SPLITS 10 |
| #define | LRA_MAX_INHERITANCE_PASSES 2 |
| #define | LRA_MAX_REMATERIALIZATION_PASSES 2 |
Typedefs | |
| typedef struct lra_live_range * | lra_live_range_t |
| typedef struct lra_copy * | lra_copy_t |
| typedef class lra_insn_recog_data * | lra_insn_recog_data_t |
| #define lra_assert | ( | c | ) |
Local Register Allocator (LRA) intercommunication header file. Copyright (C) 2010-2025 Free Software Foundation, Inc. Contributed by Vladimir Makarov <vmakarov@redhat.com>. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>.
Referenced by add_to_inherit(), alter_subregs(), assign_by_spills(), assign_hard_regno(), assign_mem_slot(), assign_spill_hard_regs(), base_plus_disp_to_reg(), base_to_reg(), check_and_process_move(), check_rtl(), check_secondary_memory_needed_p(), coalescable_pseudo_p(), curr_insn_transform(), delete_move_and_clobber(), eliminate_regs_in_insn(), emit_add3_insn(), find_hard_regno_for_1(), get_elimination(), get_insn_recog_data_by_uid(), get_live_on_other_edges(), get_reload_reg(), get_static_insn_data(), improve_inheritance(), inherit_reload_reg(), invalidate_insn_data_regno_info(), invalidate_insn_recog_data(), lra_change_class(), lra_coalesce(), lra_constraint_offset(), lra_constraints(), lra_create_copy(), lra_create_live_ranges(), lra_create_live_ranges_1(), lra_create_new_reg_with_unique_value(), lra_eliminate_reg_if_possible(), lra_eliminate_regs_1(), lra_emit_add(), lra_final_code_change(), lra_get_insn_recog_data(), lra_merge_live_ranges(), lra_process_new_insns(), lra_set_insn_recog_data(), lra_set_used_insn_alternative_by_uid(), lra_setup_reg_renumber(), lra_setup_reload_pseudo_preferenced_hard_reg(), lra_spill(), lra_update_insn_recog_data(), make_hard_regno_dead(), make_hard_regno_live(), mark_pseudo_dead(), mark_pseudo_live(), match_reload(), need_for_call_save_p(), need_for_split_p(), process_address_1(), process_alt_operands(), process_copy_to_form_thread(), process_invariant_for_inheritance(), prohibited_class_reg_set_mode_p(), reload_pseudo_compare_func(), remove_inheritance_pseudos(), remove_some_program_points_and_update_live_ranges(), setup_live_pseudos_and_spill_after_risky_transforms(), setup_operand_alternative(), simple_move_p(), simplify_operand_subreg(), spill_for(), spill_hard_reg_in_range(), spill_pseudos(), split_reg(), update_pseudo_point(), update_reg_eliminate(), and valid_address_p().
| #define LRA_LOSER_COST_FACTOR 6 |
Cost factor for each additional reload and maximal cost reject for insn reloads. One might ask about such strange numbers. Their values occurred historically from former reload pass.
Referenced by process_alt_operands().
| #define LRA_MAX_ASSIGNMENT_ITERATION_NUMBER 30 |
Maximum allowed number of assignment pass iterations after the latest spill pass when any former reload pseudo was spilled. It is for preventing LRA cycling in a bug case.
Referenced by lra_assign().
| #define LRA_MAX_FAILED_SPLITS 10 |
Maximum allowed number of tries to split hard reg live ranges after failure in assignment of reload pseudos. Theoretical bound for the value is the number of the insn reload pseudos plus the number of inheritance pseudos generated from the reload pseudos. This bound can be achieved when all the reload pseudos and the inheritance pseudos require hard reg splitting for their assignment. This is extremely unlikely event.
Referenced by lra().
| #define LRA_MAX_INHERITANCE_PASSES 2 |
The maximal number of inheritance/split passes in LRA. It should be more 1 in order to perform caller saves transformations and much less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many as permitted constraint passes in some complicated cases. The first inheritance/split pass has a biggest impact on generated code quality. Each subsequent affects generated code in less degree. For example, the 3rd pass does not change generated SPEC2000 code at all on x86-64.
Referenced by curr_insn_transform(), improve_inheritance(), lra(), lra_inheritance(), and lra_undo_inheritance().
| #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3) |
The parameter used to prevent infinite reloading for an insn. Each insn operands might require a reload and, if it is a memory, its base and index registers might require a reload too.
Referenced by add_to_inherit(), get_reload_reg(), and match_reload().
| #define LRA_MAX_REJECT 600 |
Referenced by process_alt_operands().
| #define LRA_MAX_REMATERIALIZATION_PASSES 2 |
Analogous macro to the above one but for rematerialization.
Referenced by lra(), and lra_remat().
| #define LRA_NON_CLOBBERED_ALT -2 |
Referenced by curr_insn_transform(), and reg_early_clobber_p().
| #define LRA_TEMP_CLOBBER_P | ( | x | ) |
Whether the clobber is used temporary in LRA.
Referenced by lra_final_code_change(), match_reload(), and spill_pseudos().
| #define LRA_UNKNOWN_ALT -1 |
Negative insn alternative numbers used for special cases.
Referenced by combine_reload_insn(), curr_insn_transform(), lra_set_insn_recog_data(), lra_update_insn_recog_data(), process_insn_for_elimination(), reg_early_clobber_p(), remove_inheritance_pseudos(), spill_pseudos(), and spill_pseudos().
| typedef struct lra_copy* lra_copy_t |
| typedef class lra_insn_recog_data* lra_insn_recog_data_t |
| typedef struct lra_live_range* lra_live_range_t |
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References lra_print_live_range_list().
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References debug.
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Scan INSN and eliminate all eliminable hard registers in it. If REPLACE_P is true, do the replacement destructively. Also delete the insn as dead it if it is setting an eliminable register. If REPLACE_P is false, just update the offsets while keeping the base register the same. If FIRST_P, use the sp offset for elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If UPDATE_SP_OFFSET is non-zero, don't use difference of the offset and the previous offset. Attach the note about used elimination for insns setting frame pointer to update elimination easy (without parsing already generated elimination insns to find offset previously used) in future.
References asm_noperands(), lra_elim_table::can_eliminate, DEBUG_INSN_P, lra_static_insn_data::dup_num, lra_elim_table::from_rtx, gen_lowpart, GET_CODE, get_elimination(), GET_MODE, have_addptr3_insn(), i, insn_data, ira_reg_equiv, ira_reg_equiv_len, known_eq, lra_assert, lra_eliminate_regs_1(), lra_get_insn_recog_data(), lra_pmode_pseudo, lra_update_insn_recog_data(), lra_static_insn_data::n_dups, lra_static_insn_data::n_operands, NULL, NULL_RTX, NUM_ELIMINABLE_REGS, lra_elim_table::offset, OP_IN, lra_static_insn_data::operand, PATTERN(), plus_constant(), poly_int_rtx_p(), lra_elim_table::previous_offset, recog_memoized(), reg_eliminate, REG_P, REGNO, SET_DEST, SET_SRC, single_set(), stack_pointer_rtx, subreg_lowpart_p(), SUBREG_REG, lra_elim_table::to_rtx, trunc_int_for_mode(), lra_operand_data::type, validate_change(), and XEXP.
Referenced by change_sp_offset(), lra_process_new_insns(), and process_insn_for_elimination().
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Report asm insn error and modify the asm insn.
References const0_rtx, error_for_asm(), ira_nullify_asm_goto(), JUMP_P, lra_asm_error_p, lra_invalidate_insn_data(), lra_set_insn_deleted(), and PATTERN().
Referenced by curr_insn_transform(), and lra_split_hard_reg_for().
Entry function to assign hard registers to new reload pseudos starting with LRA_CONSTRAINT_NEW_REGNO_START (by possible spilling of old pseudos) and possibly to the old pseudos. The function adds what insns to process for the next constraint pass. Those are all insns who contains non-reload and non-inheritance pseudos with changed allocation. Return true if we did not spill any non-reload and non-inheritance pseudos. Set up FAILS_P if we failed to assign hard registers to all reload pseudos.
References all_spilled_pseudos, assign_by_spills(), bitmap_clear(), bitmap_initialize(), bitmap_ior_into(), changed_pseudo_bitmap, check_and_force_assignment_correctness_p, create_live_range_start_chains(), EXECUTE_IF_SET_IN_BITMAP, finish_live_range_start_chains(), finish_live_reload_and_inheritance_pseudos(), finish_lives(), finish_regno_assign_info(), former_reload_pseudo_spill_p, free(), gcc_unreachable, i, init_live_reload_and_inheritance_pseudos(), init_lives(), init_regno_assign_info(), internal_error(), lra_asm_error_p, lra_assignment_iter, lra_assignment_iter_after_spill, lra_dump_file, lra_get_allocno_class(), lra_hard_reg_split_p, LRA_MAX_ASSIGNMENT_ITERATION_NUMBER, lra_push_insn_by_uid(), lra_reg_info, lra_set_used_insn_alternative_by_uid(), max_reg_num(), max_regno, NULL, NULL_RTX, overlaps_hard_reg_set_p(), PSEUDO_REGNO_MODE, r, reg_obstack, reg_renumber, regno_allocno_class_array, regno_live_length, setup_live_pseudos_and_spill_after_risky_transforms(), sorted_pseudos, sorted_reload_pseudos, timevar_pop(), and timevar_push().
Referenced by lra().
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Assign value of register FROM to TO.
References lra_reg_info.
Referenced by lra_create_new_reg(), and match_reload().
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Change class of pseudo REGNO to NEW_CLASS. Print info about it using TITLE. Output a new line if NL_P.
References lra_assert, lra_dump_file, NULL, reg_class_names, lra_insn_reg::regno, and setup_reg_classes().
Referenced by curr_insn_transform(), expand_reg_data(), get_reload_reg(), narrow_reload_pseudo_class(), process_addr_reg(), and process_address_1().
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Finish all live ranges.
References free_live_range_list(), i, lra_reg_info, max_reg_num(), and point_freq_vec.
Referenced by lra(), and lra_create_live_ranges().
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The major function for aggressive pseudo coalescing of moves only if the both pseudos were spilled and not special reload pseudos.
References bitmap_bit_p, bitmap_clear(), bitmap_initialize(), bitmap_ior_into(), BLOCK_FOR_INSN(), cfun, coalescable_pseudo_p(), coalesced_pseudos_bitmap, df_get_live_in(), df_get_live_out(), first_coalesced_pseudo, FOR_BB_INSNS_SAFE, FOR_EACH_BB_FN, free(), get_max_uid(), i, INSN_P, INSN_UID(), lra_assert, lra_coalesce_iter, lra_dump_file, lra_intersected_live_ranges_p(), lra_reg_info, lra_set_insn_deleted(), lra_set_regno_unique_value(), lra_update_insn_regno_info(), max_reg_num(), max_regno, mem_move_p(), merge_pseudos(), move_freq_compare_func(), next_coalesced_pseudo, NULL, NULL_RTX, ORIGINAL_REGNO, qsort, REG_FREQ_FROM_BB, reg_obstack, REG_P, REGNO, SET_DEST, set_noop_p(), SET_SRC, side_effects_p(), single_set(), substitute_within_insn(), timevar_pop(), timevar_push(), update_live_info(), and used_pseudos_bitmap.
Referenced by lra().
Return true if INSN satisfies all constraints. In other words, no reload insns are needed.
References curr_id, curr_insn, curr_insn_transform(), curr_static_id, get_max_uid(), lra_get_insn_recog_data(), max_reg_num(), new_insn_uid_start, and new_regno_start.
Referenced by do_remat().
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The page contains major code to choose the current insn alternative and generate reloads for it.
Return the offset from REGNO of the least significant register
in (reg:MODE REGNO).
This function is used to tell whether two registers satisfy
a matching constraint. (reg:MODE1 REGNO1) matches (reg:MODE2 REGNO2) if:
REGNO1 + lra_constraint_offset (REGNO1, MODE1)
== REGNO2 + lra_constraint_offset (REGNO2, MODE2)
References GET_MODE_SIZE(), hard_regno_nregs(), is_a(), and lra_assert.
Referenced by operands_match_p().
Entry function of LRA constraint pass. Return true if the constraint pass did change the code.
References bb_reload_num, bitmap_bit_p, bitmap_ior_into(), BLOCK_FOR_INSN(), check_and_force_assignment_correctness_p, combine_reload_insn(), CONST_POOL_OK_P, contains_deleted_insn_p(), contains_reg_p(), contains_reloaded_insn_p(), contains_symbol_ref_p(), copy_rtx(), curr_bb, curr_id, curr_insn, curr_insn_transform(), curr_static_id, DEBUG_INSN_P, df_regs_ever_live_p(), df_set_regs_ever_live(), dump_insn_slim(), EXECUTE_IF_SET_IN_BITMAP, GET_CODE, get_equiv(), get_max_uid(), GET_MODE, GET_MODE_SIZE(), hard_regno_nregs(), i, in_list_p(), init_curr_insn_input_reloads(), init_curr_operand_mode(), init_insn_rhs_dead_pseudo_p(), INSN_P, INSN_UID(), internal_error(), ira_reg_equiv, loc_equivalence_callback(), loc_equivalence_change_p(), lra_assert, lra_constraint_iter, lra_constraint_new_regno_start, lra_curr_reload_num, lra_dump_file, lra_dump_insns_if_possible(), lra_eliminate(), lra_get_allocno_class(), lra_get_insn_recog_data(), lra_get_regno_hard_regno(), lra_insn_stack_length(), lra_pop_insn(), lra_push_insn_by_uid(), lra_reg_info, lra_set_insn_deleted(), lra_update_insn_regno_info(), max_reg_num(), MAX_RELOAD_INSNS_NUMBER, maybe_gt, MEM_P, MEM_READONLY_P, multi_block_pseudo_p(), new_insn_uid_start, new_regno_start, NULL, NULL_RTX, PATTERN(), pic_offset_table_rtx, PSEUDO_REGNO_MODE, REG_FREQ_FROM_BB, reg_obstack, REG_P, REGNO, regno_reg_rtx, reverse_equiv_p(), SET_DEST, SET_SRC, simplify_replace_fn_rtx(), single_set(), SUBREG_REG, targetm, and update_equiv().
Referenced by lra().
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Finalize the LRA constraint pass. It is done once per function.
References finish_invariants().
Referenced by lra().
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Initiate the LRA constraint pass. It is done once per function.
References initiate_invariants().
Referenced by lra().
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Copy live range list given by its head R and return the result.
References copy_live_range(), lra_live_range::next, NULL, and r.
Referenced by add_pseudo_to_slot(), and merge_pseudos().
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Create copy of two pseudos REGNO1 and REGNO2. The copy execution frequency is FREQ.
References copy_vec, lra_copy::freq, lra_reg::freq, lra_assert, lra_copy_pool, lra_dump_file, lra_reg_info, NULL, lra_copy::regno1, lra_copy::regno1_dest_p, lra_copy::regno1_next, lra_copy::regno2, and lra_copy::regno2_next.
Referenced by process_bb_lives().
The main entry function creates live-ranges and other live info necessary for the assignment sub-pass. It uses lra_creates_live_ranges_1 -- so read comments for the function.
References lra_assert, lra_clear_live_ranges(), lra_create_live_ranges_1(), lra_dump_file, and NULL.
Referenced by lra().
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Analogous to the previous function but also inherits value of ORIGINAL.
References lra_assign_reg_val(), lra_create_new_reg_with_unique_value(), NULL_RTX, REG_P, and REGNO.
Referenced by base_plus_disp_to_reg(), base_to_reg(), curr_insn_transform(), get_reload_reg(), lra_autoinc_reload_context::get_reload_reg(), get_scratch_reg(), index_part_to_reg(), inherit_reload_reg(), match_reload(), process_address_1(), process_invariant_for_inheritance(), split_reg(), and update_scratch_ops().
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Create and return a new reg of ORIGINAL mode. If ORIGINAL is NULL or of VOIDmode, use MD_MODE for the new reg. Initialize its register class to RCLASS. Print message about assigning class RCLASS containing new register name TITLE unless it is NULL. Use attributes of ORIGINAL if it is a register. The created register will have unique held value.
References expand_reg_data(), gen_reg_rtx(), GET_MODE, lra_assert, lra_dump_file, lra_reg_info, max_reg_num(), NULL, NULL_RTX, ORIGINAL_REGNO, REG_ATTRS, reg_class_names, REG_P, REG_POINTER, REG_USERVAR_P, REGNO, and setup_reg_classes().
Referenced by check_and_process_move(), get_reload_reg(), lra_create_new_reg(), match_reload(), and process_addr_reg().
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Print live ranges R to stderr.
References lra_print_live_range_list(), and r.
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Print live ranges of all pseudos to stderr.
References print_live_ranges().
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Print live ranges of pseudo REGNO to stderr.
References print_pseudo_live_ranges(), and lra_insn_reg::regno.
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Delete an unneeded INSN and any previous insns who sole purpose is loading data that is dead in INSN.
References find_regno_note(), GET_CODE, lra_delete_dead_insn(), lra_set_insn_deleted(), PATTERN(), prev_real_insn(), reg_mentioned_p(), REG_P, REGNO, SET, SET_DEST, SET_SRC, and side_effects_p().
Referenced by lra_delete_dead_insn().
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LRA (local register allocator) driver and LRA utilities. Copyright (C) 2010-2025 Free Software Foundation, Inc. Contributed by Vladimir Makarov <vmakarov@redhat.com>. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>.
The Local Register Allocator (LRA) is a replacement of former
reload pass. It is focused to simplify code solving the reload
pass tasks, to make the code maintenance easier, and to implement new
perspective optimizations.
The major LRA design solutions are:
o division small manageable, separated sub-tasks
o reflection of all transformations and decisions in RTL as more
as possible
o insn constraints as a primary source of the info (minimizing
number of target-depended macros/hooks)
In brief LRA works by iterative insn process with the final goal is
to satisfy all insn and address constraints:
o New reload insns (in brief reloads) and reload pseudos might be
generated;
o Some pseudos might be spilled to assign hard registers to
new reload pseudos;
o Recalculating spilled pseudo values (rematerialization);
o Changing spilled pseudos to stack memory or their equivalences;
o Allocation stack memory changes the address displacement and
new iteration is needed.
Here is block diagram of LRA passes:
------------------------
--------------- | Undo inheritance for | ---------------
| Memory-memory | | spilled pseudos, | | New (and old) |
| move coalesce |<---| splits for pseudos got |<-- | pseudos |
--------------- | the same hard regs, | | assignment |
Start | | and optional reloads | ---------------
| | ------------------------ ^
V | ---------------- |
----------- V | Update virtual | |
| Remove |----> ------------>| register | |
| scratches | ^ | displacements | |
----------- | ---------------- |
| | |
| V New |
| ------------ pseudos -------------------
| |Constraints:| or insns | Inheritance/split |
| | RTL |--------->| transformations |
| | transfor- | | in EBB scope |
| substi- | mations | -------------------
| tutions ------------
| | No change
---------------- V
| Spilled pseudo | -------------------
| to memory |<----| Rematerialization |
| substitution | -------------------
----------------
| No susbtitions
V
-------------------------
| Hard regs substitution, |
| devirtalization, and |------> Finish
| restoring scratches got |
| memory |
-------------------------
To speed up the process:
o We process only insns affected by changes on previous
iterations;
o We don't use DFA-infrastructure because it results in much slower
compiler speed than a special IR described below does;
o We use a special insn representation for quick access to insn
info which is always *synchronized* with the current RTL;
o Insn IR is minimized by memory. It is divided on three parts:
o one specific for each insn in RTL (only operand locations);
o one common for all insns in RTL with the same insn code
(different operand attributes from machine descriptions);
o one oriented for maintenance of live info (list of pseudos).
o Pseudo data:
o all insns where the pseudo is referenced;
o live info (conflicting hard regs, live ranges, # of
references etc);
o data used for assigning (preferred hard regs, costs etc).
This file contains LRA driver, LRA utility functions and data, and
code for dealing with scratches. Dump bitmap SET with TITLE and BB INDEX.
References bitmap_empty_p(), count, EXECUTE_IF_SET_IN_BITMAP, i, and lra_dump_file.
Referenced by dump_candidates_and_remat_bb_data(), and lra_create_live_ranges_1().
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Dump all func insns in a slim form.
References dump_rtl_slim(), get_insns(), and NULL.
Referenced by lra_dump_insns_if_possible().
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Dump all func insns in a slim form with TITLE when the dump file is open and lra_verbose >=7.
References lra_dump_file, lra_dump_insns(), lra_verbose, and NULL.
Referenced by lra_constraints(), lra_inheritance(), lra_remat(), lra_split_hard_reg_for(), and lra_undo_inheritance().
Entry function to do final elimination if FINAL_P or to update elimination register offsets (FIRST_P if we are doing it the first time).
References bitmap_clear(), bitmap_empty_p(), bitmap_initialize(), bitmap_ior_into(), elimination_fp2sp_occured_p, elimination_map, EXECUTE_IF_SET_IN_BITMAP, lra_elim_table::from, gcc_assert, init_elimination(), lra_dump_file, lra_reg_info, NULL, NUM_ELIMINABLE_REGS, print_elim_table(), process_insn_for_elimination(), reg_eliminate, reg_obstack, timevar_pop(), timevar_push(), and update_reg_eliminate().
Referenced by lra(), and lra_constraints().
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Eliminate hard reg given by its location LOC.
References get_elimination(), lra_assert, lra_no_alloc_regs, NULL, REG_P, REGNO, TEST_HARD_REG_BIT, and lra_elim_table::to_rtx.
Referenced by in_class_p().
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Scan X and replace any eliminable registers (such as fp) with a replacement (such as sp) if SUBST_P, plus an offset. The offset is a change in the offset between the eliminable register and its substitution if UPDATE_P, or the full offset if FULL_P, or otherwise zero. If FULL_P, we also use the SP offsets for elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating offsets of register elimnable to SP. If UPDATE_SP_OFFSET is non-zero, don't use difference of the offset and the previous offset. MEM_MODE is the mode of an enclosing MEM. We need this to know how much to adjust a register for, e.g., PRE_DEC. Also, if we are inside a MEM, we are allowed to replace a sum of a hard register and the constant zero with the hard register, which we cannot do outside a MEM. In addition, we need to record the fact that a hard register is referenced outside a MEM. If we make full substitution to SP for non-null INSN, add the insn sp offset.
References alloc_reg_note(), alter_subreg(), CASE_CONST_ANY, CONST_INT_P, CONSTANT_P, current_function_decl, DEBUG_INSN_P, elimination_fp2sp_occured_p, form_sum(), lra_elim_table::from, lra_elim_table::from_rtx, gcc_assert, gcc_unreachable, gen_rtvec_v(), GET_CODE, get_elimination(), GET_MODE, GET_RTX_FORMAT, GET_RTX_LENGTH, i, INTVAL, known_eq, lra_assert, lra_eliminate_regs_1(), lra_get_insn_recog_data(), MEM_P, move_plus_up(), NULL, NULL_RTX, lra_elim_table::offset, paradoxical_subreg_p(), plus_constant(), poly_int_rtx_p(), lra_elim_table::previous_offset, REG_NOTE_KIND, REG_P, replace_equiv_address_nv(), SET, shallow_copy_rtx(), simplify_gen_binary(), simplify_gen_subreg(), stack_pointer_rtx, SUBREG_BYTE, SUBREG_REG, lra_elim_table::to, lra_elim_table::to_rtx, XEXP, XVEC, XVECEXP, and XVECLEN.
Referenced by eliminate_regs_in_insn(), get_equiv_with_elimination(), lra_eliminate_regs(), lra_eliminate_regs_1(), and remove_pseudos().
Target checks operands through operand predicates to recognize an insn. We should have a special precaution to generate add insns which are frequent results of elimination. Emit insns for x = y + z. X can be used to store intermediate values and should be not in Y and Z when we use X to store an intermediate value. Y + Z should form [base] [+ index[ * scale]] [ + disp] where base and index are registers, disp and scale are constants. Y should contain base if it is present, Z should contain disp if any. index[*scale] can be part of Y or Z.
References CONSTANT_P, delete_insns_since(), emit_add2_insn(), emit_add3_insn(), emit_move_insn(), expand_reg_data(), GET_CODE, get_last_insn(), GET_MODE, last, lra_assert, max_reg_num(), NULL, NULL_RTX, recog_memoized(), REG_P, XEXP, and y.
Referenced by base_plus_disp_to_reg(), and lra_emit_move().
Emit x := y, processing special case when y = u + v or y = u + v * scale + w through emit_add (Y can be an address which is base + index reg * scale + displacement in general case). X may be used as intermediate result therefore it should be not in Y.
References emit_insn(), emit_move_insn(), expand_reg_data(), GET_CODE, lra_curr_reload_num, lra_emit_add(), lra_reg_info, max_reg_num(), NULL_RTX, ORIGINAL_REGNO, REG_P, remove_insn_scratches(), rtx_equal_p(), XEXP, and y.
Referenced by check_and_process_move(), curr_insn_transform(), inherit_reload_reg(), insert_move_for_subreg(), match_reload(), process_addr_reg(), process_address_1(), and process_invariant_for_inheritance().
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Final change of pseudos got hard registers into the corresponding hard registers and removing temporary clobbers.
References alter_subregs(), cfun, const1_rtx, DEBUG_INSN_P, delete_insn(), FOR_BB_INSNS_SAFE, FOR_EACH_BB_FN, GET_CODE, i, INSN_P, lra_operand_data::is_operator, lra_assert, lra_get_insn_recog_data(), lra_get_regno_hard_regno(), lra_invalidate_insn_data(), lra_reg_info, LRA_TEMP_CLOBBER_P, lra_update_dup(), lra_update_operator_dups(), max_reg_num(), max_regno, lra_insn_reg::next, NONJUMP_INSN_P, NULL, lra_static_insn_data::operand, PATTERN(), REG_P, REGNO, lra_insn_reg::regno, regno_reg_rtx, SET, SET_DEST, SET_REGNO, SET_SRC, single_set(), and XEXP.
Referenced by lra().
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Return true if we have a pseudo assigned to hard frame pointer.
References add_to_hard_reg_set(), CLEAR_HARD_REG_SET, frame_pointer_needed, HARD_FRAME_POINTER_REGNUM, i, lra_reg_info, max_reg_num(), overlaps_hard_reg_set_p(), PSEUDO_REGNO_MODE, and reg_renumber.
Referenced by lra().
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Free all copies.
References copy_vec, lra_copy_pool, lra_reg_info, NULL, lra_copy::regno1, and lra_copy::regno2.
Referenced by lra_create_live_ranges_1().
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Return N-th (0, 1, ...) copy. If there is no copy, return NULL.
References copy_vec, and NULL.
Referenced by init_regno_assign_info().
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Return the current substitution hard register of the elimination of HARD_REGNO. If HARD_REGNO is not eliminable, return itself.
References elimination_map, NULL, and lra_elim_table::to.
Referenced by get_hard_regno(), get_reg_class(), and process_alt_operands().
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Return info about INSN. Set up the info if it is not done yet.
References INSN_CODE, INSN_UID(), lra_assert, lra_insn_recog_data_len, lra_set_insn_recog_data(), and NULL.
Referenced by calculate_gen_cands(), calculate_livein_cands(), call_used_input_regno_present_p(), cand_eq_p(), cand_hash(), cand_trans_fun(), combine_reload_insn(), create_cand(), create_cands(), curr_insn_transform(), do_remat(), eliminate_regs_in_insn(), get_live_on_other_edges(), inherit_in_ebb(), init_elimination(), lra_constrain_insn(), lra_constraints(), lra_eliminate_regs_1(), lra_final_code_change(), lra_invalidate_insn_regno_info(), lra_process_new_insns(), lra_set_used_insn_alternative(), lra_update_insn_recog_data(), lra_update_insn_regno_info(), operand_to_remat(), process_bb_lives(), reg_overlap_for_remat_p(), remove_inheritance_pseudos(), set_bb_regs(), setup_sp_offset(), spill_hard_reg_in_range(), update_ebb_live_info(), and update_scratch_ops().
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Return reg info of insn given by it UID.
References get_insn_recog_data_by_uid().
Referenced by spill_for().
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Return the hard register which given pseudo REGNO assigned to. Negative value means that the register got memory or we don't know allocation yet.
References reg_renumber, lra_insn_reg::regno, and resize_reg_info().
Referenced by assign_spill_hard_regs(), check_and_process_move(), contains_reg_p(), get_equiv(), get_hard_regno(), get_reg_class(), get_try_hard_regno(), lra_constraints(), lra_final_code_change(), lra_need_for_scratch_reg_p(), lra_need_for_spills_p(), lra_spill(), remove_pseudos(), simplify_operand_subreg(), spill_pseudos(), and update_pseudo_point().
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Entry function for inheritance/split pass.
References BB_END, BB_HEAD, bitmap_clear(), bitmap_initialize(), bitmap_ior_into(), bitmap_release(), cfun, check_only_regs, curr_usage_insns_check, df_get_live_in(), df_get_live_out(), ebb_global_regs, EBB_PROBABILITY_CUTOFF, EXIT_BLOCK_PTR_FOR_FN, find_fallthru_edge(), FOR_EACH_BB_FN, free(), i, basic_block_def::index, inherit_in_ebb(), invalid_invariant_regs, LABEL_P, live_regs, lra_constraint_new_regno_start, lra_dump_file, lra_dump_insns_if_possible(), lra_inheritance_iter, LRA_MAX_INHERITANCE_PASSES, basic_block_def::next_bb, NULL, reg_obstack, basic_block_def::succs, temp_bitmap, timevar_pop(), timevar_push(), and update_ebb_live_info().
Referenced by lra().
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lra-constraints.cc:
Initiate equivalences for LRA. As we keep original equivalences before any elimination, we need to make copies otherwise any change in insns might change the equivalences.
References copy_rtx(), i, ira_expand_reg_equiv(), ira_reg_equiv, max_reg_num(), and NULL_RTX.
Referenced by lra().
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Return the current size of the insn stack.
References lra_constraint_insn_stack.
Referenced by lra_constraints().
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Return TRUE if live ranges R1 and R2 intersect.
References lra_live_range::finish, lra_live_range::next, NULL, and lra_live_range::start.
Referenced by assign_stack_slot_num_and_sort_pseudos(), and lra_coalesce().
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Invalidate INSN related info used by LRA. The info should never be used after that.
References INSN_UID(), invalidate_insn_recog_data(), and lra_invalidate_insn_regno_info().
Referenced by curr_insn_transform(), lra_asm_insn_error(), lra_final_code_change(), lra_set_insn_deleted(), and spill_pseudos().
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Invalidate all reg info of INSN. Update common info about the invalidated registers.
References get_insn_freq(), invalidate_insn_data_regno_info(), and lra_get_insn_recog_data().
Referenced by lra_invalidate_insn_data().
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Finish live ranges data once per function.
References bitmap_clear(), finish_live_solver(), lra_live_range_pool, and temp_bitmap.
Referenced by lra().
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Initialize live ranges data once per function.
References bitmap_initialize(), initiate_live_solver(), reg_obstack, and temp_bitmap.
Referenced by lra().
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Merge *non-intersected* ranges R1 and R2 and returns the result. The function maintains the order of ranges and tries to minimize size of the result range list. Ranges R1 and R2 may not be used after the call.
References lra_live_range::finish, gcc_assert, last, lra_assert, lra_live_range_pool, lra_live_range::next, NULL, and lra_live_range::start.
Referenced by add_pseudo_to_slot(), and merge_pseudos().
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lra-spills.cc:
Return true if we need scratch reg assignments.
References i, ira_former_scratch_p(), lra_get_regno_hard_regno(), lra_reg_info, max_reg_num(), and max_regno.
Referenced by lra().
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Return true if we need to change some pseudos into memory.
References i, ira_former_scratch_p(), lra_get_regno_hard_regno(), lra_reg_info, max_reg_num(), and max_regno.
Referenced by lra().
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Take the last-inserted insns off the stack and return it.
References bitmap_clear_bit(), INSN_UID(), lra_constraint_insn_stack, and lra_constraint_insn_stack_bitmap.
Referenced by lra_constraints().
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Print live ranges R to file F.
Referenced by debug(), lra_debug_live_range_list(), and print_pseudo_live_ranges().
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Emit insns BEFORE before INSN and insns AFTER after INSN. Put the insns onto the stack. Print about emitting the insns with TITLE.
References BB_END, BB_HEAD, BLOCK_FOR_INSN(), cfun, copy_insn(), copy_reg_eh_region_note_forward(), dump_insn_slim(), dump_rtl_slim(), EDGE_CRITICAL_P, eliminate_regs_in_insn(), emit_insn(), emit_insn_after(), emit_insn_after_noloc(), emit_insn_before(), emit_insn_before_noloc(), end_sequence(), EXIT_BLOCK_PTR_FOR_FN, find_reg_note(), FOR_EACH_EDGE, get_insns(), get_last_insn(), insn_could_throw_p(), JUMP_P, LABEL_P, last, lra_assert, lra_dump_file, lra_get_insn_recog_data(), lra_push_insn(), NEXT_INSN(), NOTE_INSN_BASIC_BLOCK_P, NULL, NULL_RTX, PATTERN(), PREV_INSN(), print_dec(), push_insns(), remove_note(), setup_sp_offset(), and start_sequence().
Referenced by check_and_process_move(), curr_insn_transform(), do_remat(), inherit_in_ebb(), inherit_reload_reg(), process_invariant_for_inheritance(), remove_inheritance_pseudos(), simplify_operand_subreg(), and split_reg().
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Put INSN on the stack.
References lra_push_insn_1().
Referenced by lra_process_new_insns(), lra_push_insn_by_uid(), process_insn_for_elimination(), push_insns(), spill_pseudos(), and spill_pseudos().
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Put INSN on the stack and update its reg info.
References lra_push_insn_1().
Referenced by combine_reload_insn(), and remove_inheritance_pseudos().
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Put insn with UID on the stack.
References lra_push_insn().
Referenced by lra_assign(), and lra_constraints().
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Return true if register content is equal to VAL with OFFSET.
References known_eq, and lra_reg_info.
Referenced by find_hard_regno_for_1(), process_bb_lives(), and setup_live_pseudos_and_spill_after_risky_transforms().
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Entry point of the rematerialization sub-pass. Return true if we did any rematerialization.
References all_blocks, all_cands, bitmap_clear(), bitmap_initialize(), bitmap_set_bit, calculate_gen_cands(), calculate_global_remat_bb_data(), calculate_livein_cands(), calculate_local_reg_remat_bb_data(), cfun, create_cands(), create_remat_bb_data(), do_remat(), dump_candidates_and_remat_bb_data(), finish_cand_table(), finish_remat_bb_data(), FOR_ALL_BB_FN, free(), get_max_uid(), basic_block_def::index, initiate_cand_table(), insn_to_cand, insn_to_cand_activation, lra_dump_file, lra_dump_insns_if_possible(), LRA_MAX_REMATERIALIZATION_PASSES, lra_rematerialization_iter, max_reg_num(), max_regno, NULL, reg_obstack, regno_cands, subreg_regs, temp_bitmap, timevar_pop(), and timevar_push().
Referenced by lra().
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Recursive hash function for RTL X.
References abort, GET_CODE, GET_RTX_FORMAT, GET_RTX_LENGTH, i, lra_rtx_hash(), NUM_POLY_INT_COEFFS, REGNO, SUBREG_BYTE, SUBREG_REG, UINTVAL, XEXP, XINT, XLOC, XSTR, XVECEXP, XVECLEN, and XWINT.
Referenced by invariant_hash(), and lra_rtx_hash().
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Mark INSN deleted and invalidate the insn related info used by LRA.
References lra_invalidate_insn_data(), and SET_INSN_DELETED.
Referenced by check_and_process_move(), curr_insn_transform(), delete_move_and_clobber(), do_remat(), lra_asm_insn_error(), lra_coalesce(), lra_constraints(), lra_delete_dead_insn(), process_bb_lives(), process_invariant_for_inheritance(), and update_ebb_live_info().
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Set up and return info about INSN. Set up the info if it is not set up yet.
References ALL_ALTERNATIVES, asm_noperands(), CALL_INSN_FUNCTION_USAGE, CALL_P, check_and_expand_insn_recog_data(), collect_non_operand_hard_regs(), lra_operand_data::constraint, constraints, DEBUG_BIND_INSN_P, debug_bind_static_data, DEBUG_INSN_P, DEBUG_MARKER_INSN_P, debug_marker_static_data, decode_asm_operands(), gcc_assert, GET_CODE, get_preferred_alternatives(), get_static_insn_data(), lra_static_insn_data::hard_regs, i, INSN_CODE, insn_data, insn_extract(), INSN_UID(), INSN_VAR_LOCATION_LOC, lra_operand_data::is_address, lra_operand_data::is_operator, lra_assert, lra_insn_recog_data_pool, LRA_UNKNOWN_ALT, lra_operand_data::mode, n_alternatives(), lra_static_insn_data::n_dups, lra_static_insn_data::n_operands, n_operands, NULL, NULL_RTX, OP_IN, OP_INOUT, OP_OUT, lra_static_insn_data::operand, lra_static_insn_data::operand_alternative, PATTERN(), preprocess_constraints(), preprocess_insn_constraints(), recog_data, recog_memoized(), REG_NREGS, REG_P, REGNO, SET, SET_DEST, setup_operand_alternative(), lra_operand_data::strict_low, lra_operand_data::type, operand::type, XEXP, XVECEXP, and XVECLEN.
Referenced by lra_get_insn_recog_data().
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Set up for REGNO unique hold value.
References get_new_reg_value(), and lra_reg_info.
Referenced by curr_insn_transform(), and lra_coalesce().
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Set up that INSN is using alternative ALT now.
References lra_get_insn_recog_data().
Referenced by curr_insn_transform(), process_insn_for_elimination(), spill_pseudos(), and spill_pseudos().
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Set up that insn with UID is using alternative ALT now. The insn info should be already set up.
References check_and_expand_insn_recog_data(), lra_assert, and NULL.
Referenced by lra_assign(), and remove_inheritance_pseudos().
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Update REG_RENUMBER and other pseudo preferences by assignment of HARD_REGNO to pseudo REGNO and print about it if PRINT_P.
References curr_update_hard_regno_preference_check, hard_regno_nregs(), i, lra_assert, lra_dump_file, lra_hard_reg_usage, lra_reg_info, NULL, pseudo_prefix_title(), PSEUDO_REGNO_MODE, reg_renumber, lra_live_range::regno, and update_hard_regno_preference().
Referenced by assign_by_spills(), assign_hard_regno(), improve_inheritance(), lra_split_hard_reg_for(), and spill_for().
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Update the preference of HARD_REGNO for pseudo REGNO by PROFIT.
References lra_assert, lra_constraint_new_regno_start, lra_dump_file, lra_reg_info, and NULL.
Referenced by process_bb_lives(), and update_hard_regno_preference().
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Change spilled pseudos into memory or spill hard regs. Put changed insns on the constraint stack (these insns will be considered on the next constraint pass). The changed insns are all insns in which pseudos were changed.
References assign_mem_slot(), assign_spill_hard_regs(), assign_stack_local(), assign_stack_slot_num_and_sort_pseudos(), crtl, free(), i, ira_former_scratch_p(), lra_assert, lra_dump_file, lra_get_regno_hard_regno(), lra_reg_info, lra_update_fp2sp_elimination(), max_reg_num(), pseudo_slot::mem, pseudo_slot::next, NULL, NULL_RTX, print_dec(), pseudo_slots, qsort, regno_freq_compare(), regs_num, SIGNED, slots, slots_num, spill_hard_reg, and spill_pseudos().
Referenced by lra().
Process reload pseudos which did not get a hard reg, split a hard reg live range in live range of a reload pseudo, and then return TRUE. Otherwise, return FALSE. When FAIL_P is TRUE and if we did not split a hard reg live range for failed reload pseudos, report an error and modify related asm insns.
References asm_noperands(), bitmap_bit_p, bitmap_clear(), bitmap_initialize(), bitmap_ior(), bitmap_ior_into(), bitmap_set_bit, BLOCK_FOR_INSN(), error(), EXECUTE_IF_SET_IN_BITMAP, fatal_insn, find_reload_regno_insns(), i, lra_insn_recog_data::insn, INSN_UID(), ira_class_hard_regs, last, lra_asm_insn_error(), lra_assignment_iter, lra_constraint_new_regno_start, lra_dump_file, lra_dump_insns_if_possible(), lra_get_allocno_class(), lra_inheritance_pseudos, lra_optional_reload_pseudos, lra_reg_info, lra_setup_reg_renumber(), lra_split_regs, lra_subreg_reload_pseudos, max_reg_num(), max_regno, NEXT_INSN(), non_reload_pseudos, NULL, PATTERN(), reg_obstack, reg_renumber, lra_insn_reg::regno, and spill_hard_reg_in_range().
Referenced by lra().
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Replace all references to register OLD_REGNO in *LOC with pseudo register NEW_REG. Try to simplify subreg of constant if SUBREG_P. DEBUG_P is if LOC is within a DEBUG_INSN. Return true if any change was made.
References const0_rtx, CONST_SCALAR_INT_P, CONSTANT_P, gen_rtx_SUBREG(), GET_CODE, GET_MODE, GET_RTX_FORMAT, GET_RTX_LENGTH, i, lra_substitute_pseudo(), NULL_RTX, partial_subreg_p(), REG_P, REGNO, SCALAR_INT_MODE_P, simplify_subreg(), simplify_unary_operation(), SUBREG_BYTE, subreg_lowpart_offset(), lra_insn_reg::subreg_p, SUBREG_REG, subst(), XEXP, XVECEXP, XVECLEN, and y.
Referenced by inherit_reload_reg(), lra_substitute_pseudo(), lra_substitute_pseudo_within_insn(), and split_reg().
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Call lra_substitute_pseudo within an insn. Try to simplify subreg of constant if SUBREG_P. This won't update the insn ptr, just the contents of the insn.
References DEBUG_INSN_P, lra_substitute_pseudo(), and lra_insn_reg::subreg_p.
Referenced by inherit_reload_reg(), process_bb_lives(), remove_inheritance_pseudos(), and undo_optional_reloads().
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Entry function for undoing inheritance/split transformation. Return true if we did any RTL change in this pass.
References bitmap_set_bit, EXECUTE_IF_SET_IN_BITMAP, lra_dump_file, lra_dump_insns_if_possible(), lra_inheritance_pseudos, LRA_MAX_INHERITANCE_PASSES, lra_reg_info, lra_split_regs, lra_undo_inheritance_iter, NULL, NULL_RTX, reg_obstack, REG_P, reg_renumber, REGNO, remove_inheritance_pseudos(), remove_pseudos(), and undo_optional_reloads().
Referenced by lra().
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Update REGNO's biggest recorded mode so that it includes a reference in mode MODE.
References gcc_checking_assert, GET_MODE_SIZE(), HARD_REGISTER_NUM_P, lra_reg_info, partial_subreg_p(), and reg_raw_mode.
Referenced by merge_pseudos(), new_insn_reg(), and process_bb_lives().
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Update insn operands which are duplication of NOP operand. The insn is represented by its LRA internal representation ID.
References lra_static_insn_data::dup_num, i, and lra_static_insn_data::n_dups.
Referenced by curr_insn_transform(), lra_final_code_change(), match_reload(), and swap_operands().
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Update insn operands which are duplication of operands whose numbers are in array of NOPS (with end marker -1). The insn is represented by its LRA internal representation ID.
References lra_static_insn_data::dup_num, i, and lra_static_insn_data::n_dups.
Referenced by combine_reload_insn(), and match_reload().
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Update frame pointer to stack pointer elimination if we started with permitted frame pointer elimination and now target reports that we can not do this elimination anymore. Record spilled pseudos in SPILLED_PSEUDOS unless it is null, and return the recorded pseudos number.
References add_to_hard_reg_set(), CLEAR_HARD_REG_SET, elimination_fp2sp_occured_p, frame_pointer_needed, lra_elim_table::from, gcc_assert, HARD_FRAME_POINTER_REGNUM, lra_dump_file, NULL, NUM_ELIMINABLE_REGS, reg_eliminate, setup_can_eliminate(), spill_pseudos(), spilled_pseudos, targetm, and lra_elim_table::to.
Referenced by lra_spill().
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Update all the insn info about INSN. It is usually called when something in the insn was changed. Return the updated info.
References asm_noperands(), check_and_expand_insn_recog_data(), check_bool_attrs(), lra_operand_data::constraint, constraints, DEBUG_INSN_P, decode_asm_operands(), get_insn_freq(), i, INSN_CODE, insn_extract(), INSN_UID(), invalidate_insn_data_regno_info(), invalidate_insn_recog_data(), lra_operand_data::is_operator, lra_assert, lra_get_insn_recog_data(), LRA_UNKNOWN_ALT, lra_operand_data::mode, lra_static_insn_data::n_dups, data::n_operands, lra_static_insn_data::n_operands, NULL, OP_IN, OP_INOUT, OP_OUT, lra_static_insn_data::operand, PATTERN(), recog_data, and lra_operand_data::type.
Referenced by eliminate_regs_in_insn(), process_insn_for_elimination(), and remove_pseudos().
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Set up insn reg info of INSN. Update common reg info from reg info of INSN.
References add_regs_to_insn_regno_info(), CALL_INSN_FUNCTION_USAGE, CALL_P, lra_operand_data::early_clobber_alts, GET_CODE, get_insn_freq(), i, INSN_P, invalidate_insn_data_regno_info(), lra_get_insn_recog_data(), MEM_P, lra_static_insn_data::n_operands, NONDEBUG_INSN_P, NULL_RTX, OP_IN, OP_OUT, lra_static_insn_data::operand, PATTERN(), setup_insn_reg_info(), lra_operand_data::type, and XEXP.
Referenced by combine_reload_insn(), curr_insn_transform(), do_remat(), inherit_reload_reg(), lra_coalesce(), lra_constraints(), lra_push_insn_1(), process_bb_lives(), process_insn_for_elimination(), remove_inheritance_pseudos(), split_reg(), and undo_optional_reloads().
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Process operator duplications in insn with ID. We do it after the operands processing. Generally speaking, we could do this probably simultaneously with operands processing because a common practice is to enumerate the operators after their operands.
References lra_static_insn_data::dup_num, i, lra_operand_data::is_operator, lra_static_insn_data::n_dups, and lra_static_insn_data::operand.
Referenced by curr_insn_transform(), and lra_final_code_change().
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Update offset from pseudos with VAL by INCR.
References i, lra_reg_info, and max_reg_num().
Referenced by update_reg_eliminate().
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Update and return stack pointer OFFSET after processing X.
References curr_sp_change, mark_not_eliminable(), and lra_elim_table::offset.
Referenced by setup_sp_offset().
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Split a hard reg for reload pseudo REGNO having RCLASS and living in the range [FROM, TO]. Return true if did a split. Otherwise, return false.
References bitmap_bit_p, EXECUTE_IF_SET_IN_BITMAP, lra_static_insn_data::hard_regs, i, INSN_P, INSN_UID(), ira_class_hard_regs, ira_class_hard_regs_num, lra_assert, lra_get_insn_recog_data(), lra_no_alloc_regs, lra_reg_info, lra_insn_reg::next, NEXT_INSN(), NULL, lra_insn_reg::regno, SET_HARD_REG_BIT, split_reg(), and TEST_HARD_REG_BIT.
Referenced by lra_split_hard_reg_for().
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True if we should during assignment sub-pass check assignment correctness for all pseudos and spill some of them to correct conflicts. It can be necessary when we substitute equiv which needs checking register allocation correctness because the equivalent value contains allocatable hard registers, or when we restore multi-register pseudo, or when we change the insn code and its operand became INOUT operand when it was IN one before.
Referenced by inherit_in_ebb(), lra_assign(), lra_constraints(), process_insn_for_elimination(), setup_live_pseudos_and_spill_after_risky_transforms(), and split_reg().
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True if we found an asm error.
Referenced by curr_insn_transform(), lra(), lra_asm_insn_error(), and lra_assign().
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lra-assigns.cc:
Assign reload pseudos. Copyright (C) 2010-2025 Free Software Foundation, Inc. Contributed by Vladimir Makarov <vmakarov@redhat.com>. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>.
This file's main objective is to assign hard registers to reload pseudos. It also tries to allocate hard registers to other pseudos, but at a lower priority than the reload pseudos. The pass does not transform the RTL. We must allocate a hard register to every reload pseudo. We try to increase the chances of finding a viable allocation by assigning the pseudos in order of fewest available hard registers first. If we still fail to find a hard register, we spill other (non-reload) pseudos in order to make room. find_hard_regno_for finds hard registers for allocation without spilling. spill_for does the same with spilling. Both functions use a cost model to determine the most profitable choice of hard and spill registers. Once we have finished allocating reload pseudos, we also try to assign registers to other (non-reload) pseudos. This is useful if hard registers were freed up by the spilling just described. We try to assign hard registers by collecting pseudos into threads. These threads contain reload and inheritance pseudos that are connected by copies (move insns). Doing this improves the chances of pseudos in the thread getting the same hard register and, as a result, of allowing some move insns to be deleted. When we assign a hard register to a pseudo, we decrease the cost of using the same hard register for pseudos that are connected by copies. If two hard registers have the same frequency-derived cost, we prefer hard registers with higher priorities. The mapping of registers to priorities is controlled by the register_priority target hook. For example, x86-64 has a few register priorities: hard registers with and without REX prefixes have different priorities. This permits us to generate smaller code as insns without REX prefixes are shorter. If a few hard registers are still equally good for the assignment, we choose the least used hard register. It is called leveling and may be profitable for some targets. Only insns with changed allocation pseudos are processed on the next constraint pass. The pseudo live-ranges are used to find conflicting pseudos. For understanding the code, it is important to keep in mind that inheritance, split, and reload pseudos created since last constraint pass have regno >= lra_constraint_new_regno_start. Inheritance and split pseudos created on any pass are in the corresponding bitmaps. Inheritance and split pseudos since the last constraint pass have also the corresponding non-negative restore_regno.
Current iteration number of the pass and current iteration number of the pass after the latest spill pass when any former reload pseudo was spilled.
Referenced by lra(), lra_assign(), and lra_split_hard_reg_for().
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Referenced by lra(), and lra_assign().
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Avoid spilling pseudos with regno more than the following value if it is possible.
Referenced by lra(), and spill_for().
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lra-coalesce.cc:
The current iteration (1, 2, ...) of the coalescing pass.
Referenced by lra(), and lra_coalesce().
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The current iteration number of this LRA pass.
Referenced by lra(), lra_constraints(), and process_alt_operands().
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Start of reload pseudo regnos before the new spill pass.
Referenced by assign_by_spills(), create_cands(), create_live_range_start_chains(), find_hard_regno_for_1(), improve_inheritance(), inherit_in_ebb(), init_live_reload_and_inheritance_pseudos(), init_regno_assign_info(), lra(), lra_constraints(), lra_inheritance(), lra_setup_reload_pseudo_preferenced_hard_reg(), lra_split_hard_reg_for(), must_not_spill_p(), process_bb_lives(), process_copy_to_form_thread(), pseudo_prefix_title(), reload_pseudo_compare_func(), setup_live_pseudos_and_spill_after_risky_transforms(), and spill_for().
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The number of emitted reload insns so far.
Referenced by lra(), lra_constraints(), and lra_emit_move().
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lra.cc:
File used for output of LRA debug information.
Referenced by assign_by_spills(), assign_spill_hard_regs(), check_and_process_move(), combine_reload_insn(), compress_live_ranges(), curr_insn_transform(), dump_candidates_and_remat_bb_data(), equiv_address_substitution(), get_reload_reg(), improve_inheritance(), inherit_in_ebb(), inherit_reload_reg(), lra(), lra_assign(), lra_change_class(), lra_coalesce(), lra_constraints(), lra_create_copy(), lra_create_live_ranges(), lra_create_live_ranges_1(), lra_create_new_reg_with_unique_value(), lra_dump_bitmap_with_title(), lra_dump_insns_if_possible(), lra_eliminate(), lra_inheritance(), lra_process_new_insns(), lra_remat(), lra_setup_reg_renumber(), lra_setup_reload_pseudo_preferenced_hard_reg(), lra_spill(), lra_split_hard_reg_for(), lra_undo_inheritance(), lra_update_fp2sp_elimination(), print_curr_insn_alt(), process_addr_reg(), process_alt_operands(), process_bb_lives(), process_invariant_for_inheritance(), remove_inheritance_pseudos(), remove_insn_scratches(), remove_pseudos(), remove_some_program_points_and_update_live_ranges(), setup_live_pseudos_and_spill_after_risky_transforms(), spill_for(), spill_pseudos(), spill_pseudos(), split_reg(), undo_optional_reloads(), update_ebb_live_info(), and update_reg_eliminate().
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True if we split hard reg after the last constraint sub-pass.
Referenced by lra(), and lra_assign().
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Accumulated execution frequency of all references for each hard register.
Referenced by find_hard_regno_for_1(), lra_create_live_ranges_1(), lra_setup_reg_renumber(), process_bb_lives(), and setup_live_pseudos_and_spill_after_risky_transforms().
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Current number of inheritance/split iteration.
Referenced by improve_inheritance(), lra(), and lra_inheritance().
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Inheritance pseudo regnos before the new spill pass.
Referenced by assign_by_spills(), improve_inheritance(), inherit_reload_reg(), lra(), lra_split_hard_reg_for(), lra_undo_inheritance(), must_not_spill_p(), process_invariant_for_inheritance(), pseudo_prefix_title(), remove_inheritance_pseudos(), and undo_optional_reloads().
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Map INSN_UID -> the insn recog data (NULL if unknown).
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The current length of the following array.
Referenced by check_and_expand_insn_recog_data(), finish_insn_recog_data(), init_insn_recog_data(), and lra_get_insn_recog_data().
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lra-lives.cc:
Build live ranges for pseudos. Copyright (C) 2010-2025 Free Software Foundation, Inc. Contributed by Vladimir Makarov <vmakarov@redhat.com>. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>.
This file contains code to build pseudo live-ranges (analogous structures used in IRA, so read comments about the live-ranges there) and other info necessary for other passes to assign hard-registers to pseudos, coalesce the spilled pseudos, and assign stack memory slots to spilled pseudos.
Program points are enumerated by numbers from range 0..LRA_LIVE_MAX_POINT-1. There are approximately two times more program points than insns. Program points are places in the program where liveness info can be changed. In most general case (there are more complicated cases too) some program points correspond to places where input operand dies and other ones correspond to places where output operands are born.
Referenced by assign_spill_hard_regs(), create_live_range_start_chains(), init_live_reload_and_inheritance_pseudos(), init_lives(), lra_create_live_ranges_1(), and remove_some_program_points_and_update_live_ranges().
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The number of the current live range pass.
Referenced by lra(), and lra_create_live_ranges_1().
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Start of pseudo regnos before the LRA.
Referenced by find_hard_regno_for(), lra(), and match_reload().
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Hard registers currently not available for allocation. It can changed after some hard registers become not eliminable.
Referenced by assign_spill_hard_regs(), contains_reg_p(), enough_allocatable_hard_regs_p(), find_hard_regno_for_1(), in_class_p(), inherit_in_ebb(), lra(), lra_eliminate_reg_if_possible(), need_for_split_p(), process_alt_operands(), prohibited_class_reg_set_mode_p(), setup_live_pseudos_and_spill_after_risky_transforms(), simplify_operand_subreg(), spill_hard_reg_in_range(), spill_pseudos(), and update_reg_eliminate().
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Reload pseudo regnos before the new assignment pass which still can be spilled after the assignment pass as memory is also accepted in insns for the reload pseudos.
Referenced by assign_by_spills(), combine_reload_insn(), curr_insn_transform(), lra(), lra_split_hard_reg_for(), must_not_spill_p(), pseudo_prefix_title(), and undo_optional_reloads().
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A pseudo of Pmode.
Referenced by eliminate_regs_in_insn(), and lra().
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The start of the above vector elements.
Referenced by lra_create_live_ranges_1(), next_program_point(), and remove_some_program_points_and_update_live_ranges().
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References to the common info about each register.
Common info about each register.
Referenced by add_pseudo_to_slot(), add_regs_to_insn_regno_info(), assign_by_spills(), assign_hard_regno(), assign_mem_slot(), assign_spill_hard_regs(), assign_stack_slot_num_and_sort_pseudos(), assign_temporarily(), check_pseudos_live_through_calls(), create_live_range_start_chains(), curr_insn_transform(), expand_reg_info(), find_all_spills_for(), find_hard_regno_for_1(), find_reload_regno_insns(), finish_reg_info(), fix_bb_live_info(), improve_inheritance(), inherit_reload_reg(), init_live_reload_and_inheritance_pseudos(), init_reg_info(), init_regno_assign_info(), initialize_lra_reg_info_element(), insert_in_live_range_start_chain(), invalidate_insn_data_regno_info(), lra_assign(), lra_assign_reg_val(), lra_clear_live_ranges(), lra_coalesce(), lra_constraints(), lra_create_copy(), lra_create_live_ranges_1(), lra_create_new_reg_with_unique_value(), lra_eliminate(), lra_emit_move(), lra_final_code_change(), lra_fp_pseudo_p(), lra_free_copies(), lra_need_for_scratch_reg_p(), lra_need_for_spills_p(), lra_reg_val_equal_p(), lra_set_regno_unique_value(), lra_setup_reg_renumber(), lra_setup_reload_pseudo_preferenced_hard_reg(), lra_spill(), lra_split_hard_reg_for(), lra_undo_inheritance(), lra_update_biggest_mode(), lra_update_reg_val_offset(), make_hard_regno_dead(), mark_pseudo_dead(), merge_pseudos(), multi_block_pseudo_p(), multiple_insn_refs_p(), need_for_split_p(), print_pseudo_live_ranges(), process_alt_operands(), process_bb_lives(), process_invariant_for_inheritance(), pseudo_compare_func(), pseudo_reg_slot_compare(), regno_freq_compare(), regno_val_use_in(), reload_pseudo_compare_func(), remove_inheritance_pseudos(), remove_pseudos(), remove_some_program_points_and_update_live_ranges(), setup_insn_reg_info(), setup_live_pseudos_and_spill_after_risky_transforms(), spill_for(), spill_hard_reg_in_range(), spill_pseudos(), spill_pseudos(), split_reg(), undo_optional_reloads(), update_hard_regno_preference(), update_lives(), update_pseudo_point(), and update_reg_eliminate().
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True if we should try spill into registers of different classes instead of memory.
Referenced by assign_spill_hard_regs(), lra(), setup_reg_spill_flag(), and spill_pseudos().
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Split regnos before the new spill pass.
Referenced by assign_by_spills(), lra(), lra_split_hard_reg_for(), lra_undo_inheritance(), must_not_spill_p(), pseudo_prefix_title(), remove_inheritance_pseudos(), and split_reg().
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Pseudo regnos used for subreg reloads before the new assignment pass. Such pseudos still can be spilled after the assignment pass.
Referenced by assign_by_spills(), lra(), lra_split_hard_reg_for(), must_not_spill_p(), pseudo_prefix_title(), and simplify_operand_subreg().
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This page contains code to undo failed inheritance/split transformations.
Current number of iteration undoing inheritance/split.
Referenced by curr_insn_transform(), lra(), and lra_undo_inheritance().
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How verbose should be the debug information.
Referenced by lra(), and lra_dump_insns_if_possible().
