GCC Middle and Back End API Reference
lra-int.h File Reference
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Data Structures

struct  lra_live_range
struct  lra_copy
class  lra_reg
struct  lra_operand_data
struct  lra_insn_reg
struct  lra_static_insn_data
class  lra_insn_recog_data


#define lra_assert(c)   gcc_checking_assert (c)
#define LRA_UNKNOWN_ALT   -1
#define LRA_TEMP_CLOBBER_P(x)    (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
#define LRA_MAX_REJECT   600


typedef struct lra_live_rangelra_live_range_t
typedef struct lra_copylra_copy_t
typedef class lra_insn_recog_datalra_insn_recog_data_t


void lra_dump_bitmap_with_title (const char *, bitmap, int)
hashval_t lra_rtx_hash (rtx x)
void lra_push_insn (rtx_insn *)
void lra_push_insn_by_uid (unsigned int)
void lra_push_insn_and_update_insn_regno_info (rtx_insn *)
rtx_insnlra_pop_insn (void)
unsigned int lra_insn_stack_length (void)
rtx lra_create_new_reg (machine_mode, rtx, enum reg_class, HARD_REG_SET *, const char *)
rtx lra_create_new_reg_with_unique_value (machine_mode, rtx, enum reg_class, HARD_REG_SET *, const char *)
void lra_set_regno_unique_value (int)
void lra_invalidate_insn_data (rtx_insn *)
void lra_set_insn_deleted (rtx_insn *)
void lra_delete_dead_insn (rtx_insn *)
void lra_emit_add (rtx, rtx, rtx)
void lra_emit_move (rtx, rtx)
void lra_update_dups (lra_insn_recog_data_t, signed char *)
void lra_asm_insn_error (rtx_insn *insn)
void lra_dump_insns (FILE *f)
void lra_dump_insns_if_possible (const char *title)
void lra_process_new_insns (rtx_insn *, rtx_insn *, rtx_insn *, const char *)
bool lra_substitute_pseudo (rtx *, int, rtx, bool, bool)
bool lra_substitute_pseudo_within_insn (rtx_insn *, int, rtx, bool)
lra_insn_recog_data_t lra_set_insn_recog_data (rtx_insn *)
lra_insn_recog_data_t lra_update_insn_recog_data (rtx_insn *)
void lra_set_used_insn_alternative (rtx_insn *, int)
void lra_set_used_insn_alternative_by_uid (int, int)
void lra_invalidate_insn_regno_info (rtx_insn *)
void lra_update_insn_regno_info (rtx_insn *)
struct lra_insn_reglra_get_insn_regs (int)
void lra_free_copies (void)
void lra_create_copy (int, int, int)
lra_copy_t lra_get_copy (int)
void lra_init_equiv (void)
int lra_constraint_offset (int, machine_mode)
bool lra_constrain_insn (rtx_insn *)
bool lra_constraints (bool)
void lra_constraints_init (void)
void lra_constraints_finish (void)
bool spill_hard_reg_in_range (int, enum reg_class, rtx_insn *, rtx_insn *)
void lra_inheritance (void)
bool lra_undo_inheritance (void)
void lra_create_live_ranges (bool, bool)
lra_live_range_t lra_copy_live_range_list (lra_live_range_t)
lra_live_range_t lra_merge_live_ranges (lra_live_range_t, lra_live_range_t)
bool lra_intersected_live_ranges_p (lra_live_range_t, lra_live_range_t)
void lra_print_live_range_list (FILE *, lra_live_range_t)
void debug (lra_live_range &ref)
void debug (lra_live_range *ptr)
void lra_debug_live_range_list (lra_live_range_t)
void lra_debug_pseudo_live_ranges (int)
void lra_debug_live_ranges (void)
void lra_clear_live_ranges (void)
void lra_live_ranges_init (void)
void lra_live_ranges_finish (void)
void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int)
void lra_setup_reg_renumber (int, int, bool)
bool lra_assign (bool &)
bool lra_split_hard_reg_for (void)
bool lra_coalesce (void)
bool lra_need_for_scratch_reg_p (void)
bool lra_need_for_spills_p (void)
void lra_spill (void)
void lra_final_code_change (void)
bool lra_remat (void)
void lra_debug_elim_table (void)
int lra_get_elimination_hard_regno (int)
rtx lra_eliminate_regs_1 (rtx_insn *, rtx, machine_mode, bool, bool, poly_int64, bool)
void eliminate_regs_in_insn (rtx_insn *insn, bool, bool, poly_int64)
int lra_update_fp2sp_elimination (int *spilled_pseudos)
void lra_eliminate (bool, bool)
poly_int64 lra_update_sp_offset (rtx, poly_int64)
void lra_eliminate_reg_if_possible (rtx *)
int lra_get_regno_hard_regno (int regno)
void lra_change_class (int regno, enum reg_class new_class, const char *title, bool nl_p)
void lra_update_dup (lra_insn_recog_data_t id, int nop)
void lra_update_operator_dups (lra_insn_recog_data_t id)
lra_insn_recog_data_t lra_get_insn_recog_data (rtx_insn *insn)
void lra_update_reg_val_offset (int val, poly_int64 incr)
bool lra_reg_val_equal_p (int regno, int val, poly_int64 offset)
void lra_assign_reg_val (int from, int to)
void lra_update_biggest_mode (int regno, machine_mode mode)


class lra_reglra_reg_info
HARD_REG_SET hard_regs_spilled_into
int lra_verbose
bool lra_hard_reg_split_p
bool lra_asm_error_p
bool lra_reg_spill_p
HARD_REG_SET lra_no_alloc_regs
int lra_insn_recog_data_len
int lra_curr_reload_num
int lra_new_regno_start
int lra_constraint_new_regno_start
int lra_bad_spill_regno_start
rtx lra_pmode_pseudo
bitmap_head lra_inheritance_pseudos
bitmap_head lra_split_regs
bitmap_head lra_subreg_reload_pseudos
bitmap_head lra_optional_reload_pseudos
int lra_constraint_iter
bool check_and_force_assignment_correctness_p
int lra_inheritance_iter
int lra_undo_inheritance_iter
int lra_live_max_point
int * lra_point_freq
int lra_hard_reg_usage [FIRST_PSEUDO_REGISTER]
int lra_live_range_iter
int lra_assignment_iter
int lra_assignment_iter_after_spill
int lra_coalesce_iter
int lra_rematerialization_iter

Macro Definition Documentation

◆ lra_assert

#define lra_assert ( c)    gcc_checking_assert (c)
Local Register Allocator (LRA) intercommunication header file.
   Copyright (C) 2010-2024 Free Software Foundation, Inc.
   Contributed by Vladimir Makarov <vmakarov@redhat.com>.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see

Referenced by add_to_inherit(), alter_subregs(), assign_by_spills(), assign_hard_regno(), assign_mem_slot(), assign_spill_hard_regs(), base_plus_disp_to_reg(), base_to_reg(), check_and_process_move(), check_rtl(), check_secondary_memory_needed_p(), coalescable_pseudo_p(), curr_insn_transform(), delete_move_and_clobber(), eliminate_regs_in_insn(), emit_add3_insn(), find_hard_regno_for_1(), get_elimination(), get_insn_recog_data_by_uid(), get_live_on_other_edges(), get_reload_reg(), get_static_insn_data(), improve_inheritance(), inherit_reload_reg(), invalidate_insn_data_regno_info(), invalidate_insn_recog_data(), lra_change_class(), lra_coalesce(), lra_constraint_offset(), lra_constraints(), lra_create_copy(), lra_create_live_ranges(), lra_create_live_ranges_1(), lra_create_new_reg_with_unique_value(), lra_eliminate_reg_if_possible(), lra_eliminate_regs_1(), lra_emit_add(), lra_final_code_change(), lra_get_insn_recog_data(), lra_merge_live_ranges(), lra_process_new_insns(), lra_set_insn_recog_data(), lra_set_used_insn_alternative_by_uid(), lra_setup_reg_renumber(), lra_setup_reload_pseudo_preferenced_hard_reg(), lra_spill(), lra_update_insn_recog_data(), make_hard_regno_dead(), make_hard_regno_live(), mark_pseudo_dead(), mark_pseudo_live(), match_reload(), need_for_call_save_p(), need_for_split_p(), process_address_1(), process_alt_operands(), process_copy_to_form_thread(), process_invariant_for_inheritance(), prohibited_class_reg_set_mode_p(), reload_pseudo_compare_func(), remove_inheritance_pseudos(), remove_some_program_points_and_update_live_ranges(), setup_live_pseudos_and_spill_after_risky_transforms(), setup_operand_alternative(), simple_move_p(), simplify_operand_subreg(), spill_for(), spill_hard_reg_in_range(), spill_pseudos(), split_reg(), update_pseudo_point(), update_reg_eliminate(), and valid_address_p().


Cost factor for each additional reload and maximal cost reject for
insn reloads.  One might ask about such strange numbers.  Their
values occurred historically from former reload pass.   

Referenced by process_alt_operands().


Maximum allowed number of assignment pass iterations after the
latest spill pass when any former reload pseudo was spilled.  It is
for preventing LRA cycling in a bug case.   

Referenced by lra_assign().


The maximal number of inheritance/split passes in LRA.  It should
be more 1 in order to perform caller saves transformations and much
less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
as permitted constraint passes in some complicated cases.  The
first inheritance/split pass has a biggest impact on generated code
quality.  Each subsequent affects generated code in less degree.
For example, the 3rd pass does not change generated SPEC2000 code
at all on x86-64.   

Referenced by curr_insn_transform(), improve_inheritance(), lra(), lra_inheritance(), and lra_undo_inheritance().


The parameter used to prevent infinite reloading for an insn.  Each
insn operands might require a reload and, if it is a memory, its
base and index registers might require a reload too.      

Referenced by add_to_inherit(), get_reload_reg(), and match_reload().


#define LRA_MAX_REJECT   600

Referenced by process_alt_operands().


Analogous macro to the above one but for rematerialization.   

Referenced by lra(), and lra_remat().




#define LRA_TEMP_CLOBBER_P ( x)     (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
Whether the clobber is used temporary in LRA.   

Referenced by lra_final_code_change(), and match_reload().


Typedef Documentation

◆ lra_copy_t

◆ lra_insn_recog_data_t

◆ lra_live_range_t

Function Documentation

◆ debug() [1/2]

void debug ( lra_live_range & ref)

◆ debug() [2/2]

void debug ( lra_live_range * ptr)

References debug, and ggc_alloc().

◆ eliminate_regs_in_insn()

void eliminate_regs_in_insn ( rtx_insn * insn,
bool replace_p,
bool first_p,
poly_int64 update_sp_offset )
Scan INSN and eliminate all eliminable hard registers in it.

If REPLACE_P is true, do the replacement destructively.  Also
delete the insn as dead it if it is setting an eliminable register.

If REPLACE_P is false, just update the offsets while keeping the
base register the same.  If FIRST_P, use the sp offset for
elimination to sp.  Otherwise, use UPDATE_SP_OFFSET for this.  If
UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
and the previous offset.  Attach the note about used elimination
for insns setting frame pointer to update elimination easy (without
parsing already generated elimination insns to find offset
previously used) in future.   

References asm_noperands(), DEBUG_INSN_P, gen_lowpart, GET_CODE, get_elimination(), GET_MODE, ggc_alloc(), have_addptr3_insn(), i, insn_data, ira_reg_equiv, ira_reg_equiv_len, known_eq, lra_assert, lra_eliminate_regs_1(), lra_get_insn_recog_data(), lra_pmode_pseudo, lra_update_insn_recog_data(), NULL, NULL_RTX, NUM_ELIMINABLE_REGS, offset, OP_IN, PATTERN(), plus_constant(), poly_int_rtx_p(), recog_memoized(), reg_eliminate, REG_P, REGNO, SET_DEST, SET_SRC, single_set(), stack_pointer_rtx, subreg_lowpart_p(), SUBREG_REG, trunc_int_for_mode(), validate_change(), and XEXP.

Referenced by change_sp_offset(), lra_process_new_insns(), and process_insn_for_elimination().

◆ lra_asm_insn_error()

void lra_asm_insn_error ( rtx_insn * insn)

◆ lra_assign()

bool lra_assign ( bool & fails_p)
Entry function to assign hard registers to new reload pseudos
starting with LRA_CONSTRAINT_NEW_REGNO_START (by possible spilling
of old pseudos) and possibly to the old pseudos.  The function adds
what insns to process for the next constraint pass.     Those are all
insns who contains non-reload and non-inheritance pseudos with
changed allocation.

Return true if we did not spill any non-reload and non-inheritance
pseudos.  Set up FAILS_P if we failed to assign hard registers to
all reload pseudos.   

References all_spilled_pseudos, assign_by_spills(), bitmap_clear(), bitmap_initialize(), bitmap_ior_into(), changed_pseudo_bitmap, check_and_force_assignment_correctness_p, create_live_range_start_chains(), EXECUTE_IF_SET_IN_BITMAP, finish_live_range_start_chains(), finish_live_reload_and_inheritance_pseudos(), finish_lives(), finish_regno_assign_info(), former_reload_pseudo_spill_p, free(), gcc_unreachable, ggc_alloc(), i, init_live_reload_and_inheritance_pseudos(), init_lives(), init_regno_assign_info(), internal_error(), lra_asm_error_p, lra_assignment_iter, lra_assignment_iter_after_spill, lra_dump_file, lra_get_allocno_class(), lra_hard_reg_split_p, LRA_MAX_ASSIGNMENT_ITERATION_NUMBER, lra_push_insn_by_uid(), lra_reg_info, lra_set_used_insn_alternative_by_uid(), max_reg_num(), max_regno, NULL, NULL_RTX, overlaps_hard_reg_set_p(), PSEUDO_REGNO_MODE, r, reg_obstack, reg_renumber, regno_allocno_class_array, regno_live_length, setup_live_pseudos_and_spill_after_risky_transforms(), sorted_pseudos, sorted_reload_pseudos, timevar_pop(), and timevar_push().

Referenced by lra().

◆ lra_assign_reg_val()

void lra_assign_reg_val ( int from,
int to )
Assign value of register FROM to TO.   

References lra_reg_info, lra_reg::offset, and lra_reg::val.

Referenced by lra_create_new_reg(), and match_reload().

◆ lra_change_class()

void lra_change_class ( int regno,
enum reg_class new_class,
const char * title,
bool nl_p )
Change class of pseudo REGNO to NEW_CLASS.  Print info about it
using TITLE.  Output a new line if NL_P.   

References ggc_alloc(), lra_assert, lra_dump_file, NULL, reg_class_names, lra_insn_reg::regno, and setup_reg_classes().

Referenced by curr_insn_transform(), expand_reg_data(), get_reload_reg(), narrow_reload_pseudo_class(), process_addr_reg(), and process_address_1().

◆ lra_clear_live_ranges()

void lra_clear_live_ranges ( void )
Finish all live ranges.   

References free_live_range_list(), i, lra_reg_info, max_reg_num(), and point_freq_vec.

Referenced by lra(), and lra_create_live_ranges().

◆ lra_coalesce()

◆ lra_constrain_insn()

bool lra_constrain_insn ( rtx_insn * insn)
Return true if INSN satisfies all constraints.  In other words, no
reload insns are needed.   

References curr_id, curr_insn, curr_insn_transform(), curr_static_id, get_max_uid(), ggc_alloc(), lra_get_insn_recog_data(), max_reg_num(), new_insn_uid_start, and new_regno_start.

Referenced by do_remat().

◆ lra_constraint_offset()

int lra_constraint_offset ( int regno,
machine_mode mode )
The page contains major code to choose the current insn alternative
and generate reloads for it.      
Return the offset from REGNO of the least significant register
in (reg:MODE REGNO).

This function is used to tell whether two registers satisfy
a matching constraint.  (reg:MODE1 REGNO1) matches (reg:MODE2 REGNO2) if:

      REGNO1 + lra_constraint_offset (REGNO1, MODE1)
      == REGNO2 + lra_constraint_offset (REGNO2, MODE2)   

References GET_MODE_SIZE(), ggc_alloc(), hard_regno_nregs(), and lra_assert.

Referenced by operands_match_p().

◆ lra_constraints()

bool lra_constraints ( bool first_p)
Entry function of LRA constraint pass.  Return true if the
constraint pass did change the code.      

References bb_reload_num, bitmap_bit_p, bitmap_ior_into(), BLOCK_FOR_INSN(), ira_reg_equiv_s::caller_save_p, check_and_force_assignment_correctness_p, combine_reload_insn(), CONST_POOL_OK_P, contains_deleted_insn_p(), contains_reg_p(), contains_reloaded_insn_p(), contains_symbol_ref_p(), copy_rtx(), curr_bb, curr_id, curr_insn, curr_insn_transform(), curr_static_id, DEBUG_INSN_P, ira_reg_equiv_s::defined_p, df_regs_ever_live_p(), df_set_regs_ever_live(), dump_insn_slim(), EXECUTE_IF_SET_IN_BITMAP, GET_CODE, get_equiv(), get_max_uid(), GET_MODE, GET_MODE_SIZE(), ggc_alloc(), hard_regno_nregs(), i, in_list_p(), init_curr_insn_input_reloads(), init_curr_operand_mode(), init_insn_rhs_dead_pseudo_p(), INSN_P, INSN_UID(), internal_error(), ira_reg_equiv, loc_equivalence_callback(), loc_equivalence_change_p(), lra_assert, lra_constraint_iter, lra_constraint_new_regno_start, lra_curr_reload_num, lra_dump_file, lra_dump_insns_if_possible(), lra_eliminate(), lra_get_allocno_class(), lra_get_insn_recog_data(), lra_get_regno_hard_regno(), lra_insn_stack_length(), lra_pop_insn(), lra_push_insn_by_uid(), lra_reg_info, lra_set_insn_deleted(), lra_update_insn_regno_info(), max_reg_num(), MAX_RELOAD_INSNS_NUMBER, maybe_gt, MEM_P, MEM_READONLY_P, multi_block_pseudo_p(), new_insn_uid_start, new_regno_start, NULL, NULL_RTX, PATTERN(), pic_offset_table_rtx, ira_reg_equiv_s::profitable_p, PSEUDO_REGNO_MODE, REG_FREQ_FROM_BB, reg_obstack, REG_P, REGNO, regno_reg_rtx, reverse_equiv_p(), SET_DEST, SET_SRC, simplify_replace_fn_rtx(), single_set(), SUBREG_REG, targetm, and update_equiv().

Referenced by lra().

◆ lra_constraints_finish()

void lra_constraints_finish ( void )
Finalize the LRA constraint pass.  It is done once per

References finish_invariants().

Referenced by lra().

◆ lra_constraints_init()

void lra_constraints_init ( void )
Initiate the LRA constraint pass.  It is done once per

References initiate_invariants().

Referenced by lra().

◆ lra_copy_live_range_list()

lra_live_range_t lra_copy_live_range_list ( lra_live_range_t r)
Copy live range list given by its head R and return the result.   

References copy_live_range(), lra_live_range::next, NULL, and r.

Referenced by add_pseudo_to_slot(), and merge_pseudos().

◆ lra_create_copy()

void lra_create_copy ( int regno1,
int regno2,
int freq )
Create copy of two pseudos REGNO1 and REGNO2.  The copy execution
frequency is FREQ.   

References lra_reg::copies, copy_vec, lra_reg::freq, ggc_alloc(), lra_assert, lra_copy_pool, lra_dump_file, lra_reg_info, and NULL.

Referenced by process_bb_lives().

◆ lra_create_live_ranges()

void lra_create_live_ranges ( bool all_p,
bool dead_insn_p )
The main entry function creates live-ranges and other live info
necessary for the assignment sub-pass.  It uses
lra_creates_live_ranges_1 -- so read comments for the

References ggc_alloc(), lra_assert, lra_clear_live_ranges(), lra_create_live_ranges_1(), lra_dump_file, and NULL.

Referenced by lra().

◆ lra_create_new_reg()

◆ lra_create_new_reg_with_unique_value()

rtx lra_create_new_reg_with_unique_value ( machine_mode md_mode,
rtx original,
enum reg_class rclass,
HARD_REG_SET * exclude_start_hard_regs,
const char * title )
Create and return a new reg of ORIGINAL mode.  If ORIGINAL is NULL
or of VOIDmode, use MD_MODE for the new reg.  Initialize its
register class to RCLASS.  Print message about assigning class
RCLASS containing new register name TITLE unless it is NULL.  Use
attributes of ORIGINAL if it is a register.  The created register
will have unique held value.   

References lra_reg::exclude_start_hard_regs, expand_reg_data(), gen_reg_rtx(), GET_MODE, ggc_alloc(), lra_assert, lra_dump_file, lra_reg_info, max_reg_num(), NULL, NULL_RTX, ORIGINAL_REGNO, REG_ATTRS, reg_class_names, REG_P, REG_POINTER, REG_USERVAR_P, REGNO, and setup_reg_classes().

Referenced by check_and_process_move(), get_reload_reg(), lra_create_new_reg(), match_reload(), and process_addr_reg().

◆ lra_debug_elim_table()

void lra_debug_elim_table ( void )
Print info about elimination table to stderr.   

References ggc_alloc(), and print_elim_table().

◆ lra_debug_live_range_list()

void lra_debug_live_range_list ( lra_live_range_t r)
Print live ranges R to stderr.   

References ggc_alloc(), lra_print_live_range_list(), and r.

◆ lra_debug_live_ranges()

void lra_debug_live_ranges ( void )
Print live ranges of all pseudos to stderr.    

References ggc_alloc(), and print_live_ranges().

◆ lra_debug_pseudo_live_ranges()

void lra_debug_pseudo_live_ranges ( int regno)
Print live ranges of pseudo REGNO to stderr.    

References ggc_alloc(), print_pseudo_live_ranges(), and lra_insn_reg::regno.

◆ lra_delete_dead_insn()

void lra_delete_dead_insn ( rtx_insn * insn)
Delete an unneeded INSN and any previous insns who sole purpose is
loading data that is dead in INSN.   

References find_regno_note(), GET_CODE, ggc_alloc(), lra_delete_dead_insn(), lra_set_insn_deleted(), PATTERN(), prev_real_insn(), reg_mentioned_p(), REG_P, REGNO, SET, SET_DEST, SET_SRC, and side_effects_p().

Referenced by lra_delete_dead_insn().

◆ lra_dump_bitmap_with_title()

void lra_dump_bitmap_with_title ( const char * title,
bitmap set,
int index )
LRA (local register allocator) driver and LRA utilities.
   Copyright (C) 2010-2024 Free Software Foundation, Inc.
   Contributed by Vladimir Makarov <vmakarov@redhat.com>.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
The Local Register Allocator (LRA) is a replacement of former
   reload pass.  It is focused to simplify code solving the reload
   pass tasks, to make the code maintenance easier, and to implement new
   perspective optimizations.

   The major LRA design solutions are:
     o division small manageable, separated sub-tasks
     o reflection of all transformations and decisions in RTL as more
       as possible
     o insn constraints as a primary source of the info (minimizing
       number of target-depended macros/hooks)

   In brief LRA works by iterative insn process with the final goal is
   to satisfy all insn and address constraints:
     o New reload insns (in brief reloads) and reload pseudos might be
     o Some pseudos might be spilled to assign hard registers to
       new reload pseudos;
     o Recalculating spilled pseudo values (rematerialization);
     o Changing spilled pseudos to stack memory or their equivalences;
     o Allocation stack memory changes the address displacement and
       new iteration is needed.

   Here is block diagram of LRA passes:

           ---------------     | Undo inheritance for   |     ---------------
          | Memory-memory |    | spilled pseudos,       |    | New (and old) |
          | move coalesce |<---| splits for pseudos got |<-- |   pseudos     |
           ---------------     | the same hard regs,    |    |  assignment   |
  Start           |            | and optional reloads   |     ---------------
    |             |             ------------------------            ^
    V             |              ----------------                   |
 -----------      V             | Update virtual |                  |
|  Remove   |----> ------------>|    register    |                  |
| scratches |     ^             |  displacements |                  |
 -----------      |              ----------------                   |
                  |                      |                          |
                  |                      V         New              |
                  |                 ------------  pseudos   -------------------
                  |                |Constraints:| or insns | Inheritance/split |
                  |                |    RTL     |--------->|  transformations  |
                  |                | transfor-  |          |    in EBB scope   |
                  | substi-        |  mations   |           -------------------
                  | tutions         ------------
                  |                     | No change
          ----------------              V
         | Spilled pseudo |      -------------------
         |    to memory   |<----| Rematerialization |
         |  substitution  |      -------------------
                  | No susbtitions
     | Hard regs substitution, |
     |  devirtalization, and   |------> Finish
     | restoring scratches got |
     |         memory          |

   To speed up the process:
     o We process only insns affected by changes on previous
     o We don't use DFA-infrastructure because it results in much slower
       compiler speed than a special IR described below does;
     o We use a special insn representation for quick access to insn
       info which is always *synchronized* with the current RTL;
       o Insn IR is minimized by memory.  It is divided on three parts:
         o one specific for each insn in RTL (only operand locations);
         o one common for all insns in RTL with the same insn code
           (different operand attributes from machine descriptions);
         o one oriented for maintenance of live info (list of pseudos).
       o Pseudo data:
         o all insns where the pseudo is referenced;
         o live info (conflicting hard regs, live ranges, # of
           references etc);
         o data used for assigning (preferred hard regs, costs etc).

   This file contains LRA driver, LRA utility functions and data, and
   code for dealing with scratches.   
Dump bitmap SET with TITLE and BB INDEX.   

References bitmap_empty_p(), count, EXECUTE_IF_SET_IN_BITMAP, ggc_alloc(), i, and lra_dump_file.

Referenced by dump_candidates_and_remat_bb_data(), and lra_create_live_ranges_1().

◆ lra_dump_insns()

void lra_dump_insns ( FILE * f)
Dump all func insns in a slim form.   

References dump_rtl_slim(), get_insns(), and NULL.

Referenced by lra_dump_insns_if_possible().

◆ lra_dump_insns_if_possible()

void lra_dump_insns_if_possible ( const char * title)
Dump all func insns in a slim form with TITLE when the dump file is open and
lra_verbose >=7.   

References ggc_alloc(), lra_dump_file, lra_dump_insns(), lra_verbose, and NULL.

Referenced by lra_constraints(), lra_inheritance(), lra_remat(), lra_split_hard_reg_for(), and lra_undo_inheritance().

◆ lra_eliminate()

void lra_eliminate ( bool final_p,
bool first_p )

◆ lra_eliminate_reg_if_possible()

void lra_eliminate_reg_if_possible ( rtx * loc)
Eliminate hard reg given by its location LOC.   

References get_elimination(), ggc_alloc(), lra_assert, lra_no_alloc_regs, NULL, REG_P, REGNO, and TEST_HARD_REG_BIT.

Referenced by in_class_p().

◆ lra_eliminate_regs_1()

rtx lra_eliminate_regs_1 ( rtx_insn * insn,
rtx x,
machine_mode mem_mode,
bool subst_p,
bool update_p,
poly_int64 update_sp_offset,
bool full_p )
Scan X and replace any eliminable registers (such as fp) with a
replacement (such as sp) if SUBST_P, plus an offset.  The offset is
a change in the offset between the eliminable register and its
substitution if UPDATE_P, or the full offset if FULL_P, or
otherwise zero.  If FULL_P, we also use the SP offsets for
elimination to SP.  If UPDATE_P, use UPDATE_SP_OFFSET for updating
offsets of register elimnable to SP.  If UPDATE_SP_OFFSET is
non-zero, don't use difference of the offset and the previous

MEM_MODE is the mode of an enclosing MEM.  We need this to know how
much to adjust a register for, e.g., PRE_DEC.  Also, if we are
inside a MEM, we are allowed to replace a sum of a hard register
and the constant zero with the hard register, which we cannot do
outside a MEM.  In addition, we need to record the fact that a
hard register is referenced outside a MEM.

If we make full substitution to SP for non-null INSN, add the insn
sp offset.   

References alloc_reg_note(), alter_subreg(), CASE_CONST_ANY, CONST_INT_P, CONSTANT_P, current_function_decl, DEBUG_INSN_P, elimination_fp2sp_occured_p, form_sum(), gcc_assert, gcc_unreachable, gen_rtvec_v(), GET_CODE, get_elimination(), GET_MODE, GET_RTX_FORMAT, GET_RTX_LENGTH, ggc_alloc(), i, INTVAL, known_eq, lra_assert, lra_eliminate_regs_1(), lra_get_insn_recog_data(), MEM_P, move_plus_up(), NULL, NULL_RTX, offset, paradoxical_subreg_p(), plus_constant(), poly_int_rtx_p(), REG_NOTE_KIND, REG_P, replace_equiv_address_nv(), SET, shallow_copy_rtx(), simplify_gen_binary(), simplify_gen_subreg(), stack_pointer_rtx, SUBREG_BYTE, SUBREG_REG, lra_elim_table::to, XEXP, XVEC, XVECEXP, and XVECLEN.

Referenced by eliminate_regs_in_insn(), get_equiv_with_elimination(), lra_eliminate_regs(), lra_eliminate_regs_1(), and remove_pseudos().

◆ lra_emit_add()

void lra_emit_add ( rtx x,
rtx y,
rtx z )
Target checks operands through operand predicates to recognize an
insn.  We should have a special precaution to generate add insns
which are frequent results of elimination.

Emit insns for x = y + z.  X can be used to store intermediate
values and should be not in Y and Z when we use X to store an
intermediate value.  Y + Z should form [base] [+ index[ * scale]] [
+ disp] where base and index are registers, disp and scale are
constants.  Y should contain base if it is present, Z should
contain disp if any.  index[*scale] can be part of Y or Z.   

References CONSTANT_P, delete_insns_since(), emit_add2_insn(), emit_add3_insn(), emit_move_insn(), expand_reg_data(), GET_CODE, get_last_insn(), GET_MODE, ggc_alloc(), last, lra_assert, max_reg_num(), NULL, NULL_RTX, recog_memoized(), REG_P, XEXP, and y.

Referenced by base_plus_disp_to_reg(), and lra_emit_move().

◆ lra_emit_move()

void lra_emit_move ( rtx x,
rtx y )
Emit x := y, processing special case when y = u + v or y = u + v *
scale + w through emit_add (Y can be an address which is base +
index reg * scale + displacement in general case).  X may be used
as intermediate result therefore it should be not in Y.   

References emit_insn(), emit_move_insn(), expand_reg_data(), GET_CODE, ggc_alloc(), lra_reg::last_reload, lra_curr_reload_num, lra_emit_add(), lra_reg_info, max_reg_num(), NULL_RTX, ORIGINAL_REGNO, REG_P, remove_insn_scratches(), rtx_equal_p(), XEXP, and y.

Referenced by check_and_process_move(), curr_insn_transform(), inherit_reload_reg(), insert_move_for_subreg(), match_reload(), process_addr_reg(), process_address_1(), and process_invariant_for_inheritance().

◆ lra_final_code_change()

◆ lra_free_copies()

void lra_free_copies ( void )
Free all copies.   

References lra_reg::copies, copy_vec, ggc_alloc(), lra_copy_pool, lra_reg_info, and NULL.

Referenced by lra_create_live_ranges_1().

◆ lra_get_copy()

lra_copy_t lra_get_copy ( int n)
Return N-th (0, 1, ...) copy.  If there is no copy, return

References copy_vec, and NULL.

Referenced by init_regno_assign_info().

◆ lra_get_elimination_hard_regno()

int lra_get_elimination_hard_regno ( int hard_regno)
Return the current substitution hard register of the elimination of
HARD_REGNO.     If HARD_REGNO is not eliminable, return itself.   

References elimination_map, ggc_alloc(), and NULL.

Referenced by get_hard_regno(), get_reg_class(), and process_alt_operands().

◆ lra_get_insn_recog_data()

◆ lra_get_insn_regs()

struct lra_insn_reg * lra_get_insn_regs ( int uid)
Return reg info of insn given by it UID.   

References get_insn_recog_data_by_uid().

Referenced by spill_for().

◆ lra_get_regno_hard_regno()

int lra_get_regno_hard_regno ( int regno)

◆ lra_inheritance()

◆ lra_init_equiv()

void lra_init_equiv ( void )
Initiate equivalences for LRA.  As we keep original equivalences
before any elimination, we need to make copies otherwise any change
in insns might change the equivalences.   

References copy_rtx(), ggc_alloc(), i, ira_expand_reg_equiv(), ira_reg_equiv, max_reg_num(), and NULL_RTX.

Referenced by lra().

◆ lra_insn_stack_length()

unsigned int lra_insn_stack_length ( void )
Return the current size of the insn stack.   

References lra_constraint_insn_stack.

Referenced by lra_constraints().

◆ lra_intersected_live_ranges_p()

bool lra_intersected_live_ranges_p ( lra_live_range_t r1,
lra_live_range_t r2 )
Return TRUE if live ranges R1 and R2 intersect.   

References ggc_alloc(), and NULL.

Referenced by assign_stack_slot_num_and_sort_pseudos(), and lra_coalesce().

◆ lra_invalidate_insn_data()

void lra_invalidate_insn_data ( rtx_insn * insn)
Invalidate INSN related info used by LRA.  The info should never be
used after that.   

References INSN_UID(), invalidate_insn_recog_data(), and lra_invalidate_insn_regno_info().

Referenced by curr_insn_transform(), lra_final_code_change(), lra_set_insn_deleted(), and spill_pseudos().

◆ lra_invalidate_insn_regno_info()

void lra_invalidate_insn_regno_info ( rtx_insn * insn)
Invalidate all reg info of INSN.  Update common info about the
invalidated registers.   

References get_insn_freq(), invalidate_insn_data_regno_info(), and lra_get_insn_recog_data().

Referenced by lra_invalidate_insn_data().

◆ lra_live_ranges_finish()

void lra_live_ranges_finish ( void )
Finish live ranges data once per function.   

References bitmap_clear(), finish_live_solver(), lra_live_range_pool, and temp_bitmap.

Referenced by lra().

◆ lra_live_ranges_init()

void lra_live_ranges_init ( void )
Initialize live ranges data once per function.   

References bitmap_initialize(), initiate_live_solver(), reg_obstack, and temp_bitmap.

Referenced by lra().

◆ lra_merge_live_ranges()

lra_live_range_t lra_merge_live_ranges ( lra_live_range_t r1,
lra_live_range_t r2 )
Merge *non-intersected* ranges R1 and R2 and returns the result.
The function maintains the order of ranges and tries to minimize
size of the result range list.  Ranges R1 and R2 may not be used
after the call.   

References gcc_assert, ggc_alloc(), last, lra_assert, lra_live_range_pool, filedep::next, and NULL.

Referenced by add_pseudo_to_slot(), and merge_pseudos().

◆ lra_need_for_scratch_reg_p()

bool lra_need_for_scratch_reg_p ( void )
Return true if we need scratch reg assignments.   

References ggc_alloc(), i, ira_former_scratch_p(), lra_get_regno_hard_regno(), lra_reg_info, max_reg_num(), and max_regno.

Referenced by lra().

◆ lra_need_for_spills_p()

bool lra_need_for_spills_p ( void )
Return true if we need to change some pseudos into memory.   

References ggc_alloc(), i, ira_former_scratch_p(), lra_get_regno_hard_regno(), lra_reg_info, max_reg_num(), and max_regno.

Referenced by lra().

◆ lra_pop_insn()

rtx_insn * lra_pop_insn ( void )
Take the last-inserted insns off the stack and return it.   

References bitmap_clear_bit(), INSN_UID(), lra_constraint_insn_stack, and lra_constraint_insn_stack_bitmap.

Referenced by lra_constraints().

◆ lra_print_live_range_list()

void lra_print_live_range_list ( FILE * f,
lra_live_range_t r )
Print live ranges R to file F.   

References ggc_alloc(), NULL, and r.

Referenced by debug(), lra_debug_live_range_list(), and print_pseudo_live_ranges().

◆ lra_process_new_insns()

◆ lra_push_insn()

void lra_push_insn ( rtx_insn * insn)

◆ lra_push_insn_and_update_insn_regno_info()

void lra_push_insn_and_update_insn_regno_info ( rtx_insn * insn)
Put INSN on the stack and update its reg info.   

References lra_push_insn_1().

Referenced by combine_reload_insn(), and remove_inheritance_pseudos().

◆ lra_push_insn_by_uid()

void lra_push_insn_by_uid ( unsigned int uid)
Put insn with UID on the stack.   

References lra_push_insn().

Referenced by lra_assign(), and lra_constraints().

◆ lra_reg_val_equal_p()

bool lra_reg_val_equal_p ( int regno,
int val,
poly_int64 offset )
Return true if register content is equal to VAL with OFFSET.   

References known_eq, lra_reg_info, and offset.

Referenced by find_hard_regno_for_1(), process_bb_lives(), and setup_live_pseudos_and_spill_after_risky_transforms().

◆ lra_remat()

◆ lra_rtx_hash()

hashval_t lra_rtx_hash ( rtx x)
Recursive hash function for RTL X.   

References abort, GET_CODE, GET_RTX_FORMAT, GET_RTX_LENGTH, ggc_alloc(), i, lra_rtx_hash(), REGNO, UINTVAL, XEXP, XINT, XSTR, XVECEXP, XVECLEN, and XWINT.

Referenced by invariant_hash(), and lra_rtx_hash().

◆ lra_set_insn_deleted()

◆ lra_set_insn_recog_data()

◆ lra_set_regno_unique_value()

void lra_set_regno_unique_value ( int regno)
Set up for REGNO unique hold value.    

References get_new_reg_value(), lra_reg_info, and lra_reg::val.

Referenced by curr_insn_transform(), and lra_coalesce().

◆ lra_set_used_insn_alternative()

void lra_set_used_insn_alternative ( rtx_insn * insn,
int alt )
Set up that INSN is using alternative ALT now.   

References ggc_alloc(), and lra_get_insn_recog_data().

Referenced by curr_insn_transform(), process_insn_for_elimination(), spill_pseudos(), and spill_pseudos().

◆ lra_set_used_insn_alternative_by_uid()

void lra_set_used_insn_alternative_by_uid ( int uid,
int alt )
Set up that insn with UID is using alternative ALT now.  The insn
info should be already set up.   

References check_and_expand_insn_recog_data(), ggc_alloc(), lra_assert, and NULL.

Referenced by lra_assign(), and remove_inheritance_pseudos().

◆ lra_setup_reg_renumber()

void lra_setup_reg_renumber ( int regno,
int hard_regno,
bool print_p )

◆ lra_setup_reload_pseudo_preferenced_hard_reg()

void lra_setup_reload_pseudo_preferenced_hard_reg ( int regno,
int hard_regno,
int profit )

◆ lra_spill()

void lra_spill ( void )
Change spilled pseudos into memory or spill hard regs.  Put changed
insns on the constraint stack (these insns will be considered on
the next constraint pass).  The changed insns are all insns in
which pseudos were changed.   

References assign_mem_slot(), assign_spill_hard_regs(), assign_stack_local(), assign_stack_slot_num_and_sort_pseudos(), crtl, free(), GET_MODE, GET_MODE_SIZE(), ggc_alloc(), i, ira_former_scratch_p(), lra_assert, lra_dump_file, lra_get_regno_hard_regno(), lra_reg_info, lra_update_fp2sp_elimination(), max_reg_num(), pseudo_slot::mem, pseudo_slot::next, NULL, NULL_RTX, print_dec(), pseudo_slots, qsort, regno_freq_compare(), regs_num, SIGNED, slots, slots_num, spill_hard_reg, and spill_pseudos().

Referenced by lra().

◆ lra_split_hard_reg_for()

◆ lra_substitute_pseudo()

bool lra_substitute_pseudo ( rtx * loc,
int old_regno,
rtx new_reg,
bool subreg_p,
bool debug_p )
Replace all references to register OLD_REGNO in *LOC with pseudo
register NEW_REG.  Try to simplify subreg of constant if SUBREG_P.
DEBUG_P is if LOC is within a DEBUG_INSN.  Return true if any
change was made.   

References const0_rtx, CONST_SCALAR_INT_P, CONSTANT_P, gen_rtx_SUBREG(), GET_CODE, GET_MODE, GET_RTX_FORMAT, GET_RTX_LENGTH, ggc_alloc(), i, lra_substitute_pseudo(), NULL_RTX, offset, partial_subreg_p(), REG_P, REGNO, SCALAR_INT_MODE_P, simplify_subreg(), simplify_unary_operation(), SUBREG_BYTE, subreg_lowpart_offset(), lra_insn_reg::subreg_p, SUBREG_REG, subst(), XEXP, XVECEXP, XVECLEN, and y.

Referenced by inherit_reload_reg(), lra_substitute_pseudo(), lra_substitute_pseudo_within_insn(), and split_reg().

◆ lra_substitute_pseudo_within_insn()

bool lra_substitute_pseudo_within_insn ( rtx_insn * insn,
int old_regno,
rtx new_reg,
bool subreg_p )
Call lra_substitute_pseudo within an insn.  Try to simplify subreg
of constant if SUBREG_P.  This won't update the insn ptr, just the
contents of the insn.   

References DEBUG_INSN_P, ggc_alloc(), lra_substitute_pseudo(), and lra_insn_reg::subreg_p.

Referenced by inherit_reload_reg(), process_bb_lives(), remove_inheritance_pseudos(), and undo_optional_reloads().

◆ lra_undo_inheritance()

◆ lra_update_biggest_mode()

void lra_update_biggest_mode ( int regno,
machine_mode mode )
Update REGNO's biggest recorded mode so that it includes a reference
in mode MODE.   

References lra_reg::biggest_mode, gcc_checking_assert, GET_MODE_SIZE(), ggc_alloc(), HARD_REGISTER_NUM_P, lra_reg_info, partial_subreg_p(), and reg_raw_mode.

Referenced by merge_pseudos(), new_insn_reg(), and process_bb_lives().

◆ lra_update_dup()

void lra_update_dup ( lra_insn_recog_data_t id,
int nop )
Update insn operands which are duplication of NOP operand.  The
insn is represented by its LRA internal representation ID.   

References ggc_alloc(), and i.

Referenced by curr_insn_transform(), lra_final_code_change(), match_reload(), and swap_operands().

◆ lra_update_dups()

void lra_update_dups ( lra_insn_recog_data_t id,
signed char * nops )
Update insn operands which are duplication of operands whose
numbers are in array of NOPS (with end marker -1).  The insn is
represented by its LRA internal representation ID.   

References ggc_alloc(), and i.

Referenced by combine_reload_insn(), and match_reload().

◆ lra_update_fp2sp_elimination()

int lra_update_fp2sp_elimination ( int * spilled_pseudos)
Update frame pointer to stack pointer elimination if we started with
permitted frame pointer elimination and now target reports that we can not
do this elimination anymore.  Record spilled pseudos in SPILLED_PSEUDOS
unless it is null, and return the recorded pseudos number.   

References add_to_hard_reg_set(), CLEAR_HARD_REG_SET, elimination_fp2sp_occured_p, frame_pointer_needed, gcc_assert, ggc_alloc(), HARD_FRAME_POINTER_REGNUM, lra_dump_file, NULL, NUM_ELIMINABLE_REGS, reg_eliminate, setup_can_eliminate(), spill_pseudos(), spilled_pseudos, and targetm.

Referenced by lra_spill().

◆ lra_update_insn_recog_data()

◆ lra_update_insn_regno_info()

◆ lra_update_operator_dups()

void lra_update_operator_dups ( lra_insn_recog_data_t id)
Process operator duplications in insn with ID.  We do it after the
operands processing.     Generally speaking, we could do this probably
simultaneously with operands processing because a common practice
is to enumerate the operators after their operands.      

References ggc_alloc(), and i.

Referenced by curr_insn_transform(), and lra_final_code_change().

◆ lra_update_reg_val_offset()

void lra_update_reg_val_offset ( int val,
poly_int64 incr )
Update offset from pseudos with VAL by INCR.   

References ggc_alloc(), i, lra_reg_info, max_reg_num(), and lra_reg::offset.

Referenced by update_reg_eliminate().

◆ lra_update_sp_offset()

poly_int64 lra_update_sp_offset ( rtx x,
poly_int64 offset )
Update and return stack pointer OFFSET after processing X.   

References curr_sp_change, ggc_alloc(), mark_not_eliminable(), and offset.

Referenced by setup_sp_offset().

◆ spill_hard_reg_in_range()

bool spill_hard_reg_in_range ( int regno,
enum reg_class rclass,
rtx_insn * from,
rtx_insn * to )
Split a hard reg for reload pseudo REGNO having RCLASS and living
in the range [FROM, TO].  Return true if did a split.  Otherwise,
return false.   

References bitmap_bit_p, EXECUTE_IF_SET_IN_BITMAP, ggc_alloc(), i, INSN_P, INSN_UID(), ira_class_hard_regs, ira_class_hard_regs_num, lra_assert, lra_get_insn_recog_data(), lra_no_alloc_regs, lra_reg_info, lra_insn_reg::next, NEXT_INSN(), NULL, lra_insn_reg::regno, SET_HARD_REG_BIT, split_reg(), and TEST_HARD_REG_BIT.

Referenced by lra_split_hard_reg_for().

Variable Documentation

◆ check_and_force_assignment_correctness_p

bool check_and_force_assignment_correctness_p
True if we should during assignment sub-pass check assignment
correctness for all pseudos and spill some of them to correct
conflicts.  It can be necessary when we substitute equiv which
needs checking register allocation correctness because the
equivalent value contains allocatable hard registers, or when we
restore multi-register pseudo, or when we change the insn code and
its operand became INOUT operand when it was IN one before.   

Referenced by inherit_in_ebb(), lra_assign(), lra_constraints(), process_insn_for_elimination(), setup_live_pseudos_and_spill_after_risky_transforms(), and split_reg().

◆ hard_regs_spilled_into

◆ lra_asm_error_p

bool lra_asm_error_p
True if we found an asm error.   

Referenced by curr_insn_transform(), lra(), lra_asm_insn_error(), and lra_assign().

◆ lra_assignment_iter

int lra_assignment_iter
Assign reload pseudos.
   Copyright (C) 2010-2024 Free Software Foundation, Inc.
   Contributed by Vladimir Makarov <vmakarov@redhat.com>.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
This file's main objective is to assign hard registers to reload
pseudos.  It also tries to allocate hard registers to other
pseudos, but at a lower priority than the reload pseudos.  The pass
does not transform the RTL.

We must allocate a hard register to every reload pseudo.  We try to
increase the chances of finding a viable allocation by assigning
the pseudos in order of fewest available hard registers first.  If
we still fail to find a hard register, we spill other (non-reload)
pseudos in order to make room.

find_hard_regno_for finds hard registers for allocation without
spilling.  spill_for does the same with spilling.  Both functions
use a cost model to determine the most profitable choice of hard
and spill registers.

Once we have finished allocating reload pseudos, we also try to
assign registers to other (non-reload) pseudos.  This is useful if
hard registers were freed up by the spilling just described.

We try to assign hard registers by collecting pseudos into threads.
These threads contain reload and inheritance pseudos that are
connected by copies (move insns).  Doing this improves the chances
of pseudos in the thread getting the same hard register and, as a
result, of allowing some move insns to be deleted.

When we assign a hard register to a pseudo, we decrease the cost of
using the same hard register for pseudos that are connected by

If two hard registers have the same frequency-derived cost, we
prefer hard registers with higher priorities.  The mapping of
registers to priorities is controlled by the register_priority
target hook.  For example, x86-64 has a few register priorities:
hard registers with and without REX prefixes have different
priorities.  This permits us to generate smaller code as insns
without REX prefixes are shorter.

If a few hard registers are still equally good for the assignment,
we choose the least used hard register.  It is called leveling and
may be profitable for some targets.

Only insns with changed allocation pseudos are processed on the
next constraint pass.

The pseudo live-ranges are used to find conflicting pseudos.

For understanding the code, it is important to keep in mind that
inheritance, split, and reload pseudos created since last
constraint pass have regno >= lra_constraint_new_regno_start.
Inheritance and split pseudos created on any pass are in the
corresponding bitmaps.  Inheritance and split pseudos since the
last constraint pass have also the corresponding non-negative
Current iteration number of the pass and current iteration number
of the pass after the latest spill pass when any former reload
pseudo was spilled.   

Referenced by lra(), lra_assign(), and lra_split_hard_reg_for().

◆ lra_assignment_iter_after_spill

int lra_assignment_iter_after_spill

Referenced by lra(), and lra_assign().

◆ lra_bad_spill_regno_start

int lra_bad_spill_regno_start
Avoid spilling pseudos with regno more than the following value if
it is possible.   

Referenced by lra(), and spill_for().

◆ lra_coalesce_iter

int lra_coalesce_iter
The current iteration (1, 2, ...) of the coalescing pass.   

Referenced by lra(), and lra_coalesce().

◆ lra_constraint_iter

int lra_constraint_iter
The current iteration number of this LRA pass.   

Referenced by lra(), lra_constraints(), and process_alt_operands().

◆ lra_constraint_new_regno_start

◆ lra_curr_reload_num

int lra_curr_reload_num
The number of emitted reload insns so far.   

Referenced by lra(), lra_constraints(), and lra_emit_move().

◆ lra_dump_file

◆ lra_hard_reg_split_p

bool lra_hard_reg_split_p
True if we split hard reg after the last constraint sub-pass.   

Referenced by lra(), and lra_assign().

◆ lra_hard_reg_usage

int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER]
Accumulated execution frequency of all references for each hard

Referenced by find_hard_regno_for_1(), lra_create_live_ranges_1(), lra_setup_reg_renumber(), process_bb_lives(), and setup_live_pseudos_and_spill_after_risky_transforms().

◆ lra_inheritance_iter

int lra_inheritance_iter
Current number of inheritance/split iteration.   

Referenced by improve_inheritance(), lra(), and lra_inheritance().

◆ lra_inheritance_pseudos

◆ lra_insn_recog_data

lra_insn_recog_data_t* lra_insn_recog_data
Map INSN_UID -> the insn recog data (NULL if unknown).   

◆ lra_insn_recog_data_len

int lra_insn_recog_data_len
The current length of the following array.   

Referenced by check_and_expand_insn_recog_data(), finish_insn_recog_data(), init_insn_recog_data(), and lra_get_insn_recog_data().

◆ lra_live_max_point

int lra_live_max_point
Build live ranges for pseudos.
   Copyright (C) 2010-2024 Free Software Foundation, Inc.
   Contributed by Vladimir Makarov <vmakarov@redhat.com>.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
This file contains code to build pseudo live-ranges (analogous
structures used in IRA, so read comments about the live-ranges
there) and other info necessary for other passes to assign
hard-registers to pseudos, coalesce the spilled pseudos, and assign
stack memory slots to spilled pseudos.   
Program points are enumerated by numbers from range
0..LRA_LIVE_MAX_POINT-1.  There are approximately two times more
program points than insns.  Program points are places in the
program where liveness info can be changed.     In most general case
(there are more complicated cases too) some program points
correspond to places where input operand dies and other ones
correspond to places where output operands are born.      

Referenced by assign_spill_hard_regs(), create_live_range_start_chains(), init_live_reload_and_inheritance_pseudos(), init_lives(), lra_create_live_ranges_1(), and remove_some_program_points_and_update_live_ranges().

◆ lra_live_range_iter

int lra_live_range_iter
The number of the current live range pass.   

Referenced by lra(), and lra_create_live_ranges_1().

◆ lra_new_regno_start

int lra_new_regno_start
Start of pseudo regnos before the LRA.   

Referenced by find_hard_regno_for(), lra(), and match_reload().

◆ lra_no_alloc_regs

◆ lra_optional_reload_pseudos

bitmap_head lra_optional_reload_pseudos
Reload pseudo regnos before the new assignment pass which still can
be spilled after the assignment pass as memory is also accepted in
insns for the reload pseudos.   

Referenced by assign_by_spills(), combine_reload_insn(), curr_insn_transform(), find_all_spills_for(), lra(), lra_split_hard_reg_for(), must_not_spill_p(), pseudo_prefix_title(), and undo_optional_reloads().

◆ lra_pmode_pseudo

rtx lra_pmode_pseudo
A pseudo of Pmode.   

Referenced by eliminate_regs_in_insn(), and lra().

◆ lra_point_freq

int* lra_point_freq
The start of the above vector elements.   

Referenced by lra_create_live_ranges_1(), next_program_point(), and remove_some_program_points_and_update_live_ranges().

◆ lra_reg_info

class lra_reg* lra_reg_info
References to the common info about each register.   
Common info about each register.   

Referenced by add_pseudo_to_slot(), add_regs_to_insn_regno_info(), assign_by_spills(), assign_hard_regno(), assign_mem_slot(), assign_spill_hard_regs(), assign_stack_slot_num_and_sort_pseudos(), assign_temporarily(), check_pseudos_live_through_calls(), create_live_range_start_chains(), curr_insn_transform(), expand_reg_info(), find_all_spills_for(), find_hard_regno_for_1(), find_reload_regno_insns(), finish_reg_info(), fix_bb_live_info(), improve_inheritance(), inherit_reload_reg(), init_live_reload_and_inheritance_pseudos(), init_reg_info(), init_regno_assign_info(), initialize_lra_reg_info_element(), insert_in_live_range_start_chain(), invalidate_insn_data_regno_info(), lra_assign(), lra_assign_reg_val(), lra_clear_live_ranges(), lra_coalesce(), lra_constraints(), lra_create_copy(), lra_create_live_ranges_1(), lra_create_new_reg_with_unique_value(), lra_eliminate(), lra_emit_move(), lra_final_code_change(), lra_free_copies(), lra_need_for_scratch_reg_p(), lra_need_for_spills_p(), lra_reg_val_equal_p(), lra_set_regno_unique_value(), lra_setup_reg_renumber(), lra_setup_reload_pseudo_preferenced_hard_reg(), lra_spill(), lra_split_hard_reg_for(), lra_undo_inheritance(), lra_update_biggest_mode(), lra_update_reg_val_offset(), make_hard_regno_dead(), mark_pseudo_dead(), merge_pseudos(), multi_block_pseudo_p(), need_for_split_p(), print_pseudo_live_ranges(), process_alt_operands(), process_bb_lives(), process_invariant_for_inheritance(), pseudo_compare_func(), pseudo_reg_slot_compare(), regno_freq_compare(), regno_val_use_in(), reload_pseudo_compare_func(), remove_inheritance_pseudos(), remove_pseudos(), remove_some_program_points_and_update_live_ranges(), setup_insn_reg_info(), setup_live_pseudos_and_spill_after_risky_transforms(), spill_for(), spill_hard_reg_in_range(), spill_pseudos(), spill_pseudos(), split_reg(), undo_optional_reloads(), update_hard_regno_preference(), update_lives(), update_pseudo_point(), and update_reg_eliminate().

◆ lra_reg_spill_p

bool lra_reg_spill_p
True if we should try spill into registers of different classes
instead of memory.   

Referenced by assign_spill_hard_regs(), lra(), setup_reg_spill_flag(), and spill_pseudos().

◆ lra_rematerialization_iter

int lra_rematerialization_iter
Current number of rematerialization iteration.   

Referenced by lra(), and lra_remat().

◆ lra_split_regs

◆ lra_subreg_reload_pseudos

bitmap_head lra_subreg_reload_pseudos
Pseudo regnos used for subreg reloads before the new assignment
pass.  Such pseudos still can be spilled after the assignment

Referenced by assign_by_spills(), lra(), lra_split_hard_reg_for(), must_not_spill_p(), pseudo_prefix_title(), and simplify_operand_subreg().

◆ lra_undo_inheritance_iter

int lra_undo_inheritance_iter
This page contains code to undo failed inheritance/split
Current number of iteration undoing inheritance/split.   

Referenced by curr_insn_transform(), lra(), and lra_undo_inheritance().

◆ lra_verbose

int lra_verbose
How verbose should be the debug information.  

Referenced by lra(), and lra_dump_insns_if_possible().