GCC Middle and Back End API Reference
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#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "target.h"
#include "rtl.h"
#include "tree.h"
#include "memmodel.h"
#include "predict.h"
#include "tm_p.h"
#include "optabs.h"
#include "expmed.h"
#include "emit-rtl.h"
#include "recog.h"
#include "diagnostic-core.h"
#include "rtx-vector-builder.h"
#include "stor-layout.h"
#include "except.h"
#include "dojump.h"
#include "explow.h"
#include "expr.h"
#include "optabs-tree.h"
#include "libfuncs.h"
#include "internal-fn.h"
#include "langhooks.h"
#include "gimple.h"
#include "ssa.h"
Data Structures | |
struct | no_conflict_data |
struct | atomic_op_functions |
Functions | |
static void | prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *, machine_mode *) |
static rtx | expand_unop_direct (machine_mode, optab, rtx, rtx, int) |
static void | emit_libcall_block_1 (rtx_insn *, rtx, rtx, rtx, bool) |
static rtx | emit_conditional_move_1 (rtx, rtx, rtx, rtx, machine_mode) |
void | debug_optab_libfuncs (void) |
static bool | add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0, rtx op1, machine_mode op0_mode) |
static machine_mode | widened_mode (machine_mode to_mode, rtx op0, rtx op1) |
static rtx | widen_operand (rtx op, machine_mode mode, machine_mode oldmode, int unsignedp, bool no_extend) |
rtx | expand_widen_pattern_expr (const_sepops ops, rtx op0, rtx op1, rtx wide_op, rtx target, int unsignedp) |
rtx | expand_ternary_op (machine_mode mode, optab ternary_optab, rtx op0, rtx op1, rtx op2, rtx target, int unsignedp) |
rtx | simplify_expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1, rtx target, int unsignedp, enum optab_methods methods) |
bool | force_expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1, rtx target, int unsignedp, enum optab_methods methods) |
rtx | expand_vector_broadcast (machine_mode vmode, rtx op) |
static bool | expand_superword_shift (optab binoptab, rtx outof_input, rtx superword_op1, rtx outof_target, rtx into_target, int unsignedp, enum optab_methods methods) |
static bool | expand_subword_shift (scalar_int_mode op1_mode, optab binoptab, rtx outof_input, rtx into_input, rtx op1, rtx outof_target, rtx into_target, int unsignedp, enum optab_methods methods, unsigned HOST_WIDE_INT shift_mask) |
static bool | expand_doubleword_shift_condmove (scalar_int_mode op1_mode, optab binoptab, enum rtx_code cmp_code, rtx cmp1, rtx cmp2, rtx outof_input, rtx into_input, rtx subword_op1, rtx superword_op1, rtx outof_target, rtx into_target, int unsignedp, enum optab_methods methods, unsigned HOST_WIDE_INT shift_mask) |
static bool | expand_doubleword_shift (scalar_int_mode op1_mode, optab binoptab, rtx outof_input, rtx into_input, rtx op1, rtx outof_target, rtx into_target, int unsignedp, enum optab_methods methods, unsigned HOST_WIDE_INT shift_mask) |
static rtx | expand_doubleword_mult (machine_mode mode, rtx op0, rtx op1, rtx target, bool umulp, enum optab_methods methods) |
static rtx | expand_doubleword_mod (machine_mode mode, rtx op0, rtx op1, bool unsignedp) |
rtx | expand_doubleword_divmod (machine_mode mode, rtx op0, rtx op1, rtx *rem, bool unsignedp) |
rtx | expand_simple_binop (machine_mode mode, enum rtx_code code, rtx op0, rtx op1, rtx target, int unsignedp, enum optab_methods methods) |
static bool | swap_commutative_operands_with_target (rtx target, rtx op0, rtx op1) |
static bool | shift_optab_p (optab binoptab) |
static bool | commutative_optab_p (optab binoptab) |
static rtx | avoid_expensive_constant (machine_mode mode, optab binoptab, int opn, rtx x, bool unsignedp) |
static rtx | expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab, rtx op0, rtx op1, rtx target, int unsignedp, enum optab_methods methods, rtx_insn *last) |
rtx | expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1, rtx target, int unsignedp, enum optab_methods methods) |
rtx | sign_expand_binop (machine_mode mode, optab uoptab, optab soptab, rtx op0, rtx op1, rtx target, int unsignedp, enum optab_methods methods) |
bool | expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1, int unsignedp) |
bool | expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1, int unsignedp) |
bool | expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1, enum rtx_code code) |
rtx | expand_simple_unop (machine_mode mode, enum rtx_code code, rtx op0, rtx target, int unsignedp) |
static rtx | widen_leading (scalar_int_mode mode, rtx op0, rtx target, optab unoptab) |
static rtx | expand_clrsb_using_clz (scalar_int_mode mode, rtx op0, rtx target) |
static rtx | expand_ffs (scalar_int_mode, rtx, rtx) |
static rtx | expand_doubleword_clz_ctz_ffs (scalar_int_mode mode, rtx op0, rtx target, optab unoptab) |
static rtx | expand_doubleword_popcount (scalar_int_mode mode, rtx op0, rtx target) |
static rtx | expand_doubleword_parity (scalar_int_mode mode, rtx op0, rtx target) |
static rtx | widen_bswap (scalar_int_mode mode, rtx op0, rtx target) |
static rtx | expand_doubleword_bswap (machine_mode mode, rtx op, rtx target) |
static rtx | expand_parity (scalar_int_mode mode, rtx op0, rtx target) |
static rtx | expand_ctz (scalar_int_mode mode, rtx op0, rtx target) |
static rtx | expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, rtx op0, rtx target) |
rtx | expand_unop (machine_mode mode, optab unoptab, rtx op0, rtx target, int unsignedp) |
rtx | expand_abs_nojump (machine_mode mode, rtx op0, rtx target, int result_unsignedp) |
rtx | expand_abs (machine_mode mode, rtx op0, rtx target, int result_unsignedp, int safe) |
rtx | expand_one_cmpl_abs_nojump (machine_mode mode, rtx op0, rtx target) |
static rtx | expand_copysign_absneg (scalar_float_mode mode, rtx op0, rtx op1, rtx target, int bitpos, bool op0_is_abs) |
static rtx | expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, int bitpos, bool op0_is_abs) |
rtx | expand_copysign (rtx op0, rtx op1, rtx target) |
bool | maybe_emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code) |
void | emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code) |
static void | no_conflict_move_test (rtx dest, const_rtx set, void *p0) |
void | emit_libcall_block (rtx_insn *insns, rtx target, rtx result, rtx equiv) |
bool | can_compare_p (enum rtx_code code, machine_mode mode, enum can_compare_purpose purpose) |
static bool | unsigned_optab_p (enum rtx_code code) |
static bool | insn_predicate_matches_p (enum insn_code icode, unsigned int opno, enum rtx_code code, machine_mode mask_mode, machine_mode value_mode) |
bool | can_vec_cmp_compare_p (enum rtx_code code, machine_mode value_mode, machine_mode mask_mode) |
bool | can_vcond_compare_p (enum rtx_code code, machine_mode value_mode, machine_mode cmp_op_mode) |
bool | can_vec_set_var_idx_p (machine_mode vec_mode) |
bool | can_vec_extract_var_idx_p (machine_mode vec_mode, machine_mode extr_mode) |
static void | prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size, int unsignedp, enum optab_methods methods, rtx *ptest, machine_mode *pmode) |
rtx | prepare_operand (enum insn_code icode, rtx x, int opnum, machine_mode mode, machine_mode wider_mode, int unsignedp) |
static void | emit_cmp_and_jump_insn_1 (rtx test, machine_mode mode, rtx label, direct_optab cmp_optab, profile_probability prob, bool test_branch) |
static enum insn_code | validate_test_and_branch (tree val, rtx *ptest, machine_mode *pmode, optab *res) |
void | emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size, machine_mode mode, int unsignedp, tree val, rtx label, profile_probability prob) |
void | emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size, machine_mode mode, int unsignedp, rtx label, profile_probability prob) |
void | emit_indirect_jump (rtx loc) |
rtx | emit_conditional_move (rtx target, struct rtx_comparison comp, rtx op2, rtx op3, machine_mode mode, int unsignedp) |
rtx | emit_conditional_move (rtx target, rtx comparison, rtx rev_comparison, rtx op2, rtx op3, machine_mode mode) |
rtx | emit_conditional_neg_or_complement (rtx target, rtx_code code, machine_mode mode, rtx cond, rtx op1, rtx op2) |
rtx | emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1, machine_mode cmode, rtx op2, rtx op3, machine_mode mode, int unsignedp) |
rtx_insn * | gen_add2_insn (rtx x, rtx y) |
rtx_insn * | gen_add3_insn (rtx r0, rtx r1, rtx c) |
bool | have_add2_insn (rtx x, rtx y) |
rtx_insn * | gen_addptr3_insn (rtx x, rtx y, rtx z) |
bool | have_addptr3_insn (rtx x, rtx y, rtx z) |
rtx_insn * | gen_sub2_insn (rtx x, rtx y) |
rtx_insn * | gen_sub3_insn (rtx r0, rtx r1, rtx c) |
bool | have_sub2_insn (rtx x, rtx y) |
rtx_insn * | gen_extend_insn (rtx x, rtx y, machine_mode mto, machine_mode mfrom, int unsignedp) |
void | expand_float (rtx to, rtx from, int unsignedp) |
void | expand_fix (rtx to, rtx from, int unsignedp) |
static rtx | prepare_libcall_arg (rtx arg, int uintp) |
void | expand_fixed_convert (rtx to, rtx from, int uintp, int satp) |
bool | expand_sfix_optab (rtx to, rtx from, convert_optab tab) |
bool | have_insn_for (enum rtx_code code, machine_mode mode) |
rtx_insn * | gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode) |
enum rtx_code | get_rtx_code_1 (enum tree_code tcode, bool unsignedp) |
enum rtx_code | get_rtx_code (enum tree_code tcode, bool unsignedp) |
rtx | vector_compare_rtx (machine_mode cmp_mode, enum tree_code tcode, tree t_op0, tree t_op1, bool unsignedp, enum insn_code icode, unsigned int opno) |
static rtx | shift_amt_for_vec_perm_mask (machine_mode mode, const vec_perm_indices &sel, optab shift_optab) |
static rtx | expand_vec_perm_1 (enum insn_code icode, rtx target, rtx v0, rtx v1, rtx sel) |
rtx | expand_vec_perm_const (machine_mode mode, rtx v0, rtx v1, const vec_perm_builder &sel, machine_mode sel_mode, rtx target) |
rtx | expand_vec_perm_var (machine_mode mode, rtx v0, rtx v1, rtx sel, rtx target) |
rtx | expand_vec_series_expr (machine_mode vmode, rtx op0, rtx op1, rtx target) |
rtx | expand_vec_cmp_expr (tree type, tree exp, rtx target) |
rtx | expand_mult_highpart (machine_mode mode, rtx op0, rtx op1, rtx target, bool uns_p) |
static void | find_cc_set (rtx x, const_rtx pat, void *data) |
static bool | expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq) |
static rtx | maybe_emit_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model) |
static rtx | maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val, enum memmodel model) |
static rtx | maybe_emit_compare_and_swap_exchange_loop (rtx target, rtx mem, rtx val) |
static rtx | maybe_emit_atomic_test_and_set (rtx target, rtx mem, enum memmodel model) |
rtx | expand_sync_lock_test_and_set (rtx target, rtx mem, rtx val) |
rtx | expand_atomic_test_and_set (rtx target, rtx mem, enum memmodel model) |
rtx | expand_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model) |
bool | expand_atomic_compare_and_swap (rtx *ptarget_bool, rtx *ptarget_oval, rtx mem, rtx expected, rtx desired, bool is_weak, enum memmodel succ_model, enum memmodel fail_model) |
static void | expand_asm_memory_blockage (void) |
static void | expand_memory_blockage (void) |
void | expand_asm_reg_clobber_mem_blockage (HARD_REG_SET regs) |
void | expand_mem_thread_fence (enum memmodel model) |
void | expand_mem_signal_fence (enum memmodel model) |
rtx | expand_atomic_load (rtx target, rtx mem, enum memmodel model) |
rtx | expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release) |
static void | get_atomic_op_for_code (struct atomic_op_functions *op, enum rtx_code code) |
static rtx | maybe_optimize_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code, enum memmodel model, bool after) |
static rtx | maybe_emit_op (const struct atomic_op_functions *optab, rtx target, rtx mem, rtx val, bool use_memmodel, enum memmodel model, bool after) |
static rtx | expand_atomic_fetch_op_no_fallback (rtx target, rtx mem, rtx val, enum rtx_code code, enum memmodel model, bool after) |
rtx | expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code, enum memmodel model, bool after) |
bool | insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand) |
bool | valid_multiword_target_p (rtx target) |
void | create_integer_operand (class expand_operand *op, poly_int64 intval) |
static bool | maybe_legitimize_operand_same_code (enum insn_code icode, unsigned int opno, class expand_operand *op) |
static bool | maybe_legitimize_operand (enum insn_code icode, unsigned int opno, class expand_operand *op) |
void | create_convert_operand_from_type (class expand_operand *op, rtx value, tree type) |
static bool | can_reuse_operands_p (enum insn_code icode, unsigned int opno1, unsigned int opno2, const class expand_operand *op1, const class expand_operand *op2) |
bool | maybe_legitimize_operands (enum insn_code icode, unsigned int opno, unsigned int nops, class expand_operand *ops) |
rtx_insn * | maybe_gen_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops) |
bool | maybe_expand_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops) |
bool | maybe_expand_jump_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops) |
void | expand_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops) |
void | expand_jump_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops) |
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Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to the result of operation CODE applied to OP0 (and OP1 if it is a binary operation). OP0_MODE is OP0's mode. If the last insn does not set TARGET, don't do anything, but return true. If the last insn or a previous insn sets TARGET and TARGET is one of OP0 or OP1, don't add the REG_EQUAL note but return false. Our caller can then try again, ensuring that TARGET is not one of the operands.
References copy_rtx(), gcc_assert, GET_CODE, GET_MODE, GET_MODE_UNIT_SIZE, GET_RTX_CLASS, INSN_P, insns, MEM_P, NEXT_INSN(), NULL_RTX, reg_overlap_mentioned_p(), RTX_BIN_ARITH, RTX_COMM_ARITH, RTX_COMM_COMPARE, RTX_COMPARE, rtx_equal_p(), RTX_UNARY, SET_DEST, set_for_reg_notes(), SET_SRC, set_unique_reg_note(), simplify_gen_unary(), single_set(), and XEXP.
Referenced by expand_binop_directly(), expand_clrsb_using_clz(), expand_ctz(), expand_doubleword_clz_ctz_ffs(), expand_doubleword_popcount(), expand_ffs(), expand_unop_direct(), and maybe_emit_unop_insn().
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X is to be used in mode MODE as operand OPN to BINOPTAB. If we're optimizing, and if the operand is a constant that costs more than 1 instruction, force the constant into a register and return that register. Return X otherwise. UNSIGNEDP says whether X is unsigned.
References CONST_INT_P, CONSTANT_P, convert_modes(), force_reg(), GEN_INT, INTVAL, expand_operand::mode, optimize_insn_for_speed_p(), rtx_cost(), set_src_cost(), and trunc_int_for_mode().
Referenced by expand_binop(), expand_binop_directly(), and expand_twoval_binop().
bool can_compare_p | ( | enum rtx_code | code, |
machine_mode | mode, | ||
enum can_compare_purpose | purpose ) |
True if we can perform a comparison of mode MODE straightforwardly. PURPOSE describes how this comparison will be used. CODE is the rtx comparison code we will be using. ??? Actually, CODE is slightly weaker than that. A target is still required to implement all of the normal bcc operations, but not required to implement all (or any) of the unordered bcc operations.
References ccp_cmov, ccp_jump, ccp_store_flag, const0_rtx, GET_MODE_WIDER_MODE(), insn_operand_matches(), optab_handler(), and PUT_MODE().
Referenced by by_pieces_mode_supported_p(), do_compare_rtx_and_jump(), do_jump_1(), emit_block_cmp_via_loop(), emit_cmp_and_jump_insns(), emit_store_flag(), emit_store_flag_force(), emit_store_flag_int(), and compare_by_pieces_d::prepare_mode().
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Return true if the requirements on operands OP1 and OP2 of instruction ICODE are similar enough for the result of legitimizing OP1 to be reusable for OP2. OPNO1 and OPNO2 are the operand numbers associated with OP1 and OP2 respectively.
References EXPAND_ADDRESS, EXPAND_CONVERT_FROM, EXPAND_CONVERT_TO, EXPAND_FIXED, EXPAND_INPUT, EXPAND_INTEGER, EXPAND_OUTPUT, EXPAND_UNDEFINED_INPUT, gcc_unreachable, insn_data, expand_operand::mode, insn_operand_data::mode, insn_data_d::operand, expand_operand::type, and expand_operand::unsigned_p.
Referenced by maybe_legitimize_operands().
Return whether the backend can emit a vector comparison (vcond/vcondu) for code CODE, comparing operands of mode CMP_OP_MODE and producing a result with VALUE_MODE.
References get_vcond_icode(), insn_predicate_matches_p(), and unsigned_optab_p().
Referenced by vcond_icode_p().
Return whether the backend can emit a vector comparison (vec_cmp/vec_cmpu) for code CODE, comparing operands of mode VALUE_MODE and producing a result with MASK_MODE.
References get_vec_cmp_icode(), insn_predicate_matches_p(), and unsigned_optab_p().
Referenced by vec_cmp_icode_p().
bool can_vec_extract_var_idx_p | ( | machine_mode | vec_mode, |
machine_mode | extr_mode ) |
Return whether the backend can emit a vec_extract instruction with a non-constant index.
References alloca_raw_REG, convert_optab_handler(), insn_data, insn_operand_matches(), LAST_VIRTUAL_REGISTER, operand_data::mode, data::operand, and VECTOR_MODE_P.
Referenced by gimple_expand_vec_set_extract_expr(), and vectorizable_live_operation().
bool can_vec_set_var_idx_p | ( | machine_mode | vec_mode | ) |
Return whether the backend can emit vector set instructions for inserting element into vector at variable index position.
References alloca_raw_REG, GET_MODE_INNER, insn_data, insn_operand_matches(), LAST_VIRTUAL_REGISTER, operand_data::mode, data::operand, optab_handler(), and VECTOR_MODE_P.
Referenced by gimple_expand_vec_set_extract_expr().
Return true if BINOPTAB implements a commutative binary operation.
References GET_RTX_CLASS, and RTX_COMM_ARITH.
Referenced by expand_binop(), and expand_binop_directly().
void create_convert_operand_from_type | ( | class expand_operand * | op, |
rtx | value, | ||
tree | type ) |
Make OP describe an input operand that should have the same value as VALUE, after any mode conversion that the target might request. TYPE is the type of VALUE.
References create_convert_operand_from(), TYPE_MODE, and TYPE_UNSIGNED.
Referenced by expand_vec_perm_const(), and try_casesi().
void create_integer_operand | ( | class expand_operand * | op, |
poly_int64 | intval ) |
Make OP describe an input operand that has value INTVAL and that has no inherent mode. This function should only be used for operands that are always expand-time constants. The backend may request that INTVAL be copied into a different kind of rtx, but it must specify the mode of that rtx if so.
References create_expand_operand(), EXPAND_INTEGER, and gen_int_mode().
Referenced by emit_block_move_via_pattern(), expand_atomic_compare_and_swap(), expand_atomic_load(), expand_atomic_store(), expand_builtin_prefetch(), expand_builtin_strlen(), expand_cmpstr(), expand_cmpstrn_or_cmpmem(), expand_gather_load_optab_fn(), expand_ifn_atomic_bit_test_and(), expand_ifn_atomic_op_fetch_cmp_0(), expand_scatter_store_optab_fn(), expand_while_optab_fn(), extract_bit_field_1(), extract_bit_field_using_extv(), maybe_emit_atomic_exchange(), maybe_emit_atomic_test_and_set(), maybe_emit_op(), set_storage_via_setmem(), store_bit_field_1(), and store_bit_field_using_insv().
DEBUG_FUNCTION void debug_optab_libfuncs | ( | void | ) |
Debug facility for use in GDB.
Print information about the current contents of the optabs on STDERR.
References convert_optab_libfunc(), gcc_assert, GET_CODE, GET_MODE_NAME, GET_RTX_NAME, i, optab_libfunc(), and XSTR.
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Subroutine of emit_cmp_and_jump_insns; this function is called when we know we can do the branch.
References add_reg_br_prob_note(), any_condjump_p(), cfun, emit_jump_insn(), find_reg_note(), gcc_assert, GET_MODE_CLASS, profile_probability::initialized_p(), insn_operand_matches(), JUMP_P, optab_handler(), PROFILE_ABSENT, profile_status_for_fn, and XEXP.
Referenced by emit_cmp_and_jump_insns().
void emit_cmp_and_jump_insns | ( | rtx | x, |
rtx | y, | ||
enum rtx_code | comparison, | ||
rtx | size, | ||
machine_mode | mode, | ||
int | unsignedp, | ||
rtx | label, | ||
profile_probability | prob ) |
Overloaded version of emit_cmp_and_jump_insns in which VAL is unknown.
References emit_cmp_and_jump_insns(), NULL, and y.
void emit_cmp_and_jump_insns | ( | rtx | x, |
rtx | y, | ||
enum rtx_code | comparison, | ||
rtx | size, | ||
machine_mode | mode, | ||
int | unsignedp, | ||
tree | val, | ||
rtx | label, | ||
profile_probability | prob ) |
Generate code to compare X with Y so that the condition codes are set and to jump to LABEL if the condition is true. If X is a constant and Y is not a constant, then the comparison is swapped to ensure that the comparison RTL has the canonical form. UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they need to be widened. UNSIGNEDP is also used to select the proper branch condition code. If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y. MODE is the mode of the inputs (in case they are const_int). COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will be potentially converted into an unsigned variant based on UNSIGNEDP to select a proper jump instruction. PROB is the probability of jumping to LABEL. If the comparison is against zero then VAL contains the expression from which the non-zero RTL is derived.
References can_compare_p(), ccp_jump, CONST0_RTX, CONSTANT_P, emit_cmp_and_jump_insn_1(), force_reg(), GET_MODE, OPTAB_LIB_WIDEN, prepare_cmp_insn(), swap_commutative_operands_p(), swap_condition(), unsigned_condition(), validate_test_and_branch(), and y.
Referenced by allocate_dynamic_stack_space(), anti_adjust_stack_and_probe(), anti_adjust_stack_and_probe_stack_clash(), asan_clear_shadow(), asan_emit_stack_protection(), do_compare_rtx_and_jump(), do_tablejump(), emit_block_cmp_via_loop(), emit_block_move_via_loop(), emit_block_move_via_oriented_loop(), emit_cmp_and_jump_insns(), emit_stack_clash_protection_probe_loop_end(), emit_stack_clash_protection_probe_loop_start(), expand_builtin_atomic_compare_exchange(), expand_compare_and_swap_loop(), expand_copysign_absneg(), expand_doubleword_clz_ctz_ffs(), expand_ffs(), expand_fix(), expand_float(), inline_string_cmp(), prepare_call_address(), probe_stack_range(), sjlj_emit_function_enter(), stack_protect_epilogue(), store_expr(), try_casesi(), and try_store_by_multiple_pieces().
rtx emit_conditional_add | ( | rtx | target, |
enum rtx_code | code, | ||
rtx | op0, | ||
rtx | op1, | ||
machine_mode | cmode, | ||
rtx | op2, | ||
rtx | op3, | ||
machine_mode | mode, | ||
int | unsignedp ) |
Emit a conditional addition instruction if the machine supports one for that condition and machine mode. OP0 and OP1 are the operands that should be compared using CODE. CMODE is the mode to use should they be constants. If it is VOIDmode, they cannot both be constants. OP2 should be stored in TARGET if the comparison is false, otherwise OP2+OP3 should be stored there. MODE is the mode to use should they be constants. If it is VOIDmode, they cannot both be constants. The result is either TARGET (perhaps modified) or NULL_RTX if the operation is not supported.
References COMPARISON_P, const0_rtx, const1_rtx, constm1_rtx, convert_move(), create_fixed_operand(), create_input_operand(), create_output_operand(), delete_insns_since(), do_pending_stack_adjust(), gen_reg_rtx(), GET_CODE, get_last_insn(), GET_MODE, last, maybe_expand_insn(), expand_operand::mode, NULL_RTX, optab_handler(), OPTAB_WIDEN, prepare_cmp_insn(), simplify_gen_relational(), swap_commutative_operands_p(), swap_condition(), expand_operand::target, unsigned_condition(), expand_operand::value, and XEXP.
Referenced by noce_try_addcc().
rtx emit_conditional_move | ( | rtx | target, |
rtx | comparison, | ||
rtx | rev_comparison, | ||
rtx | op2, | ||
rtx | op3, | ||
machine_mode | mode ) |
Helper function that, in addition to COMPARISON, also tries the reversed REV_COMPARISON with swapped OP2 and OP3. As opposed to when we pass the specific constituents of a comparison, no additional insns are emitted for it. It might still be necessary to emit more than one insn for the final conditional move, though.
References emit_conditional_move_1(), expand_operand::mode, NULL_RTX, and expand_operand::target.
rtx emit_conditional_move | ( | rtx | target, |
struct rtx_comparison | comp, | ||
rtx | op2, | ||
rtx | op3, | ||
machine_mode | mode, | ||
int | unsignedp ) |
Emit a conditional move instruction if the machine supports one for that condition and machine mode. OP0 and OP1 are the operands that should be compared using CODE. CMODE is the mode to use should they be constants. If it is VOIDmode, they cannot both be constants. OP2 should be stored in TARGET if the comparison is true, otherwise OP3 should be stored there. MODE is the mode to use should they be constants. If it is VOIDmode, they cannot both be constants. The result is either TARGET (perhaps modified) or NULL_RTX if the operation is not supported.
References can_create_pseudo_p, comp, COMPARISON_P, const0_rtx, const1_rtx, CONSTANT_P, constm1_rtx, COSTS_N_INSNS, delete_insns_since(), direct_optab_handler(), do_pending_stack_adjust(), emit_conditional_move_1(), emit_move_insn(), force_reg(), gen_reg_rtx(), GET_CODE, get_last_insn(), GET_MODE, last, expand_operand::mode, NULL, NULL_RTX, OPTAB_WIDEN, optimize_insn_for_speed_p(), prepare_cmp_insn(), restore_pending_stack_adjust(), reversed_comparison_code_parts(), rtx_cost(), rtx_equal_p(), save_pending_stack_adjust(), simplify_gen_relational(), swap_commutative_operands_p(), swap_condition(), expand_operand::target, unsigned_condition(), and XEXP.
Referenced by emit_store_flag(), expand_cond_expr_using_cmove(), expand_doubleword_shift_condmove(), expand_expr_real_2(), expand_sdiv_pow2(), and noce_emit_cmove().
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Helper for emitting a conditional move.
References COMPARISON_P, convert_move(), create_fixed_operand(), create_input_operand(), create_output_operand(), direct_optab_handler(), emit_move_insn(), gen_reg_rtx(), GET_MODE, maybe_expand_insn(), expand_operand::mode, NULL_RTX, rtx_equal_p(), side_effects_p(), expand_operand::target, and expand_operand::value.
Referenced by emit_conditional_move(), and emit_conditional_move().
rtx emit_conditional_neg_or_complement | ( | rtx | target, |
rtx_code | code, | ||
machine_mode | mode, | ||
rtx | cond, | ||
rtx | op1, | ||
rtx | op2 ) |
Emit a conditional negate or bitwise complement using the negcc or notcc optabs if available. Return NULL_RTX if such operations are not available. Otherwise return the RTX holding the result. TARGET is the desired destination of the result. COMP is the comparison on which to negate. If COND is true move into TARGET the negation or bitwise complement of OP1. Otherwise move OP2 into TARGET. CODE is either NEG or NOT. MODE is the machine mode in which the operation is performed.
References convert_move(), create_fixed_operand(), create_input_operand(), create_output_operand(), delete_insns_since(), direct_optab_handler(), gcc_unreachable, gen_reg_rtx(), get_last_insn(), last, maybe_expand_insn(), expand_operand::mode, NULL_RTX, expand_operand::target, unknown_optab, and expand_operand::value.
Referenced by noce_try_inverse_constants().
void emit_indirect_jump | ( | rtx | loc | ) |
Generate code to indirectly jump to a location given in the rtx LOC.
References create_address_operand(), emit_barrier(), expand_jump_insn(), sorry(), and targetm.
Referenced by expand_builtin_longjmp(), expand_builtin_nonlocal_goto(), expand_computed_goto(), and fix_crossing_unconditional_branches().
Emit code to make a call to a constant function or a library call.
References emit_libcall_block_1(), insns, and no_conflict_data::target.
Referenced by convert_mode_scalar(), expand_fix(), expand_fixed_convert(), expand_float(), expand_twoval_binop_libfunc(), and prepare_float_lib_cmp().
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Emit code to make a call to a constant function or a library call. INSNS is a list containing all insns emitted in the call. These insns leave the result in RESULT. Our block is to copy RESULT to TARGET, which is logically equivalent to EQUIV. We first emit any insns that set a pseudo on the assumption that these are loading constants into registers; doing so allows them to be safely cse'ed between blocks. Then we emit all the other insns in the block, followed by an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL note with an operand of EQUIV.
References add_insn(), CALL_P, cfun, const0_rtx, copy_rtx(), emit_move_insn(), find_reg_note(), gen_reg_rtx(), GET_MODE, no_conflict_data::insn, insns, INT_MIN, INTVAL, LABEL_P, last, make_reg_eh_region_note_nothrow_nononlocal(), may_trap_p(), NEXT_INSN(), no_conflict_move_test(), note_stores(), NULL_RTX, PREV_INSN(), REG_P, REG_USERVAR_P, REGNO, remove_note(), SET_DEST, set_dst_reg_note(), SET_NEXT_INSN(), SET_PREV_INSN(), single_set(), no_conflict_data::target, and XEXP.
Referenced by emit_libcall_block(), expand_binop(), and expand_unop().
Generate an instruction whose insn-code is INSN_CODE, with two operands: an output TARGET and an input OP0. TARGET *must* be nonzero, and the output is always stored there. CODE is an rtx code such that (CODE OP0) is an rtx that describes the value that is stored into TARGET.
References gcc_assert, maybe_emit_unop_insn(), and expand_operand::target.
Referenced by compress_float_constant(), convert_mode_scalar(), convert_move(), expand_copysign_absneg(), expand_fixed_convert(), and expand_float().
References CONST0_RTX, do_compare_rtx_and_jump(), emit_label(), emit_move_insn(), expand_abs_nojump(), expand_unop(), gen_label_rtx(), gen_reg_rtx(), GET_MODE, GET_MODE_CLASS, MEM_P, MEM_VOLATILE_P, expand_operand::mode, NO_DEFER_POP, NULL, NULL_RTX, OK_DEFER_POP, REG_P, REGNO, expand_operand::target, and profile_probability::uninitialized().
Referenced by expand_builtin_fabs(), expand_divmod(), and expand_expr_real_2().
Emit code to compute the absolute value of OP0, with result to TARGET if convenient. (TARGET may be 0.) The return value says where the result actually is to be found. MODE is the mode of the operand; the mode of the result is different but can be deduced from MODE.
References delete_insns_since(), expand_absneg_bit(), expand_binop(), expand_shift(), expand_unop(), get_last_insn(), GET_MODE_CLASS, GET_MODE_PRECISION(), HONOR_SIGNED_ZEROS(), is_a(), is_int_mode(), last, expand_operand::mode, NULL_RTX, optab_handler(), OPTAB_LIB_WIDEN, OPTAB_WIDEN, optimize_insn_for_speed_p(), and expand_operand::target.
Referenced by expand_abs(), and noce_try_abs().
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Expand a floating point absolute value or negation operation via a logical operation on the sign bit.
References BITS_PER_WORD, copy_rtx(), emit_insn(), emit_move_insn(), end_sequence(), expand_binop(), FLOAT_WORDS_BIG_ENDIAN, force_lowpart_subreg(), gen_lowpart, gen_reg_rtx(), get_insns(), get_last_insn(), GET_MODE_BITSIZE(), GET_MODE_PRECISION(), GET_MODE_SIZE(), real_format::has_signed_zero, i, immed_wide_int_const(), insns, int_mode_for_mode(), NULL, NULL_RTX, operand_subword(), operand_subword_force(), OPTAB_LIB_WIDEN, REAL_MODE_FORMAT, reg_overlap_mentioned_p(), wi::set_bit_in_zero(), set_dst_reg_note(), real_format::signbit_rw, start_sequence(), valid_multiword_target_p(), and word_mode.
Referenced by expand_abs_nojump(), and expand_unop().
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Generate asm volatile("" : : : "memory") as the memory blockage.
References emit_insn(), gen_rtvec(), gen_rtx_MEM(), MEM_VOLATILE_P, rtvec_alloc(), and UNKNOWN_LOCATION.
Referenced by expand_memory_blockage().
void expand_asm_reg_clobber_mem_blockage | ( | HARD_REG_SET | regs | ) |
Generate asm volatile("" : : : "memory") as a memory blockage, at the same time clobbering the register set specified by REGS.
References emit_insn(), gcc_assert, gen_rtx_MEM(), i, MEM_VOLATILE_P, regno_reg_rtx, rtvec_alloc(), RTVEC_ELT, TEST_HARD_REG_BIT, and UNKNOWN_LOCATION.
Referenced by gen_call_used_regs_seq().
bool expand_atomic_compare_and_swap | ( | rtx * | ptarget_bool, |
rtx * | ptarget_oval, | ||
rtx | mem, | ||
rtx | expected, | ||
rtx | desired, | ||
bool | is_weak, | ||
enum memmodel | succ_model, | ||
enum memmodel | fail_model ) |
This function expands the atomic compare exchange operation: *PTARGET_BOOL is an optional place to store the boolean success/failure. *PTARGET_OVAL is an optional place to store the old value from memory. Both target parameters may be NULL or const0_rtx to indicate that we do not care about that return value. Both target parameters are updated on success to the actual location of the corresponding result. MEMMODEL is the memory model variant to use. The return value of the function is true for success.
References can_atomic_load_p(), const0_rtx, convert_memory_address, copy_to_reg(), create_fixed_operand(), create_input_operand(), create_integer_operand(), create_output_operand(), direct_optab_handler(), emit_library_call_value(), emit_move_insn(), emit_store_flag_force(), find_cc_set(), gen_reg_rtx(), get_last_insn(), GET_MODE, have_insn_for(), insn_data, is_mm_sync(), LCT_NORMAL, maybe_expand_insn(), MEM_P, expand_operand::mode, insn_operand_data::mode, note_stores(), NULL, NULL_RTX, insn_data_d::operand, optab_handler(), optab_libfunc(), ptr_mode, reg_overlap_mentioned_p(), expand_operand::target, expand_operand::value, and XEXP.
Referenced by expand_builtin_atomic_compare_exchange(), expand_builtin_compare_and_swap(), expand_compare_and_swap_loop(), and expand_ifn_atomic_compare_exchange().
This function expands the atomic exchange operation: atomically store VAL in MEM and return the previous value in MEM. MEMMODEL is the memory model variant to use. TARGET is an optional place to stick the return value.
References can_atomic_load_p(), GET_MODE, is_mm_sync(), maybe_emit_atomic_exchange(), maybe_emit_compare_and_swap_exchange_loop(), expand_operand::mode, NULL_RTX, and expand_operand::target.
Referenced by expand_builtin_atomic_exchange().
rtx expand_atomic_fetch_op | ( | rtx | target, |
rtx | mem, | ||
rtx | val, | ||
enum rtx_code | code, | ||
enum memmodel | model, | ||
bool | after ) |
This function expands an atomic fetch_OP or OP_fetch operation: TARGET is an option place to stick the return value. const0_rtx indicates the result is unused. atomically fetch MEM, perform the operation with VAL and return it to MEM. CODE is the operation being performed (OP) MEMMODEL is the memory model variant to use. AFTER is true to return the result of the operation (OP_fetch). AFTER is false to return the value before the operation (fetch_OP).
References can_atomic_load_p(), can_compare_and_swap_p(), const0_rtx, convert_memory_address, emit_insn(), emit_library_call_value(), emit_move_insn(), end_sequence(), expand_atomic_fetch_op_no_fallback(), expand_compare_and_swap_loop(), expand_simple_binop(), expand_simple_unop(), gen_reg_rtx(), get_atomic_op_for_code(), get_insns(), GET_MODE, is_mm_sync(), LCT_NORMAL, NULL, NULL_RTX, OPTAB_LIB_WIDEN, optab_libfunc(), ptr_mode, register_operand(), start_sequence(), and XEXP.
Referenced by expand_builtin_atomic_fetch_op(), expand_builtin_sync_operation(), expand_ifn_atomic_bit_test_and(), and expand_ifn_atomic_op_fetch_cmp_0().
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This function expands an atomic fetch_OP or OP_fetch operation: TARGET is an option place to stick the return value. const0_rtx indicates the result is unused. atomically fetch MEM, perform the operation with VAL and return it to MEM. CODE is the operation being performed (OP) MEMMODEL is the memory model variant to use. AFTER is true to return the result of the operation (OP_fetch). AFTER is false to return the value before the operation (fetch_OP). This function will *only* generate instructions if there is a direct optab. No compare and swap loops or libcalls will be generated.
References const0_rtx, expand_simple_binop(), expand_simple_unop(), get_atomic_op_for_code(), GET_MODE, maybe_emit_op(), maybe_optimize_fetch_op(), expand_operand::mode, NULL_RTX, and OPTAB_LIB_WIDEN.
Referenced by expand_atomic_fetch_op().
This function expands the atomic load operation: return the atomically loaded value in MEM. MEMMODEL is the memory model variant to use. TARGET is an option place to stick the return value.
References BITS_PER_WORD, const0_rtx, create_fixed_operand(), create_integer_operand(), create_output_operand(), delete_insns_since(), direct_optab_handler(), emit_move_insn(), expand_mem_thread_fence(), expand_memory_blockage(), gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_PRECISION(), is_mm_relaxed(), is_mm_seq_cst(), last, maybe_expand_insn(), maybe_gt, expand_operand::mode, NULL_RTX, expand_operand::target, and expand_operand::value.
Referenced by expand_builtin_atomic_load().
This function expands the atomic store operation: Atomically store VAL in MEM. MEMMODEL is the memory model variant to use. USE_RELEASE is true if __sync_lock_release can be used as a fall back. function returns const0_rtx if a pattern was emitted.
References BITS_PER_WORD, can_atomic_load_p(), const0_rtx, create_fixed_operand(), create_input_operand(), create_integer_operand(), delete_insns_since(), direct_optab_handler(), emit_move_insn(), expand_mem_thread_fence(), expand_memory_blockage(), get_last_insn(), GET_MODE, GET_MODE_PRECISION(), is_mm_relaxed(), is_mm_seq_cst(), is_mm_sync(), last, maybe_emit_atomic_exchange(), maybe_emit_compare_and_swap_exchange_loop(), maybe_expand_insn(), maybe_gt, expand_operand::mode, NULL_RTX, and expand_operand::target.
Referenced by expand_builtin_atomic_clear(), expand_builtin_atomic_store(), and expand_builtin_sync_lock_release().
This function expands the atomic test_and_set operation: atomically store a boolean TRUE into MEM and return the previous value. MEMMODEL is the memory model variant to use. TARGET is an optional place to stick the return value.
References const0_rtx, const1_rtx, emit_store_flag_force(), gcc_assert, gen_int_mode(), gen_reg_rtx(), GET_MODE, maybe_emit_atomic_exchange(), maybe_emit_atomic_test_and_set(), maybe_emit_compare_and_swap_exchange_loop(), maybe_emit_sync_lock_test_and_set(), expand_operand::mode, expand_operand::target, and targetm.
Referenced by expand_builtin_atomic_test_and_set().
rtx expand_binop | ( | machine_mode | mode, |
optab | binoptab, | ||
rtx | op0, | ||
rtx | op1, | ||
rtx | target, | ||
int | unsignedp, | ||
enum optab_methods | methods ) |
Generate code to perform an operation specified by BINOPTAB on operands OP0 and OP1, with result having machine-mode MODE. UNSIGNEDP is for the case where we have to widen the operands to perform the operation. It says to use zero-extension. If TARGET is nonzero, the value is generated there, if it is convenient to do so. In all cases an rtx is returned for the locus of the value; this may or may not be TARGET.
References as_a(), avoid_expensive_constant(), BITS_PER_WORD, CLASS_HAS_WIDER_MODES_P, commutative_optab_p(), CONST0_RTX, const0_rtx, CONST_INT_P, convert_move(), convert_optab_handler(), convert_optab_p(), convert_to_mode(), copy_rtx(), delete_insns_since(), emit_clobber(), emit_insn(), emit_libcall_block_1(), emit_library_call_value(), emit_move_insn(), emit_store_flag_force(), end_sequence(), expand_binop(), expand_binop_directly(), expand_doubleword_divmod(), expand_doubleword_mod(), expand_doubleword_mult(), expand_doubleword_shift(), expand_vector_broadcast(), find_widening_optab_handler, FOR_EACH_WIDER_MODE, force_reg(), gcc_assert, gen_int_mode(), gen_int_shift_amount(), gen_lowpart, gen_reg_rtx(), get_insns(), get_last_insn(), GET_MODE, GET_MODE_2XWIDER_MODE(), GET_MODE_BITSIZE(), GET_MODE_CLASS, GET_MODE_INNER, GET_MODE_PRECISION(), GET_MODE_SIZE(), GET_MODE_WIDER_MODE(), i, insns, INTVAL, is_int_mode(), last, LCT_CONST, expand_operand::mode, negate_rtx(), NULL_RTX, operand_subword(), operand_subword_force(), OPTAB_DIRECT, optab_handler(), OPTAB_LIB, OPTAB_LIB_WIDEN, optab_libfunc(), OPTAB_MUST_WIDEN, OPTAB_WIDEN, optimize_insn_for_speed_p(), reg_overlap_mentioned_p(), REG_P, rtx_equal_p(), set_dst_reg_note(), shift_optab_p(), simplify_gen_unary(), start_sequence(), STORE_FLAG_VALUE, swap_commutative_operands_with_target(), expand_operand::target, targetm, trapv_binoptab_p(), TRULY_NOOP_TRUNCATION_MODES_P, UINTVAL, unknown_optab, valid_multiword_target_p(), expand_operand::value, widen_operand(), widened_mode(), and word_mode.
Referenced by add_mask_and_len_args(), adjust_stack_1(), align_dynamic_address(), allocate_dynamic_stack_space(), asan_emit_stack_protection(), convert_mode_scalar(), do_compare_rtx_and_jump(), do_jump_by_parts_zero_rtx(), do_store_flag(), emit_block_cmp_via_loop(), emit_push_insn(), emit_store_flag(), emit_store_flag_1(), emit_store_flag_int(), expand_abs_nojump(), expand_absneg_bit(), expand_addsub_overflow(), expand_and(), expand_binop(), expand_binop_directly(), expand_builtin_issignaling(), expand_builtin_next_arg(), expand_builtin_signbit(), expand_clrsb_using_clz(), expand_copysign(), expand_copysign_absneg(), expand_copysign_bit(), expand_ctz(), expand_dec(), expand_divmod(), expand_doubleword_clz_ctz_ffs(), expand_doubleword_mult(), expand_doubleword_parity(), expand_doubleword_popcount(), expand_expr_real_2(), expand_ffs(), expand_fix(), expand_float(), expand_fn_using_insn(), expand_inc(), expand_mul_overflow(), expand_mult(), expand_mult_highpart(), expand_one_cmpl_abs_nojump(), expand_parity(), expand_sdiv_pow2(), expand_shift_1(), expand_simple_binop(), expand_single_bit_test(), expand_smod_pow2(), expand_unop(), expand_widening_mult(), expmed_mult_highpart_optab(), extract_fixed_bit_field_1(), extract_split_bit_field(), find_shift_sequence(), compare_by_pieces_d::generate(), get_dynamic_stack_base(), noce_emit_move_insn(), noce_try_sign_mask(), optimize_bitfield_assignment_op(), probe_stack_range(), push_block(), round_push(), sign_expand_binop(), simplify_expand_binop(), store_constructor(), store_expr(), store_fixed_bit_field_1(), and widen_leading().
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Helper function for expand_binop: handle the case where there is an insn ICODE that directly implements the indicated operation. Returns null if this is not possible.
References add_equal_note(), avoid_expensive_constant(), commutative_optab_p(), convert_modes(), create_input_operand(), create_output_operand(), delete_insns_since(), emit_insn(), expand_binop(), GET_MODE, GET_MODE_NUNITS(), insn_data, INSN_P, last, maybe_gen_insn(), expand_operand::mode, NEXT_INSN(), NULL_RTX, shift_optab_p(), swap_commutative_operands_with_target(), expand_operand::target, expand_operand::value, and VECTOR_MODE_P.
Referenced by expand_binop().
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Attempt to emit (clrsb:mode op0) as (plus:mode (clz:mode (xor:mode op0 (ashr:mode op0 (const_int prec-1)))) (const_int -1)) if CLZ_DEFINED_VALUE_AT_ZERO (mode, val) is 2 and val is prec, or as (clz:mode (ior:mode (xor:mode (ashl:mode op0 (const_int 1)) (ashr:mode op0 (const_int prec-1))) (const_int 1))) otherwise.
References add_equal_note(), CLZ_DEFINED_VALUE_AT_ZERO, const1_rtx, constm1_rtx, emit_insn(), end_sequence(), expand_binop(), expand_unop_direct(), GEN_INT, get_insns(), GET_MODE_PRECISION(), expand_operand::mode, NULL_RTX, OPTAB_DIRECT, optab_handler(), optimize_insn_for_size_p(), start_sequence(), and expand_operand::target.
Referenced by expand_unop().
This is a helper function for the other atomic operations. This function emits a loop that contains SEQ that iterates until a compare-and-swap operation at the end succeeds. MEM is the memory to be modified. SEQ is a set of instructions that takes a value from OLD_REG as an input and produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be set to the current contents of MEM. After SEQ, a compare-and-swap will attempt to update MEM with NEW_REG. The function returns true when the loop was generated successfully.
References const0_rtx, emit_cmp_and_jump_insns(), emit_insn(), emit_label(), emit_move_insn(), expand_atomic_compare_and_swap(), gen_label_rtx(), gen_reg_rtx(), GET_MODE, profile_probability::guessed_never(), MEMMODEL_RELAXED, MEMMODEL_SYNC_SEQ_CST, expand_operand::mode, and NULL_RTX.
Referenced by expand_atomic_fetch_op(), and maybe_emit_compare_and_swap_exchange_loop().
Expand the C99 copysign operation. OP0 and OP1 must be the same scalar floating point mode. Return NULL if we do not know how to expand the operation inline.
References as_a(), CONST_DOUBLE_AS_FLOAT_P, CONST_DOUBLE_REAL_VALUE, expand_binop(), expand_copysign_absneg(), expand_copysign_bit(), gcc_assert, GET_MODE, real_format::has_signed_zero, expand_operand::mode, NULL, NULL_RTX, OPTAB_DIRECT, optab_handler(), real_isneg(), REAL_MODE_FORMAT, real_format::signbit_ro, real_format::signbit_rw, and simplify_unary_operation().
Referenced by expand_builtin_copysign().
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A subroutine of expand_copysign, perform the copysign operation using the abs and neg primitives advertised to exist on the target. The assumption is that we have a split register file, and leaving op0 in fp registers, and not playing with subregs so much, will help the register allocator.
References as_a(), BITS_PER_WORD, const0_rtx, CONST_DOUBLE_AS_FLOAT_P, copy_to_reg(), emit_cmp_and_jump_insns(), emit_label(), emit_move_insn(), emit_unop_insn(), expand_binop(), expand_unop(), FLOAT_WORDS_BIG_ENDIAN, gen_label_rtx(), gen_lowpart, gen_reg_rtx(), GET_MODE_BITSIZE(), GET_MODE_PRECISION(), GET_MODE_SIZE(), immed_wide_int_const(), insn_data, int_mode_for_mode(), expand_operand::mode, NULL, NULL_RTX, operand_subword_force(), optab_handler(), OPTAB_LIB_WIDEN, wi::set_bit_in_zero(), simplify_unary_operation(), expand_operand::target, and word_mode.
Referenced by expand_copysign().
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A subroutine of expand_copysign, perform the entire copysign operation with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS is true if op0 is known to have its sign bit clear.
References BITS_PER_WORD, emit_insn(), emit_move_insn(), end_sequence(), expand_binop(), FLOAT_WORDS_BIG_ENDIAN, force_lowpart_subreg(), gen_lowpart, gen_reg_rtx(), get_insns(), GET_MODE_BITSIZE(), GET_MODE_PRECISION(), GET_MODE_SIZE(), i, immed_wide_int_const(), insns, int_mode_for_mode(), expand_operand::mode, NULL_RTX, operand_subword(), operand_subword_force(), OPTAB_LIB_WIDEN, reg_overlap_mentioned_p(), wi::set_bit_in_zero(), start_sequence(), expand_operand::target, valid_multiword_target_p(), and word_mode.
Referenced by expand_copysign().
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Try calculating ctz(x) as K - clz(x & -x) , where K is GET_MODE_PRECISION(mode) - 1. Both __builtin_ctz and __builtin_clz are undefined at zero, so we don't have to worry about what the hardware does in that case. (If the clz instruction produces the usual value at 0, which is K, the result of this code sequence will be -1; expand_ffs, below, relies on this. It might be nice to have it be K instead, for consistency with the (very few) processors that provide a ctz with a defined value, but that would take one more instruction, and it would be less convenient for expand_ffs anyway.
References add_equal_note(), emit_insn(), end_sequence(), expand_binop(), expand_unop_direct(), gen_int_mode(), get_insns(), GET_MODE_PRECISION(), expand_operand::mode, NULL_RTX, OPTAB_DIRECT, optab_handler(), start_sequence(), and expand_operand::target.
Referenced by expand_ffs(), and expand_unop().
Try calculating bswap as two bswaps of two word-sized operands.
References emit_clobber(), emit_move_insn(), expand_unop(), gen_reg_rtx(), expand_operand::mode, NULL_RTX, operand_subword(), operand_subword_force(), REG_P, expand_operand::target, valid_multiword_target_p(), and word_mode.
Referenced by expand_unop().
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Try calculating clz, ctz or ffs of a double-word quantity as two clz, ctz or ffs operations on word-sized quantities, choosing which based on whether the high (for clz) or low (for ctz and ffs) word is nonzero.
References add_equal_note(), CONST0_RTX, const0_rtx, convert_move(), emit_barrier(), emit_cmp_and_jump_insns(), emit_insn(), emit_jump_insn(), emit_label(), end_sequence(), expand_binop(), expand_ffs(), expand_unop_direct(), force_reg(), gcc_assert, gen_highpart(), gen_int_mode(), gen_label_rtx(), gen_lowpart, gen_reg_rtx(), get_insns(), GET_MODE_BITSIZE(), expand_operand::mode, NULL_RTX, OPTAB_DIRECT, optab_handler(), start_sequence(), expand_operand::target, targetm, and word_mode.
Referenced by expand_unop().
Similarly to the above function, but compute both quotient and remainder. Quotient can be computed from the remainder as: rem = op0 % op1; // Handled using expand_doubleword_mod quot = (op0 - rem) * inv; // inv is multiplicative inverse of op1 modulo // 2 * BITS_PER_WORD We can also handle cases where op1 is a multiple of power of two constant and constant handled by expand_doubleword_mod. op11 = 1 << __builtin_ctz (op1); op12 = op1 / op11; rem1 = op0 % op12; // Handled using expand_doubleword_mod quot1 = (op0 - rem1) * inv; // inv is multiplicative inverse of op12 modulo // 2 * BITS_PER_WORD rem = (quot1 % op11) * op12 + rem1; quot = quot1 / op11;
References a, b, BITS_PER_WORD, CALL_P, const1_rtx, ctz_hwi(), expand_divmod(), expand_doubleword_mod(), expand_simple_binop(), wide_int_storage::from(), GEN_INT, get_insns(), get_last_insn(), HOST_WIDE_INT_1, immed_wide_int_const(), INTVAL, last, wi::mod_inv(), expand_operand::mode, NEXT_INSN(), NULL_RTX, OPTAB_DIRECT, pow2p_hwi(), wi::shifted_mask(), and UNSIGNED.
Referenced by expand_binop(), and expand_DIVMOD().
Subroutine of expand_binop. Optimize unsigned double-word OP0 % OP1 for constant OP1. If for some bit in [BITS_PER_WORD / 2, BITS_PER_WORD] range (prefer higher bits) ((1w << bit) % OP1) == 1, then the modulo can be computed in word-mode as ((OP0 & (bit - 1)) + ((OP0 >> bit) & (bit - 1)) + (OP0 >> (2 * bit))) % OP1. Whether we need to sum 2, 3 or 4 values depends on the bit value, if 2, then carry from the addition needs to be added too, i.e. like: sum += __builtin_add_overflow (low, high, &sum) Optimize signed double-word OP0 % OP1 similarly, just apply some correction factor to the sum before doing unsigned remainder, in the form of sum += (((signed) OP0 >> (2 * BITS_PER_WORD - 1)) & const); then perform unsigned remainder = sum % OP1; and finally remainder += ((signed) OP0 >> (2 * BITS_PER_WORD - 1)) & (1 - OP1);
References BITS_PER_WORD, build_complex_type(), CALL_P, convert_modes(), count, expand_addsub_overflow(), expand_divmod(), expand_simple_binop(), force_lowpart_subreg(), GEN_INT, gen_int_mode(), gen_reg_rtx(), get_insns(), get_last_insn(), GET_MODE_COMPLEX_MODE, HOST_BITS_PER_WIDE_INT, HOST_WIDE_INT_1U, i, immed_wide_int_const(), INTVAL, last, wi::lrshift(), make_tree(), wi::mask(), wi::min_value(), expand_operand::mode, wi::ne_p(), wi::neg_p(), NEXT_INSN(), NULL, NULL_RTX, NULL_TREE, operand_subword_force(), OPTAB_DIRECT, optab_handler(), wi::shifted_mask(), SIGNED, wi::smod_trunc(), lang_hooks_for_types::type_for_mode, TYPE_MODE, lang_hooks::types, wi::umod_trunc(), UNKNOWN_LOCATION, word_mode, and XEXP.
Referenced by expand_binop(), and expand_doubleword_divmod().
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Subroutine of expand_binop. Perform a double word multiplication of operands OP0 and OP1 both of mode MODE, which is exactly twice as wide as the target's word_mode. This function return NULL_RTX if anything goes wrong, in which case it may have already emitted instructions which need to be deleted. If we want to multiply two two-word values and have normal and widening multiplies of single-word values, we can do this with three smaller multiplications. The multiplication proceeds as follows: _______________________ [__op0_high_|__op0_low__] _______________________ * [__op1_high_|__op1_low__] _______________________________________________ _______________________ (1) [__op0_low__*__op1_low__] _______________________ (2a) [__op0_low__*__op1_high_] _______________________ (2b) [__op0_high_*__op1_low__] _______________________ (3) [__op0_high_*__op1_high_] This gives a 4-word result. Since we are only interested in the lower 2 words, partial result (3) and the upper words of (2a) and (2b) don't need to be calculated. Hence (2a) and (2b) can be calculated using non-widening multiplication. (1), however, needs to be calculated with an unsigned widening multiplication. If this operation is not directly supported we try using a signed widening multiplication and adjust the result. This adjustment works as follows: If both operands are positive then no adjustment is needed. If the operands have different signs, for example op0_low < 0 and op1_low >= 0, the instruction treats the most significant bit of op0_low as a sign bit instead of a bit with significance 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low with 2**BITS_PER_WORD - op0_low, and two's complements the result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to the result. Similarly, if both operands are negative, we need to add (op0_low + op1_low) * 2**BITS_PER_WORD. We use a trick to adjust quickly. We logically shift op0_low right (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to op0_high (op1_high) before it is used to calculate 2b (2a). If no logical shift exists, we do an arithmetic right shift and subtract the 0 or -1.
References BITS_PER_WORD, emit_move_insn(), expand_binop(), force_reg(), gen_int_shift_amount(), GET_MODE, expand_operand::mode, NULL_RTX, operand_subword(), operand_subword_force(), OPTAB_DIRECT, REG_P, expand_operand::target, and word_mode.
Referenced by expand_binop().
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Try calculating (parity:wide x) as (parity:narrow (low (x) ^ high (x)))
References expand_binop(), expand_unop(), expand_operand::mode, NULL_RTX, operand_subword_force(), OPTAB_DIRECT, expand_operand::target, and word_mode.
Referenced by expand_unop().
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Try calculating popcount of a double-word quantity as two popcount's of word-sized quantities and summing up the results.
References add_equal_note(), emit_insn(), end_sequence(), expand_binop(), expand_unop_direct(), gen_reg_rtx(), get_insns(), expand_operand::mode, NULL_RTX, operand_subword_force(), OPTAB_DIRECT, start_sequence(), expand_operand::target, and word_mode.
Referenced by expand_unop().
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Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts. OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first input operand; the shift moves bits in the direction OUTOF_INPUT-> INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words of the target. OP1 is the shift count and OP1_MODE is its mode. If OP1 is constant, it will have been truncated as appropriate and is known to be nonzero. If SHIFT_MASK is zero, the result of word shifts is undefined when the shift count is outside the range [0, BITS_PER_WORD). This routine must avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2). If SHIFT_MASK is nonzero, all word-mode shift counts are effectively masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will fill with zeros or sign bits as appropriate. If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1. Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED. In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2) are undefined. BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function may not use INTO_INPUT after modifying INTO_TARGET, and similarly for OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent function wants to calculate it itself. Return true if the shift could be successfully synthesized.
References BITS_PER_WORD, cmp1(), CONST0_RTX, const0_rtx, CONST_INT_P, CONSTANT_P, delete_insns_since(), do_compare_rtx_and_jump(), emit_barrier(), emit_jump_insn(), emit_label(), expand_doubleword_shift(), expand_doubleword_shift_condmove(), expand_subword_shift(), expand_superword_shift(), force_expand_binop(), gen_label_rtx(), get_last_insn(), immed_wide_int_const(), NO_DEFER_POP, OK_DEFER_POP, wi::shwi(), simplify_expand_binop(), simplify_relational_operation(), targetm, profile_probability::uninitialized(), and word_mode.
Referenced by expand_binop(), and expand_doubleword_shift().
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Try implementing expand_doubleword_shift using conditional moves. The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true, otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1 are the shift counts to use in the former and latter case. All other arguments are the same as the parent routine.
References cmp1(), emit_conditional_move(), expand_subword_shift(), expand_superword_shift(), gen_reg_rtx(), and word_mode.
Referenced by expand_doubleword_shift().
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Try calculating ffs(x) using ctz(x) if we have that instruction, or else with the sequence used by expand_clz. The ffs builtin promises to return zero for a zero value and ctz/clz may have an undefined value in that case. If they do not give us a convenient value, we have to generate a test and branch.
References add_equal_note(), CLZ_DEFINED_VALUE_AT_ZERO, CONST0_RTX, convert_move(), CTZ_DEFINED_VALUE_AT_ZERO, emit_cmp_and_jump_insns(), emit_insn(), emit_label(), end_sequence(), expand_binop(), expand_ctz(), expand_unop_direct(), GEN_INT, gen_int_mode(), gen_label_rtx(), get_insns(), GET_MODE_PRECISION(), expand_operand::mode, NULL_RTX, OPTAB_DIRECT, optab_handler(), start_sequence(), and expand_operand::target.
Referenced by expand_doubleword_clz_ctz_ffs(), and expand_unop().
Generate code to convert FROM to fixed point and store in TO. FROM must be floating point.
References arm_bfloat_half_format, as_a(), can_fix_p(), const_double_from_real_value(), convert_move(), convert_optab_libfunc(), convert_to_mode(), copy_rtx(), DECIMAL_FLOAT_MODE_P, delete_insns_since(), do_pending_stack_adjust(), emit_barrier(), emit_cmp_and_jump_insns(), emit_jump_insn(), emit_label(), emit_libcall_block(), emit_library_call_value(), emit_move_insn(), end_sequence(), expand_binop(), expand_fix(), expand_unop(), FOR_EACH_MODE_FROM, gcc_assert, gen_int_mode(), gen_label_rtx(), gen_reg_rtx(), get_insns(), get_last_insn(), GET_MODE, GET_MODE_BITSIZE(), GET_MODE_PRECISION(), HOST_WIDE_INT_1, HWI_COMPUTABLE_MODE_P(), ieee_single_format, insns, is_a(), is_narrower_int_mode(), last, LCT_CONST, maybe_emit_unop_insn(), NULL_RTX, offset, optab_handler(), OPTAB_LIB_WIDEN, real_2expN(), REAL_MODE_FORMAT, REAL_VALUE_TYPE, opt_mode< T >::require(), set_dst_reg_note(), start_sequence(), expand_operand::target, targetm, and expand_operand::value.
Referenced by expand_builtin_int_roundingfn(), expand_expr_real_2(), expand_fix(), and force_operand().
Generate code to convert FROM or TO a fixed-point. If UINTP is true, either TO or FROM is an unsigned integer. If SATP is true, we need to saturate the result.
References convert_optab_handler(), convert_optab_libfunc(), emit_libcall_block(), emit_library_call_value(), emit_move_insn(), emit_unop_insn(), end_sequence(), gcc_assert, get_insns(), GET_MODE, insns, LCT_CONST, NULL_RTX, prepare_libcall_arg(), start_sequence(), and expand_operand::value.
Referenced by convert_mode_scalar(), and expand_expr_real_2().
Generate code to convert FROM to floating point and store in TO. FROM must be fixed point and not VOIDmode. UNSIGNEDP nonzero means regard FROM as unsigned. Normally this is done by correcting the final value if it is negative.
References can_float_p(), const0_rtx, const1_rtx, const_double_from_real_value(), convert_move(), convert_optab_libfunc(), convert_to_mode(), do_pending_stack_adjust(), emit_barrier(), emit_cmp_and_jump_insns(), emit_jump_insn(), emit_label(), emit_libcall_block(), emit_library_call_value(), emit_move_insn(), emit_unop_insn(), end_sequence(), opt_mode< T >::exists(), expand_binop(), expand_float(), expand_shift(), FOR_EACH_MODE_FROM, gcc_assert, gen_label_rtx(), gen_reg_rtx(), get_insns(), GET_MODE, GET_MODE_BITSIZE(), GET_MODE_PRECISION(), GET_MODE_UNIT_PRECISION, insns, is_a(), is_narrower_int_mode(), LCT_CONST, NULL_RTX, offset, OPTAB_LIB_WIDEN, real_2expN(), REAL_VALUE_TYPE, REG_P, REGNO, opt_mode< T >::require(), significand_size(), start_sequence(), expand_operand::target, targetm, and expand_operand::value.
Referenced by expand_expr_real_2(), expand_float(), and force_operand().
void expand_insn | ( | enum insn_code | icode, |
unsigned int | nops, | ||
class expand_operand * | ops ) |
Emit instruction ICODE, using operands [OPS, OPS + NOPS) as its operands.
References gcc_unreachable, and maybe_expand_insn().
Referenced by allocate_dynamic_stack_space(), builtin_memset_gen_str(), emit_stack_probe(), expand_assignment(), expand_builtin_set_thread_pointer(), expand_builtin_thread_pointer(), expand_expr_real_2(), expand_fn_using_insn(), expand_gather_load_optab_fn(), expand_GOMP_SIMT_ENTER_ALLOC(), expand_GOMP_SIMT_EXIT(), expand_GOMP_SIMT_LAST_LANE(), expand_GOMP_SIMT_ORDERED_PRED(), expand_GOMP_SIMT_VOTE_ANY(), expand_GOMP_SIMT_XCHG_BFLY(), expand_GOMP_SIMT_XCHG_IDX(), expand_load_lanes_optab_fn(), expand_misaligned_mem_ref(), expand_mult_highpart(), expand_partial_load_optab_fn(), expand_partial_store_optab_fn(), expand_RAWMEMCHR(), expand_scatter_store_optab_fn(), expand_SPACESHIP(), expand_store_lanes_optab_fn(), expand_strided_load_optab_fn(), expand_strided_store_optab_fn(), expand_ternary_op(), expand_UADDC(), expand_vec_cmp_expr(), expand_vec_cond_mask_optab_fn(), expand_vec_cond_optab_fn(), expand_vec_series_expr(), expand_vector_broadcast(), expand_while_optab_fn(), expand_widen_pattern_expr(), and store_constructor().
void expand_jump_insn | ( | enum insn_code | icode, |
unsigned int | nops, | ||
class expand_operand * | ops ) |
Like expand_insn, but for jumps.
References gcc_unreachable, and maybe_expand_jump_insn().
Referenced by emit_indirect_jump(), and try_casesi().
void expand_mem_signal_fence | ( | enum memmodel | model | ) |
Emit a signal fence with given memory model.
References expand_memory_blockage(), and is_mm_relaxed().
Referenced by expand_builtin_atomic_signal_fence().
void expand_mem_thread_fence | ( | enum memmodel | model | ) |
This routine will either emit the mem_thread_fence pattern or issue a sync_synchronize to generate a fence for memory model MEMMODEL.
References emit_insn(), emit_library_call(), expand_memory_blockage(), GEN_INT, is_mm_relaxed(), LCT_NORMAL, NULL_RTX, synchronize_libfunc, and targetm.
Referenced by expand_atomic_load(), expand_atomic_store(), expand_builtin_atomic_thread_fence(), expand_builtin_sync_synchronize(), and maybe_emit_sync_lock_test_and_set().
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Do not propagate memory accesses across this point.
References emit_insn(), expand_asm_memory_blockage(), and targetm.
Referenced by expand_atomic_load(), expand_atomic_store(), expand_mem_signal_fence(), and expand_mem_thread_fence().
Expand a highpart multiply.
References as_a(), can_mult_highpart_p(), create_input_operand(), create_output_operand(), expand_binop(), expand_insn(), expand_vec_perm_const(), expmed_mult_highpart_optab(), gcc_checking_assert, gcc_unreachable, gen_lowpart, gen_reg_rtx(), GET_MODE_NUNITS(), GET_MODE_SIZE(), i, insn_data, INT_MAX, known_eq, expand_operand::mode, insn_operand_data::mode, int_vector_builder< T >::new_vector(), NULL_RTX, insn_data_d::operand, optab_handler(), OPTAB_LIB_WIDEN, expand_operand::target, and expand_operand::value.
Referenced by expand_expr_real_2().
Emit code to compute the one's complement absolute value of OP0 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient. (TARGET may be NULL_RTX.) The return value says where the result actually is to be found. MODE is the mode of the operand; the mode of the result is different but can be deduced from MODE.
References delete_insns_since(), expand_binop(), expand_shift(), expand_unop(), FLOAT_MODE_P, get_last_insn(), GET_MODE_PRECISION(), is_int_mode(), last, expand_operand::mode, NULL_RTX, optab_handler(), OPTAB_LIB_WIDEN, OPTAB_WIDEN, optimize_insn_for_speed_p(), and expand_operand::target.
Referenced by noce_try_abs().
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Try calculating (parity x) as (and (popcount x) 1), where popcount can also be done in a wider mode.
References const1_rtx, convert_to_mode(), delete_insns_since(), expand_binop(), expand_unop(), FOR_EACH_MODE_FROM, gen_lowpart, gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_CLASS, last, expand_operand::mode, NULL_RTX, OPTAB_DIRECT, optab_handler(), opt_mode< T >::require(), expand_operand::target, TRULY_NOOP_TRUNCATION_MODES_P, and widen_operand().
Referenced by expand_unop().
Generate code to convert FROM to fixed point and store in TO. FROM must be floating point, TO must be signed. Use the conversion optab TAB to do the conversion.
References convert_move(), convert_optab_handler(), convert_to_mode(), delete_insns_since(), FOR_EACH_MODE_FROM, gen_reg_rtx(), get_last_insn(), GET_MODE, insn_optimization_type(), last, maybe_emit_unop_insn(), and expand_operand::target.
Referenced by expand_builtin_int_roundingfn(), and expand_builtin_int_roundingfn_2().
rtx expand_simple_binop | ( | machine_mode | mode, |
enum rtx_code | code, | ||
rtx | op0, | ||
rtx | op1, | ||
rtx | target, | ||
int | unsignedp, | ||
enum optab_methods | methods ) |
Wrapper around expand_binop which takes an rtx code to specify the operation to perform, not an optab pointer. All other arguments are the same.
References expand_binop(), gcc_assert, expand_operand::mode, and expand_operand::target.
Referenced by asan_clear_shadow(), default_memtag_extract_tag(), default_memtag_set_tag(), default_memtag_untagged_pointer(), emit_block_cmp_via_loop(), emit_block_move_via_loop(), emit_move_resolve_push(), expand_arith_overflow_result_store(), expand_asan_emit_allocas_unpoison(), expand_atomic_fetch_op(), expand_atomic_fetch_op_no_fallback(), expand_builtin_apply(), expand_builtin_atomic_fetch_op(), expand_doubleword_divmod(), expand_doubleword_mod(), expand_expr_addr_expr_1(), expand_HWASAN_ALLOCA_UNPOISON(), expand_HWASAN_CHOOSE_TAG(), expand_ifn_atomic_bit_test_and(), expand_mul_overflow(), expand_POPCOUNT(), expand_ubsan_result_store(), expand_vec_perm_var(), force_operand(), hwasan_emit_untag_frame(), hwasan_truncate_to_tag_size(), inline_string_cmp(), instantiate_virtual_regs_in_insn(), noce_try_addcc(), noce_try_cmove(), noce_try_cond_zero_arith(), noce_try_minmax(), noce_try_store_flag_constants(), noce_try_store_flag_mask(), round_trampoline_addr(), and unroll_loop_runtime_iterations().
rtx expand_simple_unop | ( | machine_mode | mode, |
enum rtx_code | code, | ||
rtx | op0, | ||
rtx | target, | ||
int | unsignedp ) |
Wrapper around expand_unop which takes an rtx code to specify the operation to perform, not an optab pointer. All other arguments are the same.
References expand_unop(), gcc_assert, expand_operand::mode, and expand_operand::target.
Referenced by expand_atomic_fetch_op(), expand_atomic_fetch_op_no_fallback(), expand_builtin_atomic_fetch_op(), expand_ifn_atomic_bit_test_and(), force_operand(), and noce_try_abs().
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This subroutine of expand_doubleword_shift handles the cases in which the effective shift value is < BITS_PER_WORD. The arguments and return value are the same as for the parent routine.
References BITS_PER_WORD, const0_rtx, const1_rtx, CONSTANT_P, emit_move_insn(), expand_unop(), force_expand_binop(), immed_wide_int_const(), wi::shwi(), simplify_expand_binop(), and word_mode.
Referenced by expand_doubleword_shift(), and expand_doubleword_shift_condmove().
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This subroutine of expand_doubleword_shift handles the cases in which the effective shift value is >= BITS_PER_WORD. The arguments and return value are the same as for the parent routine, except that SUPERWORD_OP1 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET. INTO_TARGET may be null if the caller has decided to calculate it.
References BITS_PER_WORD, CONST0_RTX, emit_move_insn(), force_expand_binop(), gen_int_shift_amount(), and word_mode.
Referenced by expand_doubleword_shift(), and expand_doubleword_shift_condmove().
This function expands the legacy _sync_lock test_and_set operation which is generally an atomic exchange. Some limited targets only allow the constant 1 to be stored. This is an ACQUIRE operation. TARGET is an optional place to stick the return value. MEM is where VAL is stored.
References const1_rtx, maybe_emit_atomic_exchange(), maybe_emit_atomic_test_and_set(), maybe_emit_compare_and_swap_exchange_loop(), maybe_emit_sync_lock_test_and_set(), MEMMODEL_SYNC_ACQUIRE, and expand_operand::target.
Referenced by expand_builtin_sync_lock_test_and_set().
rtx expand_ternary_op | ( | machine_mode | mode, |
optab | ternary_optab, | ||
rtx | op0, | ||
rtx | op1, | ||
rtx | op2, | ||
rtx | target, | ||
int | unsignedp ) |
Generate code to perform an operation specified by TERNARY_OPTAB on operands OP0, OP1 and OP2, with result having machine-mode MODE. UNSIGNEDP is for the case where we have to widen the operands to perform the operation. It says to use zero-extension. If TARGET is nonzero, the value is generated there, if it is convenient to do so. In all cases an rtx is returned for the locus of the value; this may or may not be TARGET.
References create_convert_operand_from(), create_output_operand(), expand_insn(), gcc_assert, expand_operand::mode, optab_handler(), expand_operand::target, and expand_operand::value.
Referenced by expand_builtin_mathfn_ternary(), and expand_expr_real_2().
Generate code to perform an operation specified by BINOPTAB on operands OP0 and OP1, with two results to TARG1 and TARG2. We assume that the order of the operands for the instruction is TARG0, OP0, OP1, TARG1, which would fit a pattern like [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))]. Either TARG0 or TARG1 may be zero, but what that means is that the result is not actually wanted. We will generate it into a dummy pseudo-reg and discard it. They may not both be zero. Returns true if this operation can be performed; false if not.
References avoid_expensive_constant(), CLASS_HAS_WIDER_MODES_P, convert_modes(), convert_move(), create_convert_operand_from(), create_fixed_operand(), delete_insns_since(), expand_twoval_binop(), FOR_EACH_WIDER_MODE, gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_CLASS, insn_data, last, maybe_expand_insn(), expand_operand::mode, insn_operand_data::mode, insn_data_d::operand, and optab_handler().
Referenced by expand_DIVMOD(), expand_divmod(), and expand_twoval_binop().
bool expand_twoval_binop_libfunc | ( | optab | binoptab, |
rtx | op0, | ||
rtx | op1, | ||
rtx | targ0, | ||
rtx | targ1, | ||
enum rtx_code | code ) |
Expand the two-valued library call indicated by BINOPTAB, but preserve only one of the values. If TARG0 is non-NULL, the first value is placed into TARG0; otherwise the second value is placed into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1). This routine assumes that the value returned by the library call is as if the return value was of an integral mode twice as wide as the mode of OP0. Returns 1 if the call was successful.
References emit_libcall_block(), emit_library_call_value(), end_sequence(), gcc_assert, get_insns(), GET_MODE, GET_MODE_BITSIZE(), GET_MODE_SIZE(), insns, LCT_CONST, expand_operand::mode, NULL_RTX, optab_libfunc(), simplify_gen_subreg(), smallest_int_mode_for_size(), and start_sequence().
Referenced by expand_divmod().
Generate code to perform an operation specified by UNOPPTAB on operand OP0, with two results to TARG0 and TARG1. We assume that the order of the operands for the instruction is TARG0, TARG1, OP0. Either TARG0 or TARG1 may be zero, but what that means is that the result is not actually wanted. We will generate it into a dummy pseudo-reg and discard it. They may not both be zero. Returns true if this operation can be performed; false if not.
References CLASS_HAS_WIDER_MODES_P, convert_modes(), convert_move(), create_convert_operand_from(), create_fixed_operand(), delete_insns_since(), expand_twoval_unop(), FOR_EACH_WIDER_MODE, gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_CLASS, last, maybe_expand_insn(), expand_operand::mode, and optab_handler().
Referenced by expand_builtin_cexpi(), expand_builtin_mathfn_3(), expand_builtin_sincos(), and expand_twoval_unop().
Generate code to perform an operation specified by UNOPTAB on operand OP0, with result having machine-mode MODE. UNSIGNEDP is for the case where we have to widen the operands to perform the operation. It says to use zero-extension. If TARGET is nonzero, the value is generated there, if it is convenient to do so. In all cases an rtx is returned for the locus of the value; this may or may not be TARGET.
References as_a(), BITS_PER_WORD, CLASS_HAS_WIDER_MODES_P, CONST0_RTX, CONSTM1_RTX, convert_move(), delete_insns_since(), emit_insn(), emit_libcall_block_1(), emit_library_call_value(), emit_move_insn(), end_sequence(), expand_absneg_bit(), expand_binop(), expand_clrsb_using_clz(), expand_ctz(), expand_doubleword_bswap(), expand_doubleword_clz_ctz_ffs(), expand_doubleword_parity(), expand_doubleword_popcount(), expand_ffs(), expand_parity(), expand_shift(), expand_unop(), expand_unop_direct(), FOR_EACH_WIDER_MODE, gcc_assert, gen_int_mode(), gen_int_shift_amount(), gen_lowpart, gen_reg_rtx(), get_insns(), get_last_insn(), GET_MODE, GET_MODE_BITSIZE(), GET_MODE_CLASS, GET_MODE_PRECISION(), GET_MODE_SIZE(), GET_MODE_UNIT_SIZE, hard_libcall_value(), HONOR_SIGNED_ZEROS(), i, insns, integer_type_node, is_a(), is_int_mode(), last, LCT_CONST, expand_operand::mode, NULL_RTX, operand_subword(), operand_subword_force(), OPTAB_DIRECT, optab_handler(), OPTAB_LIB_WIDEN, optab_libfunc(), OPTAB_WIDEN, optimize_insn_for_speed_p(), reg_overlap_mentioned_p(), SCALAR_INT_MODE_P, simplify_gen_unary(), start_sequence(), expand_operand::target, trapv_unoptab_p(), TRULY_NOOP_TRUNCATION_MODES_P, TYPE_MODE, valid_multiword_target_p(), expand_operand::value, widen_bswap(), widen_leading(), widen_operand(), and word_mode.
Referenced by emit_cstore(), emit_store_flag_1(), emit_store_flag_int(), expand_abs(), expand_abs_nojump(), expand_addsub_overflow(), expand_builtin_bswap(), expand_builtin_issignaling(), expand_builtin_mathfn_3(), expand_builtin_unop(), expand_copysign_absneg(), expand_divmod(), expand_doubleword_bswap(), expand_doubleword_parity(), expand_expr_real_2(), expand_fix(), expand_mul_overflow(), expand_mult(), expand_mult_const(), expand_neg_overflow(), expand_one_cmpl_abs_nojump(), expand_parity(), expand_shift_1(), expand_simple_unop(), expand_subword_shift(), expand_unop(), expand_unop_direct(), flip_storage_order(), negate_rtx(), noce_emit_move_insn(), widen_bswap(), and widen_leading().
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As expand_unop, but will fail rather than attempt the operation in a different mode or with a libcall.
References add_equal_note(), create_convert_operand_from(), create_output_operand(), delete_insns_since(), emit_insn(), expand_unop(), get_last_insn(), INSN_P, last, maybe_gen_insn(), expand_operand::mode, NEXT_INSN(), NULL_RTX, optab_handler(), expand_operand::target, and expand_operand::value.
Referenced by expand_clrsb_using_clz(), expand_ctz(), expand_doubleword_clz_ctz_ffs(), expand_doubleword_popcount(), expand_ffs(), and expand_unop().
Generate insns for a vector comparison into a mask.
References create_fixed_operand(), create_output_operand(), exp(), expand_insn(), get_vec_cmp_eq_icode(), get_vec_cmp_icode(), expand_operand::target, TREE_CODE, TREE_OPERAND, TREE_TYPE, TYPE_MODE, TYPE_UNSIGNED, expand_operand::value, vector_compare_rtx(), and XEXP.
Referenced by do_store_flag().
A subroutine of expand_vec_perm_var for expanding one vec_perm insn.
References create_fixed_operand(), create_input_operand(), create_output_operand(), force_reg(), gcc_assert, gcc_checking_assert, GET_MODE, GET_MODE_CLASS, insn_operand_matches(), maybe_expand_insn(), NULL_RTX, related_int_vector_mode(), require(), rtx_equal_p(), expand_operand::target, and expand_operand::value.
Referenced by expand_vec_perm_const(), and expand_vec_perm_var().
rtx expand_vec_perm_const | ( | machine_mode | mode, |
rtx | v0, | ||
rtx | v1, | ||
const vec_perm_builder & | sel, | ||
machine_mode | sel_mode, | ||
rtx | target ) |
Implement a permutation of vectors v0 and v1 using the permutation vector in SEL and return the result. Use TARGET to hold the result if nonnull and convenient. MODE is the mode of the vectors being permuted (V0 and V1). SEL_MODE is the TYPE_MODE associated with SEL, or BLKmode if SEL isn't known to have a particular mode.
References CONST0_RTX, const0_rtx, create_convert_operand_from_type(), create_input_operand(), create_output_operand(), delete_insns_since(), direct_optab_handler(), expand_vec_perm_1(), force_reg(), gcc_checking_assert, gen_lowpart, gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_NUNITS(), GET_MODE_UNIT_SIZE, last, maybe_expand_insn(), expand_operand::mode, vec_perm_indices::new_expanded_vector(), NULL, NULL_RTX, optab_handler(), qimode_for_vec_perm(), register_operand(), related_int_vector_mode(), rtx_equal_p(), selector_fits_mode_p(), shift_amt_for_vec_perm_mask(), sizetype, expand_operand::target, targetm, unknown_optab, expand_operand::value, and vec_perm_indices_to_rtx().
Referenced by expand_expr_real_2(), expand_mult_highpart(), and expand_vec_perm_var().
Implement a permutation of vectors v0 and v1 using the permutation vector in SEL and return the result. Use TARGET to hold the result if nonnull and convenient. MODE is the mode of the vectors being permuted (V0 and V1). SEL must have the integer equivalent of MODE and is known to be unsuitable for permutes with a constant permutation vector.
References rtx_vector_builder::build(), direct_optab_handler(), exact_log2(), expand_simple_binop(), expand_vec_perm_1(), expand_vec_perm_const(), gcc_assert, GEN_INT, gen_int_shift_amount(), gen_lowpart, gen_reg_rtx(), GET_MODE, GET_MODE_MASK, GET_MODE_NUNITS(), GET_MODE_SIZE(), GET_MODE_UNIT_SIZE, i, maybe_gt, expand_operand::mode, NULL, NULL_RTX, OPTAB_DIRECT, qimode_for_vec_perm(), and expand_operand::target.
Referenced by expand_expr_real_2().
Generate VEC_SERIES_EXPR <OP0, OP1>, returning a value of mode VMODE. Use TARGET for the result if nonnull and convenient.
References create_input_operand(), create_output_operand(), direct_optab_handler(), expand_insn(), gcc_assert, GET_MODE_INNER, expand_operand::target, and expand_operand::value.
Referenced by expand_expr_real_2().
Create a new vector value in VMODE with all elements set to OP. The mode of OP must be the element mode of VMODE. If OP is a constant, then the return value will be a constant.
References convert_optab_handler(), create_input_operand(), create_output_operand(), emit_insn(), expand_insn(), gcc_checking_assert, gen_const_vec_duplicate(), gen_reg_rtx(), GET_MODE, GET_MODE_INNER, GET_MODE_NUNITS(), i, NULL, NULL_RTX, optab_handler(), rtvec_alloc(), RTVEC_ELT, valid_for_const_vector_p(), expand_operand::value, and VECTOR_MODE_P.
Referenced by expand_binop(), expand_expr_real_2(), and maybe_legitimize_operand().
rtx expand_widen_pattern_expr | ( | const_sepops | ops, |
rtx | op0, | ||
rtx | op1, | ||
rtx | wide_op, | ||
rtx | target, | ||
int | unsignedp ) |
Expand vector widening operations. There are two different classes of operations handled here: 1) Operations whose result is wider than all the arguments to the operation. Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR In this case OP0 and optionally OP1 would be initialized, but WIDE_OP wouldn't (not relevant for this case). 2) Operations whose result is of the same size as the last argument to the operation, but wider than all the other arguments to the operation. Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR. In the case WIDE_OP, OP0 and optionally OP1 would be initialized. E.g, when called to expand the following operations, this is how the arguments will be initialized: nops OP0 OP1 WIDE_OP widening-sum 2 oprnd0 - oprnd1 widening-dot-product 3 oprnd0 oprnd1 oprnd2 widening-mult 2 oprnd0 oprnd1 - type-promotion (vec-unpack) 1 oprnd0 - -
References separate_ops::code, create_convert_operand_from(), create_output_operand(), expand_insn(), find_widening_optab_handler, gcc_assert, gcc_unreachable, GEN_INT, NULL_TREE, separate_ops::op0, separate_ops::op1, separate_ops::op2, optab_default, optab_for_tree_code(), optab_handler(), optab_vector_mixed_sign, SCALAR_INT_MODE_P, SIGNED, expand_operand::target, TREE_CODE_LENGTH, TREE_TYPE, separate_ops::type, TYPE_MODE, TYPE_SIGN, TYPE_VECTOR_SUBPARTS(), UNSIGNED, expand_operand::value, and VECTOR_BOOLEAN_TYPE_P.
Referenced by expand_expr_real_2().
Helper function to find the MODE_CC set in a sync_compare_and_swap pattern.
References gcc_assert, GET_CODE, GET_MODE, GET_MODE_CLASS, REG_P, and SET.
Referenced by expand_atomic_compare_and_swap().
bool force_expand_binop | ( | machine_mode | mode, |
optab | binoptab, | ||
rtx | op0, | ||
rtx | op1, | ||
rtx | target, | ||
int | unsignedp, | ||
enum optab_methods | methods ) |
Like simplify_expand_binop, but always put the result in TARGET. Return true if the expansion succeeded.
References emit_move_insn(), expand_operand::mode, simplify_expand_binop(), and expand_operand::target.
Referenced by expand_doubleword_shift(), expand_sjlj_dispatch_table(), expand_subword_shift(), expand_superword_shift(), and shift_return_value().
These functions attempt to generate an insn body, rather than emitting the insn, but if the gen function already emits them, we make no attempt to turn them back into naked patterns.
Generate and return an insn body to add Y to X.
References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.
Referenced by emit_add2_insn(), address_reload_context::emit_autoinc(), gen_reload(), inc_for_reload(), and pieces_addr::increment_address().
Generate and return an insn body to add r1 and c, storing the result in r0.
References GET_MODE, insn_operand_matches(), NULL, and optab_handler().
Referenced by emit_inc_dec_insn_before().
Generate and return an insn body to add Y to X.
References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.
Referenced by emit_add3_insn().
Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition CODE. Return 0 on failure.
References do_pending_stack_adjust(), emit_insn(), end_sequence(), get_insns(), GET_MODE, insn_operand_matches(), expand_operand::mode, NULL, NULL_RTX, OPTAB_DIRECT, optab_handler(), prepare_cmp_insn(), start_sequence(), and XEXP.
Referenced by find_cond_trap().
Generate the body of an insn to extend Y (with mode MFROM) into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero.
References can_extend_p(), and y.
Referenced by assign_parm_setup_reg().
Generate and return an insn body to subtract Y from X.
References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.
Referenced by address_reload_context::emit_autoinc(), and inc_for_reload().
Generate and return an insn body to subtract r1 and c, storing the result in r0.
References GET_MODE, insn_operand_matches(), NULL, and optab_handler().
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Fill in structure pointed to by OP with the various optab entries for an operation of type CODE.
References atomic_op_functions::fetch_after, atomic_op_functions::fetch_before, gcc_assert, gcc_unreachable, atomic_op_functions::mem_fetch_after, atomic_op_functions::mem_fetch_before, atomic_op_functions::mem_no_result, atomic_op_functions::no_result, NULL, and atomic_op_functions::reverse_code.
Referenced by expand_atomic_fetch_op(), and expand_atomic_fetch_op_no_fallback().
Return rtx code for TCODE. Use UNSIGNEDP to select signed or unsigned operation code.
References gcc_assert, and get_rtx_code_1().
Referenced by expand_ccmp_next(), get_compare_parts(), and vector_compare_rtx().
Return rtx code for TCODE or UNKNOWN. Use UNSIGNEDP to select signed or unsigned operation code.
Referenced by get_rtx_code(), vcond_icode_p(), and vec_cmp_icode_p().
References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.
Referenced by move2add_use_add2_insn(), and reload_cse_move2add().
Return true if the target implements an addptr pattern and X, Y, and Z are valid for the pattern predicates.
References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.
Referenced by eliminate_regs_in_insn(), and emit_add3_insn().
Report whether we have an instruction to perform the operation specified by CODE on operands of mode MODE.
References expand_operand::mode, and optab_handler().
Referenced by analyze_insn_to_expand_var(), default_min_divisions_for_recip_mul(), do_compare_rtx_and_jump(), do_jump(), expand_atomic_compare_and_swap(), expand_DEFERRED_INIT(), expand_expr_real_2(), force_to_mode(), make_compound_operation_int(), make_extraction(), move2add_use_add2_insn(), simplify_comparison(), and simplify_context::simplify_subreg().
References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.
Return true if OPERAND is suitable for operand number OPNO of instruction ICODE.
References insn_data.
Referenced by assign_parm_setup_reg(), can_compare_p(), can_vec_extract_var_idx_p(), can_vec_set_var_idx_p(), compress_float_constant(), default_secondary_reload(), emit_cmp_and_jump_insn_1(), expand_vec_perm_1(), find_reloads_address_1(), gen_add2_insn(), gen_add3_insn(), gen_addptr3_insn(), gen_cond_trap(), gen_reload(), gen_sub2_insn(), gen_sub3_insn(), have_add2_insn(), have_addptr3_insn(), have_sub2_insn(), init_expr_target(), insn_predicate_matches_p(), internal_check_ptrs_fn_supported_p(), internal_gather_scatter_fn_supported_p(), internal_len_load_store_bias(), maybe_legitimize_operand(), maybe_legitimize_operand_same_code(), maybe_legitimize_operands(), prepare_cmp_insn(), prepare_operand(), reverse_rotate_by_imm_p(), and safe_insn_predicate().
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Return whether the backend-emitted comparison for code CODE, comparing operands of mode VALUE_MODE and producing a result with MASK_MODE, matches operand OPNO of pattern ICODE.
References alloca_raw_REG, insn_operand_matches(), and LAST_VIRTUAL_REGISTER.
Referenced by can_vcond_compare_p(), and can_vec_cmp_compare_p().
This function tries to emit an atomic_exchange intruction. VAL is written to *MEM using memory model MODEL. The previous contents of *MEM are returned, using TARGET if possible.
References create_fixed_operand(), create_input_operand(), create_integer_operand(), create_output_operand(), direct_optab_handler(), GET_MODE, maybe_expand_insn(), expand_operand::mode, NULL_RTX, expand_operand::target, and expand_operand::value.
Referenced by expand_atomic_exchange(), expand_atomic_store(), expand_atomic_test_and_set(), expand_sync_lock_test_and_set(), and maybe_optimize_fetch_op().
This function tries to implement an atomic test-and-set operation using the atomic_test_and_set instruction pattern. A boolean value is returned from the operation, using TARGET if possible.
References adjust_address_nv, create_fixed_operand(), create_integer_operand(), create_output_operand(), gcc_checking_assert, GET_MODE, insn_data, maybe_expand_insn(), expand_operand::mode, insn_operand_data::mode, NULL_RTX, insn_data_d::operand, expand_operand::target, targetm, and expand_operand::value.
Referenced by expand_atomic_test_and_set(), and expand_sync_lock_test_and_set().
This function tries to implement an atomic exchange operation using a compare_and_swap loop. VAL is written to *MEM. The previous contents of *MEM are returned, using TARGET if possible. No memory model is required since a compare_and_swap loop is seq-cst.
References can_compare_and_swap_p(), expand_compare_and_swap_loop(), gen_reg_rtx(), GET_MODE, expand_operand::mode, NULL_RTX, register_operand(), and expand_operand::target.
Referenced by expand_atomic_exchange(), expand_atomic_store(), expand_atomic_test_and_set(), and expand_sync_lock_test_and_set().
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Try to emit an instruction for a specific operation varaition. OPTAB contains the OP functions. TARGET is an optional place to return the result. const0_rtx means unused. MEM is the memory location to operate on. VAL is the value to use in the operation. USE_MEMMODEL is TRUE if the variation with a memory model should be tried. MODEL is the memory model, if used. AFTER is true if the returned result is the value after the operation.
References const0_rtx, create_convert_operand_to(), create_fixed_operand(), create_integer_operand(), create_output_operand(), direct_optab_handler(), GET_MODE, maybe_expand_insn(), expand_operand::mode, NULL_RTX, optab_handler(), expand_operand::target, and expand_operand::value.
Referenced by expand_atomic_fetch_op_no_fallback().
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This function tries to implement an atomic exchange operation using __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL. The previous contents of *MEM are returned, using TARGET if possible. Since this instructionn is an acquire barrier only, stronger memory models may require additional barriers to be emitted.
References can_compare_and_swap_p(), convert_memory_address, create_fixed_operand(), create_input_operand(), create_output_operand(), delete_insns_since(), emit_library_call_value(), expand_mem_thread_fence(), get_last_insn(), GET_MODE, is_mm_acq_rel(), is_mm_release(), is_mm_seq_cst(), LCT_NORMAL, maybe_expand_insn(), expand_operand::mode, NULL, NULL_RTX, optab_handler(), optab_libfunc(), ptr_mode, expand_operand::target, expand_operand::value, and XEXP.
Referenced by expand_atomic_test_and_set(), and expand_sync_lock_test_and_set().
Generate an instruction whose insn-code is INSN_CODE, with two operands: an output TARGET and an input OP0. TARGET *must* be nonzero, and the output is always stored there. CODE is an rtx code such that (CODE OP0) is an rtx that describes the value that is stored into TARGET. Return false if expansion failed.
References add_equal_note(), create_input_operand(), create_output_operand(), emit_insn(), emit_move_insn(), GET_MODE, INSN_P, maybe_gen_insn(), NEXT_INSN(), NULL_RTX, expand_operand::target, and expand_operand::value.
Referenced by emit_unop_insn(), expand_builtin_interclass_mathfn(), expand_builtin_issignaling(), expand_builtin_signbit(), expand_fix(), and expand_sfix_optab().
bool maybe_expand_insn | ( | enum insn_code | icode, |
unsigned int | nops, | ||
class expand_operand * | ops ) |
Try to emit instruction ICODE, using operands [OPS, OPS + NOPS) as its operands. Return true on success and emit no code on failure.
References emit_insn(), and maybe_gen_insn().
Referenced by emit_block_move_via_pattern(), emit_conditional_add(), emit_conditional_move_1(), emit_conditional_neg_or_complement(), emit_cstore(), emit_storent_insn(), expand_addsub_overflow(), expand_atomic_compare_and_swap(), expand_atomic_load(), expand_atomic_store(), expand_builtin_prefetch(), expand_builtin_strlen(), expand_cmpstr(), expand_cmpstrn_or_cmpmem(), expand_ifn_atomic_bit_test_and(), expand_ifn_atomic_op_fetch_cmp_0(), expand_insn(), expand_movstr(), expand_mul_overflow(), expand_neg_overflow(), expand_twoval_binop(), expand_twoval_unop(), expand_vec_perm_1(), expand_vec_perm_const(), expand_vec_set_optab_fn(), extract_bit_field_1(), extract_bit_field_using_extv(), maybe_emit_atomic_exchange(), maybe_emit_atomic_test_and_set(), maybe_emit_call_builtin___clear_cache(), maybe_emit_op(), maybe_emit_sync_lock_test_and_set(), probe_stack_range(), set_storage_via_setmem(), store_bit_field_1(), store_bit_field_using_insv(), and store_integral_bit_field().
bool maybe_expand_jump_insn | ( | enum insn_code | icode, |
unsigned int | nops, | ||
class expand_operand * | ops ) |
Like maybe_expand_insn, but for jumps.
References emit_jump_insn(), and maybe_gen_insn().
Referenced by expand_jump_insn().
rtx_insn * maybe_gen_insn | ( | enum insn_code | icode, |
unsigned int | nops, | ||
class expand_operand * | ops ) |
Try to generate instruction ICODE, using operands [OPS, OPS + NOPS) as its operands. Return the instruction pattern on success, and emit any necessary set-up code. Return null and emit no code on failure.
References gcc_assert, gcc_unreachable, insn_data, maybe_legitimize_operands(), NULL, and expand_operand::value.
Referenced by expand_binop_directly(), expand_unop_direct(), maybe_emit_unop_insn(), maybe_expand_insn(), and maybe_expand_jump_insn().
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Try to make OP match operand OPNO of instruction ICODE. Return true on success, storing the new operand value back in OP.
References as_a(), const0_rtx, convert_memory_address, convert_modes(), convert_to_mode(), copy_to_mode_reg(), EXPAND_ADDRESS, EXPAND_CONVERT_FROM, EXPAND_CONVERT_TO, EXPAND_FIXED, EXPAND_INPUT, EXPAND_INTEGER, EXPAND_OUTPUT, EXPAND_UNDEFINED_INPUT, expand_vector_broadcast(), gcc_assert, gen_int_mode(), gen_reg_rtx(), GET_MODE, GET_MODE_INNER, insn_data, insn_operand_matches(), expand_operand::int_value, known_eq, maybe_legitimize_operand_same_code(), expand_operand::mode, expand_operand::target, trunc_int_for_mode(), expand_operand::type, expand_operand::unsigned_p, expand_operand::value, and VECTOR_MODE_P.
Referenced by maybe_legitimize_operands().
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Like maybe_legitimize_operand, but do not change the code of the current rtx value.
References copy_to_mode_reg(), delete_insns_since(), get_address_mode(), get_last_insn(), insn_data, insn_operand_matches(), last, LAST_VIRTUAL_REGISTER, MEM_P, REG_P, REGNO, replace_equiv_address(), side_effects_p(), expand_operand::value, and XEXP.
Referenced by maybe_legitimize_operand().
bool maybe_legitimize_operands | ( | enum insn_code | icode, |
unsigned int | opno, | ||
unsigned int | nops, | ||
class expand_operand * | ops ) |
Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS) of instruction ICODE. Return true on success, leaving the new operand values in the OPS themselves. Emit no code on failure.
References can_reuse_operands_p(), copy_rtx(), delete_insns_since(), get_last_insn(), i, insn_operand_matches(), last, maybe_legitimize_operand(), rtx_equal_p(), and expand_operand::value.
Referenced by emit_stack_probe(), expand_builtin_interclass_mathfn(), maybe_gen_insn(), and vector_compare_rtx().
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See if there is a more optimal way to implement the operation "*MEM CODE VAL" using memory order MODEL. If AFTER is true the operation needs to return the value of *MEM after the operation, otherwise the previous value. TARGET is an optional place to place the result. The result is unused if it is const0_rtx. Return the result if there is a better sequence, otherwise NULL_RTX.
References const0_rtx, constm1_rtx, gen_reg_rtx(), GET_MODE, maybe_emit_atomic_exchange(), and NULL_RTX.
Referenced by expand_atomic_fetch_op_no_fallback().
Called via note_stores by emit_libcall_block. Set P->must_stay if the currently examined clobber / store has to stay in the list of insns that constitute the actual libcall block.
References CALL_P, find_reg_fusage(), no_conflict_data::first, GET_CODE, no_conflict_data::insn, modified_between_p(), modified_in_p(), no_conflict_data::must_stay, PATTERN(), reg_overlap_mentioned_p(), reg_used_between_p(), SET, SET_DEST, SET_SRC, and no_conflict_data::target.
Referenced by emit_libcall_block_1().
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This function is called when we are going to emit a compare instruction that compares the values found in X and Y, using the rtl operator COMPARISON. If they have mode BLKmode, then SIZE specifies the size of both operands. UNSIGNEDP nonzero says that the operands are unsigned; this matters if they need to be widened (as given by METHODS). *PTEST is where the resulting comparison RTX is returned or NULL_RTX if we failed to produce one. *PMODE is the mode of the inputs (in case they are const_int). This function performs all the setup necessary so that the caller only has to emit a single comparison insn. This setup can involve doing a BLKmode comparison or emitting a library call to perform the comparison if no insn is available to handle it. The values which are passed in through pointers can be modified; the caller should perform the comparison on the modified values. Constant comparisons must have already been folded.
References ALL_FIXED_POINT_MODE_P, as_a(), can_create_pseudo_p, canonicalize_comparison(), cfun, const0_rtx, const1_rtx, CONST_INT_P, CONST_SCALAR_INT_P, CONSTANT_P, convert_to_mode(), copy_to_reg(), COSTS_N_INSNS, delete_insns_since(), direct_optab_handler(), emit_block_comp_via_libcall(), emit_insn(), emit_library_call_value(), FOR_EACH_MODE_IN_CLASS, FOR_EACH_WIDER_MODE_FROM, force_reg(), gcc_assert, GEN_INT, gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_BITSIZE(), GET_MODE_CLASS, GET_MODE_MASK, insn_data, insn_operand_matches(), integer_type_node, last, LCT_CONST, may_trap_p(), MEM_ALIGN, MIN, insn_operand_data::mode, NULL_RTX, insn_data_d::operand, OPTAB_DIRECT, optab_handler(), OPTAB_LIB, OPTAB_LIB_WIDEN, optab_libfunc(), OPTAB_WIDEN, optimize_insn_for_speed_p(), plus_constant(), prepare_cmp_insn(), prepare_float_lib_cmp(), prepare_operand(), opt_mode< T >::require(), rtx_cost(), rtx_equal_p(), SCALAR_FLOAT_MODE_P, TARGET_LIB_INT_CMP_BIASED, targetm, TYPE_MODE, UINTVAL, XEXP, and y.
Referenced by emit_cmp_and_jump_insns(), emit_conditional_add(), emit_conditional_move(), gen_cond_trap(), and prepare_cmp_insn().
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Expand the basic unary and binary arithmetic operations, for GNU compiler. Copyright (C) 1987-2024 Free Software Foundation, Inc. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>.
Include insn-config.h before expr.h so that HAVE_conditional_move is properly defined.
Emit a library call comparison between floating point X and Y. COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
References const0_rtx, const1_rtx, const_true_rtx, constm1_rtx, convert_to_mode(), emit_libcall_block(), emit_library_call_value(), end_sequence(), false_rtx, FLOAT_LIB_COMPARE_RETURNS_BOOL, FOR_EACH_WIDER_MODE_FROM, gcc_assert, gcc_unreachable, gen_reg_rtx(), get_insns(), GET_MODE, insns, LCT_CONST, NULL_RTX, optab_libfunc(), reverse_condition_maybe_unordered(), simplify_gen_relational(), simplify_gen_ternary(), start_sequence(), swap_condition(), targetm, true_rtx, and y.
Referenced by prepare_cmp_insn().
Promote integer arguments for a libcall if necessary. emit_library_call_value cannot do the promotion because it does not know if it should do a signed or unsigned promotion. This is because there are no tree types defined for libcalls.
References convert_to_mode(), GET_MODE, is_a(), expand_operand::mode, NULL_TREE, promote_function_mode(), and expand_operand::unsigned_p.
Referenced by expand_fixed_convert().
rtx prepare_operand | ( | enum insn_code | icode, |
rtx | x, | ||
int | opnum, | ||
machine_mode | mode, | ||
machine_mode | wider_mode, | ||
int | unsignedp ) |
Before emitting an insn with code ICODE, make sure that X, which is going to be used for operand OPNUM of the insn, is converted from mode MODE to WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and that it is accepted by the operand predicate. Return the new value.
References convert_modes(), copy_to_mode_reg(), GET_MODE, insn_data, insn_operand_matches(), NULL_RTX, and reload_completed.
Referenced by emit_cstore(), and prepare_cmp_insn().
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Check if vec_perm mask SEL is a constant equivalent to a shift of the first vec_perm operand, assuming the second operand (for left shift first operand) is a constant vector of zeros. Return the shift distance in bits if so, or NULL_RTX if the vec_perm is not a shift. MODE is the mode of the value being shifted. SHIFT_OPTAB is vec_shr_optab for right shift or vec_shl_optab for left shift.
References gen_int_shift_amount(), GET_MODE_NUNITS(), GET_MODE_UNIT_BITSIZE, i, known_eq, maybe_ge, expand_operand::mode, NULL_RTX, and vec_perm_indices::series_p().
Referenced by expand_vec_perm_const().
Return true if BINOPTAB implements a shift operation.
Referenced by expand_binop(), and expand_binop_directly().
rtx sign_expand_binop | ( | machine_mode | mode, |
optab | uoptab, | ||
optab | soptab, | ||
rtx | op0, | ||
rtx | op1, | ||
rtx | target, | ||
int | unsignedp, | ||
enum optab_methods | methods ) |
Expand a binary operator which has both signed and unsigned forms. UOPTAB is the optab for unsigned operations, and SOPTAB is for signed operations. If we widen unsigned operands, we may use a signed wider operation instead of an unsigned wider operation, since the result would be the same.
References expand_binop(), expand_operand::mode, OPTAB_DIRECT, OPTAB_LIB, OPTAB_WIDEN, and expand_operand::target.
Referenced by expand_divmod().
rtx simplify_expand_binop | ( | machine_mode | mode, |
optab | binoptab, | ||
rtx | op0, | ||
rtx | op1, | ||
rtx | target, | ||
int | unsignedp, | ||
enum optab_methods | methods ) |
Like expand_binop, but return a constant rtx if the result can be calculated at compile time. The arguments and return value are otherwise the same as for expand_binop.
References CONSTANT_P, expand_binop(), expand_operand::mode, simplify_binary_operation(), and expand_operand::target.
Referenced by expand_doubleword_shift(), expand_subword_shift(), and force_expand_binop().
Return whether OP0 and OP1 should be swapped when expanding a commutative binop. Order them according to commutative_operand_precedence and, if possible, try to put TARGET or a pseudo first.
References commutative_operand_precedence(), REG_P, rtx_equal_p(), and expand_operand::target.
Referenced by expand_binop(), and expand_binop_directly().
Return whether RTL code CODE corresponds to an unsigned optab.
Referenced by can_vcond_compare_p(), and can_vec_cmp_compare_p().
TARGET is a target of a multiword operation that we are going to implement as a series of word-mode operations. Return true if TARGET is suitable for this purpose.
References GET_MODE, GET_MODE_SIZE(), i, validate_subreg(), and word_mode.
Referenced by expand_absneg_bit(), expand_binop(), expand_copysign_bit(), expand_doubleword_bswap(), expand_unop(), and extract_integral_bit_field().
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PTEST points to a comparison that compares its first operand with zero. Check to see if it can be performed as a bit-test-and-branch instead. On success, return the instruction that performs the bit-test-and-branch and replace the second operand of *PTEST with the bit number to test. On failure, return CODE_FOR_nothing and leave *PTEST unchanged. Note that the comparison described by *PTEST should not be taken literally after a successful return. *PTEST is just a convenient place to store the two operands of the bit-and-test. VAL must contain the original tree expression for the first operand of *PTEST.
References direct_optab_handler(), wi::exact_log2(), gen_int_mode(), GET_CODE, GET_MODE_BITSIZE(), get_nonzero_bits(), TREE_CODE, TREE_TYPE, tree_zero_one_valued_p(), TYPE_MODE, and XEXP.
Referenced by emit_cmp_and_jump_insns().
rtx vector_compare_rtx | ( | machine_mode | cmp_mode, |
enum tree_code | tcode, | ||
tree | t_op0, | ||
tree | t_op1, | ||
bool | unsignedp, | ||
enum insn_code | icode, | ||
unsigned int | opno ) |
Return a comparison rtx of mode CMP_MODE for COND. Use UNSIGNEDP to select signed or unsigned operators. OPNO holds the index of the first comparison operand for insn ICODE. Do not generate the compare instruction itself.
References create_input_operand(), expand_expr(), EXPAND_STACK_PARM, gcc_assert, gcc_unreachable, GET_MODE, get_rtx_code(), maybe_legitimize_operands(), NULL_RTX, tcc_comparison, TREE_CODE_CLASS, TREE_TYPE, TYPE_MODE, and expand_operand::value.
Referenced by expand_vec_cmp_expr(), and expand_vec_cond_optab_fn().
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Try calculating (bswap:narrow x) as (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))).
References delete_insns_since(), emit_move_insn(), opt_mode< T >::exists(), expand_shift(), expand_unop(), FOR_EACH_WIDER_MODE, gcc_assert, gen_lowpart, gen_reg_rtx(), get_last_insn(), GET_MODE_BITSIZE(), GET_MODE_PRECISION(), last, expand_operand::mode, NULL_RTX, optab_handler(), opt_mode< T >::require(), expand_operand::target, and widen_operand().
Referenced by expand_unop().
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Try calculating (clz:narrow x) as (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). A similar operation can be used for clrsb. UNOPTAB says which operation we are trying to expand.
References delete_insns_since(), expand_binop(), expand_unop(), FOR_EACH_WIDER_MODE, gen_int_mode(), gen_reg_rtx(), get_last_insn(), GET_MODE_PRECISION(), last, expand_operand::mode, NULL_RTX, OPTAB_DIRECT, optab_handler(), opt_mode< T >::require(), expand_operand::target, and widen_operand().
Referenced by expand_unop().
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Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP says whether OP is signed or unsigned. NO_EXTEND is true if we need not actually do a sign-extend or zero-extend, but can leave the higher-order bits of the result rtx undefined, for example, in the case of logical operations, but not right shifts.
References convert_modes(), emit_clobber(), emit_move_insn(), force_reg(), gen_lowpart, gen_reg_rtx(), GET_CODE, GET_MODE, GET_MODE_SIZE(), is_a(), SUBREG_CHECK_PROMOTED_SIGN, and SUBREG_PROMOTED_VAR_P.
Referenced by expand_binop(), expand_parity(), expand_unop(), widen_bswap(), and widen_leading().
Given two input operands, OP0 and OP1, determine what the correct from_mode for a widening operation would be. In most cases this would be OP0, but if that's a constant it'll be VOIDmode, which isn't useful.
References GET_MODE, and GET_MODE_UNIT_SIZE.
Referenced by expand_binop().