GCC Middle and Back End API Reference
postreload.cc File Reference
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "target.h"
#include "rtl.h"
#include "tree.h"
#include "predict.h"
#include "df.h"
#include "memmodel.h"
#include "tm_p.h"
#include "optabs.h"
#include "regs.h"
#include "emit-rtl.h"
#include "recog.h"
#include "cfgrtl.h"
#include "cfgbuild.h"
#include "cfgcleanup.h"
#include "reload.h"
#include "cselib.h"
#include "tree-pass.h"
#include "dbgcnt.h"
#include "function-abi.h"
#include "rtl-iter.h"
Include dependency graph for postreload.cc:

Data Structures

struct  reg_use
 

Macros

#define RELOAD_COMBINE_MAX_USES   16
 
#define LABEL_LIVE(LABEL)
 
#define MODES_OK_FOR_MOVE2ADD(OUTMODE, INMODE)
 

Functions

static bool reload_cse_simplify (rtx_insn *, rtx)
 
static void reload_cse_regs_1 (void)
 
static int reload_cse_simplify_set (rtx, rtx_insn *)
 
static int reload_cse_simplify_operands (rtx_insn *, rtx)
 
static void reload_combine (void)
 
static void reload_combine_note_use (rtx *, rtx_insn *, int, rtx)
 
static void reload_combine_note_store (rtx, const_rtx, void *)
 
static bool reload_cse_move2add (rtx_insn *)
 
static void move2add_note_store (rtx, const_rtx, void *)
 
static void reload_cse_regs (rtx_insn *first)
 
static void reload_combine_split_one_ruid (int *pruid, int split_ruid)
 
static void reload_combine_split_ruids (int split_ruid)
 
static void reload_combine_purge_insn_uses (rtx_insn *insn)
 
static void reload_combine_purge_reg_uses_after_ruid (unsigned regno, int ruid)
 
static struct reg_usereload_combine_closest_single_use (unsigned regno, int ruid_limit)
 
static void fixup_debug_insns (rtx reg, rtx replacement, rtx_insn *from, rtx_insn *to)
 
static bool try_replace_in_use (struct reg_use *use, rtx reg, rtx src)
 
static bool reload_combine_recognize_const_pattern (rtx_insn *insn)
 
static bool reload_combine_recognize_pattern (rtx_insn *insn)
 
static void move2add_record_mode (rtx reg)
 
static void move2add_record_sym_value (rtx reg, rtx sym, rtx off)
 
static bool move2add_valid_value_p (int regno, scalar_int_mode mode)
 
static bool move2add_use_add2_insn (scalar_int_mode mode, rtx reg, rtx sym, rtx off, rtx_insn *insn)
 
static bool move2add_use_add3_insn (scalar_int_mode mode, rtx reg, rtx sym, rtx off, rtx_insn *insn)
 
static void reload_cse_move2add_invalidate (rtx_insn *insn)
 
rtl_opt_passmake_pass_postreload_cse (gcc::context *ctxt)
 

Variables

struct { 
 
   struct reg_use   reg_use [RELOAD_COMBINE_MAX_USES
 
   rtx   offset 
 
   int   use_index 
 
   int   store_ruid 
 
   int   real_store_ruid 
 
   int   use_ruid 
 
   bool   all_offsets_match 
 
   rtx   expr 
 
reg_state [FIRST_PSEUDO_REGISTER] 
 
static int reload_combine_ruid
 
static int last_label_ruid
 
static int last_jump_ruid
 
static int first_index_reg = -1
 
static int last_index_reg
 
static int reg_set_luid [FIRST_PSEUDO_REGISTER]
 
static HOST_WIDE_INT reg_offset [FIRST_PSEUDO_REGISTER]
 
static int reg_base_reg [FIRST_PSEUDO_REGISTER]
 
static rtx reg_symbol_ref [FIRST_PSEUDO_REGISTER]
 
static machine_mode reg_mode [FIRST_PSEUDO_REGISTER]
 
static int move2add_luid
 
static int move2add_last_label_luid
 

Macro Definition Documentation

◆ LABEL_LIVE

#define LABEL_LIVE ( LABEL)
Value:
(label_live[CODE_LABEL_NUMBER (LABEL) - min_labelno])
static int min_labelno
Definition final.cc:487
#define CODE_LABEL_NUMBER(INSN)
Definition rtl.h:1661

Referenced by reload_combine().

◆ MODES_OK_FOR_MOVE2ADD

#define MODES_OK_FOR_MOVE2ADD ( OUTMODE,
INMODE )
Value:
(GET_MODE_SIZE (OUTMODE) == GET_MODE_SIZE (INMODE) \
|| (GET_MODE_SIZE (OUTMODE) <= GET_MODE_SIZE (INMODE) \
&& TRULY_NOOP_TRUNCATION_MODES_P (OUTMODE, INMODE)))
ALWAYS_INLINE poly_uint16 GET_MODE_SIZE(machine_mode mode)
Definition machmode.h:647
#define TRULY_NOOP_TRUNCATION_MODES_P(MODE1, MODE2)
Definition machmode.h:994
??? We don't know how zero / sign extension is handled, hence we
can't go from a narrower to a wider mode.   

Referenced by move2add_valid_value_p().

◆ RELOAD_COMBINE_MAX_USES

#define RELOAD_COMBINE_MAX_USES   16
If reload couldn't use reg+reg+offset addressing, try to use reg+reg
addressing now.
This code might also be useful when reload gave up on reg+reg addressing
because of clashes between the return register and INDEX_REG_CLASS.   
The maximum number of uses of a register we can keep track of to
replace them with reg+reg addressing.   

Referenced by reload_combine(), reload_combine_closest_single_use(), reload_combine_note_store(), reload_combine_note_use(), reload_combine_purge_insn_uses(), reload_combine_purge_reg_uses_after_ruid(), reload_combine_recognize_pattern(), and reload_combine_split_ruids().

Function Documentation

◆ fixup_debug_insns()

static void fixup_debug_insns ( rtx reg,
rtx replacement,
rtx_insn * from,
rtx_insn * to )
static
After we've moved an add insn, fix up any debug insns that occur
between the old location of the add and the new location.  REG is
the destination register of the add insn; REPLACEMENT is the
SET_SRC of the add.  FROM and TO specify the range in which we
should make this change on debug insns.   

References DEBUG_BIND_INSN_P, reg_use::insn, INSN_VAR_LOCATION_LOC, NEXT_INSN(), simplify_replace_rtx(), and validate_change().

Referenced by reload_combine_recognize_const_pattern(), and reload_combine_recognize_pattern().

◆ make_pass_postreload_cse()

rtl_opt_pass * make_pass_postreload_cse ( gcc::context * ctxt)

◆ move2add_note_store()

static void move2add_note_store ( rtx dst,
const_rtx set,
void * data )
static
SET is a SET or CLOBBER that sets DST.  DATA is the insn which
contains SET.
Update reg_set_luid, reg_offset and reg_base_reg accordingly.
Called from reload_cse_move2add via note_stores.   

References const0_rtx, CONST_INT_P, find_reg_equal_equiv_note(), gcc_assert, GET_CODE, GET_MODE, INTVAL, invalidate(), is_a(), move2add_last_label_luid, move2add_luid, move2add_record_mode(), move2add_record_sym_value(), move2add_valid_value_p(), NULL_RTX, offset, reg_base_reg, reg_mode, reg_offset, REG_P, reg_set_luid, reg_symbol_ref, REGNO, SET, SET_DEST, SET_SRC, subreg_regno(), trunc_int_for_mode(), UINTVAL, and XEXP.

Referenced by reload_cse_move2add_invalidate().

◆ move2add_record_mode()

static void move2add_record_mode ( rtx reg)
static

◆ move2add_record_sym_value()

static void move2add_record_sym_value ( rtx reg,
rtx sym,
rtx off )
static
Record that REG is being set to the sum of SYM and OFF.   

References INTVAL, move2add_luid, move2add_record_mode(), reg_base_reg, reg_offset, reg_set_luid, reg_symbol_ref, and REGNO.

Referenced by move2add_note_store(), move2add_use_add2_insn(), and move2add_use_add3_insn().

◆ move2add_use_add2_insn()

static bool move2add_use_add2_insn ( scalar_int_mode mode,
rtx reg,
rtx sym,
rtx off,
rtx_insn * insn )
static
This function is called with INSN that sets REG (of mode MODE)
to (SYM + OFF), while REG is known to already have value (SYM + offset).
This function tries to change INSN into an add instruction
(set (REG) (plus (REG) (OFF - offset))) using the known value.
It also updates the information about REG's known value.
Return true if we made a change.   

References BLOCK_FOR_INSN(), changed, const0_rtx, costs_lt_p(), FOR_EACH_MODE_UNTIL, gen_int_mode(), gen_lowpart_common(), GET_CODE, get_full_set_rtx_cost(), GET_MODE_MASK, have_add2_insn(), have_insn_for(), reg_use::insn, INTVAL, move2add_record_sym_value(), NULL_RTX, optimize_bb_for_speed_p(), PATTERN(), reg_offset, REGNO, SET_SRC, single_set(), full_rtx_costs::speed, UINTVAL, validate_change(), and XVECEXP.

Referenced by reload_cse_move2add().

◆ move2add_use_add3_insn()

static bool move2add_use_add3_insn ( scalar_int_mode mode,
rtx reg,
rtx sym,
rtx off,
rtx_insn * insn )
static
This function is called with INSN that sets REG (of mode MODE) to
(SYM + OFF), but REG doesn't have known value (SYM + offset).  This
function tries to find another register which is known to already have
value (SYM + offset) and change INSN into an add instruction
(set (REG) (plus (the found register) (OFF - offset))) if such
a register is found.  It also updates the information about
REG's known value.
Return true iff we made a change.   

References BLOCK_FOR_INSN(), changed, const0_rtx, costs_lt_p(), gen_int_mode(), gen_rtx_REG(), get_full_set_rtx_cost(), GET_MODE, i, init_costs_to_max(), init_costs_to_zero(), move2add_luid, move2add_record_sym_value(), move2add_valid_value_p(), NULL_RTX, optimize_bb_for_speed_p(), reg_base_reg, reg_offset, reg_set_luid, reg_symbol_ref, REGNO, rtx_equal_p(), SET_SRC, single_set(), full_rtx_costs::speed, UINTVAL, validate_change(), and XEXP.

Referenced by reload_cse_move2add().

◆ move2add_valid_value_p()

static bool move2add_valid_value_p ( int regno,
scalar_int_mode mode )
static

◆ reload_combine()

◆ reload_combine_closest_single_use()

static struct reg_use * reload_combine_closest_single_use ( unsigned regno,
int ruid_limit )
static
Find the use of REGNO with the ruid that is highest among those
lower than RUID_LIMIT, and return it if it is the only use of this
reg in the insn.  Return NULL otherwise.   

References i, last_label_ruid, NULL, reg_state, and RELOAD_COMBINE_MAX_USES.

Referenced by reload_combine_recognize_const_pattern().

◆ reload_combine_note_store()

static void reload_combine_note_store ( rtx dst,
const_rtx set,
void * data )
static
Check if DST is a register or a subreg of a register; if it is,
update store_ruid, real_store_ruid and use_index in the reg_state
structure accordingly.  Called via note_stores from reload_combine.   

References end_hard_regno(), END_REGNO(), GET_CODE, GET_MODE, i, MEM_P, REG_P, reg_state, REGNO, RELOAD_COMBINE_MAX_USES, reload_combine_ruid, SET, SET_DEST, SUBREG_BYTE, SUBREG_REG, subreg_regno_offset(), and XEXP.

Referenced by reload_combine().

◆ reload_combine_note_use()

static void reload_combine_note_use ( rtx * xp,
rtx_insn * insn,
int ruid,
rtx containing_mem )
static

◆ reload_combine_purge_insn_uses()

static void reload_combine_purge_insn_uses ( rtx_insn * insn)
static
Called when we are about to rescan a previously encountered insn with
reload_combine_note_use after modifying some part of it.  This clears all
information about uses in that particular insn.   

References i, reg_use::insn, reg_state, and RELOAD_COMBINE_MAX_USES.

Referenced by reload_combine_recognize_const_pattern().

◆ reload_combine_purge_reg_uses_after_ruid()

static void reload_combine_purge_reg_uses_after_ruid ( unsigned regno,
int ruid )
static
Called when we need to forget about all uses of REGNO after an insn
which is identified by RUID.   

References reg_state, RELOAD_COMBINE_MAX_USES, and reg_use::ruid.

Referenced by reload_combine_recognize_const_pattern().

◆ reload_combine_recognize_const_pattern()

static bool reload_combine_recognize_const_pattern ( rtx_insn * insn)
static
Called by reload_combine when scanning INSN.  This function tries to detect
patterns where a constant is added to a register, and the result is used
in an address.
Return true if no further processing is needed on INSN; false if it wasn't
recognized and should be handled normally.   

References CONSTANT_P, delete_insn(), fixup_debug_insns(), gcc_assert, GET_CODE, GET_MODE, reg_use::insn, use::insn, last_jump_ruid, NULL, NULL_RTX, PATTERN(), real_store_ruid, REG_NREGS, REG_P, reg_state, REGNO, reload_combine_closest_single_use(), reload_combine_note_use(), reload_combine_purge_insn_uses(), reload_combine_purge_reg_uses_after_ruid(), reload_combine_ruid, reload_combine_split_ruids(), reorder_insns(), rtx_equal_p(), SET_DEST, SET_SRC, single_set(), stack_pointer_rtx, store_ruid, try_replace_in_use(), use_ruid, XEXP, XVECEXP, and XVECLEN.

Referenced by reload_combine().

◆ reload_combine_recognize_pattern()

◆ reload_combine_split_one_ruid()

static void reload_combine_split_one_ruid ( int * pruid,
int split_ruid )
inlinestatic
Subroutine of reload_combine_split_ruids, called to fix up a single
ruid pointed to by *PRUID if it is higher than SPLIT_RUID.   

Referenced by reload_combine_split_ruids().

◆ reload_combine_split_ruids()

static void reload_combine_split_ruids ( int split_ruid)
static
Called when we insert a new insn in a position we've already passed in
the scan.  Examine all our state, increasing all ruids that are higher
than SPLIT_RUID by one in order to make room for a new insn.   

References i, last_jump_ruid, last_label_ruid, real_store_ruid, reg_state, RELOAD_COMBINE_MAX_USES, reload_combine_ruid, reload_combine_split_one_ruid(), reg_use::ruid, store_ruid, and use_ruid.

Referenced by reload_combine_recognize_const_pattern().

◆ reload_cse_move2add()

◆ reload_cse_move2add_invalidate()

◆ reload_cse_regs()

static void reload_cse_regs ( rtx_insn * first)
static
Call cse / combine like post-reload optimization phases.
FIRST is the first instruction.   

References reload_combine(), reload_cse_move2add(), and reload_cse_regs_1().

◆ reload_cse_regs_1()

static void reload_cse_regs_1 ( void )
static
Do a very simple CSE pass over the hard registers.

This function detects no-op moves where we happened to assign two
different pseudo-registers to the same hard register, and then
copied one to the other.  Reload will generate a useless
instruction copying a register to itself.

This function also detects cases where we load a value from memory
into two different registers, and (if memory is more expensive than
registers) changes it to simply copy the first register into the
second register.

Another optimization is performed that scans the operands of each
instruction to see whether the value is already available in a
hard register.  It then replaces the operand with the hard register
if possible, much like an optional reload would.   

References cfg_changed, cfun, cleanup_cfg(), cselib_finish(), cselib_init(), cselib_process_insn(), CSELIB_RECORD_MEMORY, end_alias_analysis(), FOR_BB_INSNS, FOR_EACH_BB_FN, gen_rtx_REG(), init_alias_analysis(), INSN_P, LAST_VIRTUAL_REGISTER, reload_cse_simplify(), and word_mode.

Referenced by reload_cse_regs().

◆ reload_cse_simplify()

static bool reload_cse_simplify ( rtx_insn * insn,
rtx testreg )
static
Perform simple optimizations to clean up the result of reload.
   Copyright (C) 1987-2024 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.   
Try to simplify INSN.  Return true if the CFG may have changed.   

References apply_change_group(), asm_noperands(), BLOCK_FOR_INSN(), CALL_P, check_for_inc_dec(), CONST_INT_P, count, cselib_invalidate_rtx(), cselib_redundant_set_p(), delete_insn_and_edges(), EDGE_COUNT, GET_CODE, i, NO_FUNCTION_CSE, NULL_RTX, PATTERN(), REG_FUNCTION_VALUE_P, REG_P, reload_cse_simplify_operands(), reload_cse_simplify_set(), SET, SET_DEST, set_dst_reg_note(), set_for_reg_notes(), SET_SRC, stack_pointer_rtx, basic_block_def::succs, XEXP, XVECEXP, and XVECLEN.

Referenced by reload_cse_regs_1().

◆ reload_cse_simplify_operands()

static int reload_cse_simplify_operands ( rtx_insn * insn,
rtx testreg )
static
Try to replace operands in INSN with equivalent values that are already
in registers.  This can be viewed as optional reloading.

For each non-register operand in the insn, see if any hard regs are
known to be equivalent to that operand.  Record the alternatives which
can accept these hard registers.  Among all alternatives, select the
ones which are better or equal to the one currently matching, where
"better" is in terms of '?' and '!' constraints.  Among the remaining
alternatives, select the one which replaces most operands with
hard registers.   

References apply_change_group(), BLOCK_FOR_INSN(), CLEAR_HARD_REG_SET, CONST_INT_P, CONSTANT_P, constraints, recog_data_d::constraints, cselib_lookup(), recog_data_d::dup_loc, recog_data_d::dup_num, extract_constrain_insn(), gcc_assert, gen_rtx_REG(), GET_CODE, GET_MODE, get_preferred_alternatives(), i, LABEL_P, load_extend_op(), elt_loc_list::loc, cselib_val::locs, MEM_P, recog_data_d::n_alternatives, recog_data_d::n_dups, recog_data_d::n_operands, elt_loc_list::next, NOTE_KIND, NOTE_P, recog_data_d::operand, recog_data_d::operand_loc, recog_data_d::operand_mode, optimize_bb_for_speed_p(), recog_data, REG_CAN_CHANGE_MODE_P, reg_class_subunion, reg_fits_class_p(), REG_P, REGNO, reload_cse_simplify_operands(), SET_DEST, SET_HARD_REG_BIT, set_mode_and_regno(), SET_SRC, set_src_cost(), side_effects_p(), single_set(), TEST_BIT, TEST_HARD_REG_BIT, true_regnum(), validate_change(), which_alternative, and word_mode.

Referenced by reload_cse_simplify(), and reload_cse_simplify_operands().

◆ reload_cse_simplify_set()

static int reload_cse_simplify_set ( rtx set,
rtx_insn * insn )
static
Try to simplify a single SET instruction.  SET is the set pattern.
INSN is the instruction it came from.
This function only handles one case: if we set a register to a value
which is not a register, we try to find that value in some other register
and change the set into a register copy.   

References BITS_PER_WORD, BLOCK_FOR_INSN(), CONST_SCALAR_INT_P, CONSTANT_P, cselib_lookup(), wide_int_storage::from(), gcc_unreachable, gen_rtx_REG(), GET_MODE, immed_wide_int_const(), load_extend_op(), elt_loc_list::loc, cselib_val::locs, MEM_P, memory_move_cost(), elt_loc_list::next, optimize_bb_for_speed_p(), ORIGINAL_REGNO, references_value_p(), REG_CAN_CHANGE_MODE_P, REG_P, register_move_cost(), REGNO, SET_DEST, SET_SRC, set_src_cost(), side_effects_p(), SIGNED, true_regnum(), UNSIGNED, validate_change(), validate_unshare_change(), and word_mode.

Referenced by reload_cse_simplify().

◆ try_replace_in_use()

static bool try_replace_in_use ( struct reg_use * use,
rtx reg,
rtx src )
static
Subroutine of reload_combine_recognize_const_pattern.  Try to replace REG
with SRC in the insn described by USE, taking costs into account.  Return
true if we made the replacement.   

References address_cost(), BLOCK_FOR_INSN(), CONSTANT_P, gcc_assert, GET_CODE, GET_MODE, use::insn, MEM_ADDR_SPACE, memory_address_addr_space_p(), NULL_RTX, optimize_bb_for_speed_p(), REG_P, rtx_equal_p(), SET_DEST, SET_SRC, set_src_cost(), simplify_replace_rtx(), single_set(), validate_change(), and XEXP.

Referenced by reload_combine_recognize_const_pattern().

Variable Documentation

◆ all_offsets_match

bool all_offsets_match

◆ expr

rtx expr

Referenced by add_c_test(), add_removable_extension(), alloc_expression_id(), build_reconstructed_reference(), build_user_friendly_ref_for_offset(), bundle_sizes(), canonicalize_bool(), chrec_apply_map(), clean(), combine_var_copies_in_loop_exit(), compute_complex_ancestor_jump_func(), compute_local_properties(), compute_local_properties(), convert_to_complex_1(), convert_to_integer_1(), convert_to_pointer_1(), convert_to_real_1(), create_access(), create_artificial_child_access(), create_total_scalarization_access(), cse_and_gimplify_to_preheader(), DFS::DFS(), DFS::DFS_write_tree(), do_hoist_insertion(), do_pre_partial_partial_insertion(), do_pre_regular_insertion(), dump_hash_table(), dump_hash_table(), eliminate_partially_redundant_loads(), expand_builtin_memory_chk(), expand_ifn_va_arg_1(), expand_oacc_collapse_init(), expand_oacc_collapse_vars(), expand_oacc_for(), expand_simple_operations(), expr_expected_value(), expr_first(), expr_last(), expr_single(), extract_ops_from_tree(), extract_single_var_from_expr(), find_goto(), find_identical_invariants(), find_or_insert_inv(), fold(), fold_build_cleanup_point_expr(), scev_dfs::follow_ssa_edge_expr(), force_gimple_operand_1(), force_gimple_operand_gsi_1(), fp_setter_insn(), generate_subtree_copies(), get_alternative_base(), get_ancestor_addr_info(), get_attr_nonstring_decl(), ana::sm_context::get_diagnostic_tree(), pointer_equiv_analyzer::get_equiv_expr(), get_mem_align_offset(), get_mem_expr_from_op(), range_query::get_tree_range(), get_value_for_expr(), gimple_boolify(), gimplify_asm_expr(), gimplify_cond_expr(), gimplify_exit_expr(), gimplify_variable_sized_compare(), goa_stabilize_expr(), hoist_code(), independent_of_stmt_p(), interpret_expr(), ipa_analyze_virtual_call_uses(), lhd_expr_to_decl(), lookup_set(), lower_cond(), lower_opt(), lto_input_ts_block_tree_pointers(), lto_read_tree_1(), maybe_eval_c_test(), maybe_wrap_with_location(), new_loc_list(), next_set(), omp_containing_struct(), omp_get_base_pointer(), omp_addr_tokenizer::omp_parse_access_method(), omp_addr_tokenizer::omp_parse_access_methods(), omp_addr_tokenizer::omp_parse_array_expr(), omp_addr_tokenizer::omp_parse_component_selector(), omp_addr_tokenizer::omp_parse_pointer(), omp_addr_tokenizer::omp_parse_structure_base(), omp_addr_tokenizer::omp_parse_structured_expr(), optimize_target_teams(), parser::parse_expr(), parser::parse_op(), parser::parse_pattern(), phi_translate(), phi_translate_1(), pre_delete(), pre_gcse(), pre_insert_copies(), propagate_unknowns(), prune_expressions(), replace_id(), replace_in_expr(), rewrite_to_non_trapping_overflow(), save_expr(), set_mem_expr(), shortcut_cond_expr(), shortcut_cond_r(), avail_exprs_stack::simplify_binary_operation(), simplify_replace_tree(), simplify_using_condition(), simplify_using_initial_conditions(), simplify_using_initial_values(), simplify_using_outer_evolutions(), skip_simple_arithmetic(), skip_simple_constant_arithmetic(), split_iv(), split_to_var_and_offset(), sra_modify_expr(), strip_offset_1(), track_expr_p(), tree_simplify_using_condition_1(), trim_ld_motion_mems(), unshare_expr(), unshare_expr_without_location(), use_type(), vect_loop_versioning(), vectorizable_induction(), and vt_initialize().

◆ first_index_reg

int first_index_reg = -1
static
The register numbers of the first and last index register.  A value of
-1 in LAST_INDEX_REG indicates that we've previously computed these
values and found no suitable index registers.   

Referenced by reload_combine(), and reload_combine_recognize_pattern().

◆ last_index_reg

int last_index_reg
static

◆ last_jump_ruid

int last_jump_ruid
static
The RUID of the last jump we encountered in reload_combine.   

Referenced by reload_combine(), reload_combine_recognize_const_pattern(), and reload_combine_split_ruids().

◆ last_label_ruid

int last_label_ruid
static
The RUID of the last label we encountered in reload_combine.   

Referenced by reload_combine(), reload_combine_closest_single_use(), reload_combine_recognize_pattern(), and reload_combine_split_ruids().

◆ move2add_last_label_luid

int move2add_last_label_luid
static
move2add_last_label_luid is set whenever a label is found.  Labels
invalidate all previously collected reg_offset data.   

Referenced by move2add_note_store(), move2add_valid_value_p(), and reload_cse_move2add().

◆ move2add_luid

int move2add_luid
static
move2add_luid is linearly increased while scanning the instructions
from first to last.  It is used to set reg_set_luid in
reload_cse_move2add and move2add_note_store.   

Referenced by move2add_note_store(), move2add_record_sym_value(), move2add_use_add3_insn(), and reload_cse_move2add().

◆ offset

rtx offset

Referenced by add_AT_external_die_ref(), add_AT_lbl_id(), add_AT_range_list(), add_condition(), add_data_member_location_attribute(), add_iv_candidate_for_use(), add_ranges_by_labels(), ipcp_value< valtype >::add_source(), add_stored_regs(), ipcp_lattice< valtype >::add_value(), addr_offset_valid_p(), addr_side_effect_eval(), pieces_addr::adjust(), adjust_address_1(), adjust_automodify_address_1(), adjust_offset_for_component_ref(), aff_combination_add_product(), pcom_worker::aff_combination_dr_offset(), aff_combination_mult(), alloc_stack_frame_space(), alter_subreg(), ao_ref_alignment(), ao_ref_init_from_ptr_and_range(), ao_ref_init_from_vn_reference(), array_ref_flexible_size_p(), asan_emit_stack_protection(), asan_expand_mark_ifn(), assign_parm_find_stack_rtl(), assign_parm_setup_stack(), attrs_list_insert(), attrs_list_member(), avail_expr_hash(), avoid_constant_pool_reference(), based_loc_descr(), bit_from_pos(), wi::bitreverse_large(), branch_prob(), wi::bswap_large(), build_cfa_aligned_loc(), build_cfa_loc(), build_debug_ref_for_model(), build_invariant_address(), build_ref_for_model(), build_ref_for_offset(), build_simple_mem_ref_loc(), build_user_friendly_ref_for_offset(), builtin_memcpy_read_str(), builtin_strncpy_read_str(), byte_from_pos(), calc_vec_perm_mask_for_shift(), can_store_by_pieces(), canon_address(), change_zero_ext(), check_mem_read_rtx(), check_stmt_for_type_change(), cleanup_auto_inc_dec(), clobber_slot_part(), clobber_variable_part(), compute_argument_addresses(), compute_builtin_object_size(), compute_complex_ancestor_jump_func(), compute_complex_assign_jump_func(), compute_frame_pointer_to_fb_displacement(), const_unop(), constant_byte_string(), constant_pointer_difference(), constrain_operands(), ana::bit_range::contains_p(), ana::byte_range::contains_p(), ana::record_layout::item::contains_p(), contains_type_p(), convert_cfa_to_fb_loc_list(), count_index_strings(), strlen_pass::count_nonzero_bytes(), strlen_pass::count_nonzero_bytes_addr(), coverage_begin_function(), coverage_checksum_string(), file_cache_slot::create(), create_access(), create_access_1(), create_block_symbol(), create_component_ref_by_pieces_1(), cselib_hash_rtx(), cselib_record_sp_cfa_base_equiv(), cselib_subst_to_values(), debug_lowpart_subreg(), decide_about_value(), decode_addr_const(), decode_field_reference(), decompose(), default_memtag_add_tag(), delegitimize_mem_from_attrs(), delete_slot_part(), delete_variable_part(), detect_type_change(), detect_type_change_from_memory_writes(), df_add_refs_to_table(), df_reorganize_refs_by_insn(), df_reorganize_refs_by_insn_bb(), df_reorganize_refs_by_reg_by_insn(), df_reorganize_refs_by_reg_by_reg(), difference_cannot_overflow_p(), dr_misalignment(), dse_step5(), dw2_asm_output_offset(), dw_sra_loc_expr(), dwarf2out_frame_debug_cfa_offset(), dwarf2out_frame_debug_expr(), eliminate_regs_in_insn(), eliminate_regs_in_insn(), address_reload_context::emit_autoinc(), emit_note_insn_var_location(), emit_push_insn(), asan_redzone_buffer::emit_redzone_byte(), equiv_address_substitution(), excess_unit_span(), execute_omp_oacc_neuter_broadcast(), expand_assignment(), expand_builtin_issignaling(), expand_call(), expand_call_mem_ref(), expand_debug_expr(), expand_expr_addr_expr_1(), expand_expr_real_1(), expand_fix(), expand_float(), expand_gather_load_optab_fn(), expand_oacc_for(), expand_omp_simd(), expand_one_stack_var_1(), expand_one_stack_var_at(), expand_scatter_store_optab_fn(), expand_simple_operations(), expand_stack_vars(), expand_used_vars(), extr_type_from_vtbl_ptr_store(), extract_base_bit_offset(), extract_split_bit_field(), extract_writebacks(), find_access_in_subtree(), find_and_merge_options(), find_args_size_adjust(), find_hard_regno_for_1(), find_reloads(), find_reloads_subreg_address(), find_shift_sequence(), find_temp_slot_from_address(), pair_fusion::find_trailing_add(), find_variable_location_part(), first_or_preceding_vi_for_offset(), first_vi_for_offset(), fixup_debug_uses(), fold_array_ctor_reference(), fold_const_aggregate_ref_1(), fold_ctor_reference(), fold_nonarray_ctor_reference(), fold_unary_loc(), form_sum(), fortran_common(), frame_offset_overflow(), double_int::from_buffer(), wi::from_buffer(), gather_mem_refs_stmt(), gen_addr_rtx(), gen_group_rtx(), gen_highpart(), gen_lowpart_for_combine(), gen_lowpart_general(), gen_lowpart_if_possible(), gen_reg_rtx_offset(), gen_rtx_REG_offset(), gen_rtx_SUBREG(), get_access_for_expr(), get_ancestor_addr_info(), get_base_for_alignment_1(), get_binfo_at_offset(), get_bit_range(), get_bitmap_index(), get_byte_aligned_range_contained_in_ref(), get_byte_aligned_range_containing_ref(), get_constraint_for_ptr_offset(), get_dr_vinfo_offset(), get_dynamic_stack_base(), get_elimination(), get_inner_reference(), get_mem_align_offset(), get_misalign_in_elems(), get_object_alignment_2(), get_range_strlen_tree(), get_ref_base_and_extent_hwi(), get_reg_attrs(), get_section_anchor(), get_stridx(), get_tracked_reg_offset(), get_var_base_offset_size_access(), get_vec_alignment_for_record_type(), getbyterep(), gimple_fold_builtin_memchr(), gimple_fold_call(), gimple_fold_indirect_ref(), gimple_fold_partial_load_store_mem_ref(), gimple_fold_stmt_to_constant_1(), gimple_get_virt_method_for_binfo(), gimple_get_virt_method_for_vtable(), gimplify_compound_lval(), gimplify_scan_omp_clauses(), go_through_subreg(), gt_ggc_m_S(), handle_component_ref(), strlen_pass::handle_store(), has_dominating_ubsan_ptr_check(), implicit_ptr_descriptor(), indirect_operand(), init_alias_analysis(), init_caller_save(), init_return_column_size(), initial_return_save(), initializer_zerop(), inline_string_cmp(), instantiate_new_reg(), instantiate_virtual_regs_in_insn(), instantiate_virtual_regs_in_rtx(), instrument_bool_enum_load(), instrument_derefs(), instrument_expr(), instrument_object_size(), int_mem_offset(), interleave_supported_p(), internal_arg_pointer_based_exp(), interpret_rhs_expr(), ipa_analyze_indirect_call_uses(), ipa_find_agg_cst_from_init(), ipa_find_agg_cst_from_jfunc_items(), ipa_get_indirect_edge_target_1(), ipa_get_stack_frame_offset(), ipa_merge_fn_summary_after_inlining(), ipa_read_jump_function(), ipa_set_ancestor_jf(), ipcp_val_agg_replacement_ok_p(), ipcp_val_agg_replacement_ok_p(), is_aligning_offset(), isra_get_ref_base_and_offset(), iv_elimination_compare_lt(), jump_function_from_stmt(), load_assign_lhs_subreplacements(), loc_descr_plus_const(), loc_list_for_address_of_addr_expr_of_indirect_ref(), loc_list_from_tree_1(), loc_list_plus_const(), lower_coro_builtin(), lower_oacc_reductions(), lower_omp_ordered_clauses(), lower_omp_target(), lowpart_subreg_regno(), lra_eliminate_regs_1(), lra_reg_val_equal_p(), lra_substitute_pseudo(), lra_update_sp_offset(), ana::region_offset::make_concrete(), make_extraction(), mark_aliased_reaching_defs_necessary_1(), mark_not_eliminable(), maybe_fold_tmr(), file_cache_slot::maybe_grow(), maybe_instrument_pointer_overflow(), maybe_mode_change(), maybe_optimize_ubsan_ptr_ifn(), merge_agg_lats_step(), move2add_note_store(), move_deaths(), narrow_bit_field_mem(), native_encode_int(), native_encode_real(), native_encode_vector_part(), native_interpret_real(), neuter_worker_single(), new_loc_descr_op_bit_piece(), new_reg_loc_descr(), normalize_offset(), note_rnglist_head(), oacc_xform_loop(), offset_address(), file_cache_slot::offset_buffer(), offset_within_block_p(), omp_accumulate_sibling_list(), operator_exact_divide::op1_range(), operator_mult::op1_range(), operand_subword(), operand_subword_force(), optimize_bit_field_compare(), optimize_memcpy_to_memset(), output_call_frame_info(), output_fde(), output_loc_operands(), output_loc_operands_raw(), output_location(), output_object_block(), pad_to_arg_alignment(), pair_mem_strip_offset(), place_block_symbol(), place_field(), plus_minus_ranges(), pointer_may_wrap_p(), possible_polymorphic_call_targets_1(), print_range(), probe_stack_range(), process_bb_lives(), process_single_reg_class_operands(), propagate_bits_across_jump_function(), push_fields_onto_fieldstack(), push_operand(), queue_reg_save(), fold_using_range::range_of_address(), read_counts_file(), autofdo::function_instance::read_function_instance(), record_known_type(), sra_padding_collecting::record_padding(), record_store(), record_target_from_binfo(), record_targets_from_bases(), record_ubsan_ptr_check_stmt(), ref_at_iteration(), reg_fits_class_p(), reg_save(), reload_combine_note_use(), reload_combine_recognize_pattern(), remove_invalid_subreg_refs(), reorder23(), reorder45(), replace_reg_with_saved_mem(), restructure_reference(), rewrite_use_nonlinear_expr(), rtl_for_decl_location(), rtx_addr_can_trap_p_1(), same_data_refs(), same_variable_part_p(), sbitmap_vector_alloc(), scan_operand_equal_p(), scan_reads(), scan_stores(), set_label_offsets(), set_mem_offset(), set_noop_p(), set_reg_attrs_from_value(), set_slot_part(), set_usage_bits(), set_variable_part(), setup_live_pseudos_and_spill_after_risky_transforms(), setup_sp_offset(), wi::sext_large(), shared_const_p(), simplify_context::simplify_binary_operation_1(), simplify_compare_const(), simplify_operand_subreg(), simplify_subreg_regno(), simplify_while_replacing(), size_for_offset(), slsr_process_ref(), split_address_groups(), split_to_var_and_offset(), sra_handled_bf_read_p(), stmt_kills_ref_p(), store_bit_field(), store_constructor(), store_kills_ref_p(), store_one_arg(), store_split_bit_field(), string_cst_read_str(), strip_offset(), strip_offset_1(), strip_offset_and_add(), subbinfo_with_vtable_at_offset(), subreg_get_info(), subreg_memory_offset(), subreg_offset_representable_p(), subreg_regno_offset(), char_span::subspan(), pcom_worker::suitable_component_p(), tm_memopt_transform_stmt(), access_group::track(), track_loc_p(), track_offset_p(), pair_fusion_bb_info::track_via_mem_expr(), tree_mem_ref_addr(), try_combine(), try_make_edge_direct_virtual_call(), pair_fusion::try_promote_writeback(), ubsan_expand_objsize_ifn(), unadjusted_ptr_and_unit_offset(), undefined_operand_subword_p(), update_reg_offset(), use_anchored_address(), use_related_value(), validate_subreg(), var_lowpart(), var_mem_decl_set(), var_mem_delete(), var_mem_delete_and_set(), var_mem_set(), var_reg_decl_set(), var_reg_delete(), var_reg_delete_and_set(), var_reg_set(), vec_series_highpart_p(), vec_series_lowpart_p(), vect_analyze_data_refs(), vect_build_one_gather_load_call(), vect_build_one_scatter_store_call(), vect_create_addr_base_for_vector_ref(), vect_create_cond_for_align_checks(), vect_create_data_ref_ptr(), vect_get_strided_load_store_ops(), vect_recog_gather_scatter_pattern(), vect_update_init_of_dr(), vectorizable_load(), vectorizable_store(), verify_sra_access_forest(), vn_reference_insert_pieces(), vn_reference_lookup_3(), vn_reference_lookup_or_insert_for_pieces(), vt_add_function_parameter(), vt_get_decl_and_offset(), vt_initialize(), vt_stack_adjustments(), vtable_pointer_value_to_binfo(), vtable_pointer_value_to_vtable(), vtbl_map_node_registration_find(), vtbl_map_node_registration_insert(), widen_memory_access(), and wi::zext_large().

◆ real_store_ruid

◆ reg_base_reg

int reg_base_reg[FIRST_PSEUDO_REGISTER]
static

◆ reg_mode

◆ reg_offset

HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]
static
If reg_base_reg[n] is negative, register n has been set to
reg_offset[n] or reg_symbol_ref[n] + reg_offset[n] in mode reg_mode[n].
If reg_base_reg[n] is non-negative, register n has been set to the
sum of reg_offset[n] and the value of register reg_base_reg[n]
before reg_set_luid[n], calculated in mode reg_mode[n] .
For multi-hard-register registers, all but the first one are
recorded as BLKmode in reg_mode.  Setting reg_mode to VOIDmode
marks it as invalid.   

Referenced by move2add_note_store(), move2add_record_sym_value(), move2add_use_add2_insn(), move2add_use_add3_insn(), reload_cse_move2add(), and var_lowpart().

◆ reg_set_luid

int reg_set_luid[FIRST_PSEUDO_REGISTER]
static
See if we can reduce the cost of a constant by replacing a move
with an add.  We track situations in which a register is set to a
constant or to a register plus a constant.   
We cannot do our optimization across labels.  Invalidating all the
information about register contents we have would be costly, so we
use move2add_last_label_luid to note where the label is and then
later disable any optimization that would cross it.
reg_offset[n] / reg_base_reg[n] / reg_symbol_ref[n] / reg_mode[n]
are only valid if reg_set_luid[n] is greater than
move2add_last_label_luid.
For a set that established a new (potential) base register with
non-constant value, we use move2add_luid from the place where the
setting insn is encountered; registers based off that base then
get the same reg_set_luid.  Constants all get
move2add_last_label_luid + 1 as their reg_set_luid.   

Referenced by move2add_note_store(), move2add_record_sym_value(), move2add_use_add3_insn(), move2add_valid_value_p(), and reload_cse_move2add().

◆ [struct]

struct { ... } reg_state[FIRST_PSEUDO_REGISTER]
If the register is used in some unknown fashion, USE_INDEX is negative.
If it is dead, USE_INDEX is RELOAD_COMBINE_MAX_USES, and STORE_RUID
indicates where it is first set or clobbered.
Otherwise, USE_INDEX is the index of the last encountered use of the
register (which is first among these we have seen since we scan backwards).
USE_RUID indicates the first encountered, i.e. last, of these uses.
If ALL_OFFSETS_MATCH is true, all encountered uses were inside a PLUS
with a constant offset; OFFSET contains this constant in that case.
STORE_RUID is always meaningful if we only want to use a value in a
register in a different place: it denotes the next insn in the insn
stream (i.e. the last encountered) that sets or clobbers the register.
REAL_STORE_RUID is similar, but clobbers are ignored when updating it.
EXPR is the expression used when storing the register.   

Referenced by reload_combine(), reload_combine_closest_single_use(), reload_combine_note_store(), reload_combine_note_use(), reload_combine_purge_insn_uses(), reload_combine_purge_reg_uses_after_ruid(), reload_combine_recognize_const_pattern(), reload_combine_recognize_pattern(), and reload_combine_split_ruids().

◆ reg_symbol_ref

rtx reg_symbol_ref[FIRST_PSEUDO_REGISTER]
static

◆ reg_use

struct reg_use reg_use[RELOAD_COMBINE_MAX_USES]

◆ reload_combine_ruid

int reload_combine_ruid
static
Reverse linear uid.  This is increased in reload_combine while scanning
the instructions from last to first.  It is used to set last_label_ruid
and the store_ruid / use_ruid fields in reg_state.   

Referenced by reload_combine(), reload_combine_note_store(), reload_combine_recognize_const_pattern(), and reload_combine_split_ruids().

◆ store_ruid

◆ use_index

◆ use_ruid