GCC Middle and Back End API Reference
optabs.h File Reference
#include "optabs-query.h"
#include "optabs-libfuncs.h"
#include "vec-perm-indices.h"
#include "insn-config.h"
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Data Structures

class  expand_operand
 

Enumerations

enum  expand_operand_type {
  EXPAND_FIXED , EXPAND_OUTPUT , EXPAND_INPUT , EXPAND_CONVERT_TO ,
  EXPAND_CONVERT_FROM , EXPAND_ADDRESS , EXPAND_INTEGER , EXPAND_UNDEFINED_INPUT
}
 
enum  optab_methods {
  OPTAB_DIRECT , OPTAB_LIB , OPTAB_WIDEN , OPTAB_LIB_WIDEN ,
  OPTAB_MUST_WIDEN
}
 
enum  can_compare_purpose { ccp_jump , ccp_cmov , ccp_store_flag }
 

Functions

rtx expand_widening_mult (machine_mode, rtx, rtx, rtx, int, optab)
 
void create_expand_operand (class expand_operand *op, enum expand_operand_type type, rtx value, machine_mode mode, bool unsigned_p, poly_int64 int_value=0)
 
void create_fixed_operand (class expand_operand *op, rtx x)
 
void create_output_operand (class expand_operand *op, rtx x, machine_mode mode)
 
void create_input_operand (class expand_operand *op, rtx value, machine_mode mode)
 
void create_undefined_input_operand (class expand_operand *op, machine_mode mode)
 
void create_convert_operand_to (class expand_operand *op, rtx value, machine_mode mode, bool unsigned_p)
 
void create_convert_operand_from (class expand_operand *op, rtx value, machine_mode mode, bool unsigned_p)
 
void create_address_operand (class expand_operand *op, rtx value)
 
void create_integer_operand (class expand_operand *, poly_int64)
 
rtx expand_widen_pattern_expr (const struct separate_ops *, rtx, rtx, rtx, rtx, int)
 
rtx expand_ternary_op (machine_mode mode, optab ternary_optab, rtx op0, rtx op1, rtx op2, rtx target, int unsignedp)
 
rtx simplify_expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1, rtx target, int unsignedp, enum optab_methods methods)
 
bool force_expand_binop (machine_mode, optab, rtx, rtx, rtx, int, enum optab_methods)
 
rtx expand_vector_broadcast (machine_mode, rtx)
 
rtx expand_doubleword_divmod (machine_mode, rtx, rtx, rtx *, bool)
 
rtx expand_simple_binop (machine_mode, enum rtx_code, rtx, rtx, rtx, int, enum optab_methods)
 
rtx expand_binop (machine_mode, optab, rtx, rtx, rtx, int, enum optab_methods)
 
rtx sign_expand_binop (machine_mode, optab, optab, rtx, rtx, rtx, int, enum optab_methods)
 
bool expand_twoval_unop (optab, rtx, rtx, rtx, int)
 
bool expand_twoval_binop (optab, rtx, rtx, rtx, rtx, int)
 
bool expand_twoval_binop_libfunc (optab, rtx, rtx, rtx, rtx, enum rtx_code)
 
rtx expand_simple_unop (machine_mode, enum rtx_code, rtx, rtx, int)
 
rtx expand_unop (machine_mode, optab, rtx, rtx, int)
 
rtx expand_abs_nojump (machine_mode, rtx, rtx, int)
 
rtx expand_abs (machine_mode, rtx, rtx, int, int)
 
rtx expand_one_cmpl_abs_nojump (machine_mode, rtx, rtx)
 
rtx expand_copysign (rtx, rtx, rtx)
 
bool maybe_emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code)
 
void emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code)
 
void emit_libcall_block (rtx_insn *, rtx, rtx, rtx)
 
bool can_compare_p (enum rtx_code, machine_mode, enum can_compare_purpose)
 
bool can_vec_cmp_compare_p (enum rtx_code, machine_mode, machine_mode)
 
bool can_vcond_compare_p (enum rtx_code, machine_mode, machine_mode)
 
bool can_vec_set_var_idx_p (machine_mode)
 
bool can_vec_extract_var_idx_p (machine_mode, machine_mode)
 
rtx prepare_operand (enum insn_code, rtx, int, machine_mode, machine_mode, int)
 
void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx, machine_mode, int, rtx, profile_probability prob=profile_probability::uninitialized())
 
void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx, machine_mode, int, tree, rtx, profile_probability prob=profile_probability::uninitialized())
 
void emit_indirect_jump (rtx)
 
rtx emit_conditional_move (rtx, rtx_comparison, rtx, rtx, machine_mode, int)
 
rtx emit_conditional_move (rtx, rtx, rtx, rtx, rtx, machine_mode)
 
rtx emit_conditional_neg_or_complement (rtx, rtx_code, machine_mode, rtx, rtx, rtx)
 
rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, machine_mode, rtx, rtx, machine_mode, int)
 
rtx_insngen_add2_insn (rtx, rtx)
 
rtx_insngen_add3_insn (rtx, rtx, rtx)
 
bool have_add2_insn (rtx, rtx)
 
rtx_insngen_addptr3_insn (rtx, rtx, rtx)
 
bool have_addptr3_insn (rtx, rtx, rtx)
 
rtx_insngen_sub2_insn (rtx, rtx)
 
rtx_insngen_sub3_insn (rtx, rtx, rtx)
 
bool have_sub2_insn (rtx, rtx)
 
rtx_insngen_extend_insn (rtx, rtx, machine_mode, machine_mode, int)
 
void expand_float (rtx, rtx, int)
 
void expand_fix (rtx, rtx, int)
 
void expand_fixed_convert (rtx, rtx, int, int)
 
bool expand_sfix_optab (rtx, rtx, convert_optab)
 
bool have_insn_for (enum rtx_code, machine_mode)
 
rtx_insngen_cond_trap (enum rtx_code, rtx, rtx, rtx)
 
rtx expand_vec_perm_var (machine_mode, rtx, rtx, rtx, rtx)
 
rtx expand_vec_perm_const (machine_mode, rtx, rtx, const vec_perm_builder &, machine_mode, rtx)
 
rtx expand_vec_cmp_expr (tree, tree, rtx)
 
rtx expand_vec_series_expr (machine_mode, rtx, rtx, rtx)
 
rtx expand_mult_highpart (machine_mode, rtx, rtx, rtx, bool)
 
rtx expand_sync_lock_test_and_set (rtx, rtx, rtx)
 
rtx expand_atomic_test_and_set (rtx, rtx, enum memmodel)
 
rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel)
 
bool expand_atomic_compare_and_swap (rtx *, rtx *, rtx, rtx, rtx, bool, enum memmodel, enum memmodel)
 
void expand_mem_thread_fence (enum memmodel)
 
void expand_mem_signal_fence (enum memmodel)
 
rtx expand_atomic_load (rtx, rtx, enum memmodel)
 
rtx expand_atomic_store (rtx, rtx, enum memmodel, bool)
 
rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel, bool)
 
void expand_asm_reg_clobber_mem_blockage (HARD_REG_SET)
 
bool insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
 
bool valid_multiword_target_p (rtx)
 
void create_convert_operand_from_type (class expand_operand *op, rtx value, tree type)
 
bool maybe_legitimize_operands (enum insn_code icode, unsigned int opno, unsigned int nops, class expand_operand *ops)
 
rtx_insnmaybe_gen_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops)
 
bool maybe_expand_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops)
 
bool maybe_expand_jump_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops)
 
void expand_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops)
 
void expand_jump_insn (enum insn_code icode, unsigned int nops, class expand_operand *ops)
 
enum rtx_code get_rtx_code_1 (enum tree_code tcode, bool unsignedp)
 
enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp)
 
rtx vector_compare_rtx (machine_mode cmp_mode, enum tree_code tcode, tree t_op0, tree t_op1, bool unsignedp, enum insn_code icode, unsigned int opno)
 

Enumeration Type Documentation

◆ can_compare_purpose

The various uses that a comparison can have; used by can_compare_p:
jumps, conditional moves, store flag operations.   
Enumerator
ccp_jump 
ccp_cmov 
ccp_store_flag 

◆ expand_operand_type

Describes the type of an expand_operand.  Each value is associated
with a create_*_operand function; see the comments above those
functions for details.   
Enumerator
EXPAND_FIXED 
EXPAND_OUTPUT 
EXPAND_INPUT 
EXPAND_CONVERT_TO 
EXPAND_CONVERT_FROM 
EXPAND_ADDRESS 
EXPAND_INTEGER 
EXPAND_UNDEFINED_INPUT 

◆ optab_methods

Passed to expand_simple_binop and expand_binop to say which options
to try to use if the requested operation can't be open-coded on the
requisite mode.  Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using
a library call.  Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try
using a wider mode.  OPTAB_MUST_WIDEN says try widening and don't
try anything else.   
Enumerator
OPTAB_DIRECT 
OPTAB_LIB 
OPTAB_WIDEN 
OPTAB_LIB_WIDEN 
OPTAB_MUST_WIDEN 

Function Documentation

◆ can_compare_p()

bool can_compare_p ( enum rtx_code code,
machine_mode mode,
enum can_compare_purpose purpose )
extern
Nonzero if a compare of mode MODE can be done straightforwardly
(without splitting it into pieces).   
True if we can perform a comparison of mode MODE straightforwardly.
PURPOSE describes how this comparison will be used.  CODE is the rtx
comparison code we will be using.

??? Actually, CODE is slightly weaker than that.  A target is still
required to implement all of the normal bcc operations, but not
required to implement all (or any) of the unordered bcc operations.   

References ccp_cmov, ccp_jump, ccp_store_flag, const0_rtx, GET_MODE_WIDER_MODE(), insn_operand_matches(), optab_handler(), and PUT_MODE().

Referenced by by_pieces_mode_supported_p(), do_compare_rtx_and_jump(), do_jump_1(), emit_block_cmp_via_loop(), emit_cmp_and_jump_insns(), emit_store_flag(), emit_store_flag_force(), emit_store_flag_int(), and compare_by_pieces_d::prepare_mode().

◆ can_vcond_compare_p()

bool can_vcond_compare_p ( enum rtx_code code,
machine_mode value_mode,
machine_mode cmp_op_mode )
extern
Return whether the backend can emit a vector comparison (vcond/vcondu) for
code CODE, comparing operands of mode CMP_OP_MODE and producing a result
with VALUE_MODE.   

References get_vcond_icode(), insn_predicate_matches_p(), and unsigned_optab_p().

Referenced by vcond_icode_p().

◆ can_vec_cmp_compare_p()

bool can_vec_cmp_compare_p ( enum rtx_code code,
machine_mode value_mode,
machine_mode mask_mode )
extern
Return whether the backend can emit a vector comparison (vec_cmp/vec_cmpu)
for code CODE, comparing operands of mode VALUE_MODE and producing a result
with MASK_MODE.   

References get_vec_cmp_icode(), insn_predicate_matches_p(), and unsigned_optab_p().

Referenced by vec_cmp_icode_p().

◆ can_vec_extract_var_idx_p()

bool can_vec_extract_var_idx_p ( machine_mode vec_mode,
machine_mode extr_mode )
extern
Return whether the backend can emit a vec_extract instruction with
a non-constant index.   

References alloca_raw_REG, convert_optab_handler(), insn_data, insn_operand_matches(), LAST_VIRTUAL_REGISTER, operand_data::mode, data::operand, and VECTOR_MODE_P.

Referenced by gimple_expand_vec_set_extract_expr(), and vectorizable_live_operation().

◆ can_vec_set_var_idx_p()

bool can_vec_set_var_idx_p ( machine_mode vec_mode)
extern
Return whether the backend can emit vector set instructions for inserting
element into vector at variable index position.   

References alloca_raw_REG, GET_MODE_INNER, insn_data, insn_operand_matches(), LAST_VIRTUAL_REGISTER, operand_data::mode, data::operand, optab_handler(), and VECTOR_MODE_P.

Referenced by gimple_expand_vec_set_extract_expr().

◆ create_address_operand()

void create_address_operand ( class expand_operand * op,
rtx value )
inline
Make OP describe an input Pmode address operand.  VALUE is the value
of the address, but it may need to be converted to Pmode first.   

References create_expand_operand(), and EXPAND_ADDRESS.

Referenced by emit_indirect_jump(), emit_stack_probe(), expand_builtin_prefetch(), expand_gather_load_optab_fn(), expand_scatter_store_optab_fn(), and maybe_emit_call_builtin___clear_cache().

◆ create_convert_operand_from()

void create_convert_operand_from ( class expand_operand * op,
rtx value,
machine_mode mode,
bool unsigned_p )
inline
Make OP describe an input operand that should have the same value
as VALUE, after any mode conversion that the backend might request.
If VALUE is a CONST_INT, it should be treated as having mode MODE.
UNSIGNED_P says whether VALUE is unsigned.

The conversion of VALUE can include a combination of numerical
conversion (as for convert_modes) and duplicating a scalar to fill
a vector (if VALUE is a scalar but the operand is a vector).   

References create_expand_operand(), and EXPAND_CONVERT_FROM.

Referenced by add_mask_and_len_args(), create_convert_operand_from_type(), expand_cmpstrn_or_cmpmem(), expand_expr_real_2(), expand_fn_using_insn(), expand_ternary_op(), expand_twoval_binop(), expand_twoval_unop(), expand_unop_direct(), expand_vec_set_optab_fn(), expand_widen_pattern_expr(), and set_storage_via_setmem().

◆ create_convert_operand_from_type()

void create_convert_operand_from_type ( class expand_operand * op,
rtx value,
tree type )
extern
Make OP describe an input operand that should have the same value
as VALUE, after any mode conversion that the target might request.
TYPE is the type of VALUE.   

References create_convert_operand_from(), TYPE_MODE, and TYPE_UNSIGNED.

Referenced by expand_vec_perm_const(), and try_casesi().

◆ create_convert_operand_to()

void create_convert_operand_to ( class expand_operand * op,
rtx value,
machine_mode mode,
bool unsigned_p )
inline
Like create_input_operand, except that VALUE must first be converted
to mode MODE.  UNSIGNED_P says whether VALUE is unsigned.   

References create_expand_operand(), and EXPAND_CONVERT_TO.

Referenced by allocate_dynamic_stack_space(), emit_block_move_via_pattern(), expand_ifn_atomic_bit_test_and(), expand_ifn_atomic_op_fetch_cmp_0(), maybe_emit_op(), set_storage_via_setmem(), and store_integral_bit_field().

◆ create_expand_operand()

◆ create_fixed_operand()

◆ create_input_operand()

void create_input_operand ( class expand_operand * op,
rtx value,
machine_mode mode )
inline
Make OP describe an input operand that must have mode MODE and
value VALUE; MODE cannot be VOIDmode.  The backend may request that
VALUE be copied into a different kind of rtx before being passed
as an operand.   

References create_expand_operand(), and EXPAND_INPUT.

Referenced by add_mask_and_len_args(), builtin_memset_gen_str(), emit_conditional_add(), emit_conditional_move_1(), emit_conditional_neg_or_complement(), emit_storent_insn(), expand_addsub_overflow(), expand_assignment(), expand_atomic_compare_and_swap(), expand_atomic_store(), expand_binop_directly(), expand_builtin_set_thread_pointer(), expand_expr_real_2(), expand_fn_using_insn(), expand_gather_load_optab_fn(), expand_GOMP_SIMT_ENTER_ALLOC(), expand_GOMP_SIMT_EXIT(), expand_GOMP_SIMT_LAST_LANE(), expand_GOMP_SIMT_ORDERED_PRED(), expand_GOMP_SIMT_VOTE_ANY(), expand_GOMP_SIMT_XCHG_BFLY(), expand_GOMP_SIMT_XCHG_IDX(), expand_mul_overflow(), expand_mult_highpart(), expand_neg_overflow(), expand_partial_store_optab_fn(), expand_RAWMEMCHR(), expand_scatter_store_optab_fn(), expand_SPACESHIP(), expand_store_lanes_optab_fn(), expand_UADDC(), expand_vec_cond_mask_optab_fn(), expand_vec_cond_optab_fn(), expand_vec_perm_1(), expand_vec_perm_const(), expand_vec_series_expr(), expand_vec_set_optab_fn(), expand_vector_broadcast(), expand_while_optab_fn(), extract_bit_field_1(), maybe_emit_atomic_exchange(), maybe_emit_sync_lock_test_and_set(), maybe_emit_unop_insn(), probe_stack_range(), store_bit_field_1(), store_bit_field_using_insv(), store_constructor(), try_casesi(), and vector_compare_rtx().

◆ create_integer_operand()

void create_integer_operand ( class expand_operand * op,
poly_int64 intval )
extern

◆ create_output_operand()

◆ create_undefined_input_operand()

void create_undefined_input_operand ( class expand_operand * op,
machine_mode mode )
inline
Make OP describe an undefined input operand of mode MODE.  MODE cannot
be null.   

References create_expand_operand(), and EXPAND_UNDEFINED_INPUT.

Referenced by expand_fn_using_insn().

◆ emit_cmp_and_jump_insns() [1/2]

void emit_cmp_and_jump_insns ( rtx x,
rtx y,
enum rtx_code comparison,
rtx size,
machine_mode mode,
int unsignedp,
rtx label,
profile_probability prob )
extern
Emit a pair of rtl insns to compare two rtx's and to jump
to a label if the comparison is true.   
Overloaded version of emit_cmp_and_jump_insns in which VAL is unknown.   

References emit_cmp_and_jump_insns(), NULL, and y.

◆ emit_cmp_and_jump_insns() [2/2]

void emit_cmp_and_jump_insns ( rtx x,
rtx y,
enum rtx_code comparison,
rtx size,
machine_mode mode,
int unsignedp,
tree val,
rtx label,
profile_probability prob )
extern
Generate code to compare X with Y so that the condition codes are
set and to jump to LABEL if the condition is true.  If X is a
constant and Y is not a constant, then the comparison is swapped to
ensure that the comparison RTL has the canonical form.

UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
need to be widened.  UNSIGNEDP is also used to select the proper
branch condition code.

If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.

MODE is the mode of the inputs (in case they are const_int).

COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
It will be potentially converted into an unsigned variant based on
UNSIGNEDP to select a proper jump instruction.

PROB is the probability of jumping to LABEL.  If the comparison is against
zero then VAL contains the expression from which the non-zero RTL is
derived.   

References can_compare_p(), ccp_jump, CONST0_RTX, CONSTANT_P, emit_cmp_and_jump_insn_1(), force_reg(), GET_MODE, OPTAB_LIB_WIDEN, prepare_cmp_insn(), swap_commutative_operands_p(), swap_condition(), unsigned_condition(), validate_test_and_branch(), and y.

Referenced by allocate_dynamic_stack_space(), anti_adjust_stack_and_probe(), anti_adjust_stack_and_probe_stack_clash(), asan_clear_shadow(), asan_emit_stack_protection(), do_compare_rtx_and_jump(), do_tablejump(), emit_block_cmp_via_loop(), emit_block_move_via_loop(), emit_block_move_via_oriented_loop(), emit_cmp_and_jump_insns(), emit_stack_clash_protection_probe_loop_end(), emit_stack_clash_protection_probe_loop_start(), expand_builtin_atomic_compare_exchange(), expand_compare_and_swap_loop(), expand_copysign_absneg(), expand_doubleword_clz_ctz_ffs(), expand_ffs(), expand_fix(), expand_float(), inline_string_cmp(), prepare_call_address(), probe_stack_range(), sjlj_emit_function_enter(), stack_protect_epilogue(), store_expr(), try_casesi(), and try_store_by_multiple_pieces().

◆ emit_conditional_add()

rtx emit_conditional_add ( rtx target,
enum rtx_code code,
rtx op0,
rtx op1,
machine_mode cmode,
rtx op2,
rtx op3,
machine_mode mode,
int unsignedp )
Emit a conditional addition instruction if the machine supports one for that
condition and machine mode.

OP0 and OP1 are the operands that should be compared using CODE.  CMODE is
the mode to use should they be constants.  If it is VOIDmode, they cannot
both be constants.

OP2 should be stored in TARGET if the comparison is false, otherwise OP2+OP3
should be stored there.  MODE is the mode to use should they be constants.
If it is VOIDmode, they cannot both be constants.

The result is either TARGET (perhaps modified) or NULL_RTX if the operation
is not supported.   

References COMPARISON_P, const0_rtx, const1_rtx, constm1_rtx, convert_move(), create_fixed_operand(), create_input_operand(), create_output_operand(), delete_insns_since(), do_pending_stack_adjust(), gen_reg_rtx(), GET_CODE, get_last_insn(), GET_MODE, last, maybe_expand_insn(), expand_operand::mode, NULL_RTX, optab_handler(), OPTAB_WIDEN, prepare_cmp_insn(), simplify_gen_relational(), swap_commutative_operands_p(), swap_condition(), expand_operand::target, unsigned_condition(), expand_operand::value, and XEXP.

Referenced by noce_try_addcc().

◆ emit_conditional_move() [1/2]

rtx emit_conditional_move ( rtx target,
rtx comparison,
rtx rev_comparison,
rtx op2,
rtx op3,
machine_mode mode )
Helper function that, in addition to COMPARISON, also tries
the reversed REV_COMPARISON with swapped OP2 and OP3.  As opposed
to when we pass the specific constituents of a comparison, no
additional insns are emitted for it.  It might still be necessary
to emit more than one insn for the final conditional move, though.   

References emit_conditional_move_1(), expand_operand::mode, NULL_RTX, and expand_operand::target.

◆ emit_conditional_move() [2/2]

rtx emit_conditional_move ( rtx target,
struct rtx_comparison comp,
rtx op2,
rtx op3,
machine_mode mode,
int unsignedp )
Emit a conditional move operation.   
Emit a conditional move instruction if the machine supports one for that
condition and machine mode.

OP0 and OP1 are the operands that should be compared using CODE.  CMODE is
the mode to use should they be constants.  If it is VOIDmode, they cannot
both be constants.

OP2 should be stored in TARGET if the comparison is true, otherwise OP3
should be stored there.  MODE is the mode to use should they be constants.
If it is VOIDmode, they cannot both be constants.

The result is either TARGET (perhaps modified) or NULL_RTX if the operation
is not supported.   

References can_create_pseudo_p, comp, COMPARISON_P, const0_rtx, const1_rtx, CONSTANT_P, constm1_rtx, COSTS_N_INSNS, delete_insns_since(), direct_optab_handler(), do_pending_stack_adjust(), emit_conditional_move_1(), emit_move_insn(), force_reg(), gen_reg_rtx(), GET_CODE, get_last_insn(), GET_MODE, last, expand_operand::mode, NULL, NULL_RTX, OPTAB_WIDEN, optimize_insn_for_speed_p(), prepare_cmp_insn(), restore_pending_stack_adjust(), reversed_comparison_code_parts(), rtx_cost(), rtx_equal_p(), save_pending_stack_adjust(), simplify_gen_relational(), swap_commutative_operands_p(), swap_condition(), expand_operand::target, unsigned_condition(), and XEXP.

Referenced by emit_store_flag(), expand_cond_expr_using_cmove(), expand_doubleword_shift_condmove(), expand_expr_real_2(), expand_sdiv_pow2(), and noce_emit_cmove().

◆ emit_conditional_neg_or_complement()

rtx emit_conditional_neg_or_complement ( rtx target,
rtx_code code,
machine_mode mode,
rtx cond,
rtx op1,
rtx op2 )
Emit a conditional negate or bitwise complement operation.   
Emit a conditional negate or bitwise complement using the
negcc or notcc optabs if available.  Return NULL_RTX if such operations
are not available.  Otherwise return the RTX holding the result.
TARGET is the desired destination of the result.  COMP is the comparison
on which to negate.  If COND is true move into TARGET the negation
or bitwise complement of OP1.  Otherwise move OP2 into TARGET.
CODE is either NEG or NOT.  MODE is the machine mode in which the
operation is performed.   

References convert_move(), create_fixed_operand(), create_input_operand(), create_output_operand(), delete_insns_since(), direct_optab_handler(), gcc_unreachable, gen_reg_rtx(), get_last_insn(), last, maybe_expand_insn(), expand_operand::mode, NULL_RTX, expand_operand::target, unknown_optab, and expand_operand::value.

Referenced by noce_try_inverse_constants().

◆ emit_indirect_jump()

void emit_indirect_jump ( rtx loc)
extern

◆ emit_libcall_block()

void emit_libcall_block ( rtx_insn * insns,
rtx target,
rtx result,
rtx equiv )
extern
Emit code to make a call to a constant function or a library call.   

References emit_libcall_block_1(), insns, and no_conflict_data::target.

Referenced by convert_mode_scalar(), expand_fix(), expand_fixed_convert(), expand_float(), expand_twoval_binop_libfunc(), and prepare_float_lib_cmp().

◆ emit_unop_insn()

void emit_unop_insn ( enum insn_code icode,
rtx target,
rtx op0,
enum rtx_code code )
extern
Generate an instruction whose insn-code is INSN_CODE,
with two operands: an output TARGET and an input OP0.
TARGET *must* be nonzero, and the output is always stored there.
CODE is an rtx code such that (CODE OP0) is an rtx that describes
the value that is stored into TARGET.   

References gcc_assert, maybe_emit_unop_insn(), and expand_operand::target.

Referenced by compress_float_constant(), convert_mode_scalar(), convert_move(), expand_copysign_absneg(), expand_fixed_convert(), and expand_float().

◆ expand_abs()

◆ expand_abs_nojump()

rtx expand_abs_nojump ( machine_mode mode,
rtx op0,
rtx target,
int result_unsignedp )
extern
Expand the absolute value operation.   
Emit code to compute the absolute value of OP0, with result to
 TARGET if convenient.  (TARGET may be 0.)  The return value says
 where the result actually is to be found.

 MODE is the mode of the operand; the mode of the result is
 different but can be deduced from MODE.

References delete_insns_since(), expand_absneg_bit(), expand_binop(), expand_shift(), expand_unop(), get_last_insn(), GET_MODE_CLASS, GET_MODE_PRECISION(), HONOR_SIGNED_ZEROS(), is_a(), is_int_mode(), last, expand_operand::mode, NULL_RTX, optab_handler(), OPTAB_LIB_WIDEN, OPTAB_WIDEN, optimize_insn_for_speed_p(), and expand_operand::target.

Referenced by expand_abs(), and noce_try_abs().

◆ expand_asm_reg_clobber_mem_blockage()

void expand_asm_reg_clobber_mem_blockage ( HARD_REG_SET regs)
extern
Generate asm volatile("" : : : "memory") as a memory blockage, at the
same time clobbering the register set specified by REGS.   

References emit_insn(), gcc_assert, gen_rtx_MEM(), i, MEM_VOLATILE_P, regno_reg_rtx, rtvec_alloc(), RTVEC_ELT, TEST_HARD_REG_BIT, and UNKNOWN_LOCATION.

Referenced by gen_call_used_regs_seq().

◆ expand_atomic_compare_and_swap()

bool expand_atomic_compare_and_swap ( rtx * ptarget_bool,
rtx * ptarget_oval,
rtx mem,
rtx expected,
rtx desired,
bool is_weak,
enum memmodel succ_model,
enum memmodel fail_model )
extern
This function expands the atomic compare exchange operation:

*PTARGET_BOOL is an optional place to store the boolean success/failure.
*PTARGET_OVAL is an optional place to store the old value from memory.
Both target parameters may be NULL or const0_rtx to indicate that we do
not care about that return value.  Both target parameters are updated on
success to the actual location of the corresponding result.

MEMMODEL is the memory model variant to use.

The return value of the function is true for success.   

References can_atomic_load_p(), const0_rtx, convert_memory_address, copy_to_reg(), create_fixed_operand(), create_input_operand(), create_integer_operand(), create_output_operand(), direct_optab_handler(), emit_library_call_value(), emit_move_insn(), emit_store_flag_force(), find_cc_set(), gen_reg_rtx(), get_last_insn(), GET_MODE, have_insn_for(), insn_data, is_mm_sync(), LCT_NORMAL, maybe_expand_insn(), MEM_P, expand_operand::mode, insn_operand_data::mode, note_stores(), NULL, NULL_RTX, insn_data_d::operand, optab_handler(), optab_libfunc(), ptr_mode, reg_overlap_mentioned_p(), expand_operand::target, expand_operand::value, and XEXP.

Referenced by expand_builtin_atomic_compare_exchange(), expand_builtin_compare_and_swap(), expand_compare_and_swap_loop(), and expand_ifn_atomic_compare_exchange().

◆ expand_atomic_exchange()

rtx expand_atomic_exchange ( rtx target,
rtx mem,
rtx val,
enum memmodel model )
extern
This function expands the atomic exchange operation:
atomically store VAL in MEM and return the previous value in MEM.

MEMMODEL is the memory model variant to use.
TARGET is an optional place to stick the return value.   

References can_atomic_load_p(), GET_MODE, is_mm_sync(), maybe_emit_atomic_exchange(), maybe_emit_compare_and_swap_exchange_loop(), expand_operand::mode, NULL_RTX, and expand_operand::target.

Referenced by expand_builtin_atomic_exchange().

◆ expand_atomic_fetch_op()

rtx expand_atomic_fetch_op ( rtx target,
rtx mem,
rtx val,
enum rtx_code code,
enum memmodel model,
bool after )
This function expands an atomic fetch_OP or OP_fetch operation:
TARGET is an option place to stick the return value.  const0_rtx indicates
the result is unused. 
atomically fetch MEM, perform the operation with VAL and return it to MEM.
CODE is the operation being performed (OP)
MEMMODEL is the memory model variant to use.
AFTER is true to return the result of the operation (OP_fetch).
AFTER is false to return the value before the operation (fetch_OP).   

References can_atomic_load_p(), can_compare_and_swap_p(), const0_rtx, convert_memory_address, emit_insn(), emit_library_call_value(), emit_move_insn(), end_sequence(), expand_atomic_fetch_op_no_fallback(), expand_compare_and_swap_loop(), expand_simple_binop(), expand_simple_unop(), gen_reg_rtx(), get_atomic_op_for_code(), get_insns(), GET_MODE, is_mm_sync(), LCT_NORMAL, NULL, NULL_RTX, OPTAB_LIB_WIDEN, optab_libfunc(), ptr_mode, register_operand(), start_sequence(), and XEXP.

Referenced by expand_builtin_atomic_fetch_op(), expand_builtin_sync_operation(), expand_ifn_atomic_bit_test_and(), and expand_ifn_atomic_op_fetch_cmp_0().

◆ expand_atomic_load()

rtx expand_atomic_load ( rtx target,
rtx mem,
enum memmodel model )

◆ expand_atomic_store()

rtx expand_atomic_store ( rtx mem,
rtx val,
enum memmodel model,
bool use_release )

◆ expand_atomic_test_and_set()

rtx expand_atomic_test_and_set ( rtx target,
rtx mem,
enum memmodel model )
extern
This function expands the atomic test_and_set operation:
atomically store a boolean TRUE into MEM and return the previous value.

MEMMODEL is the memory model variant to use.
TARGET is an optional place to stick the return value.   

References const0_rtx, const1_rtx, emit_store_flag_force(), gcc_assert, gen_int_mode(), gen_reg_rtx(), GET_MODE, maybe_emit_atomic_exchange(), maybe_emit_atomic_test_and_set(), maybe_emit_compare_and_swap_exchange_loop(), maybe_emit_sync_lock_test_and_set(), expand_operand::mode, expand_operand::target, and targetm.

Referenced by expand_builtin_atomic_test_and_set().

◆ expand_binop()

rtx expand_binop ( machine_mode mode,
optab binoptab,
rtx op0,
rtx op1,
rtx target,
int unsignedp,
enum optab_methods methods )
extern
Expand a binary operation given optab and rtx operands.   
Generate code to perform an operation specified by BINOPTAB
on operands OP0 and OP1, with result having machine-mode MODE.

UNSIGNEDP is for the case where we have to widen the operands
to perform the operation.  It says to use zero-extension.

If TARGET is nonzero, the value
is generated there, if it is convenient to do so.
In all cases an rtx is returned for the locus of the value;
this may or may not be TARGET.   

References as_a(), avoid_expensive_constant(), BITS_PER_WORD, CLASS_HAS_WIDER_MODES_P, commutative_optab_p(), CONST0_RTX, const0_rtx, CONST_INT_P, convert_move(), convert_optab_handler(), convert_optab_p(), convert_to_mode(), copy_rtx(), delete_insns_since(), emit_clobber(), emit_insn(), emit_libcall_block_1(), emit_library_call_value(), emit_move_insn(), emit_store_flag_force(), end_sequence(), expand_binop(), expand_binop_directly(), expand_doubleword_divmod(), expand_doubleword_mod(), expand_doubleword_mult(), expand_doubleword_shift(), expand_vector_broadcast(), find_widening_optab_handler, FOR_EACH_WIDER_MODE, force_reg(), gcc_assert, gen_int_mode(), gen_int_shift_amount(), gen_lowpart, gen_reg_rtx(), get_insns(), get_last_insn(), GET_MODE, GET_MODE_2XWIDER_MODE(), GET_MODE_BITSIZE(), GET_MODE_CLASS, GET_MODE_INNER, GET_MODE_PRECISION(), GET_MODE_SIZE(), GET_MODE_WIDER_MODE(), i, insns, INTVAL, is_int_mode(), last, LCT_CONST, expand_operand::mode, negate_rtx(), NULL_RTX, operand_subword(), operand_subword_force(), OPTAB_DIRECT, optab_handler(), OPTAB_LIB, OPTAB_LIB_WIDEN, optab_libfunc(), OPTAB_MUST_WIDEN, OPTAB_WIDEN, optimize_insn_for_speed_p(), reg_overlap_mentioned_p(), REG_P, rtx_equal_p(), set_dst_reg_note(), shift_optab_p(), simplify_gen_unary(), start_sequence(), STORE_FLAG_VALUE, swap_commutative_operands_with_target(), expand_operand::target, targetm, trapv_binoptab_p(), TRULY_NOOP_TRUNCATION_MODES_P, UINTVAL, unknown_optab, valid_multiword_target_p(), expand_operand::value, widen_operand(), widened_mode(), and word_mode.

Referenced by add_mask_and_len_args(), adjust_stack_1(), align_dynamic_address(), allocate_dynamic_stack_space(), asan_emit_stack_protection(), convert_mode_scalar(), do_compare_rtx_and_jump(), do_jump_by_parts_zero_rtx(), do_store_flag(), emit_block_cmp_via_loop(), emit_push_insn(), emit_store_flag(), emit_store_flag_1(), emit_store_flag_int(), expand_abs_nojump(), expand_absneg_bit(), expand_addsub_overflow(), expand_and(), expand_binop(), expand_binop_directly(), expand_builtin_issignaling(), expand_builtin_next_arg(), expand_builtin_signbit(), expand_clrsb_using_clz(), expand_copysign(), expand_copysign_absneg(), expand_copysign_bit(), expand_ctz(), expand_dec(), expand_divmod(), expand_doubleword_clz_ctz_ffs(), expand_doubleword_mult(), expand_doubleword_parity(), expand_doubleword_popcount(), expand_expr_real_2(), expand_ffs(), expand_fix(), expand_float(), expand_fn_using_insn(), expand_inc(), expand_mul_overflow(), expand_mult(), expand_mult_highpart(), expand_one_cmpl_abs_nojump(), expand_parity(), expand_sdiv_pow2(), expand_shift_1(), expand_simple_binop(), expand_single_bit_test(), expand_smod_pow2(), expand_unop(), expand_widening_mult(), expmed_mult_highpart_optab(), extract_fixed_bit_field_1(), extract_split_bit_field(), find_shift_sequence(), compare_by_pieces_d::generate(), get_dynamic_stack_base(), noce_emit_move_insn(), noce_try_sign_mask(), optimize_bitfield_assignment_op(), probe_stack_range(), push_block(), round_push(), sign_expand_binop(), simplify_expand_binop(), store_constructor(), store_expr(), store_fixed_bit_field_1(), and widen_leading().

◆ expand_copysign()

rtx expand_copysign ( rtx op0,
rtx op1,
rtx target )
extern
Expand the copysign operation.   
Expand the C99 copysign operation.  OP0 and OP1 must be the same
scalar floating point mode.  Return NULL if we do not know how to
expand the operation inline.   

References as_a(), CONST_DOUBLE_AS_FLOAT_P, CONST_DOUBLE_REAL_VALUE, expand_binop(), expand_copysign_absneg(), expand_copysign_bit(), gcc_assert, GET_MODE, real_format::has_signed_zero, expand_operand::mode, NULL, NULL_RTX, OPTAB_DIRECT, optab_handler(), real_isneg(), REAL_MODE_FORMAT, real_format::signbit_ro, real_format::signbit_rw, and simplify_unary_operation().

Referenced by expand_builtin_copysign().

◆ expand_doubleword_divmod()

rtx expand_doubleword_divmod ( machine_mode mode,
rtx op0,
rtx op1,
rtx * rem,
bool unsignedp )
extern
Similarly to the above function, but compute both quotient and remainder.
Quotient can be computed from the remainder as:
rem = op0 % op1;  // Handled using expand_doubleword_mod
quot = (op0 - rem) * inv; // inv is multiplicative inverse of op1 modulo
                     // 2 * BITS_PER_WORD

We can also handle cases where op1 is a multiple of power of two constant
and constant handled by expand_doubleword_mod.
op11 = 1 << __builtin_ctz (op1);
op12 = op1 / op11;
rem1 = op0 % op12;  // Handled using expand_doubleword_mod
quot1 = (op0 - rem1) * inv; // inv is multiplicative inverse of op12 modulo
                       // 2 * BITS_PER_WORD
rem = (quot1 % op11) * op12 + rem1;
quot = quot1 / op11;   

References a, b, BITS_PER_WORD, CALL_P, const1_rtx, ctz_hwi(), expand_divmod(), expand_doubleword_mod(), expand_simple_binop(), wide_int_storage::from(), GEN_INT, get_insns(), get_last_insn(), HOST_WIDE_INT_1, immed_wide_int_const(), INTVAL, last, wi::mod_inv(), expand_operand::mode, NEXT_INSN(), NULL_RTX, OPTAB_DIRECT, pow2p_hwi(), wi::shifted_mask(), and UNSIGNED.

Referenced by expand_binop(), and expand_DIVMOD().

◆ expand_fix()

◆ expand_fixed_convert()

void expand_fixed_convert ( rtx to,
rtx from,
int uintp,
int satp )
extern
Generate code for a FIXED_CONVERT_EXPR.   
Generate code to convert FROM or TO a fixed-point.
If UINTP is true, either TO or FROM is an unsigned integer.
If SATP is true, we need to saturate the result.   

References convert_optab_handler(), convert_optab_libfunc(), emit_libcall_block(), emit_library_call_value(), emit_move_insn(), emit_unop_insn(), end_sequence(), gcc_assert, get_insns(), GET_MODE, insns, LCT_CONST, NULL_RTX, prepare_libcall_arg(), start_sequence(), and expand_operand::value.

Referenced by convert_mode_scalar(), and expand_expr_real_2().

◆ expand_float()

◆ expand_insn()

◆ expand_jump_insn()

void expand_jump_insn ( enum insn_code icode,
unsigned int nops,
class expand_operand * ops )
extern
Like expand_insn, but for jumps.   

References gcc_unreachable, and maybe_expand_jump_insn().

Referenced by emit_indirect_jump(), and try_casesi().

◆ expand_mem_signal_fence()

void expand_mem_signal_fence ( enum memmodel model)
extern
Emit a signal fence with given memory model.   

References expand_memory_blockage(), and is_mm_relaxed().

Referenced by expand_builtin_atomic_signal_fence().

◆ expand_mem_thread_fence()

void expand_mem_thread_fence ( enum memmodel model)
extern
Generate memory barriers.   
This routine will either emit the mem_thread_fence pattern or issue a 
sync_synchronize to generate a fence for memory model MEMMODEL.   

References emit_insn(), emit_library_call(), expand_memory_blockage(), GEN_INT, is_mm_relaxed(), LCT_NORMAL, NULL_RTX, synchronize_libfunc, and targetm.

Referenced by expand_atomic_load(), expand_atomic_store(), expand_builtin_atomic_thread_fence(), expand_builtin_sync_synchronize(), and maybe_emit_sync_lock_test_and_set().

◆ expand_mult_highpart()

◆ expand_one_cmpl_abs_nojump()

rtx expand_one_cmpl_abs_nojump ( machine_mode mode,
rtx op0,
rtx target )
extern
Expand the one's complement absolute value operation.   
Emit code to compute the one's complement absolute value of OP0
(if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
(TARGET may be NULL_RTX.)  The return value says where the result
actually is to be found.

MODE is the mode of the operand; the mode of the result is
different but can be deduced from MODE.   

References delete_insns_since(), expand_binop(), expand_shift(), expand_unop(), FLOAT_MODE_P, get_last_insn(), GET_MODE_PRECISION(), is_int_mode(), last, expand_operand::mode, NULL_RTX, optab_handler(), OPTAB_LIB_WIDEN, OPTAB_WIDEN, optimize_insn_for_speed_p(), and expand_operand::target.

Referenced by noce_try_abs().

◆ expand_sfix_optab()

bool expand_sfix_optab ( rtx to,
rtx from,
convert_optab tab )
extern
Generate code for float to integral conversion.   
Generate code to convert FROM to fixed point and store in TO.  FROM
must be floating point, TO must be signed.  Use the conversion optab
TAB to do the conversion.   

References convert_move(), convert_optab_handler(), convert_to_mode(), delete_insns_since(), FOR_EACH_MODE_FROM, gen_reg_rtx(), get_last_insn(), GET_MODE, insn_optimization_type(), last, maybe_emit_unop_insn(), and expand_operand::target.

Referenced by expand_builtin_int_roundingfn(), and expand_builtin_int_roundingfn_2().

◆ expand_simple_binop()

rtx expand_simple_binop ( machine_mode mode,
enum rtx_code code,
rtx op0,
rtx op1,
rtx target,
int unsignedp,
enum optab_methods methods )
extern

◆ expand_simple_unop()

rtx expand_simple_unop ( machine_mode mode,
enum rtx_code code,
rtx op0,
rtx target,
int unsignedp )
extern
Wrapper around expand_unop which takes an rtx code to specify
the operation to perform, not an optab pointer.  All other
arguments are the same.   

References expand_unop(), gcc_assert, expand_operand::mode, and expand_operand::target.

Referenced by expand_atomic_fetch_op(), expand_atomic_fetch_op_no_fallback(), expand_builtin_atomic_fetch_op(), expand_ifn_atomic_bit_test_and(), force_operand(), and noce_try_abs().

◆ expand_sync_lock_test_and_set()

rtx expand_sync_lock_test_and_set ( rtx target,
rtx mem,
rtx val )
extern
This function expands the legacy _sync_lock test_and_set operation which is
generally an atomic exchange.  Some limited targets only allow the
constant 1 to be stored.  This is an ACQUIRE operation. 

TARGET is an optional place to stick the return value.  
MEM is where VAL is stored.   

References const1_rtx, maybe_emit_atomic_exchange(), maybe_emit_atomic_test_and_set(), maybe_emit_compare_and_swap_exchange_loop(), maybe_emit_sync_lock_test_and_set(), MEMMODEL_SYNC_ACQUIRE, and expand_operand::target.

Referenced by expand_builtin_sync_lock_test_and_set().

◆ expand_ternary_op()

rtx expand_ternary_op ( machine_mode mode,
optab ternary_optab,
rtx op0,
rtx op1,
rtx op2,
rtx target,
int unsignedp )
extern
Generate code to perform an operation specified by TERNARY_OPTAB
on operands OP0, OP1 and OP2, with result having machine-mode MODE.

UNSIGNEDP is for the case where we have to widen the operands
to perform the operation.  It says to use zero-extension.

If TARGET is nonzero, the value
is generated there, if it is convenient to do so.
In all cases an rtx is returned for the locus of the value;
this may or may not be TARGET.   

References create_convert_operand_from(), create_output_operand(), expand_insn(), gcc_assert, expand_operand::mode, optab_handler(), expand_operand::target, and expand_operand::value.

Referenced by expand_builtin_mathfn_ternary(), and expand_expr_real_2().

◆ expand_twoval_binop()

bool expand_twoval_binop ( optab binoptab,
rtx op0,
rtx op1,
rtx targ0,
rtx targ1,
int unsignedp )
extern
Generate code to perform an operation on two operands with two results.   
Generate code to perform an operation specified by BINOPTAB
on operands OP0 and OP1, with two results to TARG1 and TARG2.
We assume that the order of the operands for the instruction
is TARG0, OP0, OP1, TARG1, which would fit a pattern like
[(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].

Either TARG0 or TARG1 may be zero, but what that means is that
the result is not actually wanted.  We will generate it into
a dummy pseudo-reg and discard it.  They may not both be zero.

Returns true if this operation can be performed; false if not.   

References avoid_expensive_constant(), CLASS_HAS_WIDER_MODES_P, convert_modes(), convert_move(), create_convert_operand_from(), create_fixed_operand(), delete_insns_since(), expand_twoval_binop(), FOR_EACH_WIDER_MODE, gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_CLASS, insn_data, last, maybe_expand_insn(), expand_operand::mode, insn_operand_data::mode, insn_data_d::operand, and optab_handler().

Referenced by expand_DIVMOD(), expand_divmod(), and expand_twoval_binop().

◆ expand_twoval_binop_libfunc()

bool expand_twoval_binop_libfunc ( optab binoptab,
rtx op0,
rtx op1,
rtx targ0,
rtx targ1,
enum rtx_code code )
extern
Generate code to perform an operation on two operands with two
results, using a library function.   
Expand the two-valued library call indicated by BINOPTAB, but
preserve only one of the values.  If TARG0 is non-NULL, the first
value is placed into TARG0; otherwise the second value is placed
into TARG1.  Exactly one of TARG0 and TARG1 must be non-NULL.  The
value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
This routine assumes that the value returned by the library call is
as if the return value was of an integral mode twice as wide as the
mode of OP0.  Returns 1 if the call was successful.   

References emit_libcall_block(), emit_library_call_value(), end_sequence(), gcc_assert, get_insns(), GET_MODE, GET_MODE_BITSIZE(), GET_MODE_SIZE(), insns, LCT_CONST, expand_operand::mode, NULL_RTX, optab_libfunc(), simplify_gen_subreg(), smallest_int_mode_for_size(), and start_sequence().

Referenced by expand_divmod().

◆ expand_twoval_unop()

bool expand_twoval_unop ( optab unoptab,
rtx op0,
rtx targ0,
rtx targ1,
int unsignedp )
extern
Generate code to perform an operation on one operand with two results.   
Generate code to perform an operation specified by UNOPPTAB
on operand OP0, with two results to TARG0 and TARG1.
We assume that the order of the operands for the instruction
is TARG0, TARG1, OP0.

Either TARG0 or TARG1 may be zero, but what that means is that
the result is not actually wanted.  We will generate it into
a dummy pseudo-reg and discard it.  They may not both be zero.

Returns true if this operation can be performed; false if not.   

References CLASS_HAS_WIDER_MODES_P, convert_modes(), convert_move(), create_convert_operand_from(), create_fixed_operand(), delete_insns_since(), expand_twoval_unop(), FOR_EACH_WIDER_MODE, gen_reg_rtx(), get_last_insn(), GET_MODE, GET_MODE_CLASS, last, maybe_expand_insn(), expand_operand::mode, and optab_handler().

Referenced by expand_builtin_cexpi(), expand_builtin_mathfn_3(), expand_builtin_sincos(), and expand_twoval_unop().

◆ expand_unop()

rtx expand_unop ( machine_mode mode,
optab unoptab,
rtx op0,
rtx target,
int unsignedp )
extern
Expand a unary arithmetic operation given optab rtx operand.   
Generate code to perform an operation specified by UNOPTAB
on operand OP0, with result having machine-mode MODE.

UNSIGNEDP is for the case where we have to widen the operands
to perform the operation.  It says to use zero-extension.

If TARGET is nonzero, the value
is generated there, if it is convenient to do so.
In all cases an rtx is returned for the locus of the value;
this may or may not be TARGET.   

References as_a(), BITS_PER_WORD, CLASS_HAS_WIDER_MODES_P, CONST0_RTX, CONSTM1_RTX, convert_move(), delete_insns_since(), emit_insn(), emit_libcall_block_1(), emit_library_call_value(), emit_move_insn(), end_sequence(), expand_absneg_bit(), expand_binop(), expand_clrsb_using_clz(), expand_ctz(), expand_doubleword_bswap(), expand_doubleword_clz_ctz_ffs(), expand_doubleword_parity(), expand_doubleword_popcount(), expand_ffs(), expand_parity(), expand_shift(), expand_unop(), expand_unop_direct(), FOR_EACH_WIDER_MODE, gcc_assert, gen_int_mode(), gen_int_shift_amount(), gen_lowpart, gen_reg_rtx(), get_insns(), get_last_insn(), GET_MODE, GET_MODE_BITSIZE(), GET_MODE_CLASS, GET_MODE_PRECISION(), GET_MODE_SIZE(), GET_MODE_UNIT_SIZE, hard_libcall_value(), HONOR_SIGNED_ZEROS(), i, insns, integer_type_node, is_a(), is_int_mode(), last, LCT_CONST, expand_operand::mode, NULL_RTX, operand_subword(), operand_subword_force(), OPTAB_DIRECT, optab_handler(), OPTAB_LIB_WIDEN, optab_libfunc(), OPTAB_WIDEN, optimize_insn_for_speed_p(), reg_overlap_mentioned_p(), SCALAR_INT_MODE_P, simplify_gen_unary(), start_sequence(), expand_operand::target, trapv_unoptab_p(), TRULY_NOOP_TRUNCATION_MODES_P, TYPE_MODE, valid_multiword_target_p(), expand_operand::value, widen_bswap(), widen_leading(), widen_operand(), and word_mode.

Referenced by emit_cstore(), emit_store_flag_1(), emit_store_flag_int(), expand_abs(), expand_abs_nojump(), expand_addsub_overflow(), expand_builtin_bswap(), expand_builtin_issignaling(), expand_builtin_mathfn_3(), expand_builtin_unop(), expand_copysign_absneg(), expand_divmod(), expand_doubleword_bswap(), expand_doubleword_parity(), expand_expr_real_2(), expand_fix(), expand_mul_overflow(), expand_mult(), expand_mult_const(), expand_neg_overflow(), expand_one_cmpl_abs_nojump(), expand_parity(), expand_shift_1(), expand_simple_unop(), expand_subword_shift(), expand_unop(), expand_unop_direct(), flip_storage_order(), negate_rtx(), noce_emit_move_insn(), widen_bswap(), and widen_leading().

◆ expand_vec_cmp_expr()

rtx expand_vec_cmp_expr ( tree type,
tree exp,
rtx target )
extern

◆ expand_vec_perm_const()

rtx expand_vec_perm_const ( machine_mode mode,
rtx v0,
rtx v1,
const vec_perm_builder & sel,
machine_mode sel_mode,
rtx target )
extern

◆ expand_vec_perm_var()

rtx expand_vec_perm_var ( machine_mode mode,
rtx v0,
rtx v1,
rtx sel,
rtx target )
extern
Generate code for VEC_PERM_EXPR.   
Implement a permutation of vectors v0 and v1 using the permutation
vector in SEL and return the result.  Use TARGET to hold the result
if nonnull and convenient.

MODE is the mode of the vectors being permuted (V0 and V1).
SEL must have the integer equivalent of MODE and is known to be
unsuitable for permutes with a constant permutation vector.   

References rtx_vector_builder::build(), direct_optab_handler(), exact_log2(), expand_simple_binop(), expand_vec_perm_1(), expand_vec_perm_const(), gcc_assert, GEN_INT, gen_int_shift_amount(), gen_lowpart, gen_reg_rtx(), GET_MODE, GET_MODE_MASK, GET_MODE_NUNITS(), GET_MODE_SIZE(), GET_MODE_UNIT_SIZE, i, maybe_gt, expand_operand::mode, NULL, NULL_RTX, OPTAB_DIRECT, qimode_for_vec_perm(), and expand_operand::target.

Referenced by expand_expr_real_2().

◆ expand_vec_series_expr()

rtx expand_vec_series_expr ( machine_mode vmode,
rtx op0,
rtx op1,
rtx target )
extern
Generate code for VEC_SERIES_EXPR.   
Generate VEC_SERIES_EXPR <OP0, OP1>, returning a value of mode VMODE.
Use TARGET for the result if nonnull and convenient.   

References create_input_operand(), create_output_operand(), direct_optab_handler(), expand_insn(), gcc_assert, GET_MODE_INNER, expand_operand::target, and expand_operand::value.

Referenced by expand_expr_real_2().

◆ expand_vector_broadcast()

rtx expand_vector_broadcast ( machine_mode vmode,
rtx op )
extern
Create a new vector value in VMODE with all elements set to OP.  The
mode of OP must be the element mode of VMODE.  If OP is a constant,
then the return value will be a constant.   

References convert_optab_handler(), create_input_operand(), create_output_operand(), emit_insn(), expand_insn(), gcc_checking_assert, gen_const_vec_duplicate(), gen_reg_rtx(), GET_MODE, GET_MODE_INNER, GET_MODE_NUNITS(), i, NULL, NULL_RTX, optab_handler(), rtvec_alloc(), RTVEC_ELT, valid_for_const_vector_p(), expand_operand::value, and VECTOR_MODE_P.

Referenced by expand_binop(), expand_expr_real_2(), and maybe_legitimize_operand().

◆ expand_widen_pattern_expr()

rtx expand_widen_pattern_expr ( const struct separate_ops * ,
rtx ,
rtx ,
rtx ,
rtx ,
int  )
extern

◆ expand_widening_mult()

rtx expand_widening_mult ( machine_mode mode,
rtx op0,
rtx op1,
rtx target,
int unsignedp,
optab this_optab )
extern
Definitions for code generation pass of GNU compiler.
   Copyright (C) 2001-2024 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.

GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.   
Generate code for a widening multiply.   
Perform a widening multiplication and return an rtx for the result.
MODE is mode of value; OP0 and OP1 are what to multiply (rtx's);
TARGET is a suggestion for where to store the result (an rtx).
THIS_OPTAB is the optab we should use, it must be either umul_widen_optab
or smul_widen_optab.

We check specially for a constant integer as OP1, comparing the
cost of a widening multiply against the cost of a sequence of shifts
and adds.   

References choose_mult_variant(), CONST0_RTX, CONST_INT_P, convert_modes(), convert_to_mode(), EXACT_POWER_OF_2_OR_ZERO_P, expand_binop(), expand_mult_const(), expand_shift(), floor_log2(), GET_MODE, HWI_COMPUTABLE_MODE_P(), INTVAL, mul_widen_cost(), OPTAB_LIB_WIDEN, and optimize_insn_for_speed_p().

Referenced by expand_expr_real_2().

◆ force_expand_binop()

bool force_expand_binop ( machine_mode mode,
optab binoptab,
rtx op0,
rtx op1,
rtx target,
int unsignedp,
enum optab_methods methods )
extern
Like simplify_expand_binop, but always put the result in TARGET.
Return true if the expansion succeeded.   

References emit_move_insn(), expand_operand::mode, simplify_expand_binop(), and expand_operand::target.

Referenced by expand_doubleword_shift(), expand_sjlj_dispatch_table(), expand_subword_shift(), expand_superword_shift(), and shift_return_value().

◆ gen_add2_insn()

rtx_insn * gen_add2_insn ( rtx x,
rtx y )
extern
Create but don't emit one rtl instruction to perform certain operations.
Modes must match; operands must meet the operation's predicates.
Likewise for subtraction and for just copying.   
These functions attempt to generate an insn body, rather than
emitting the insn, but if the gen function already emits them, we
make no attempt to turn them back into naked patterns.   
Generate and return an insn body to add Y to X.   

References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.

Referenced by emit_add2_insn(), address_reload_context::emit_autoinc(), gen_reload(), inc_for_reload(), and pieces_addr::increment_address().

◆ gen_add3_insn()

rtx_insn * gen_add3_insn ( rtx r0,
rtx r1,
rtx c )
extern
Generate and return an insn body to add r1 and c,
storing the result in r0.   

References GET_MODE, insn_operand_matches(), NULL, and optab_handler().

Referenced by emit_inc_dec_insn_before().

◆ gen_addptr3_insn()

rtx_insn * gen_addptr3_insn ( rtx x,
rtx y,
rtx z )
extern
Generate and return an insn body to add Y to X.   

References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.

Referenced by emit_add3_insn().

◆ gen_cond_trap()

rtx_insn * gen_cond_trap ( enum rtx_code code,
rtx op1,
rtx op2,
rtx tcode )
extern
Generate a conditional trap instruction.   
Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
CODE.  Return 0 on failure.   

References do_pending_stack_adjust(), emit_insn(), end_sequence(), get_insns(), GET_MODE, insn_operand_matches(), expand_operand::mode, NULL, NULL_RTX, OPTAB_DIRECT, optab_handler(), prepare_cmp_insn(), start_sequence(), and XEXP.

Referenced by find_cond_trap().

◆ gen_extend_insn()

rtx_insn * gen_extend_insn ( rtx x,
rtx y,
machine_mode mto,
machine_mode mfrom,
int unsignedp )
extern
Generate the body of an insn to extend Y (with mode MFROM)
into X (with mode MTO).  Do zero-extension if UNSIGNEDP is nonzero.   

References can_extend_p(), and y.

Referenced by assign_parm_setup_reg().

◆ gen_sub2_insn()

rtx_insn * gen_sub2_insn ( rtx x,
rtx y )
extern
Generate and return an insn body to subtract Y from X.   

References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.

Referenced by address_reload_context::emit_autoinc(), and inc_for_reload().

◆ gen_sub3_insn()

rtx_insn * gen_sub3_insn ( rtx r0,
rtx r1,
rtx c )
extern
Generate and return an insn body to subtract r1 and c,
storing the result in r0.   

References GET_MODE, insn_operand_matches(), NULL, and optab_handler().

◆ get_rtx_code()

enum rtx_code get_rtx_code ( enum tree_code tcode,
bool unsignedp )
extern
Return rtx code for TCODE.  Use UNSIGNEDP to select signed
or unsigned operation code.   

References gcc_assert, and get_rtx_code_1().

Referenced by expand_ccmp_next(), get_compare_parts(), and vector_compare_rtx().

◆ get_rtx_code_1()

enum rtx_code get_rtx_code_1 ( enum tree_code tcode,
bool unsignedp )
extern
Return rtx code for TCODE or UNKNOWN.  Use UNSIGNEDP to select signed
or unsigned operation code.   

Referenced by get_rtx_code(), vcond_icode_p(), and vec_cmp_icode_p().

◆ have_add2_insn()

bool have_add2_insn ( rtx x,
rtx y )
extern

◆ have_addptr3_insn()

bool have_addptr3_insn ( rtx x,
rtx y,
rtx z )
extern
Return true if the target implements an addptr pattern and X, Y,
and Z are valid for the pattern predicates.   

References gcc_assert, GET_MODE, insn_operand_matches(), optab_handler(), and y.

Referenced by eliminate_regs_in_insn(), and emit_add3_insn().

◆ have_insn_for()

bool have_insn_for ( enum rtx_code code,
machine_mode mode )
extern
Report whether the machine description contains an insn which can
perform the operation described by CODE and MODE.   
Report whether we have an instruction to perform the operation
specified by CODE on operands of mode MODE.   

References expand_operand::mode, and optab_handler().

Referenced by analyze_insn_to_expand_var(), default_min_divisions_for_recip_mul(), do_compare_rtx_and_jump(), do_jump(), expand_atomic_compare_and_swap(), expand_DEFERRED_INIT(), expand_expr_real_2(), force_to_mode(), make_compound_operation_int(), make_extraction(), move2add_use_add2_insn(), simplify_comparison(), and simplify_context::simplify_subreg().

◆ have_sub2_insn()

bool have_sub2_insn ( rtx x,
rtx y )
extern

◆ insn_operand_matches()

◆ maybe_emit_unop_insn()

bool maybe_emit_unop_insn ( enum insn_code icode,
rtx target,
rtx op0,
enum rtx_code code )
extern
Generate an instruction with a given INSN_CODE with an output and
an input.   
Generate an instruction whose insn-code is INSN_CODE,
with two operands: an output TARGET and an input OP0.
TARGET *must* be nonzero, and the output is always stored there.
CODE is an rtx code such that (CODE OP0) is an rtx that describes
the value that is stored into TARGET.

Return false if expansion failed.   

References add_equal_note(), create_input_operand(), create_output_operand(), emit_insn(), emit_move_insn(), GET_MODE, INSN_P, maybe_gen_insn(), NEXT_INSN(), NULL_RTX, expand_operand::target, and expand_operand::value.

Referenced by emit_unop_insn(), expand_builtin_interclass_mathfn(), expand_builtin_issignaling(), expand_builtin_signbit(), expand_fix(), and expand_sfix_optab().

◆ maybe_expand_insn()

◆ maybe_expand_jump_insn()

bool maybe_expand_jump_insn ( enum insn_code icode,
unsigned int nops,
class expand_operand * ops )
extern
Like maybe_expand_insn, but for jumps.   

References emit_jump_insn(), and maybe_gen_insn().

Referenced by expand_jump_insn().

◆ maybe_gen_insn()

rtx_insn * maybe_gen_insn ( enum insn_code icode,
unsigned int nops,
class expand_operand * ops )
extern
Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
as its operands.  Return the instruction pattern on success,
and emit any necessary set-up code.  Return null and emit no
code on failure.   

References gcc_assert, gcc_unreachable, insn_data, maybe_legitimize_operands(), NULL, and expand_operand::value.

Referenced by expand_binop_directly(), expand_unop_direct(), maybe_emit_unop_insn(), maybe_expand_insn(), and maybe_expand_jump_insn().

◆ maybe_legitimize_operands()

bool maybe_legitimize_operands ( enum insn_code icode,
unsigned int opno,
unsigned int nops,
class expand_operand * ops )
extern
Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
of instruction ICODE.  Return true on success, leaving the new operand
values in the OPS themselves.  Emit no code on failure.   

References can_reuse_operands_p(), copy_rtx(), delete_insns_since(), get_last_insn(), i, insn_operand_matches(), last, maybe_legitimize_operand(), rtx_equal_p(), and expand_operand::value.

Referenced by emit_stack_probe(), expand_builtin_interclass_mathfn(), maybe_gen_insn(), and vector_compare_rtx().

◆ prepare_operand()

rtx prepare_operand ( enum insn_code icode,
rtx x,
int opnum,
machine_mode mode,
machine_mode wider_mode,
int unsignedp )
extern
Before emitting an insn with code ICODE, make sure that X, which is going
to be used for operand OPNUM of the insn, is converted from mode MODE to
WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
that it is accepted by the operand predicate.  Return the new value.   

References convert_modes(), copy_to_mode_reg(), GET_MODE, insn_data, insn_operand_matches(), NULL_RTX, and reload_completed.

Referenced by emit_cstore(), and prepare_cmp_insn().

◆ sign_expand_binop()

rtx sign_expand_binop ( machine_mode mode,
optab uoptab,
optab soptab,
rtx op0,
rtx op1,
rtx target,
int unsignedp,
enum optab_methods methods )
extern
Expand a binary operation with both signed and unsigned forms.   
Expand a binary operator which has both signed and unsigned forms.
UOPTAB is the optab for unsigned operations, and SOPTAB is for
signed operations.

If we widen unsigned operands, we may use a signed wider operation instead
of an unsigned wider operation, since the result would be the same.   

References expand_binop(), expand_operand::mode, OPTAB_DIRECT, OPTAB_LIB, OPTAB_WIDEN, and expand_operand::target.

Referenced by expand_divmod().

◆ simplify_expand_binop()

rtx simplify_expand_binop ( machine_mode mode,
optab binoptab,
rtx op0,
rtx op1,
rtx target,
int unsignedp,
enum optab_methods methods )
extern
Like expand_binop, but return a constant rtx if the result can be
calculated at compile time.  The arguments and return value are
otherwise the same as for expand_binop.   

References CONSTANT_P, expand_binop(), expand_operand::mode, simplify_binary_operation(), and expand_operand::target.

Referenced by expand_doubleword_shift(), expand_subword_shift(), and force_expand_binop().

◆ valid_multiword_target_p()

bool valid_multiword_target_p ( rtx target)
extern
TARGET is a target of a multiword operation that we are going to
implement as a series of word-mode operations.  Return true if
TARGET is suitable for this purpose.   

References GET_MODE, GET_MODE_SIZE(), i, validate_subreg(), and word_mode.

Referenced by expand_absneg_bit(), expand_binop(), expand_copysign_bit(), expand_doubleword_bswap(), expand_unop(), and extract_integral_bit_field().

◆ vector_compare_rtx()

rtx vector_compare_rtx ( machine_mode cmp_mode,
enum tree_code tcode,
tree t_op0,
tree t_op1,
bool unsignedp,
enum insn_code icode,
unsigned int opno )
extern
Return a comparison rtx of mode CMP_MODE for COND.  Use UNSIGNEDP to
select signed or unsigned operators.  OPNO holds the index of the
first comparison operand for insn ICODE.  Do not generate the
compare instruction itself.   

References create_input_operand(), expand_expr(), EXPAND_STACK_PARM, gcc_assert, gcc_unreachable, GET_MODE, get_rtx_code(), maybe_legitimize_operands(), NULL_RTX, tcc_comparison, TREE_CODE_CLASS, TREE_TYPE, TYPE_MODE, and expand_operand::value.

Referenced by expand_vec_cmp_expr(), and expand_vec_cond_optab_fn().